[13:01:03.016] <TB2> INFO: *** Welcome to pxar ***
[13:01:03.016] <TB2> INFO: *** Today: 2015/10/29
[13:01:03.111] <TB2> INFO: *** Version: 9da6
[13:01:03.112] <TB2> INFO: readRocDacs: /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C15.dat
[13:01:03.113] <TB2> INFO: readTbmDacs: /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//tbmParameters_C0b.dat
[13:01:03.114] <TB2> INFO: readMaskFile: /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//defaultMaskFile.dat
[13:01:03.114] <TB2> INFO: readTrimFile: /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters_C15.dat
[13:01:03.199] <TB2> INFO: clk: 4
[13:01:03.199] <TB2> INFO: ctr: 4
[13:01:03.199] <TB2> INFO: sda: 19
[13:01:03.199] <TB2> INFO: tin: 9
[13:01:03.199] <TB2> INFO: level: 15
[13:01:03.199] <TB2> INFO: triggerdelay: 0
[13:01:03.199] <TB2> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[13:01:03.199] <TB2> INFO: Log level: INFO
[13:01:03.210] <TB2> INFO: Found DTB DTB_WRE1O5
[13:01:03.220] <TB2> QUIET: Connection to board DTB_WRE1O5 opened.
[13:01:03.223] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 20
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WRE1O5
MAC address: 40D855118014
Hostname: pixelDTB020
Comment:
------------------------------------------------------
[13:01:03.226] <TB2> INFO: RPC call hashes of host and DTB match: 398089610
[13:01:04.789] <TB2> INFO: DUT info:
[13:01:04.789] <TB2> INFO: The DUT currently contains the following objects:
[13:01:04.789] <TB2> INFO: 2 TBM Cores tbm08c (2 ON)
[13:01:04.789] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:01:04.789] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:01:04.789] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:01:04.789] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.789] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:04.790] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:01:05.191] <TB2> INFO: enter 'restricted' command line mode
[13:01:05.191] <TB2> INFO: enter test to run
[13:01:05.191] <TB2> INFO: test: pretest no parameter change
[13:01:05.191] <TB2> INFO: running: pretest
[13:01:05.199] <TB2> INFO: ######################################################################
[13:01:05.199] <TB2> INFO: PixTestPretest::doTest()
[13:01:05.199] <TB2> INFO: ######################################################################
[13:01:05.201] <TB2> INFO: ----------------------------------------------------------------------
[13:01:05.201] <TB2> INFO: PixTestPretest::programROC()
[13:01:05.201] <TB2> INFO: ----------------------------------------------------------------------
[13:01:23.221] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:01:23.221] <TB2> INFO: IA differences per ROC: 17.7 18.5 17.7 16.9 19.3 17.7 17.7 19.3 16.9 20.9 20.9 17.7 17.7 18.5 20.1 18.5
[13:01:23.312] <TB2> INFO: ----------------------------------------------------------------------
[13:01:23.312] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:01:23.312] <TB2> INFO: ----------------------------------------------------------------------
[13:01:29.527] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[13:01:29.528] <TB2> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 20.1 19.3 20.1 20.1 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[13:01:29.574] <TB2> INFO: ----------------------------------------------------------------------
[13:01:29.574] <TB2> INFO: PixTestPretest::findTiming()
[13:01:29.574] <TB2> INFO: ----------------------------------------------------------------------
[13:01:29.574] <TB2> INFO: PixTestCmd::init()
[13:01:30.170] <TB2> WARNING: Not unmasking DUT, not setting Calibrate bits!
[13:03:09.017] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[13:03:09.017] <TB2> INFO: (success/tries = 100/100), width = 5
[13:03:09.019] <TB2> INFO: ----------------------------------------------------------------------
[13:03:09.019] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:03:09.019] <TB2> INFO: ----------------------------------------------------------------------
[13:03:09.157] <TB2> INFO: Expecting 231680 events.
[13:03:13.766] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[13:03:13.769] <TB2> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[13:03:16.717] <TB2> INFO: 231680 events read in total (6845ms).
[13:03:16.722] <TB2> INFO: Test took 7701ms.
[13:03:17.113] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:03:17.162] <TB2> INFO: ----------------------------------------------------------------------
[13:03:17.162] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:03:17.162] <TB2> INFO: ----------------------------------------------------------------------
[13:03:17.300] <TB2> INFO: Expecting 231680 events.
[13:03:25.991] <TB2> INFO: 231680 events read in total (7975ms).
[13:03:25.995] <TB2> INFO: Test took 8828ms.
[13:03:26.421] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:03:26.421] <TB2> INFO: CalDel: 118 145 143 131 113 111 130 125 124 107 144 166 143 127 134 141
[13:03:26.421] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C0.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C1.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C2.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C3.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C4.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C5.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C6.dat
[13:03:26.424] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C7.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C8.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C9.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C10.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C11.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C12.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C13.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C14.dat
[13:03:26.425] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters_C15.dat
[13:03:26.425] <TB2> INFO: write tbm parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//tbmParameters_C0a.dat
[13:03:26.425] <TB2> INFO: write tbm parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//tbmParameters_C0b.dat
[13:03:26.426] <TB2> INFO: PixTestPretest::doTest() done, duration: 141 seconds
[13:03:26.504] <TB2> INFO: enter test to run
[13:03:26.504] <TB2> INFO: test: fulltest no parameter change
[13:03:26.504] <TB2> INFO: running: fulltest
[13:03:26.505] <TB2> INFO: ######################################################################
[13:03:26.505] <TB2> INFO: PixTestFullTest::doTest()
[13:03:26.505] <TB2> INFO: ######################################################################
[13:03:26.506] <TB2> INFO: ######################################################################
[13:03:26.506] <TB2> INFO: PixTestAlive::doTest()
[13:03:26.506] <TB2> INFO: ######################################################################
[13:03:26.508] <TB2> INFO: ----------------------------------------------------------------------
[13:03:26.508] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:03:26.508] <TB2> INFO: ----------------------------------------------------------------------
[13:03:26.824] <TB2> INFO: Expecting 41600 events.
[13:03:31.067] <TB2> INFO: 41600 events read in total (3528ms).
[13:03:31.068] <TB2> INFO: Test took 4558ms.
[13:03:31.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:31.473] <TB2> INFO: PixTestAlive::aliveTest() done
[13:03:31.473] <TB2> INFO: number of dead pixels (per ROC): 1 0 0 1 0 0 0 2 2 1 0 1 0 0 6 3
[13:03:31.474] <TB2> INFO: ----------------------------------------------------------------------
[13:03:31.474] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:03:31.474] <TB2> INFO: ----------------------------------------------------------------------
[13:03:31.785] <TB2> INFO: Expecting 41600 events.
[13:03:34.798] <TB2> INFO: 41600 events read in total (2298ms).
[13:03:34.798] <TB2> INFO: Test took 3321ms.
[13:03:34.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:34.799] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:03:35.221] <TB2> INFO: PixTestAlive::maskTest() done
[13:03:35.221] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:03:35.223] <TB2> INFO: ----------------------------------------------------------------------
[13:03:35.223] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:03:35.223] <TB2> INFO: ----------------------------------------------------------------------
[13:03:35.540] <TB2> INFO: Expecting 41600 events.
[13:03:39.607] <TB2> INFO: 41600 events read in total (3352ms).
[13:03:39.608] <TB2> INFO: Test took 4382ms.
[13:03:39.615] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:40.011] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:03:40.011] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:03:40.011] <TB2> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[13:03:40.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:40.011] <TB2> INFO: Decoding statistics:
[13:03:40.011] <TB2> INFO: General information:
[13:03:40.011] <TB2> INFO: 16bit words read: 0
[13:03:40.011] <TB2> INFO: valid events total: 0
[13:03:40.011] <TB2> INFO: empty events: 0
[13:03:40.011] <TB2> INFO: valid events with pixels: 0
[13:03:40.011] <TB2> INFO: valid pixel hits: 0
[13:03:40.011] <TB2> INFO: Event errors: 0
[13:03:40.011] <TB2> INFO: start marker: 0
[13:03:40.011] <TB2> INFO: stop marker: 0
[13:03:40.011] <TB2> INFO: overflow: 0
[13:03:40.011] <TB2> INFO: invalid 5bit words: 0
[13:03:40.011] <TB2> INFO: invalid XOR eye diagram: 0
[13:03:40.011] <TB2> INFO: TBM errors: 0
[13:03:40.011] <TB2> INFO: flawed TBM headers: 0
[13:03:40.011] <TB2> INFO: flawed TBM trailers: 0
[13:03:40.011] <TB2> INFO: event ID mismatches: 0
[13:03:40.011] <TB2> INFO: ROC errors: 0
[13:03:40.011] <TB2> INFO: missing ROC header(s): 0
[13:03:40.011] <TB2> INFO: misplaced readback start: 0
[13:03:40.011] <TB2> INFO: Pixel decoding errors: 0
[13:03:40.011] <TB2> INFO: pixel data incomplete: 0
[13:03:40.011] <TB2> INFO: pixel address: 0
[13:03:40.011] <TB2> INFO: pulse height fill bit: 0
[13:03:40.011] <TB2> INFO: buffer corruption: 0
[13:03:40.022] <TB2> INFO: ######################################################################
[13:03:40.022] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:03:40.022] <TB2> INFO: ######################################################################
[13:03:40.026] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[13:03:40.037] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[13:03:40.037] <TB2> INFO: run 1 of 1
[13:03:40.367] <TB2> INFO: Expecting 3120000 events.
[13:04:26.437] <TB2> INFO: 1031670 events read in total (45355ms).
[13:05:12.050] <TB2> INFO: 2043095 events read in total (90968ms).
[13:05:59.792] <TB2> INFO: 3084590 events read in total (138711ms).
[13:06:01.586] <TB2> INFO: 3120000 events read in total (140504ms).
[13:06:01.629] <TB2> INFO: Test took 141593ms.
[13:06:01.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:25.360] <TB2> INFO: PixTestBBMap::doTest() done, duration: 165 seconds
[13:06:25.360] <TB2> INFO: number of dead bumps (per ROC): 3 5 1 1 1 1 1 3 1 2 2 3 4 2 6 0
[13:06:25.360] <TB2> INFO: separation cut (per ROC): 88 91 79 94 99 87 102 104 79 86 85 80 81 86 92 90
[13:06:25.361] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:25.361] <TB2> INFO: Decoding statistics:
[13:06:25.361] <TB2> INFO: General information:
[13:06:25.361] <TB2> INFO: 16bit words read: 0
[13:06:25.361] <TB2> INFO: valid events total: 0
[13:06:25.361] <TB2> INFO: empty events: 0
[13:06:25.361] <TB2> INFO: valid events with pixels: 0
[13:06:25.361] <TB2> INFO: valid pixel hits: 0
[13:06:25.361] <TB2> INFO: Event errors: 0
[13:06:25.361] <TB2> INFO: start marker: 0
[13:06:25.361] <TB2> INFO: stop marker: 0
[13:06:25.361] <TB2> INFO: overflow: 0
[13:06:25.361] <TB2> INFO: invalid 5bit words: 0
[13:06:25.361] <TB2> INFO: invalid XOR eye diagram: 0
[13:06:25.361] <TB2> INFO: TBM errors: 0
[13:06:25.361] <TB2> INFO: flawed TBM headers: 0
[13:06:25.361] <TB2> INFO: flawed TBM trailers: 0
[13:06:25.361] <TB2> INFO: event ID mismatches: 0
[13:06:25.361] <TB2> INFO: ROC errors: 0
[13:06:25.361] <TB2> INFO: missing ROC header(s): 0
[13:06:25.361] <TB2> INFO: misplaced readback start: 0
[13:06:25.361] <TB2> INFO: Pixel decoding errors: 0
[13:06:25.361] <TB2> INFO: pixel data incomplete: 0
[13:06:25.361] <TB2> INFO: pixel address: 0
[13:06:25.361] <TB2> INFO: pulse height fill bit: 0
[13:06:25.361] <TB2> INFO: buffer corruption: 0
[13:06:25.438] <TB2> INFO: ######################################################################
[13:06:25.438] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:06:25.438] <TB2> INFO: ######################################################################
[13:06:25.438] <TB2> INFO: ----------------------------------------------------------------------
[13:06:25.438] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:06:25.438] <TB2> INFO: ----------------------------------------------------------------------
[13:06:25.439] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:06:25.447] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[13:06:25.447] <TB2> INFO: run 1 of 1
[13:06:25.755] <TB2> INFO: Expecting 26208000 events.
[13:06:58.535] <TB2> INFO: 1132400 events read in total (32065ms).
[13:07:26.633] <TB2> INFO: 2238200 events read in total (60163ms).
[13:07:59.179] <TB2> INFO: 3343100 events read in total (92709ms).
[13:08:32.457] <TB2> INFO: 4441050 events read in total (125987ms).
[13:09:06.050] <TB2> INFO: 5541100 events read in total (159580ms).
[13:09:38.501] <TB2> INFO: 6639550 events read in total (192031ms).
[13:10:10.227] <TB2> INFO: 7735500 events read in total (223757ms).
[13:10:41.899] <TB2> INFO: 8831100 events read in total (255429ms).
[13:11:12.842] <TB2> INFO: 9927400 events read in total (286372ms).
[13:11:46.619] <TB2> INFO: 11022200 events read in total (320149ms).
[13:12:19.539] <TB2> INFO: 12117400 events read in total (353069ms).
[13:12:53.080] <TB2> INFO: 13205600 events read in total (386610ms).
[13:13:25.990] <TB2> INFO: 14283750 events read in total (419520ms).
[13:13:57.809] <TB2> INFO: 15358800 events read in total (451339ms).
[13:14:29.001] <TB2> INFO: 16430250 events read in total (482531ms).
[13:15:06.119] <TB2> INFO: 17501600 events read in total (519649ms).
[13:15:43.707] <TB2> INFO: 18571500 events read in total (557237ms).
[13:16:20.597] <TB2> INFO: 19640600 events read in total (594127ms).
[13:16:57.049] <TB2> INFO: 20708900 events read in total (630579ms).
[13:17:34.979] <TB2> INFO: 21776950 events read in total (668509ms).
[13:18:11.811] <TB2> INFO: 22842300 events read in total (705341ms).
[13:18:48.967] <TB2> INFO: 23913700 events read in total (742497ms).
[13:19:25.864] <TB2> INFO: 24983850 events read in total (779394ms).
[13:20:02.902] <TB2> INFO: 26070050 events read in total (816433ms).
[13:20:07.540] <TB2> INFO: 26208000 events read in total (821070ms).
[13:20:07.570] <TB2> INFO: Test took 822123ms.
[13:20:07.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:07.809] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:09.289] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:10.710] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:12.367] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:13.838] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:15.246] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:16.731] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:18.327] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:19.785] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:21.217] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:22.687] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:24.242] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:25.665] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:27.128] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:28.564] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:30.010] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:20:31.479] <TB2> INFO: PixTestScurves::scurves() done
[13:20:31.479] <TB2> INFO: Vcal mean: 85.99 97.35 80.00 95.27 93.13 89.37 99.14 96.77 85.58 91.40 98.57 88.94 86.11 92.35 92.58 87.74
[13:20:31.479] <TB2> INFO: Vcal RMS: 5.53 6.18 4.42 5.75 5.70 5.64 5.67 6.01 6.18 6.15 6.13 6.09 5.06 5.44 6.86 6.28
[13:20:31.479] <TB2> INFO: PixTestScurves::fullTest() done, duration: 846 seconds
[13:20:31.479] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:31.479] <TB2> INFO: Decoding statistics:
[13:20:31.479] <TB2> INFO: General information:
[13:20:31.479] <TB2> INFO: 16bit words read: 0
[13:20:31.479] <TB2> INFO: valid events total: 0
[13:20:31.479] <TB2> INFO: empty events: 0
[13:20:31.479] <TB2> INFO: valid events with pixels: 0
[13:20:31.479] <TB2> INFO: valid pixel hits: 0
[13:20:31.479] <TB2> INFO: Event errors: 0
[13:20:31.479] <TB2> INFO: start marker: 0
[13:20:31.479] <TB2> INFO: stop marker: 0
[13:20:31.479] <TB2> INFO: overflow: 0
[13:20:31.479] <TB2> INFO: invalid 5bit words: 0
[13:20:31.479] <TB2> INFO: invalid XOR eye diagram: 0
[13:20:31.479] <TB2> INFO: TBM errors: 0
[13:20:31.479] <TB2> INFO: flawed TBM headers: 0
[13:20:31.479] <TB2> INFO: flawed TBM trailers: 0
[13:20:31.479] <TB2> INFO: event ID mismatches: 0
[13:20:31.479] <TB2> INFO: ROC errors: 0
[13:20:31.479] <TB2> INFO: missing ROC header(s): 0
[13:20:31.479] <TB2> INFO: misplaced readback start: 0
[13:20:31.479] <TB2> INFO: Pixel decoding errors: 0
[13:20:31.479] <TB2> INFO: pixel data incomplete: 0
[13:20:31.479] <TB2> INFO: pixel address: 0
[13:20:31.479] <TB2> INFO: pulse height fill bit: 0
[13:20:31.479] <TB2> INFO: buffer corruption: 0
[13:20:31.552] <TB2> INFO: ######################################################################
[13:20:31.552] <TB2> INFO: PixTestTrim::doTest()
[13:20:31.552] <TB2> INFO: ######################################################################
[13:20:31.553] <TB2> INFO: ----------------------------------------------------------------------
[13:20:31.554] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:20:31.554] <TB2> INFO: ----------------------------------------------------------------------
[13:20:31.640] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:20:31.640] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:20:31.648] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:20:31.648] <TB2> INFO: run 1 of 1
[13:20:31.953] <TB2> INFO: Expecting 6281600 events.
[13:21:22.843] <TB2> INFO: 1417860 events read in total (50174ms).
[13:22:12.592] <TB2> INFO: 2824540 events read in total (99923ms).
[13:23:03.708] <TB2> INFO: 4233790 events read in total (151039ms).
[13:23:53.157] <TB2> INFO: 5651820 events read in total (200488ms).
[13:24:14.928] <TB2> INFO: 6281600 events read in total (222259ms).
[13:24:14.969] <TB2> INFO: Test took 223322ms.
[13:24:15.032] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:35.282] <TB2> INFO: ROC 0 VthrComp = 89
[13:24:35.282] <TB2> INFO: ROC 1 VthrComp = 94
[13:24:35.282] <TB2> INFO: ROC 2 VthrComp = 82
[13:24:35.282] <TB2> INFO: ROC 3 VthrComp = 95
[13:24:35.283] <TB2> INFO: ROC 4 VthrComp = 98
[13:24:35.283] <TB2> INFO: ROC 5 VthrComp = 95
[13:24:35.283] <TB2> INFO: ROC 6 VthrComp = 102
[13:24:35.283] <TB2> INFO: ROC 7 VthrComp = 101
[13:24:35.283] <TB2> INFO: ROC 8 VthrComp = 88
[13:24:35.283] <TB2> INFO: ROC 9 VthrComp = 92
[13:24:35.284] <TB2> INFO: ROC 10 VthrComp = 88
[13:24:35.284] <TB2> INFO: ROC 11 VthrComp = 86
[13:24:35.284] <TB2> INFO: ROC 12 VthrComp = 89
[13:24:35.284] <TB2> INFO: ROC 13 VthrComp = 93
[13:24:35.284] <TB2> INFO: ROC 14 VthrComp = 94
[13:24:35.284] <TB2> INFO: ROC 15 VthrComp = 92
[13:24:35.284] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:24:35.284] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:24:35.292] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:24:35.292] <TB2> INFO: run 1 of 1
[13:24:35.597] <TB2> INFO: Expecting 6281600 events.
[13:25:17.285] <TB2> INFO: 888460 events read in total (40973ms).
[13:25:58.321] <TB2> INFO: 1774470 events read in total (82009ms).
[13:26:39.928] <TB2> INFO: 2661770 events read in total (123616ms).
[13:27:21.153] <TB2> INFO: 3546230 events read in total (164841ms).
[13:28:01.836] <TB2> INFO: 4423460 events read in total (205524ms).
[13:28:42.083] <TB2> INFO: 5298100 events read in total (245771ms).
[13:29:22.052] <TB2> INFO: 6173860 events read in total (285740ms).
[13:29:27.184] <TB2> INFO: 6281600 events read in total (290872ms).
[13:29:27.245] <TB2> INFO: Test took 291953ms.
[13:29:27.399] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:52.666] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.8654 for pixel 13/0 mean/min/max = 46.136/32.3163/59.9556
[13:29:52.666] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 63.2673 for pixel 20/0 mean/min/max = 47.6071/31.7582/63.4561
[13:29:52.666] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.7964 for pixel 28/75 mean/min/max = 44.95/32.0679/57.8322
[13:29:52.667] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.3797 for pixel 11/5 mean/min/max = 45.1876/31.8437/58.5315
[13:29:52.667] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.7126 for pixel 23/2 mean/min/max = 45.6619/31.5944/59.7295
[13:29:52.667] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.5569 for pixel 38/79 mean/min/max = 45.3186/31.038/59.5991
[13:29:52.668] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.7245 for pixel 12/77 mean/min/max = 46.5044/32.2343/60.7745
[13:29:52.668] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.5226 for pixel 25/10 mean/min/max = 45.4041/31.993/58.8152
[13:29:52.668] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.7797 for pixel 6/77 mean/min/max = 46.1607/31.5129/60.8085
[13:29:52.669] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 62.371 for pixel 6/12 mean/min/max = 47.3035/32.0453/62.5617
[13:29:52.669] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 67.6625 for pixel 23/3 mean/min/max = 51.8414/36.019/67.6637
[13:29:52.670] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.7991 for pixel 0/75 mean/min/max = 46.7442/31.6722/61.8163
[13:29:52.670] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.383 for pixel 17/10 mean/min/max = 45.6863/32.9033/58.4692
[13:29:52.670] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.6096 for pixel 22/2 mean/min/max = 45.5411/32.4672/58.6151
[13:29:52.671] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.3359 for pixel 9/11 mean/min/max = 46.8057/32.1813/61.4302
[13:29:52.671] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.2511 for pixel 12/19 mean/min/max = 45.8508/31.3022/60.3994
[13:29:52.671] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:29:52.805] <TB2> INFO: Expecting 514560 events.
[13:30:02.967] <TB2> INFO: 514560 events read in total (9447ms).
[13:30:02.973] <TB2> INFO: Expecting 514560 events.
[13:30:13.166] <TB2> INFO: 514560 events read in total (9529ms).
[13:30:13.173] <TB2> INFO: Expecting 514560 events.
[13:30:23.340] <TB2> INFO: 514560 events read in total (9498ms).
[13:30:23.350] <TB2> INFO: Expecting 514560 events.
[13:30:33.576] <TB2> INFO: 514560 events read in total (9566ms).
[13:30:33.586] <TB2> INFO: Expecting 514560 events.
[13:30:43.647] <TB2> INFO: 514560 events read in total (9395ms).
[13:30:43.660] <TB2> INFO: Expecting 514560 events.
[13:30:53.601] <TB2> INFO: 514560 events read in total (9283ms).
[13:30:53.615] <TB2> INFO: Expecting 514560 events.
[13:31:03.112] <TB2> INFO: 514560 events read in total (8835ms).
[13:31:03.129] <TB2> INFO: Expecting 514560 events.
[13:31:13.031] <TB2> INFO: 514560 events read in total (9245ms).
[13:31:13.049] <TB2> INFO: Expecting 514560 events.
[13:31:23.102] <TB2> INFO: 514560 events read in total (9393ms).
[13:31:23.124] <TB2> INFO: Expecting 514560 events.
[13:31:33.419] <TB2> INFO: 514560 events read in total (9647ms).
[13:31:33.446] <TB2> INFO: Expecting 514560 events.
[13:31:43.782] <TB2> INFO: 514560 events read in total (9689ms).
[13:31:43.805] <TB2> INFO: Expecting 514560 events.
[13:31:53.493] <TB2> INFO: 514560 events read in total (9033ms).
[13:31:53.519] <TB2> INFO: Expecting 514560 events.
[13:32:03.575] <TB2> INFO: 514560 events read in total (9399ms).
[13:32:03.608] <TB2> INFO: Expecting 514560 events.
[13:32:12.957] <TB2> INFO: 514560 events read in total (8717ms).
[13:32:12.988] <TB2> INFO: Expecting 514560 events.
[13:32:22.741] <TB2> INFO: 514560 events read in total (9105ms).
[13:32:22.773] <TB2> INFO: Expecting 514560 events.
[13:32:31.945] <TB2> INFO: 514560 events read in total (8528ms).
[13:32:31.982] <TB2> INFO: Test took 159311ms.
[13:32:33.164] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:32:33.172] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:32:33.175] <TB2> INFO: run 1 of 1
[13:32:33.509] <TB2> INFO: Expecting 6281600 events.
[13:33:08.873] <TB2> INFO: 868070 events read in total (34649ms).
[13:33:44.346] <TB2> INFO: 1734170 events read in total (70122ms).
[13:34:20.567] <TB2> INFO: 2601400 events read in total (106343ms).
[13:34:56.148] <TB2> INFO: 3465360 events read in total (141924ms).
[13:35:30.763] <TB2> INFO: 4322880 events read in total (176539ms).
[13:36:04.651] <TB2> INFO: 5177320 events read in total (210427ms).
[13:36:40.583] <TB2> INFO: 6031670 events read in total (246359ms).
[13:36:51.199] <TB2> INFO: 6281600 events read in total (256975ms).
[13:36:51.260] <TB2> INFO: Test took 258085ms.
[13:36:51.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:16.090] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.022134 .. 255.000000
[13:37:16.180] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[13:37:16.188] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:37:16.188] <TB2> INFO: run 1 of 1
[13:37:16.502] <TB2> INFO: Expecting 10649600 events.
[13:37:49.659] <TB2> INFO: 826320 events read in total (32438ms).
[13:38:24.533] <TB2> INFO: 1653110 events read in total (67312ms).
[13:39:00.266] <TB2> INFO: 2480070 events read in total (103045ms).
[13:39:36.005] <TB2> INFO: 3307040 events read in total (138784ms).
[13:40:10.890] <TB2> INFO: 4134150 events read in total (173669ms).
[13:40:45.817] <TB2> INFO: 4961550 events read in total (208596ms).
[13:41:19.017] <TB2> INFO: 5787960 events read in total (241796ms).
[13:41:52.980] <TB2> INFO: 6613860 events read in total (275759ms).
[13:42:27.544] <TB2> INFO: 7439030 events read in total (310323ms).
[13:43:02.026] <TB2> INFO: 8263690 events read in total (344805ms).
[13:43:38.795] <TB2> INFO: 9087990 events read in total (381574ms).
[13:44:13.782] <TB2> INFO: 9913010 events read in total (416561ms).
[13:44:45.339] <TB2> INFO: 10649600 events read in total (448118ms).
[13:44:45.436] <TB2> INFO: Test took 449249ms.
[13:44:45.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:14.215] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.130858 .. 44.434302
[13:45:14.295] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 5 .. 54 (-1/-1) hits flags = 528 (plus default)
[13:45:14.303] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:45:14.303] <TB2> INFO: run 1 of 1
[13:45:14.611] <TB2> INFO: Expecting 2080000 events.
[13:45:56.042] <TB2> INFO: 1178320 events read in total (40712ms).
[13:46:25.188] <TB2> INFO: 2080000 events read in total (69858ms).
[13:46:25.212] <TB2> INFO: Test took 70910ms.
[13:46:25.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:38.731] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.011956 .. 42.237911
[13:46:38.810] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 1 .. 52 (-1/-1) hits flags = 528 (plus default)
[13:46:38.818] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:46:38.818] <TB2> INFO: run 1 of 1
[13:46:39.141] <TB2> INFO: Expecting 2163200 events.
[13:47:24.579] <TB2> INFO: 1236040 events read in total (44723ms).
[13:47:57.738] <TB2> INFO: 2163200 events read in total (77882ms).
[13:47:57.752] <TB2> INFO: Test took 78934ms.
[13:47:57.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:10.459] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.011956 .. 41.116432
[13:48:10.552] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 51 (-1/-1) hits flags = 528 (plus default)
[13:48:10.560] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:48:10.560] <TB2> INFO: run 1 of 1
[13:48:10.887] <TB2> INFO: Expecting 2121600 events.
[13:48:49.667] <TB2> INFO: 1251590 events read in total (38065ms).
[13:49:19.960] <TB2> INFO: 2121600 events read in total (68358ms).
[13:49:19.973] <TB2> INFO: Test took 69414ms.
[13:49:20.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:32.899] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:49:32.899] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:49:32.907] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:49:32.907] <TB2> INFO: run 1 of 1
[13:49:33.245] <TB2> INFO: Expecting 1705600 events.
[13:50:16.181] <TB2> INFO: 1074670 events read in total (42221ms).
[13:50:42.090] <TB2> INFO: 1705600 events read in total (68130ms).
[13:50:42.101] <TB2> INFO: Test took 69193ms.
[13:50:42.130] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:56.789] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C0.dat
[13:50:56.789] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C1.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C2.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C3.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C4.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C5.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C6.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C7.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C8.dat
[13:50:56.790] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C9.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C10.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C11.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C12.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C13.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C14.dat
[13:50:56.791] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C15.dat
[13:50:56.791] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C0.dat
[13:50:56.799] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C1.dat
[13:50:56.805] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C2.dat
[13:50:56.811] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C3.dat
[13:50:56.816] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C4.dat
[13:50:56.822] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C5.dat
[13:50:56.828] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C6.dat
[13:50:56.834] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C7.dat
[13:50:56.840] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C8.dat
[13:50:56.846] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C9.dat
[13:50:56.852] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C10.dat
[13:50:56.858] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C11.dat
[13:50:56.864] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C12.dat
[13:50:56.871] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C13.dat
[13:50:56.877] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C14.dat
[13:50:56.883] <TB2> INFO: write trim parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//trimParameters35_C15.dat
[13:50:56.889] <TB2> INFO: PixTestTrim::trimTest() done
[13:50:56.889] <TB2> INFO: vtrim: 101 116 99 100 102 98 113 96 107 118 110 92 103 94 105 102
[13:50:56.889] <TB2> INFO: vthrcomp: 89 94 82 95 98 95 102 101 88 92 88 86 89 93 94 92
[13:50:56.889] <TB2> INFO: vcal mean: 34.95 34.96 34.99 34.77 34.99 34.93 35.03 34.95 34.89 34.97 34.98 34.98 35.02 34.93 34.94 34.94
[13:50:56.889] <TB2> INFO: vcal RMS: 1.00 1.07 0.84 1.06 0.83 0.88 0.88 1.20 1.17 1.06 1.09 1.09 0.83 0.88 1.62 1.26
[13:50:56.889] <TB2> INFO: bits mean: 9.53 9.37 9.75 9.78 9.16 9.42 9.40 9.61 9.70 9.24 7.73 9.46 9.38 9.56 9.72 9.56
[13:50:56.889] <TB2> INFO: bits RMS: 2.53 2.63 2.58 2.61 2.87 2.85 2.60 2.71 2.58 2.68 2.44 2.68 2.62 2.60 2.51 2.68
[13:50:56.898] <TB2> INFO: ----------------------------------------------------------------------
[13:50:56.898] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:50:56.898] <TB2> INFO: ----------------------------------------------------------------------
[13:50:56.903] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:50:56.911] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:50:56.911] <TB2> INFO: run 1 of 1
[13:50:57.218] <TB2> INFO: Expecting 8320000 events.
[13:51:44.971] <TB2> INFO: 1161980 events read in total (47037ms).
[13:52:29.154] <TB2> INFO: 2313830 events read in total (91221ms).
[13:53:13.603] <TB2> INFO: 3463550 events read in total (135669ms).
[13:53:58.720] <TB2> INFO: 4605800 events read in total (180786ms).
[13:54:43.148] <TB2> INFO: 5739570 events read in total (225214ms).
[13:55:28.011] <TB2> INFO: 6871950 events read in total (270077ms).
[13:56:12.877] <TB2> INFO: 8007130 events read in total (314943ms).
[13:56:25.317] <TB2> INFO: 8320000 events read in total (327383ms).
[13:56:25.365] <TB2> INFO: Test took 328455ms.
[13:56:25.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:54.049] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 174 (-1/-1) hits flags = 528 (plus default)
[13:56:54.057] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:56:54.058] <TB2> INFO: run 1 of 1
[13:56:54.368] <TB2> INFO: Expecting 7280000 events.
[13:57:41.342] <TB2> INFO: 1193880 events read in total (46259ms).
[13:58:26.311] <TB2> INFO: 2376210 events read in total (91228ms).
[13:59:11.673] <TB2> INFO: 3555400 events read in total (136590ms).
[13:59:56.504] <TB2> INFO: 4719170 events read in total (181421ms).
[14:00:41.820] <TB2> INFO: 5878540 events read in total (226737ms).
[14:01:26.631] <TB2> INFO: 7040280 events read in total (271548ms).
[14:01:35.987] <TB2> INFO: 7280000 events read in total (280904ms).
[14:01:36.023] <TB2> INFO: Test took 281965ms.
[14:01:36.111] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:01.797] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 159 (-1/-1) hits flags = 528 (plus default)
[14:02:01.805] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:02:01.805] <TB2> INFO: run 1 of 1
[14:02:02.122] <TB2> INFO: Expecting 6656000 events.
[14:02:48.855] <TB2> INFO: 1259820 events read in total (46018ms).
[14:03:36.524] <TB2> INFO: 2506180 events read in total (93687ms).
[14:04:22.912] <TB2> INFO: 3741900 events read in total (140075ms).
[14:05:08.942] <TB2> INFO: 4962220 events read in total (186105ms).
[14:05:49.050] <TB2> INFO: 6182220 events read in total (226213ms).
[14:06:05.664] <TB2> INFO: 6656000 events read in total (242827ms).
[14:06:05.704] <TB2> INFO: Test took 243899ms.
[14:06:05.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:30.042] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[14:06:30.050] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:06:30.050] <TB2> INFO: run 1 of 1
[14:06:30.382] <TB2> INFO: Expecting 6572800 events.
[14:07:10.080] <TB2> INFO: 1268780 events read in total (38983ms).
[14:07:48.538] <TB2> INFO: 2523040 events read in total (77441ms).
[14:08:28.541] <TB2> INFO: 3765420 events read in total (117445ms).
[14:09:06.971] <TB2> INFO: 4994220 events read in total (155874ms).
[14:09:45.863] <TB2> INFO: 6221920 events read in total (194766ms).
[14:09:58.679] <TB2> INFO: 6572800 events read in total (207583ms).
[14:09:58.719] <TB2> INFO: Test took 208669ms.
[14:09:58.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:22.352] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[14:10:22.360] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[14:10:22.360] <TB2> INFO: run 1 of 1
[14:10:22.666] <TB2> INFO: Expecting 6572800 events.
[14:11:06.061] <TB2> INFO: 1267120 events read in total (42680ms).
[14:11:48.441] <TB2> INFO: 2519910 events read in total (85060ms).
[14:12:30.714] <TB2> INFO: 3760670 events read in total (127333ms).
[14:13:09.053] <TB2> INFO: 4987960 events read in total (165672ms).
[14:13:48.919] <TB2> INFO: 6214950 events read in total (205538ms).
[14:14:00.879] <TB2> INFO: 6572800 events read in total (217498ms).
[14:14:00.909] <TB2> INFO: Test took 218549ms.
[14:14:00.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:23.701] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:14:23.702] <TB2> INFO: PixTestTrim::doTest() done, duration: 3232 seconds
[14:14:23.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:23.702] <TB2> INFO: Decoding statistics:
[14:14:23.702] <TB2> INFO: General information:
[14:14:23.702] <TB2> INFO: 16bit words read: 0
[14:14:23.702] <TB2> INFO: valid events total: 0
[14:14:23.702] <TB2> INFO: empty events: 0
[14:14:23.702] <TB2> INFO: valid events with pixels: 0
[14:14:23.702] <TB2> INFO: valid pixel hits: 0
[14:14:23.702] <TB2> INFO: Event errors: 0
[14:14:23.702] <TB2> INFO: start marker: 0
[14:14:23.702] <TB2> INFO: stop marker: 0
[14:14:23.702] <TB2> INFO: overflow: 0
[14:14:23.702] <TB2> INFO: invalid 5bit words: 0
[14:14:23.702] <TB2> INFO: invalid XOR eye diagram: 0
[14:14:23.702] <TB2> INFO: TBM errors: 0
[14:14:23.702] <TB2> INFO: flawed TBM headers: 0
[14:14:23.702] <TB2> INFO: flawed TBM trailers: 0
[14:14:23.703] <TB2> INFO: event ID mismatches: 0
[14:14:23.703] <TB2> INFO: ROC errors: 0
[14:14:23.703] <TB2> INFO: missing ROC header(s): 0
[14:14:23.703] <TB2> INFO: misplaced readback start: 0
[14:14:23.703] <TB2> INFO: Pixel decoding errors: 0
[14:14:23.703] <TB2> INFO: pixel data incomplete: 0
[14:14:23.703] <TB2> INFO: pixel address: 0
[14:14:23.703] <TB2> INFO: pulse height fill bit: 0
[14:14:23.703] <TB2> INFO: buffer corruption: 0
[14:14:24.396] <TB2> INFO: ######################################################################
[14:14:24.396] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:14:24.396] <TB2> INFO: ######################################################################
[14:14:24.708] <TB2> INFO: Expecting 41600 events.
[14:14:28.756] <TB2> INFO: 41600 events read in total (3333ms).
[14:14:28.756] <TB2> INFO: Test took 4358ms.
[14:14:28.762] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:29.437] <TB2> INFO: Expecting 41600 events.
[14:14:33.567] <TB2> INFO: 41600 events read in total (3415ms).
[14:14:33.567] <TB2> INFO: Test took 4449ms.
[14:14:33.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:34.004] <TB2> INFO: Expecting 41600 events.
[14:14:38.149] <TB2> INFO: 41600 events read in total (3430ms).
[14:14:38.149] <TB2> INFO: Test took 4469ms.
[14:14:38.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:38.594] <TB2> INFO: Expecting 2560 events.
[14:14:39.554] <TB2> INFO: 2560 events read in total (245ms).
[14:14:39.554] <TB2> INFO: Test took 1392ms.
[14:14:40.063] <TB2> INFO: Expecting 2560 events.
[14:14:41.049] <TB2> INFO: 2560 events read in total (271ms).
[14:14:41.049] <TB2> INFO: Test took 1495ms.
[14:14:41.558] <TB2> INFO: Expecting 2560 events.
[14:14:42.530] <TB2> INFO: 2560 events read in total (257ms).
[14:14:42.530] <TB2> INFO: Test took 1481ms.
[14:14:43.039] <TB2> INFO: Expecting 2560 events.
[14:14:43.997] <TB2> INFO: 2560 events read in total (243ms).
[14:14:43.998] <TB2> INFO: Test took 1468ms.
[14:14:44.506] <TB2> INFO: Expecting 2560 events.
[14:14:45.464] <TB2> INFO: 2560 events read in total (243ms).
[14:14:45.465] <TB2> INFO: Test took 1467ms.
[14:14:45.974] <TB2> INFO: Expecting 2560 events.
[14:14:46.932] <TB2> INFO: 2560 events read in total (243ms).
[14:14:46.932] <TB2> INFO: Test took 1467ms.
[14:14:47.441] <TB2> INFO: Expecting 2560 events.
[14:14:48.428] <TB2> INFO: 2560 events read in total (272ms).
[14:14:48.428] <TB2> INFO: Test took 1495ms.
[14:14:48.937] <TB2> INFO: Expecting 2560 events.
[14:14:49.895] <TB2> INFO: 2560 events read in total (243ms).
[14:14:49.895] <TB2> INFO: Test took 1466ms.
[14:14:50.404] <TB2> INFO: Expecting 2560 events.
[14:14:51.376] <TB2> INFO: 2560 events read in total (256ms).
[14:14:51.377] <TB2> INFO: Test took 1481ms.
[14:14:51.886] <TB2> INFO: Expecting 2560 events.
[14:14:52.843] <TB2> INFO: 2560 events read in total (242ms).
[14:14:52.843] <TB2> INFO: Test took 1466ms.
[14:14:53.352] <TB2> INFO: Expecting 2560 events.
[14:14:54.311] <TB2> INFO: 2560 events read in total (244ms).
[14:14:54.311] <TB2> INFO: Test took 1467ms.
[14:14:54.820] <TB2> INFO: Expecting 2560 events.
[14:14:55.793] <TB2> INFO: 2560 events read in total (258ms).
[14:14:55.793] <TB2> INFO: Test took 1482ms.
[14:14:56.302] <TB2> INFO: Expecting 2560 events.
[14:14:57.259] <TB2> INFO: 2560 events read in total (242ms).
[14:14:57.259] <TB2> INFO: Test took 1465ms.
[14:14:57.768] <TB2> INFO: Expecting 2560 events.
[14:14:58.730] <TB2> INFO: 2560 events read in total (247ms).
[14:14:58.731] <TB2> INFO: Test took 1471ms.
[14:14:59.240] <TB2> INFO: Expecting 2560 events.
[14:15:00.217] <TB2> INFO: 2560 events read in total (262ms).
[14:15:00.217] <TB2> INFO: Test took 1485ms.
[14:15:00.726] <TB2> INFO: Expecting 2560 events.
[14:15:01.697] <TB2> INFO: 2560 events read in total (256ms).
[14:15:01.698] <TB2> INFO: Test took 1481ms.
[14:15:01.702] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:02.208] <TB2> INFO: Expecting 655360 events.
[14:15:14.225] <TB2> INFO: 655360 events read in total (11302ms).
[14:15:14.235] <TB2> INFO: Expecting 655360 events.
[14:15:26.818] <TB2> INFO: 655360 events read in total (11986ms).
[14:15:26.832] <TB2> INFO: Expecting 655360 events.
[14:15:40.663] <TB2> INFO: 655360 events read in total (13245ms).
[14:15:40.683] <TB2> INFO: Expecting 655360 events.
[14:15:55.093] <TB2> INFO: 655360 events read in total (13837ms).
[14:15:55.122] <TB2> INFO: Expecting 655360 events.
[14:16:06.771] <TB2> INFO: 655360 events read in total (11122ms).
[14:16:06.797] <TB2> INFO: Expecting 655360 events.
[14:16:20.750] <TB2> INFO: 655360 events read in total (13381ms).
[14:16:20.776] <TB2> INFO: Expecting 655360 events.
[14:16:34.925] <TB2> INFO: 655360 events read in total (13561ms).
[14:16:34.954] <TB2> INFO: Expecting 655360 events.
[14:16:48.128] <TB2> INFO: 655360 events read in total (12590ms).
[14:16:48.170] <TB2> INFO: Expecting 655360 events.
[14:17:00.528] <TB2> INFO: 655360 events read in total (11812ms).
[14:17:00.566] <TB2> INFO: Expecting 655360 events.
[14:17:14.190] <TB2> INFO: 655360 events read in total (13052ms).
[14:17:14.232] <TB2> INFO: Expecting 655360 events.
[14:17:27.305] <TB2> INFO: 655360 events read in total (12500ms).
[14:17:27.356] <TB2> INFO: Expecting 655360 events.
[14:17:38.820] <TB2> INFO: 655360 events read in total (10903ms).
[14:17:38.868] <TB2> INFO: Expecting 655360 events.
[14:17:50.430] <TB2> INFO: 655360 events read in total (10997ms).
[14:17:50.483] <TB2> INFO: Expecting 655360 events.
[14:18:03.030] <TB2> INFO: 655360 events read in total (11986ms).
[14:18:03.085] <TB2> INFO: Expecting 655360 events.
[14:18:15.117] <TB2> INFO: 655360 events read in total (11477ms).
[14:18:15.193] <TB2> INFO: Expecting 655360 events.
[14:18:27.327] <TB2> INFO: 655360 events read in total (11607ms).
[14:18:27.391] <TB2> INFO: Test took 205689ms.
[14:18:27.474] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:18:27.780] <TB2> INFO: Expecting 655360 events.
[14:18:40.887] <TB2> INFO: 655360 events read in total (12391ms).
[14:18:40.897] <TB2> INFO: Expecting 655360 events.
[14:18:53.232] <TB2> INFO: 655360 events read in total (11744ms).
[14:18:53.249] <TB2> INFO: Expecting 655360 events.
[14:19:05.686] <TB2> INFO: 655360 events read in total (11851ms).
[14:19:05.703] <TB2> INFO: Expecting 655360 events.
[14:19:18.488] <TB2> INFO: 655360 events read in total (12188ms).
[14:19:18.510] <TB2> INFO: Expecting 655360 events.
[14:19:31.661] <TB2> INFO: 655360 events read in total (12572ms).
[14:19:31.684] <TB2> INFO: Expecting 655360 events.
[14:19:44.953] <TB2> INFO: 655360 events read in total (12680ms).
[14:19:44.980] <TB2> INFO: Expecting 655360 events.
[14:19:58.063] <TB2> INFO: 655360 events read in total (12509ms).
[14:19:58.094] <TB2> INFO: Expecting 655360 events.
[14:20:11.355] <TB2> INFO: 655360 events read in total (12680ms).
[14:20:11.391] <TB2> INFO: Expecting 655360 events.
[14:20:24.018] <TB2> INFO: 655360 events read in total (12058ms).
[14:20:24.059] <TB2> INFO: Expecting 655360 events.
[14:20:36.847] <TB2> INFO: 655360 events read in total (12228ms).
[14:20:36.891] <TB2> INFO: Expecting 655360 events.
[14:20:52.535] <TB2> INFO: 655360 events read in total (15068ms).
[14:20:52.587] <TB2> INFO: Expecting 655360 events.
[14:21:07.878] <TB2> INFO: 655360 events read in total (14741ms).
[14:21:07.926] <TB2> INFO: Expecting 655360 events.
[14:21:22.831] <TB2> INFO: 655360 events read in total (14338ms).
[14:21:22.886] <TB2> INFO: Expecting 655360 events.
[14:21:37.876] <TB2> INFO: 655360 events read in total (14435ms).
[14:21:37.929] <TB2> INFO: Expecting 655360 events.
[14:21:52.846] <TB2> INFO: 655360 events read in total (14376ms).
[14:21:52.908] <TB2> INFO: Expecting 655360 events.
[14:22:08.174] <TB2> INFO: 655360 events read in total (14716ms).
[14:22:08.236] <TB2> INFO: Test took 220762ms.
[14:22:08.428] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.435] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.442] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.449] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.456] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.463] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.469] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.476] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.483] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.490] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.497] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.503] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.510] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.517] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.524] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.530] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:22:08.537] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:22:08.544] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:22:08.604] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C0.dat
[14:22:08.604] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C1.dat
[14:22:08.604] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C2.dat
[14:22:08.604] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C3.dat
[14:22:08.604] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C4.dat
[14:22:08.605] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C5.dat
[14:22:08.605] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C6.dat
[14:22:08.605] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C7.dat
[14:22:08.605] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C8.dat
[14:22:08.605] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C9.dat
[14:22:08.612] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C10.dat
[14:22:08.613] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C11.dat
[14:22:08.613] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C12.dat
[14:22:08.613] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C13.dat
[14:22:08.613] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C14.dat
[14:22:08.613] <TB2> INFO: write dac parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//dacParameters35_C15.dat
[14:22:08.935] <TB2> INFO: Expecting 41600 events.
[14:22:13.292] <TB2> INFO: 41600 events read in total (3642ms).
[14:22:13.293] <TB2> INFO: Test took 4675ms.
[14:22:13.950] <TB2> INFO: Expecting 41600 events.
[14:22:18.219] <TB2> INFO: 41600 events read in total (3554ms).
[14:22:18.219] <TB2> INFO: Test took 4589ms.
[14:22:18.877] <TB2> INFO: Expecting 41600 events.
[14:22:23.071] <TB2> INFO: 41600 events read in total (3478ms).
[14:22:23.072] <TB2> INFO: Test took 4519ms.
[14:22:23.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:23.545] <TB2> INFO: Expecting 2560 events.
[14:22:24.537] <TB2> INFO: 2560 events read in total (276ms).
[14:22:24.538] <TB2> INFO: Test took 1126ms.
[14:22:24.546] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:25.049] <TB2> INFO: Expecting 2560 events.
[14:22:26.030] <TB2> INFO: 2560 events read in total (265ms).
[14:22:26.030] <TB2> INFO: Test took 1484ms.
[14:22:26.035] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:26.539] <TB2> INFO: Expecting 2560 events.
[14:22:27.516] <TB2> INFO: 2560 events read in total (261ms).
[14:22:27.516] <TB2> INFO: Test took 1481ms.
[14:22:27.518] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:28.026] <TB2> INFO: Expecting 2560 events.
[14:22:29.004] <TB2> INFO: 2560 events read in total (263ms).
[14:22:29.004] <TB2> INFO: Test took 1486ms.
[14:22:29.008] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:29.515] <TB2> INFO: Expecting 2560 events.
[14:22:30.478] <TB2> INFO: 2560 events read in total (247ms).
[14:22:30.479] <TB2> INFO: Test took 1471ms.
[14:22:30.483] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:30.990] <TB2> INFO: Expecting 2560 events.
[14:22:31.953] <TB2> INFO: 2560 events read in total (248ms).
[14:22:31.953] <TB2> INFO: Test took 1470ms.
[14:22:31.957] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:32.464] <TB2> INFO: Expecting 2560 events.
[14:22:33.428] <TB2> INFO: 2560 events read in total (248ms).
[14:22:33.429] <TB2> INFO: Test took 1472ms.
[14:22:33.432] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:33.939] <TB2> INFO: Expecting 2560 events.
[14:22:34.899] <TB2> INFO: 2560 events read in total (245ms).
[14:22:34.899] <TB2> INFO: Test took 1467ms.
[14:22:34.902] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:35.411] <TB2> INFO: Expecting 2560 events.
[14:22:36.374] <TB2> INFO: 2560 events read in total (248ms).
[14:22:36.375] <TB2> INFO: Test took 1473ms.
[14:22:36.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:36.884] <TB2> INFO: Expecting 2560 events.
[14:22:37.842] <TB2> INFO: 2560 events read in total (243ms).
[14:22:37.843] <TB2> INFO: Test took 1465ms.
[14:22:37.845] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:38.354] <TB2> INFO: Expecting 2560 events.
[14:22:39.344] <TB2> INFO: 2560 events read in total (275ms).
[14:22:39.344] <TB2> INFO: Test took 1499ms.
[14:22:39.348] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:39.854] <TB2> INFO: Expecting 2560 events.
[14:22:40.844] <TB2> INFO: 2560 events read in total (274ms).
[14:22:40.844] <TB2> INFO: Test took 1496ms.
[14:22:40.851] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:41.356] <TB2> INFO: Expecting 2560 events.
[14:22:42.320] <TB2> INFO: 2560 events read in total (248ms).
[14:22:42.321] <TB2> INFO: Test took 1470ms.
[14:22:42.324] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:42.832] <TB2> INFO: Expecting 2560 events.
[14:22:43.795] <TB2> INFO: 2560 events read in total (248ms).
[14:22:43.796] <TB2> INFO: Test took 1472ms.
[14:22:43.799] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:44.307] <TB2> INFO: Expecting 2560 events.
[14:22:45.299] <TB2> INFO: 2560 events read in total (276ms).
[14:22:45.300] <TB2> INFO: Test took 1501ms.
[14:22:45.303] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:45.811] <TB2> INFO: Expecting 2560 events.
[14:22:46.774] <TB2> INFO: 2560 events read in total (247ms).
[14:22:46.775] <TB2> INFO: Test took 1472ms.
[14:22:46.778] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:47.286] <TB2> INFO: Expecting 2560 events.
[14:22:48.265] <TB2> INFO: 2560 events read in total (264ms).
[14:22:48.266] <TB2> INFO: Test took 1489ms.
[14:22:48.269] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:48.775] <TB2> INFO: Expecting 2560 events.
[14:22:49.752] <TB2> INFO: 2560 events read in total (262ms).
[14:22:49.752] <TB2> INFO: Test took 1483ms.
[14:22:49.755] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:50.263] <TB2> INFO: Expecting 2560 events.
[14:22:51.236] <TB2> INFO: 2560 events read in total (258ms).
[14:22:51.236] <TB2> INFO: Test took 1481ms.
[14:22:51.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:51.747] <TB2> INFO: Expecting 2560 events.
[14:22:52.742] <TB2> INFO: 2560 events read in total (279ms).
[14:22:52.742] <TB2> INFO: Test took 1503ms.
[14:22:52.746] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:53.252] <TB2> INFO: Expecting 2560 events.
[14:22:54.216] <TB2> INFO: 2560 events read in total (248ms).
[14:22:54.216] <TB2> INFO: Test took 1470ms.
[14:22:54.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:54.727] <TB2> INFO: Expecting 2560 events.
[14:22:55.690] <TB2> INFO: 2560 events read in total (247ms).
[14:22:55.691] <TB2> INFO: Test took 1472ms.
[14:22:55.694] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:56.202] <TB2> INFO: Expecting 2560 events.
[14:22:57.165] <TB2> INFO: 2560 events read in total (247ms).
[14:22:57.166] <TB2> INFO: Test took 1472ms.
[14:22:57.169] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:57.677] <TB2> INFO: Expecting 2560 events.
[14:22:58.655] <TB2> INFO: 2560 events read in total (262ms).
[14:22:58.656] <TB2> INFO: Test took 1487ms.
[14:22:58.659] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:59.166] <TB2> INFO: Expecting 2560 events.
[14:23:00.141] <TB2> INFO: 2560 events read in total (259ms).
[14:23:00.141] <TB2> INFO: Test took 1482ms.
[14:23:00.144] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:00.650] <TB2> INFO: Expecting 2560 events.
[14:23:01.627] <TB2> INFO: 2560 events read in total (261ms).
[14:23:01.628] <TB2> INFO: Test took 1484ms.
[14:23:01.630] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:02.138] <TB2> INFO: Expecting 2560 events.
[14:23:03.142] <TB2> INFO: 2560 events read in total (288ms).
[14:23:03.142] <TB2> INFO: Test took 1512ms.
[14:23:03.146] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:03.652] <TB2> INFO: Expecting 2560 events.
[14:23:04.613] <TB2> INFO: 2560 events read in total (246ms).
[14:23:04.614] <TB2> INFO: Test took 1469ms.
[14:23:04.617] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:05.124] <TB2> INFO: Expecting 2560 events.
[14:23:06.118] <TB2> INFO: 2560 events read in total (278ms).
[14:23:06.119] <TB2> INFO: Test took 1503ms.
[14:23:06.123] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:06.629] <TB2> INFO: Expecting 2560 events.
[14:23:07.588] <TB2> INFO: 2560 events read in total (243ms).
[14:23:07.588] <TB2> INFO: Test took 1466ms.
[14:23:07.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:08.100] <TB2> INFO: Expecting 2560 events.
[14:23:09.064] <TB2> INFO: 2560 events read in total (248ms).
[14:23:09.064] <TB2> INFO: Test took 1473ms.
[14:23:09.068] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:09.576] <TB2> INFO: Expecting 2560 events.
[14:23:10.569] <TB2> INFO: 2560 events read in total (278ms).
[14:23:10.569] <TB2> INFO: Test took 1501ms.
[14:23:11.347] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 526 seconds
[14:23:11.347] <TB2> INFO: PH scale (per ROC): 79 74 89 79 73 89 81 82 76 80 71 77 86 80 80 81
[14:23:11.347] <TB2> INFO: PH offset (per ROC): 153 163 157 170 158 166 156 163 159 150 165 176 149 149 165 155
[14:23:11.352] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:11.352] <TB2> INFO: Decoding statistics:
[14:23:11.352] <TB2> INFO: General information:
[14:23:11.352] <TB2> INFO: 16bit words read: 66446
[14:23:11.352] <TB2> INFO: valid events total: 5120
[14:23:11.352] <TB2> INFO: empty events: 2617
[14:23:11.352] <TB2> INFO: valid events with pixels: 2503
[14:23:11.352] <TB2> INFO: valid pixel hits: 2503
[14:23:11.352] <TB2> INFO: Event errors: 0
[14:23:11.352] <TB2> INFO: start marker: 0
[14:23:11.352] <TB2> INFO: stop marker: 0
[14:23:11.352] <TB2> INFO: overflow: 0
[14:23:11.352] <TB2> INFO: invalid 5bit words: 0
[14:23:11.352] <TB2> INFO: invalid XOR eye diagram: 0
[14:23:11.352] <TB2> INFO: TBM errors: 0
[14:23:11.352] <TB2> INFO: flawed TBM headers: 0
[14:23:11.352] <TB2> INFO: flawed TBM trailers: 0
[14:23:11.352] <TB2> INFO: event ID mismatches: 0
[14:23:11.352] <TB2> INFO: ROC errors: 0
[14:23:11.352] <TB2> INFO: missing ROC header(s): 0
[14:23:11.352] <TB2> INFO: misplaced readback start: 0
[14:23:11.352] <TB2> INFO: Pixel decoding errors: 0
[14:23:11.352] <TB2> INFO: pixel data incomplete: 0
[14:23:11.352] <TB2> INFO: pixel address: 0
[14:23:11.352] <TB2> INFO: pulse height fill bit: 0
[14:23:11.352] <TB2> INFO: buffer corruption: 0
[14:23:11.524] <TB2> INFO: ######################################################################
[14:23:11.524] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:23:11.524] <TB2> INFO: ######################################################################
[14:23:11.534] <TB2> INFO: scanning low vcal = 10
[14:23:11.843] <TB2> INFO: Expecting 41600 events.
[14:23:15.767] <TB2> INFO: 41600 events read in total (3209ms).
[14:23:15.767] <TB2> INFO: Test took 4234ms.
[14:23:15.770] <TB2> INFO: scanning low vcal = 20
[14:23:16.278] <TB2> INFO: Expecting 41600 events.
[14:23:20.121] <TB2> INFO: 41600 events read in total (3128ms).
[14:23:20.121] <TB2> INFO: Test took 4351ms.
[14:23:20.123] <TB2> INFO: scanning low vcal = 30
[14:23:20.632] <TB2> INFO: Expecting 41600 events.
[14:23:24.481] <TB2> INFO: 41600 events read in total (3133ms).
[14:23:24.482] <TB2> INFO: Test took 4359ms.
[14:23:24.484] <TB2> INFO: scanning low vcal = 40
[14:23:24.980] <TB2> INFO: Expecting 41600 events.
[14:23:29.504] <TB2> INFO: 41600 events read in total (3809ms).
[14:23:29.505] <TB2> INFO: Test took 5021ms.
[14:23:29.509] <TB2> INFO: scanning low vcal = 50
[14:23:29.957] <TB2> INFO: Expecting 41600 events.
[14:23:34.849] <TB2> INFO: 41600 events read in total (4177ms).
[14:23:34.850] <TB2> INFO: Test took 5341ms.
[14:23:34.853] <TB2> INFO: scanning low vcal = 60
[14:23:35.304] <TB2> INFO: Expecting 41600 events.
[14:23:39.958] <TB2> INFO: 41600 events read in total (3938ms).
[14:23:39.959] <TB2> INFO: Test took 5106ms.
[14:23:39.962] <TB2> INFO: scanning low vcal = 70
[14:23:40.407] <TB2> INFO: Expecting 41600 events.
[14:23:45.057] <TB2> INFO: 41600 events read in total (3935ms).
[14:23:45.057] <TB2> INFO: Test took 5095ms.
[14:23:45.061] <TB2> INFO: scanning low vcal = 80
[14:23:45.507] <TB2> INFO: Expecting 41600 events.
[14:23:50.168] <TB2> INFO: 41600 events read in total (3945ms).
[14:23:50.168] <TB2> INFO: Test took 5107ms.
[14:23:50.173] <TB2> INFO: scanning low vcal = 90
[14:23:50.620] <TB2> INFO: Expecting 41600 events.
[14:23:55.245] <TB2> INFO: 41600 events read in total (3909ms).
[14:23:55.246] <TB2> INFO: Test took 5073ms.
[14:23:55.252] <TB2> INFO: scanning low vcal = 100
[14:23:55.697] <TB2> INFO: Expecting 41600 events.
[14:24:00.700] <TB2> INFO: 41600 events read in total (4287ms).
[14:24:00.700] <TB2> INFO: Test took 5448ms.
[14:24:00.704] <TB2> INFO: scanning low vcal = 110
[14:24:01.151] <TB2> INFO: Expecting 41600 events.
[14:24:05.898] <TB2> INFO: 41600 events read in total (4031ms).
[14:24:05.899] <TB2> INFO: Test took 5195ms.
[14:24:05.902] <TB2> INFO: scanning low vcal = 120
[14:24:06.342] <TB2> INFO: Expecting 41600 events.
[14:24:11.224] <TB2> INFO: 41600 events read in total (4166ms).
[14:24:11.224] <TB2> INFO: Test took 5322ms.
[14:24:11.228] <TB2> INFO: scanning low vcal = 130
[14:24:11.653] <TB2> INFO: Expecting 41600 events.
[14:24:16.252] <TB2> INFO: 41600 events read in total (3883ms).
[14:24:16.252] <TB2> INFO: Test took 5024ms.
[14:24:16.255] <TB2> INFO: scanning low vcal = 140
[14:24:16.702] <TB2> INFO: Expecting 41600 events.
[14:24:21.601] <TB2> INFO: 41600 events read in total (4184ms).
[14:24:21.602] <TB2> INFO: Test took 5347ms.
[14:24:21.605] <TB2> INFO: scanning low vcal = 150
[14:24:22.048] <TB2> INFO: Expecting 41600 events.
[14:24:26.803] <TB2> INFO: 41600 events read in total (4040ms).
[14:24:26.803] <TB2> INFO: Test took 5198ms.
[14:24:26.807] <TB2> INFO: scanning low vcal = 160
[14:24:27.255] <TB2> INFO: Expecting 41600 events.
[14:24:32.028] <TB2> INFO: 41600 events read in total (4058ms).
[14:24:32.028] <TB2> INFO: Test took 5221ms.
[14:24:32.032] <TB2> INFO: scanning low vcal = 170
[14:24:32.469] <TB2> INFO: Expecting 41600 events.
[14:24:37.359] <TB2> INFO: 41600 events read in total (4174ms).
[14:24:37.359] <TB2> INFO: Test took 5327ms.
[14:24:37.364] <TB2> INFO: scanning low vcal = 180
[14:24:37.812] <TB2> INFO: Expecting 41600 events.
[14:24:42.513] <TB2> INFO: 41600 events read in total (3986ms).
[14:24:42.514] <TB2> INFO: Test took 5150ms.
[14:24:42.517] <TB2> INFO: scanning low vcal = 190
[14:24:42.953] <TB2> INFO: Expecting 41600 events.
[14:24:47.803] <TB2> INFO: 41600 events read in total (4135ms).
[14:24:47.804] <TB2> INFO: Test took 5287ms.
[14:24:47.807] <TB2> INFO: scanning low vcal = 200
[14:24:48.242] <TB2> INFO: Expecting 41600 events.
[14:24:53.143] <TB2> INFO: 41600 events read in total (4186ms).
[14:24:53.144] <TB2> INFO: Test took 5337ms.
[14:24:53.148] <TB2> INFO: scanning low vcal = 210
[14:24:53.579] <TB2> INFO: Expecting 41600 events.
[14:24:58.201] <TB2> INFO: 41600 events read in total (3907ms).
[14:24:58.202] <TB2> INFO: Test took 5054ms.
[14:24:58.205] <TB2> INFO: scanning low vcal = 220
[14:24:58.655] <TB2> INFO: Expecting 41600 events.
[14:25:03.418] <TB2> INFO: 41600 events read in total (4048ms).
[14:25:03.418] <TB2> INFO: Test took 5213ms.
[14:25:03.422] <TB2> INFO: scanning low vcal = 230
[14:25:03.864] <TB2> INFO: Expecting 41600 events.
[14:25:08.629] <TB2> INFO: 41600 events read in total (4050ms).
[14:25:08.630] <TB2> INFO: Test took 5208ms.
[14:25:08.633] <TB2> INFO: scanning low vcal = 240
[14:25:09.081] <TB2> INFO: Expecting 41600 events.
[14:25:13.949] <TB2> INFO: 41600 events read in total (4153ms).
[14:25:13.949] <TB2> INFO: Test took 5316ms.
[14:25:13.953] <TB2> INFO: scanning low vcal = 250
[14:25:14.406] <TB2> INFO: Expecting 41600 events.
[14:25:19.287] <TB2> INFO: 41600 events read in total (4166ms).
[14:25:19.287] <TB2> INFO: Test took 5334ms.
[14:25:19.294] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:25:19.718] <TB2> INFO: Expecting 41600 events.
[14:25:24.550] <TB2> INFO: 41600 events read in total (4116ms).
[14:25:24.550] <TB2> INFO: Test took 5256ms.
[14:25:24.554] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:25:24.996] <TB2> INFO: Expecting 41600 events.
[14:25:29.861] <TB2> INFO: 41600 events read in total (4150ms).
[14:25:29.861] <TB2> INFO: Test took 5307ms.
[14:25:29.865] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:25:30.306] <TB2> INFO: Expecting 41600 events.
[14:25:34.979] <TB2> INFO: 41600 events read in total (3957ms).
[14:25:34.980] <TB2> INFO: Test took 5115ms.
[14:25:34.990] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:25:35.435] <TB2> INFO: Expecting 41600 events.
[14:25:40.274] <TB2> INFO: 41600 events read in total (4123ms).
[14:25:40.274] <TB2> INFO: Test took 5284ms.
[14:25:40.291] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:25:40.720] <TB2> INFO: Expecting 41600 events.
[14:25:45.528] <TB2> INFO: 41600 events read in total (4092ms).
[14:25:45.529] <TB2> INFO: Test took 5238ms.
[14:25:46.006] <TB2> INFO: PixTestGainPedestal::measure() done
[14:26:23.832] <TB2> INFO: PixTestGainPedestal::fit() done
[14:26:23.832] <TB2> INFO: non-linearity mean: 0.952 0.961 0.958 0.953 0.951 0.958 0.961 0.957 0.949 0.952 0.953 0.956 0.964 0.953 0.957 0.952
[14:26:23.833] <TB2> INFO: non-linearity RMS: 0.007 0.006 0.006 0.006 0.006 0.006 0.005 0.005 0.007 0.006 0.010 0.006 0.006 0.006 0.005 0.006
[14:26:23.847] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:26:23.877] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:26:23.902] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:26:23.930] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:26:23.958] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:26:23.986] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:26:24.012] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:26:24.035] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:26:24.060] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:26:24.086] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:26:24.112] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:26:24.138] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:26:24.164] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:26:24.184] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:26:24.203] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:26:24.223] <TB2> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:26:24.243] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 192 seconds
[14:26:24.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:24.243] <TB2> INFO: Decoding statistics:
[14:26:24.243] <TB2> INFO: General information:
[14:26:24.243] <TB2> INFO: 16bit words read: 2329214
[14:26:24.243] <TB2> INFO: valid events total: 83200
[14:26:24.243] <TB2> INFO: empty events: 0
[14:26:24.243] <TB2> INFO: valid events with pixels: 83200
[14:26:24.243] <TB2> INFO: valid pixel hits: 665407
[14:26:24.243] <TB2> INFO: Event errors: 0
[14:26:24.243] <TB2> INFO: start marker: 0
[14:26:24.243] <TB2> INFO: stop marker: 0
[14:26:24.243] <TB2> INFO: overflow: 0
[14:26:24.243] <TB2> INFO: invalid 5bit words: 0
[14:26:24.243] <TB2> INFO: invalid XOR eye diagram: 0
[14:26:24.243] <TB2> INFO: TBM errors: 0
[14:26:24.243] <TB2> INFO: flawed TBM headers: 0
[14:26:24.243] <TB2> INFO: flawed TBM trailers: 0
[14:26:24.243] <TB2> INFO: event ID mismatches: 0
[14:26:24.243] <TB2> INFO: ROC errors: 0
[14:26:24.243] <TB2> INFO: missing ROC header(s): 0
[14:26:24.243] <TB2> INFO: misplaced readback start: 0
[14:26:24.243] <TB2> INFO: Pixel decoding errors: 0
[14:26:24.243] <TB2> INFO: pixel data incomplete: 0
[14:26:24.243] <TB2> INFO: pixel address: 0
[14:26:24.243] <TB2> INFO: pulse height fill bit: 0
[14:26:24.243] <TB2> INFO: buffer corruption: 0
[14:26:24.250] <TB2> INFO: readReadbackCal: /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C15.dat
[14:26:24.251] <TB2> INFO: ######################################################################
[14:26:24.251] <TB2> INFO: PixTestReadback::doTest()
[14:26:24.251] <TB2> INFO: ######################################################################
[14:26:24.252] <TB2> INFO: PixTestReadback::RES sent once
[14:26:35.582] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C0.dat
[14:26:35.582] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C1.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C2.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C3.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C4.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C5.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C6.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C7.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C8.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C9.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C10.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C11.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C12.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C13.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C14.dat
[14:26:35.583] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C15.dat
[14:26:35.631] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:26:35.631] <TB2> INFO: PixTestReadback::RES sent once
[14:26:46.889] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C0.dat
[14:26:46.889] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C1.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C2.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C3.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C4.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C5.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C6.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C7.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C8.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C9.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C10.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C11.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C12.dat
[14:26:46.890] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C13.dat
[14:26:46.891] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C14.dat
[14:26:46.891] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C15.dat
[14:26:46.937] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:26:46.938] <TB2> INFO: PixTestReadback::RES sent once
[14:26:55.573] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:26:55.573] <TB2> INFO: Vbg will be calibrated using Vd calibration
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 162.4calibrated Vbg = 1.22837 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 163.5calibrated Vbg = 1.22936 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154calibrated Vbg = 1.22992 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159.2calibrated Vbg = 1.23975 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.9calibrated Vbg = 1.24244 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 163.1calibrated Vbg = 1.24417 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.1calibrated Vbg = 1.23782 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.9calibrated Vbg = 1.24535 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159.4calibrated Vbg = 1.24289 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.3calibrated Vbg = 1.24692 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.8calibrated Vbg = 1.24482 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.7calibrated Vbg = 1.2485 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 147.2calibrated Vbg = 1.23457 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 146.3calibrated Vbg = 1.2226 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 162.2calibrated Vbg = 1.22733 :::*/*/*/*/
[14:26:55.573] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.8calibrated Vbg = 1.22877 :::*/*/*/*/
[14:26:55.576] <TB2> INFO: PixTestReadback::RES sent once
[14:29:50.321] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C0.dat
[14:29:50.321] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C1.dat
[14:29:50.321] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C2.dat
[14:29:50.321] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C3.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C4.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C5.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C6.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C7.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C8.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C9.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C10.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C11.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C12.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C13.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C14.dat
[14:29:50.322] <TB2> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3019_FullQualification_2015-10-29_13h48m_1446122896//000_FulltestPxar_m20//readbackCal_C15.dat
[14:29:50.368] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:29:50.370] <TB2> INFO: PixTestReadback::doTest() done
[14:29:50.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:50.370] <TB2> INFO: Decoding statistics:
[14:29:50.370] <TB2> INFO: General information:
[14:29:50.370] <TB2> INFO: 16bit words read: 768
[14:29:50.370] <TB2> INFO: valid events total: 64
[14:29:50.370] <TB2> INFO: empty events: 64
[14:29:50.370] <TB2> INFO: valid events with pixels: 0
[14:29:50.370] <TB2> INFO: valid pixel hits: 0
[14:29:50.370] <TB2> INFO: Event errors: 0
[14:29:50.370] <TB2> INFO: start marker: 0
[14:29:50.370] <TB2> INFO: stop marker: 0
[14:29:50.370] <TB2> INFO: overflow: 0
[14:29:50.370] <TB2> INFO: invalid 5bit words: 0
[14:29:50.370] <TB2> INFO: invalid XOR eye diagram: 0
[14:29:50.370] <TB2> INFO: TBM errors: 0
[14:29:50.370] <TB2> INFO: flawed TBM headers: 0
[14:29:50.370] <TB2> INFO: flawed TBM trailers: 0
[14:29:50.370] <TB2> INFO: event ID mismatches: 0
[14:29:50.370] <TB2> INFO: ROC errors: 0
[14:29:50.370] <TB2> INFO: missing ROC header(s): 0
[14:29:50.370] <TB2> INFO: misplaced readback start: 0
[14:29:50.370] <TB2> INFO: Pixel decoding errors: 0
[14:29:50.370] <TB2> INFO: pixel data incomplete: 0
[14:29:50.370] <TB2> INFO: pixel address: 0
[14:29:50.370] <TB2> INFO: pulse height fill bit: 0
[14:29:50.370] <TB2> INFO: buffer corruption: 0
[14:29:50.385] <TB2> INFO: Decoding statistics:
[14:29:50.385] <TB2> INFO: General information:
[14:29:50.385] <TB2> INFO: 16bit words read: 2396428
[14:29:50.385] <TB2> INFO: valid events total: 88384
[14:29:50.385] <TB2> INFO: empty events: 2681
[14:29:50.385] <TB2> INFO: valid events with pixels: 85703
[14:29:50.385] <TB2> INFO: valid pixel hits: 667910
[14:29:50.385] <TB2> INFO: Event errors: 0
[14:29:50.385] <TB2> INFO: start marker: 0
[14:29:50.385] <TB2> INFO: stop marker: 0
[14:29:50.385] <TB2> INFO: overflow: 0
[14:29:50.385] <TB2> INFO: invalid 5bit words: 0
[14:29:50.385] <TB2> INFO: invalid XOR eye diagram: 0
[14:29:50.385] <TB2> INFO: TBM errors: 0
[14:29:50.385] <TB2> INFO: flawed TBM headers: 0
[14:29:50.385] <TB2> INFO: flawed TBM trailers: 0
[14:29:50.385] <TB2> INFO: event ID mismatches: 0
[14:29:50.385] <TB2> INFO: ROC errors: 0
[14:29:50.385] <TB2> INFO: missing ROC header(s): 0
[14:29:50.385] <TB2> INFO: misplaced readback start: 0
[14:29:50.385] <TB2> INFO: Pixel decoding errors: 0
[14:29:50.385] <TB2> INFO: pixel data incomplete: 0
[14:29:50.385] <TB2> INFO: pixel address: 0
[14:29:50.385] <TB2> INFO: pulse height fill bit: 0
[14:29:50.385] <TB2> INFO: buffer corruption: 0
[14:29:50.385] <TB2> INFO: enter test to run
[14:29:50.385] <TB2> INFO: test: exit no parameter change
[14:29:50.607] <TB2> QUIET: Connection to board 20 closed.
[14:29:50.687] <TB2> INFO: pXar: this is the end, my friend