Test Date: 2015-10-29 13:48
Analysis date: 2015-10-30 19:12
Logfile
LogfileView
[17:31:10.372] <TB1> INFO: *** Welcome to pxar ***
[17:31:10.372] <TB1> INFO: *** Today: 2015/10/29
[17:31:10.442] <TB1> INFO: *** Version: 9da6
[17:31:10.442] <TB1> INFO: readRocDacs: /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C15.dat
[17:31:10.443] <TB1> INFO: readTbmDacs: /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//tbmParameters_C0b.dat
[17:31:10.443] <TB1> INFO: readMaskFile: /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//defaultMaskFile.dat
[17:31:10.443] <TB1> INFO: readTrimFile: /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters_C15.dat
[17:31:10.519] <TB1> INFO: clk: 4
[17:31:10.519] <TB1> INFO: ctr: 4
[17:31:10.519] <TB1> INFO: sda: 19
[17:31:10.519] <TB1> INFO: tin: 9
[17:31:10.519] <TB1> INFO: level: 15
[17:31:10.519] <TB1> INFO: triggerdelay: 0
[17:31:10.519] <TB1> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[17:31:10.519] <TB1> INFO: Log level: INFO
[17:31:10.530] <TB1> INFO: Found DTB DTB_WXC03A
[17:31:10.539] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[17:31:10.542] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[17:31:10.544] <TB1> INFO: RPC call hashes of host and DTB match: 398089610
[17:31:12.124] <TB1> INFO: DUT info:
[17:31:12.124] <TB1> INFO: The DUT currently contains the following objects:
[17:31:12.124] <TB1> INFO: 2 TBM Cores tbm08c (2 ON)
[17:31:12.124] <TB1> INFO: TBM Core alpha (0): 7 registers set
[17:31:12.124] <TB1> INFO: TBM Core beta (1): 7 registers set
[17:31:12.124] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[17:31:12.124] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.124] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:31:12.525] <TB1> INFO: enter 'restricted' command line mode
[17:31:12.525] <TB1> INFO: enter test to run
[17:31:12.526] <TB1> INFO: test: pretest no parameter change
[17:31:12.526] <TB1> INFO: running: pretest
[17:31:12.537] <TB1> INFO: ######################################################################
[17:31:12.537] <TB1> INFO: PixTestPretest::doTest()
[17:31:12.537] <TB1> INFO: ######################################################################
[17:31:12.539] <TB1> INFO: ----------------------------------------------------------------------
[17:31:12.539] <TB1> INFO: PixTestPretest::programROC()
[17:31:12.539] <TB1> INFO: ----------------------------------------------------------------------
[17:31:30.557] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:31:30.557] <TB1> INFO: IA differences per ROC: 18.5 17.7 16.9 18.5 20.1 15.3 18.5 20.1 16.9 17.7 19.3 17.7 20.1 16.9 17.7 19.3
[17:31:30.618] <TB1> INFO: ----------------------------------------------------------------------
[17:31:30.618] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:31:30.618] <TB1> INFO: ----------------------------------------------------------------------
[17:31:51.890] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[17:31:51.890] <TB1> INFO: i(loss) [mA/ROC]: 19.3 20.1 20.1 20.1 20.1 20.1 20.9 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[17:31:51.918] <TB1> INFO: ----------------------------------------------------------------------
[17:31:51.918] <TB1> INFO: PixTestPretest::findTiming()
[17:31:51.918] <TB1> INFO: ----------------------------------------------------------------------
[17:31:51.918] <TB1> INFO: PixTestCmd::init()
[17:31:52.512] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!

[17:33:26.273] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[17:33:26.273] <TB1> INFO: (success/tries = 100/100), width = 5
[17:33:26.275] <TB1> INFO: ----------------------------------------------------------------------
[17:33:26.275] <TB1> INFO: PixTestPretest::findWorkingPixel()
[17:33:26.275] <TB1> INFO: ----------------------------------------------------------------------
[17:33:26.411] <TB1> INFO: Expecting 231680 events.
[17:33:31.019] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)

[17:33:31.022] <TB1> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)

[17:33:34.180] <TB1> INFO: 231680 events read in total (7054ms).
[17:33:34.186] <TB1> INFO: Test took 7909ms.
[17:33:34.593] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:33:34.625] <TB1> INFO: ----------------------------------------------------------------------
[17:33:34.625] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[17:33:34.625] <TB1> INFO: ----------------------------------------------------------------------
[17:33:34.760] <TB1> INFO: Expecting 231680 events.
[17:33:43.572] <TB1> INFO: 231680 events read in total (8097ms).
[17:33:43.576] <TB1> INFO: Test took 8947ms.
[17:33:43.968] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[17:33:43.968] <TB1> INFO: CalDel: 143 106 114 124 137 142 143 131 140 160 149 140 145 135 146 116
[17:33:43.968] <TB1> INFO: VthrComp: 51 51 53 51 51 51 51 51 51 51 51 51 51 51 51 51
[17:33:43.970] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C0.dat
[17:33:43.970] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C1.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C2.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C3.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C4.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C5.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C6.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C7.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C8.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C9.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C10.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C11.dat
[17:33:43.971] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C12.dat
[17:33:43.972] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C13.dat
[17:33:43.972] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C14.dat
[17:33:43.972] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters_C15.dat
[17:33:43.972] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//tbmParameters_C0a.dat
[17:33:43.972] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//tbmParameters_C0b.dat
[17:33:43.972] <TB1> INFO: PixTestPretest::doTest() done, duration: 151 seconds
[17:33:44.039] <TB1> INFO: enter test to run
[17:33:44.039] <TB1> INFO: test: fulltest no parameter change
[17:33:44.039] <TB1> INFO: running: fulltest
[17:33:44.039] <TB1> INFO: ######################################################################
[17:33:44.039] <TB1> INFO: PixTestFullTest::doTest()
[17:33:44.039] <TB1> INFO: ######################################################################
[17:33:44.040] <TB1> INFO: ######################################################################
[17:33:44.040] <TB1> INFO: PixTestAlive::doTest()
[17:33:44.040] <TB1> INFO: ######################################################################
[17:33:44.042] <TB1> INFO: ----------------------------------------------------------------------
[17:33:44.042] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:33:44.042] <TB1> INFO: ----------------------------------------------------------------------
[17:33:44.353] <TB1> INFO: Expecting 41600 events.
[17:33:48.665] <TB1> INFO: 41600 events read in total (3598ms).
[17:33:48.666] <TB1> INFO: Test took 4623ms.
[17:33:48.673] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:33:49.051] <TB1> INFO: PixTestAlive::aliveTest() done
[17:33:49.052] <TB1> INFO: number of dead pixels (per ROC): 4 4 1 0 0 0 0 0 1 0 0 0 2 4 1 2
[17:33:49.053] <TB1> INFO: ----------------------------------------------------------------------
[17:33:49.053] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:33:49.053] <TB1> INFO: ----------------------------------------------------------------------
[17:33:49.366] <TB1> INFO: Expecting 41600 events.
[17:33:52.394] <TB1> INFO: 41600 events read in total (2313ms).
[17:33:52.394] <TB1> INFO: Test took 3340ms.
[17:33:52.394] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:33:52.394] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:33:52.802] <TB1> INFO: PixTestAlive::maskTest() done
[17:33:52.802] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:33:52.803] <TB1> INFO: ----------------------------------------------------------------------
[17:33:52.803] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:33:52.803] <TB1> INFO: ----------------------------------------------------------------------
[17:33:53.118] <TB1> INFO: Expecting 41600 events.
[17:33:57.474] <TB1> INFO: 41600 events read in total (3641ms).
[17:33:57.474] <TB1> INFO: Test took 4669ms.
[17:33:57.480] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:33:57.863] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[17:33:57.863] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:33:57.863] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[17:33:57.863] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:33:57.863] <TB1> INFO: Decoding statistics:
[17:33:57.863] <TB1> INFO: General information:
[17:33:57.863] <TB1> INFO: 16bit words read: 0
[17:33:57.863] <TB1> INFO: valid events total: 0
[17:33:57.863] <TB1> INFO: empty events: 0
[17:33:57.863] <TB1> INFO: valid events with pixels: 0
[17:33:57.863] <TB1> INFO: valid pixel hits: 0
[17:33:57.863] <TB1> INFO: Event errors: 0
[17:33:57.863] <TB1> INFO: start marker: 0
[17:33:57.863] <TB1> INFO: stop marker: 0
[17:33:57.863] <TB1> INFO: overflow: 0
[17:33:57.863] <TB1> INFO: invalid 5bit words: 0
[17:33:57.863] <TB1> INFO: invalid XOR eye diagram: 0
[17:33:57.863] <TB1> INFO: TBM errors: 0
[17:33:57.863] <TB1> INFO: flawed TBM headers: 0
[17:33:57.863] <TB1> INFO: flawed TBM trailers: 0
[17:33:57.863] <TB1> INFO: event ID mismatches: 0
[17:33:57.863] <TB1> INFO: ROC errors: 0
[17:33:57.863] <TB1> INFO: missing ROC header(s): 0
[17:33:57.863] <TB1> INFO: misplaced readback start: 0
[17:33:57.863] <TB1> INFO: Pixel decoding errors: 0
[17:33:57.863] <TB1> INFO: pixel data incomplete: 0
[17:33:57.863] <TB1> INFO: pixel address: 0
[17:33:57.863] <TB1> INFO: pulse height fill bit: 0
[17:33:57.863] <TB1> INFO: buffer corruption: 0
[17:33:57.870] <TB1> INFO: ######################################################################
[17:33:57.870] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:33:57.871] <TB1> INFO: ######################################################################
[17:33:57.872] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:33:57.883] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:33:57.883] <TB1> INFO: run 1 of 1
[17:33:58.191] <TB1> INFO: Expecting 3120000 events.
[17:34:46.110] <TB1> INFO: 1043160 events read in total (47204ms).
[17:35:32.575] <TB1> INFO: 2066645 events read in total (93670ms).
[17:36:19.017] <TB1> INFO: 3120000 events read in total (140112ms).
[17:36:19.080] <TB1> INFO: Test took 141198ms.
[17:36:19.187] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:36:42.979] <TB1> INFO: PixTestBBMap::doTest() done, duration: 165 seconds
[17:36:42.980] <TB1> INFO: number of dead bumps (per ROC): 5 2 2 2 0 2 0 1 2 3 2 5 1 1 3 1
[17:36:42.980] <TB1> INFO: separation cut (per ROC): 99 99 105 104 99 98 104 106 88 76 86 98 77 79 86 103
[17:36:42.980] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:36:42.980] <TB1> INFO: Decoding statistics:
[17:36:42.980] <TB1> INFO: General information:
[17:36:42.980] <TB1> INFO: 16bit words read: 0
[17:36:42.980] <TB1> INFO: valid events total: 0
[17:36:42.980] <TB1> INFO: empty events: 0
[17:36:42.980] <TB1> INFO: valid events with pixels: 0
[17:36:42.980] <TB1> INFO: valid pixel hits: 0
[17:36:42.980] <TB1> INFO: Event errors: 0
[17:36:42.980] <TB1> INFO: start marker: 0
[17:36:42.980] <TB1> INFO: stop marker: 0
[17:36:42.980] <TB1> INFO: overflow: 0
[17:36:42.980] <TB1> INFO: invalid 5bit words: 0
[17:36:42.980] <TB1> INFO: invalid XOR eye diagram: 0
[17:36:42.980] <TB1> INFO: TBM errors: 0
[17:36:42.980] <TB1> INFO: flawed TBM headers: 0
[17:36:42.980] <TB1> INFO: flawed TBM trailers: 0
[17:36:42.980] <TB1> INFO: event ID mismatches: 0
[17:36:42.980] <TB1> INFO: ROC errors: 0
[17:36:42.980] <TB1> INFO: missing ROC header(s): 0
[17:36:42.980] <TB1> INFO: misplaced readback start: 0
[17:36:42.980] <TB1> INFO: Pixel decoding errors: 0
[17:36:42.980] <TB1> INFO: pixel data incomplete: 0
[17:36:42.980] <TB1> INFO: pixel address: 0
[17:36:42.980] <TB1> INFO: pulse height fill bit: 0
[17:36:42.980] <TB1> INFO: buffer corruption: 0
[17:36:43.057] <TB1> INFO: ######################################################################
[17:36:43.057] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:36:43.058] <TB1> INFO: ######################################################################
[17:36:43.058] <TB1> INFO: ----------------------------------------------------------------------
[17:36:43.058] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:36:43.058] <TB1> INFO: ----------------------------------------------------------------------
[17:36:43.058] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:36:43.066] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[17:36:43.066] <TB1> INFO: run 1 of 1
[17:36:43.386] <TB1> INFO: Expecting 26208000 events.
[17:37:15.291] <TB1> INFO: 1093000 events read in total (31190ms).
[17:37:45.901] <TB1> INFO: 2165900 events read in total (61800ms).
[17:38:16.582] <TB1> INFO: 3235400 events read in total (92481ms).
[17:38:47.378] <TB1> INFO: 4301150 events read in total (123277ms).
[17:39:18.488] <TB1> INFO: 5366650 events read in total (154387ms).
[17:39:49.937] <TB1> INFO: 6433200 events read in total (185836ms).
[17:40:20.934] <TB1> INFO: 7499000 events read in total (216833ms).
[17:40:52.386] <TB1> INFO: 8563450 events read in total (248285ms).
[17:41:23.221] <TB1> INFO: 9631150 events read in total (279120ms).
[17:41:54.539] <TB1> INFO: 10694250 events read in total (310438ms).
[17:42:25.738] <TB1> INFO: 11756500 events read in total (341637ms).
[17:42:57.573] <TB1> INFO: 12818500 events read in total (373472ms).
[17:43:28.970] <TB1> INFO: 13869500 events read in total (404869ms).
[17:44:00.367] <TB1> INFO: 14915900 events read in total (436266ms).
[17:44:31.067] <TB1> INFO: 15962800 events read in total (466966ms).
[17:45:01.966] <TB1> INFO: 17005050 events read in total (497865ms).
[17:45:33.184] <TB1> INFO: 18046950 events read in total (529083ms).
[17:46:05.096] <TB1> INFO: 19088100 events read in total (560995ms).
[17:46:36.770] <TB1> INFO: 20128800 events read in total (592669ms).
[17:47:07.735] <TB1> INFO: 21167850 events read in total (623634ms).
[17:47:38.340] <TB1> INFO: 22207850 events read in total (654239ms).
[17:48:09.471] <TB1> INFO: 23249650 events read in total (685370ms).
[17:48:40.259] <TB1> INFO: 24291650 events read in total (716158ms).
[17:49:11.756] <TB1> INFO: 25332950 events read in total (747655ms).
[17:49:37.124] <TB1> INFO: 26208000 events read in total (773023ms).
[17:49:37.154] <TB1> INFO: Test took 774088ms.
[17:49:37.241] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:49:37.422] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:39.118] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:40.800] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:42.460] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:44.108] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:45.799] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:47.483] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:49.086] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:50.654] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:52.166] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:53.711] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:55.331] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:56.904] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:49:58.574] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:50:00.259] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:50:01.845] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[17:50:03.261] <TB1> INFO: PixTestScurves::scurves() done
[17:50:03.261] <TB1> INFO: Vcal mean: 97.16 100.71 107.01 97.73 88.61 101.56 96.07 89.81 82.83 78.25 88.97 90.15 76.53 80.86 87.50 102.75
[17:50:03.261] <TB1> INFO: Vcal RMS: 6.99 7.12 6.50 6.45 5.49 6.62 5.35 6.07 5.49 4.37 6.12 5.43 5.00 4.89 5.56 6.10
[17:50:03.261] <TB1> INFO: PixTestScurves::fullTest() done, duration: 800 seconds
[17:50:03.261] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:50:03.261] <TB1> INFO: Decoding statistics:
[17:50:03.261] <TB1> INFO: General information:
[17:50:03.261] <TB1> INFO: 16bit words read: 0
[17:50:03.261] <TB1> INFO: valid events total: 0
[17:50:03.261] <TB1> INFO: empty events: 0
[17:50:03.261] <TB1> INFO: valid events with pixels: 0
[17:50:03.261] <TB1> INFO: valid pixel hits: 0
[17:50:03.261] <TB1> INFO: Event errors: 0
[17:50:03.261] <TB1> INFO: start marker: 0
[17:50:03.261] <TB1> INFO: stop marker: 0
[17:50:03.261] <TB1> INFO: overflow: 0
[17:50:03.261] <TB1> INFO: invalid 5bit words: 0
[17:50:03.261] <TB1> INFO: invalid XOR eye diagram: 0
[17:50:03.261] <TB1> INFO: TBM errors: 0
[17:50:03.261] <TB1> INFO: flawed TBM headers: 0
[17:50:03.261] <TB1> INFO: flawed TBM trailers: 0
[17:50:03.261] <TB1> INFO: event ID mismatches: 0
[17:50:03.261] <TB1> INFO: ROC errors: 0
[17:50:03.261] <TB1> INFO: missing ROC header(s): 0
[17:50:03.261] <TB1> INFO: misplaced readback start: 0
[17:50:03.261] <TB1> INFO: Pixel decoding errors: 0
[17:50:03.261] <TB1> INFO: pixel data incomplete: 0
[17:50:03.261] <TB1> INFO: pixel address: 0
[17:50:03.261] <TB1> INFO: pulse height fill bit: 0
[17:50:03.261] <TB1> INFO: buffer corruption: 0
[17:50:03.332] <TB1> INFO: ######################################################################
[17:50:03.332] <TB1> INFO: PixTestTrim::doTest()
[17:50:03.332] <TB1> INFO: ######################################################################
[17:50:03.333] <TB1> INFO: ----------------------------------------------------------------------
[17:50:03.333] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[17:50:03.333] <TB1> INFO: ----------------------------------------------------------------------
[17:50:03.417] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:50:03.417] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:50:03.424] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[17:50:03.424] <TB1> INFO: run 1 of 1
[17:50:03.727] <TB1> INFO: Expecting 6281600 events.
[17:50:48.267] <TB1> INFO: 1424870 events read in total (43825ms).
[17:51:31.979] <TB1> INFO: 2834230 events read in total (87537ms).
[17:52:15.092] <TB1> INFO: 4246010 events read in total (130650ms).
[17:52:59.412] <TB1> INFO: 5668140 events read in total (174971ms).
[17:53:19.531] <TB1> INFO: 6281600 events read in total (195089ms).
[17:53:19.563] <TB1> INFO: Test took 196139ms.
[17:53:19.616] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:53:39.497] <TB1> INFO: ROC 0 VthrComp = 96
[17:53:39.497] <TB1> INFO: ROC 1 VthrComp = 100
[17:53:39.497] <TB1> INFO: ROC 2 VthrComp = 102
[17:53:39.497] <TB1> INFO: ROC 3 VthrComp = 96
[17:53:39.497] <TB1> INFO: ROC 4 VthrComp = 93
[17:53:39.497] <TB1> INFO: ROC 5 VthrComp = 95
[17:53:39.497] <TB1> INFO: ROC 6 VthrComp = 98
[17:53:39.497] <TB1> INFO: ROC 7 VthrComp = 97
[17:53:39.498] <TB1> INFO: ROC 8 VthrComp = 84
[17:53:39.498] <TB1> INFO: ROC 9 VthrComp = 79
[17:53:39.498] <TB1> INFO: ROC 10 VthrComp = 86
[17:53:39.498] <TB1> INFO: ROC 11 VthrComp = 93
[17:53:39.498] <TB1> INFO: ROC 12 VthrComp = 80
[17:53:39.498] <TB1> INFO: ROC 13 VthrComp = 85
[17:53:39.498] <TB1> INFO: ROC 14 VthrComp = 93
[17:53:39.498] <TB1> INFO: ROC 15 VthrComp = 101
[17:53:39.498] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:53:39.498] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:53:39.506] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[17:53:39.506] <TB1> INFO: run 1 of 1
[17:53:39.810] <TB1> INFO: Expecting 6281600 events.
[17:54:15.357] <TB1> INFO: 891670 events read in total (34833ms).
[17:54:50.377] <TB1> INFO: 1779610 events read in total (69853ms).
[17:55:26.729] <TB1> INFO: 2669030 events read in total (106205ms).
[17:56:02.254] <TB1> INFO: 3553980 events read in total (141730ms).
[17:56:37.190] <TB1> INFO: 4431620 events read in total (176666ms).
[17:57:12.802] <TB1> INFO: 5305740 events read in total (212278ms).
[17:57:48.394] <TB1> INFO: 6180280 events read in total (247870ms).
[17:57:52.861] <TB1> INFO: 6281600 events read in total (252338ms).
[17:57:52.923] <TB1> INFO: Test took 253417ms.
[17:57:53.073] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:58:18.112] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 62.4338 for pixel 7/1 mean/min/max = 46.902/31.0759/62.728
[17:58:18.112] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 63.2292 for pixel 0/18 mean/min/max = 47.3472/31.4385/63.2559
[17:58:18.112] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 66.1725 for pixel 12/5 mean/min/max = 49.3781/32.5584/66.1979
[17:58:18.112] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 64.0622 for pixel 18/1 mean/min/max = 47.3811/30.6927/64.0695
[17:58:18.113] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.5249 for pixel 0/51 mean/min/max = 45.5169/32.4462/58.5877
[17:58:18.113] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 65.4454 for pixel 0/5 mean/min/max = 48.6504/31.6675/65.6332
[17:58:18.113] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.5605 for pixel 0/21 mean/min/max = 44.9072/31.1187/58.6958
[17:58:18.113] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.1409 for pixel 18/4 mean/min/max = 45.9222/31.4095/60.435
[17:58:18.114] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 60.1233 for pixel 1/76 mean/min/max = 45.9232/31.6914/60.1549
[17:58:18.114] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.8381 for pixel 22/71 mean/min/max = 47.3175/34.6229/60.012
[17:58:18.114] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.3393 for pixel 0/22 mean/min/max = 46.8133/31.1379/62.4886
[17:58:18.114] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.3716 for pixel 11/54 mean/min/max = 45.3608/32.2238/58.4978
[17:58:18.115] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.599 for pixel 7/74 mean/min/max = 45.5447/32.2625/58.8269
[17:58:18.115] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 56.8246 for pixel 51/24 mean/min/max = 44.7206/32.3786/57.0626
[17:58:18.115] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.5937 for pixel 2/67 mean/min/max = 45.1512/31.6889/58.6136
[17:58:18.115] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 62.526 for pixel 0/37 mean/min/max = 47.5724/32.3734/62.7715
[17:58:18.115] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:58:18.247] <TB1> INFO: Expecting 514560 events.
[17:58:28.575] <TB1> INFO: 514560 events read in total (9613ms).
[17:58:28.580] <TB1> INFO: Expecting 514560 events.
[17:58:38.788] <TB1> INFO: 514560 events read in total (9539ms).
[17:58:38.795] <TB1> INFO: Expecting 514560 events.
[17:58:49.111] <TB1> INFO: 514560 events read in total (9645ms).
[17:58:49.120] <TB1> INFO: Expecting 514560 events.
[17:58:59.371] <TB1> INFO: 514560 events read in total (9582ms).
[17:58:59.382] <TB1> INFO: Expecting 514560 events.
[17:59:09.301] <TB1> INFO: 514560 events read in total (9254ms).
[17:59:09.316] <TB1> INFO: Expecting 514560 events.
[17:59:19.558] <TB1> INFO: 514560 events read in total (9585ms).
[17:59:19.572] <TB1> INFO: Expecting 514560 events.
[17:59:29.726] <TB1> INFO: 514560 events read in total (9495ms).
[17:59:29.742] <TB1> INFO: Expecting 514560 events.
[17:59:40.166] <TB1> INFO: 514560 events read in total (9767ms).
[17:59:40.185] <TB1> INFO: Expecting 514560 events.
[17:59:50.433] <TB1> INFO: 514560 events read in total (9596ms).
[17:59:50.457] <TB1> INFO: Expecting 514560 events.
[18:00:00.720] <TB1> INFO: 514560 events read in total (9616ms).
[18:00:00.745] <TB1> INFO: Expecting 514560 events.
[18:00:10.553] <TB1> INFO: 514560 events read in total (9156ms).
[18:00:10.577] <TB1> INFO: Expecting 514560 events.
[18:00:20.566] <TB1> INFO: 514560 events read in total (9334ms).
[18:00:20.597] <TB1> INFO: Expecting 514560 events.
[18:00:30.816] <TB1> INFO: 514560 events read in total (9578ms).
[18:00:30.849] <TB1> INFO: Expecting 514560 events.
[18:00:41.037] <TB1> INFO: 514560 events read in total (9548ms).
[18:00:41.070] <TB1> INFO: Expecting 514560 events.
[18:00:50.998] <TB1> INFO: 514560 events read in total (9290ms).
[18:00:51.031] <TB1> INFO: Expecting 514560 events.
[18:01:01.075] <TB1> INFO: 514560 events read in total (9414ms).
[18:01:01.112] <TB1> INFO: Test took 162997ms.
[18:01:02.193] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:01:02.202] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:01:02.202] <TB1> INFO: run 1 of 1
[18:01:02.526] <TB1> INFO: Expecting 6281600 events.
[18:01:38.028] <TB1> INFO: 871630 events read in total (34787ms).
[18:02:14.402] <TB1> INFO: 1740110 events read in total (71161ms).
[18:02:51.153] <TB1> INFO: 2609790 events read in total (107912ms).
[18:03:26.669] <TB1> INFO: 3475660 events read in total (143428ms).
[18:04:02.230] <TB1> INFO: 4333280 events read in total (178989ms).
[18:04:38.870] <TB1> INFO: 5188060 events read in total (215629ms).
[18:05:15.969] <TB1> INFO: 6042760 events read in total (252728ms).
[18:05:25.998] <TB1> INFO: 6281600 events read in total (262757ms).
[18:05:26.066] <TB1> INFO: Test took 263864ms.
[18:05:26.224] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:05:52.127] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.029732 .. 255.000000
[18:05:52.207] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[18:05:52.215] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:05:52.215] <TB1> INFO: run 1 of 1
[18:05:52.531] <TB1> INFO: Expecting 10649600 events.
[18:06:28.480] <TB1> INFO: 826570 events read in total (35232ms).
[18:07:02.712] <TB1> INFO: 1653150 events read in total (69464ms).
[18:07:37.331] <TB1> INFO: 2479920 events read in total (104083ms).
[18:08:12.264] <TB1> INFO: 3307050 events read in total (139016ms).
[18:08:46.809] <TB1> INFO: 4134430 events read in total (173561ms).
[18:09:21.330] <TB1> INFO: 4961330 events read in total (208082ms).
[18:09:56.666] <TB1> INFO: 5788160 events read in total (243418ms).
[18:10:33.267] <TB1> INFO: 6614710 events read in total (280019ms).
[18:11:08.765] <TB1> INFO: 7440330 events read in total (315517ms).
[18:11:44.308] <TB1> INFO: 8265180 events read in total (351060ms).
[18:12:19.863] <TB1> INFO: 9089310 events read in total (386615ms).
[18:12:55.154] <TB1> INFO: 9913560 events read in total (421906ms).
[18:13:25.754] <TB1> INFO: 10649600 events read in total (452506ms).
[18:13:25.870] <TB1> INFO: Test took 453655ms.
[18:13:26.148] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:13:56.807] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.236989 .. 73.908170
[18:13:56.887] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 0 .. 83 (-1/-1) hits flags = 528 (plus default)
[18:13:56.894] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:13:56.894] <TB1> INFO: run 1 of 1
[18:13:57.197] <TB1> INFO: Expecting 3494400 events.
[18:14:35.415] <TB1> INFO: 1005540 events read in total (37502ms).
[18:15:13.345] <TB1> INFO: 2011460 events read in total (75431ms).
[18:15:52.222] <TB1> INFO: 3015480 events read in total (114308ms).
[18:16:10.412] <TB1> INFO: 3494400 events read in total (132498ms).
[18:16:10.451] <TB1> INFO: Test took 133557ms.
[18:16:10.520] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:16:27.626] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 1.046996 .. 62.685082
[18:16:27.705] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 1 .. 72 (-1/-1) hits flags = 528 (plus default)
[18:16:27.713] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:16:27.713] <TB1> INFO: run 1 of 1
[18:16:28.026] <TB1> INFO: Expecting 2995200 events.
[18:17:07.263] <TB1> INFO: 1052530 events read in total (38522ms).
[18:17:45.733] <TB1> INFO: 2104560 events read in total (76992ms).
[18:18:17.912] <TB1> INFO: 2995200 events read in total (109171ms).
[18:18:17.940] <TB1> INFO: Test took 110227ms.
[18:18:18.006] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:18:34.161] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.046996 .. 45.199522
[18:18:34.252] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:18:34.261] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:18:34.261] <TB1> INFO: run 1 of 1
[18:18:34.584] <TB1> INFO: Expecting 2288000 events.
[18:19:15.843] <TB1> INFO: 1196720 events read in total (40545ms).
[18:19:52.728] <TB1> INFO: 2288000 events read in total (77431ms).
[18:19:52.751] <TB1> INFO: Test took 78491ms.
[18:19:52.785] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:20:05.789] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:20:05.789] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:20:05.797] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:20:05.797] <TB1> INFO: run 1 of 1
[18:20:06.110] <TB1> INFO: Expecting 1705600 events.
[18:20:46.416] <TB1> INFO: 1075570 events read in total (39591ms).
[18:21:09.324] <TB1> INFO: 1705600 events read in total (62499ms).
[18:21:09.342] <TB1> INFO: Test took 63546ms.
[18:21:09.378] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C0.dat
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C1.dat
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C2.dat
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C3.dat
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C4.dat
[18:21:23.238] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C5.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C6.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C7.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C8.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C9.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C10.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C11.dat
[18:21:23.239] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C12.dat
[18:21:23.240] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C13.dat
[18:21:23.240] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C14.dat
[18:21:23.240] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C15.dat
[18:21:23.240] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C0.dat
[18:21:23.246] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C1.dat
[18:21:23.252] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C2.dat
[18:21:23.258] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C3.dat
[18:21:23.264] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C4.dat
[18:21:23.270] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C5.dat
[18:21:23.276] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C6.dat
[18:21:23.282] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C7.dat
[18:21:23.288] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C8.dat
[18:21:23.294] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C9.dat
[18:21:23.301] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C10.dat
[18:21:23.307] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C11.dat
[18:21:23.313] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C12.dat
[18:21:23.319] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C13.dat
[18:21:23.325] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C14.dat
[18:21:23.331] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//trimParameters35_C15.dat
[18:21:23.337] <TB1> INFO: PixTestTrim::trimTest() done
[18:21:23.337] <TB1> INFO: vtrim: 118 103 108 115 99 115 93 112 109 102 101 96 99 90 101 121
[18:21:23.337] <TB1> INFO: vthrcomp: 96 100 102 96 93 95 98 97 84 79 86 93 80 85 93 101
[18:21:23.337] <TB1> INFO: vcal mean: 34.89 34.93 34.97 34.98 35.02 34.97 34.94 34.95 34.94 35.01 35.00 34.98 34.95 34.93 34.97 34.94
[18:21:23.337] <TB1> INFO: vcal RMS: 1.42 1.41 1.32 0.99 0.87 0.99 0.86 0.85 1.02 0.86 0.89 0.85 1.12 1.38 0.88 1.17
[18:21:23.337] <TB1> INFO: bits mean: 9.44 8.82 9.03 9.39 9.30 9.09 9.53 9.21 9.43 8.92 9.30 9.59 9.39 9.12 9.84 8.96
[18:21:23.337] <TB1> INFO: bits RMS: 2.68 2.94 2.53 2.72 2.73 2.69 2.83 2.90 2.72 2.44 2.79 2.64 2.70 2.90 2.56 2.79
[18:21:23.344] <TB1> INFO: ----------------------------------------------------------------------
[18:21:23.344] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[18:21:23.344] <TB1> INFO: ----------------------------------------------------------------------
[18:21:23.346] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:21:23.354] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:21:23.354] <TB1> INFO: run 1 of 1
[18:21:23.661] <TB1> INFO: Expecting 8320000 events.
[18:22:03.990] <TB1> INFO: 1139960 events read in total (39614ms).
[18:22:42.764] <TB1> INFO: 2269500 events read in total (78388ms).
[18:23:21.355] <TB1> INFO: 3396610 events read in total (116979ms).
[18:23:59.763] <TB1> INFO: 4517470 events read in total (155387ms).
[18:24:38.494] <TB1> INFO: 5629480 events read in total (194118ms).
[18:25:19.030] <TB1> INFO: 6739480 events read in total (234654ms).
[18:25:57.320] <TB1> INFO: 7850440 events read in total (272944ms).
[18:26:13.184] <TB1> INFO: 8320000 events read in total (288808ms).
[18:26:13.224] <TB1> INFO: Test took 289870ms.
[18:26:13.327] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:26:41.190] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[18:26:41.198] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:26:41.198] <TB1> INFO: run 1 of 1
[18:26:41.503] <TB1> INFO: Expecting 7654400 events.
[18:27:21.860] <TB1> INFO: 1137310 events read in total (39642ms).
[18:28:01.308] <TB1> INFO: 2265630 events read in total (79090ms).
[18:28:40.317] <TB1> INFO: 3391450 events read in total (118099ms).
[18:29:19.503] <TB1> INFO: 4506930 events read in total (157285ms).
[18:29:58.765] <TB1> INFO: 5615410 events read in total (196547ms).
[18:30:37.969] <TB1> INFO: 6722390 events read in total (235751ms).
[18:31:10.198] <TB1> INFO: 7654400 events read in total (267980ms).
[18:31:10.236] <TB1> INFO: Test took 269038ms.
[18:31:10.331] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:31:37.239] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 528 (plus default)
[18:31:37.247] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:31:37.247] <TB1> INFO: run 1 of 1
[18:31:37.567] <TB1> INFO: Expecting 7113600 events.
[18:32:17.376] <TB1> INFO: 1181100 events read in total (39094ms).
[18:32:56.614] <TB1> INFO: 2351790 events read in total (78332ms).
[18:33:35.680] <TB1> INFO: 3518810 events read in total (117399ms).
[18:34:15.070] <TB1> INFO: 4670000 events read in total (156788ms).
[18:34:53.561] <TB1> INFO: 5816940 events read in total (195279ms).
[18:35:32.846] <TB1> INFO: 6966070 events read in total (234564ms).
[18:35:38.188] <TB1> INFO: 7113600 events read in total (239906ms).
[18:35:38.219] <TB1> INFO: Test took 240972ms.
[18:35:38.297] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:36:02.695] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 169 (-1/-1) hits flags = 528 (plus default)
[18:36:02.703] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:36:02.703] <TB1> INFO: run 1 of 1
[18:36:03.036] <TB1> INFO: Expecting 7072000 events.
[18:36:45.056] <TB1> INFO: 1183910 events read in total (41305ms).
[18:37:26.072] <TB1> INFO: 2357430 events read in total (82321ms).
[18:38:05.572] <TB1> INFO: 3527020 events read in total (121821ms).
[18:38:44.461] <TB1> INFO: 4680020 events read in total (160710ms).
[18:39:23.741] <TB1> INFO: 5830160 events read in total (199990ms).
[18:40:02.389] <TB1> INFO: 6983570 events read in total (238638ms).
[18:40:05.542] <TB1> INFO: 7072000 events read in total (241791ms).
[18:40:05.574] <TB1> INFO: Test took 242871ms.
[18:40:05.651] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:40:29.692] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 168 (-1/-1) hits flags = 528 (plus default)
[18:40:29.700] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[18:40:29.700] <TB1> INFO: run 1 of 1
[18:40:30.023] <TB1> INFO: Expecting 7030400 events.
[18:41:09.792] <TB1> INFO: 1187620 events read in total (39054ms).
[18:41:49.840] <TB1> INFO: 2364020 events read in total (79102ms).
[18:42:28.488] <TB1> INFO: 3536080 events read in total (117750ms).
[18:43:07.796] <TB1> INFO: 4691330 events read in total (157058ms).
[18:43:47.252] <TB1> INFO: 5843970 events read in total (196514ms).
[18:44:27.580] <TB1> INFO: 7003160 events read in total (236842ms).
[18:44:28.823] <TB1> INFO: 7030400 events read in total (238085ms).
[18:44:28.858] <TB1> INFO: Test took 239158ms.
[18:44:28.941] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:44:54.875] <TB1> INFO: PixTestTrim::trimBitTest() done
[18:44:54.877] <TB1> INFO: PixTestTrim::doTest() done, duration: 3291 seconds
[18:44:54.877] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:44:54.877] <TB1> INFO: Decoding statistics:
[18:44:54.877] <TB1> INFO: General information:
[18:44:54.877] <TB1> INFO: 16bit words read: 0
[18:44:54.877] <TB1> INFO: valid events total: 0
[18:44:54.877] <TB1> INFO: empty events: 0
[18:44:54.877] <TB1> INFO: valid events with pixels: 0
[18:44:54.877] <TB1> INFO: valid pixel hits: 0
[18:44:54.877] <TB1> INFO: Event errors: 0
[18:44:54.877] <TB1> INFO: start marker: 0
[18:44:54.877] <TB1> INFO: stop marker: 0
[18:44:54.877] <TB1> INFO: overflow: 0
[18:44:54.877] <TB1> INFO: invalid 5bit words: 0
[18:44:54.877] <TB1> INFO: invalid XOR eye diagram: 0
[18:44:54.877] <TB1> INFO: TBM errors: 0
[18:44:54.877] <TB1> INFO: flawed TBM headers: 0
[18:44:54.877] <TB1> INFO: flawed TBM trailers: 0
[18:44:54.877] <TB1> INFO: event ID mismatches: 0
[18:44:54.877] <TB1> INFO: ROC errors: 0
[18:44:54.877] <TB1> INFO: missing ROC header(s): 0
[18:44:54.877] <TB1> INFO: misplaced readback start: 0
[18:44:54.877] <TB1> INFO: Pixel decoding errors: 0
[18:44:54.877] <TB1> INFO: pixel data incomplete: 0
[18:44:54.877] <TB1> INFO: pixel address: 0
[18:44:54.877] <TB1> INFO: pulse height fill bit: 0
[18:44:54.877] <TB1> INFO: buffer corruption: 0
[18:44:55.602] <TB1> INFO: ######################################################################
[18:44:55.602] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:44:55.602] <TB1> INFO: ######################################################################
[18:44:55.919] <TB1> INFO: Expecting 41600 events.
[18:45:00.155] <TB1> INFO: 41600 events read in total (3521ms).
[18:45:00.155] <TB1> INFO: Test took 4551ms.
[18:45:00.162] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:45:00.826] <TB1> INFO: Expecting 41600 events.
[18:45:05.173] <TB1> INFO: 41600 events read in total (3632ms).
[18:45:05.173] <TB1> INFO: Test took 4660ms.
[18:45:05.180] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:45:05.625] <TB1> INFO: Expecting 41600 events.
[18:45:09.802] <TB1> INFO: 41600 events read in total (3461ms).
[18:45:09.803] <TB1> INFO: Test took 4512ms.
[18:45:09.809] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:45:10.250] <TB1> INFO: Expecting 2560 events.
[18:45:11.206] <TB1> INFO: 2560 events read in total (241ms).
[18:45:11.206] <TB1> INFO: Test took 1390ms.
[18:45:11.714] <TB1> INFO: Expecting 2560 events.
[18:45:12.670] <TB1> INFO: 2560 events read in total (241ms).
[18:45:12.670] <TB1> INFO: Test took 1463ms.
[18:45:13.178] <TB1> INFO: Expecting 2560 events.
[18:45:14.134] <TB1> INFO: 2560 events read in total (241ms).
[18:45:14.135] <TB1> INFO: Test took 1464ms.
[18:45:14.642] <TB1> INFO: Expecting 2560 events.
[18:45:15.598] <TB1> INFO: 2560 events read in total (241ms).
[18:45:15.598] <TB1> INFO: Test took 1463ms.
[18:45:16.105] <TB1> INFO: Expecting 2560 events.
[18:45:17.062] <TB1> INFO: 2560 events read in total (242ms).
[18:45:17.062] <TB1> INFO: Test took 1464ms.
[18:45:17.569] <TB1> INFO: Expecting 2560 events.
[18:45:18.526] <TB1> INFO: 2560 events read in total (242ms).
[18:45:18.526] <TB1> INFO: Test took 1464ms.
[18:45:19.033] <TB1> INFO: Expecting 2560 events.
[18:45:20.003] <TB1> INFO: 2560 events read in total (255ms).
[18:45:20.004] <TB1> INFO: Test took 1478ms.
[18:45:20.511] <TB1> INFO: Expecting 2560 events.
[18:45:21.466] <TB1> INFO: 2560 events read in total (240ms).
[18:45:21.466] <TB1> INFO: Test took 1462ms.
[18:45:21.975] <TB1> INFO: Expecting 2560 events.
[18:45:22.931] <TB1> INFO: 2560 events read in total (241ms).
[18:45:22.931] <TB1> INFO: Test took 1464ms.
[18:45:23.438] <TB1> INFO: Expecting 2560 events.
[18:45:24.401] <TB1> INFO: 2560 events read in total (248ms).
[18:45:24.401] <TB1> INFO: Test took 1470ms.
[18:45:24.908] <TB1> INFO: Expecting 2560 events.
[18:45:25.869] <TB1> INFO: 2560 events read in total (246ms).
[18:45:25.869] <TB1> INFO: Test took 1468ms.
[18:45:26.377] <TB1> INFO: Expecting 2560 events.
[18:45:27.339] <TB1> INFO: 2560 events read in total (247ms).
[18:45:27.339] <TB1> INFO: Test took 1469ms.
[18:45:27.847] <TB1> INFO: Expecting 2560 events.
[18:45:28.809] <TB1> INFO: 2560 events read in total (247ms).
[18:45:28.809] <TB1> INFO: Test took 1469ms.
[18:45:29.317] <TB1> INFO: Expecting 2560 events.
[18:45:30.292] <TB1> INFO: 2560 events read in total (260ms).
[18:45:30.293] <TB1> INFO: Test took 1483ms.
[18:45:30.801] <TB1> INFO: Expecting 2560 events.
[18:45:31.778] <TB1> INFO: 2560 events read in total (263ms).
[18:45:31.778] <TB1> INFO: Test took 1485ms.
[18:45:32.285] <TB1> INFO: Expecting 2560 events.
[18:45:33.246] <TB1> INFO: 2560 events read in total (246ms).
[18:45:33.246] <TB1> INFO: Test took 1467ms.
[18:45:33.248] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:45:33.755] <TB1> INFO: Expecting 655360 events.
[18:45:46.706] <TB1> INFO: 655360 events read in total (12236ms).
[18:45:46.714] <TB1> INFO: Expecting 655360 events.
[18:45:59.540] <TB1> INFO: 655360 events read in total (12226ms).
[18:45:59.557] <TB1> INFO: Expecting 655360 events.
[18:46:13.029] <TB1> INFO: 655360 events read in total (12927ms).
[18:46:13.048] <TB1> INFO: Expecting 655360 events.
[18:46:26.168] <TB1> INFO: 655360 events read in total (12556ms).
[18:46:26.191] <TB1> INFO: Expecting 655360 events.
[18:46:38.848] <TB1> INFO: 655360 events read in total (12087ms).
[18:46:38.872] <TB1> INFO: Expecting 655360 events.
[18:46:51.562] <TB1> INFO: 655360 events read in total (12109ms).
[18:46:51.587] <TB1> INFO: Expecting 655360 events.
[18:47:04.707] <TB1> INFO: 655360 events read in total (12535ms).
[18:47:04.736] <TB1> INFO: Expecting 655360 events.
[18:47:17.572] <TB1> INFO: 655360 events read in total (12257ms).
[18:47:17.610] <TB1> INFO: Expecting 655360 events.
[18:47:30.515] <TB1> INFO: 655360 events read in total (12349ms).
[18:47:30.553] <TB1> INFO: Expecting 655360 events.
[18:47:43.066] <TB1> INFO: 655360 events read in total (11941ms).
[18:47:43.105] <TB1> INFO: Expecting 655360 events.
[18:47:56.456] <TB1> INFO: 655360 events read in total (12778ms).
[18:47:56.504] <TB1> INFO: Expecting 655360 events.
[18:48:09.437] <TB1> INFO: 655360 events read in total (12389ms).
[18:48:09.492] <TB1> INFO: Expecting 655360 events.
[18:48:22.279] <TB1> INFO: 655360 events read in total (12243ms).
[18:48:22.331] <TB1> INFO: Expecting 655360 events.
[18:48:35.450] <TB1> INFO: 655360 events read in total (12575ms).
[18:48:35.505] <TB1> INFO: Expecting 655360 events.
[18:48:48.072] <TB1> INFO: 655360 events read in total (12017ms).
[18:48:48.142] <TB1> INFO: Expecting 655360 events.
[18:49:00.937] <TB1> INFO: 655360 events read in total (12269ms).
[18:49:01.008] <TB1> INFO: Test took 207760ms.
[18:49:01.098] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:49:01.405] <TB1> INFO: Expecting 655360 events.
[18:49:14.582] <TB1> INFO: 655360 events read in total (12462ms).
[18:49:14.590] <TB1> INFO: Expecting 655360 events.
[18:49:28.062] <TB1> INFO: 655360 events read in total (12872ms).
[18:49:28.074] <TB1> INFO: Expecting 655360 events.
[18:49:41.076] <TB1> INFO: 655360 events read in total (12407ms).
[18:49:41.091] <TB1> INFO: Expecting 655360 events.
[18:49:54.144] <TB1> INFO: 655360 events read in total (12455ms).
[18:49:54.163] <TB1> INFO: Expecting 655360 events.
[18:50:07.382] <TB1> INFO: 655360 events read in total (12625ms).
[18:50:07.404] <TB1> INFO: Expecting 655360 events.
[18:50:20.284] <TB1> INFO: 655360 events read in total (12298ms).
[18:50:20.310] <TB1> INFO: Expecting 655360 events.
[18:50:33.312] <TB1> INFO: 655360 events read in total (12411ms).
[18:50:33.343] <TB1> INFO: Expecting 655360 events.
[18:50:46.133] <TB1> INFO: 655360 events read in total (12209ms).
[18:50:46.173] <TB1> INFO: Expecting 655360 events.
[18:50:59.257] <TB1> INFO: 655360 events read in total (12515ms).
[18:50:59.293] <TB1> INFO: Expecting 655360 events.
[18:51:11.905] <TB1> INFO: 655360 events read in total (12042ms).
[18:51:11.946] <TB1> INFO: Expecting 655360 events.
[18:51:24.918] <TB1> INFO: 655360 events read in total (12402ms).
[18:51:24.969] <TB1> INFO: Expecting 655360 events.
[18:51:37.846] <TB1> INFO: 655360 events read in total (12339ms).
[18:51:37.893] <TB1> INFO: Expecting 655360 events.
[18:51:50.615] <TB1> INFO: 655360 events read in total (12158ms).
[18:51:50.667] <TB1> INFO: Expecting 655360 events.
[18:52:03.202] <TB1> INFO: 655360 events read in total (11976ms).
[18:52:03.255] <TB1> INFO: Expecting 655360 events.
[18:52:16.053] <TB1> INFO: 655360 events read in total (12240ms).
[18:52:16.110] <TB1> INFO: Expecting 655360 events.
[18:52:28.874] <TB1> INFO: 655360 events read in total (12214ms).
[18:52:28.935] <TB1> INFO: Test took 207837ms.
[18:52:29.140] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.149] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.156] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.162] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.169] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.175] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.182] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.189] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.195] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.202] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.208] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.215] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.222] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.228] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.235] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[18:52:29.241] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.248] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C0.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C1.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C2.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C3.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C4.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C5.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C6.dat
[18:52:29.282] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C7.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C8.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C9.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C10.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C11.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C12.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C13.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C14.dat
[18:52:29.283] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//dacParameters35_C15.dat
[18:52:29.610] <TB1> INFO: Expecting 41600 events.
[18:52:33.718] <TB1> INFO: 41600 events read in total (3393ms).
[18:52:33.718] <TB1> INFO: Test took 4432ms.
[18:52:34.395] <TB1> INFO: Expecting 41600 events.
[18:52:38.351] <TB1> INFO: 41600 events read in total (3241ms).
[18:52:38.352] <TB1> INFO: Test took 4301ms.
[18:52:39.007] <TB1> INFO: Expecting 41600 events.
[18:52:43.091] <TB1> INFO: 41600 events read in total (3369ms).
[18:52:43.092] <TB1> INFO: Test took 4409ms.
[18:52:43.419] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:43.551] <TB1> INFO: Expecting 2560 events.
[18:52:44.507] <TB1> INFO: 2560 events read in total (241ms).
[18:52:44.507] <TB1> INFO: Test took 1088ms.
[18:52:44.510] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:45.016] <TB1> INFO: Expecting 2560 events.
[18:52:45.980] <TB1> INFO: 2560 events read in total (249ms).
[18:52:45.980] <TB1> INFO: Test took 1470ms.
[18:52:45.982] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:46.488] <TB1> INFO: Expecting 2560 events.
[18:52:47.451] <TB1> INFO: 2560 events read in total (248ms).
[18:52:47.451] <TB1> INFO: Test took 1469ms.
[18:52:47.454] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:47.960] <TB1> INFO: Expecting 2560 events.
[18:52:48.917] <TB1> INFO: 2560 events read in total (242ms).
[18:52:48.918] <TB1> INFO: Test took 1464ms.
[18:52:48.920] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:49.425] <TB1> INFO: Expecting 2560 events.
[18:52:50.383] <TB1> INFO: 2560 events read in total (243ms).
[18:52:50.383] <TB1> INFO: Test took 1463ms.
[18:52:50.385] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:50.892] <TB1> INFO: Expecting 2560 events.
[18:52:51.862] <TB1> INFO: 2560 events read in total (256ms).
[18:52:51.863] <TB1> INFO: Test took 1478ms.
[18:52:51.865] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:52.371] <TB1> INFO: Expecting 2560 events.
[18:52:53.334] <TB1> INFO: 2560 events read in total (248ms).
[18:52:53.334] <TB1> INFO: Test took 1469ms.
[18:52:53.337] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:53.843] <TB1> INFO: Expecting 2560 events.
[18:52:54.815] <TB1> INFO: 2560 events read in total (257ms).
[18:52:54.815] <TB1> INFO: Test took 1478ms.
[18:52:54.817] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:55.324] <TB1> INFO: Expecting 2560 events.
[18:52:56.282] <TB1> INFO: 2560 events read in total (243ms).
[18:52:56.282] <TB1> INFO: Test took 1465ms.
[18:52:56.283] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:56.790] <TB1> INFO: Expecting 2560 events.
[18:52:57.747] <TB1> INFO: 2560 events read in total (243ms).
[18:52:57.747] <TB1> INFO: Test took 1464ms.
[18:52:57.750] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:58.255] <TB1> INFO: Expecting 2560 events.
[18:52:59.213] <TB1> INFO: 2560 events read in total (243ms).
[18:52:59.213] <TB1> INFO: Test took 1464ms.
[18:52:59.215] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:59.721] <TB1> INFO: Expecting 2560 events.
[18:53:00.678] <TB1> INFO: 2560 events read in total (242ms).
[18:53:00.678] <TB1> INFO: Test took 1463ms.
[18:53:00.680] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:01.187] <TB1> INFO: Expecting 2560 events.
[18:53:02.143] <TB1> INFO: 2560 events read in total (241ms).
[18:53:02.144] <TB1> INFO: Test took 1464ms.
[18:53:02.146] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:02.652] <TB1> INFO: Expecting 2560 events.
[18:53:03.607] <TB1> INFO: 2560 events read in total (241ms).
[18:53:03.608] <TB1> INFO: Test took 1462ms.
[18:53:03.609] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:04.116] <TB1> INFO: Expecting 2560 events.
[18:53:05.073] <TB1> INFO: 2560 events read in total (242ms).
[18:53:05.073] <TB1> INFO: Test took 1464ms.
[18:53:05.074] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:05.582] <TB1> INFO: Expecting 2560 events.
[18:53:06.556] <TB1> INFO: 2560 events read in total (260ms).
[18:53:06.557] <TB1> INFO: Test took 1483ms.
[18:53:06.559] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:07.065] <TB1> INFO: Expecting 2560 events.
[18:53:08.036] <TB1> INFO: 2560 events read in total (256ms).
[18:53:08.036] <TB1> INFO: Test took 1478ms.
[18:53:08.037] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:08.545] <TB1> INFO: Expecting 2560 events.
[18:53:09.504] <TB1> INFO: 2560 events read in total (244ms).
[18:53:09.504] <TB1> INFO: Test took 1467ms.
[18:53:09.506] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:10.013] <TB1> INFO: Expecting 2560 events.
[18:53:10.971] <TB1> INFO: 2560 events read in total (243ms).
[18:53:10.972] <TB1> INFO: Test took 1466ms.
[18:53:10.973] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:11.481] <TB1> INFO: Expecting 2560 events.
[18:53:12.456] <TB1> INFO: 2560 events read in total (260ms).
[18:53:12.457] <TB1> INFO: Test took 1484ms.
[18:53:12.459] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:12.966] <TB1> INFO: Expecting 2560 events.
[18:53:13.927] <TB1> INFO: 2560 events read in total (247ms).
[18:53:13.928] <TB1> INFO: Test took 1469ms.
[18:53:13.930] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:14.436] <TB1> INFO: Expecting 2560 events.
[18:53:15.397] <TB1> INFO: 2560 events read in total (246ms).
[18:53:15.397] <TB1> INFO: Test took 1467ms.
[18:53:15.399] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:15.907] <TB1> INFO: Expecting 2560 events.
[18:53:16.869] <TB1> INFO: 2560 events read in total (247ms).
[18:53:16.870] <TB1> INFO: Test took 1471ms.
[18:53:16.872] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:17.378] <TB1> INFO: Expecting 2560 events.
[18:53:18.336] <TB1> INFO: 2560 events read in total (243ms).
[18:53:18.336] <TB1> INFO: Test took 1465ms.
[18:53:18.338] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:18.845] <TB1> INFO: Expecting 2560 events.
[18:53:19.820] <TB1> INFO: 2560 events read in total (260ms).
[18:53:19.820] <TB1> INFO: Test took 1482ms.
[18:53:19.822] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:20.329] <TB1> INFO: Expecting 2560 events.
[18:53:21.305] <TB1> INFO: 2560 events read in total (261ms).
[18:53:21.305] <TB1> INFO: Test took 1483ms.
[18:53:21.307] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:21.814] <TB1> INFO: Expecting 2560 events.
[18:53:22.775] <TB1> INFO: 2560 events read in total (246ms).
[18:53:22.776] <TB1> INFO: Test took 1469ms.
[18:53:22.778] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:23.285] <TB1> INFO: Expecting 2560 events.
[18:53:24.247] <TB1> INFO: 2560 events read in total (247ms).
[18:53:24.248] <TB1> INFO: Test took 1471ms.
[18:53:24.250] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:24.757] <TB1> INFO: Expecting 2560 events.
[18:53:25.718] <TB1> INFO: 2560 events read in total (246ms).
[18:53:25.719] <TB1> INFO: Test took 1469ms.
[18:53:25.721] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:26.227] <TB1> INFO: Expecting 2560 events.
[18:53:27.203] <TB1> INFO: 2560 events read in total (261ms).
[18:53:27.204] <TB1> INFO: Test took 1483ms.
[18:53:27.206] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:27.712] <TB1> INFO: Expecting 2560 events.
[18:53:28.671] <TB1> INFO: 2560 events read in total (244ms).
[18:53:28.671] <TB1> INFO: Test took 1465ms.
[18:53:28.674] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:29.180] <TB1> INFO: Expecting 2560 events.
[18:53:30.152] <TB1> INFO: 2560 events read in total (257ms).
[18:53:30.152] <TB1> INFO: Test took 1479ms.
[18:53:30.861] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 515 seconds
[18:53:30.861] <TB1> INFO: PH scale (per ROC): 74 69 73 77 89 78 84 81 80 75 84 87 85 84 79 79
[18:53:30.861] <TB1> INFO: PH offset (per ROC): 163 160 172 161 165 167 151 158 163 166 159 148 157 163 167 171
[18:53:30.865] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:53:30.865] <TB1> INFO: Decoding statistics:
[18:53:30.865] <TB1> INFO: General information:
[18:53:30.865] <TB1> INFO: 16bit words read: 66444
[18:53:30.865] <TB1> INFO: valid events total: 5120
[18:53:30.865] <TB1> INFO: empty events: 2618
[18:53:30.865] <TB1> INFO: valid events with pixels: 2502
[18:53:30.865] <TB1> INFO: valid pixel hits: 2502
[18:53:30.865] <TB1> INFO: Event errors: 0
[18:53:30.865] <TB1> INFO: start marker: 0
[18:53:30.865] <TB1> INFO: stop marker: 0
[18:53:30.865] <TB1> INFO: overflow: 0
[18:53:30.865] <TB1> INFO: invalid 5bit words: 0
[18:53:30.865] <TB1> INFO: invalid XOR eye diagram: 0
[18:53:30.865] <TB1> INFO: TBM errors: 0
[18:53:30.865] <TB1> INFO: flawed TBM headers: 0
[18:53:30.865] <TB1> INFO: flawed TBM trailers: 0
[18:53:30.865] <TB1> INFO: event ID mismatches: 0
[18:53:30.865] <TB1> INFO: ROC errors: 0
[18:53:30.865] <TB1> INFO: missing ROC header(s): 0
[18:53:30.865] <TB1> INFO: misplaced readback start: 0
[18:53:30.865] <TB1> INFO: Pixel decoding errors: 0
[18:53:30.865] <TB1> INFO: pixel data incomplete: 0
[18:53:30.865] <TB1> INFO: pixel address: 0
[18:53:30.865] <TB1> INFO: pulse height fill bit: 0
[18:53:30.865] <TB1> INFO: buffer corruption: 0
[18:53:31.037] <TB1> INFO: ######################################################################
[18:53:31.037] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:53:31.037] <TB1> INFO: ######################################################################
[18:53:31.047] <TB1> INFO: scanning low vcal = 10
[18:53:31.360] <TB1> INFO: Expecting 41600 events.
[18:53:35.191] <TB1> INFO: 41600 events read in total (3116ms).
[18:53:35.191] <TB1> INFO: Test took 4144ms.
[18:53:35.193] <TB1> INFO: scanning low vcal = 20
[18:53:35.699] <TB1> INFO: Expecting 41600 events.
[18:53:39.524] <TB1> INFO: 41600 events read in total (3110ms).
[18:53:39.525] <TB1> INFO: Test took 4332ms.
[18:53:39.526] <TB1> INFO: scanning low vcal = 30
[18:53:40.032] <TB1> INFO: Expecting 41600 events.
[18:53:43.891] <TB1> INFO: 41600 events read in total (3144ms).
[18:53:43.891] <TB1> INFO: Test took 4365ms.
[18:53:43.893] <TB1> INFO: scanning low vcal = 40
[18:53:44.389] <TB1> INFO: Expecting 41600 events.
[18:53:48.826] <TB1> INFO: 41600 events read in total (3722ms).
[18:53:48.828] <TB1> INFO: Test took 4935ms.
[18:53:48.830] <TB1> INFO: scanning low vcal = 50
[18:53:49.277] <TB1> INFO: Expecting 41600 events.
[18:53:53.767] <TB1> INFO: 41600 events read in total (3775ms).
[18:53:53.768] <TB1> INFO: Test took 4938ms.
[18:53:53.770] <TB1> INFO: scanning low vcal = 60
[18:53:54.212] <TB1> INFO: Expecting 41600 events.
[18:53:58.640] <TB1> INFO: 41600 events read in total (3713ms).
[18:53:58.641] <TB1> INFO: Test took 4871ms.
[18:53:58.643] <TB1> INFO: scanning low vcal = 70
[18:53:59.086] <TB1> INFO: Expecting 41600 events.
[18:54:03.516] <TB1> INFO: 41600 events read in total (3716ms).
[18:54:03.517] <TB1> INFO: Test took 4874ms.
[18:54:03.519] <TB1> INFO: scanning low vcal = 80
[18:54:03.968] <TB1> INFO: Expecting 41600 events.
[18:54:08.353] <TB1> INFO: 41600 events read in total (3670ms).
[18:54:08.354] <TB1> INFO: Test took 4835ms.
[18:54:08.356] <TB1> INFO: scanning low vcal = 90
[18:54:08.807] <TB1> INFO: Expecting 41600 events.
[18:54:13.182] <TB1> INFO: 41600 events read in total (3661ms).
[18:54:13.182] <TB1> INFO: Test took 4826ms.
[18:54:13.185] <TB1> INFO: scanning low vcal = 100
[18:54:13.595] <TB1> INFO: Expecting 41600 events.
[18:54:18.073] <TB1> INFO: 41600 events read in total (3764ms).
[18:54:18.073] <TB1> INFO: Test took 4888ms.
[18:54:18.076] <TB1> INFO: scanning low vcal = 110
[18:54:18.522] <TB1> INFO: Expecting 41600 events.
[18:54:22.833] <TB1> INFO: 41600 events read in total (3596ms).
[18:54:22.833] <TB1> INFO: Test took 4758ms.
[18:54:22.836] <TB1> INFO: scanning low vcal = 120
[18:54:23.279] <TB1> INFO: Expecting 41600 events.
[18:54:27.653] <TB1> INFO: 41600 events read in total (3659ms).
[18:54:27.653] <TB1> INFO: Test took 4817ms.
[18:54:27.655] <TB1> INFO: scanning low vcal = 130
[18:54:28.101] <TB1> INFO: Expecting 41600 events.
[18:54:32.511] <TB1> INFO: 41600 events read in total (3695ms).
[18:54:32.512] <TB1> INFO: Test took 4857ms.
[18:54:32.514] <TB1> INFO: scanning low vcal = 140
[18:54:32.964] <TB1> INFO: Expecting 41600 events.
[18:54:37.493] <TB1> INFO: 41600 events read in total (3814ms).
[18:54:37.493] <TB1> INFO: Test took 4979ms.
[18:54:37.500] <TB1> INFO: scanning low vcal = 150
[18:54:37.937] <TB1> INFO: Expecting 41600 events.
[18:54:42.381] <TB1> INFO: 41600 events read in total (3729ms).
[18:54:42.382] <TB1> INFO: Test took 4882ms.
[18:54:42.384] <TB1> INFO: scanning low vcal = 160
[18:54:42.792] <TB1> INFO: Expecting 41600 events.
[18:54:47.108] <TB1> INFO: 41600 events read in total (3601ms).
[18:54:47.108] <TB1> INFO: Test took 4724ms.
[18:54:47.111] <TB1> INFO: scanning low vcal = 170
[18:54:47.553] <TB1> INFO: Expecting 41600 events.
[18:54:52.010] <TB1> INFO: 41600 events read in total (3742ms).
[18:54:52.010] <TB1> INFO: Test took 4899ms.
[18:54:52.014] <TB1> INFO: scanning low vcal = 180
[18:54:52.459] <TB1> INFO: Expecting 41600 events.
[18:54:56.937] <TB1> INFO: 41600 events read in total (3763ms).
[18:54:56.937] <TB1> INFO: Test took 4923ms.
[18:54:56.939] <TB1> INFO: scanning low vcal = 190
[18:54:57.389] <TB1> INFO: Expecting 41600 events.
[18:55:01.887] <TB1> INFO: 41600 events read in total (3783ms).
[18:55:01.888] <TB1> INFO: Test took 4949ms.
[18:55:01.890] <TB1> INFO: scanning low vcal = 200
[18:55:02.299] <TB1> INFO: Expecting 41600 events.
[18:55:06.681] <TB1> INFO: 41600 events read in total (3668ms).
[18:55:06.682] <TB1> INFO: Test took 4792ms.
[18:55:06.684] <TB1> INFO: scanning low vcal = 210
[18:55:07.093] <TB1> INFO: Expecting 41600 events.
[18:55:11.425] <TB1> INFO: 41600 events read in total (3617ms).
[18:55:11.426] <TB1> INFO: Test took 4742ms.
[18:55:11.428] <TB1> INFO: scanning low vcal = 220
[18:55:11.875] <TB1> INFO: Expecting 41600 events.
[18:55:16.327] <TB1> INFO: 41600 events read in total (3737ms).
[18:55:16.328] <TB1> INFO: Test took 4900ms.
[18:55:16.330] <TB1> INFO: scanning low vcal = 230
[18:55:16.771] <TB1> INFO: Expecting 41600 events.
[18:55:21.239] <TB1> INFO: 41600 events read in total (3753ms).
[18:55:21.239] <TB1> INFO: Test took 4909ms.
[18:55:21.241] <TB1> INFO: scanning low vcal = 240
[18:55:21.681] <TB1> INFO: Expecting 41600 events.
[18:55:26.193] <TB1> INFO: 41600 events read in total (3797ms).
[18:55:26.193] <TB1> INFO: Test took 4952ms.
[18:55:26.196] <TB1> INFO: scanning low vcal = 250
[18:55:26.616] <TB1> INFO: Expecting 41600 events.
[18:55:31.023] <TB1> INFO: 41600 events read in total (3692ms).
[18:55:31.023] <TB1> INFO: Test took 4827ms.
[18:55:31.027] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[18:55:31.470] <TB1> INFO: Expecting 41600 events.
[18:55:35.891] <TB1> INFO: 41600 events read in total (3706ms).
[18:55:35.892] <TB1> INFO: Test took 4865ms.
[18:55:35.899] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[18:55:36.342] <TB1> INFO: Expecting 41600 events.
[18:55:40.916] <TB1> INFO: 41600 events read in total (3859ms).
[18:55:40.916] <TB1> INFO: Test took 5017ms.
[18:55:40.929] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[18:55:41.355] <TB1> INFO: Expecting 41600 events.
[18:55:45.751] <TB1> INFO: 41600 events read in total (3681ms).
[18:55:45.751] <TB1> INFO: Test took 4822ms.
[18:55:45.754] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[18:55:46.186] <TB1> INFO: Expecting 41600 events.
[18:55:50.592] <TB1> INFO: 41600 events read in total (3691ms).
[18:55:50.592] <TB1> INFO: Test took 4838ms.
[18:55:50.594] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:55:51.041] <TB1> INFO: Expecting 41600 events.
[18:55:55.508] <TB1> INFO: 41600 events read in total (3752ms).
[18:55:55.508] <TB1> INFO: Test took 4914ms.
[18:55:55.983] <TB1> INFO: PixTestGainPedestal::measure() done
[18:56:30.788] <TB1> INFO: PixTestGainPedestal::fit() done
[18:56:30.788] <TB1> INFO: non-linearity mean: 0.956 0.954 0.962 0.961 0.962 0.959 0.958 0.954 0.957 0.958 0.956 0.956 0.952 0.963 0.955 0.956
[18:56:30.788] <TB1> INFO: non-linearity RMS: 0.007 0.006 0.007 0.005 0.005 0.007 0.005 0.006 0.005 0.006 0.006 0.005 0.006 0.006 0.006 0.006
[18:56:30.788] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[18:56:30.816] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[18:56:30.843] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[18:56:30.870] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[18:56:30.898] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[18:56:30.926] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[18:56:30.954] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[18:56:30.982] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[18:56:31.009] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[18:56:31.036] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[18:56:31.054] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[18:56:31.072] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[18:56:31.090] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[18:56:31.108] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[18:56:31.126] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[18:56:31.144] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[18:56:31.162] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 180 seconds
[18:56:31.162] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:56:31.162] <TB1> INFO: Decoding statistics:
[18:56:31.162] <TB1> INFO: General information:
[18:56:31.162] <TB1> INFO: 16bit words read: 2329200
[18:56:31.162] <TB1> INFO: valid events total: 83200
[18:56:31.162] <TB1> INFO: empty events: 0
[18:56:31.162] <TB1> INFO: valid events with pixels: 83200
[18:56:31.162] <TB1> INFO: valid pixel hits: 665400
[18:56:31.162] <TB1> INFO: Event errors: 0
[18:56:31.162] <TB1> INFO: start marker: 0
[18:56:31.162] <TB1> INFO: stop marker: 0
[18:56:31.162] <TB1> INFO: overflow: 0
[18:56:31.162] <TB1> INFO: invalid 5bit words: 0
[18:56:31.162] <TB1> INFO: invalid XOR eye diagram: 0
[18:56:31.162] <TB1> INFO: TBM errors: 0
[18:56:31.162] <TB1> INFO: flawed TBM headers: 0
[18:56:31.162] <TB1> INFO: flawed TBM trailers: 0
[18:56:31.162] <TB1> INFO: event ID mismatches: 0
[18:56:31.162] <TB1> INFO: ROC errors: 0
[18:56:31.162] <TB1> INFO: missing ROC header(s): 0
[18:56:31.162] <TB1> INFO: misplaced readback start: 0
[18:56:31.162] <TB1> INFO: Pixel decoding errors: 0
[18:56:31.162] <TB1> INFO: pixel data incomplete: 0
[18:56:31.162] <TB1> INFO: pixel address: 0
[18:56:31.162] <TB1> INFO: pulse height fill bit: 0
[18:56:31.162] <TB1> INFO: buffer corruption: 0
[18:56:31.168] <TB1> INFO: readReadbackCal: /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C15.dat
[18:56:31.170] <TB1> INFO: ######################################################################
[18:56:31.170] <TB1> INFO: PixTestReadback::doTest()
[18:56:31.170] <TB1> INFO: ######################################################################
[18:56:31.170] <TB1> INFO: PixTestReadback::RES sent once
[18:56:42.364] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C0.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C1.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C2.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C3.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C4.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C5.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C6.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C7.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C8.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C9.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C10.dat
[18:56:42.365] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C11.dat
[18:56:42.366] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C12.dat
[18:56:42.366] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C13.dat
[18:56:42.366] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C14.dat
[18:56:42.366] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C15.dat
[18:56:42.393] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[18:56:42.393] <TB1> INFO: PixTestReadback::RES sent once
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C0.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C1.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C2.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C3.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C4.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C5.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C6.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C7.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C8.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C9.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C10.dat
[18:56:53.537] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C11.dat
[18:56:53.538] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C12.dat
[18:56:53.538] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C13.dat
[18:56:53.538] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C14.dat
[18:56:53.538] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C15.dat
[18:56:53.559] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[18:56:53.560] <TB1> INFO: PixTestReadback::RES sent once
[18:57:02.130] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[18:57:02.130] <TB1> INFO: Vbg will be calibrated using Vd calibration
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.5calibrated Vbg = 1.21327 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 158.3calibrated Vbg = 1.2167 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.3calibrated Vbg = 1.2167 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 161.5calibrated Vbg = 1.21682 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 146calibrated Vbg = 1.22407 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 162.7calibrated Vbg = 1.23047 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147calibrated Vbg = 1.22045 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 146calibrated Vbg = 1.22615 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156.1calibrated Vbg = 1.2302 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 144.3calibrated Vbg = 1.22125 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 162.7calibrated Vbg = 1.22785 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 151.2calibrated Vbg = 1.22785 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.4calibrated Vbg = 1.21701 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.5calibrated Vbg = 1.21952 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.4calibrated Vbg = 1.21749 :::*/*/*/*/
[18:57:02.130] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 162.2calibrated Vbg = 1.21152 :::*/*/*/*/
[18:57:02.133] <TB1> INFO: PixTestReadback::RES sent once
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C0.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C1.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C2.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C3.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C4.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C5.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C6.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C7.dat
[18:59:55.934] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C8.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C9.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C10.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C11.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C12.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C13.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C14.dat
[18:59:55.935] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3017_FullQualification_2015-10-29_13h48m_1446122896//002_FulltestPxar_m20//readbackCal_C15.dat
[18:59:55.961] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[18:59:55.962] <TB1> INFO: PixTestReadback::doTest() done
[18:59:55.962] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:59:55.962] <TB1> INFO: Decoding statistics:
[18:59:55.962] <TB1> INFO: General information:
[18:59:55.962] <TB1> INFO: 16bit words read: 768
[18:59:55.962] <TB1> INFO: valid events total: 64
[18:59:55.962] <TB1> INFO: empty events: 64
[18:59:55.962] <TB1> INFO: valid events with pixels: 0
[18:59:55.962] <TB1> INFO: valid pixel hits: 0
[18:59:55.962] <TB1> INFO: Event errors: 0
[18:59:55.962] <TB1> INFO: start marker: 0
[18:59:55.962] <TB1> INFO: stop marker: 0
[18:59:55.962] <TB1> INFO: overflow: 0
[18:59:55.962] <TB1> INFO: invalid 5bit words: 0
[18:59:55.962] <TB1> INFO: invalid XOR eye diagram: 0
[18:59:55.962] <TB1> INFO: TBM errors: 0
[18:59:55.962] <TB1> INFO: flawed TBM headers: 0
[18:59:55.962] <TB1> INFO: flawed TBM trailers: 0
[18:59:55.962] <TB1> INFO: event ID mismatches: 0
[18:59:55.963] <TB1> INFO: ROC errors: 0
[18:59:55.963] <TB1> INFO: missing ROC header(s): 0
[18:59:55.963] <TB1> INFO: misplaced readback start: 0
[18:59:55.963] <TB1> INFO: Pixel decoding errors: 0
[18:59:55.963] <TB1> INFO: pixel data incomplete: 0
[18:59:55.963] <TB1> INFO: pixel address: 0
[18:59:55.963] <TB1> INFO: pulse height fill bit: 0
[18:59:55.963] <TB1> INFO: buffer corruption: 0
[18:59:55.985] <TB1> INFO: Decoding statistics:
[18:59:55.985] <TB1> INFO: General information:
[18:59:55.985] <TB1> INFO: 16bit words read: 2396412
[18:59:55.985] <TB1> INFO: valid events total: 88384
[18:59:55.985] <TB1> INFO: empty events: 2682
[18:59:55.985] <TB1> INFO: valid events with pixels: 85702
[18:59:55.985] <TB1> INFO: valid pixel hits: 667902
[18:59:55.985] <TB1> INFO: Event errors: 0
[18:59:55.985] <TB1> INFO: start marker: 0
[18:59:55.985] <TB1> INFO: stop marker: 0
[18:59:55.985] <TB1> INFO: overflow: 0
[18:59:55.985] <TB1> INFO: invalid 5bit words: 0
[18:59:55.985] <TB1> INFO: invalid XOR eye diagram: 0
[18:59:55.985] <TB1> INFO: TBM errors: 0
[18:59:55.985] <TB1> INFO: flawed TBM headers: 0
[18:59:55.985] <TB1> INFO: flawed TBM trailers: 0
[18:59:55.985] <TB1> INFO: event ID mismatches: 0
[18:59:55.985] <TB1> INFO: ROC errors: 0
[18:59:55.985] <TB1> INFO: missing ROC header(s): 0
[18:59:55.985] <TB1> INFO: misplaced readback start: 0
[18:59:55.985] <TB1> INFO: Pixel decoding errors: 0
[18:59:55.985] <TB1> INFO: pixel data incomplete: 0
[18:59:55.985] <TB1> INFO: pixel address: 0
[18:59:55.985] <TB1> INFO: pulse height fill bit: 0
[18:59:55.985] <TB1> INFO: buffer corruption: 0
[18:59:55.985] <TB1> INFO: enter test to run
[18:59:55.985] <TB1> INFO: test: exit no parameter change
[18:59:56.193] <TB1> QUIET: Connection to board 154 closed.
[18:59:56.274] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v0.6.7-20-g27c4078 on branch compareCenters