[11:12:33.190] <TB0> INFO: *** Welcome to pxar ***
[11:12:33.190] <TB0> INFO: *** Today: 2016/11/15
[11:12:33.195] <TB0> INFO: *** Version: c8ba-dirty
[11:12:33.196] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C15.dat
[11:12:33.196] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C1b.dat
[11:12:33.196] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//defaultMaskFile.dat
[11:12:33.196] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters_C15.dat
[11:12:33.250] <TB0> INFO: clk: 4
[11:12:33.250] <TB0> INFO: ctr: 4
[11:12:33.250] <TB0> INFO: sda: 19
[11:12:33.250] <TB0> INFO: tin: 9
[11:12:33.250] <TB0> INFO: level: 15
[11:12:33.250] <TB0> INFO: triggerdelay: 0
[11:12:33.250] <TB0> QUIET: Instanciating API for pxar v2.1.0+875~gda35c4c
[11:12:33.250] <TB0> INFO: Log level: INFO
[11:12:33.259] <TB0> INFO: Found DTB DTB_WS6AYH
[11:12:33.266] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[11:12:33.268] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[11:12:33.270] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[11:12:34.755] <TB0> INFO: DUT info:
[11:12:34.755] <TB0> INFO: The DUT currently contains the following objects:
[11:12:34.755] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[11:12:34.755] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:12:34.755] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:12:34.755] <TB0> INFO: TBM Core alpha (2): 7 registers set
[11:12:34.755] <TB0> INFO: TBM Core beta (3): 7 registers set
[11:12:34.755] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:12:34.755] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:34.755] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:12:35.156] <TB0> INFO: enter 'restricted' command line mode
[11:12:35.156] <TB0> INFO: enter test to run
[11:12:35.156] <TB0> INFO: test: pretest no parameter change
[11:12:35.156] <TB0> INFO: running: pretest
[11:12:35.700] <TB0> INFO: ######################################################################
[11:12:35.700] <TB0> INFO: PixTestPretest::doTest()
[11:12:35.700] <TB0> INFO: ######################################################################
[11:12:35.701] <TB0> INFO: ----------------------------------------------------------------------
[11:12:35.701] <TB0> INFO: PixTestPretest::programROC()
[11:12:35.701] <TB0> INFO: ----------------------------------------------------------------------
[11:12:53.715] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:12:53.715] <TB0> INFO: IA differences per ROC: 19.3 18.5 19.3 22.5 20.1 20.1 19.3 17.7 19.3 17.7 19.3 20.1 21.7 19.3 19.3 22.5
[11:12:53.748] <TB0> INFO: ----------------------------------------------------------------------
[11:12:53.748] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:12:53.748] <TB0> INFO: ----------------------------------------------------------------------
[11:13:00.822] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[11:13:00.822] <TB0> INFO: i(loss) [mA/ROC]: 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[11:13:00.848] <TB0> INFO: ----------------------------------------------------------------------
[11:13:00.848] <TB0> INFO: PixTestPretest::findTiming()
[11:13:00.848] <TB0> INFO: ----------------------------------------------------------------------
[11:13:00.848] <TB0> INFO: PixTestCmd::init()

[11:13:32.080] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:13:32.080] <TB0> INFO: (success/tries = 100/100), width = 3
[11:13:33.589] <TB0> INFO: ----------------------------------------------------------------------
[11:13:33.589] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:13:33.589] <TB0> INFO: ----------------------------------------------------------------------
[11:13:33.680] <TB0> INFO: Expecting 231680 events.
[11:13:43.388] <TB0> INFO: 231680 events read in total (9116ms).
[11:13:43.395] <TB0> INFO: Test took 9804ms.
[11:13:43.636] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:13:43.667] <TB0> INFO: ----------------------------------------------------------------------
[11:13:43.667] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:13:43.667] <TB0> INFO: ----------------------------------------------------------------------
[11:13:43.760] <TB0> INFO: Expecting 231680 events.
[11:13:53.584] <TB0> INFO: 231680 events read in total (9232ms).
[11:13:53.590] <TB0> INFO: Test took 9919ms.
[11:13:53.857] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:13:53.857] <TB0> INFO: CalDel: 108 132 104 131 100 130 142 126 112 104 100 96 93 96 108 107
[11:13:53.857] <TB0> INFO: VthrComp: 51 51 51 55 51 51 51 51 51 51 55 51 51 51 51 53
[11:13:53.859] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C0.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C1.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C2.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C3.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C4.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C5.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C6.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C7.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C8.dat
[11:13:53.860] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C9.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C10.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C11.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C12.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C13.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C14.dat
[11:13:53.861] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters_C15.dat
[11:13:53.861] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C0a.dat
[11:13:53.861] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C0b.dat
[11:13:53.861] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C1a.dat
[11:13:53.861] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//tbmParameters_C1b.dat
[11:13:53.861] <TB0> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[11:13:53.955] <TB0> INFO: enter test to run
[11:13:53.955] <TB0> INFO: test: FullTest no parameter change
[11:13:53.955] <TB0> INFO: running: fulltest
[11:13:53.956] <TB0> INFO: ######################################################################
[11:13:53.956] <TB0> INFO: PixTestFullTest::doTest()
[11:13:53.956] <TB0> INFO: ######################################################################
[11:13:53.957] <TB0> INFO: ######################################################################
[11:13:53.957] <TB0> INFO: PixTestAlive::doTest()
[11:13:53.957] <TB0> INFO: ######################################################################
[11:13:53.958] <TB0> INFO: ----------------------------------------------------------------------
[11:13:53.958] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:13:53.958] <TB0> INFO: ----------------------------------------------------------------------
[11:13:54.190] <TB0> INFO: Expecting 41600 events.
[11:13:57.798] <TB0> INFO: 41600 events read in total (3016ms).
[11:13:57.799] <TB0> INFO: Test took 3840ms.
[11:13:58.024] <TB0> INFO: PixTestAlive::aliveTest() done
[11:13:58.024] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
[11:13:58.025] <TB0> INFO: ----------------------------------------------------------------------
[11:13:58.025] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:13:58.025] <TB0> INFO: ----------------------------------------------------------------------
[11:13:58.338] <TB0> INFO: Expecting 41600 events.
[11:14:01.614] <TB0> INFO: 41600 events read in total (2684ms).
[11:14:01.615] <TB0> INFO: Test took 3589ms.
[11:14:01.615] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:14:01.850] <TB0> INFO: PixTestAlive::maskTest() done
[11:14:01.851] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:14:01.852] <TB0> INFO: ----------------------------------------------------------------------
[11:14:01.852] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:14:01.852] <TB0> INFO: ----------------------------------------------------------------------
[11:14:02.084] <TB0> INFO: Expecting 41600 events.
[11:14:05.665] <TB0> INFO: 41600 events read in total (2989ms).
[11:14:05.665] <TB0> INFO: Test took 3812ms.
[11:14:05.891] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:14:05.891] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:14:05.891] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:14:05.891] <TB0> INFO: Decoding statistics:
[11:14:05.891] <TB0> INFO: General information:
[11:14:05.891] <TB0> INFO: 16bit words read: 0
[11:14:05.891] <TB0> INFO: valid events total: 0
[11:14:05.891] <TB0> INFO: empty events: 0
[11:14:05.891] <TB0> INFO: valid events with pixels: 0
[11:14:05.891] <TB0> INFO: valid pixel hits: 0
[11:14:05.891] <TB0> INFO: Event errors: 0
[11:14:05.891] <TB0> INFO: start marker: 0
[11:14:05.891] <TB0> INFO: stop marker: 0
[11:14:05.891] <TB0> INFO: overflow: 0
[11:14:05.891] <TB0> INFO: invalid 5bit words: 0
[11:14:05.891] <TB0> INFO: invalid XOR eye diagram: 0
[11:14:05.891] <TB0> INFO: frame (failed synchr.): 0
[11:14:05.891] <TB0> INFO: idle data (no TBM trl): 0
[11:14:05.891] <TB0> INFO: no data (only TBM hdr): 0
[11:14:05.891] <TB0> INFO: TBM errors: 0
[11:14:05.891] <TB0> INFO: flawed TBM headers: 0
[11:14:05.891] <TB0> INFO: flawed TBM trailers: 0
[11:14:05.891] <TB0> INFO: event ID mismatches: 0
[11:14:05.891] <TB0> INFO: ROC errors: 0
[11:14:05.891] <TB0> INFO: missing ROC header(s): 0
[11:14:05.891] <TB0> INFO: misplaced readback start: 0
[11:14:05.891] <TB0> INFO: Pixel decoding errors: 0
[11:14:05.891] <TB0> INFO: pixel data incomplete: 0
[11:14:05.891] <TB0> INFO: pixel address: 0
[11:14:05.891] <TB0> INFO: pulse height fill bit: 0
[11:14:05.891] <TB0> INFO: buffer corruption: 0
[11:14:05.898] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C15.dat
[11:14:05.898] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:14:05.898] <TB0> INFO: ######################################################################
[11:14:05.898] <TB0> INFO: PixTestReadback::doTest()
[11:14:05.898] <TB0> INFO: ######################################################################
[11:14:05.898] <TB0> INFO: ----------------------------------------------------------------------
[11:14:05.898] <TB0> INFO: PixTestReadback::CalibrateVd()
[11:14:05.898] <TB0> INFO: ----------------------------------------------------------------------
[11:14:15.854] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C0.dat
[11:14:15.854] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C1.dat
[11:14:15.854] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C2.dat
[11:14:15.854] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C3.dat
[11:14:15.854] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C4.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C5.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C6.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C7.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C8.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C9.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C10.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C11.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C12.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C13.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C14.dat
[11:14:15.855] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C15.dat
[11:14:15.882] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:14:15.882] <TB0> INFO: ----------------------------------------------------------------------
[11:14:15.882] <TB0> INFO: PixTestReadback::CalibrateVa()
[11:14:15.882] <TB0> INFO: ----------------------------------------------------------------------
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C0.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C1.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C2.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C3.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C4.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C5.dat
[11:14:25.768] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C6.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C7.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C8.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C9.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C10.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C11.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C12.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C13.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C14.dat
[11:14:25.769] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C15.dat
[11:14:25.795] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:14:25.795] <TB0> INFO: ----------------------------------------------------------------------
[11:14:25.795] <TB0> INFO: PixTestReadback::readbackVbg()
[11:14:25.795] <TB0> INFO: ----------------------------------------------------------------------
[11:14:33.435] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:14:33.435] <TB0> INFO: ----------------------------------------------------------------------
[11:14:33.435] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[11:14:33.435] <TB0> INFO: ----------------------------------------------------------------------
[11:14:33.435] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 155.1calibrated Vbg = 1.17292 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.9calibrated Vbg = 1.17735 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.9calibrated Vbg = 1.17002 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159.1calibrated Vbg = 1.17111 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.5calibrated Vbg = 1.17018 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.4calibrated Vbg = 1.17838 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.6calibrated Vbg = 1.17466 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159calibrated Vbg = 1.1816 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 163.5calibrated Vbg = 1.17182 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.9calibrated Vbg = 1.17044 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 168.6calibrated Vbg = 1.16713 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.7calibrated Vbg = 1.17257 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 145.6calibrated Vbg = 1.16679 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 160.2calibrated Vbg = 1.17777 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153calibrated Vbg = 1.17279 :::*/*/*/*/
[11:14:33.435] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 153.3calibrated Vbg = 1.17394 :::*/*/*/*/
[11:14:33.437] <TB0> INFO: ----------------------------------------------------------------------
[11:14:33.437] <TB0> INFO: PixTestReadback::CalibrateIa()
[11:14:33.437] <TB0> INFO: ----------------------------------------------------------------------
[11:17:13.688] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C0.dat
[11:17:13.688] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C1.dat
[11:17:13.688] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C2.dat
[11:17:13.688] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C3.dat
[11:17:13.688] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C4.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C5.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C6.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C7.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C8.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C9.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C10.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C11.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C12.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C13.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C14.dat
[11:17:13.689] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//readbackCal_C15.dat
[11:17:13.716] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:17:13.717] <TB0> INFO: PixTestReadback::doTest() done
[11:17:13.718] <TB0> INFO: Decoding statistics:
[11:17:13.718] <TB0> INFO: General information:
[11:17:13.718] <TB0> INFO: 16bit words read: 1536
[11:17:13.718] <TB0> INFO: valid events total: 256
[11:17:13.718] <TB0> INFO: empty events: 256
[11:17:13.718] <TB0> INFO: valid events with pixels: 0
[11:17:13.718] <TB0> INFO: valid pixel hits: 0
[11:17:13.718] <TB0> INFO: Event errors: 0
[11:17:13.718] <TB0> INFO: start marker: 0
[11:17:13.718] <TB0> INFO: stop marker: 0
[11:17:13.718] <TB0> INFO: overflow: 0
[11:17:13.718] <TB0> INFO: invalid 5bit words: 0
[11:17:13.718] <TB0> INFO: invalid XOR eye diagram: 0
[11:17:13.718] <TB0> INFO: frame (failed synchr.): 0
[11:17:13.718] <TB0> INFO: idle data (no TBM trl): 0
[11:17:13.718] <TB0> INFO: no data (only TBM hdr): 0
[11:17:13.718] <TB0> INFO: TBM errors: 0
[11:17:13.718] <TB0> INFO: flawed TBM headers: 0
[11:17:13.718] <TB0> INFO: flawed TBM trailers: 0
[11:17:13.718] <TB0> INFO: event ID mismatches: 0
[11:17:13.718] <TB0> INFO: ROC errors: 0
[11:17:13.718] <TB0> INFO: missing ROC header(s): 0
[11:17:13.718] <TB0> INFO: misplaced readback start: 0
[11:17:13.718] <TB0> INFO: Pixel decoding errors: 0
[11:17:13.718] <TB0> INFO: pixel data incomplete: 0
[11:17:13.718] <TB0> INFO: pixel address: 0
[11:17:13.718] <TB0> INFO: pulse height fill bit: 0
[11:17:13.718] <TB0> INFO: buffer corruption: 0
[11:17:13.752] <TB0> INFO: ######################################################################
[11:17:13.752] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:17:13.752] <TB0> INFO: ######################################################################
[11:17:13.754] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:17:13.766] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:17:13.766] <TB0> INFO: run 1 of 1
[11:17:13.997] <TB0> INFO: Expecting 3120000 events.
[11:17:46.503] <TB0> INFO: 659220 events read in total (31914ms).











[11:18:17.643] <TB0> INFO: 1313930 events read in total (63054ms).











[11:18:48.181] <TB0> INFO: 1967675 events read in total (93592ms).











[11:19:19.227] <TB0> INFO: 2623360 events read in total (124638ms).











[11:19:42.644] <TB0> INFO: 3120000 events read in total (148055ms).
[11:19:42.700] <TB0> INFO: Test took 148935ms.
[11:20:04.296] <TB0> INFO: PixTestBBMap::doTest() done with 4 decoding errors: , duration: 170 seconds
[11:20:04.296] <TB0> INFO: number of dead bumps (per ROC): 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0
[11:20:04.296] <TB0> INFO: separation cut (per ROC): 99 93 108 106 106 97 86 91 106 93 112 98 95 104 99 105
[11:20:04.296] <TB0> INFO: Decoding statistics:
[11:20:04.296] <TB0> INFO: General information:
[11:20:04.296] <TB0> INFO: 16bit words read: 0
[11:20:04.296] <TB0> INFO: valid events total: 0
[11:20:04.296] <TB0> INFO: empty events: 0
[11:20:04.296] <TB0> INFO: valid events with pixels: 0
[11:20:04.296] <TB0> INFO: valid pixel hits: 0
[11:20:04.296] <TB0> INFO: Event errors: 0
[11:20:04.296] <TB0> INFO: start marker: 0
[11:20:04.296] <TB0> INFO: stop marker: 0
[11:20:04.296] <TB0> INFO: overflow: 0
[11:20:04.296] <TB0> INFO: invalid 5bit words: 0
[11:20:04.296] <TB0> INFO: invalid XOR eye diagram: 0
[11:20:04.296] <TB0> INFO: frame (failed synchr.): 0
[11:20:04.296] <TB0> INFO: idle data (no TBM trl): 0
[11:20:04.296] <TB0> INFO: no data (only TBM hdr): 0
[11:20:04.296] <TB0> INFO: TBM errors: 0
[11:20:04.296] <TB0> INFO: flawed TBM headers: 0
[11:20:04.296] <TB0> INFO: flawed TBM trailers: 0
[11:20:04.296] <TB0> INFO: event ID mismatches: 0
[11:20:04.296] <TB0> INFO: ROC errors: 0
[11:20:04.296] <TB0> INFO: missing ROC header(s): 0
[11:20:04.296] <TB0> INFO: misplaced readback start: 0
[11:20:04.296] <TB0> INFO: Pixel decoding errors: 0
[11:20:04.296] <TB0> INFO: pixel data incomplete: 0
[11:20:04.296] <TB0> INFO: pixel address: 0
[11:20:04.296] <TB0> INFO: pulse height fill bit: 0
[11:20:04.296] <TB0> INFO: buffer corruption: 0
[11:20:04.330] <TB0> INFO: ######################################################################
[11:20:04.330] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:20:04.330] <TB0> INFO: ######################################################################
[11:20:04.330] <TB0> INFO: ----------------------------------------------------------------------
[11:20:04.330] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:20:04.330] <TB0> INFO: ----------------------------------------------------------------------
[11:20:04.331] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:20:04.340] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:20:04.340] <TB0> INFO: run 1 of 1
[11:20:04.624] <TB0> INFO: Expecting 36608000 events.
[11:20:27.866] <TB0> INFO: 678900 events read in total (22650ms).
[11:20:51.611] <TB0> INFO: 1345600 events read in total (46395ms).
[11:21:14.996] <TB0> INFO: 2009550 events read in total (69780ms).
[11:21:39.129] <TB0> INFO: 2672400 events read in total (93913ms).
[11:22:02.344] <TB0> INFO: 3334400 events read in total (117128ms).
[11:22:26.656] <TB0> INFO: 4000000 events read in total (141440ms).
[11:22:49.890] <TB0> INFO: 4662850 events read in total (164674ms).
[11:23:13.932] <TB0> INFO: 5326300 events read in total (188716ms).
[11:23:37.735] <TB0> INFO: 5991200 events read in total (212519ms).
[11:24:01.050] <TB0> INFO: 6657500 events read in total (235834ms).
[11:24:24.536] <TB0> INFO: 7322750 events read in total (259320ms).
[11:24:48.213] <TB0> INFO: 7986450 events read in total (282997ms).
[11:25:12.280] <TB0> INFO: 8649400 events read in total (307064ms).
[11:25:35.909] <TB0> INFO: 9314250 events read in total (330693ms).
[11:25:59.423] <TB0> INFO: 9977400 events read in total (354207ms).
[11:26:22.001] <TB0> INFO: 10642550 events read in total (377785ms).
[11:26:46.954] <TB0> INFO: 11306250 events read in total (401738ms).
[11:27:10.119] <TB0> INFO: 11967750 events read in total (424903ms).
[11:27:33.708] <TB0> INFO: 12629800 events read in total (448492ms).
[11:27:57.262] <TB0> INFO: 13293750 events read in total (472046ms).
[11:28:20.637] <TB0> INFO: 13956550 events read in total (495421ms).
[11:28:43.610] <TB0> INFO: 14621400 events read in total (518394ms).
[11:29:07.510] <TB0> INFO: 15283100 events read in total (542294ms).
[11:29:31.686] <TB0> INFO: 15944250 events read in total (566470ms).
[11:29:55.085] <TB0> INFO: 16606350 events read in total (589869ms).
[11:30:19.288] <TB0> INFO: 17267550 events read in total (614072ms).
[11:30:43.345] <TB0> INFO: 17928200 events read in total (638129ms).
[11:31:07.182] <TB0> INFO: 18590450 events read in total (661966ms).
[11:31:30.686] <TB0> INFO: 19251500 events read in total (685470ms).
[11:31:54.029] <TB0> INFO: 19911200 events read in total (708813ms).
[11:32:18.025] <TB0> INFO: 20570650 events read in total (732809ms).
[11:32:41.913] <TB0> INFO: 21229800 events read in total (756697ms).
[11:33:06.006] <TB0> INFO: 21888850 events read in total (780790ms).
[11:33:29.852] <TB0> INFO: 22546750 events read in total (804636ms).
[11:33:53.598] <TB0> INFO: 23204050 events read in total (828382ms).
[11:34:16.499] <TB0> INFO: 23862050 events read in total (851283ms).
[11:34:40.543] <TB0> INFO: 24522150 events read in total (875327ms).
[11:35:04.058] <TB0> INFO: 25181450 events read in total (898842ms).
[11:35:27.935] <TB0> INFO: 25841550 events read in total (922719ms).
[11:35:50.576] <TB0> INFO: 26500450 events read in total (945360ms).
[11:36:14.295] <TB0> INFO: 27159700 events read in total (969079ms).
[11:36:37.225] <TB0> INFO: 27817550 events read in total (992009ms).
[11:37:01.021] <TB0> INFO: 28475850 events read in total (1015805ms).
[11:37:24.886] <TB0> INFO: 29134500 events read in total (1039670ms).
[11:37:48.446] <TB0> INFO: 29792300 events read in total (1063230ms).
[11:38:12.371] <TB0> INFO: 30451350 events read in total (1087155ms).
[11:38:35.976] <TB0> INFO: 31107650 events read in total (1110760ms).
[11:38:59.552] <TB0> INFO: 31765900 events read in total (1134336ms).
[11:39:23.092] <TB0> INFO: 32423850 events read in total (1157876ms).
[11:39:46.995] <TB0> INFO: 33082550 events read in total (1181779ms).
[11:40:10.240] <TB0> INFO: 33740500 events read in total (1205024ms).
[11:40:33.688] <TB0> INFO: 34400150 events read in total (1228472ms).
[11:40:56.804] <TB0> INFO: 35058100 events read in total (1251589ms).
[11:41:20.480] <TB0> INFO: 35718500 events read in total (1275264ms).
[11:41:44.556] <TB0> INFO: 36386650 events read in total (1299340ms).
[11:41:52.916] <TB0> INFO: 36608000 events read in total (1307700ms).
[11:41:52.969] <TB0> INFO: Test took 1308628ms.
[11:41:53.364] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:41:54.849] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:41:56.367] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:41:57.858] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:41:59.333] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:00.861] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:02.397] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:03.919] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:05.542] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:07.018] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:08.485] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:09.965] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:11.455] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:12.950] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:14.444] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:15.976] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:42:17.510] <TB0> INFO: PixTestScurves::scurves() done
[11:42:17.510] <TB0> INFO: Vcal mean: 119.27 113.22 122.46 129.83 115.11 107.74 110.78 114.42 132.01 114.14 124.38 109.18 101.89 120.71 112.16 126.56
[11:42:17.510] <TB0> INFO: Vcal RMS: 5.76 6.54 5.99 6.27 5.63 5.17 5.73 5.61 6.57 5.74 7.33 4.99 5.03 6.09 5.14 6.26
[11:42:17.511] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1333 seconds
[11:42:17.511] <TB0> INFO: Decoding statistics:
[11:42:17.511] <TB0> INFO: General information:
[11:42:17.511] <TB0> INFO: 16bit words read: 0
[11:42:17.511] <TB0> INFO: valid events total: 0
[11:42:17.511] <TB0> INFO: empty events: 0
[11:42:17.511] <TB0> INFO: valid events with pixels: 0
[11:42:17.511] <TB0> INFO: valid pixel hits: 0
[11:42:17.511] <TB0> INFO: Event errors: 0
[11:42:17.511] <TB0> INFO: start marker: 0
[11:42:17.511] <TB0> INFO: stop marker: 0
[11:42:17.511] <TB0> INFO: overflow: 0
[11:42:17.511] <TB0> INFO: invalid 5bit words: 0
[11:42:17.511] <TB0> INFO: invalid XOR eye diagram: 0
[11:42:17.511] <TB0> INFO: frame (failed synchr.): 0
[11:42:17.511] <TB0> INFO: idle data (no TBM trl): 0
[11:42:17.511] <TB0> INFO: no data (only TBM hdr): 0
[11:42:17.511] <TB0> INFO: TBM errors: 0
[11:42:17.511] <TB0> INFO: flawed TBM headers: 0
[11:42:17.511] <TB0> INFO: flawed TBM trailers: 0
[11:42:17.511] <TB0> INFO: event ID mismatches: 0
[11:42:17.511] <TB0> INFO: ROC errors: 0
[11:42:17.511] <TB0> INFO: missing ROC header(s): 0
[11:42:17.511] <TB0> INFO: misplaced readback start: 0
[11:42:17.511] <TB0> INFO: Pixel decoding errors: 0
[11:42:17.511] <TB0> INFO: pixel data incomplete: 0
[11:42:17.511] <TB0> INFO: pixel address: 0
[11:42:17.511] <TB0> INFO: pulse height fill bit: 0
[11:42:17.511] <TB0> INFO: buffer corruption: 0
[11:42:17.577] <TB0> INFO: ######################################################################
[11:42:17.577] <TB0> INFO: PixTestTrim::doTest()
[11:42:17.577] <TB0> INFO: ######################################################################
[11:42:17.578] <TB0> INFO: ----------------------------------------------------------------------
[11:42:17.578] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:42:17.578] <TB0> INFO: ----------------------------------------------------------------------
[11:42:17.618] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:42:17.618] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:42:17.631] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:42:17.631] <TB0> INFO: run 1 of 1
[11:42:17.864] <TB0> INFO: Expecting 5025280 events.
[11:42:49.266] <TB0> INFO: 822872 events read in total (30808ms).
[11:43:19.807] <TB0> INFO: 1643960 events read in total (61349ms).
[11:43:50.997] <TB0> INFO: 2462488 events read in total (92540ms).
[11:44:21.828] <TB0> INFO: 3277256 events read in total (123370ms).
[11:44:53.201] <TB0> INFO: 4089408 events read in total (154744ms).
[11:45:24.099] <TB0> INFO: 4899504 events read in total (185641ms).
[11:45:29.456] <TB0> INFO: 5025280 events read in total (190998ms).
[11:45:29.503] <TB0> INFO: Test took 191872ms.
[11:45:44.077] <TB0> INFO: ROC 0 VthrComp = 119
[11:45:44.077] <TB0> INFO: ROC 1 VthrComp = 106
[11:45:44.077] <TB0> INFO: ROC 2 VthrComp = 129
[11:45:44.077] <TB0> INFO: ROC 3 VthrComp = 126
[11:45:44.077] <TB0> INFO: ROC 4 VthrComp = 118
[11:45:44.078] <TB0> INFO: ROC 5 VthrComp = 108
[11:45:44.078] <TB0> INFO: ROC 6 VthrComp = 101
[11:45:44.078] <TB0> INFO: ROC 7 VthrComp = 106
[11:45:44.078] <TB0> INFO: ROC 8 VthrComp = 131
[11:45:44.078] <TB0> INFO: ROC 9 VthrComp = 112
[11:45:44.078] <TB0> INFO: ROC 10 VthrComp = 132
[11:45:44.078] <TB0> INFO: ROC 11 VthrComp = 112
[11:45:44.078] <TB0> INFO: ROC 12 VthrComp = 108
[11:45:44.078] <TB0> INFO: ROC 13 VthrComp = 120
[11:45:44.079] <TB0> INFO: ROC 14 VthrComp = 113
[11:45:44.079] <TB0> INFO: ROC 15 VthrComp = 129
[11:45:44.312] <TB0> INFO: Expecting 41600 events.
[11:45:48.080] <TB0> INFO: 41600 events read in total (3176ms).
[11:45:48.080] <TB0> INFO: Test took 4001ms.
[11:45:48.089] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:45:48.089] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:45:48.099] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:48.099] <TB0> INFO: run 1 of 1
[11:45:48.377] <TB0> INFO: Expecting 5025280 events.
[11:46:15.466] <TB0> INFO: 591888 events read in total (26497ms).
[11:46:42.127] <TB0> INFO: 1182880 events read in total (53158ms).
[11:47:08.984] <TB0> INFO: 1774408 events read in total (80015ms).
[11:47:35.293] <TB0> INFO: 2366184 events read in total (106324ms).
[11:48:01.919] <TB0> INFO: 2955656 events read in total (132950ms).
[11:48:28.679] <TB0> INFO: 3544192 events read in total (159710ms).
[11:48:55.474] <TB0> INFO: 4132064 events read in total (186505ms).
[11:49:21.896] <TB0> INFO: 4719608 events read in total (212927ms).
[11:49:36.154] <TB0> INFO: 5025280 events read in total (227185ms).
[11:49:36.213] <TB0> INFO: Test took 228114ms.
[11:49:57.252] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.1918 for pixel 26/19 mean/min/max = 45.9471/30.6227/61.2715
[11:49:57.252] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 69.2657 for pixel 8/78 mean/min/max = 51.0743/32.4322/69.7163
[11:49:57.252] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 60.025 for pixel 1/43 mean/min/max = 45.7234/31.3148/60.1321
[11:49:57.252] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 67.3935 for pixel 1/0 mean/min/max = 48.477/29.489/67.465
[11:49:57.253] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 59.5385 for pixel 26/5 mean/min/max = 45.3326/30.8485/59.8167
[11:49:57.253] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 63.3284 for pixel 6/3 mean/min/max = 48.4832/33.5796/63.3868
[11:49:57.253] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 69.1504 for pixel 0/14 mean/min/max = 50.5467/31.8731/69.2204
[11:49:57.254] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 67.7946 for pixel 41/11 mean/min/max = 50.5111/33.0875/67.9347
[11:49:57.254] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 63.6471 for pixel 23/5 mean/min/max = 47.6373/31.5974/63.6771
[11:49:57.254] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.0923 for pixel 17/5 mean/min/max = 47.1993/32.0303/62.3683
[11:49:57.254] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 63.7616 for pixel 0/41 mean/min/max = 47.789/31.6842/63.8938
[11:49:57.255] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 61.2754 for pixel 0/16 mean/min/max = 46.8185/32.355/61.2821
[11:49:57.255] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 58.8335 for pixel 8/79 mean/min/max = 46.403/33.9481/58.8579
[11:49:57.255] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 63.4179 for pixel 45/12 mean/min/max = 47.4663/31.4782/63.4544
[11:49:57.256] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.7382 for pixel 0/35 mean/min/max = 46.9092/32.045/61.7733
[11:49:57.256] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 62.8562 for pixel 23/32 mean/min/max = 47.1386/31.2655/63.0117
[11:49:57.256] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:57.346] <TB0> INFO: Expecting 411648 events.
[11:50:07.069] <TB0> INFO: 411648 events read in total (9132ms).
[11:50:07.075] <TB0> INFO: Expecting 411648 events.
[11:50:16.735] <TB0> INFO: 411648 events read in total (9257ms).
[11:50:16.744] <TB0> INFO: Expecting 411648 events.
[11:50:26.346] <TB0> INFO: 411648 events read in total (9199ms).
[11:50:26.364] <TB0> INFO: Expecting 411648 events.
[11:50:35.795] <TB0> INFO: 411648 events read in total (9028ms).
[11:50:35.815] <TB0> INFO: Expecting 411648 events.
[11:50:45.262] <TB0> INFO: 411648 events read in total (9044ms).
[11:50:45.278] <TB0> INFO: Expecting 411648 events.
[11:50:54.693] <TB0> INFO: 411648 events read in total (9012ms).
[11:50:54.712] <TB0> INFO: Expecting 411648 events.
[11:51:04.167] <TB0> INFO: 411648 events read in total (9052ms).
[11:51:04.188] <TB0> INFO: Expecting 411648 events.
[11:51:13.676] <TB0> INFO: 411648 events read in total (9085ms).
[11:51:13.699] <TB0> INFO: Expecting 411648 events.
[11:51:23.080] <TB0> INFO: 411648 events read in total (8978ms).
[11:51:23.119] <TB0> INFO: Expecting 411648 events.
[11:51:32.547] <TB0> INFO: 411648 events read in total (9025ms).
[11:51:32.591] <TB0> INFO: Expecting 411648 events.
[11:51:42.052] <TB0> INFO: 411648 events read in total (9058ms).
[11:51:42.083] <TB0> INFO: Expecting 411648 events.
[11:51:51.608] <TB0> INFO: 411648 events read in total (9122ms).
[11:51:51.641] <TB0> INFO: Expecting 411648 events.
[11:52:01.086] <TB0> INFO: 411648 events read in total (9042ms).
[11:52:01.121] <TB0> INFO: Expecting 411648 events.
[11:52:10.611] <TB0> INFO: 411648 events read in total (9087ms).
[11:52:10.648] <TB0> INFO: Expecting 411648 events.
[11:52:19.999] <TB0> INFO: 411648 events read in total (8948ms).
[11:52:20.038] <TB0> INFO: Expecting 411648 events.
[11:52:29.468] <TB0> INFO: 411648 events read in total (9027ms).
[11:52:29.512] <TB0> INFO: Test took 152256ms.
[11:52:30.126] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:52:30.136] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:52:30.136] <TB0> INFO: run 1 of 1
[11:52:30.367] <TB0> INFO: Expecting 5025280 events.
[11:52:57.977] <TB0> INFO: 596264 events read in total (27018ms).
[11:53:24.879] <TB0> INFO: 1187416 events read in total (53920ms).
[11:53:51.244] <TB0> INFO: 1777728 events read in total (80286ms).
[11:54:17.807] <TB0> INFO: 2367264 events read in total (106848ms).
[11:54:44.259] <TB0> INFO: 2957968 events read in total (133301ms).
[11:55:10.780] <TB0> INFO: 3546952 events read in total (159821ms).
[11:55:36.588] <TB0> INFO: 4136616 events read in total (185629ms).
[11:56:02.930] <TB0> INFO: 4727088 events read in total (211971ms).
[11:56:16.855] <TB0> INFO: 5025280 events read in total (225896ms).
[11:56:16.983] <TB0> INFO: Test took 226848ms.
[11:56:35.558] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.704085 .. 147.460628
[11:56:35.793] <TB0> INFO: Expecting 208000 events.
[11:56:45.786] <TB0> INFO: 208000 events read in total (9401ms).
[11:56:45.787] <TB0> INFO: Test took 10227ms.
[11:56:45.834] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[11:56:45.844] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:56:45.844] <TB0> INFO: run 1 of 1
[11:56:46.076] <TB0> INFO: Expecting 5258240 events.
[11:57:13.557] <TB0> INFO: 585752 events read in total (26889ms).
[11:57:39.819] <TB0> INFO: 1171552 events read in total (53151ms).
[11:58:05.984] <TB0> INFO: 1757024 events read in total (79316ms).
[11:58:32.512] <TB0> INFO: 2342224 events read in total (105844ms).
[11:58:59.040] <TB0> INFO: 2927552 events read in total (132373ms).
[11:59:25.446] <TB0> INFO: 3512408 events read in total (158778ms).
[11:59:53.115] <TB0> INFO: 4097272 events read in total (186447ms).
[12:00:19.541] <TB0> INFO: 4681224 events read in total (212873ms).
[12:00:46.460] <TB0> INFO: 5258240 events read in total (239792ms).
[12:00:46.532] <TB0> INFO: Test took 240688ms.
[12:01:08.180] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 25.785342 .. 47.334552
[12:01:08.417] <TB0> INFO: Expecting 208000 events.
[12:01:18.758] <TB0> INFO: 208000 events read in total (9749ms).
[12:01:18.758] <TB0> INFO: Test took 10576ms.
[12:01:18.805] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:01:18.815] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:01:18.815] <TB0> INFO: run 1 of 1
[12:01:19.047] <TB0> INFO: Expecting 1431040 events.
[12:01:48.699] <TB0> INFO: 658008 events read in total (29060ms).
[12:02:17.545] <TB0> INFO: 1314752 events read in total (57906ms).
[12:02:23.262] <TB0> INFO: 1431040 events read in total (63624ms).
[12:02:23.301] <TB0> INFO: Test took 64487ms.
[12:02:34.884] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 23.852053 .. 47.881145
[12:02:35.125] <TB0> INFO: Expecting 208000 events.
[12:02:45.833] <TB0> INFO: 208000 events read in total (10117ms).
[12:02:45.834] <TB0> INFO: Test took 10947ms.
[12:02:45.917] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 13 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:02:45.930] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:02:45.930] <TB0> INFO: run 1 of 1
[12:02:46.170] <TB0> INFO: Expecting 1497600 events.
[12:03:14.256] <TB0> INFO: 667040 events read in total (27494ms).
[12:03:42.786] <TB0> INFO: 1333320 events read in total (56024ms).
[12:03:50.299] <TB0> INFO: 1497600 events read in total (63537ms).
[12:03:50.336] <TB0> INFO: Test took 64407ms.
[12:04:01.689] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 21.905464 .. 44.786121
[12:04:01.927] <TB0> INFO: Expecting 208000 events.
[12:04:12.367] <TB0> INFO: 208000 events read in total (9849ms).
[12:04:12.368] <TB0> INFO: Test took 10676ms.
[12:04:12.414] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 11 .. 54 (-1/-1) hits flags = 528 (plus default)
[12:04:12.425] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:04:12.425] <TB0> INFO: run 1 of 1
[12:04:12.657] <TB0> INFO: Expecting 1464320 events.
[12:04:42.995] <TB0> INFO: 686408 events read in total (29747ms).
[12:05:12.118] <TB0> INFO: 1373032 events read in total (58870ms).
[12:05:16.136] <TB0> INFO: 1464320 events read in total (62888ms).
[12:05:16.159] <TB0> INFO: Test took 63734ms.
[12:05:26.927] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:05:26.927] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:05:26.937] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:05:26.937] <TB0> INFO: run 1 of 1
[12:05:27.171] <TB0> INFO: Expecting 1364480 events.
[12:05:57.266] <TB0> INFO: 667552 events read in total (29503ms).
[12:06:26.155] <TB0> INFO: 1334544 events read in total (58392ms).
[12:06:27.768] <TB0> INFO: 1364480 events read in total (60006ms).
[12:06:27.790] <TB0> INFO: Test took 60853ms.
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C0.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C1.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C2.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C3.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C4.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C5.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C6.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C7.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C8.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C9.dat
[12:06:38.634] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C10.dat
[12:06:38.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C11.dat
[12:06:38.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C12.dat
[12:06:38.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C13.dat
[12:06:38.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C14.dat
[12:06:38.635] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C15.dat
[12:06:38.635] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C0.dat
[12:06:38.643] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C1.dat
[12:06:38.651] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C2.dat
[12:06:38.659] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C3.dat
[12:06:38.667] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C4.dat
[12:06:38.675] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C5.dat
[12:06:38.684] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C6.dat
[12:06:38.692] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C7.dat
[12:06:38.700] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C8.dat
[12:06:38.708] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C9.dat
[12:06:38.716] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C10.dat
[12:06:38.724] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C11.dat
[12:06:38.732] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C12.dat
[12:06:38.740] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C13.dat
[12:06:38.748] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C14.dat
[12:06:38.757] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//trimParameters35_C15.dat
[12:06:38.765] <TB0> INFO: PixTestTrim::trimTest() done
[12:06:38.765] <TB0> INFO: vtrim: 134 136 157 132 143 137 134 153 148 140 129 134 135 124 127 156
[12:06:38.765] <TB0> INFO: vthrcomp: 119 106 129 126 118 108 101 106 131 112 132 112 108 120 113 129
[12:06:38.765] <TB0> INFO: vcal mean: 34.90 35.05 34.91 35.05 34.95 34.97 34.98 35.12 34.93 34.95 34.95 34.97 34.98 34.96 34.96 34.96
[12:06:38.765] <TB0> INFO: vcal RMS: 1.13 1.31 1.10 1.52 1.07 1.02 1.29 1.34 1.34 1.23 1.25 1.08 0.93 1.20 1.03 1.18
[12:06:38.765] <TB0> INFO: bits mean: 10.09 9.23 10.39 9.78 10.29 9.24 9.30 9.57 9.83 9.72 9.05 9.43 9.60 9.62 9.27 10.10
[12:06:38.765] <TB0> INFO: bits RMS: 2.54 2.43 2.31 2.64 2.41 2.44 2.56 2.34 2.46 2.53 2.75 2.63 2.34 2.60 2.75 2.42
[12:06:38.771] <TB0> INFO: ----------------------------------------------------------------------
[12:06:38.771] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:06:38.771] <TB0> INFO: ----------------------------------------------------------------------
[12:06:38.774] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:06:38.786] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:06:38.786] <TB0> INFO: run 1 of 1
[12:06:39.099] <TB0> INFO: Expecting 4160000 events.
[12:07:12.006] <TB0> INFO: 749320 events read in total (32316ms).
[12:07:44.924] <TB0> INFO: 1493810 events read in total (65234ms).
[12:08:17.520] <TB0> INFO: 2235450 events read in total (97830ms).
[12:08:50.873] <TB0> INFO: 2974320 events read in total (131183ms).
[12:09:23.399] <TB0> INFO: 3711960 events read in total (163709ms).
[12:09:43.185] <TB0> INFO: 4160000 events read in total (183495ms).
[12:09:43.241] <TB0> INFO: Test took 184454ms.
[12:10:05.490] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[12:10:05.501] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:10:05.501] <TB0> INFO: run 1 of 1
[12:10:05.734] <TB0> INFO: Expecting 4659200 events.
[12:10:37.510] <TB0> INFO: 696385 events read in total (31184ms).
[12:11:09.253] <TB0> INFO: 1390570 events read in total (62927ms).
[12:11:40.883] <TB0> INFO: 2082820 events read in total (94557ms).
[12:12:11.907] <TB0> INFO: 2772890 events read in total (125581ms).
[12:12:43.155] <TB0> INFO: 3461990 events read in total (156829ms).
[12:13:14.544] <TB0> INFO: 4150395 events read in total (188218ms).
[12:13:37.477] <TB0> INFO: 4659200 events read in total (211151ms).
[12:13:37.539] <TB0> INFO: Test took 212039ms.
[12:14:02.909] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[12:14:02.919] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:14:02.919] <TB0> INFO: run 1 of 1
[12:14:03.149] <TB0> INFO: Expecting 4139200 events.
[12:14:36.892] <TB0> INFO: 724840 events read in total (33151ms).
[12:15:08.892] <TB0> INFO: 1445995 events read in total (65151ms).
[12:15:40.941] <TB0> INFO: 2164895 events read in total (97200ms).
[12:16:12.744] <TB0> INFO: 2881200 events read in total (129003ms).
[12:16:44.787] <TB0> INFO: 3596520 events read in total (161046ms).
[12:17:09.174] <TB0> INFO: 4139200 events read in total (185433ms).
[12:17:09.227] <TB0> INFO: Test took 186308ms.
[12:17:32.295] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[12:17:32.305] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:17:32.305] <TB0> INFO: run 1 of 1
[12:17:32.539] <TB0> INFO: Expecting 4097600 events.
[12:18:05.828] <TB0> INFO: 727465 events read in total (32697ms).
[12:18:37.962] <TB0> INFO: 1451140 events read in total (64831ms).
[12:19:09.654] <TB0> INFO: 2172520 events read in total (96523ms).
[12:19:41.693] <TB0> INFO: 2890975 events read in total (128562ms).
[12:20:13.201] <TB0> INFO: 3608880 events read in total (160070ms).
[12:20:34.539] <TB0> INFO: 4097600 events read in total (181408ms).
[12:20:34.590] <TB0> INFO: Test took 182285ms.
[12:20:57.983] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[12:20:57.993] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:20:57.993] <TB0> INFO: run 1 of 1
[12:20:58.224] <TB0> INFO: Expecting 4139200 events.
[12:21:31.050] <TB0> INFO: 724625 events read in total (32234ms).
[12:22:02.948] <TB0> INFO: 1445585 events read in total (64132ms).
[12:22:34.898] <TB0> INFO: 2164205 events read in total (96082ms).
[12:23:06.556] <TB0> INFO: 2880280 events read in total (127740ms).
[12:23:38.339] <TB0> INFO: 3595825 events read in total (159523ms).
[12:24:02.994] <TB0> INFO: 4139200 events read in total (184178ms).
[12:24:03.046] <TB0> INFO: Test took 185053ms.
[12:24:25.686] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:24:25.687] <TB0> INFO: PixTestTrim::doTest() done, duration: 2528 seconds
[12:24:25.688] <TB0> INFO: Decoding statistics:
[12:24:25.688] <TB0> INFO: General information:
[12:24:25.688] <TB0> INFO: 16bit words read: 0
[12:24:25.688] <TB0> INFO: valid events total: 0
[12:24:25.688] <TB0> INFO: empty events: 0
[12:24:25.688] <TB0> INFO: valid events with pixels: 0
[12:24:25.688] <TB0> INFO: valid pixel hits: 0
[12:24:25.688] <TB0> INFO: Event errors: 0
[12:24:25.688] <TB0> INFO: start marker: 0
[12:24:25.688] <TB0> INFO: stop marker: 0
[12:24:25.688] <TB0> INFO: overflow: 0
[12:24:25.688] <TB0> INFO: invalid 5bit words: 0
[12:24:25.688] <TB0> INFO: invalid XOR eye diagram: 0
[12:24:25.688] <TB0> INFO: frame (failed synchr.): 0
[12:24:25.688] <TB0> INFO: idle data (no TBM trl): 0
[12:24:25.688] <TB0> INFO: no data (only TBM hdr): 0
[12:24:25.688] <TB0> INFO: TBM errors: 0
[12:24:25.688] <TB0> INFO: flawed TBM headers: 0
[12:24:25.688] <TB0> INFO: flawed TBM trailers: 0
[12:24:25.688] <TB0> INFO: event ID mismatches: 0
[12:24:25.688] <TB0> INFO: ROC errors: 0
[12:24:25.688] <TB0> INFO: missing ROC header(s): 0
[12:24:25.688] <TB0> INFO: misplaced readback start: 0
[12:24:25.688] <TB0> INFO: Pixel decoding errors: 0
[12:24:25.688] <TB0> INFO: pixel data incomplete: 0
[12:24:25.688] <TB0> INFO: pixel address: 0
[12:24:25.688] <TB0> INFO: pulse height fill bit: 0
[12:24:25.688] <TB0> INFO: buffer corruption: 0
[12:24:26.457] <TB0> INFO: ######################################################################
[12:24:26.457] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:24:26.457] <TB0> INFO: ######################################################################
[12:24:26.725] <TB0> INFO: Expecting 41600 events.
[12:24:30.162] <TB0> INFO: 41600 events read in total (2845ms).
[12:24:30.163] <TB0> INFO: Test took 3705ms.
[12:24:30.672] <TB0> INFO: Expecting 41600 events.
[12:24:34.301] <TB0> INFO: 41600 events read in total (3037ms).
[12:24:34.301] <TB0> INFO: Test took 3936ms.
[12:24:34.310] <TB0> INFO: Max pixel from chip 0 is [20 ,10] phvalue 136
[12:24:34.310] <TB0> INFO: Max pixel from chip 1 is [23 ,24] phvalue 184
[12:24:34.310] <TB0> INFO: Max pixel from chip 2 is [8 ,14] phvalue 179
[12:24:34.310] <TB0> INFO: Max pixel from chip 3 is [10 ,46] phvalue 105
[12:24:34.311] <TB0> INFO: Max pixel from chip 4 is [3 ,5] phvalue 175
[12:24:34.311] <TB0> INFO: Max pixel from chip 5 is [4 ,5] phvalue 161
[12:24:34.311] <TB0> INFO: Max pixel from chip 6 is [6 ,16] phvalue 92
[12:24:34.311] <TB0> INFO: Max pixel from chip 7 is [16 ,10] phvalue 117
[12:24:34.311] <TB0> INFO: Max pixel from chip 8 is [4 ,7] phvalue 168
[12:24:34.311] <TB0> INFO: Max pixel from chip 9 is [14 ,32] phvalue 174
[12:24:34.311] <TB0> INFO: Max pixel from chip 10 is [5 ,5] phvalue 111
[12:24:34.311] <TB0> INFO: Max pixel from chip 11 is [4 ,15] phvalue 76
[12:24:34.311] <TB0> INFO: Max pixel from chip 12 is [12 ,32] phvalue 131
[12:24:34.311] <TB0> INFO: Max pixel from chip 13 is [9 ,6] phvalue 81
[12:24:34.312] <TB0> INFO: Max pixel from chip 14 is [8 ,7] phvalue 77
[12:24:34.312] <TB0> INFO: Max pixel from chip 15 is [12 ,14] phvalue 160
[12:24:34.638] <TB0> INFO: Expecting 41600 events.
[12:24:38.271] <TB0> INFO: 41600 events read in total (3041ms).
[12:24:38.272] <TB0> INFO: Test took 3946ms.
[12:24:38.286] <TB0> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[12:24:38.286] <TB0> INFO: Min pixel from chip 1 is [3 ,5] phvalue 255
[12:24:38.286] <TB0> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[12:24:38.286] <TB0> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[12:24:38.287] <TB0> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[12:24:38.288] <TB0> INFO: Min pixel from chip 10 is [3 ,5] phvalue 255
[12:24:38.288] <TB0> INFO: Min pixel from chip 11 is [7 ,49] phvalue 241
[12:24:38.288] <TB0> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[12:24:38.288] <TB0> INFO: Min pixel from chip 13 is [3 ,5] phvalue 255
[12:24:38.288] <TB0> INFO: Min pixel from chip 14 is [31 ,21] phvalue 240
[12:24:38.289] <TB0> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[12:24:38.567] <TB0> INFO: Expecting 2560 events.
[12:24:39.456] <TB0> INFO: 2560 events read in total (297ms).
[12:24:39.457] <TB0> INFO: Test took 1167ms.
[12:24:39.765] <TB0> INFO: Expecting 2560 events.
[12:24:40.650] <TB0> INFO: 2560 events read in total (293ms).
[12:24:40.650] <TB0> INFO: Test took 1193ms.
[12:24:40.958] <TB0> INFO: Expecting 2560 events.
[12:24:41.842] <TB0> INFO: 2560 events read in total (292ms).
[12:24:41.842] <TB0> INFO: Test took 1191ms.
[12:24:42.151] <TB0> INFO: Expecting 2560 events.
[12:24:43.034] <TB0> INFO: 2560 events read in total (292ms).
[12:24:43.035] <TB0> INFO: Test took 1192ms.
[12:24:43.343] <TB0> INFO: Expecting 2560 events.
[12:24:44.229] <TB0> INFO: 2560 events read in total (294ms).
[12:24:44.229] <TB0> INFO: Test took 1194ms.
[12:24:44.537] <TB0> INFO: Expecting 2560 events.
[12:24:45.422] <TB0> INFO: 2560 events read in total (294ms).
[12:24:45.422] <TB0> INFO: Test took 1192ms.
[12:24:45.730] <TB0> INFO: Expecting 2560 events.
[12:24:46.615] <TB0> INFO: 2560 events read in total (293ms).
[12:24:46.616] <TB0> INFO: Test took 1193ms.
[12:24:46.924] <TB0> INFO: Expecting 2560 events.
[12:24:47.803] <TB0> INFO: 2560 events read in total (288ms).
[12:24:47.803] <TB0> INFO: Test took 1187ms.
[12:24:48.111] <TB0> INFO: Expecting 2560 events.
[12:24:48.996] <TB0> INFO: 2560 events read in total (293ms).
[12:24:48.996] <TB0> INFO: Test took 1192ms.
[12:24:49.305] <TB0> INFO: Expecting 2560 events.
[12:24:50.184] <TB0> INFO: 2560 events read in total (288ms).
[12:24:50.185] <TB0> INFO: Test took 1188ms.
[12:24:50.493] <TB0> INFO: Expecting 2560 events.
[12:24:51.373] <TB0> INFO: 2560 events read in total (289ms).
[12:24:51.373] <TB0> INFO: Test took 1187ms.
[12:24:51.681] <TB0> INFO: Expecting 2560 events.
[12:24:52.566] <TB0> INFO: 2560 events read in total (294ms).
[12:24:52.566] <TB0> INFO: Test took 1193ms.
[12:24:52.873] <TB0> INFO: Expecting 2560 events.
[12:24:53.764] <TB0> INFO: 2560 events read in total (299ms).
[12:24:53.764] <TB0> INFO: Test took 1198ms.
[12:24:54.071] <TB0> INFO: Expecting 2560 events.
[12:24:54.956] <TB0> INFO: 2560 events read in total (293ms).
[12:24:54.956] <TB0> INFO: Test took 1191ms.
[12:24:55.263] <TB0> INFO: Expecting 2560 events.
[12:24:56.153] <TB0> INFO: 2560 events read in total (298ms).
[12:24:56.153] <TB0> INFO: Test took 1197ms.
[12:24:56.461] <TB0> INFO: Expecting 2560 events.
[12:24:57.350] <TB0> INFO: 2560 events read in total (297ms).
[12:24:57.350] <TB0> INFO: Test took 1196ms.
[12:24:57.353] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:24:57.659] <TB0> INFO: Expecting 655360 events.
[12:25:12.568] <TB0> INFO: 655360 events read in total (14317ms).
[12:25:12.578] <TB0> INFO: Expecting 655360 events.
[12:25:27.226] <TB0> INFO: 655360 events read in total (14245ms).
[12:25:27.248] <TB0> INFO: Expecting 655360 events.
[12:25:42.160] <TB0> INFO: 655360 events read in total (14510ms).
[12:25:42.188] <TB0> INFO: Expecting 655360 events.
[12:25:56.815] <TB0> INFO: 655360 events read in total (14224ms).
[12:25:56.837] <TB0> INFO: Expecting 655360 events.
[12:26:11.529] <TB0> INFO: 655360 events read in total (14289ms).
[12:26:11.571] <TB0> INFO: Expecting 655360 events.
[12:26:26.340] <TB0> INFO: 655360 events read in total (14366ms).
[12:26:26.370] <TB0> INFO: Expecting 655360 events.
[12:26:41.038] <TB0> INFO: 655360 events read in total (14265ms).
[12:26:41.072] <TB0> INFO: Expecting 655360 events.
[12:26:55.754] <TB0> INFO: 655360 events read in total (14279ms).
[12:26:55.792] <TB0> INFO: Expecting 655360 events.
[12:27:10.650] <TB0> INFO: 655360 events read in total (14455ms).
[12:27:10.717] <TB0> INFO: Expecting 655360 events.
[12:27:25.380] <TB0> INFO: 655360 events read in total (14260ms).
[12:27:25.426] <TB0> INFO: Expecting 655360 events.
[12:27:40.292] <TB0> INFO: 655360 events read in total (14463ms).
[12:27:40.378] <TB0> INFO: Expecting 655360 events.
[12:27:55.322] <TB0> INFO: 655360 events read in total (14540ms).
[12:27:55.406] <TB0> INFO: Expecting 655360 events.
[12:28:10.200] <TB0> INFO: 655360 events read in total (14391ms).
[12:28:10.263] <TB0> INFO: Expecting 655360 events.
[12:28:24.914] <TB0> INFO: 655360 events read in total (14248ms).
[12:28:24.981] <TB0> INFO: Expecting 655360 events.
[12:28:39.660] <TB0> INFO: 655360 events read in total (14276ms).
[12:28:39.769] <TB0> INFO: Expecting 655360 events.
[12:28:54.448] <TB0> INFO: 655360 events read in total (14276ms).
[12:28:54.523] <TB0> INFO: Test took 237170ms.
[12:28:54.602] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:28:54.867] <TB0> INFO: Expecting 655360 events.
[12:29:09.642] <TB0> INFO: 655360 events read in total (14183ms).
[12:29:09.658] <TB0> INFO: Expecting 655360 events.
[12:29:23.849] <TB0> INFO: 655360 events read in total (13788ms).
[12:29:23.869] <TB0> INFO: Expecting 655360 events.
[12:29:38.510] <TB0> INFO: 655360 events read in total (14238ms).
[12:29:38.527] <TB0> INFO: Expecting 655360 events.
[12:29:52.871] <TB0> INFO: 655360 events read in total (13941ms).
[12:29:52.892] <TB0> INFO: Expecting 655360 events.
[12:30:07.731] <TB0> INFO: 655360 events read in total (14435ms).
[12:30:07.771] <TB0> INFO: Expecting 655360 events.
[12:30:22.591] <TB0> INFO: 655360 events read in total (14417ms).
[12:30:22.620] <TB0> INFO: Expecting 655360 events.
[12:30:37.232] <TB0> INFO: 655360 events read in total (14209ms).
[12:30:37.284] <TB0> INFO: Expecting 655360 events.
[12:30:51.893] <TB0> INFO: 655360 events read in total (14206ms).
[12:30:51.931] <TB0> INFO: Expecting 655360 events.
[12:31:06.185] <TB0> INFO: 655360 events read in total (13851ms).
[12:31:06.248] <TB0> INFO: Expecting 655360 events.
[12:31:20.847] <TB0> INFO: 655360 events read in total (14196ms).
[12:31:20.892] <TB0> INFO: Expecting 655360 events.
[12:31:35.575] <TB0> INFO: 655360 events read in total (14280ms).
[12:31:35.656] <TB0> INFO: Expecting 655360 events.
[12:31:50.166] <TB0> INFO: 655360 events read in total (14107ms).
[12:31:50.219] <TB0> INFO: Expecting 655360 events.
[12:32:04.956] <TB0> INFO: 655360 events read in total (14334ms).
[12:32:05.049] <TB0> INFO: Expecting 655360 events.
[12:32:19.869] <TB0> INFO: 655360 events read in total (14417ms).
[12:32:19.970] <TB0> INFO: Expecting 655360 events.
[12:32:34.312] <TB0> INFO: 655360 events read in total (13939ms).
[12:32:34.381] <TB0> INFO: Expecting 655360 events.
[12:32:48.916] <TB0> INFO: 655360 events read in total (14132ms).
[12:32:48.988] <TB0> INFO: Test took 234386ms.
[12:32:49.143] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.148] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.153] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.157] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.162] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.166] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.171] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.175] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:32:49.180] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:32:49.185] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:32:49.190] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.195] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.200] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.205] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.210] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.215] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.220] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:32:49.226] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:32:49.232] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:32:49.238] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:32:49.243] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.249] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:32:49.254] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:32:49.259] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.264] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:32:49.269] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:32:49.301] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C0.dat
[12:32:49.301] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C1.dat
[12:32:49.301] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C2.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C3.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C4.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C5.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C6.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C7.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C8.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C9.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C10.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C11.dat
[12:32:49.302] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C12.dat
[12:32:49.303] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C13.dat
[12:32:49.303] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C14.dat
[12:32:49.303] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//dacParameters35_C15.dat
[12:32:49.540] <TB0> INFO: Expecting 41600 events.
[12:32:52.652] <TB0> INFO: 41600 events read in total (2520ms).
[12:32:52.653] <TB0> INFO: Test took 3348ms.
[12:32:53.173] <TB0> INFO: Expecting 41600 events.
[12:32:56.195] <TB0> INFO: 41600 events read in total (2430ms).
[12:32:56.196] <TB0> INFO: Test took 3332ms.
[12:32:56.638] <TB0> INFO: Expecting 41600 events.
[12:32:59.815] <TB0> INFO: 41600 events read in total (2585ms).
[12:32:59.816] <TB0> INFO: Test took 3409ms.
[12:33:00.037] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:00.126] <TB0> INFO: Expecting 2560 events.
[12:33:01.014] <TB0> INFO: 2560 events read in total (297ms).
[12:33:01.014] <TB0> INFO: Test took 977ms.
[12:33:01.016] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:01.323] <TB0> INFO: Expecting 2560 events.
[12:33:02.207] <TB0> INFO: 2560 events read in total (292ms).
[12:33:02.207] <TB0> INFO: Test took 1191ms.
[12:33:02.209] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:02.516] <TB0> INFO: Expecting 2560 events.
[12:33:03.400] <TB0> INFO: 2560 events read in total (292ms).
[12:33:03.400] <TB0> INFO: Test took 1191ms.
[12:33:03.402] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:03.709] <TB0> INFO: Expecting 2560 events.
[12:33:04.593] <TB0> INFO: 2560 events read in total (292ms).
[12:33:04.593] <TB0> INFO: Test took 1191ms.
[12:33:04.595] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:04.902] <TB0> INFO: Expecting 2560 events.
[12:33:05.786] <TB0> INFO: 2560 events read in total (292ms).
[12:33:05.786] <TB0> INFO: Test took 1191ms.
[12:33:05.788] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:06.095] <TB0> INFO: Expecting 2560 events.
[12:33:06.978] <TB0> INFO: 2560 events read in total (292ms).
[12:33:06.979] <TB0> INFO: Test took 1191ms.
[12:33:06.980] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:07.288] <TB0> INFO: Expecting 2560 events.
[12:33:08.172] <TB0> INFO: 2560 events read in total (293ms).
[12:33:08.172] <TB0> INFO: Test took 1192ms.
[12:33:08.174] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:08.481] <TB0> INFO: Expecting 2560 events.
[12:33:09.370] <TB0> INFO: 2560 events read in total (298ms).
[12:33:09.370] <TB0> INFO: Test took 1196ms.
[12:33:09.372] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:09.679] <TB0> INFO: Expecting 2560 events.
[12:33:10.563] <TB0> INFO: 2560 events read in total (292ms).
[12:33:10.563] <TB0> INFO: Test took 1191ms.
[12:33:10.565] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:10.872] <TB0> INFO: Expecting 2560 events.
[12:33:11.752] <TB0> INFO: 2560 events read in total (288ms).
[12:33:11.752] <TB0> INFO: Test took 1187ms.
[12:33:11.754] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:12.060] <TB0> INFO: Expecting 2560 events.
[12:33:12.946] <TB0> INFO: 2560 events read in total (294ms).
[12:33:12.946] <TB0> INFO: Test took 1192ms.
[12:33:12.948] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:13.254] <TB0> INFO: Expecting 2560 events.
[12:33:14.140] <TB0> INFO: 2560 events read in total (294ms).
[12:33:14.140] <TB0> INFO: Test took 1192ms.
[12:33:14.142] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:14.448] <TB0> INFO: Expecting 2560 events.
[12:33:15.328] <TB0> INFO: 2560 events read in total (288ms).
[12:33:15.328] <TB0> INFO: Test took 1186ms.
[12:33:15.330] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:15.637] <TB0> INFO: Expecting 2560 events.
[12:33:16.517] <TB0> INFO: 2560 events read in total (289ms).
[12:33:16.517] <TB0> INFO: Test took 1187ms.
[12:33:16.519] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:16.825] <TB0> INFO: Expecting 2560 events.
[12:33:17.710] <TB0> INFO: 2560 events read in total (293ms).
[12:33:17.711] <TB0> INFO: Test took 1192ms.
[12:33:17.713] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:18.019] <TB0> INFO: Expecting 2560 events.
[12:33:18.904] <TB0> INFO: 2560 events read in total (294ms).
[12:33:18.904] <TB0> INFO: Test took 1191ms.
[12:33:18.906] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:19.212] <TB0> INFO: Expecting 2560 events.
[12:33:20.098] <TB0> INFO: 2560 events read in total (294ms).
[12:33:20.098] <TB0> INFO: Test took 1192ms.
[12:33:20.100] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:20.406] <TB0> INFO: Expecting 2560 events.
[12:33:21.292] <TB0> INFO: 2560 events read in total (294ms).
[12:33:21.292] <TB0> INFO: Test took 1192ms.
[12:33:21.294] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:21.600] <TB0> INFO: Expecting 2560 events.
[12:33:22.484] <TB0> INFO: 2560 events read in total (292ms).
[12:33:22.484] <TB0> INFO: Test took 1190ms.
[12:33:22.486] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:22.793] <TB0> INFO: Expecting 2560 events.
[12:33:23.674] <TB0> INFO: 2560 events read in total (289ms).
[12:33:23.674] <TB0> INFO: Test took 1188ms.
[12:33:23.676] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:23.982] <TB0> INFO: Expecting 2560 events.
[12:33:24.867] <TB0> INFO: 2560 events read in total (293ms).
[12:33:24.867] <TB0> INFO: Test took 1191ms.
[12:33:24.869] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:25.176] <TB0> INFO: Expecting 2560 events.
[12:33:26.057] <TB0> INFO: 2560 events read in total (290ms).
[12:33:26.057] <TB0> INFO: Test took 1188ms.
[12:33:26.059] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:26.365] <TB0> INFO: Expecting 2560 events.
[12:33:27.249] <TB0> INFO: 2560 events read in total (292ms).
[12:33:27.250] <TB0> INFO: Test took 1191ms.
[12:33:27.251] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:27.558] <TB0> INFO: Expecting 2560 events.
[12:33:28.442] <TB0> INFO: 2560 events read in total (292ms).
[12:33:28.443] <TB0> INFO: Test took 1192ms.
[12:33:28.445] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:28.751] <TB0> INFO: Expecting 2560 events.
[12:33:29.635] <TB0> INFO: 2560 events read in total (292ms).
[12:33:29.635] <TB0> INFO: Test took 1191ms.
[12:33:29.637] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:29.944] <TB0> INFO: Expecting 2560 events.
[12:33:30.832] <TB0> INFO: 2560 events read in total (296ms).
[12:33:30.833] <TB0> INFO: Test took 1196ms.
[12:33:30.835] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:31.141] <TB0> INFO: Expecting 2560 events.
[12:33:32.025] <TB0> INFO: 2560 events read in total (292ms).
[12:33:32.025] <TB0> INFO: Test took 1191ms.
[12:33:32.027] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:32.334] <TB0> INFO: Expecting 2560 events.
[12:33:33.221] <TB0> INFO: 2560 events read in total (295ms).
[12:33:33.221] <TB0> INFO: Test took 1194ms.
[12:33:33.223] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:33.529] <TB0> INFO: Expecting 2560 events.
[12:33:34.414] <TB0> INFO: 2560 events read in total (293ms).
[12:33:34.414] <TB0> INFO: Test took 1191ms.
[12:33:34.416] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:34.723] <TB0> INFO: Expecting 2560 events.
[12:33:35.606] <TB0> INFO: 2560 events read in total (292ms).
[12:33:35.607] <TB0> INFO: Test took 1192ms.
[12:33:35.609] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:35.915] <TB0> INFO: Expecting 2560 events.
[12:33:36.801] <TB0> INFO: 2560 events read in total (294ms).
[12:33:36.801] <TB0> INFO: Test took 1193ms.
[12:33:36.803] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:37.109] <TB0> INFO: Expecting 2560 events.
[12:33:37.994] <TB0> INFO: 2560 events read in total (293ms).
[12:33:37.994] <TB0> INFO: Test took 1191ms.
[12:33:38.455] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 551 seconds
[12:33:38.455] <TB0> INFO: PH scale (per ROC): 58 48 57 45 40 51 43 44 45 51 52 64 42 43 67 54
[12:33:38.455] <TB0> INFO: PH offset (per ROC): 105 86 91 107 81 95 108 103 87 93 107 124 98 110 126 98
[12:33:38.462] <TB0> INFO: Decoding statistics:
[12:33:38.462] <TB0> INFO: General information:
[12:33:38.462] <TB0> INFO: 16bit words read: 127882
[12:33:38.462] <TB0> INFO: valid events total: 20480
[12:33:38.462] <TB0> INFO: empty events: 17979
[12:33:38.462] <TB0> INFO: valid events with pixels: 2501
[12:33:38.462] <TB0> INFO: valid pixel hits: 2501
[12:33:38.462] <TB0> INFO: Event errors: 0
[12:33:38.462] <TB0> INFO: start marker: 0
[12:33:38.462] <TB0> INFO: stop marker: 0
[12:33:38.462] <TB0> INFO: overflow: 0
[12:33:38.462] <TB0> INFO: invalid 5bit words: 0
[12:33:38.462] <TB0> INFO: invalid XOR eye diagram: 0
[12:33:38.462] <TB0> INFO: frame (failed synchr.): 0
[12:33:38.462] <TB0> INFO: idle data (no TBM trl): 0
[12:33:38.462] <TB0> INFO: no data (only TBM hdr): 0
[12:33:38.462] <TB0> INFO: TBM errors: 0
[12:33:38.462] <TB0> INFO: flawed TBM headers: 0
[12:33:38.462] <TB0> INFO: flawed TBM trailers: 0
[12:33:38.462] <TB0> INFO: event ID mismatches: 0
[12:33:38.462] <TB0> INFO: ROC errors: 0
[12:33:38.462] <TB0> INFO: missing ROC header(s): 0
[12:33:38.462] <TB0> INFO: misplaced readback start: 0
[12:33:38.462] <TB0> INFO: Pixel decoding errors: 0
[12:33:38.462] <TB0> INFO: pixel data incomplete: 0
[12:33:38.463] <TB0> INFO: pixel address: 0
[12:33:38.463] <TB0> INFO: pulse height fill bit: 0
[12:33:38.463] <TB0> INFO: buffer corruption: 0
[12:33:38.874] <TB0> INFO: ######################################################################
[12:33:38.874] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:33:38.874] <TB0> INFO: ######################################################################
[12:33:38.888] <TB0> INFO: scanning low vcal = 10
[12:33:39.198] <TB0> INFO: Expecting 41600 events.
[12:33:42.845] <TB0> INFO: 41600 events read in total (3056ms).
[12:33:42.845] <TB0> INFO: Test took 3957ms.
[12:33:42.847] <TB0> INFO: scanning low vcal = 20
[12:33:43.143] <TB0> INFO: Expecting 41600 events.
[12:33:46.754] <TB0> INFO: 41600 events read in total (3019ms).
[12:33:46.754] <TB0> INFO: Test took 3907ms.
[12:33:46.755] <TB0> INFO: scanning low vcal = 30
[12:33:47.051] <TB0> INFO: Expecting 41600 events.
[12:33:50.691] <TB0> INFO: 41600 events read in total (3048ms).
[12:33:50.691] <TB0> INFO: Test took 3935ms.
[12:33:50.694] <TB0> INFO: scanning low vcal = 40
[12:33:50.973] <TB0> INFO: Expecting 41600 events.
[12:33:55.008] <TB0> INFO: 41600 events read in total (3443ms).
[12:33:55.010] <TB0> INFO: Test took 4316ms.
[12:33:55.013] <TB0> INFO: scanning low vcal = 50
[12:33:55.289] <TB0> INFO: Expecting 41600 events.
[12:33:59.317] <TB0> INFO: 41600 events read in total (3436ms).
[12:33:59.318] <TB0> INFO: Test took 4305ms.
[12:33:59.321] <TB0> INFO: scanning low vcal = 60
[12:33:59.597] <TB0> INFO: Expecting 41600 events.
[12:34:03.583] <TB0> INFO: 41600 events read in total (3394ms).
[12:34:03.584] <TB0> INFO: Test took 4263ms.
[12:34:03.586] <TB0> INFO: scanning low vcal = 70
[12:34:03.863] <TB0> INFO: Expecting 41600 events.
[12:34:07.904] <TB0> INFO: 41600 events read in total (3450ms).
[12:34:07.905] <TB0> INFO: Test took 4319ms.
[12:34:07.908] <TB0> INFO: scanning low vcal = 80
[12:34:08.222] <TB0> INFO: Expecting 41600 events.
[12:34:12.176] <TB0> INFO: 41600 events read in total (3362ms).
[12:34:12.177] <TB0> INFO: Test took 4269ms.
[12:34:12.179] <TB0> INFO: scanning low vcal = 90
[12:34:12.456] <TB0> INFO: Expecting 41600 events.
[12:34:16.480] <TB0> INFO: 41600 events read in total (3432ms).
[12:34:16.481] <TB0> INFO: Test took 4302ms.
[12:34:16.484] <TB0> INFO: scanning low vcal = 100
[12:34:16.761] <TB0> INFO: Expecting 41600 events.
[12:34:20.759] <TB0> INFO: 41600 events read in total (3407ms).
[12:34:20.759] <TB0> INFO: Test took 4275ms.
[12:34:20.762] <TB0> INFO: scanning low vcal = 110
[12:34:21.039] <TB0> INFO: Expecting 41600 events.
[12:34:25.086] <TB0> INFO: 41600 events read in total (3456ms).
[12:34:25.087] <TB0> INFO: Test took 4325ms.
[12:34:25.090] <TB0> INFO: scanning low vcal = 120
[12:34:25.403] <TB0> INFO: Expecting 41600 events.
[12:34:29.429] <TB0> INFO: 41600 events read in total (3434ms).
[12:34:29.430] <TB0> INFO: Test took 4340ms.
[12:34:29.433] <TB0> INFO: scanning low vcal = 130
[12:34:29.710] <TB0> INFO: Expecting 41600 events.
[12:34:33.730] <TB0> INFO: 41600 events read in total (3429ms).
[12:34:33.731] <TB0> INFO: Test took 4298ms.
[12:34:33.734] <TB0> INFO: scanning low vcal = 140
[12:34:34.011] <TB0> INFO: Expecting 41600 events.
[12:34:38.090] <TB0> INFO: 41600 events read in total (3488ms).
[12:34:38.091] <TB0> INFO: Test took 4357ms.
[12:34:38.094] <TB0> INFO: scanning low vcal = 150
[12:34:38.405] <TB0> INFO: Expecting 41600 events.
[12:34:42.450] <TB0> INFO: 41600 events read in total (3453ms).
[12:34:42.451] <TB0> INFO: Test took 4356ms.
[12:34:42.453] <TB0> INFO: scanning low vcal = 160
[12:34:42.766] <TB0> INFO: Expecting 41600 events.
[12:34:46.775] <TB0> INFO: 41600 events read in total (3417ms).
[12:34:46.776] <TB0> INFO: Test took 4322ms.
[12:34:46.778] <TB0> INFO: scanning low vcal = 170
[12:34:47.055] <TB0> INFO: Expecting 41600 events.
[12:34:51.042] <TB0> INFO: 41600 events read in total (3395ms).
[12:34:51.043] <TB0> INFO: Test took 4264ms.
[12:34:51.046] <TB0> INFO: scanning low vcal = 180
[12:34:51.322] <TB0> INFO: Expecting 41600 events.
[12:34:55.341] <TB0> INFO: 41600 events read in total (3427ms).
[12:34:55.342] <TB0> INFO: Test took 4296ms.
[12:34:55.344] <TB0> INFO: scanning low vcal = 190
[12:34:55.621] <TB0> INFO: Expecting 41600 events.
[12:34:59.694] <TB0> INFO: 41600 events read in total (3482ms).
[12:34:59.695] <TB0> INFO: Test took 4351ms.
[12:34:59.698] <TB0> INFO: scanning low vcal = 200
[12:34:59.978] <TB0> INFO: Expecting 41600 events.
[12:35:04.048] <TB0> INFO: 41600 events read in total (3479ms).
[12:35:04.049] <TB0> INFO: Test took 4351ms.
[12:35:04.052] <TB0> INFO: scanning low vcal = 210
[12:35:04.363] <TB0> INFO: Expecting 41600 events.
[12:35:08.408] <TB0> INFO: 41600 events read in total (3454ms).
[12:35:08.410] <TB0> INFO: Test took 4358ms.
[12:35:08.413] <TB0> INFO: scanning low vcal = 220
[12:35:08.725] <TB0> INFO: Expecting 41600 events.
[12:35:12.764] <TB0> INFO: 41600 events read in total (3447ms).
[12:35:12.765] <TB0> INFO: Test took 4352ms.
[12:35:12.769] <TB0> INFO: scanning low vcal = 230
[12:35:13.075] <TB0> INFO: Expecting 41600 events.
[12:35:17.036] <TB0> INFO: 41600 events read in total (3370ms).
[12:35:17.037] <TB0> INFO: Test took 4268ms.
[12:35:17.039] <TB0> INFO: scanning low vcal = 240
[12:35:17.316] <TB0> INFO: Expecting 41600 events.
[12:35:21.352] <TB0> INFO: 41600 events read in total (3444ms).
[12:35:21.353] <TB0> INFO: Test took 4314ms.
[12:35:21.356] <TB0> INFO: scanning low vcal = 250
[12:35:21.666] <TB0> INFO: Expecting 41600 events.
[12:35:25.699] <TB0> INFO: 41600 events read in total (3441ms).
[12:35:25.699] <TB0> INFO: Test took 4342ms.
[12:35:25.703] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:35:25.979] <TB0> INFO: Expecting 41600 events.
[12:35:29.953] <TB0> INFO: 41600 events read in total (3382ms).
[12:35:29.954] <TB0> INFO: Test took 4250ms.
[12:35:29.957] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:35:30.234] <TB0> INFO: Expecting 41600 events.
[12:35:34.247] <TB0> INFO: 41600 events read in total (3422ms).
[12:35:34.247] <TB0> INFO: Test took 4290ms.
[12:35:34.250] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:35:34.527] <TB0> INFO: Expecting 41600 events.
[12:35:38.551] <TB0> INFO: 41600 events read in total (3432ms).
[12:35:38.552] <TB0> INFO: Test took 4302ms.
[12:35:38.554] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:35:38.831] <TB0> INFO: Expecting 41600 events.
[12:35:42.791] <TB0> INFO: 41600 events read in total (3368ms).
[12:35:42.792] <TB0> INFO: Test took 4237ms.
[12:35:42.794] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:35:43.071] <TB0> INFO: Expecting 41600 events.
[12:35:47.025] <TB0> INFO: 41600 events read in total (3362ms).
[12:35:47.026] <TB0> INFO: Test took 4232ms.
[12:35:47.404] <TB0> INFO: PixTestGainPedestal::measure() done
[12:36:21.593] <TB0> INFO: PixTestGainPedestal::fit() done
[12:36:21.593] <TB0> INFO: non-linearity mean: 0.971 0.976 0.960 0.944 1.036 0.953 0.959 0.950 0.932 0.949 0.937 0.985 0.985 0.916 0.986 0.969
[12:36:21.593] <TB0> INFO: non-linearity RMS: 0.030 0.152 0.030 0.125 0.129 0.050 0.138 0.088 0.106 0.069 0.091 0.003 0.152 0.155 0.003 0.023
[12:36:21.593] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:36:21.607] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:36:21.621] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:36:21.635] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:36:21.648] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:36:21.662] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:36:21.676] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:36:21.690] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:36:21.704] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:36:21.717] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:36:21.731] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:36:21.745] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:36:21.758] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:36:21.772] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:36:21.786] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:36:21.800] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1132_FullQualification_2016-11-15_11h07m_1479204422//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:36:21.813] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[12:36:21.813] <TB0> INFO: Decoding statistics:
[12:36:21.813] <TB0> INFO: General information:
[12:36:21.813] <TB0> INFO: 16bit words read: 3327546
[12:36:21.813] <TB0> INFO: valid events total: 332800
[12:36:21.813] <TB0> INFO: empty events: 0
[12:36:21.813] <TB0> INFO: valid events with pixels: 332800
[12:36:21.813] <TB0> INFO: valid pixel hits: 665373
[12:36:21.813] <TB0> INFO: Event errors: 0
[12:36:21.813] <TB0> INFO: start marker: 0
[12:36:21.813] <TB0> INFO: stop marker: 0
[12:36:21.813] <TB0> INFO: overflow: 0
[12:36:21.813] <TB0> INFO: invalid 5bit words: 0
[12:36:21.813] <TB0> INFO: invalid XOR eye diagram: 0
[12:36:21.813] <TB0> INFO: frame (failed synchr.): 0
[12:36:21.813] <TB0> INFO: idle data (no TBM trl): 0
[12:36:21.813] <TB0> INFO: no data (only TBM hdr): 0
[12:36:21.813] <TB0> INFO: TBM errors: 0
[12:36:21.813] <TB0> INFO: flawed TBM headers: 0
[12:36:21.814] <TB0> INFO: flawed TBM trailers: 0
[12:36:21.814] <TB0> INFO: event ID mismatches: 0
[12:36:21.814] <TB0> INFO: ROC errors: 0
[12:36:21.814] <TB0> INFO: missing ROC header(s): 0
[12:36:21.814] <TB0> INFO: misplaced readback start: 0
[12:36:21.814] <TB0> INFO: Pixel decoding errors: 0
[12:36:21.814] <TB0> INFO: pixel data incomplete: 0
[12:36:21.814] <TB0> INFO: pixel address: 0
[12:36:21.814] <TB0> INFO: pulse height fill bit: 0
[12:36:21.814] <TB0> INFO: buffer corruption: 0
[12:36:21.827] <TB0> INFO: Decoding statistics:
[12:36:21.827] <TB0> INFO: General information:
[12:36:21.827] <TB0> INFO: 16bit words read: 3456964
[12:36:21.827] <TB0> INFO: valid events total: 353536
[12:36:21.827] <TB0> INFO: empty events: 18235
[12:36:21.827] <TB0> INFO: valid events with pixels: 335301
[12:36:21.827] <TB0> INFO: valid pixel hits: 667874
[12:36:21.827] <TB0> INFO: Event errors: 0
[12:36:21.827] <TB0> INFO: start marker: 0
[12:36:21.828] <TB0> INFO: stop marker: 0
[12:36:21.828] <TB0> INFO: overflow: 0
[12:36:21.828] <TB0> INFO: invalid 5bit words: 0
[12:36:21.828] <TB0> INFO: invalid XOR eye diagram: 0
[12:36:21.828] <TB0> INFO: frame (failed synchr.): 0
[12:36:21.828] <TB0> INFO: idle data (no TBM trl): 0
[12:36:21.828] <TB0> INFO: no data (only TBM hdr): 0
[12:36:21.828] <TB0> INFO: TBM errors: 0
[12:36:21.828] <TB0> INFO: flawed TBM headers: 0
[12:36:21.828] <TB0> INFO: flawed TBM trailers: 0
[12:36:21.828] <TB0> INFO: event ID mismatches: 0
[12:36:21.828] <TB0> INFO: ROC errors: 0
[12:36:21.828] <TB0> INFO: missing ROC header(s): 0
[12:36:21.828] <TB0> INFO: misplaced readback start: 0
[12:36:21.828] <TB0> INFO: Pixel decoding errors: 0
[12:36:21.828] <TB0> INFO: pixel data incomplete: 0
[12:36:21.828] <TB0> INFO: pixel address: 0
[12:36:21.828] <TB0> INFO: pulse height fill bit: 0
[12:36:21.828] <TB0> INFO: buffer corruption: 0
[12:36:21.828] <TB0> INFO: enter test to run
[12:36:21.828] <TB0> INFO: test: exit no parameter change
[12:36:21.852] <TB0> QUIET: Connection to board 73 closed.
[12:36:21.852] <TB0> INFO: pXar: this is the end, my friend