[12:20:46.269] <TB2> INFO: *** Welcome to pxar ***
[12:20:46.269] <TB2> INFO: *** Today: 2015/08/17
[12:20:46.269] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C15.dat
[12:20:46.270] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//tbmParameters_C0b.dat
[12:20:46.270] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//defaultMaskFile.dat
[12:20:46.270] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters_C15.dat
[12:20:46.337] <TB2> INFO: clk: 4
[12:20:46.337] <TB2> INFO: ctr: 4
[12:20:46.337] <TB2> INFO: sda: 19
[12:20:46.337] <TB2> INFO: tin: 9
[12:20:46.337] <TB2> INFO: level: 15
[12:20:46.337] <TB2> INFO: triggerdelay: 0
[12:20:46.337] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[12:20:46.337] <TB2> INFO: Log level: INFO
[12:20:46.344] <TB2> INFO: Found DTB DTB_WXC55Z
[12:20:46.352] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:20:46.355] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[12:20:46.358] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[12:20:47.879] <TB2> INFO: DUT info:
[12:20:47.879] <TB2> INFO: The DUT currently contains the following objects:
[12:20:47.879] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:20:47.879] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:20:47.880] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:20:47.880] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:20:47.880] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:47.880] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:20:48.281] <TB2> INFO: enter 'restricted' command line mode
[12:20:48.281] <TB2> INFO: enter test to run
[12:20:48.281] <TB2> INFO: test: pretest no parameter change
[12:20:48.281] <TB2> INFO: running: pretest
[12:20:48.285] <TB2> INFO: ######################################################################
[12:20:48.285] <TB2> INFO: PixTestPretest::doTest()
[12:20:48.285] <TB2> INFO: ######################################################################
[12:20:48.287] <TB2> INFO: ----------------------------------------------------------------------
[12:20:48.287] <TB2> INFO: PixTestPretest::programROC()
[12:20:48.287] <TB2> INFO: ----------------------------------------------------------------------
[12:21:06.303] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:21:06.303] <TB2> INFO: IA differences per ROC: 17.7 19.3 20.9 20.1 19.3 18.5 17.7 20.1 18.5 18.5 17.7 17.7 16.9 20.1 17.7 18.5
[12:21:06.377] <TB2> INFO: ----------------------------------------------------------------------
[12:21:06.377] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:21:06.377] <TB2> INFO: ----------------------------------------------------------------------
[12:21:25.929] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 377 mA = 23.5625 mA/ROC
[12:21:25.932] <TB2> INFO: ----------------------------------------------------------------------
[12:21:25.932] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:21:25.932] <TB2> INFO: ----------------------------------------------------------------------
[12:21:34.540] <TB2> INFO: Test took 8602ms.
[12:21:34.826] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:21:34.860] <TB2> INFO: ----------------------------------------------------------------------
[12:21:34.860] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:21:34.860] <TB2> INFO: ----------------------------------------------------------------------
[12:21:43.582] <TB2> INFO: Test took 8717ms.
[12:21:43.869] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:21:43.869] <TB2> INFO: CalDel: 142 120 133 141 135 143 139 130 151 127 103 113 128 137 137 114
[12:21:43.869] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C0.dat
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C1.dat
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C2.dat
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C3.dat
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C4.dat
[12:21:43.873] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C5.dat
[12:21:43.874] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C6.dat
[12:21:43.874] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C7.dat
[12:21:43.874] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C8.dat
[12:21:43.874] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C9.dat
[12:21:43.874] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C10.dat
[12:21:43.875] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C11.dat
[12:21:43.875] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C12.dat
[12:21:43.875] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C13.dat
[12:21:43.875] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C14.dat
[12:21:43.875] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters_C15.dat
[12:21:43.875] <TB2> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[12:21:43.971] <TB2> INFO: enter test to run
[12:21:43.971] <TB2> INFO: test: fulltest no parameter change
[12:21:43.971] <TB2> INFO: running: fulltest
[12:21:43.971] <TB2> INFO: ######################################################################
[12:21:43.971] <TB2> INFO: PixTestFullTest::doTest()
[12:21:43.972] <TB2> INFO: ######################################################################
[12:21:43.973] <TB2> INFO: ######################################################################
[12:21:43.973] <TB2> INFO: PixTestAlive::doTest()
[12:21:43.973] <TB2> INFO: ######################################################################
[12:21:43.974] <TB2> INFO: ----------------------------------------------------------------------
[12:21:43.974] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:21:43.974] <TB2> INFO: ----------------------------------------------------------------------
[12:21:47.434] <TB2> INFO: Test took 3459ms.
[12:21:47.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:47.680] <TB2> INFO: PixTestAlive::aliveTest() done
[12:21:47.681] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
[12:21:47.682] <TB2> INFO: ----------------------------------------------------------------------
[12:21:47.682] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:21:47.682] <TB2> INFO: ----------------------------------------------------------------------
[12:21:50.423] <TB2> INFO: Test took 2739ms.
[12:21:50.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:50.426] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:21:50.651] <TB2> INFO: PixTestAlive::maskTest() done
[12:21:50.651] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:21:50.653] <TB2> INFO: ----------------------------------------------------------------------
[12:21:50.653] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:21:50.653] <TB2> INFO: ----------------------------------------------------------------------
[12:21:54.087] <TB2> INFO: Test took 3433ms.
[12:21:54.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:54.333] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:21:54.333] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:21:54.334] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:21:54.347] <TB2> INFO: ######################################################################
[12:21:54.347] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:21:54.347] <TB2> INFO: ######################################################################
[12:21:54.350] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:21:54.361] <TB2> INFO: dacScan step from 0 .. 29
[12:22:15.959] <TB2> INFO: Test took 21598ms.
[12:22:15.994] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:15.994] <TB2> INFO: dacScan step from 30 .. 59
[12:22:39.547] <TB2> INFO: Test took 23553ms.
[12:22:39.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:39.635] <TB2> INFO: dacScan step from 60 .. 89
[12:23:10.995] <TB2> INFO: Test took 31360ms.
[12:23:11.247] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:11.322] <TB2> INFO: dacScan step from 90 .. 119
[12:23:41.812] <TB2> INFO: Test took 30489ms.
[12:23:42.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:42.180] <TB2> INFO: dacScan step from 120 .. 149
[12:24:06.394] <TB2> INFO: Test took 24214ms.
[12:24:06.596] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:30.682] <TB2> INFO: PixTestBBMap::doTest() done, duration: 156 seconds
[12:24:30.682] <TB2> INFO: number of dead bumps (per ROC): 9 0 0 0 0 0 0 0 0 0 0 0 1 3 2 8
[12:24:30.682] <TB2> INFO: separation cut (per ROC): 80 90 88 82 92 97 86 86 85 94 90 90 84 88 86 97
[12:24:30.756] <TB2> INFO: ######################################################################
[12:24:30.756] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[12:24:30.756] <TB2> INFO: ######################################################################
[12:24:30.757] <TB2> INFO: ----------------------------------------------------------------------
[12:24:30.757] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:24:30.757] <TB2> INFO: ----------------------------------------------------------------------
[12:24:30.757] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:24:30.765] <TB2> INFO: dacScan step from 0 .. 3
[12:24:50.398] <TB2> INFO: Test took 19632ms.
[12:24:50.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:50.426] <TB2> INFO: dacScan step from 4 .. 7
[12:25:10.009] <TB2> INFO: Test took 19583ms.
[12:25:10.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:10.039] <TB2> INFO: dacScan step from 8 .. 11
[12:25:27.836] <TB2> INFO: Test took 17797ms.
[12:25:27.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:27.863] <TB2> INFO: dacScan step from 12 .. 15
[12:25:46.360] <TB2> INFO: Test took 18497ms.
[12:25:46.389] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:46.389] <TB2> INFO: dacScan step from 16 .. 19
[12:26:05.904] <TB2> INFO: Test took 19515ms.
[12:26:05.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:05.946] <TB2> INFO: dacScan step from 20 .. 23
[12:26:25.250] <TB2> INFO: Test took 19304ms.
[12:26:25.279] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:25.279] <TB2> INFO: dacScan step from 24 .. 27
[12:26:44.799] <TB2> INFO: Test took 19520ms.
[12:26:44.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:44.830] <TB2> INFO: dacScan step from 28 .. 31
[12:27:04.502] <TB2> INFO: Test took 19672ms.
[12:27:04.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:04.533] <TB2> INFO: dacScan step from 32 .. 35
[12:27:24.426] <TB2> INFO: Test took 19893ms.
[12:27:24.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:24.457] <TB2> INFO: dacScan step from 36 .. 39
[12:27:44.137] <TB2> INFO: Test took 19679ms.
[12:27:44.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:44.168] <TB2> INFO: dacScan step from 40 .. 43
[12:28:04.158] <TB2> INFO: Test took 19990ms.
[12:28:04.187] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:04.187] <TB2> INFO: dacScan step from 44 .. 47
[12:28:24.170] <TB2> INFO: Test took 19983ms.
[12:28:24.205] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:24.205] <TB2> INFO: dacScan step from 48 .. 51
[12:28:43.878] <TB2> INFO: Test took 19673ms.
[12:28:43.911] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:43.911] <TB2> INFO: dacScan step from 52 .. 55
[12:29:03.504] <TB2> INFO: Test took 19593ms.
[12:29:03.530] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:03.530] <TB2> INFO: dacScan step from 56 .. 59
[12:29:23.325] <TB2> INFO: Test took 19795ms.
[12:29:23.354] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:23.354] <TB2> INFO: dacScan step from 60 .. 63
[12:29:43.083] <TB2> INFO: Test took 19729ms.
[12:29:43.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:43.111] <TB2> INFO: dacScan step from 64 .. 67
[12:30:03.124] <TB2> INFO: Test took 20013ms.
[12:30:03.149] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:03.149] <TB2> INFO: dacScan step from 68 .. 71
[12:30:23.260] <TB2> INFO: Test took 20110ms.
[12:30:23.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:23.288] <TB2> INFO: dacScan step from 72 .. 75
[12:30:43.606] <TB2> INFO: Test took 20318ms.
[12:30:43.638] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:43.639] <TB2> INFO: dacScan step from 76 .. 79
[12:31:03.784] <TB2> INFO: Test took 20145ms.
[12:31:03.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:03.824] <TB2> INFO: dacScan step from 80 .. 83
[12:31:24.702] <TB2> INFO: Test took 20878ms.
[12:31:24.771] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:24.776] <TB2> INFO: dacScan step from 84 .. 87
[12:31:48.001] <TB2> INFO: Test took 23225ms.
[12:31:48.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:48.130] <TB2> INFO: dacScan step from 88 .. 91
[12:32:13.432] <TB2> INFO: Test took 25302ms.
[12:32:13.583] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:13.599] <TB2> INFO: dacScan step from 92 .. 95
[12:32:42.328] <TB2> INFO: Test took 28729ms.
[12:32:42.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:42.545] <TB2> INFO: dacScan step from 96 .. 99
[12:33:13.773] <TB2> INFO: Test took 31228ms.
[12:33:14.033] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:14.046] <TB2> INFO: dacScan step from 100 .. 103

[12:33:46.601] <TB2> INFO: Test took 32555ms.
[12:33:46.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:46.862] <TB2> INFO: dacScan step from 104 .. 107


[12:34:20.093] <TB2> INFO: Test took 33231ms.
[12:34:20.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:20.345] <TB2> INFO: dacScan step from 108 .. 111


[12:34:52.446] <TB2> INFO: Test took 32101ms.
[12:34:52.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:52.687] <TB2> INFO: dacScan step from 112 .. 115

[12:35:24.934] <TB2> INFO: Test took 32247ms.
[12:35:25.149] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:25.160] <TB2> INFO: dacScan step from 116 .. 119


[12:35:57.723] <TB2> INFO: Test took 32563ms.
[12:35:57.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:57.965] <TB2> INFO: dacScan step from 120 .. 123


[12:36:30.543] <TB2> INFO: Test took 32578ms.
[12:36:30.767] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:30.779] <TB2> INFO: dacScan step from 124 .. 127





[12:37:03.390] <TB2> INFO: Test took 32611ms.
[12:37:03.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:03.643] <TB2> INFO: dacScan step from 128 .. 131
[12:37:36.586] <TB2> INFO: Test took 32943ms.
[12:37:36.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:36.829] <TB2> INFO: dacScan step from 132 .. 135
[12:38:10.252] <TB2> INFO: Test took 33423ms.
[12:38:10.476] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:10.488] <TB2> INFO: dacScan step from 136 .. 139
[12:38:43.284] <TB2> INFO: Test took 32796ms.
[12:38:43.569] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:43.580] <TB2> INFO: dacScan step from 140 .. 143
[12:39:14.485] <TB2> INFO: Test took 30905ms.
[12:39:14.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:14.716] <TB2> INFO: dacScan step from 144 .. 147
[12:39:42.379] <TB2> INFO: Test took 27663ms.
[12:39:42.604] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:42.616] <TB2> INFO: dacScan step from 148 .. 149
[12:39:58.514] <TB2> INFO: Test took 15898ms.
[12:39:58.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:58.635] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:00.027] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:01.367] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:02.740] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:04.124] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:05.491] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:06.818] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:08.175] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:09.529] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:10.878] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:12.233] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:13.574] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:14.974] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:16.376] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:17.804] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:19.351] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:40:21.005] <TB2> INFO: PixTestScurves::scurves() done
[12:40:21.005] <TB2> INFO: Vcal mean: 91.86 97.06 88.89 90.75 91.73 97.84 86.53 85.32 90.98 91.41 97.15 92.85 90.51 89.01 90.19 97.67
[12:40:21.005] <TB2> INFO: Vcal RMS: 4.98 5.74 4.81 5.75 6.18 5.10 5.71 4.89 4.96 5.86 6.15 4.94 4.91 4.99 5.17 5.83
[12:40:21.005] <TB2> INFO: PixTestScurves::fullTest() done, duration: 950 seconds
[12:40:21.074] <TB2> INFO: ######################################################################
[12:40:21.074] <TB2> INFO: PixTestTrim::doTest()
[12:40:21.074] <TB2> INFO: ######################################################################
[12:40:21.076] <TB2> INFO: ----------------------------------------------------------------------
[12:40:21.076] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:40:21.076] <TB2> INFO: ----------------------------------------------------------------------
[12:40:21.153] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:40:21.153] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:40:21.162] <TB2> INFO: dacScan step from 0 .. 19
[12:40:36.217] <TB2> INFO: Test took 15055ms.
[12:40:36.241] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:36.241] <TB2> INFO: dacScan step from 20 .. 39
[12:40:52.054] <TB2> INFO: Test took 15813ms.
[12:40:52.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:52.081] <TB2> INFO: dacScan step from 40 .. 59
[12:41:08.130] <TB2> INFO: Test took 16049ms.
[12:41:08.153] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:08.153] <TB2> INFO: dacScan step from 60 .. 79
[12:41:24.783] <TB2> INFO: Test took 16630ms.
[12:41:24.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:24.803] <TB2> INFO: dacScan step from 80 .. 99
[12:41:40.012] <TB2> INFO: Test took 15209ms.
[12:41:40.052] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:40.058] <TB2> INFO: dacScan step from 100 .. 119
[12:41:59.869] <TB2> INFO: Test took 19811ms.
[12:42:00.033] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:00.070] <TB2> INFO: dacScan step from 120 .. 139
[12:42:17.607] <TB2> INFO: Test took 17536ms.
[12:42:17.755] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:17.786] <TB2> INFO: dacScan step from 140 .. 159
[12:42:33.581] <TB2> INFO: Test took 15795ms.
[12:42:33.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:54.682] <TB2> INFO: ROC 0 VthrComp = 92
[12:42:54.682] <TB2> INFO: ROC 1 VthrComp = 95
[12:42:54.687] <TB2> INFO: ROC 2 VthrComp = 94
[12:42:54.687] <TB2> INFO: ROC 3 VthrComp = 89
[12:42:54.687] <TB2> INFO: ROC 4 VthrComp = 90
[12:42:54.687] <TB2> INFO: ROC 5 VthrComp = 104
[12:42:54.687] <TB2> INFO: ROC 6 VthrComp = 89
[12:42:54.687] <TB2> INFO: ROC 7 VthrComp = 89
[12:42:54.687] <TB2> INFO: ROC 8 VthrComp = 92
[12:42:54.688] <TB2> INFO: ROC 9 VthrComp = 92
[12:42:54.688] <TB2> INFO: ROC 10 VthrComp = 96
[12:42:54.688] <TB2> INFO: ROC 11 VthrComp = 95
[12:42:54.688] <TB2> INFO: ROC 12 VthrComp = 91
[12:42:54.688] <TB2> INFO: ROC 13 VthrComp = 93
[12:42:54.688] <TB2> INFO: ROC 14 VthrComp = 90
[12:42:54.688] <TB2> INFO: ROC 15 VthrComp = 99
[12:42:54.688] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:42:54.688] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:42:54.698] <TB2> INFO: dacScan step from 0 .. 19
[12:43:09.773] <TB2> INFO: Test took 15075ms.
[12:43:09.794] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:09.794] <TB2> INFO: dacScan step from 20 .. 39
[12:43:25.156] <TB2> INFO: Test took 15362ms.
[12:43:25.193] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:25.195] <TB2> INFO: dacScan step from 40 .. 59
[12:43:44.686] <TB2> INFO: Test took 19491ms.
[12:43:44.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:44.900] <TB2> INFO: dacScan step from 60 .. 79
[12:44:05.768] <TB2> INFO: Test took 20868ms.
[12:44:05.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:05.972] <TB2> INFO: dacScan step from 80 .. 99
[12:44:25.913] <TB2> INFO: Test took 19941ms.
[12:44:26.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:26.126] <TB2> INFO: dacScan step from 100 .. 119
[12:44:46.225] <TB2> INFO: Test took 20099ms.
[12:44:46.391] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:46.441] <TB2> INFO: dacScan step from 120 .. 139
[12:45:06.719] <TB2> INFO: Test took 20277ms.
[12:45:06.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:06.953] <TB2> INFO: dacScan step from 140 .. 159
[12:45:25.906] <TB2> INFO: Test took 18953ms.
[12:45:26.085] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:50.584] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.1274 for pixel 6/3 mean/min/max = 46.4315/33.712/59.1509
[12:45:50.585] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.4858 for pixel 8/0 mean/min/max = 47.3773/32.1801/62.5744
[12:45:50.588] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.5507 for pixel 51/57 mean/min/max = 44.7362/32.8147/56.6576
[12:45:50.588] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 61.702 for pixel 8/2 mean/min/max = 47.4102/32.9889/61.8315
[12:45:50.589] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.793 for pixel 10/19 mean/min/max = 47.1051/33.1734/61.0368
[12:45:50.589] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.3938 for pixel 27/79 mean/min/max = 46.4651/34.4551/58.475
[12:45:50.589] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.4664 for pixel 6/2 mean/min/max = 46.8896/33.2334/60.5458
[12:45:50.589] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.8516 for pixel 19/1 mean/min/max = 45.9857/34.0979/57.8735
[12:45:50.590] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.5962 for pixel 11/6 mean/min/max = 45.8007/33.9881/57.6132
[12:45:50.590] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 61.9186 for pixel 11/3 mean/min/max = 47.2495/32.5332/61.9657
[12:45:50.590] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.6794 for pixel 0/5 mean/min/max = 46.6177/31.458/61.7775
[12:45:50.590] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 55.8177 for pixel 19/1 mean/min/max = 44.3401/32.5147/56.1654
[12:45:50.591] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.7045 for pixel 14/2 mean/min/max = 45.9121/34.0597/57.7644
[12:45:50.591] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.2356 for pixel 26/78 mean/min/max = 45.1949/33.9328/56.4571
[12:45:50.591] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.1823 for pixel 12/13 mean/min/max = 45.8369/33.4005/58.2733
[12:45:50.591] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.2474 for pixel 12/3 mean/min/max = 45.1996/32.0417/58.3576
[12:45:50.592] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:33.459] <TB2> INFO: Test took 102867ms.
[12:47:34.881] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:47:34.890] <TB2> INFO: dacScan step from 0 .. 19
[12:48:00.455] <TB2> INFO: Test took 25565ms.
[12:48:00.508] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:00.510] <TB2> INFO: dacScan step from 20 .. 39
[12:48:29.960] <TB2> INFO: Test took 29450ms.
[12:48:30.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:30.228] <TB2> INFO: dacScan step from 40 .. 59



[12:49:04.069] <TB2> INFO: Test took 33841ms.
[12:49:04.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:04.594] <TB2> INFO: dacScan step from 60 .. 79


[12:49:38.856] <TB2> INFO: Test took 34262ms.
[12:49:39.146] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:39.200] <TB2> INFO: dacScan step from 80 .. 99
[12:50:15.014] <TB2> INFO: Test took 35814ms.
[12:50:15.298] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:15.359] <TB2> INFO: dacScan step from 100 .. 119



[12:50:51.641] <TB2> INFO: Test took 36282ms.
[12:50:51.948] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:52.001] <TB2> INFO: dacScan step from 120 .. 139

[12:51:28.018] <TB2> INFO: Test took 36017ms.
[12:51:28.292] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:28.346] <TB2> INFO: dacScan step from 140 .. 159


[12:52:02.954] <TB2> INFO: Test took 34608ms.
[12:52:03.238] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:03.287] <TB2> INFO: dacScan step from 160 .. 179


[12:52:39.484] <TB2> INFO: Test took 36197ms.
[12:52:39.797] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:39.853] <TB2> INFO: dacScan step from 180 .. 199


[12:53:11.499] <TB2> INFO: Test took 31646ms.
[12:53:11.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:39.435] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.018975 .. 255.000000
[12:53:39.520] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:53:39.528] <TB2> INFO: dacScan step from 0 .. 19
[12:53:53.308] <TB2> INFO: Test took 13780ms.
[12:53:53.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:53.333] <TB2> INFO: dacScan step from 20 .. 39
[12:54:08.249] <TB2> INFO: Test took 14916ms.
[12:54:08.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:08.351] <TB2> INFO: dacScan step from 40 .. 59
[12:54:26.210] <TB2> INFO: Test took 17859ms.
[12:54:26.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:26.419] <TB2> INFO: dacScan step from 60 .. 79
[12:54:44.230] <TB2> INFO: Test took 17811ms.
[12:54:44.374] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:44.422] <TB2> INFO: dacScan step from 80 .. 99
[12:55:02.277] <TB2> INFO: Test took 17855ms.
[12:55:02.423] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:02.475] <TB2> INFO: dacScan step from 100 .. 119
[12:55:20.309] <TB2> INFO: Test took 17834ms.
[12:55:20.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:20.510] <TB2> INFO: dacScan step from 120 .. 139
[12:55:38.310] <TB2> INFO: Test took 17800ms.
[12:55:38.477] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:38.538] <TB2> INFO: dacScan step from 140 .. 159
[12:55:56.392] <TB2> INFO: Test took 17854ms.
[12:55:56.564] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:56.618] <TB2> INFO: dacScan step from 160 .. 179
[12:56:13.304] <TB2> INFO: Test took 16685ms.
[12:56:13.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:13.500] <TB2> INFO: dacScan step from 180 .. 199
[12:56:31.646] <TB2> INFO: Test took 18146ms.
[12:56:31.794] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:31.844] <TB2> INFO: dacScan step from 200 .. 219
[12:56:49.568] <TB2> INFO: Test took 17724ms.
[12:56:49.707] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:49.765] <TB2> INFO: dacScan step from 220 .. 239
[12:57:06.708] <TB2> INFO: Test took 16942ms.
[12:57:06.939] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:07.033] <TB2> INFO: dacScan step from 240 .. 255
[12:57:21.217] <TB2> INFO: Test took 14184ms.
[12:57:21.402] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:56.548] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.047137 .. 44.982549
[12:57:56.630] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 54 (20) hits flags = 16 (plus default)
[12:57:56.639] <TB2> INFO: dacScan step from 5 .. 24
[12:58:10.216] <TB2> INFO: Test took 13577ms.
[12:58:10.235] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:10.235] <TB2> INFO: dacScan step from 25 .. 44
[12:58:25.252] <TB2> INFO: Test took 15017ms.
[12:58:25.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:25.395] <TB2> INFO: dacScan step from 45 .. 54
[12:58:36.057] <TB2> INFO: Test took 10662ms.
[12:58:36.127] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:51.074] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 5.500000 .. 40.889266
[12:58:51.152] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 5 .. 50 (20) hits flags = 16 (plus default)
[12:58:51.160] <TB2> INFO: dacScan step from 5 .. 24
[12:59:04.728] <TB2> INFO: Test took 13568ms.
[12:59:04.753] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:04.753] <TB2> INFO: dacScan step from 25 .. 44
[12:59:19.733] <TB2> INFO: Test took 14980ms.
[12:59:19.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:19.886] <TB2> INFO: dacScan step from 45 .. 50
[12:59:27.259] <TB2> INFO: Test took 7373ms.
[12:59:27.314] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:44.124] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.085668 .. 40.889266
[12:59:44.202] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 50 (20) hits flags = 16 (plus default)
[12:59:44.211] <TB2> INFO: dacScan step from 1 .. 20
[12:59:58.500] <TB2> INFO: Test took 14289ms.
[12:59:58.520] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:58.520] <TB2> INFO: dacScan step from 21 .. 40
[13:00:12.863] <TB2> INFO: Test took 14343ms.
[13:00:12.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:13.004] <TB2> INFO: dacScan step from 41 .. 50
[13:00:22.829] <TB2> INFO: Test took 9825ms.
[13:00:22.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:37.542] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:00:37.542] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:00:37.550] <TB2> INFO: dacScan step from 15 .. 34
[13:01:02.969] <TB2> INFO: Test took 25418ms.
[13:01:03.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:03.050] <TB2> INFO: dacScan step from 35 .. 54


[13:01:33.526] <TB2> INFO: Test took 30476ms.
[13:01:33.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:33.883] <TB2> INFO: dacScan step from 55 .. 55
[13:01:38.273] <TB2> INFO: Test took 4389ms.
[13:01:38.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:51.510] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:01:51.510] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:01:51.510] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:01:51.511] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:01:51.512] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:01:51.513] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:01:51.513] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C0.dat
[13:01:51.520] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C1.dat
[13:01:51.527] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C2.dat
[13:01:51.534] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C3.dat
[13:01:51.541] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C4.dat
[13:01:51.548] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C5.dat
[13:01:51.555] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C6.dat
[13:01:51.562] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C7.dat
[13:01:51.569] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C8.dat
[13:01:51.576] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C9.dat
[13:01:51.583] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C10.dat
[13:01:51.590] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C11.dat
[13:01:51.597] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C12.dat
[13:01:51.604] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C13.dat
[13:01:51.610] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C14.dat
[13:01:51.617] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//trimParameters35_C15.dat
[13:01:51.624] <TB2> INFO: PixTestTrim::trimTest() done
[13:01:51.624] <TB2> INFO: vtrim: 115 124 102 119 100 104 124 112 102 191 107 99 109 109 97 111
[13:01:51.625] <TB2> INFO: vthrcomp: 92 95 94 89 90 104 89 89 92 92 96 95 91 93 90 99
[13:01:51.625] <TB2> INFO: vcal mean: 35.08 35.05 35.06 35.09 35.08 35.11 35.11 35.11 35.06 34.98 35.08 35.08 35.07 35.13 35.11 35.05
[13:01:51.625] <TB2> INFO: vcal RMS: 1.05 1.15 1.00 1.13 1.12 1.00 1.06 0.98 1.00 1.92 1.09 1.05 1.03 1.05 1.18 1.20
[13:01:51.625] <TB2> INFO: bits mean: 9.64 9.53 9.74 9.89 9.37 8.71 9.64 9.79 9.52 11.52 9.44 10.23 9.66 10.03 9.69 10.32
[13:01:51.625] <TB2> INFO: bits RMS: 2.40 2.57 2.50 2.30 2.55 2.66 2.42 2.27 2.49 1.63 2.78 2.41 2.41 2.29 2.42 2.37
[13:01:51.632] <TB2> INFO: ----------------------------------------------------------------------
[13:01:51.632] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:01:51.632] <TB2> INFO: ----------------------------------------------------------------------
[13:01:51.635] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:01:51.646] <TB2> INFO: dacScan step from 0 .. 19
[13:02:17.006] <TB2> INFO: Test took 25360ms.
[13:02:17.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:17.041] <TB2> INFO: dacScan step from 20 .. 39
[13:02:42.384] <TB2> INFO: Test took 25343ms.
[13:02:42.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:42.425] <TB2> INFO: dacScan step from 40 .. 59
[13:03:07.587] <TB2> INFO: Test took 25162ms.
[13:03:07.625] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:07.625] <TB2> INFO: dacScan step from 60 .. 79
[13:03:32.231] <TB2> INFO: Test took 24605ms.
[13:03:32.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:32.274] <TB2> INFO: dacScan step from 80 .. 99
[13:03:57.431] <TB2> INFO: Test took 25156ms.
[13:03:57.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:57.469] <TB2> INFO: dacScan step from 100 .. 119
[13:04:25.730] <TB2> INFO: Test took 28261ms.
[13:04:25.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:25.878] <TB2> INFO: dacScan step from 120 .. 139





[13:05:00.388] <TB2> INFO: Test took 34510ms.
[13:05:00.782] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:00.887] <TB2> INFO: dacScan step from 140 .. 159





[13:05:35.713] <TB2> INFO: Test took 34826ms.
[13:05:35.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:36.034] <TB2> INFO: dacScan step from 160 .. 179
[13:06:11.768] <TB2> INFO: Test took 35734ms.
[13:06:12.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:12.130] <TB2> INFO: dacScan step from 180 .. 199
[13:06:43.639] <TB2> INFO: Test took 31509ms.
[13:06:43.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:11.549] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 167 (20) hits flags = 16 (plus default)
[13:07:11.560] <TB2> INFO: dacScan step from 0 .. 19
[13:07:35.978] <TB2> INFO: Test took 24418ms.
[13:07:36.016] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:36.016] <TB2> INFO: dacScan step from 20 .. 39
[13:08:00.227] <TB2> INFO: Test took 24211ms.
[13:08:00.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:00.266] <TB2> INFO: dacScan step from 40 .. 59
[13:08:24.229] <TB2> INFO: Test took 23963ms.
[13:08:24.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:24.268] <TB2> INFO: dacScan step from 60 .. 79
[13:08:48.397] <TB2> INFO: Test took 24129ms.
[13:08:48.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:48.438] <TB2> INFO: dacScan step from 80 .. 99
[13:09:14.332] <TB2> INFO: Test took 25894ms.
[13:09:14.385] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:14.387] <TB2> INFO: dacScan step from 100 .. 119
[13:09:44.705] <TB2> INFO: Test took 30317ms.
[13:09:44.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:44.972] <TB2> INFO: dacScan step from 120 .. 139





[13:10:21.399] <TB2> INFO: Test took 36427ms.
[13:10:21.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:21.730] <TB2> INFO: dacScan step from 140 .. 159

[13:10:56.552] <TB2> INFO: Test took 34822ms.
[13:10:56.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:56.870] <TB2> INFO: dacScan step from 160 .. 167
[13:11:12.154] <TB2> INFO: Test took 15284ms.
[13:11:12.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:35.420] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[13:11:35.428] <TB2> INFO: dacScan step from 0 .. 19
[13:12:00.391] <TB2> INFO: Test took 24962ms.
[13:12:00.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:00.428] <TB2> INFO: dacScan step from 20 .. 39
[13:12:25.525] <TB2> INFO: Test took 25097ms.
[13:12:25.559] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:25.559] <TB2> INFO: dacScan step from 40 .. 59
[13:12:50.825] <TB2> INFO: Test took 25266ms.
[13:12:50.861] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:50.861] <TB2> INFO: dacScan step from 60 .. 79
[13:13:15.533] <TB2> INFO: Test took 24671ms.
[13:13:15.576] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:15.576] <TB2> INFO: dacScan step from 80 .. 99
[13:13:39.466] <TB2> INFO: Test took 23890ms.
[13:13:39.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:39.526] <TB2> INFO: dacScan step from 100 .. 119
[13:14:11.907] <TB2> INFO: Test took 32381ms.
[13:14:12.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:12.165] <TB2> INFO: dacScan step from 120 .. 139
[13:14:47.744] <TB2> INFO: Test took 35579ms.
[13:14:48.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:48.260] <TB2> INFO: dacScan step from 140 .. 153
[13:15:14.376] <TB2> INFO: Test took 26116ms.
[13:15:14.568] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:36.406] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[13:15:36.415] <TB2> INFO: dacScan step from 0 .. 19
[13:15:57.906] <TB2> INFO: Test took 21491ms.
[13:15:57.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:57.940] <TB2> INFO: dacScan step from 20 .. 39
[13:16:21.713] <TB2> INFO: Test took 23773ms.
[13:16:21.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:21.749] <TB2> INFO: dacScan step from 40 .. 59
[13:16:45.736] <TB2> INFO: Test took 23987ms.
[13:16:45.775] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:45.775] <TB2> INFO: dacScan step from 60 .. 79
[13:17:09.524] <TB2> INFO: Test took 23749ms.
[13:17:09.559] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:09.559] <TB2> INFO: dacScan step from 80 .. 99
[13:17:32.933] <TB2> INFO: Test took 23373ms.
[13:17:32.985] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:32.987] <TB2> INFO: dacScan step from 100 .. 119
[13:18:04.405] <TB2> INFO: Test took 31417ms.
[13:18:04.616] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:04.659] <TB2> INFO: dacScan step from 120 .. 139


[13:18:39.293] <TB2> INFO: Test took 34634ms.
[13:18:39.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:39.628] <TB2> INFO: dacScan step from 140 .. 150
[13:19:01.470] <TB2> INFO: Test took 21842ms.
[13:19:01.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:24.193] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[13:19:24.202] <TB2> INFO: dacScan step from 0 .. 19
[13:19:47.346] <TB2> INFO: Test took 23144ms.
[13:19:47.380] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:47.380] <TB2> INFO: dacScan step from 20 .. 39
[13:20:08.626] <TB2> INFO: Test took 21246ms.
[13:20:08.662] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:08.662] <TB2> INFO: dacScan step from 40 .. 59
[13:20:31.394] <TB2> INFO: Test took 22732ms.
[13:20:31.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:31.431] <TB2> INFO: dacScan step from 60 .. 79
[13:20:53.998] <TB2> INFO: Test took 22567ms.
[13:20:54.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:54.038] <TB2> INFO: dacScan step from 80 .. 99
[13:21:15.897] <TB2> INFO: Test took 21859ms.
[13:21:15.947] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:15.950] <TB2> INFO: dacScan step from 100 .. 119
[13:21:46.415] <TB2> INFO: Test took 30465ms.
[13:21:46.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:46.711] <TB2> INFO: dacScan step from 120 .. 139


[13:22:21.796] <TB2> INFO: Test took 35085ms.
[13:22:22.088] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:22.143] <TB2> INFO: dacScan step from 140 .. 150
[13:22:44.094] <TB2> INFO: Test took 21950ms.
[13:22:44.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:07.482] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:23:07.484] <TB2> INFO: PixTestTrim::doTest() done, duration: 2566 seconds
[13:23:08.175] <TB2> INFO: ######################################################################
[13:23:08.175] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:23:08.175] <TB2> INFO: ######################################################################
[13:23:11.917] <TB2> INFO: Test took 3740ms.
[13:23:11.941] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:15.592] <TB2> INFO: Test took 3454ms.
[13:23:15.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:19.342] <TB2> INFO: Test took 3672ms.
[13:23:19.414] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:19.421] <TB2> INFO: The DUT currently contains the following objects:
[13:23:19.421] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:19.421] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:19.421] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:19.421] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:19.421] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.421] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.421] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.421] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:19.422] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.544] <TB2> INFO: Test took 1122ms.
[13:23:20.545] <TB2> INFO: The DUT currently contains the following objects:
[13:23:20.554] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:20.554] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:20.554] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:20.554] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:20.554] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.554] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:20.555] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.653] <TB2> INFO: Test took 1098ms.
[13:23:21.654] <TB2> INFO: The DUT currently contains the following objects:
[13:23:21.654] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:21.654] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:21.654] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:21.654] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:21.654] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.654] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.655] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:21.655] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.761] <TB2> INFO: Test took 1106ms.
[13:23:22.762] <TB2> INFO: The DUT currently contains the following objects:
[13:23:22.762] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:22.762] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:22.762] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:22.762] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:22.762] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.762] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.763] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.763] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.763] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.763] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:22.763] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.870] <TB2> INFO: Test took 1107ms.
[13:23:23.871] <TB2> INFO: The DUT currently contains the following objects:
[13:23:23.871] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:23.871] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:23.871] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:23.871] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:23.871] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:23.871] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.993] <TB2> INFO: Test took 1122ms.
[13:23:24.994] <TB2> INFO: The DUT currently contains the following objects:
[13:23:24.994] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:24.994] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:24.994] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:24.994] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:24.994] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.994] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:24.995] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.101] <TB2> INFO: Test took 1106ms.
[13:23:26.102] <TB2> INFO: The DUT currently contains the following objects:
[13:23:26.102] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:26.102] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:26.102] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:26.102] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:26.102] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.102] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:26.103] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.209] <TB2> INFO: Test took 1106ms.
[13:23:27.210] <TB2> INFO: The DUT currently contains the following objects:
[13:23:27.210] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:27.210] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:27.210] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:27.210] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:27.210] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.210] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.210] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.210] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.210] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:27.211] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.317] <TB2> INFO: Test took 1106ms.
[13:23:28.319] <TB2> INFO: The DUT currently contains the following objects:
[13:23:28.319] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:28.319] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:28.319] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:28.319] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:28.319] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.319] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.319] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.319] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.319] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.319] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:28.320] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.425] <TB2> INFO: Test took 1105ms.
[13:23:29.426] <TB2> INFO: The DUT currently contains the following objects:
[13:23:29.426] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:29.426] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:29.426] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:29.426] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:29.426] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.426] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.426] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.426] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.426] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:29.427] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.533] <TB2> INFO: Test took 1106ms.
[13:23:30.534] <TB2> INFO: The DUT currently contains the following objects:
[13:23:30.534] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:30.534] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:30.534] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:30.534] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:30.534] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.534] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:30.535] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.657] <TB2> INFO: Test took 1122ms.
[13:23:31.658] <TB2> INFO: The DUT currently contains the following objects:
[13:23:31.658] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:31.658] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:31.658] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:31.658] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:31.658] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:31.658] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.765] <TB2> INFO: Test took 1107ms.
[13:23:32.766] <TB2> INFO: The DUT currently contains the following objects:
[13:23:32.766] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:32.767] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:32.767] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:32.767] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:32.767] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:32.767] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.875] <TB2> INFO: Test took 1108ms.
[13:23:33.876] <TB2> INFO: The DUT currently contains the following objects:
[13:23:33.876] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:33.876] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:33.876] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:33.876] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:33.876] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.876] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.876] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:33.877] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.984] <TB2> INFO: Test took 1108ms.
[13:23:34.986] <TB2> INFO: The DUT currently contains the following objects:
[13:23:34.986] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:34.986] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:34.986] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:34.986] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:34.986] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.986] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.986] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.986] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.986] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.986] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:34.987] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.137] <TB2> INFO: Test took 1150ms.
[13:23:36.138] <TB2> INFO: The DUT currently contains the following objects:
[13:23:36.138] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:23:36.138] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:23:36.138] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:23:36.138] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:23:36.138] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:36.138] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:23:37.246] <TB2> INFO: Test took 1107ms.
[13:23:37.251] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:27:39.850] <TB2> INFO: Test took 242599ms.
[13:27:41.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:50.037] <TB2> INFO: Test took 248700ms.
[13:31:51.735] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.744] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.753] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.761] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.770] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.778] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.785] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.792] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.799] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.806] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.813] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[13:31:51.820] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[13:31:51.827] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[13:31:51.834] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[13:31:51.841] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.848] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.856] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.863] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.869] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.877] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:31:51.918] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:31:51.918] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:31:51.918] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:31:51.919] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:31:51.919] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:31:51.919] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:31:51.920] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:31:51.920] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:31:51.920] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:31:51.920] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:31:51.921] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:31:51.921] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:31:51.921] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:31:51.921] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:31:51.922] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:31:51.922] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:31:55.357] <TB2> INFO: Test took 3432ms.
[13:31:59.193] <TB2> INFO: Test took 3549ms.
[13:32:03.060] <TB2> INFO: Test took 3586ms.
[13:32:03.348] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:04.276] <TB2> INFO: Test took 928ms.
[13:32:04.279] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:05.415] <TB2> INFO: Test took 1136ms.
[13:32:05.420] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:06.526] <TB2> INFO: Test took 1106ms.
[13:32:06.530] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:07.637] <TB2> INFO: Test took 1107ms.
[13:32:07.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:08.742] <TB2> INFO: Test took 1101ms.
[13:32:08.745] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:09.853] <TB2> INFO: Test took 1108ms.
[13:32:09.856] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:10.963] <TB2> INFO: Test took 1107ms.
[13:32:10.967] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:12.075] <TB2> INFO: Test took 1108ms.
[13:32:12.079] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:13.181] <TB2> INFO: Test took 1102ms.
[13:32:13.183] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:14.320] <TB2> INFO: Test took 1138ms.
[13:32:14.324] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:15.432] <TB2> INFO: Test took 1108ms.
[13:32:15.435] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:16.560] <TB2> INFO: Test took 1125ms.
[13:32:16.563] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:17.699] <TB2> INFO: Test took 1136ms.
[13:32:17.703] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:18.819] <TB2> INFO: Test took 1116ms.
[13:32:18.822] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:19.946] <TB2> INFO: Test took 1124ms.
[13:32:19.950] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:21.057] <TB2> INFO: Test took 1108ms.
[13:32:21.060] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:22.169] <TB2> INFO: Test took 1109ms.
[13:32:22.173] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:23.275] <TB2> INFO: Test took 1103ms.
[13:32:23.277] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:24.384] <TB2> INFO: Test took 1107ms.
[13:32:24.387] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:25.493] <TB2> INFO: Test took 1106ms.
[13:32:25.498] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:26.606] <TB2> INFO: Test took 1109ms.
[13:32:26.610] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:27.725] <TB2> INFO: Test took 1115ms.
[13:32:27.727] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:28.851] <TB2> INFO: Test took 1124ms.
[13:32:28.855] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:29.978] <TB2> INFO: Test took 1124ms.
[13:32:29.982] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:31.083] <TB2> INFO: Test took 1102ms.
[13:32:31.085] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:32.202] <TB2> INFO: Test took 1117ms.
[13:32:32.204] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:33.321] <TB2> INFO: Test took 1117ms.
[13:32:33.324] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:34.425] <TB2> INFO: Test took 1101ms.
[13:32:34.428] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:35.528] <TB2> INFO: Test took 1101ms.
[13:32:35.531] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:36.630] <TB2> INFO: Test took 1099ms.
[13:32:36.632] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:37.731] <TB2> INFO: Test took 1099ms.
[13:32:37.733] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:32:38.833] <TB2> INFO: Test took 1100ms.
[13:32:39.337] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 571 seconds
[13:32:39.337] <TB2> INFO: PH scale (per ROC): 75 76 74 66 71 75 74 81 77 80 79 80 70 83 79 81
[13:32:39.337] <TB2> INFO: PH offset (per ROC): 178 197 179 186 174 191 182 176 181 173 187 172 176 174 175 176
[13:32:39.522] <TB2> INFO: ######################################################################
[13:32:39.522] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:32:39.522] <TB2> INFO: ######################################################################
[13:32:39.532] <TB2> INFO: scanning low vcal = 10
[13:32:43.345] <TB2> INFO: Test took 3813ms.
[13:32:43.348] <TB2> INFO: scanning low vcal = 20
[13:32:47.230] <TB2> INFO: Test took 3882ms.
[13:32:47.233] <TB2> INFO: scanning low vcal = 30
[13:32:51.057] <TB2> INFO: Test took 3824ms.
[13:32:51.064] <TB2> INFO: scanning low vcal = 40
[13:32:55.691] <TB2> INFO: Test took 4627ms.
[13:32:55.783] <TB2> INFO: scanning low vcal = 50
[13:33:00.349] <TB2> INFO: Test took 4566ms.
[13:33:00.407] <TB2> INFO: scanning low vcal = 60
[13:33:04.607] <TB2> INFO: Test took 4200ms.
[13:33:04.670] <TB2> INFO: scanning low vcal = 70
[13:33:09.313] <TB2> INFO: Test took 4642ms.
[13:33:09.382] <TB2> INFO: scanning low vcal = 80
[13:33:14.054] <TB2> INFO: Test took 4672ms.
[13:33:14.115] <TB2> INFO: scanning low vcal = 90
[13:33:18.327] <TB2> INFO: Test took 4212ms.
[13:33:18.384] <TB2> INFO: scanning low vcal = 100
[13:33:22.782] <TB2> INFO: Test took 4398ms.
[13:33:22.847] <TB2> INFO: scanning low vcal = 110
[13:33:27.233] <TB2> INFO: Test took 4386ms.
[13:33:27.297] <TB2> INFO: scanning low vcal = 120
[13:33:31.681] <TB2> INFO: Test took 4383ms.
[13:33:31.767] <TB2> INFO: scanning low vcal = 130
[13:33:36.226] <TB2> INFO: Test took 4459ms.
[13:33:36.285] <TB2> INFO: scanning low vcal = 140
[13:33:40.679] <TB2> INFO: Test took 4394ms.
[13:33:40.740] <TB2> INFO: scanning low vcal = 150
[13:33:45.121] <TB2> INFO: Test took 4381ms.
[13:33:45.186] <TB2> INFO: scanning low vcal = 160
[13:33:49.658] <TB2> INFO: Test took 4472ms.
[13:33:49.745] <TB2> INFO: scanning low vcal = 170
[13:33:54.173] <TB2> INFO: Test took 4428ms.
[13:33:54.253] <TB2> INFO: scanning low vcal = 180
[13:33:58.687] <TB2> INFO: Test took 4433ms.
[13:33:58.750] <TB2> INFO: scanning low vcal = 190
[13:34:03.279] <TB2> INFO: Test took 4530ms.
[13:34:03.348] <TB2> INFO: scanning low vcal = 200
[13:34:07.752] <TB2> INFO: Test took 4404ms.
[13:34:07.817] <TB2> INFO: scanning low vcal = 210
[13:34:12.213] <TB2> INFO: Test took 4396ms.
[13:34:12.274] <TB2> INFO: scanning low vcal = 220
[13:34:16.490] <TB2> INFO: Test took 4216ms.
[13:34:16.571] <TB2> INFO: scanning low vcal = 230
[13:34:20.870] <TB2> INFO: Test took 4299ms.
[13:34:20.927] <TB2> INFO: scanning low vcal = 240
[13:34:25.221] <TB2> INFO: Test took 4294ms.
[13:34:25.290] <TB2> INFO: scanning low vcal = 250
[13:34:29.514] <TB2> INFO: Test took 4224ms.
[13:34:29.576] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[13:34:33.830] <TB2> INFO: Test took 4254ms.
[13:34:33.891] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[13:34:38.125] <TB2> INFO: Test took 4234ms.
[13:34:38.183] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[13:34:42.402] <TB2> INFO: Test took 4219ms.
[13:34:42.458] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[13:34:46.667] <TB2> INFO: Test took 4209ms.
[13:34:46.723] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:34:51.122] <TB2> INFO: Test took 4399ms.
[13:34:51.613] <TB2> INFO: PixTestGainPedestal::measure() done
[13:35:23.569] <TB2> INFO: PixTestGainPedestal::fit() done
[13:35:23.569] <TB2> INFO: non-linearity mean: 0.962 0.968 0.952 0.959 0.956 0.964 0.959 0.954 0.959 0.961 0.965 0.960 0.950 0.959 0.953 0.955
[13:35:23.569] <TB2> INFO: non-linearity RMS: 0.008 0.006 0.007 0.006 0.006 0.005 0.006 0.006 0.006 0.005 0.006 0.005 0.008 0.006 0.007 0.007
[13:35:23.569] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[13:35:23.592] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[13:35:23.627] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[13:35:23.661] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[13:35:23.691] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[13:35:23.727] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[13:35:23.748] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[13:35:23.779] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[13:35:23.797] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[13:35:23.816] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[13:35:23.839] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[13:35:23.873] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[13:35:23.894] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[13:35:23.921] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[13:35:23.940] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[13:35:23.958] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[13:35:23.977] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[13:35:23.984] <TB2> INFO: enter test to run
[13:35:23.984] <TB2> INFO: test: exit no parameter change
[13:35:24.420] <TB2> QUIET: Connection to board 156 closed.
[13:35:24.500] <TB2> INFO: pXar: this is the end, my friend