[10:21:36.183] <TB2> INFO: *** Welcome to pxar ***
[10:21:36.183] <TB2> INFO: *** Today: 2015/08/17
[10:21:36.183] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C15.dat
[10:21:36.185] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//tbmParameters_C0b.dat
[10:21:36.185] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//defaultMaskFile.dat
[10:21:36.185] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters_C15.dat
[10:21:36.257] <TB2> INFO: clk: 4
[10:21:36.257] <TB2> INFO: ctr: 4
[10:21:36.257] <TB2> INFO: sda: 19
[10:21:36.258] <TB2> INFO: tin: 9
[10:21:36.258] <TB2> INFO: level: 15
[10:21:36.258] <TB2> INFO: triggerdelay: 0
[10:21:36.258] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[10:21:36.258] <TB2> INFO: Log level: INFO
[10:21:36.266] <TB2> INFO: Found DTB DTB_WXC55Z
[10:21:36.274] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[10:21:36.277] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[10:21:36.280] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[10:21:37.822] <TB2> INFO: DUT info:
[10:21:37.822] <TB2> INFO: The DUT currently contains the following objects:
[10:21:37.822] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:21:37.822] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:21:37.822] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:21:37.822] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:21:37.822] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.822] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.823] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.823] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.823] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:37.823] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:38.224] <TB2> INFO: enter 'restricted' command line mode
[10:21:38.224] <TB2> INFO: enter test to run
[10:21:38.224] <TB2> INFO: test: pretest no parameter change
[10:21:38.224] <TB2> INFO: running: pretest
[10:21:38.233] <TB2> INFO: ######################################################################
[10:21:38.233] <TB2> INFO: PixTestPretest::doTest()
[10:21:38.233] <TB2> INFO: ######################################################################
[10:21:38.234] <TB2> INFO: ----------------------------------------------------------------------
[10:21:38.235] <TB2> INFO: PixTestPretest::programROC()
[10:21:38.235] <TB2> INFO: ----------------------------------------------------------------------
[10:21:56.251] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:21:56.251] <TB2> INFO: IA differences per ROC: 17.7 18.5 20.9 19.3 19.3 18.5 16.9 20.1 18.5 18.5 17.7 16.9 16.1 19.3 16.9 18.5
[10:21:56.331] <TB2> INFO: ----------------------------------------------------------------------
[10:21:56.331] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:21:56.331] <TB2> INFO: ----------------------------------------------------------------------
[10:22:15.893] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 377 mA = 23.5625 mA/ROC
[10:22:15.897] <TB2> INFO: ----------------------------------------------------------------------
[10:22:15.897] <TB2> INFO: PixTestPretest::findWorkingPixel()
[10:22:15.897] <TB2> INFO: ----------------------------------------------------------------------
[10:22:24.279] <TB2> INFO: Test took 8374ms.
[10:22:24.579] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:22:24.612] <TB2> INFO: ----------------------------------------------------------------------
[10:22:24.612] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[10:22:24.612] <TB2> INFO: ----------------------------------------------------------------------
[10:22:33.316] <TB2> INFO: Test took 8699ms.
[10:22:33.622] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[10:22:33.623] <TB2> INFO: CalDel: 148 126 141 147 143 150 147 137 160 135 107 119 135 143 144 122
[10:22:33.623] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:22:33.628] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C0.dat
[10:22:33.628] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C1.dat
[10:22:33.628] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C2.dat
[10:22:33.629] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C3.dat
[10:22:33.629] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C4.dat
[10:22:33.629] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C5.dat
[10:22:33.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C6.dat
[10:22:33.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C7.dat
[10:22:33.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C8.dat
[10:22:33.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C9.dat
[10:22:33.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C10.dat
[10:22:33.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C11.dat
[10:22:33.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C12.dat
[10:22:33.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C13.dat
[10:22:33.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C14.dat
[10:22:33.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters_C15.dat
[10:22:33.633] <TB2> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[10:22:33.722] <TB2> INFO: enter test to run
[10:22:33.722] <TB2> INFO: test: fulltest no parameter change
[10:22:33.722] <TB2> INFO: running: fulltest
[10:22:33.722] <TB2> INFO: ######################################################################
[10:22:33.722] <TB2> INFO: PixTestFullTest::doTest()
[10:22:33.722] <TB2> INFO: ######################################################################
[10:22:33.723] <TB2> INFO: ######################################################################
[10:22:33.724] <TB2> INFO: PixTestAlive::doTest()
[10:22:33.724] <TB2> INFO: ######################################################################
[10:22:33.725] <TB2> INFO: ----------------------------------------------------------------------
[10:22:33.725] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:22:33.725] <TB2> INFO: ----------------------------------------------------------------------
[10:22:37.221] <TB2> INFO: Test took 3495ms.
[10:22:37.247] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:37.474] <TB2> INFO: PixTestAlive::aliveTest() done
[10:22:37.474] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:22:37.476] <TB2> INFO: ----------------------------------------------------------------------
[10:22:37.476] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:22:37.476] <TB2> INFO: ----------------------------------------------------------------------
[10:22:40.239] <TB2> INFO: Test took 2761ms.
[10:22:40.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:40.244] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:22:40.466] <TB2> INFO: PixTestAlive::maskTest() done
[10:22:40.466] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:22:40.468] <TB2> INFO: ----------------------------------------------------------------------
[10:22:40.468] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:22:40.468] <TB2> INFO: ----------------------------------------------------------------------
[10:22:43.930] <TB2> INFO: Test took 3461ms.
[10:22:43.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:44.188] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[10:22:44.188] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:22:44.189] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:22:44.204] <TB2> INFO: ######################################################################
[10:22:44.204] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:22:44.204] <TB2> INFO: ######################################################################
[10:22:44.208] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:22:44.223] <TB2> INFO: dacScan step from 0 .. 29
[10:23:05.714] <TB2> INFO: Test took 21491ms.
[10:23:05.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:05.746] <TB2> INFO: dacScan step from 30 .. 59
[10:23:30.889] <TB2> INFO: Test took 25143ms.
[10:23:31.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:31.041] <TB2> INFO: dacScan step from 60 .. 89
[10:24:02.933] <TB2> INFO: Test took 31892ms.
[10:24:03.185] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:03.278] <TB2> INFO: dacScan step from 90 .. 119
[10:24:33.517] <TB2> INFO: Test took 30239ms.
[10:24:33.782] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:33.862] <TB2> INFO: dacScan step from 120 .. 149
[10:24:57.796] <TB2> INFO: Test took 23934ms.
[10:24:57.970] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:21.592] <TB2> INFO: PixTestBBMap::doTest() done, duration: 157 seconds
[10:25:21.592] <TB2> INFO: number of dead bumps (per ROC): 7 0 0 0 0 0 0 0 0 0 0 0 1 3 2 8
[10:25:21.592] <TB2> INFO: separation cut (per ROC): 69 95 82 83 94 84 70 78 92 77 85 79 71 73 69 94
[10:25:21.665] <TB2> INFO: ######################################################################
[10:25:21.665] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[10:25:21.665] <TB2> INFO: ######################################################################
[10:25:21.665] <TB2> INFO: ----------------------------------------------------------------------
[10:25:21.665] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:25:21.665] <TB2> INFO: ----------------------------------------------------------------------
[10:25:21.665] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:25:21.674] <TB2> INFO: dacScan step from 0 .. 3
[10:25:42.159] <TB2> INFO: Test took 20485ms.
[10:25:42.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:42.184] <TB2> INFO: dacScan step from 4 .. 7
[10:26:02.400] <TB2> INFO: Test took 20216ms.
[10:26:02.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:02.433] <TB2> INFO: dacScan step from 8 .. 11
[10:26:22.570] <TB2> INFO: Test took 20137ms.
[10:26:22.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:22.598] <TB2> INFO: dacScan step from 12 .. 15
[10:26:42.616] <TB2> INFO: Test took 20018ms.
[10:26:42.648] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:42.648] <TB2> INFO: dacScan step from 16 .. 19
[10:27:02.696] <TB2> INFO: Test took 20048ms.
[10:27:02.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:02.727] <TB2> INFO: dacScan step from 20 .. 23
[10:27:22.859] <TB2> INFO: Test took 20132ms.
[10:27:22.887] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:22.887] <TB2> INFO: dacScan step from 24 .. 27
[10:27:42.580] <TB2> INFO: Test took 19693ms.
[10:27:42.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:42.609] <TB2> INFO: dacScan step from 28 .. 31
[10:28:02.624] <TB2> INFO: Test took 20015ms.
[10:28:02.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:02.652] <TB2> INFO: dacScan step from 32 .. 35
[10:28:22.406] <TB2> INFO: Test took 19754ms.
[10:28:22.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:22.436] <TB2> INFO: dacScan step from 36 .. 39
[10:28:41.976] <TB2> INFO: Test took 19540ms.
[10:28:42.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:42.006] <TB2> INFO: dacScan step from 40 .. 43
[10:29:01.777] <TB2> INFO: Test took 19770ms.
[10:29:01.806] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:01.806] <TB2> INFO: dacScan step from 44 .. 47
[10:29:21.590] <TB2> INFO: Test took 19784ms.
[10:29:21.625] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:21.625] <TB2> INFO: dacScan step from 48 .. 51
[10:29:41.315] <TB2> INFO: Test took 19690ms.
[10:29:41.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:41.345] <TB2> INFO: dacScan step from 52 .. 55
[10:30:01.313] <TB2> INFO: Test took 19968ms.
[10:30:01.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:01.342] <TB2> INFO: dacScan step from 56 .. 59
[10:30:21.269] <TB2> INFO: Test took 19927ms.
[10:30:21.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:21.303] <TB2> INFO: dacScan step from 60 .. 63
[10:30:41.448] <TB2> INFO: Test took 20145ms.
[10:30:41.487] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:41.487] <TB2> INFO: dacScan step from 64 .. 67
[10:31:01.589] <TB2> INFO: Test took 20102ms.
[10:31:01.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:01.640] <TB2> INFO: dacScan step from 68 .. 71
[10:31:22.487] <TB2> INFO: Test took 20847ms.
[10:31:22.547] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:22.549] <TB2> INFO: dacScan step from 72 .. 75
[10:31:44.606] <TB2> INFO: Test took 22057ms.
[10:31:44.691] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:44.694] <TB2> INFO: dacScan step from 76 .. 79
[10:32:08.635] <TB2> INFO: Test took 23941ms.
[10:32:08.763] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:08.769] <TB2> INFO: dacScan step from 80 .. 83
[10:32:37.003] <TB2> INFO: Test took 28233ms.
[10:32:37.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:37.188] <TB2> INFO: dacScan step from 84 .. 87
[10:33:07.100] <TB2> INFO: Test took 29912ms.
[10:33:07.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:07.321] <TB2> INFO: dacScan step from 88 .. 91

[10:33:38.709] <TB2> INFO: Test took 31388ms.
[10:33:38.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:38.942] <TB2> INFO: dacScan step from 92 .. 95
[10:34:11.384] <TB2> INFO: Test took 32442ms.
[10:34:11.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:11.625] <TB2> INFO: dacScan step from 96 .. 99


[10:34:43.936] <TB2> INFO: Test took 32310ms.
[10:34:44.180] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:44.193] <TB2> INFO: dacScan step from 100 .. 103


[10:35:17.043] <TB2> INFO: Test took 32850ms.
[10:35:17.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:17.339] <TB2> INFO: dacScan step from 104 .. 107

[10:35:50.360] <TB2> INFO: Test took 33021ms.
[10:35:50.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:50.603] <TB2> INFO: dacScan step from 108 .. 111


[10:36:22.876] <TB2> INFO: Test took 32272ms.
[10:36:23.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:23.116] <TB2> INFO: dacScan step from 112 .. 115


[10:36:55.600] <TB2> INFO: Test took 32484ms.
[10:36:55.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:55.828] <TB2> INFO: dacScan step from 116 .. 119
[10:37:28.155] <TB2> INFO: Test took 32326ms.
[10:37:28.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:28.401] <TB2> INFO: dacScan step from 120 .. 123
[10:38:00.773] <TB2> INFO: Test took 32372ms.
[10:38:00.997] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:01.010] <TB2> INFO: dacScan step from 124 .. 127
[10:38:33.439] <TB2> INFO: Test took 32429ms.
[10:38:33.688] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:33.702] <TB2> INFO: dacScan step from 128 .. 131
[10:39:06.361] <TB2> INFO: Test took 32659ms.
[10:39:06.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:06.615] <TB2> INFO: dacScan step from 132 .. 135
[10:39:39.061] <TB2> INFO: Test took 32447ms.
[10:39:39.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:39.313] <TB2> INFO: dacScan step from 136 .. 139
[10:40:10.809] <TB2> INFO: Test took 31496ms.
[10:40:11.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:11.053] <TB2> INFO: dacScan step from 140 .. 143
[10:40:42.351] <TB2> INFO: Test took 31297ms.
[10:40:42.579] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:42.592] <TB2> INFO: dacScan step from 144 .. 147
[10:41:10.315] <TB2> INFO: Test took 27723ms.
[10:41:10.563] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:10.578] <TB2> INFO: dacScan step from 148 .. 149
[10:41:26.715] <TB2> INFO: Test took 16137ms.
[10:41:26.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:26.845] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:28.397] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:29.957] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:31.689] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:33.308] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:34.860] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:36.490] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:38.192] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:39.895] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:41.407] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:42.980] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:44.537] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:46.197] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:47.999] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:49.759] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:51.436] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:41:53.157] <TB2> INFO: PixTestScurves::scurves() done
[10:41:53.157] <TB2> INFO: Vcal mean: 80.53 98.09 81.86 88.75 88.23 82.64 68.27 78.30 91.27 75.74 86.02 79.19 78.95 77.19 78.23 89.07
[10:41:53.157] <TB2> INFO: Vcal RMS: 4.39 5.95 4.36 5.57 5.64 4.50 5.39 4.15 5.02 5.14 6.05 3.97 4.17 4.00 4.33 5.59
[10:41:53.157] <TB2> INFO: PixTestScurves::fullTest() done, duration: 991 seconds
[10:41:53.248] <TB2> INFO: ######################################################################
[10:41:53.248] <TB2> INFO: PixTestTrim::doTest()
[10:41:53.248] <TB2> INFO: ######################################################################
[10:41:53.249] <TB2> INFO: ----------------------------------------------------------------------
[10:41:53.249] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[10:41:53.249] <TB2> INFO: ----------------------------------------------------------------------
[10:41:53.327] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:41:53.327] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:41:53.336] <TB2> INFO: dacScan step from 0 .. 19
[10:42:08.438] <TB2> INFO: Test took 15102ms.
[10:42:08.459] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:08.459] <TB2> INFO: dacScan step from 20 .. 39
[10:42:23.629] <TB2> INFO: Test took 15170ms.
[10:42:23.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:23.653] <TB2> INFO: dacScan step from 40 .. 59
[10:42:38.729] <TB2> INFO: Test took 15076ms.
[10:42:38.750] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:38.750] <TB2> INFO: dacScan step from 60 .. 79
[10:42:53.769] <TB2> INFO: Test took 15019ms.
[10:42:53.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:53.791] <TB2> INFO: dacScan step from 80 .. 99
[10:43:11.211] <TB2> INFO: Test took 17420ms.
[10:43:11.297] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:11.311] <TB2> INFO: dacScan step from 100 .. 119
[10:43:31.231] <TB2> INFO: Test took 19920ms.
[10:43:31.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:31.420] <TB2> INFO: dacScan step from 120 .. 139
[10:43:48.565] <TB2> INFO: Test took 17145ms.
[10:43:48.694] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:48.716] <TB2> INFO: dacScan step from 140 .. 159
[10:44:05.243] <TB2> INFO: Test took 16527ms.
[10:44:05.309] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:27.271] <TB2> INFO: ROC 0 VthrComp = 84
[10:44:27.271] <TB2> INFO: ROC 1 VthrComp = 100
[10:44:27.271] <TB2> INFO: ROC 2 VthrComp = 90
[10:44:27.271] <TB2> INFO: ROC 3 VthrComp = 94
[10:44:27.271] <TB2> INFO: ROC 4 VthrComp = 95
[10:44:27.271] <TB2> INFO: ROC 5 VthrComp = 92
[10:44:27.271] <TB2> INFO: ROC 6 VthrComp = 72
[10:44:27.271] <TB2> INFO: ROC 7 VthrComp = 86
[10:44:27.272] <TB2> INFO: ROC 8 VthrComp = 100
[10:44:27.272] <TB2> INFO: ROC 9 VthrComp = 78
[10:44:27.272] <TB2> INFO: ROC 10 VthrComp = 87
[10:44:27.272] <TB2> INFO: ROC 11 VthrComp = 84
[10:44:27.272] <TB2> INFO: ROC 12 VthrComp = 82
[10:44:27.272] <TB2> INFO: ROC 13 VthrComp = 83
[10:44:27.272] <TB2> INFO: ROC 14 VthrComp = 81
[10:44:27.272] <TB2> INFO: ROC 15 VthrComp = 94
[10:44:27.272] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:44:27.272] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:44:27.282] <TB2> INFO: dacScan step from 0 .. 19
[10:44:43.715] <TB2> INFO: Test took 16433ms.
[10:44:43.741] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:43.741] <TB2> INFO: dacScan step from 20 .. 39
[10:45:00.487] <TB2> INFO: Test took 16746ms.
[10:45:00.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:00.525] <TB2> INFO: dacScan step from 40 .. 59
[10:45:20.808] <TB2> INFO: Test took 20283ms.
[10:45:20.979] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:21.023] <TB2> INFO: dacScan step from 60 .. 79
[10:45:42.006] <TB2> INFO: Test took 20983ms.
[10:45:42.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:42.216] <TB2> INFO: dacScan step from 80 .. 99
[10:46:02.582] <TB2> INFO: Test took 20366ms.
[10:46:02.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:02.849] <TB2> INFO: dacScan step from 100 .. 119
[10:46:24.550] <TB2> INFO: Test took 21700ms.
[10:46:24.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:24.767] <TB2> INFO: dacScan step from 120 .. 139
[10:46:43.530] <TB2> INFO: Test took 18763ms.
[10:46:43.687] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:43.739] <TB2> INFO: dacScan step from 140 .. 159
[10:47:04.653] <TB2> INFO: Test took 20914ms.
[10:47:04.824] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:30.310] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.2041 for pixel 22/6 mean/min/max = 45.2343/31.8675/58.6011
[10:47:30.310] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 63.3616 for pixel 15/79 mean/min/max = 47.6015/31.7246/63.4784
[10:47:30.311] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.6796 for pixel 23/1 mean/min/max = 44.6379/32.434/56.8417
[10:47:30.311] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.5832 for pixel 1/1 mean/min/max = 45.5689/31.3897/59.748
[10:47:30.311] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.7078 for pixel 31/75 mean/min/max = 45.3723/31.8782/58.8665
[10:47:30.311] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.968 for pixel 9/79 mean/min/max = 44.7044/32.3474/57.0615
[10:47:30.312] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.4637 for pixel 0/60 mean/min/max = 46.8886/33.3113/60.466
[10:47:30.312] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 56.5646 for pixel 0/9 mean/min/max = 44.4791/32.388/56.5702
[10:47:30.312] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.937 for pixel 15/10 mean/min/max = 44.4292/31.9068/56.9516
[10:47:30.312] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 62.5798 for pixel 0/31 mean/min/max = 48.15/33.6333/62.6666
[10:47:30.313] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 62.5832 for pixel 0/74 mean/min/max = 46.8982/31.1851/62.6114
[10:47:30.313] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 55.6988 for pixel 1/74 mean/min/max = 44.1446/32.1459/56.1432
[10:47:30.313] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.1535 for pixel 37/2 mean/min/max = 45.0192/32.7079/57.3304
[10:47:30.313] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 55.7704 for pixel 51/3 mean/min/max = 44.0911/32.3298/55.8524
[10:47:30.314] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.4536 for pixel 22/2 mean/min/max = 45.023/32.5916/57.4543
[10:47:30.314] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.3701 for pixel 12/3 mean/min/max = 44.8945/31.3222/58.4667
[10:47:30.314] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:49:06.787] <TB2> INFO: Test took 96473ms.
[10:49:08.437] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:49:08.447] <TB2> INFO: dacScan step from 0 .. 19
[10:49:30.842] <TB2> INFO: Test took 22395ms.
[10:49:30.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:30.890] <TB2> INFO: dacScan step from 20 .. 39
[10:50:02.129] <TB2> INFO: Test took 31239ms.
[10:50:02.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:02.427] <TB2> INFO: dacScan step from 40 .. 59



[10:50:39.603] <TB2> INFO: Test took 37176ms.
[10:50:39.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:39.924] <TB2> INFO: dacScan step from 60 .. 79
[10:51:17.408] <TB2> INFO: Test took 37484ms.
[10:51:17.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:17.726] <TB2> INFO: dacScan step from 80 .. 99


[10:51:54.870] <TB2> INFO: Test took 37144ms.
[10:51:55.164] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:55.221] <TB2> INFO: dacScan step from 100 .. 119
[10:52:33.107] <TB2> INFO: Test took 37886ms.
[10:52:33.375] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:33.431] <TB2> INFO: dacScan step from 120 .. 139


[10:53:09.324] <TB2> INFO: Test took 35893ms.
[10:53:09.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:09.656] <TB2> INFO: dacScan step from 140 .. 159


[10:53:47.001] <TB2> INFO: Test took 37345ms.
[10:53:47.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:53:47.329] <TB2> INFO: dacScan step from 160 .. 179


[10:54:24.585] <TB2> INFO: Test took 37256ms.
[10:54:24.866] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:24.927] <TB2> INFO: dacScan step from 180 .. 199

[10:54:57.294] <TB2> INFO: Test took 32367ms.
[10:54:57.569] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:22.790] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.023193 .. 255.000000
[10:55:22.886] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:55:22.895] <TB2> INFO: dacScan step from 0 .. 19
[10:55:37.430] <TB2> INFO: Test took 14535ms.
[10:55:37.451] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:37.451] <TB2> INFO: dacScan step from 20 .. 39
[10:55:53.648] <TB2> INFO: Test took 16197ms.
[10:55:53.729] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:53.745] <TB2> INFO: dacScan step from 40 .. 59
[10:56:12.926] <TB2> INFO: Test took 19181ms.
[10:56:13.086] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:13.146] <TB2> INFO: dacScan step from 60 .. 79
[10:56:32.266] <TB2> INFO: Test took 19120ms.
[10:56:32.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:32.458] <TB2> INFO: dacScan step from 80 .. 99
[10:56:51.153] <TB2> INFO: Test took 18695ms.
[10:56:51.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:51.363] <TB2> INFO: dacScan step from 100 .. 119
[10:57:09.558] <TB2> INFO: Test took 18195ms.
[10:57:09.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:09.862] <TB2> INFO: dacScan step from 120 .. 139
[10:57:28.355] <TB2> INFO: Test took 18493ms.
[10:57:28.495] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:28.544] <TB2> INFO: dacScan step from 140 .. 159
[10:57:47.221] <TB2> INFO: Test took 18677ms.
[10:57:47.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:47.423] <TB2> INFO: dacScan step from 160 .. 179
[10:58:05.881] <TB2> INFO: Test took 18458ms.
[10:58:06.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:06.073] <TB2> INFO: dacScan step from 180 .. 199
[10:58:26.297] <TB2> INFO: Test took 20223ms.
[10:58:26.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:26.503] <TB2> INFO: dacScan step from 200 .. 219
[10:58:44.548] <TB2> INFO: Test took 18045ms.
[10:58:44.776] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:44.829] <TB2> INFO: dacScan step from 220 .. 239
[10:59:01.683] <TB2> INFO: Test took 16854ms.
[10:59:01.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:02.000] <TB2> INFO: dacScan step from 240 .. 255
[10:59:16.054] <TB2> INFO: Test took 14054ms.
[10:59:16.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:47.059] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 12.676116 .. 45.888743
[10:59:47.142] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 55 (20) hits flags = 16 (plus default)
[10:59:47.151] <TB2> INFO: dacScan step from 2 .. 21
[11:00:00.353] <TB2> INFO: Test took 13202ms.
[11:00:00.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:00.373] <TB2> INFO: dacScan step from 22 .. 41
[11:00:15.459] <TB2> INFO: Test took 15086ms.
[11:00:15.545] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:15.564] <TB2> INFO: dacScan step from 42 .. 55
[11:00:29.256] <TB2> INFO: Test took 13691ms.
[11:00:29.361] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:45.149] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 18.577817 .. 42.876492
[11:00:45.230] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 52 (20) hits flags = 16 (plus default)
[11:00:45.239] <TB2> INFO: dacScan step from 8 .. 27
[11:00:58.367] <TB2> INFO: Test took 13128ms.
[11:00:58.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:58.387] <TB2> INFO: dacScan step from 28 .. 47
[11:01:14.127] <TB2> INFO: Test took 15740ms.
[11:01:14.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:14.286] <TB2> INFO: dacScan step from 48 .. 52
[11:01:20.837] <TB2> INFO: Test took 6551ms.
[11:01:20.879] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:36.715] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 0.834936 .. 42.876492
[11:01:36.804] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 52 (20) hits flags = 16 (plus default)
[11:01:36.813] <TB2> INFO: dacScan step from 0 .. 19
[11:01:49.903] <TB2> INFO: Test took 13090ms.
[11:01:49.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:49.928] <TB2> INFO: dacScan step from 20 .. 39
[11:02:04.658] <TB2> INFO: Test took 14730ms.
[11:02:04.729] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:04.744] <TB2> INFO: dacScan step from 40 .. 52
[11:02:18.738] <TB2> INFO: Test took 13994ms.
[11:02:18.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:35.641] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:02:35.641] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:02:35.650] <TB2> INFO: dacScan step from 15 .. 34
[11:02:59.482] <TB2> INFO: Test took 23832ms.
[11:02:59.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:59.583] <TB2> INFO: dacScan step from 35 .. 54



[11:03:33.469] <TB2> INFO: Test took 33886ms.
[11:03:33.770] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:33.817] <TB2> INFO: dacScan step from 55 .. 55
[11:03:38.198] <TB2> INFO: Test took 4381ms.
[11:03:38.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:53.904] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:03:53.905] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:03:53.905] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:03:53.905] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:03:53.905] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:03:53.906] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:03:53.906] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:03:53.906] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:03:53.907] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:03:53.907] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:03:53.907] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:03:53.907] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:03:53.908] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:03:53.908] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:03:53.908] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:03:53.909] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:03:53.909] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C0.dat
[11:03:53.921] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C1.dat
[11:03:53.930] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C2.dat
[11:03:53.939] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C3.dat
[11:03:53.947] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C4.dat
[11:03:53.956] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C5.dat
[11:03:53.965] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C6.dat
[11:03:53.974] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C7.dat
[11:03:53.982] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C8.dat
[11:03:53.991] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C9.dat
[11:03:53.999] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C10.dat
[11:03:54.005] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C11.dat
[11:03:54.012] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C12.dat
[11:03:54.018] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C13.dat
[11:03:54.024] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C14.dat
[11:03:54.030] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//trimParameters35_C15.dat
[11:03:54.036] <TB2> INFO: PixTestTrim::trimTest() done
[11:03:54.036] <TB2> INFO: vtrim: 112 123 114 113 104 96 102 106 116 110 105 98 96 94 98 112
[11:03:54.036] <TB2> INFO: vthrcomp: 84 100 90 94 95 92 72 86 100 78 87 84 82 83 81 94
[11:03:54.036] <TB2> INFO: vcal mean: 35.02 35.07 35.02 35.01 34.99 35.04 34.99 34.98 34.97 35.06 35.04 35.04 35.01 35.02 35.00 35.06
[11:03:54.036] <TB2> INFO: vcal RMS: 1.05 1.07 1.02 1.39 0.99 0.98 1.24 0.94 1.01 0.96 1.18 0.99 0.99 0.98 1.04 1.07
[11:03:54.036] <TB2> INFO: bits mean: 10.08 8.83 10.19 9.91 9.73 9.70 9.29 9.95 10.23 8.83 9.31 10.34 9.52 10.02 10.22 10.48
[11:03:54.036] <TB2> INFO: bits RMS: 2.46 2.88 2.31 2.56 2.64 2.60 2.53 2.49 2.46 2.62 2.83 2.36 2.62 2.48 2.32 2.33
[11:03:54.044] <TB2> INFO: ----------------------------------------------------------------------
[11:03:54.044] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:03:54.044] <TB2> INFO: ----------------------------------------------------------------------
[11:03:54.046] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:03:54.056] <TB2> INFO: dacScan step from 0 .. 19
[11:04:18.220] <TB2> INFO: Test took 24164ms.
[11:04:18.256] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:18.256] <TB2> INFO: dacScan step from 20 .. 39
[11:04:42.749] <TB2> INFO: Test took 24493ms.
[11:04:42.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:42.787] <TB2> INFO: dacScan step from 40 .. 59
[11:05:07.477] <TB2> INFO: Test took 24690ms.
[11:05:07.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:07.516] <TB2> INFO: dacScan step from 60 .. 79
[11:05:31.765] <TB2> INFO: Test took 24249ms.
[11:05:31.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:31.803] <TB2> INFO: dacScan step from 80 .. 99
[11:05:55.847] <TB2> INFO: Test took 24043ms.
[11:05:55.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:55.926] <TB2> INFO: dacScan step from 100 .. 119
[11:06:25.068] <TB2> INFO: Test took 29142ms.
[11:06:25.304] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:25.331] <TB2> INFO: dacScan step from 120 .. 139


[11:06:58.206] <TB2> INFO: Test took 32875ms.
[11:06:58.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:58.526] <TB2> INFO: dacScan step from 140 .. 159


[11:07:33.988] <TB2> INFO: Test took 35462ms.
[11:07:34.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:34.371] <TB2> INFO: dacScan step from 160 .. 179
[11:08:09.502] <TB2> INFO: Test took 35131ms.
[11:08:09.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:09.901] <TB2> INFO: dacScan step from 180 .. 199
[11:08:43.835] <TB2> INFO: Test took 33934ms.
[11:08:44.106] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:10.317] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:09:10.325] <TB2> INFO: dacScan step from 0 .. 19
[11:09:35.518] <TB2> INFO: Test took 25192ms.
[11:09:35.559] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:35.559] <TB2> INFO: dacScan step from 20 .. 39
[11:10:00.272] <TB2> INFO: Test took 24713ms.
[11:10:00.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:00.307] <TB2> INFO: dacScan step from 40 .. 59
[11:10:23.633] <TB2> INFO: Test took 23326ms.
[11:10:23.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:23.667] <TB2> INFO: dacScan step from 60 .. 79
[11:10:48.196] <TB2> INFO: Test took 24529ms.
[11:10:48.247] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:48.247] <TB2> INFO: dacScan step from 80 .. 99
[11:11:13.227] <TB2> INFO: Test took 24980ms.
[11:11:13.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:13.405] <TB2> INFO: dacScan step from 100 .. 119
[11:11:48.418] <TB2> INFO: Test took 35012ms.
[11:11:48.695] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:48.734] <TB2> INFO: dacScan step from 120 .. 139





[11:12:23.925] <TB2> INFO: Test took 35191ms.
[11:12:24.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:24.252] <TB2> INFO: dacScan step from 140 .. 159
[11:12:55.454] <TB2> INFO: Test took 31202ms.
[11:12:55.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:18.664] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[11:13:18.673] <TB2> INFO: dacScan step from 0 .. 19
[11:13:42.492] <TB2> INFO: Test took 23819ms.
[11:13:42.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:42.527] <TB2> INFO: dacScan step from 20 .. 39
[11:14:04.991] <TB2> INFO: Test took 22464ms.
[11:14:05.028] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:05.028] <TB2> INFO: dacScan step from 40 .. 59
[11:14:28.695] <TB2> INFO: Test took 23667ms.
[11:14:28.731] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:28.731] <TB2> INFO: dacScan step from 60 .. 79
[11:14:51.098] <TB2> INFO: Test took 22367ms.
[11:14:51.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:51.136] <TB2> INFO: dacScan step from 80 .. 99
[11:15:20.554] <TB2> INFO: Test took 29418ms.
[11:15:20.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:20.721] <TB2> INFO: dacScan step from 100 .. 119


[11:15:56.795] <TB2> INFO: Test took 36074ms.
[11:15:57.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:57.134] <TB2> INFO: dacScan step from 120 .. 139


[11:16:32.777] <TB2> INFO: Test took 35643ms.
[11:16:33.072] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:33.126] <TB2> INFO: dacScan step from 140 .. 150
[11:16:51.184] <TB2> INFO: Test took 18058ms.
[11:16:51.346] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:12.387] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[11:17:12.395] <TB2> INFO: dacScan step from 0 .. 19
[11:17:37.224] <TB2> INFO: Test took 24828ms.
[11:17:37.261] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:37.261] <TB2> INFO: dacScan step from 20 .. 39
[11:18:01.321] <TB2> INFO: Test took 24060ms.
[11:18:01.359] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:01.359] <TB2> INFO: dacScan step from 40 .. 59
[11:18:26.426] <TB2> INFO: Test took 25067ms.
[11:18:26.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:26.473] <TB2> INFO: dacScan step from 60 .. 79
[11:18:50.609] <TB2> INFO: Test took 24136ms.
[11:18:50.648] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:50.649] <TB2> INFO: dacScan step from 80 .. 99
[11:19:18.182] <TB2> INFO: Test took 27533ms.
[11:19:18.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:18.430] <TB2> INFO: dacScan step from 100 .. 119
[11:19:52.274] <TB2> INFO: Test took 33844ms.
[11:19:52.560] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:52.601] <TB2> INFO: dacScan step from 120 .. 139

[11:20:27.684] <TB2> INFO: Test took 35083ms.
[11:20:27.985] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:28.037] <TB2> INFO: dacScan step from 140 .. 150
[11:20:46.294] <TB2> INFO: Test took 18257ms.
[11:20:46.442] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:08.406] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[11:21:08.415] <TB2> INFO: dacScan step from 0 .. 19
[11:21:30.788] <TB2> INFO: Test took 22373ms.
[11:21:30.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:30.822] <TB2> INFO: dacScan step from 20 .. 39
[11:21:54.672] <TB2> INFO: Test took 23850ms.
[11:21:54.707] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:54.707] <TB2> INFO: dacScan step from 40 .. 59
[11:22:17.384] <TB2> INFO: Test took 22677ms.
[11:22:17.417] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:17.417] <TB2> INFO: dacScan step from 60 .. 79
[11:22:40.065] <TB2> INFO: Test took 22648ms.
[11:22:40.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:40.112] <TB2> INFO: dacScan step from 80 .. 99
[11:23:07.994] <TB2> INFO: Test took 27882ms.
[11:23:08.164] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:08.188] <TB2> INFO: dacScan step from 100 .. 119





[11:23:42.169] <TB2> INFO: Test took 33981ms.
[11:23:42.453] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:42.497] <TB2> INFO: dacScan step from 120 .. 139


[11:24:17.654] <TB2> INFO: Test took 35157ms.
[11:24:17.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:17.979] <TB2> INFO: dacScan step from 140 .. 151
[11:24:37.256] <TB2> INFO: Test took 19277ms.
[11:24:37.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:01.065] <TB2> INFO: PixTestTrim::trimBitTest() done
[11:25:01.066] <TB2> INFO: PixTestTrim::doTest() done, duration: 2587 seconds
[11:25:01.837] <TB2> INFO: ######################################################################
[11:25:01.837] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:25:01.837] <TB2> INFO: ######################################################################
[11:25:05.290] <TB2> INFO: Test took 3452ms.
[11:25:05.310] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:08.960] <TB2> INFO: Test took 3453ms.
[11:25:09.022] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:12.510] <TB2> INFO: Test took 3478ms.
[11:25:12.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:12.581] <TB2> INFO: The DUT currently contains the following objects:
[11:25:12.581] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:12.581] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:12.581] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:12.581] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:12.581] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:12.581] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.703] <TB2> INFO: Test took 1122ms.
[11:25:13.704] <TB2> INFO: The DUT currently contains the following objects:
[11:25:13.704] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:13.704] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:13.704] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:13.704] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:13.704] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.704] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.705] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.705] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:13.705] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.814] <TB2> INFO: Test took 1109ms.
[11:25:14.815] <TB2> INFO: The DUT currently contains the following objects:
[11:25:14.815] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:14.815] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:14.815] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:14.815] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:14.815] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.815] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:14.816] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.922] <TB2> INFO: Test took 1106ms.
[11:25:15.923] <TB2> INFO: The DUT currently contains the following objects:
[11:25:15.923] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:15.923] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:15.923] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:15.923] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:15.923] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.923] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:15.924] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.029] <TB2> INFO: Test took 1105ms.
[11:25:17.030] <TB2> INFO: The DUT currently contains the following objects:
[11:25:17.030] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:17.030] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:17.030] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:17.030] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:17.030] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.030] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.031] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.031] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:17.031] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: Test took 1105ms.
[11:25:18.136] <TB2> INFO: The DUT currently contains the following objects:
[11:25:18.136] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:18.136] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:18.136] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:18.136] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:18.136] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.136] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:18.137] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.243] <TB2> INFO: Test took 1106ms.
[11:25:19.244] <TB2> INFO: The DUT currently contains the following objects:
[11:25:19.244] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:19.244] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:19.244] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:19.244] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:19.244] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:19.245] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.353] <TB2> INFO: Test took 1108ms.
[11:25:20.354] <TB2> INFO: The DUT currently contains the following objects:
[11:25:20.354] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:20.354] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:20.354] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:20.354] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:20.354] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.354] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.354] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.354] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:20.355] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.463] <TB2> INFO: Test took 1108ms.
[11:25:21.464] <TB2> INFO: The DUT currently contains the following objects:
[11:25:21.464] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:21.464] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:21.464] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:21.464] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:21.464] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.464] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.464] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:21.465] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.601] <TB2> INFO: Test took 1136ms.
[11:25:22.602] <TB2> INFO: The DUT currently contains the following objects:
[11:25:22.602] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:22.602] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:22.602] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:22.602] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:22.602] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.602] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.603] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:22.603] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.723] <TB2> INFO: Test took 1120ms.
[11:25:23.724] <TB2> INFO: The DUT currently contains the following objects:
[11:25:23.725] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:23.725] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:23.725] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:23.725] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:23.725] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.725] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.726] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.726] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.726] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:23.726] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.847] <TB2> INFO: Test took 1121ms.
[11:25:24.848] <TB2> INFO: The DUT currently contains the following objects:
[11:25:24.848] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:24.848] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:24.848] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:24.848] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:24.849] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:24.849] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.957] <TB2> INFO: Test took 1108ms.
[11:25:25.958] <TB2> INFO: The DUT currently contains the following objects:
[11:25:25.958] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:25.958] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:25.958] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:25.958] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:25.958] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:25.959] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.081] <TB2> INFO: Test took 1122ms.
[11:25:27.082] <TB2> INFO: The DUT currently contains the following objects:
[11:25:27.082] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:27.082] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:27.082] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:27.082] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:27.082] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.082] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.082] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.082] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.082] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:27.083] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.191] <TB2> INFO: Test took 1108ms.
[11:25:28.193] <TB2> INFO: The DUT currently contains the following objects:
[11:25:28.193] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:28.193] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:28.193] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:28.193] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:28.193] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.193] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.194] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.194] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.194] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:28.194] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.330] <TB2> INFO: Test took 1136ms.
[11:25:29.331] <TB2> INFO: The DUT currently contains the following objects:
[11:25:29.331] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:25:29.331] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:25:29.331] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:25:29.331] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:25:29.331] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.331] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:29.332] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:25:30.453] <TB2> INFO: Test took 1121ms.
[11:25:30.457] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:29:52.592] <TB2> INFO: Test took 262135ms.
[11:29:54.078] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:00.922] <TB2> INFO: Test took 246844ms.
[11:34:02.586] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.593] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.600] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.607] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.614] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.621] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.629] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.636] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.643] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.650] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.657] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.664] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.671] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.678] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.686] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.693] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:34:02.730] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:34:02.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:34:02.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:34:02.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:34:02.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:34:02.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:34:06.076] <TB2> INFO: Test took 3338ms.
[11:34:09.770] <TB2> INFO: Test took 3395ms.
[11:34:13.446] <TB2> INFO: Test took 3406ms.
[11:34:13.725] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:14.639] <TB2> INFO: Test took 914ms.
[11:34:14.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:15.761] <TB2> INFO: Test took 1120ms.
[11:34:15.765] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:16.871] <TB2> INFO: Test took 1106ms.
[11:34:16.874] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:17.980] <TB2> INFO: Test took 1106ms.
[11:34:17.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:19.089] <TB2> INFO: Test took 1106ms.
[11:34:19.092] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:20.200] <TB2> INFO: Test took 1108ms.
[11:34:20.203] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:21.309] <TB2> INFO: Test took 1106ms.
[11:34:21.313] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:22.420] <TB2> INFO: Test took 1107ms.
[11:34:22.423] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:23.545] <TB2> INFO: Test took 1122ms.
[11:34:23.548] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:24.668] <TB2> INFO: Test took 1120ms.
[11:34:24.672] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:25.777] <TB2> INFO: Test took 1105ms.
[11:34:25.780] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:26.886] <TB2> INFO: Test took 1106ms.
[11:34:26.889] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:28.009] <TB2> INFO: Test took 1120ms.
[11:34:28.013] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:29.134] <TB2> INFO: Test took 1121ms.
[11:34:29.137] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:30.243] <TB2> INFO: Test took 1106ms.
[11:34:30.246] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:31.379] <TB2> INFO: Test took 1133ms.
[11:34:31.382] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:32.502] <TB2> INFO: Test took 1120ms.
[11:34:32.505] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:33.612] <TB2> INFO: Test took 1107ms.
[11:34:33.615] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:34.721] <TB2> INFO: Test took 1106ms.
[11:34:34.725] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:35.831] <TB2> INFO: Test took 1106ms.
[11:34:35.834] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:36.939] <TB2> INFO: Test took 1105ms.
[11:34:36.942] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:38.048] <TB2> INFO: Test took 1106ms.
[11:34:38.051] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:39.172] <TB2> INFO: Test took 1121ms.
[11:34:39.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:40.280] <TB2> INFO: Test took 1105ms.
[11:34:40.283] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:41.389] <TB2> INFO: Test took 1106ms.
[11:34:41.393] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:42.497] <TB2> INFO: Test took 1104ms.
[11:34:42.500] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:43.605] <TB2> INFO: Test took 1106ms.
[11:34:43.609] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:44.728] <TB2> INFO: Test took 1120ms.
[11:34:44.732] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:45.838] <TB2> INFO: Test took 1106ms.
[11:34:45.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:46.962] <TB2> INFO: Test took 1120ms.
[11:34:46.965] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:48.070] <TB2> INFO: Test took 1105ms.
[11:34:48.073] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:34:49.183] <TB2> INFO: Test took 1110ms.
[11:34:49.707] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 587 seconds
[11:34:49.707] <TB2> INFO: PH scale (per ROC): 85 85 84 77 80 84 83 96 85 92 86 93 83 97 90 91
[11:34:49.707] <TB2> INFO: PH offset (per ROC): 160 177 159 164 150 172 161 156 165 150 167 149 158 153 154 158
[11:34:49.882] <TB2> INFO: ######################################################################
[11:34:49.882] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:34:49.882] <TB2> INFO: ######################################################################
[11:34:49.892] <TB2> INFO: scanning low vcal = 10
[11:34:53.701] <TB2> INFO: Test took 3809ms.
[11:34:53.707] <TB2> INFO: scanning low vcal = 20
[11:34:57.557] <TB2> INFO: Test took 3851ms.
[11:34:57.563] <TB2> INFO: scanning low vcal = 30
[11:35:01.422] <TB2> INFO: Test took 3859ms.
[11:35:01.435] <TB2> INFO: scanning low vcal = 40
[11:35:05.890] <TB2> INFO: Test took 4455ms.
[11:35:05.947] <TB2> INFO: scanning low vcal = 50
[11:35:10.334] <TB2> INFO: Test took 4387ms.
[11:35:10.394] <TB2> INFO: scanning low vcal = 60
[11:35:14.873] <TB2> INFO: Test took 4479ms.
[11:35:14.935] <TB2> INFO: scanning low vcal = 70
[11:35:19.429] <TB2> INFO: Test took 4494ms.
[11:35:19.488] <TB2> INFO: scanning low vcal = 80
[11:35:24.081] <TB2> INFO: Test took 4593ms.
[11:35:24.134] <TB2> INFO: scanning low vcal = 90
[11:35:28.697] <TB2> INFO: Test took 4563ms.
[11:35:28.757] <TB2> INFO: scanning low vcal = 100
[11:35:33.414] <TB2> INFO: Test took 4646ms.
[11:35:33.475] <TB2> INFO: scanning low vcal = 110
[11:35:37.994] <TB2> INFO: Test took 4519ms.
[11:35:38.056] <TB2> INFO: scanning low vcal = 120
[11:35:42.563] <TB2> INFO: Test took 4507ms.
[11:35:42.625] <TB2> INFO: scanning low vcal = 130
[11:35:47.100] <TB2> INFO: Test took 4475ms.
[11:35:47.157] <TB2> INFO: scanning low vcal = 140
[11:35:51.550] <TB2> INFO: Test took 4393ms.
[11:35:51.608] <TB2> INFO: scanning low vcal = 150
[11:35:56.056] <TB2> INFO: Test took 4448ms.
[11:35:56.117] <TB2> INFO: scanning low vcal = 160
[11:36:00.506] <TB2> INFO: Test took 4389ms.
[11:36:00.566] <TB2> INFO: scanning low vcal = 170
[11:36:04.950] <TB2> INFO: Test took 4384ms.
[11:36:05.017] <TB2> INFO: scanning low vcal = 180
[11:36:09.350] <TB2> INFO: Test took 4333ms.
[11:36:09.407] <TB2> INFO: scanning low vcal = 190
[11:36:13.898] <TB2> INFO: Test took 4491ms.
[11:36:13.956] <TB2> INFO: scanning low vcal = 200
[11:36:18.341] <TB2> INFO: Test took 4385ms.
[11:36:18.404] <TB2> INFO: scanning low vcal = 210
[11:36:22.776] <TB2> INFO: Test took 4372ms.
[11:36:22.835] <TB2> INFO: scanning low vcal = 220
[11:36:27.213] <TB2> INFO: Test took 4378ms.
[11:36:27.274] <TB2> INFO: scanning low vcal = 230
[11:36:31.679] <TB2> INFO: Test took 4405ms.
[11:36:31.736] <TB2> INFO: scanning low vcal = 240
[11:36:36.105] <TB2> INFO: Test took 4369ms.
[11:36:36.170] <TB2> INFO: scanning low vcal = 250
[11:36:40.577] <TB2> INFO: Test took 4407ms.
[11:36:40.640] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[11:36:44.966] <TB2> INFO: Test took 4326ms.
[11:36:45.026] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[11:36:49.389] <TB2> INFO: Test took 4363ms.
[11:36:49.449] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[11:36:53.708] <TB2> INFO: Test took 4259ms.
[11:36:53.761] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[11:36:57.966] <TB2> INFO: Test took 4205ms.
[11:36:58.019] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:37:02.267] <TB2> INFO: Test took 4248ms.
[11:37:02.765] <TB2> INFO: PixTestGainPedestal::measure() done
[11:37:33.827] <TB2> INFO: PixTestGainPedestal::fit() done
[11:37:33.827] <TB2> INFO: non-linearity mean: 0.962 0.968 0.952 0.960 0.952 0.964 0.955 0.953 0.959 0.955 0.960 0.956 0.956 0.960 0.951 0.950
[11:37:33.827] <TB2> INFO: non-linearity RMS: 0.006 0.005 0.006 0.005 0.006 0.005 0.006 0.005 0.005 0.005 0.006 0.005 0.006 0.005 0.006 0.006
[11:37:33.828] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:37:33.846] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:37:33.865] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:37:33.883] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:37:33.902] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:37:33.920] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:37:33.939] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:37:33.957] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:37:33.976] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:37:33.994] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:37:34.012] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:37:34.031] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:37:34.049] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:37:34.068] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:37:34.086] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:37:34.104] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:37:34.122] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[11:37:34.128] <TB2> INFO: enter test to run
[11:37:34.128] <TB2> INFO: test: exit no parameter change
[11:37:34.565] <TB2> QUIET: Connection to board 156 closed.
[11:37:34.644] <TB2> INFO: pXar: this is the end, my friend