[07:41:15.999] <TB2> INFO: *** Welcome to pxar ***
[07:41:15.999] <TB2> INFO: *** Today: 2015/08/17
[07:41:15.999] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C15.dat
[07:41:16.001] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//tbmParameters_C0b.dat
[07:41:16.001] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//defaultMaskFile.dat
[07:41:16.001] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters_C15.dat
[07:41:16.078] <TB2> INFO: clk: 4
[07:41:16.078] <TB2> INFO: ctr: 4
[07:41:16.078] <TB2> INFO: sda: 19
[07:41:16.078] <TB2> INFO: tin: 9
[07:41:16.078] <TB2> INFO: level: 15
[07:41:16.078] <TB2> INFO: triggerdelay: 0
[07:41:16.078] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[07:41:16.078] <TB2> INFO: Log level: INFO
[07:41:16.085] <TB2> INFO: Found DTB DTB_WXC55Z
[07:41:16.094] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[07:41:16.098] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[07:41:16.101] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[07:41:17.627] <TB2> INFO: DUT info:
[07:41:17.627] <TB2> INFO: The DUT currently contains the following objects:
[07:41:17.627] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[07:41:17.627] <TB2> INFO: TBM Core alpha (0): 7 registers set
[07:41:17.627] <TB2> INFO: TBM Core beta (1): 7 registers set
[07:41:17.627] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[07:41:17.627] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.627] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:17.628] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[07:41:18.029] <TB2> INFO: enter 'restricted' command line mode
[07:41:18.029] <TB2> INFO: enter test to run
[07:41:18.029] <TB2> INFO: test: pretest no parameter change
[07:41:18.029] <TB2> INFO: running: pretest
[07:41:18.033] <TB2> INFO: ######################################################################
[07:41:18.033] <TB2> INFO: PixTestPretest::doTest()
[07:41:18.033] <TB2> INFO: ######################################################################
[07:41:18.035] <TB2> INFO: ----------------------------------------------------------------------
[07:41:18.035] <TB2> INFO: PixTestPretest::programROC()
[07:41:18.035] <TB2> INFO: ----------------------------------------------------------------------
[07:41:36.051] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[07:41:36.051] <TB2> INFO: IA differences per ROC: 16.9 18.5 20.9 19.3 19.3 18.5 16.9 20.1 17.7 18.5 17.7 16.9 16.1 20.1 17.7 18.5
[07:41:36.135] <TB2> INFO: ----------------------------------------------------------------------
[07:41:36.135] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[07:41:36.135] <TB2> INFO: ----------------------------------------------------------------------
[07:41:55.701] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[07:41:55.705] <TB2> INFO: ----------------------------------------------------------------------
[07:41:55.705] <TB2> INFO: PixTestPretest::findWorkingPixel()
[07:41:55.705] <TB2> INFO: ----------------------------------------------------------------------
[07:42:04.218] <TB2> INFO: Test took 8508ms.
[07:42:04.495] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[07:42:04.532] <TB2> INFO: ----------------------------------------------------------------------
[07:42:04.532] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[07:42:04.532] <TB2> INFO: ----------------------------------------------------------------------
[07:42:13.220] <TB2> INFO: Test took 8681ms.
[07:42:13.527] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[07:42:13.527] <TB2> INFO: CalDel: 148 127 141 147 143 151 146 137 160 135 108 118 134 143 144 122
[07:42:13.527] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[07:42:13.529] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C0.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C1.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C2.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C3.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C4.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C5.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C6.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C7.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C8.dat
[07:42:13.530] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C9.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C10.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C11.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C12.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C13.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C14.dat
[07:42:13.531] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters_C15.dat
[07:42:13.531] <TB2> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[07:42:13.620] <TB2> INFO: enter test to run
[07:42:13.620] <TB2> INFO: test: fulltest no parameter change
[07:42:13.620] <TB2> INFO: running: fulltest
[07:42:13.621] <TB2> INFO: ######################################################################
[07:42:13.621] <TB2> INFO: PixTestFullTest::doTest()
[07:42:13.621] <TB2> INFO: ######################################################################
[07:42:13.622] <TB2> INFO: ######################################################################
[07:42:13.622] <TB2> INFO: PixTestAlive::doTest()
[07:42:13.622] <TB2> INFO: ######################################################################
[07:42:13.624] <TB2> INFO: ----------------------------------------------------------------------
[07:42:13.624] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:42:13.624] <TB2> INFO: ----------------------------------------------------------------------
[07:42:17.086] <TB2> INFO: Test took 3461ms.
[07:42:17.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:17.337] <TB2> INFO: PixTestAlive::aliveTest() done
[07:42:17.337] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:42:17.339] <TB2> INFO: ----------------------------------------------------------------------
[07:42:17.339] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:42:17.339] <TB2> INFO: ----------------------------------------------------------------------
[07:42:20.098] <TB2> INFO: Test took 2758ms.
[07:42:20.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:20.102] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[07:42:20.324] <TB2> INFO: PixTestAlive::maskTest() done
[07:42:20.325] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:42:20.326] <TB2> INFO: ----------------------------------------------------------------------
[07:42:20.326] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[07:42:20.326] <TB2> INFO: ----------------------------------------------------------------------
[07:42:23.737] <TB2> INFO: Test took 3409ms.
[07:42:23.758] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:23.987] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[07:42:23.987] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[07:42:23.988] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[07:42:23.999] <TB2> INFO: ######################################################################
[07:42:23.999] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[07:42:23.999] <TB2> INFO: ######################################################################
[07:42:24.002] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[07:42:24.017] <TB2> INFO: dacScan step from 0 .. 29
[07:42:45.661] <TB2> INFO: Test took 21644ms.
[07:42:45.699] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:42:45.699] <TB2> INFO: dacScan step from 30 .. 59
[07:43:10.306] <TB2> INFO: Test took 24607ms.
[07:43:10.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:43:10.432] <TB2> INFO: dacScan step from 60 .. 89
[07:43:42.065] <TB2> INFO: Test took 31633ms.
[07:43:42.318] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:43:42.405] <TB2> INFO: dacScan step from 90 .. 119
[07:44:12.754] <TB2> INFO: Test took 30349ms.
[07:44:13.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:44:13.103] <TB2> INFO: dacScan step from 120 .. 149
[07:44:37.586] <TB2> INFO: Test took 24483ms.
[07:44:37.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:02.117] <TB2> INFO: PixTestBBMap::doTest() done, duration: 158 seconds
[07:45:02.117] <TB2> INFO: number of dead bumps (per ROC): 7 0 0 0 0 0 0 0 0 0 0 0 1 3 2 8
[07:45:02.117] <TB2> INFO: separation cut (per ROC): 65 84 82 75 94 72 74 77 87 90 98 88 85 69 79 97
[07:45:02.196] <TB2> INFO: ######################################################################
[07:45:02.196] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[07:45:02.196] <TB2> INFO: ######################################################################
[07:45:02.196] <TB2> INFO: ----------------------------------------------------------------------
[07:45:02.196] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[07:45:02.196] <TB2> INFO: ----------------------------------------------------------------------
[07:45:02.196] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[07:45:02.205] <TB2> INFO: dacScan step from 0 .. 3
[07:45:22.954] <TB2> INFO: Test took 20748ms.
[07:45:22.980] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:22.980] <TB2> INFO: dacScan step from 4 .. 7
[07:45:43.770] <TB2> INFO: Test took 20790ms.
[07:45:43.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:45:43.799] <TB2> INFO: dacScan step from 8 .. 11
[07:46:04.394] <TB2> INFO: Test took 20595ms.
[07:46:04.427] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:04.427] <TB2> INFO: dacScan step from 12 .. 15
[07:46:25.001] <TB2> INFO: Test took 20574ms.
[07:46:25.035] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:25.036] <TB2> INFO: dacScan step from 16 .. 19
[07:46:45.637] <TB2> INFO: Test took 20601ms.
[07:46:45.667] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:46:45.668] <TB2> INFO: dacScan step from 20 .. 23
[07:47:06.238] <TB2> INFO: Test took 20570ms.
[07:47:06.270] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:06.270] <TB2> INFO: dacScan step from 24 .. 27
[07:47:27.138] <TB2> INFO: Test took 20867ms.
[07:47:27.169] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:27.169] <TB2> INFO: dacScan step from 28 .. 31
[07:47:47.882] <TB2> INFO: Test took 20712ms.
[07:47:47.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:47:47.909] <TB2> INFO: dacScan step from 32 .. 35
[07:48:08.129] <TB2> INFO: Test took 20219ms.
[07:48:08.156] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:08.156] <TB2> INFO: dacScan step from 36 .. 39
[07:48:27.974] <TB2> INFO: Test took 19818ms.
[07:48:28.001] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:28.001] <TB2> INFO: dacScan step from 40 .. 43
[07:48:47.896] <TB2> INFO: Test took 19894ms.
[07:48:47.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:48:47.927] <TB2> INFO: dacScan step from 44 .. 47
[07:49:07.627] <TB2> INFO: Test took 19700ms.
[07:49:07.655] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:07.655] <TB2> INFO: dacScan step from 48 .. 51
[07:49:27.165] <TB2> INFO: Test took 19510ms.
[07:49:27.195] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:27.195] <TB2> INFO: dacScan step from 52 .. 55
[07:49:47.602] <TB2> INFO: Test took 20406ms.
[07:49:47.630] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:49:47.630] <TB2> INFO: dacScan step from 56 .. 59
[07:50:08.509] <TB2> INFO: Test took 20879ms.
[07:50:08.542] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:08.542] <TB2> INFO: dacScan step from 60 .. 63
[07:50:29.501] <TB2> INFO: Test took 20959ms.
[07:50:29.530] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:29.530] <TB2> INFO: dacScan step from 64 .. 67
[07:50:50.062] <TB2> INFO: Test took 20532ms.
[07:50:50.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:50:50.098] <TB2> INFO: dacScan step from 68 .. 71
[07:51:11.283] <TB2> INFO: Test took 21185ms.
[07:51:11.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:11.340] <TB2> INFO: dacScan step from 72 .. 75
[07:51:33.530] <TB2> INFO: Test took 22190ms.
[07:51:33.599] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:33.602] <TB2> INFO: dacScan step from 76 .. 79
[07:51:57.109] <TB2> INFO: Test took 23506ms.
[07:51:57.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:51:57.224] <TB2> INFO: dacScan step from 80 .. 83
[07:52:23.921] <TB2> INFO: Test took 26697ms.
[07:52:24.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:24.089] <TB2> INFO: dacScan step from 84 .. 87
[07:52:52.533] <TB2> INFO: Test took 28444ms.
[07:52:52.734] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:52:52.743] <TB2> INFO: dacScan step from 88 .. 91
[07:53:22.107] <TB2> INFO: Test took 29364ms.
[07:53:22.321] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:22.333] <TB2> INFO: dacScan step from 92 .. 95


[07:53:53.318] <TB2> INFO: Test took 30985ms.
[07:53:53.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:53:53.575] <TB2> INFO: dacScan step from 96 .. 99


[07:54:25.098] <TB2> INFO: Test took 31523ms.
[07:54:25.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:25.352] <TB2> INFO: dacScan step from 100 .. 103
[07:54:56.897] <TB2> INFO: Test took 31545ms.
[07:54:57.116] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:54:57.129] <TB2> INFO: dacScan step from 104 .. 107


[07:55:28.884] <TB2> INFO: Test took 31755ms.
[07:55:29.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:55:29.123] <TB2> INFO: dacScan step from 108 .. 111





[07:56:00.940] <TB2> INFO: Test took 31817ms.
[07:56:01.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:01.201] <TB2> INFO: dacScan step from 112 .. 115


[07:56:33.713] <TB2> INFO: Test took 32511ms.
[07:56:33.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:56:33.953] <TB2> INFO: dacScan step from 116 .. 119



[07:57:05.955] <TB2> INFO: Test took 32002ms.
[07:57:06.192] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:06.205] <TB2> INFO: dacScan step from 120 .. 123

[07:57:38.280] <TB2> INFO: Test took 32075ms.
[07:57:38.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:57:38.525] <TB2> INFO: dacScan step from 124 .. 127





[07:58:10.776] <TB2> INFO: Test took 32251ms.
[07:58:11.003] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:58:11.015] <TB2> INFO: dacScan step from 128 .. 131
[07:58:42.892] <TB2> INFO: Test took 31877ms.
[07:58:43.137] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:58:43.152] <TB2> INFO: dacScan step from 132 .. 135
[07:59:15.130] <TB2> INFO: Test took 31978ms.
[07:59:15.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:15.370] <TB2> INFO: dacScan step from 136 .. 139
[07:59:46.404] <TB2> INFO: Test took 31033ms.
[07:59:46.622] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[07:59:46.634] <TB2> INFO: dacScan step from 140 .. 143
[08:00:17.362] <TB2> INFO: Test took 30727ms.
[08:00:17.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:17.602] <TB2> INFO: dacScan step from 144 .. 147
[08:00:44.071] <TB2> INFO: Test took 26468ms.
[08:00:44.381] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:00:44.395] <TB2> INFO: dacScan step from 148 .. 149
[08:01:01.329] <TB2> INFO: Test took 16933ms.
[08:01:01.442] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:01.449] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:02.894] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:04.352] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:05.852] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:07.223] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:08.574] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:09.986] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:11.478] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:12.974] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:14.336] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:15.719] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:17.252] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:18.843] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:20.438] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:22.084] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:23.696] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:01:25.371] <TB2> INFO: PixTestScurves::scurves() done
[08:01:25.372] <TB2> INFO: Vcal mean: 77.23 90.87 81.92 84.07 89.28 76.40 76.53 77.54 87.26 83.09 99.31 84.91 86.52 74.58 83.61 91.26
[08:01:25.372] <TB2> INFO: Vcal RMS: 4.34 5.85 4.36 5.28 5.69 4.32 4.87 4.16 4.86 5.40 6.58 4.61 4.94 4.24 4.70 5.66
[08:01:25.373] <TB2> INFO: PixTestScurves::fullTest() done, duration: 983 seconds
[08:01:25.448] <TB2> INFO: ######################################################################
[08:01:25.448] <TB2> INFO: PixTestTrim::doTest()
[08:01:25.448] <TB2> INFO: ######################################################################
[08:01:25.449] <TB2> INFO: ----------------------------------------------------------------------
[08:01:25.449] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:01:25.449] <TB2> INFO: ----------------------------------------------------------------------
[08:01:25.534] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:01:25.534] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:01:25.543] <TB2> INFO: dacScan step from 0 .. 19
[08:01:40.734] <TB2> INFO: Test took 15191ms.
[08:01:40.763] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:40.763] <TB2> INFO: dacScan step from 20 .. 39
[08:01:55.882] <TB2> INFO: Test took 15119ms.
[08:01:55.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:01:55.905] <TB2> INFO: dacScan step from 40 .. 59
[08:02:10.995] <TB2> INFO: Test took 15090ms.
[08:02:11.024] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:11.024] <TB2> INFO: dacScan step from 60 .. 79
[08:02:25.644] <TB2> INFO: Test took 14620ms.
[08:02:25.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:25.666] <TB2> INFO: dacScan step from 80 .. 99
[08:02:42.256] <TB2> INFO: Test took 16590ms.
[08:02:42.325] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:02:42.337] <TB2> INFO: dacScan step from 100 .. 119
[08:03:01.804] <TB2> INFO: Test took 19467ms.
[08:03:01.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:02.014] <TB2> INFO: dacScan step from 120 .. 139
[08:03:19.769] <TB2> INFO: Test took 17755ms.
[08:03:19.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:03:19.965] <TB2> INFO: dacScan step from 140 .. 159
[08:03:37.528] <TB2> INFO: Test took 17563ms.
[08:03:37.596] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:00.964] <TB2> INFO: ROC 0 VthrComp = 80
[08:04:00.965] <TB2> INFO: ROC 1 VthrComp = 92
[08:04:00.965] <TB2> INFO: ROC 2 VthrComp = 90
[08:04:00.965] <TB2> INFO: ROC 3 VthrComp = 87
[08:04:00.965] <TB2> INFO: ROC 4 VthrComp = 96
[08:04:00.965] <TB2> INFO: ROC 5 VthrComp = 82
[08:04:00.965] <TB2> INFO: ROC 6 VthrComp = 81
[08:04:00.965] <TB2> INFO: ROC 7 VthrComp = 85
[08:04:00.965] <TB2> INFO: ROC 8 VthrComp = 95
[08:04:00.965] <TB2> INFO: ROC 9 VthrComp = 88
[08:04:00.966] <TB2> INFO: ROC 10 VthrComp = 100
[08:04:00.966] <TB2> INFO: ROC 11 VthrComp = 92
[08:04:00.966] <TB2> INFO: ROC 12 VthrComp = 91
[08:04:00.966] <TB2> INFO: ROC 13 VthrComp = 79
[08:04:00.966] <TB2> INFO: ROC 14 VthrComp = 88
[08:04:00.966] <TB2> INFO: ROC 15 VthrComp = 96
[08:04:00.966] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:04:00.966] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:04:00.976] <TB2> INFO: dacScan step from 0 .. 19
[08:04:16.155] <TB2> INFO: Test took 15179ms.
[08:04:16.181] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:16.181] <TB2> INFO: dacScan step from 20 .. 39
[08:04:32.814] <TB2> INFO: Test took 16633ms.
[08:04:32.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:32.854] <TB2> INFO: dacScan step from 40 .. 59
[08:04:54.211] <TB2> INFO: Test took 21357ms.
[08:04:54.375] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:04:54.417] <TB2> INFO: dacScan step from 60 .. 79
[08:05:15.803] <TB2> INFO: Test took 21387ms.
[08:05:16.016] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:16.073] <TB2> INFO: dacScan step from 80 .. 99
[08:05:38.027] <TB2> INFO: Test took 21954ms.
[08:05:38.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:05:38.247] <TB2> INFO: dacScan step from 100 .. 119
[08:06:01.263] <TB2> INFO: Test took 23016ms.
[08:06:01.422] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:06:01.478] <TB2> INFO: dacScan step from 120 .. 139
[08:06:20.649] <TB2> INFO: Test took 19171ms.
[08:06:20.815] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:06:20.872] <TB2> INFO: dacScan step from 140 .. 159
[08:06:42.862] <TB2> INFO: Test took 21990ms.
[08:06:43.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:07:08.108] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.5391 for pixel 1/8 mean/min/max = 45.2907/32.0409/58.5405
[08:07:08.108] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.8706 for pixel 0/20 mean/min/max = 47.6032/32.0222/63.1842
[08:07:08.109] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.6027 for pixel 8/10 mean/min/max = 44.7451/32.5993/56.8909
[08:07:08.109] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.9344 for pixel 4/0 mean/min/max = 45.9715/31.829/60.1141
[08:07:08.109] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.8157 for pixel 15/78 mean/min/max = 45.4045/31.9355/58.8735
[08:07:08.109] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 57.0288 for pixel 21/73 mean/min/max = 44.7459/32.4608/57.031
[08:07:08.110] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.9503 for pixel 3/73 mean/min/max = 45.7009/32.3746/59.0271
[08:07:08.110] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 56.5832 for pixel 33/76 mean/min/max = 44.4365/32.287/56.5859
[08:07:08.110] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 56.9246 for pixel 7/8 mean/min/max = 44.4923/32.0479/56.9366
[08:07:08.111] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 61.0684 for pixel 6/25 mean/min/max = 46.5038/31.8593/61.1482
[08:07:08.111] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 64.3203 for pixel 5/77 mean/min/max = 48.1078/31.6757/64.5399
[08:07:08.111] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 56.3152 for pixel 13/11 mean/min/max = 44.5112/32.5665/56.4559
[08:07:08.111] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.7591 for pixel 14/5 mean/min/max = 45.3476/32.8689/57.8263
[08:07:08.112] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 57.1655 for pixel 14/76 mean/min/max = 46.2926/35.3137/57.2715
[08:07:08.112] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.8231 for pixel 0/14 mean/min/max = 45.5637/33.2371/57.8903
[08:07:08.112] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.915 for pixel 1/6 mean/min/max = 45.4129/31.842/58.9837
[08:07:08.112] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:08:53.437] <TB2> INFO: Test took 105325ms.
[08:08:54.950] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:08:54.959] <TB2> INFO: dacScan step from 0 .. 19
[08:09:18.839] <TB2> INFO: Test took 23880ms.
[08:09:18.887] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:18.889] <TB2> INFO: dacScan step from 20 .. 39
[08:09:48.392] <TB2> INFO: Test took 29503ms.
[08:09:48.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:09:48.660] <TB2> INFO: dacScan step from 40 .. 59



[08:10:24.585] <TB2> INFO: Test took 35925ms.
[08:10:24.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:10:24.901] <TB2> INFO: dacScan step from 60 .. 79





[08:11:00.445] <TB2> INFO: Test took 35544ms.
[08:11:00.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:00.779] <TB2> INFO: dacScan step from 80 .. 99
[08:11:36.607] <TB2> INFO: Test took 35828ms.
[08:11:36.891] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:11:36.947] <TB2> INFO: dacScan step from 100 .. 119
[08:12:12.656] <TB2> INFO: Test took 35709ms.
[08:12:12.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:13.001] <TB2> INFO: dacScan step from 120 .. 139



[08:12:46.265] <TB2> INFO: Test took 33264ms.
[08:12:46.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:12:46.756] <TB2> INFO: dacScan step from 140 .. 159





[08:13:21.995] <TB2> INFO: Test took 35239ms.
[08:13:22.291] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:13:22.336] <TB2> INFO: dacScan step from 160 .. 179



[08:13:56.684] <TB2> INFO: Test took 34348ms.
[08:13:56.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:13:56.997] <TB2> INFO: dacScan step from 180 .. 199



[08:14:29.955] <TB2> INFO: Test took 32958ms.
[08:14:30.234] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:14:54.944] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.036658 .. 255.000000
[08:14:55.023] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[08:14:55.032] <TB2> INFO: dacScan step from 0 .. 19
[08:15:08.540] <TB2> INFO: Test took 13508ms.
[08:15:08.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:08.562] <TB2> INFO: dacScan step from 20 .. 39
[08:15:24.418] <TB2> INFO: Test took 15856ms.
[08:15:24.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:24.520] <TB2> INFO: dacScan step from 40 .. 59
[08:15:43.794] <TB2> INFO: Test took 19274ms.
[08:15:43.953] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:15:43.995] <TB2> INFO: dacScan step from 60 .. 79
[08:16:03.059] <TB2> INFO: Test took 19064ms.
[08:16:03.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:03.315] <TB2> INFO: dacScan step from 80 .. 99
[08:16:22.823] <TB2> INFO: Test took 19508ms.
[08:16:22.965] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:23.020] <TB2> INFO: dacScan step from 100 .. 119
[08:16:41.560] <TB2> INFO: Test took 18540ms.
[08:16:41.789] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:41.839] <TB2> INFO: dacScan step from 120 .. 139
[08:16:59.484] <TB2> INFO: Test took 17645ms.
[08:16:59.634] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:16:59.717] <TB2> INFO: dacScan step from 140 .. 159
[08:17:18.937] <TB2> INFO: Test took 19220ms.
[08:17:19.088] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:19.144] <TB2> INFO: dacScan step from 160 .. 179
[08:17:38.600] <TB2> INFO: Test took 19456ms.
[08:17:38.745] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:38.796] <TB2> INFO: dacScan step from 180 .. 199
[08:17:59.043] <TB2> INFO: Test took 20247ms.
[08:17:59.225] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:17:59.281] <TB2> INFO: dacScan step from 200 .. 219
[08:18:17.741] <TB2> INFO: Test took 18460ms.
[08:18:17.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:18.073] <TB2> INFO: dacScan step from 220 .. 239
[08:18:35.228] <TB2> INFO: Test took 17155ms.
[08:18:35.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:18:35.574] <TB2> INFO: dacScan step from 240 .. 255
[08:18:49.579] <TB2> INFO: Test took 14005ms.
[08:18:49.687] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:19.809] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 13.514682 .. 44.512698
[08:19:19.886] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 54 (20) hits flags = 16 (plus default)
[08:19:19.895] <TB2> INFO: dacScan step from 3 .. 22
[08:19:33.202] <TB2> INFO: Test took 13307ms.
[08:19:33.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:33.228] <TB2> INFO: dacScan step from 23 .. 42
[08:19:47.901] <TB2> INFO: Test took 14673ms.
[08:19:47.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:19:48.015] <TB2> INFO: dacScan step from 43 .. 54
[08:20:00.159] <TB2> INFO: Test took 12144ms.
[08:20:00.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:14.885] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 18.499948 .. 41.398941
[08:20:14.960] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 51 (20) hits flags = 16 (plus default)
[08:20:14.968] <TB2> INFO: dacScan step from 8 .. 27
[08:20:28.049] <TB2> INFO: Test took 13081ms.
[08:20:28.067] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:28.067] <TB2> INFO: dacScan step from 28 .. 47
[08:20:43.684] <TB2> INFO: Test took 15617ms.
[08:20:43.810] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:20:43.847] <TB2> INFO: dacScan step from 48 .. 51
[08:20:49.541] <TB2> INFO: Test took 5694ms.
[08:20:49.568] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:04.762] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.988298 .. 40.557939
[08:21:04.840] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 50 (20) hits flags = 16 (plus default)
[08:21:04.848] <TB2> INFO: dacScan step from 1 .. 20
[08:21:19.229] <TB2> INFO: Test took 14381ms.
[08:21:19.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:19.257] <TB2> INFO: dacScan step from 21 .. 40
[08:21:33.545] <TB2> INFO: Test took 14288ms.
[08:21:33.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:33.652] <TB2> INFO: dacScan step from 41 .. 50
[08:21:43.550] <TB2> INFO: Test took 9898ms.
[08:21:43.622] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:21:58.470] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[08:21:58.470] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[08:21:58.479] <TB2> INFO: dacScan step from 15 .. 34
[08:22:23.345] <TB2> INFO: Test took 24866ms.
[08:22:23.416] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:23.425] <TB2> INFO: dacScan step from 35 .. 54


[08:22:54.760] <TB2> INFO: Test took 31335ms.
[08:22:55.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:22:55.107] <TB2> INFO: dacScan step from 55 .. 55
[08:22:59.456] <TB2> INFO: Test took 4349ms.
[08:22:59.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:23:12.930] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:23:12.931] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:23:12.931] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C0.dat
[08:23:12.938] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C1.dat
[08:23:12.944] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C2.dat
[08:23:12.953] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C3.dat
[08:23:12.960] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C4.dat
[08:23:12.966] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C5.dat
[08:23:12.971] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C6.dat
[08:23:12.977] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C7.dat
[08:23:12.983] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C8.dat
[08:23:12.989] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C9.dat
[08:23:12.995] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C10.dat
[08:23:13.001] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C11.dat
[08:23:13.007] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C12.dat
[08:23:13.013] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C13.dat
[08:23:13.019] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C14.dat
[08:23:13.025] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//trimParameters35_C15.dat
[08:23:13.031] <TB2> INFO: PixTestTrim::trimTest() done
[08:23:13.031] <TB2> INFO: vtrim: 109 127 116 112 107 101 110 105 113 116 126 105 114 102 97 106
[08:23:13.031] <TB2> INFO: vthrcomp: 80 92 90 87 96 82 81 85 95 88 100 92 91 79 88 96
[08:23:13.031] <TB2> INFO: vcal mean: 35.05 35.05 34.99 35.00 35.01 34.99 34.98 35.01 35.04 35.00 35.06 35.02 35.04 35.06 35.01 35.01
[08:23:13.031] <TB2> INFO: vcal RMS: 1.06 1.09 0.98 1.09 0.99 1.15 1.07 0.94 1.01 0.97 1.06 1.01 1.00 0.99 1.00 1.02
[08:23:13.031] <TB2> INFO: bits mean: 10.06 9.37 10.23 9.98 9.82 10.39 9.44 9.97 10.27 9.50 9.27 10.06 9.90 9.37 9.54 9.78
[08:23:13.031] <TB2> INFO: bits RMS: 2.46 2.61 2.28 2.48 2.60 2.29 2.65 2.48 2.43 2.67 2.68 2.43 2.39 2.27 2.51 2.58
[08:23:13.038] <TB2> INFO: ----------------------------------------------------------------------
[08:23:13.038] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[08:23:13.038] <TB2> INFO: ----------------------------------------------------------------------
[08:23:13.040] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:23:13.049] <TB2> INFO: dacScan step from 0 .. 19
[08:23:37.946] <TB2> INFO: Test took 24897ms.
[08:23:37.991] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:23:37.991] <TB2> INFO: dacScan step from 20 .. 39
[08:24:03.412] <TB2> INFO: Test took 25421ms.
[08:24:03.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:03.446] <TB2> INFO: dacScan step from 40 .. 59
[08:24:28.473] <TB2> INFO: Test took 25028ms.
[08:24:28.510] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:28.510] <TB2> INFO: dacScan step from 60 .. 79
[08:24:53.894] <TB2> INFO: Test took 25384ms.
[08:24:53.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:24:53.931] <TB2> INFO: dacScan step from 80 .. 99
[08:25:19.584] <TB2> INFO: Test took 25653ms.
[08:25:19.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:19.661] <TB2> INFO: dacScan step from 100 .. 119
[08:25:52.580] <TB2> INFO: Test took 32919ms.
[08:25:52.811] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:25:52.838] <TB2> INFO: dacScan step from 120 .. 139
[08:26:29.148] <TB2> INFO: Test took 36310ms.
[08:26:29.417] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:26:29.467] <TB2> INFO: dacScan step from 140 .. 159

[08:27:01.667] <TB2> INFO: Test took 32199ms.
[08:27:01.961] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:02.014] <TB2> INFO: dacScan step from 160 .. 179
[08:27:36.220] <TB2> INFO: Test took 34206ms.
[08:27:36.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:36.556] <TB2> INFO: dacScan step from 180 .. 199
[08:28:08.267] <TB2> INFO: Test took 31711ms.
[08:28:08.594] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:35.762] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 164 (20) hits flags = 16 (plus default)
[08:28:35.771] <TB2> INFO: dacScan step from 0 .. 19
[08:29:00.726] <TB2> INFO: Test took 24955ms.
[08:29:00.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:00.761] <TB2> INFO: dacScan step from 20 .. 39
[08:29:25.803] <TB2> INFO: Test took 25042ms.
[08:29:25.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:25.837] <TB2> INFO: dacScan step from 40 .. 59
[08:29:51.015] <TB2> INFO: Test took 25177ms.
[08:29:51.049] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:51.049] <TB2> INFO: dacScan step from 60 .. 79
[08:30:16.811] <TB2> INFO: Test took 25761ms.
[08:30:16.850] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:16.850] <TB2> INFO: dacScan step from 80 .. 99
[08:30:44.783] <TB2> INFO: Test took 27933ms.
[08:30:44.918] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:44.930] <TB2> INFO: dacScan step from 100 .. 119
[08:31:16.675] <TB2> INFO: Test took 31745ms.
[08:31:17.088] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:17.151] <TB2> INFO: dacScan step from 120 .. 139



[08:31:53.238] <TB2> INFO: Test took 36087ms.
[08:31:53.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:53.567] <TB2> INFO: dacScan step from 140 .. 159
[08:32:29.045] <TB2> INFO: Test took 35478ms.
[08:32:29.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:29.379] <TB2> INFO: dacScan step from 160 .. 164
[08:32:39.143] <TB2> INFO: Test took 9764ms.
[08:32:39.212] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:03.126] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[08:33:03.139] <TB2> INFO: dacScan step from 0 .. 19
[08:33:25.787] <TB2> INFO: Test took 22648ms.
[08:33:25.828] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:25.828] <TB2> INFO: dacScan step from 20 .. 39
[08:33:48.548] <TB2> INFO: Test took 22720ms.
[08:33:48.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:48.586] <TB2> INFO: dacScan step from 40 .. 59
[08:34:11.448] <TB2> INFO: Test took 22862ms.
[08:34:11.485] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:11.485] <TB2> INFO: dacScan step from 60 .. 79
[08:34:34.326] <TB2> INFO: Test took 22841ms.
[08:34:34.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:34.367] <TB2> INFO: dacScan step from 80 .. 99
[08:34:58.596] <TB2> INFO: Test took 24229ms.
[08:34:58.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:58.804] <TB2> INFO: dacScan step from 100 .. 119
[08:35:32.281] <TB2> INFO: Test took 33477ms.
[08:35:32.544] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:32.582] <TB2> INFO: dacScan step from 120 .. 139



[08:36:07.819] <TB2> INFO: Test took 35237ms.
[08:36:08.111] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:08.162] <TB2> INFO: dacScan step from 140 .. 152
[08:36:31.676] <TB2> INFO: Test took 23514ms.
[08:36:31.853] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:54.080] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[08:36:54.088] <TB2> INFO: dacScan step from 0 .. 19
[08:37:18.525] <TB2> INFO: Test took 24437ms.
[08:37:18.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:18.565] <TB2> INFO: dacScan step from 20 .. 39
[08:37:42.728] <TB2> INFO: Test took 24163ms.
[08:37:42.765] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:42.765] <TB2> INFO: dacScan step from 40 .. 59
[08:38:07.189] <TB2> INFO: Test took 24423ms.
[08:38:07.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:07.226] <TB2> INFO: dacScan step from 60 .. 79
[08:38:30.765] <TB2> INFO: Test took 23539ms.
[08:38:30.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:30.802] <TB2> INFO: dacScan step from 80 .. 99
[08:38:56.297] <TB2> INFO: Test took 25495ms.
[08:38:56.434] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:56.449] <TB2> INFO: dacScan step from 100 .. 119
[08:39:31.228] <TB2> INFO: Test took 34779ms.
[08:39:31.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:31.541] <TB2> INFO: dacScan step from 120 .. 139


[08:40:07.580] <TB2> INFO: Test took 36039ms.
[08:40:07.855] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:07.906] <TB2> INFO: dacScan step from 140 .. 153
[08:40:34.218] <TB2> INFO: Test took 26312ms.
[08:40:34.414] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:57.114] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[08:40:57.123] <TB2> INFO: dacScan step from 0 .. 19
[08:41:21.951] <TB2> INFO: Test took 24828ms.
[08:41:21.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:21.987] <TB2> INFO: dacScan step from 20 .. 39
[08:41:47.019] <TB2> INFO: Test took 25032ms.
[08:41:47.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:47.058] <TB2> INFO: dacScan step from 40 .. 59
[08:42:11.281] <TB2> INFO: Test took 24223ms.
[08:42:11.317] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:11.317] <TB2> INFO: dacScan step from 60 .. 79
[08:42:35.443] <TB2> INFO: Test took 24125ms.
[08:42:35.480] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:35.480] <TB2> INFO: dacScan step from 80 .. 99
[08:43:03.938] <TB2> INFO: Test took 28457ms.
[08:43:04.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:04.089] <TB2> INFO: dacScan step from 100 .. 119
[08:43:40.597] <TB2> INFO: Test took 36508ms.
[08:43:40.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:40.902] <TB2> INFO: dacScan step from 120 .. 139

[08:44:17.845] <TB2> INFO: Test took 36943ms.
[08:44:18.125] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:18.175] <TB2> INFO: dacScan step from 140 .. 153
[08:44:45.258] <TB2> INFO: Test took 27083ms.
[08:44:45.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:07.415] <TB2> INFO: PixTestTrim::trimBitTest() done
[08:45:07.416] <TB2> INFO: PixTestTrim::doTest() done, duration: 2621 seconds
[08:45:08.125] <TB2> INFO: ######################################################################
[08:45:08.125] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[08:45:08.125] <TB2> INFO: ######################################################################
[08:45:11.426] <TB2> INFO: Test took 3300ms.
[08:45:11.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:15.048] <TB2> INFO: Test took 3408ms.
[08:45:15.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:18.544] <TB2> INFO: Test took 3426ms.
[08:45:18.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:18.616] <TB2> INFO: The DUT currently contains the following objects:
[08:45:18.616] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:18.616] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:18.616] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:18.616] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:18.616] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:18.616] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.723] <TB2> INFO: Test took 1107ms.
[08:45:19.724] <TB2> INFO: The DUT currently contains the following objects:
[08:45:19.724] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:19.724] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:19.724] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:19.724] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:19.724] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:19.724] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.845] <TB2> INFO: Test took 1121ms.
[08:45:20.846] <TB2> INFO: The DUT currently contains the following objects:
[08:45:20.848] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:20.848] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:20.848] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:20.848] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:20.848] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.848] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:20.849] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.952] <TB2> INFO: Test took 1103ms.
[08:45:21.953] <TB2> INFO: The DUT currently contains the following objects:
[08:45:21.953] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:21.953] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:21.953] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:21.953] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:21.953] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.953] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:21.954] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.061] <TB2> INFO: Test took 1107ms.
[08:45:23.064] <TB2> INFO: The DUT currently contains the following objects:
[08:45:23.064] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:23.064] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:23.064] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:23.064] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:23.064] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.064] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:23.065] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.170] <TB2> INFO: Test took 1105ms.
[08:45:24.172] <TB2> INFO: The DUT currently contains the following objects:
[08:45:24.172] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:24.172] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:24.172] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:24.172] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:24.172] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.172] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.173] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.173] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.173] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.173] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:24.173] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.279] <TB2> INFO: Test took 1106ms.
[08:45:25.280] <TB2> INFO: The DUT currently contains the following objects:
[08:45:25.280] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:25.280] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:25.280] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:25.280] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:25.281] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:25.281] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.402] <TB2> INFO: Test took 1121ms.
[08:45:26.404] <TB2> INFO: The DUT currently contains the following objects:
[08:45:26.404] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:26.404] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:26.404] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:26.404] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:26.404] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.404] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:26.405] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.526] <TB2> INFO: Test took 1121ms.
[08:45:27.527] <TB2> INFO: The DUT currently contains the following objects:
[08:45:27.527] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:27.527] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:27.527] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:27.527] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:27.527] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:27.528] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.653] <TB2> INFO: Test took 1125ms.
[08:45:28.654] <TB2> INFO: The DUT currently contains the following objects:
[08:45:28.654] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:28.654] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:28.654] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:28.654] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:28.654] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.654] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:28.655] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.763] <TB2> INFO: Test took 1108ms.
[08:45:29.767] <TB2> INFO: The DUT currently contains the following objects:
[08:45:29.774] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:29.774] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:29.774] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:29.774] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:29.774] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.774] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.774] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:29.775] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.875] <TB2> INFO: Test took 1100ms.
[08:45:30.876] <TB2> INFO: The DUT currently contains the following objects:
[08:45:30.876] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:30.876] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:30.876] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:30.876] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:30.876] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.876] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:30.877] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.984] <TB2> INFO: Test took 1107ms.
[08:45:31.986] <TB2> INFO: The DUT currently contains the following objects:
[08:45:31.986] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:31.986] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:31.986] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:31.986] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:31.986] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:31.986] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.093] <TB2> INFO: Test took 1107ms.
[08:45:33.094] <TB2> INFO: The DUT currently contains the following objects:
[08:45:33.094] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:33.094] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:33.094] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:33.094] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:33.094] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:33.095] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.202] <TB2> INFO: Test took 1107ms.
[08:45:34.203] <TB2> INFO: The DUT currently contains the following objects:
[08:45:34.203] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:34.203] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:34.203] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:34.203] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:34.203] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.203] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.203] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:34.204] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.311] <TB2> INFO: Test took 1107ms.
[08:45:35.312] <TB2> INFO: The DUT currently contains the following objects:
[08:45:35.312] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:45:35.312] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:45:35.312] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:45:35.312] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[08:45:35.312] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.312] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.312] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.312] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.312] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.312] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:35.313] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[08:45:36.421] <TB2> INFO: Test took 1108ms.
[08:45:36.425] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:49:32.823] <TB2> INFO: Test took 236398ms.
[08:49:34.565] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:33.062] <TB2> INFO: Test took 238497ms.
[08:53:34.742] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.749] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.756] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.763] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.770] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.777] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.784] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.791] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.799] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.806] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.814] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.821] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.828] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.835] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.842] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.849] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[08:53:34.908] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C0.dat
[08:53:34.909] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C1.dat
[08:53:34.910] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C2.dat
[08:53:34.910] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C3.dat
[08:53:34.910] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C4.dat
[08:53:34.910] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C5.dat
[08:53:34.911] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C6.dat
[08:53:34.911] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C7.dat
[08:53:34.912] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C8.dat
[08:53:34.912] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C9.dat
[08:53:34.912] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C10.dat
[08:53:34.912] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C11.dat
[08:53:34.916] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C12.dat
[08:53:34.917] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C13.dat
[08:53:34.917] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C14.dat
[08:53:34.917] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//dacParameters35_C15.dat
[08:53:38.373] <TB2> INFO: Test took 3453ms.
[08:53:41.967] <TB2> INFO: Test took 3325ms.
[08:53:45.542] <TB2> INFO: Test took 3313ms.
[08:53:45.817] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:46.728] <TB2> INFO: Test took 911ms.
[08:53:46.730] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:47.844] <TB2> INFO: Test took 1114ms.
[08:53:47.846] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:48.948] <TB2> INFO: Test took 1102ms.
[08:53:48.950] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:50.081] <TB2> INFO: Test took 1131ms.
[08:53:50.083] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:51.198] <TB2> INFO: Test took 1115ms.
[08:53:51.200] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:52.301] <TB2> INFO: Test took 1101ms.
[08:53:52.303] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:53.405] <TB2> INFO: Test took 1102ms.
[08:53:53.408] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:54.511] <TB2> INFO: Test took 1104ms.
[08:53:54.513] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:55.615] <TB2> INFO: Test took 1102ms.
[08:53:55.617] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:56.718] <TB2> INFO: Test took 1101ms.
[08:53:56.721] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:57.821] <TB2> INFO: Test took 1100ms.
[08:53:57.823] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:53:58.924] <TB2> INFO: Test took 1102ms.
[08:53:58.926] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:00.028] <TB2> INFO: Test took 1102ms.
[08:54:00.031] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:01.133] <TB2> INFO: Test took 1102ms.
[08:54:01.136] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:02.236] <TB2> INFO: Test took 1100ms.
[08:54:02.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:03.339] <TB2> INFO: Test took 1100ms.
[08:54:03.342] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:04.440] <TB2> INFO: Test took 1098ms.
[08:54:04.442] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:05.545] <TB2> INFO: Test took 1103ms.
[08:54:05.548] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:06.650] <TB2> INFO: Test took 1102ms.
[08:54:06.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:07.756] <TB2> INFO: Test took 1104ms.
[08:54:07.759] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:08.875] <TB2> INFO: Test took 1116ms.
[08:54:08.877] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:09.994] <TB2> INFO: Test took 1117ms.
[08:54:09.996] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:11.113] <TB2> INFO: Test took 1117ms.
[08:54:11.116] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:12.215] <TB2> INFO: Test took 1099ms.
[08:54:12.217] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:13.319] <TB2> INFO: Test took 1102ms.
[08:54:13.321] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:14.423] <TB2> INFO: Test took 1102ms.
[08:54:14.426] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:15.528] <TB2> INFO: Test took 1102ms.
[08:54:15.531] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:16.633] <TB2> INFO: Test took 1102ms.
[08:54:16.636] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:17.738] <TB2> INFO: Test took 1102ms.
[08:54:17.741] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:18.841] <TB2> INFO: Test took 1101ms.
[08:54:18.844] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:19.944] <TB2> INFO: Test took 1100ms.
[08:54:19.947] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:54:21.062] <TB2> INFO: Test took 1115ms.
[08:54:21.567] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 553 seconds
[08:54:21.567] <TB2> INFO: PH scale (per ROC): 84 85 83 77 80 85 82 97 86 92 86 93 80 97 88 93
[08:54:21.567] <TB2> INFO: PH offset (per ROC): 160 177 160 163 150 170 161 155 165 151 167 150 159 153 155 157
[08:54:21.800] <TB2> INFO: ######################################################################
[08:54:21.800] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[08:54:21.800] <TB2> INFO: ######################################################################
[08:54:21.810] <TB2> INFO: scanning low vcal = 10
[08:54:25.661] <TB2> INFO: Test took 3851ms.
[08:54:25.666] <TB2> INFO: scanning low vcal = 20
[08:54:29.504] <TB2> INFO: Test took 3838ms.
[08:54:29.509] <TB2> INFO: scanning low vcal = 30
[08:54:33.410] <TB2> INFO: Test took 3901ms.
[08:54:33.422] <TB2> INFO: scanning low vcal = 40
[08:54:37.759] <TB2> INFO: Test took 4337ms.
[08:54:37.817] <TB2> INFO: scanning low vcal = 50
[08:54:42.381] <TB2> INFO: Test took 4564ms.
[08:54:42.461] <TB2> INFO: scanning low vcal = 60
[08:54:46.985] <TB2> INFO: Test took 4524ms.
[08:54:47.072] <TB2> INFO: scanning low vcal = 70
[08:54:51.514] <TB2> INFO: Test took 4442ms.
[08:54:51.609] <TB2> INFO: scanning low vcal = 80
[08:54:56.134] <TB2> INFO: Test took 4525ms.
[08:54:56.196] <TB2> INFO: scanning low vcal = 90
[08:55:00.726] <TB2> INFO: Test took 4530ms.
[08:55:00.807] <TB2> INFO: scanning low vcal = 100
[08:55:05.236] <TB2> INFO: Test took 4429ms.
[08:55:05.337] <TB2> INFO: scanning low vcal = 110
[08:55:09.891] <TB2> INFO: Test took 4554ms.
[08:55:09.973] <TB2> INFO: scanning low vcal = 120
[08:55:14.687] <TB2> INFO: Test took 4714ms.
[08:55:14.762] <TB2> INFO: scanning low vcal = 130
[08:55:19.391] <TB2> INFO: Test took 4629ms.
[08:55:19.483] <TB2> INFO: scanning low vcal = 140
[08:55:24.234] <TB2> INFO: Test took 4751ms.
[08:55:24.299] <TB2> INFO: scanning low vcal = 150
[08:55:28.841] <TB2> INFO: Test took 4542ms.
[08:55:28.905] <TB2> INFO: scanning low vcal = 160
[08:55:33.748] <TB2> INFO: Test took 4843ms.
[08:55:33.806] <TB2> INFO: scanning low vcal = 170
[08:55:38.478] <TB2> INFO: Test took 4672ms.
[08:55:38.544] <TB2> INFO: scanning low vcal = 180
[08:55:43.195] <TB2> INFO: Test took 4651ms.
[08:55:43.256] <TB2> INFO: scanning low vcal = 190
[08:55:47.996] <TB2> INFO: Test took 4740ms.
[08:55:48.050] <TB2> INFO: scanning low vcal = 200
[08:55:52.660] <TB2> INFO: Test took 4609ms.
[08:55:52.718] <TB2> INFO: scanning low vcal = 210
[08:55:57.208] <TB2> INFO: Test took 4490ms.
[08:55:57.266] <TB2> INFO: scanning low vcal = 220
[08:56:01.937] <TB2> INFO: Test took 4671ms.
[08:56:02.034] <TB2> INFO: scanning low vcal = 230
[08:56:06.687] <TB2> INFO: Test took 4653ms.
[08:56:06.783] <TB2> INFO: scanning low vcal = 240
[08:56:11.474] <TB2> INFO: Test took 4691ms.
[08:56:11.529] <TB2> INFO: scanning low vcal = 250
[08:56:16.259] <TB2> INFO: Test took 4730ms.
[08:56:16.331] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[08:56:20.801] <TB2> INFO: Test took 4470ms.
[08:56:20.863] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[08:56:25.381] <TB2> INFO: Test took 4518ms.
[08:56:25.475] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[08:56:30.064] <TB2> INFO: Test took 4589ms.
[08:56:30.144] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[08:56:34.730] <TB2> INFO: Test took 4585ms.
[08:56:34.784] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[08:56:39.474] <TB2> INFO: Test took 4690ms.
[08:56:39.977] <TB2> INFO: PixTestGainPedestal::measure() done
[08:57:11.237] <TB2> INFO: PixTestGainPedestal::fit() done
[08:57:11.237] <TB2> INFO: non-linearity mean: 0.960 0.968 0.952 0.958 0.952 0.964 0.953 0.954 0.961 0.957 0.960 0.958 0.952 0.959 0.949 0.951
[08:57:11.237] <TB2> INFO: non-linearity RMS: 0.007 0.005 0.006 0.006 0.006 0.005 0.006 0.005 0.005 0.005 0.006 0.005 0.006 0.005 0.006 0.006
[08:57:11.237] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[08:57:11.256] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[08:57:11.274] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[08:57:11.292] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[08:57:11.310] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[08:57:11.329] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[08:57:11.347] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[08:57:11.365] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[08:57:11.384] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[08:57:11.402] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[08:57:11.421] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[08:57:11.439] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[08:57:11.458] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[08:57:11.476] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[08:57:11.494] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[08:57:11.513] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2074_FullQualification_2015-08-17_09h36m_1439796976//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[08:57:11.531] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[08:57:11.537] <TB2> INFO: enter test to run
[08:57:11.537] <TB2> INFO: test: exit no parameter change
[08:57:11.969] <TB2> QUIET: Connection to board 156 closed.
[08:57:12.049] <TB2> INFO: pXar: this is the end, my friend