[09:35:13.788] <TB3> INFO: *** Welcome to pxar ***
[09:35:13.788] <TB3> INFO: *** Today: 2015/07/09
[09:35:13.788] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C15.dat
[09:35:13.790] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:35:13.790] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//defaultMaskFile.dat
[09:35:13.790] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters_C15.dat
[09:35:13.882] <TB3> INFO: clk: 4
[09:35:13.882] <TB3> INFO: ctr: 4
[09:35:13.882] <TB3> INFO: sda: 19
[09:35:13.882] <TB3> INFO: tin: 9
[09:35:13.882] <TB3> INFO: level: 15
[09:35:13.882] <TB3> INFO: triggerdelay: 0
[09:35:13.883] <TB3> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[09:35:13.883] <TB3> INFO: Log level: INFO
[09:35:13.890] <TB3> INFO: Found DTB DTB_WZ4I6J
[09:35:13.903] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[09:35:13.906] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[09:35:13.909] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[09:35:15.464] <TB3> INFO: DUT info:
[09:35:15.464] <TB3> INFO: The DUT currently contains the following objects:
[09:35:15.464] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[09:35:15.464] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:35:15.464] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:35:15.464] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:35:15.464] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.464] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.464] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.464] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.465] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:15.866] <TB3> INFO: enter 'restricted' command line mode
[09:35:15.866] <TB3> INFO: enter test to run
[09:35:15.866] <TB3> INFO: test: pretest no parameter change
[09:35:15.866] <TB3> INFO: running: pretest
[09:35:15.874] <TB3> INFO: ######################################################################
[09:35:15.874] <TB3> INFO: PixTestPretest::doTest()
[09:35:15.874] <TB3> INFO: ######################################################################
[09:35:15.876] <TB3> INFO: ----------------------------------------------------------------------
[09:35:15.876] <TB3> INFO: PixTestPretest::programROC()
[09:35:15.876] <TB3> INFO: ----------------------------------------------------------------------
[09:35:33.894] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:35:33.894] <TB3> INFO: IA differences per ROC: 17.7 19.3 18.5 20.1 20.1 20.1 18.5 20.9 17.7 20.1 17.7 19.3 20.1 18.5 19.3 19.3
[09:35:33.971] <TB3> INFO: ----------------------------------------------------------------------
[09:35:33.971] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:35:33.971] <TB3> INFO: ----------------------------------------------------------------------
[09:35:53.522] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[09:35:53.525] <TB3> INFO: ----------------------------------------------------------------------
[09:35:53.525] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:35:53.525] <TB3> INFO: ----------------------------------------------------------------------
[09:36:01.786] <TB3> INFO: Test took 8258ms.
[09:36:02.079] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:36:02.117] <TB3> INFO: ----------------------------------------------------------------------
[09:36:02.117] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:36:02.117] <TB3> INFO: ----------------------------------------------------------------------
[09:36:10.375] <TB3> INFO: Test took 8254ms.
[09:36:10.689] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:36:10.689] <TB3> INFO: CalDel: 148 157 127 142 146 154 144 168 133 132 140 130 129 126 131 142
[09:36:10.689] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:36:10.692] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C0.dat
[09:36:10.693] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C1.dat
[09:36:10.693] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C2.dat
[09:36:10.693] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C3.dat
[09:36:10.693] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C4.dat
[09:36:10.694] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C5.dat
[09:36:10.694] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C6.dat
[09:36:10.694] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C7.dat
[09:36:10.695] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C8.dat
[09:36:10.695] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C9.dat
[09:36:10.695] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C10.dat
[09:36:10.695] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C11.dat
[09:36:10.695] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C12.dat
[09:36:10.696] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C13.dat
[09:36:10.696] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C14.dat
[09:36:10.696] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C15.dat
[09:36:10.696] <TB3> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[09:36:10.798] <TB3> INFO: enter test to run
[09:36:10.798] <TB3> INFO: test: fulltest no parameter change
[09:36:10.798] <TB3> INFO: running: fulltest
[09:36:10.798] <TB3> INFO: ######################################################################
[09:36:10.798] <TB3> INFO: PixTestFullTest::doTest()
[09:36:10.798] <TB3> INFO: ######################################################################
[09:36:10.799] <TB3> INFO: ######################################################################
[09:36:10.799] <TB3> INFO: PixTestAlive::doTest()
[09:36:10.799] <TB3> INFO: ######################################################################
[09:36:10.801] <TB3> INFO: ----------------------------------------------------------------------
[09:36:10.801] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:10.801] <TB3> INFO: ----------------------------------------------------------------------
[09:36:14.278] <TB3> INFO: Test took 3475ms.
[09:36:14.306] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:14.530] <TB3> INFO: PixTestAlive::aliveTest() done
[09:36:14.530] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:14.531] <TB3> INFO: ----------------------------------------------------------------------
[09:36:14.531] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:14.531] <TB3> INFO: ----------------------------------------------------------------------
[09:36:17.244] <TB3> INFO: Test took 2711ms.
[09:36:17.246] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:17.246] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:36:17.470] <TB3> INFO: PixTestAlive::maskTest() done
[09:36:17.470] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:17.472] <TB3> INFO: ----------------------------------------------------------------------
[09:36:17.472] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:17.472] <TB3> INFO: ----------------------------------------------------------------------
[09:36:20.945] <TB3> INFO: Test took 3471ms.
[09:36:20.964] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:21.195] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:36:21.195] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:21.195] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[09:36:21.205] <TB3> INFO: ######################################################################
[09:36:21.205] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:36:21.205] <TB3> INFO: ######################################################################
[09:36:21.208] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:36:21.350] <TB3> INFO: dacScan step from 0 .. 29
[09:36:42.765] <TB3> INFO: Test took 21415ms.
[09:36:42.797] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:42.800] <TB3> INFO: dacScan step from 30 .. 59
[09:37:06.471] <TB3> INFO: Test took 23671ms.
[09:37:06.606] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:06.629] <TB3> INFO: dacScan step from 60 .. 89
[09:37:35.602] <TB3> INFO: Test took 28973ms.
[09:37:35.901] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:35.976] <TB3> INFO: dacScan step from 90 .. 119
[09:38:02.902] <TB3> INFO: Test took 26926ms.
[09:38:03.163] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:03.243] <TB3> INFO: dacScan step from 120 .. 149
[09:38:27.198] <TB3> INFO: Test took 23955ms.
[09:38:27.422] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:50.315] <TB3> INFO: PixTestBBMap::doTest() done, duration: 149 seconds
[09:38:50.315] <TB3> INFO: number of dead bumps (per ROC): 5 0 0 0 0 0 0 0 0 0 0 1 1 0 31 8
[09:38:50.315] <TB3> INFO: separation cut (per ROC): 77 76 99 91 89 72 84 87 77 69 71 96 88 79 67 78
[09:38:50.405] <TB3> INFO: ######################################################################
[09:38:50.405] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[09:38:50.405] <TB3> INFO: ######################################################################
[09:38:50.405] <TB3> INFO: ----------------------------------------------------------------------
[09:38:50.405] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:38:50.405] <TB3> INFO: ----------------------------------------------------------------------
[09:38:50.405] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:38:50.413] <TB3> INFO: dacScan step from 0 .. 3
[09:39:08.400] <TB3> INFO: Test took 17986ms.
[09:39:08.425] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:08.425] <TB3> INFO: dacScan step from 4 .. 7
[09:39:27.228] <TB3> INFO: Test took 18803ms.
[09:39:27.255] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:27.255] <TB3> INFO: dacScan step from 8 .. 11
[09:39:46.160] <TB3> INFO: Test took 18905ms.
[09:39:46.187] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:46.187] <TB3> INFO: dacScan step from 12 .. 15
[09:40:05.092] <TB3> INFO: Test took 18905ms.
[09:40:05.122] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:05.122] <TB3> INFO: dacScan step from 16 .. 19
[09:40:24.078] <TB3> INFO: Test took 18956ms.
[09:40:24.106] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:24.106] <TB3> INFO: dacScan step from 20 .. 23
[09:40:43.088] <TB3> INFO: Test took 18982ms.
[09:40:43.115] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:43.115] <TB3> INFO: dacScan step from 24 .. 27
[09:41:02.021] <TB3> INFO: Test took 18906ms.
[09:41:02.051] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:02.051] <TB3> INFO: dacScan step from 28 .. 31
[09:41:20.899] <TB3> INFO: Test took 18848ms.
[09:41:20.925] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:20.925] <TB3> INFO: dacScan step from 32 .. 35
[09:41:39.832] <TB3> INFO: Test took 18907ms.
[09:41:39.862] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:39.862] <TB3> INFO: dacScan step from 36 .. 39
[09:41:58.867] <TB3> INFO: Test took 19005ms.
[09:41:58.895] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:58.895] <TB3> INFO: dacScan step from 40 .. 43
[09:42:17.749] <TB3> INFO: Test took 18854ms.
[09:42:17.776] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:17.776] <TB3> INFO: dacScan step from 44 .. 47
[09:42:36.621] <TB3> INFO: Test took 18845ms.
[09:42:36.647] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:36.647] <TB3> INFO: dacScan step from 48 .. 51
[09:42:55.570] <TB3> INFO: Test took 18922ms.
[09:42:55.600] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:55.600] <TB3> INFO: dacScan step from 52 .. 55
[09:43:14.482] <TB3> INFO: Test took 18882ms.
[09:43:14.511] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:14.511] <TB3> INFO: dacScan step from 56 .. 59
[09:43:33.343] <TB3> INFO: Test took 18832ms.
[09:43:33.375] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:33.375] <TB3> INFO: dacScan step from 60 .. 63
[09:43:52.301] <TB3> INFO: Test took 18926ms.
[09:43:52.334] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:52.334] <TB3> INFO: dacScan step from 64 .. 67
[09:44:11.570] <TB3> INFO: Test took 19236ms.
[09:44:11.614] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:11.615] <TB3> INFO: dacScan step from 68 .. 71
[09:44:31.777] <TB3> INFO: Test took 20162ms.
[09:44:31.847] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:31.850] <TB3> INFO: dacScan step from 72 .. 75
[09:44:53.174] <TB3> INFO: Test took 21324ms.
[09:44:53.267] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:53.275] <TB3> INFO: dacScan step from 76 .. 79
[09:45:16.412] <TB3> INFO: Test took 23137ms.
[09:45:16.550] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:16.556] <TB3> INFO: dacScan step from 80 .. 83
[09:45:42.738] <TB3> INFO: Test took 26182ms.
[09:45:42.935] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:42.944] <TB3> INFO: dacScan step from 84 .. 87
[09:46:10.968] <TB3> INFO: Test took 28024ms.
[09:46:11.182] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:11.193] <TB3> INFO: dacScan step from 88 .. 91
[09:46:39.770] <TB3> INFO: Test took 28577ms.
[09:46:40.045] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:40.057] <TB3> INFO: dacScan step from 92 .. 95



[09:47:08.962] <TB3> INFO: Test took 28905ms.
[09:47:09.209] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:09.221] <TB3> INFO: dacScan step from 96 .. 99



[09:47:38.458] <TB3> INFO: Test took 29237ms.
[09:47:38.702] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:38.714] <TB3> INFO: dacScan step from 100 .. 103



[09:48:07.870] <TB3> INFO: Test took 29155ms.
[09:48:08.091] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:08.102] <TB3> INFO: dacScan step from 104 .. 107



[09:48:37.289] <TB3> INFO: Test took 29187ms.
[09:48:37.545] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:37.557] <TB3> INFO: dacScan step from 108 .. 111



[09:49:06.746] <TB3> INFO: Test took 29189ms.
[09:49:06.977] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:06.989] <TB3> INFO: dacScan step from 112 .. 115
[09:49:36.087] <TB3> INFO: Test took 29098ms.
[09:49:36.315] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:36.326] <TB3> INFO: dacScan step from 116 .. 119
[09:50:05.369] <TB3> INFO: Test took 29043ms.
[09:50:05.610] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:05.621] <TB3> INFO: dacScan step from 120 .. 123
[09:50:34.721] <TB3> INFO: Test took 29099ms.
[09:50:34.951] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:34.965] <TB3> INFO: dacScan step from 124 .. 127
[09:51:04.228] <TB3> INFO: Test took 29263ms.
[09:51:04.477] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:04.489] <TB3> INFO: dacScan step from 128 .. 131
[09:51:33.542] <TB3> INFO: Test took 29053ms.
[09:51:33.799] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:33.813] <TB3> INFO: dacScan step from 132 .. 135
[09:52:02.830] <TB3> INFO: Test took 29017ms.
[09:52:03.053] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:03.065] <TB3> INFO: dacScan step from 136 .. 139
[09:52:32.124] <TB3> INFO: Test took 29059ms.
[09:52:32.418] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:32.429] <TB3> INFO: dacScan step from 140 .. 143
[09:53:01.465] <TB3> INFO: Test took 29035ms.
[09:53:01.784] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:01.796] <TB3> INFO: dacScan step from 144 .. 147
[09:53:28.378] <TB3> INFO: Test took 26582ms.
[09:53:28.763] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:28.780] <TB3> INFO: dacScan step from 148 .. 149
[09:53:43.308] <TB3> INFO: Test took 14528ms.
[09:53:43.416] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:43.423] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:44.976] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:46.538] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:48.073] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:49.650] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:51.240] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:52.883] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:54.517] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:56.096] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:57.668] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:53:59.250] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:00.834] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:02.516] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:04.063] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:05.640] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:07.200] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:54:08.981] <TB3> INFO: PixTestScurves::scurves() done
[09:54:08.981] <TB3> INFO: Vcal mean: 82.28 75.22 89.10 79.55 73.48 72.42 81.05 80.56 89.18 76.81 80.92 90.16 83.74 75.24 80.99 83.76
[09:54:08.982] <TB3> INFO: Vcal RMS: 5.02 4.19 5.55 5.22 4.61 4.97 4.32 4.37 5.46 3.77 4.45 5.06 4.91 4.54 4.33 5.34
[09:54:08.982] <TB3> INFO: PixTestScurves::fullTest() done, duration: 918 seconds
[09:54:09.057] <TB3> INFO: ######################################################################
[09:54:09.057] <TB3> INFO: PixTestTrim::doTest()
[09:54:09.057] <TB3> INFO: ######################################################################
[09:54:09.058] <TB3> INFO: ----------------------------------------------------------------------
[09:54:09.059] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:54:09.059] <TB3> INFO: ----------------------------------------------------------------------
[09:54:09.144] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:54:09.144] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:54:09.153] <TB3> INFO: dacScan step from 0 .. 19
[09:54:24.209] <TB3> INFO: Test took 15056ms.
[09:54:24.235] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:24.235] <TB3> INFO: dacScan step from 20 .. 39
[09:54:39.265] <TB3> INFO: Test took 15030ms.
[09:54:39.290] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:39.290] <TB3> INFO: dacScan step from 40 .. 59
[09:54:54.340] <TB3> INFO: Test took 15050ms.
[09:54:54.365] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:54.365] <TB3> INFO: dacScan step from 60 .. 79
[09:55:09.348] <TB3> INFO: Test took 14983ms.
[09:55:09.378] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:09.379] <TB3> INFO: dacScan step from 80 .. 99
[09:55:25.653] <TB3> INFO: Test took 16274ms.
[09:55:25.736] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:25.749] <TB3> INFO: dacScan step from 100 .. 119
[09:55:44.378] <TB3> INFO: Test took 18629ms.
[09:55:44.556] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:44.601] <TB3> INFO: dacScan step from 120 .. 139
[09:56:02.139] <TB3> INFO: Test took 17538ms.
[09:56:02.285] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:02.313] <TB3> INFO: dacScan step from 140 .. 159
[09:56:17.322] <TB3> INFO: Test took 15009ms.
[09:56:17.376] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:39.011] <TB3> INFO: ROC 0 VthrComp = 86
[09:56:39.011] <TB3> INFO: ROC 1 VthrComp = 82
[09:56:39.011] <TB3> INFO: ROC 2 VthrComp = 95
[09:56:39.011] <TB3> INFO: ROC 3 VthrComp = 84
[09:56:39.012] <TB3> INFO: ROC 4 VthrComp = 80
[09:56:39.012] <TB3> INFO: ROC 5 VthrComp = 78
[09:56:39.012] <TB3> INFO: ROC 6 VthrComp = 86
[09:56:39.012] <TB3> INFO: ROC 7 VthrComp = 90
[09:56:39.012] <TB3> INFO: ROC 8 VthrComp = 94
[09:56:39.012] <TB3> INFO: ROC 9 VthrComp = 85
[09:56:39.012] <TB3> INFO: ROC 10 VthrComp = 88
[09:56:39.013] <TB3> INFO: ROC 11 VthrComp = 98
[09:56:39.013] <TB3> INFO: ROC 12 VthrComp = 91
[09:56:39.013] <TB3> INFO: ROC 13 VthrComp = 83
[09:56:39.013] <TB3> INFO: ROC 14 VthrComp = 85
[09:56:39.013] <TB3> INFO: ROC 15 VthrComp = 89
[09:56:39.013] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:56:39.013] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:56:39.021] <TB3> INFO: dacScan step from 0 .. 19
[09:56:54.109] <TB3> INFO: Test took 15088ms.
[09:56:54.135] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:54.135] <TB3> INFO: dacScan step from 20 .. 39
[09:57:09.317] <TB3> INFO: Test took 15182ms.
[09:57:09.351] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:09.354] <TB3> INFO: dacScan step from 40 .. 59
[09:57:28.465] <TB3> INFO: Test took 19111ms.
[09:57:28.632] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:28.672] <TB3> INFO: dacScan step from 60 .. 79
[09:57:48.972] <TB3> INFO: Test took 20300ms.
[09:57:49.157] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:49.224] <TB3> INFO: dacScan step from 80 .. 99
[09:58:09.430] <TB3> INFO: Test took 20206ms.
[09:58:09.630] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:09.694] <TB3> INFO: dacScan step from 100 .. 119
[09:58:29.851] <TB3> INFO: Test took 20157ms.
[09:58:30.032] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:30.108] <TB3> INFO: dacScan step from 120 .. 139
[09:58:48.765] <TB3> INFO: Test took 18657ms.
[09:58:48.927] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:48.985] <TB3> INFO: dacScan step from 140 .. 159
[09:59:07.678] <TB3> INFO: Test took 18693ms.
[09:59:07.894] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:33.026] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.8444 for pixel 9/41 mean/min/max = 45.444/31.9495/58.9386
[09:59:33.026] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 56.4246 for pixel 8/56 mean/min/max = 44.6504/32.6836/56.6171
[09:59:33.026] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.3122 for pixel 9/3 mean/min/max = 45.6634/31.8645/59.4623
[09:59:33.026] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.4581 for pixel 7/74 mean/min/max = 45.5903/31.6656/59.515
[09:59:33.027] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 55.7163 for pixel 28/77 mean/min/max = 44.3216/32.8077/55.8356
[09:59:33.027] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.6777 for pixel 32/76 mean/min/max = 45.8742/33.968/57.7804
[09:59:33.027] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 56.3929 for pixel 20/77 mean/min/max = 44.109/31.6782/56.5398
[09:59:33.027] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.0388 for pixel 3/79 mean/min/max = 44.7708/32.4388/57.1028
[09:59:33.028] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.9211 for pixel 9/6 mean/min/max = 45.4398/31.9231/58.9565
[09:59:33.028] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 54.9162 for pixel 17/20 mean/min/max = 43.5257/32.123/54.9284
[09:59:33.028] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 56.8197 for pixel 25/3 mean/min/max = 44.9525/32.663/57.2421
[09:59:33.028] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.683 for pixel 0/75 mean/min/max = 44.4898/31.2716/57.708
[09:59:33.029] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.3592 for pixel 3/78 mean/min/max = 44.9902/32.5847/57.3957
[09:59:33.029] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.7375 for pixel 5/75 mean/min/max = 44.533/32.2258/56.8403
[09:59:33.029] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.0289 for pixel 51/43 mean/min/max = 44.5354/31.843/57.2278
[09:59:33.030] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.0838 for pixel 0/69 mean/min/max = 46.0467/31.9111/60.1823
[09:59:33.030] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:01:08.031] <TB3> INFO: Test took 95001ms.
[10:01:09.690] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:01:09.698] <TB3> INFO: dacScan step from 0 .. 19
[10:01:32.298] <TB3> INFO: Test took 22600ms.
[10:01:32.347] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:32.348] <TB3> INFO: dacScan step from 20 .. 39
[10:02:00.594] <TB3> INFO: Test took 28246ms.
[10:02:00.833] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:00.865] <TB3> INFO: dacScan step from 40 .. 59



[10:02:31.289] <TB3> INFO: Test took 30424ms.
[10:02:31.566] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:31.622] <TB3> INFO: dacScan step from 60 .. 79




[10:03:04.526] <TB3> INFO: Test took 32904ms.
[10:03:04.804] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:04.855] <TB3> INFO: dacScan step from 80 .. 99




[10:03:37.894] <TB3> INFO: Test took 33039ms.
[10:03:38.171] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:38.223] <TB3> INFO: dacScan step from 100 .. 119



[10:04:10.901] <TB3> INFO: Test took 32678ms.
[10:04:11.185] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:11.237] <TB3> INFO: dacScan step from 120 .. 139




[10:04:44.166] <TB3> INFO: Test took 32929ms.
[10:04:44.453] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:44.506] <TB3> INFO: dacScan step from 140 .. 159


[10:05:17.398] <TB3> INFO: Test took 32892ms.
[10:05:17.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:17.761] <TB3> INFO: dacScan step from 160 .. 179


[10:05:50.271] <TB3> INFO: Test took 32510ms.
[10:05:50.560] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:50.619] <TB3> INFO: dacScan step from 180 .. 199



[10:06:21.928] <TB3> INFO: Test took 31309ms.
[10:06:22.221] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:47.782] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.073770 .. 255.000000
[10:06:47.861] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:06:47.869] <TB3> INFO: dacScan step from 0 .. 19
[10:07:01.389] <TB3> INFO: Test took 13520ms.
[10:07:01.418] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:01.418] <TB3> INFO: dacScan step from 20 .. 39
[10:07:16.256] <TB3> INFO: Test took 14838ms.
[10:07:16.340] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:16.356] <TB3> INFO: dacScan step from 40 .. 59
[10:07:34.075] <TB3> INFO: Test took 17718ms.
[10:07:34.237] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:34.295] <TB3> INFO: dacScan step from 60 .. 79
[10:07:52.035] <TB3> INFO: Test took 17740ms.
[10:07:52.192] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:52.246] <TB3> INFO: dacScan step from 80 .. 99
[10:08:09.968] <TB3> INFO: Test took 17722ms.
[10:08:10.128] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:10.183] <TB3> INFO: dacScan step from 100 .. 119
[10:08:28.000] <TB3> INFO: Test took 17817ms.
[10:08:28.160] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:28.215] <TB3> INFO: dacScan step from 120 .. 139
[10:08:46.050] <TB3> INFO: Test took 17835ms.
[10:08:46.196] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:46.246] <TB3> INFO: dacScan step from 140 .. 159
[10:09:03.943] <TB3> INFO: Test took 17697ms.
[10:09:04.098] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:04.160] <TB3> INFO: dacScan step from 160 .. 179
[10:09:21.898] <TB3> INFO: Test took 17738ms.
[10:09:22.058] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:22.112] <TB3> INFO: dacScan step from 180 .. 199
[10:09:40.767] <TB3> INFO: Test took 18655ms.
[10:09:40.919] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:40.974] <TB3> INFO: dacScan step from 200 .. 219
[10:09:58.236] <TB3> INFO: Test took 17262ms.
[10:09:58.385] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:58.440] <TB3> INFO: dacScan step from 220 .. 239
[10:10:14.899] <TB3> INFO: Test took 16459ms.
[10:10:15.038] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:15.094] <TB3> INFO: dacScan step from 240 .. 255
[10:10:29.078] <TB3> INFO: Test took 13984ms.
[10:10:29.225] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:01.362] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 12.535624 .. 44.855720
[10:11:01.452] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 54 (20) hits flags = 16 (plus default)
[10:11:01.462] <TB3> INFO: dacScan step from 2 .. 21
[10:11:14.505] <TB3> INFO: Test took 13043ms.
[10:11:14.524] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:14.524] <TB3> INFO: dacScan step from 22 .. 41
[10:11:28.921] <TB3> INFO: Test took 14397ms.
[10:11:29.018] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:29.041] <TB3> INFO: dacScan step from 42 .. 54
[10:11:40.862] <TB3> INFO: Test took 11821ms.
[10:11:41.013] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:58.065] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 18.805316 .. 40.529432
[10:11:58.149] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 50 (20) hits flags = 16 (plus default)
[10:11:58.157] <TB3> INFO: dacScan step from 8 .. 27
[10:12:11.127] <TB3> INFO: Test took 12970ms.
[10:12:11.147] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:11.147] <TB3> INFO: dacScan step from 28 .. 47
[10:12:26.606] <TB3> INFO: Test took 15459ms.
[10:12:26.790] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:26.843] <TB3> INFO: dacScan step from 48 .. 50
[10:12:31.804] <TB3> INFO: Test took 4960ms.
[10:12:31.832] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:46.782] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.968209 .. 40.499994
[10:12:46.861] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 50 (20) hits flags = 16 (plus default)
[10:12:46.869] <TB3> INFO: dacScan step from 1 .. 20
[10:13:00.388] <TB3> INFO: Test took 13519ms.
[10:13:00.413] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:00.413] <TB3> INFO: dacScan step from 21 .. 40
[10:13:14.431] <TB3> INFO: Test took 14018ms.
[10:13:14.513] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:14.535] <TB3> INFO: dacScan step from 41 .. 50
[10:13:24.232] <TB3> INFO: Test took 9697ms.
[10:13:24.305] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:39.679] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:13:39.679] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[10:13:39.687] <TB3> INFO: dacScan step from 15 .. 34
[10:14:02.905] <TB3> INFO: Test took 23218ms.
[10:14:02.973] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:02.982] <TB3> INFO: dacScan step from 35 .. 54



[10:14:33.471] <TB3> INFO: Test took 30489ms.
[10:14:33.827] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:33.885] <TB3> INFO: dacScan step from 55 .. 55
[10:14:38.111] <TB3> INFO: Test took 4226ms.
[10:14:38.135] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:52.580] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:14:52.580] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:14:52.580] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:14:52.581] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:14:52.582] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:14:52.582] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:14:52.582] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:14:52.582] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:14:52.582] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:14:52.582] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:14:52.590] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:14:52.596] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:14:52.602] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:14:52.608] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:14:52.614] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:14:52.620] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:14:52.626] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:14:52.632] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:14:52.638] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:14:52.644] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:14:52.649] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:14:52.655] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:14:52.661] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:14:52.667] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:14:52.672] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:14:52.678] <TB3> INFO: PixTestTrim::trimTest() done
[10:14:52.678] <TB3> INFO: vtrim: 125 115 108 116 101 101 101 107 118 111 99 113 102 105 94 101
[10:14:52.678] <TB3> INFO: vthrcomp: 86 82 95 84 80 78 86 90 94 85 88 98 91 83 85 89
[10:14:52.678] <TB3> INFO: vcal mean: 35.05 35.02 34.96 35.04 35.01 35.04 35.02 35.02 35.05 35.04 35.04 35.00 35.01 35.08 35.03 35.03
[10:14:52.678] <TB3> INFO: vcal RMS: 1.02 0.96 0.97 0.94 0.87 0.93 0.95 0.92 1.18 0.98 1.00 1.12 0.95 0.95 1.02 1.00
[10:14:52.678] <TB3> INFO: bits mean: 10.30 9.88 9.56 9.56 10.15 9.64 9.89 9.88 10.23 10.44 10.05 10.26 9.76 9.99 9.76 9.25
[10:14:52.678] <TB3> INFO: bits RMS: 2.32 2.46 2.68 2.66 2.32 2.32 2.61 2.49 2.38 2.34 2.39 2.48 2.53 2.46 2.67 2.80
[10:14:52.683] <TB3> INFO: ----------------------------------------------------------------------
[10:14:52.683] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[10:14:52.683] <TB3> INFO: ----------------------------------------------------------------------
[10:14:52.686] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:14:52.694] <TB3> INFO: dacScan step from 0 .. 19
[10:15:13.861] <TB3> INFO: Test took 21167ms.
[10:15:13.900] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:13.900] <TB3> INFO: dacScan step from 20 .. 39
[10:15:36.095] <TB3> INFO: Test took 22195ms.
[10:15:36.155] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:36.159] <TB3> INFO: dacScan step from 40 .. 59
[10:16:06.819] <TB3> INFO: Test took 30660ms.
[10:16:07.083] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:07.124] <TB3> INFO: dacScan step from 60 .. 79
[10:16:37.832] <TB3> INFO: Test took 30708ms.
[10:16:38.142] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:38.190] <TB3> INFO: dacScan step from 80 .. 99
[10:17:10.980] <TB3> INFO: Test took 32790ms.
[10:17:11.266] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:11.319] <TB3> INFO: dacScan step from 100 .. 119
[10:17:43.347] <TB3> INFO: Test took 32028ms.
[10:17:43.642] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:43.701] <TB3> INFO: dacScan step from 120 .. 139
[10:18:15.998] <TB3> INFO: Test took 32297ms.
[10:18:16.272] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:16.326] <TB3> INFO: dacScan step from 140 .. 159
[10:18:49.277] <TB3> INFO: Test took 32951ms.
[10:18:49.551] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:49.600] <TB3> INFO: dacScan step from 160 .. 179
[10:19:22.414] <TB3> INFO: Test took 32813ms.
[10:19:22.715] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:22.764] <TB3> INFO: dacScan step from 180 .. 199
[10:19:54.235] <TB3> INFO: Test took 31471ms.
[10:19:54.686] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:20.150] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[10:20:20.158] <TB3> INFO: dacScan step from 0 .. 19
[10:20:42.591] <TB3> INFO: Test took 22433ms.
[10:20:42.632] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:42.632] <TB3> INFO: dacScan step from 20 .. 39
[10:21:06.520] <TB3> INFO: Test took 23876ms.
[10:21:06.615] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:06.625] <TB3> INFO: dacScan step from 40 .. 59



[10:21:38.629] <TB3> INFO: Test took 32004ms.
[10:21:38.932] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:38.977] <TB3> INFO: dacScan step from 60 .. 76
[10:22:05.260] <TB3> INFO: Test took 26282ms.
[10:22:05.513] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:22.131] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 71 (20) hits flags = 16 (plus default)
[10:22:22.139] <TB3> INFO: dacScan step from 0 .. 19
[10:22:44.233] <TB3> INFO: Test took 22094ms.
[10:22:44.272] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:44.272] <TB3> INFO: dacScan step from 20 .. 39
[10:23:09.516] <TB3> INFO: Test took 25243ms.
[10:23:09.659] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:09.675] <TB3> INFO: dacScan step from 40 .. 59




[10:23:42.290] <TB3> INFO: Test took 32615ms.
[10:23:42.725] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:42.783] <TB3> INFO: dacScan step from 60 .. 71
[10:24:02.546] <TB3> INFO: Test took 19763ms.
[10:24:02.715] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:18.584] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 67 (20) hits flags = 16 (plus default)
[10:24:18.592] <TB3> INFO: dacScan step from 0 .. 19
[10:24:39.973] <TB3> INFO: Test took 21380ms.
[10:24:40.012] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:40.012] <TB3> INFO: dacScan step from 20 .. 39
[10:25:06.226] <TB3> INFO: Test took 26214ms.
[10:25:06.406] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:06.430] <TB3> INFO: dacScan step from 40 .. 59




[10:25:38.619] <TB3> INFO: Test took 32189ms.
[10:25:38.908] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:38.959] <TB3> INFO: dacScan step from 60 .. 67
[10:25:52.727] <TB3> INFO: Test took 13768ms.
[10:25:52.845] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:09.001] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 64 (20) hits flags = 16 (plus default)
[10:26:09.014] <TB3> INFO: dacScan step from 0 .. 19
[10:26:31.630] <TB3> INFO: Test took 22615ms.
[10:26:31.672] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:31.673] <TB3> INFO: dacScan step from 20 .. 39
[10:26:58.753] <TB3> INFO: Test took 27080ms.
[10:26:58.976] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:59.004] <TB3> INFO: dacScan step from 40 .. 59



[10:27:30.487] <TB3> INFO: Test took 31483ms.
[10:27:30.768] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:30.823] <TB3> INFO: dacScan step from 60 .. 64
[10:27:40.956] <TB3> INFO: Test took 10133ms.
[10:27:41.040] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:57.476] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:27:57.478] <TB3> INFO: PixTestTrim::doTest() done, duration: 2028 seconds
[10:27:58.221] <TB3> INFO: ######################################################################
[10:27:58.221] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:27:58.221] <TB3> INFO: ######################################################################
[10:28:01.661] <TB3> INFO: Test took 3438ms.
[10:28:01.687] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:05.308] <TB3> INFO: Test took 3423ms.
[10:28:05.393] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:08.849] <TB3> INFO: Test took 3446ms.
[10:28:08.921] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:08.928] <TB3> INFO: The DUT currently contains the following objects:
[10:28:08.928] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:08.928] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:08.928] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:08.928] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:08.928] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.928] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.928] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.928] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.928] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.928] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:08.929] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.040] <TB3> INFO: Test took 1111ms.
[10:28:10.041] <TB3> INFO: The DUT currently contains the following objects:
[10:28:10.042] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:10.042] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:10.042] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:10.042] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:10.042] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:10.042] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.150] <TB3> INFO: Test took 1108ms.
[10:28:11.151] <TB3> INFO: The DUT currently contains the following objects:
[10:28:11.152] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:11.152] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:11.152] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:11.152] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:11.152] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:11.152] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.262] <TB3> INFO: Test took 1110ms.
[10:28:12.263] <TB3> INFO: The DUT currently contains the following objects:
[10:28:12.263] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:12.263] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:12.263] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:12.263] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:12.263] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.263] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.264] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.264] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.264] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.264] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:12.264] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.373] <TB3> INFO: Test took 1109ms.
[10:28:13.374] <TB3> INFO: The DUT currently contains the following objects:
[10:28:13.374] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:13.374] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:13.374] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:13.374] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:13.374] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.374] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.375] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.375] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.375] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:13.375] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.483] <TB3> INFO: Test took 1108ms.
[10:28:14.485] <TB3> INFO: The DUT currently contains the following objects:
[10:28:14.485] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:14.485] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:14.485] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:14.485] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:14.485] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.485] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:14.486] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.595] <TB3> INFO: Test took 1109ms.
[10:28:15.597] <TB3> INFO: The DUT currently contains the following objects:
[10:28:15.597] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:15.597] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:15.597] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:15.597] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:15.597] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:15.597] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.704] <TB3> INFO: Test took 1107ms.
[10:28:16.706] <TB3> INFO: The DUT currently contains the following objects:
[10:28:16.706] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:16.706] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:16.706] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:16.706] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:16.706] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:16.706] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.813] <TB3> INFO: Test took 1107ms.
[10:28:17.814] <TB3> INFO: The DUT currently contains the following objects:
[10:28:17.814] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:17.814] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:17.814] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:17.814] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:17.814] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.814] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.814] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.814] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.814] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.814] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:17.815] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.921] <TB3> INFO: Test took 1106ms.
[10:28:18.922] <TB3> INFO: The DUT currently contains the following objects:
[10:28:18.922] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:18.922] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:18.922] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:18.922] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:18.922] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.922] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.922] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:18.923] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.026] <TB3> INFO: Test took 1103ms.
[10:28:20.027] <TB3> INFO: The DUT currently contains the following objects:
[10:28:20.027] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:20.027] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:20.027] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:20.027] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:20.027] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:20.027] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: Test took 1103ms.
[10:28:21.130] <TB3> INFO: The DUT currently contains the following objects:
[10:28:21.130] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:21.130] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:21.130] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:21.130] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:21.130] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:21.130] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.233] <TB3> INFO: Test took 1103ms.
[10:28:22.234] <TB3> INFO: The DUT currently contains the following objects:
[10:28:22.234] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:22.234] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:22.234] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:22.234] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:22.234] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:22.234] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.336] <TB3> INFO: Test took 1102ms.
[10:28:23.337] <TB3> INFO: The DUT currently contains the following objects:
[10:28:23.337] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:23.337] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:23.337] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:23.337] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:23.337] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:23.337] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: Test took 1102ms.
[10:28:24.439] <TB3> INFO: The DUT currently contains the following objects:
[10:28:24.439] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:24.439] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:24.439] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:24.439] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:24.439] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.439] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:24.440] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: Test took 1101ms.
[10:28:25.541] <TB3> INFO: The DUT currently contains the following objects:
[10:28:25.541] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[10:28:25.541] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:28:25.541] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:28:25.541] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:28:25.541] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:25.541] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:28:26.643] <TB3> INFO: Test took 1102ms.
[10:28:26.646] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:32:10.334] <TB3> INFO: Test took 223688ms.
[10:32:12.052] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:53.522] <TB3> INFO: Test took 221470ms.
[10:35:55.289] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.296] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.304] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.313] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.322] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.330] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.339] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.348] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.357] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.365] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.374] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.383] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.391] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.400] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:35:55.408] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[10:35:55.417] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[10:35:55.425] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.434] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.441] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:35:55.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:35:55.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:35:55.488] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:35:55.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:35:55.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:35:55.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:35:55.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:35:55.489] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:35:55.490] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:35:55.490] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:35:55.494] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:35:55.494] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:35:55.495] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:35:55.495] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:35:55.496] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:35:55.496] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:35:58.971] <TB3> INFO: Test took 3471ms.
[10:36:02.728] <TB3> INFO: Test took 3478ms.
[10:36:06.494] <TB3> INFO: Test took 3468ms.
[10:36:06.766] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:07.685] <TB3> INFO: Test took 919ms.
[10:36:07.688] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:08.798] <TB3> INFO: Test took 1110ms.
[10:36:08.801] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:09.909] <TB3> INFO: Test took 1108ms.
[10:36:09.912] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:11.019] <TB3> INFO: Test took 1107ms.
[10:36:11.023] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:12.131] <TB3> INFO: Test took 1108ms.
[10:36:12.135] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:13.242] <TB3> INFO: Test took 1108ms.
[10:36:13.246] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:14.350] <TB3> INFO: Test took 1105ms.
[10:36:14.352] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:15.461] <TB3> INFO: Test took 1109ms.
[10:36:15.464] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:16.572] <TB3> INFO: Test took 1108ms.
[10:36:16.575] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:17.682] <TB3> INFO: Test took 1107ms.
[10:36:17.686] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:18.793] <TB3> INFO: Test took 1107ms.
[10:36:18.797] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:19.903] <TB3> INFO: Test took 1106ms.
[10:36:19.905] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:21.015] <TB3> INFO: Test took 1110ms.
[10:36:21.019] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:22.129] <TB3> INFO: Test took 1110ms.
[10:36:22.134] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:23.241] <TB3> INFO: Test took 1107ms.
[10:36:23.244] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:24.354] <TB3> INFO: Test took 1110ms.
[10:36:24.358] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:25.467] <TB3> INFO: Test took 1109ms.
[10:36:25.471] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:26.580] <TB3> INFO: Test took 1110ms.
[10:36:26.584] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:27.692] <TB3> INFO: Test took 1108ms.
[10:36:27.697] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:28.804] <TB3> INFO: Test took 1108ms.
[10:36:28.808] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:29.915] <TB3> INFO: Test took 1108ms.
[10:36:29.919] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:31.026] <TB3> INFO: Test took 1109ms.
[10:36:31.030] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:32.137] <TB3> INFO: Test took 1107ms.
[10:36:32.141] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:33.248] <TB3> INFO: Test took 1107ms.
[10:36:33.252] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:34.361] <TB3> INFO: Test took 1109ms.
[10:36:34.365] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:35.472] <TB3> INFO: Test took 1107ms.
[10:36:35.476] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:36.584] <TB3> INFO: Test took 1108ms.
[10:36:36.588] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:37.695] <TB3> INFO: Test took 1108ms.
[10:36:37.699] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:38.806] <TB3> INFO: Test took 1108ms.
[10:36:38.810] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:39.919] <TB3> INFO: Test took 1109ms.
[10:36:39.924] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:41.032] <TB3> INFO: Test took 1109ms.
[10:36:41.036] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:36:42.143] <TB3> INFO: Test took 1107ms.
[10:36:42.691] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[10:36:42.692] <TB3> INFO: PH scale (per ROC): 96 85 96 76 100 86 84 81 91 91 83 80 97 86 80 81
[10:36:42.692] <TB3> INFO: PH offset (per ROC): 151 155 150 159 143 144 140 153 169 150 143 146 144 147 167 145
[10:36:42.893] <TB3> INFO: ######################################################################
[10:36:42.893] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:36:42.893] <TB3> INFO: ######################################################################
[10:36:42.903] <TB3> INFO: scanning low vcal = 50
[10:36:47.268] <TB3> INFO: Test took 4364ms.
[10:36:47.336] <TB3> INFO: scanning low vcal = 100
[10:36:51.680] <TB3> INFO: Test took 4344ms.
[10:36:51.744] <TB3> INFO: scanning low vcal = 150
[10:36:56.097] <TB3> INFO: Test took 4353ms.
[10:36:56.161] <TB3> INFO: scanning low vcal = 200
[10:37:00.538] <TB3> INFO: Test took 4377ms.
[10:37:00.606] <TB3> INFO: scanning low vcal = 250
[10:37:04.824] <TB3> INFO: Test took 4218ms.
[10:37:04.880] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[10:37:09.113] <TB3> INFO: Test took 4233ms.
[10:37:09.188] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[10:37:13.433] <TB3> INFO: Test took 4245ms.
[10:37:13.487] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[10:37:17.680] <TB3> INFO: Test took 4193ms.
[10:37:17.736] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[10:37:21.943] <TB3> INFO: Test took 4207ms.
[10:37:22.003] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:37:26.212] <TB3> INFO: Test took 4209ms.
[10:37:26.551] <TB3> INFO: PixTestGainPedestal::measure() done
[10:37:50.418] <TB3> INFO: PixTestGainPedestal::fit() done
[10:37:50.418] <TB3> INFO: non-linearity mean: 0.957 0.953 0.956 0.943 0.956 0.956 0.953 0.957 0.956 0.953 0.954 0.953 0.960 0.950 0.957 0.958
[10:37:50.418] <TB3> INFO: non-linearity RMS: 0.005 0.006 0.005 0.007 0.005 0.005 0.005 0.005 0.005 0.005 0.005 0.007 0.004 0.005 0.006 0.005
[10:37:50.418] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:37:50.438] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:37:50.457] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:37:50.477] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:37:50.495] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:37:50.514] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:37:50.533] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:37:50.552] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:37:50.571] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:37:50.590] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:37:50.609] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:37:50.628] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:37:50.648] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:37:50.667] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:37:50.686] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:37:50.705] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:37:50.724] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 67 seconds
[10:37:50.730] <TB3> INFO: enter test to run
[10:37:50.730] <TB3> INFO: test: exit no parameter change
[10:37:51.231] <TB3> QUIET: Connection to board 170 closed.
[10:37:51.310] <TB3> INFO: pXar: this is the end, my friend