[20:13:58.357] <TB0> INFO: *** Welcome to pxar ***
[20:13:58.357] <TB0> INFO: *** Today: 2015/10/29
[20:13:58.368] <TB0> INFO: *** Version: 9da6-dirty
[20:13:58.368] <TB0> INFO: readRocDacs: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C15.dat
[20:13:58.368] <TB0> INFO: readTbmDacs: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//tbmParameters_C0a.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//tbmParameters_C0b.dat
[20:13:58.368] <TB0> INFO: readMaskFile: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//defaultMaskFile.dat
[20:13:58.368] <TB0> INFO: readTrimFile: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters_C15.dat
[20:13:58.473] <TB0> INFO: clk: 4
[20:13:58.473] <TB0> INFO: ctr: 4
[20:13:58.473] <TB0> INFO: sda: 19
[20:13:58.473] <TB0> INFO: tin: 9
[20:13:58.473] <TB0> INFO: level: 15
[20:13:58.473] <TB0> INFO: triggerdelay: 0
[20:13:58.473] <TB0> QUIET: Instanciating API for pxar prod-11
[20:13:58.473] <TB0> INFO: Log level: INFO
[20:13:58.482] <TB0> INFO: Found DTB DTB_WWVBIQ
[20:13:58.489] <TB0> QUIET: Connection to board DTB_WWVBIQ opened.
[20:13:58.492] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 127
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WWVBIQ
MAC address: 40D85511807F
Hostname: pixelDTB127
Comment:
------------------------------------------------------
[20:13:58.498] <TB0> INFO: RPC call hashes of host and DTB match: 397073690
[20:14:00.186] <TB0> INFO: DUT info:
[20:14:00.186] <TB0> INFO: The DUT currently contains the following objects:
[20:14:00.186] <TB0> INFO: 2 TBM Cores tbm08c (2 ON)
[20:14:00.186] <TB0> INFO: TBM Core alpha (0): 7 registers set
[20:14:00.186] <TB0> INFO: TBM Core beta (1): 7 registers set
[20:14:00.186] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[20:14:00.186] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.186] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.187] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.187] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.187] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:14:00.589] <TB0> INFO: enter 'restricted' command line mode
[20:14:00.589] <TB0> INFO: enter test to run
[20:14:00.589] <TB0> INFO: test: FullTest no parameter change
[20:14:00.589] <TB0> INFO: running: fulltest
[20:14:00.593] <TB0> INFO: ######################################################################
[20:14:00.593] <TB0> INFO: PixTestFullTest::doTest()
[20:14:00.593] <TB0> INFO: ######################################################################
[20:14:00.601] <TB0> INFO: ######################################################################
[20:14:00.602] <TB0> INFO: PixTestPretest::doTest()
[20:14:00.602] <TB0> INFO: ######################################################################
[20:14:00.604] <TB0> INFO: ----------------------------------------------------------------------
[20:14:00.604] <TB0> INFO: PixTestPretest::programROC()
[20:14:00.604] <TB0> INFO: ----------------------------------------------------------------------
[20:14:18.624] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:14:18.624] <TB0> INFO: IA differences per ROC: 16.1 16.1 18.5 16.9 16.1 15.3 16.1 15.3 19.3 15.3 17.7 16.9 18.5 17.7 16.9 16.9
[20:14:18.722] <TB0> INFO: ----------------------------------------------------------------------
[20:14:18.723] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:14:18.723] <TB0> INFO: ----------------------------------------------------------------------
[20:14:38.345] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 381.9 mA = 23.8688 mA/ROC
[20:14:38.347] <TB0> INFO: ----------------------------------------------------------------------
[20:14:38.347] <TB0> INFO: PixTestPretest::findTiming()
[20:14:38.347] <TB0> INFO: ----------------------------------------------------------------------
[20:14:38.347] <TB0> INFO: PixTestCmd::init()

[20:16:24.777] <TB0> INFO: TBM phases: 160MHz: 4, 400MHz: 2, TBM delays: ROC(0/1):2, header/trailer: 1, token: 0
[20:16:24.777] <TB0> INFO: (success/tries = 100/100), width = 2
[20:16:24.779] <TB0> INFO: ----------------------------------------------------------------------
[20:16:24.779] <TB0> INFO: PixTestPretest::findWorkingPixel()
[20:16:24.779] <TB0> INFO: ----------------------------------------------------------------------
[20:16:24.926] <TB0> INFO: Expecting 231680 events.


[20:16:32.580] <TB0> INFO: 231680 events read in total (6939ms).
[20:16:32.591] <TB0> INFO: Test took 7806ms.
[20:16:32.964] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:16:32.998] <TB0> INFO: ----------------------------------------------------------------------
[20:16:32.998] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[20:16:32.998] <TB0> INFO: ----------------------------------------------------------------------
[20:16:33.153] <TB0> INFO: Expecting 231680 events.
[20:16:41.019] <TB0> INFO: 231680 events read in total (7149ms).
[20:16:41.033] <TB0> INFO: Test took 8024ms.
[20:16:41.408] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[20:16:41.408] <TB0> INFO: CalDel: 93 115 144 123 114 83 111 111 117 132 114 116 127 128 122 103
[20:16:41.408] <TB0> INFO: VthrComp: 52 53 57 53 52 53 51 52 51 53 51 53 56 55 51 63
[20:16:41.415] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C0.dat
[20:16:41.417] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C1.dat
[20:16:41.418] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C2.dat
[20:16:41.421] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C3.dat
[20:16:41.421] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C4.dat
[20:16:41.421] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C5.dat
[20:16:41.424] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C6.dat
[20:16:41.424] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C7.dat
[20:16:41.425] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C8.dat
[20:16:41.425] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C9.dat
[20:16:41.425] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C10.dat
[20:16:41.426] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C11.dat
[20:16:41.426] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C12.dat
[20:16:41.426] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C13.dat
[20:16:41.427] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C14.dat
[20:16:41.427] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters_C15.dat
[20:16:41.427] <TB0> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//tbmParameters_C0a.dat
[20:16:41.430] <TB0> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//tbmParameters_C0b.dat
[20:16:41.431] <TB0> INFO: PixTestPretest::doTest() done, duration: 160 seconds
[20:16:41.431] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:16:41.431] <TB0> INFO: Decoding statistics:
[20:16:41.431] <TB0> INFO: General information:
[20:16:41.431] <TB0> INFO: 16bit words read: 7138946
[20:16:41.431] <TB0> INFO: valid events total: 463360
[20:16:41.431] <TB0> INFO: empty events: 272708
[20:16:41.431] <TB0> INFO: valid events with pixels: 190652
[20:16:41.431] <TB0> INFO: valid pixel hits: 789313
[20:16:41.431] <TB0> INFO: Event errors: 0
[20:16:41.431] <TB0> INFO: start marker: 0
[20:16:41.432] <TB0> INFO: stop marker: 0
[20:16:41.432] <TB0> INFO: overflow: 0
[20:16:41.432] <TB0> INFO: invalid 5bit words: 0
[20:16:41.432] <TB0> INFO: invalid XOR eye diagram: 0
[20:16:41.432] <TB0> INFO: TBM errors: 0
[20:16:41.432] <TB0> INFO: flawed TBM headers: 0
[20:16:41.432] <TB0> INFO: flawed TBM trailers: 0
[20:16:41.432] <TB0> INFO: event ID mismatches: 0
[20:16:41.432] <TB0> INFO: ROC errors: 0
[20:16:41.432] <TB0> INFO: missing ROC header(s): 0
[20:16:41.432] <TB0> INFO: misplaced readback start: 0
[20:16:41.432] <TB0> INFO: Pixel decoding errors: 0
[20:16:41.432] <TB0> INFO: pixel data incomplete: 0
[20:16:41.432] <TB0> INFO: pixel address: 0
[20:16:41.432] <TB0> INFO: pulse height fill bit: 0
[20:16:41.433] <TB0> INFO: buffer corruption: 0
[20:16:41.547] <TB0> INFO: ######################################################################
[20:16:41.548] <TB0> INFO: PixTestAlive::doTest()
[20:16:41.548] <TB0> INFO: ######################################################################
[20:16:41.550] <TB0> INFO: ----------------------------------------------------------------------
[20:16:41.550] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:16:41.550] <TB0> INFO: ----------------------------------------------------------------------
[20:16:42.035] <TB0> INFO: Expecting 41600 events.
[20:16:46.656] <TB0> INFO: 41600 events read in total (3904ms).
[20:16:46.658] <TB0> INFO: Test took 5105ms.
[20:16:46.672] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:16:47.029] <TB0> INFO: PixTestAlive::aliveTest() done
[20:16:47.029] <TB0> INFO: number of dead pixels (per ROC): 2 3 0 3 0 0 3 0 0 1 0 0 1 0 1 2
[20:16:47.033] <TB0> INFO: ----------------------------------------------------------------------
[20:16:47.033] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:16:47.033] <TB0> INFO: ----------------------------------------------------------------------
[20:16:47.435] <TB0> INFO: Expecting 41600 events.
[20:16:50.622] <TB0> INFO: 41600 events read in total (2464ms).
[20:16:50.622] <TB0> INFO: Test took 3587ms.
[20:16:50.622] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:16:50.623] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:16:51.029] <TB0> INFO: PixTestAlive::maskTest() done
[20:16:51.029] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:16:51.031] <TB0> INFO: ----------------------------------------------------------------------
[20:16:51.031] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:16:51.031] <TB0> INFO: ----------------------------------------------------------------------
[20:16:51.588] <TB0> INFO: Expecting 41600 events.
[20:16:56.134] <TB0> INFO: 41600 events read in total (3831ms).
[20:16:56.136] <TB0> INFO: Test took 5100ms.
[20:16:56.149] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:16:56.502] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[20:16:56.502] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:16:56.503] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[20:16:56.503] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:16:56.503] <TB0> INFO: Decoding statistics:
[20:16:56.503] <TB0> INFO: General information:
[20:16:56.503] <TB0> INFO: 16bit words read: 0
[20:16:56.503] <TB0> INFO: valid events total: 0
[20:16:56.503] <TB0> INFO: empty events: 0
[20:16:56.503] <TB0> INFO: valid events with pixels: 0
[20:16:56.503] <TB0> INFO: valid pixel hits: 0
[20:16:56.503] <TB0> INFO: Event errors: 0
[20:16:56.503] <TB0> INFO: start marker: 0
[20:16:56.503] <TB0> INFO: stop marker: 0
[20:16:56.503] <TB0> INFO: overflow: 0
[20:16:56.503] <TB0> INFO: invalid 5bit words: 0
[20:16:56.503] <TB0> INFO: invalid XOR eye diagram: 0
[20:16:56.503] <TB0> INFO: TBM errors: 0
[20:16:56.503] <TB0> INFO: flawed TBM headers: 0
[20:16:56.503] <TB0> INFO: flawed TBM trailers: 0
[20:16:56.503] <TB0> INFO: event ID mismatches: 0
[20:16:56.503] <TB0> INFO: ROC errors: 0
[20:16:56.503] <TB0> INFO: missing ROC header(s): 0
[20:16:56.503] <TB0> INFO: misplaced readback start: 0
[20:16:56.503] <TB0> INFO: Pixel decoding errors: 0
[20:16:56.503] <TB0> INFO: pixel data incomplete: 0
[20:16:56.503] <TB0> INFO: pixel address: 0
[20:16:56.503] <TB0> INFO: pulse height fill bit: 0
[20:16:56.503] <TB0> INFO: buffer corruption: 0
[20:16:56.523] <TB0> INFO: ######################################################################
[20:16:56.524] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:16:56.524] <TB0> INFO: ######################################################################
[20:16:56.529] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:16:56.556] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:16:56.556] <TB0> INFO: run 1 of 1
[20:16:57.008] <TB0> INFO: Expecting 3120000 events.
[20:17:50.741] <TB0> INFO: 1295585 events read in total (53018ms).
[20:18:43.057] <TB0> INFO: 2572135 events read in total (105334ms).
[20:19:05.694] <TB0> INFO: 3120000 events read in total (127971ms).
[20:19:05.805] <TB0> INFO: Test took 129260ms.
[20:19:05.991] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:20:14.305] <TB0> INFO: PixTestBBMap::doTest() done, duration: 197 seconds
[20:20:14.305] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:20:14.305] <TB0> INFO: separation cut (per ROC): 146 145 143 140 135 147 137 143 145 138 136 143 140 145 135 157
[20:20:14.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:20:14.310] <TB0> INFO: Decoding statistics:
[20:20:14.310] <TB0> INFO: General information:
[20:20:14.310] <TB0> INFO: 16bit words read: 0
[20:20:14.314] <TB0> INFO: valid events total: 0
[20:20:14.314] <TB0> INFO: empty events: 0
[20:20:14.332] <TB0> INFO: valid events with pixels: 0
[20:20:14.332] <TB0> INFO: valid pixel hits: 0
[20:20:14.332] <TB0> INFO: Event errors: 0
[20:20:14.332] <TB0> INFO: start marker: 0
[20:20:14.332] <TB0> INFO: stop marker: 0
[20:20:14.332] <TB0> INFO: overflow: 0
[20:20:14.332] <TB0> INFO: invalid 5bit words: 0
[20:20:14.332] <TB0> INFO: invalid XOR eye diagram: 0
[20:20:14.332] <TB0> INFO: TBM errors: 0
[20:20:14.332] <TB0> INFO: flawed TBM headers: 0
[20:20:14.332] <TB0> INFO: flawed TBM trailers: 0
[20:20:14.332] <TB0> INFO: event ID mismatches: 0
[20:20:14.332] <TB0> INFO: ROC errors: 0
[20:20:14.332] <TB0> INFO: missing ROC header(s): 0
[20:20:14.332] <TB0> INFO: misplaced readback start: 0
[20:20:14.332] <TB0> INFO: Pixel decoding errors: 0
[20:20:14.332] <TB0> INFO: pixel data incomplete: 0
[20:20:14.332] <TB0> INFO: pixel address: 0
[20:20:14.332] <TB0> INFO: pulse height fill bit: 0
[20:20:14.337] <TB0> INFO: buffer corruption: 0
[20:20:14.605] <TB0> INFO: ######################################################################
[20:20:14.605] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:20:14.605] <TB0> INFO: ######################################################################
[20:20:14.605] <TB0> INFO: ----------------------------------------------------------------------
[20:20:14.605] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:20:14.606] <TB0> INFO: ----------------------------------------------------------------------
[20:20:14.606] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:20:14.645] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[20:20:14.664] <TB0> INFO: run 1 of 1
[20:20:15.125] <TB0> INFO: Expecting 26208000 events.
[20:21:01.355] <TB0> INFO: 1409850 events read in total (45499ms).
[20:21:43.428] <TB0> INFO: 2783450 events read in total (87572ms).
[20:22:24.115] <TB0> INFO: 4153050 events read in total (128259ms).
[20:23:04.884] <TB0> INFO: 5516100 events read in total (169028ms).
[20:23:45.545] <TB0> INFO: 6875000 events read in total (209689ms).
[20:24:26.178] <TB0> INFO: 8233450 events read in total (250322ms).
[20:25:06.744] <TB0> INFO: 9591700 events read in total (290888ms).
[20:25:46.981] <TB0> INFO: 10936200 events read in total (331125ms).
[20:26:27.056] <TB0> INFO: 12283600 events read in total (371200ms).
[20:27:06.686] <TB0> INFO: 13609950 events read in total (410830ms).
[20:27:46.137] <TB0> INFO: 14920150 events read in total (450281ms).
[20:28:29.615] <TB0> INFO: 16232650 events read in total (493759ms).
[20:29:09.011] <TB0> INFO: 17537850 events read in total (533155ms).
[20:29:48.190] <TB0> INFO: 18844000 events read in total (572334ms).
[20:30:27.345] <TB0> INFO: 20146300 events read in total (611489ms).
[20:31:05.971] <TB0> INFO: 21444250 events read in total (650115ms).
[20:31:44.638] <TB0> INFO: 22742700 events read in total (688782ms).
[20:32:23.499] <TB0> INFO: 24044350 events read in total (727643ms).
[20:33:02.284] <TB0> INFO: 25345050 events read in total (766428ms).
[20:33:27.956] <TB0> INFO: 26208000 events read in total (792100ms).
[20:33:28.026] <TB0> INFO: Test took 793361ms.
[20:33:28.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:33:28.421] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:31.358] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:34.341] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:37.327] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:40.535] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:43.688] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:46.714] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:49.883] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:53.023] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:56.014] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:33:58.798] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:02.282] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:06.032] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:09.496] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:12.585] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:15.529] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:34:18.585] <TB0> INFO: PixTestScurves::scurves() done
[20:34:18.585] <TB0> INFO: Vcal mean: 115.96 120.54 122.46 118.19 115.27 124.74 114.94 119.52 119.02 117.60 121.64 117.68 124.54 124.12 116.01 127.99
[20:34:18.586] <TB0> INFO: Vcal RMS: 5.89 7.32 9.38 7.20 5.32 6.03 6.32 6.39 6.01 6.03 6.02 5.89 6.41 7.29 5.88 7.51
[20:34:18.590] <TB0> INFO: PixTestScurves::fullTest() done, duration: 843 seconds
[20:34:18.590] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:34:18.590] <TB0> INFO: Decoding statistics:
[20:34:18.590] <TB0> INFO: General information:
[20:34:18.590] <TB0> INFO: 16bit words read: 0
[20:34:18.590] <TB0> INFO: valid events total: 0
[20:34:18.590] <TB0> INFO: empty events: 0
[20:34:18.590] <TB0> INFO: valid events with pixels: 0
[20:34:18.590] <TB0> INFO: valid pixel hits: 0
[20:34:18.590] <TB0> INFO: Event errors: 0
[20:34:18.590] <TB0> INFO: start marker: 0
[20:34:18.590] <TB0> INFO: stop marker: 0
[20:34:18.590] <TB0> INFO: overflow: 0
[20:34:18.590] <TB0> INFO: invalid 5bit words: 0
[20:34:18.590] <TB0> INFO: invalid XOR eye diagram: 0
[20:34:18.590] <TB0> INFO: TBM errors: 0
[20:34:18.590] <TB0> INFO: flawed TBM headers: 0
[20:34:18.590] <TB0> INFO: flawed TBM trailers: 0
[20:34:18.590] <TB0> INFO: event ID mismatches: 0
[20:34:18.590] <TB0> INFO: ROC errors: 0
[20:34:18.591] <TB0> INFO: missing ROC header(s): 0
[20:34:18.591] <TB0> INFO: misplaced readback start: 0
[20:34:18.591] <TB0> INFO: Pixel decoding errors: 0
[20:34:18.591] <TB0> INFO: pixel data incomplete: 0
[20:34:18.591] <TB0> INFO: pixel address: 0
[20:34:18.591] <TB0> INFO: pulse height fill bit: 0
[20:34:18.591] <TB0> INFO: buffer corruption: 0
[20:34:18.841] <TB0> INFO: ######################################################################
[20:34:18.842] <TB0> INFO: PixTestTrim::doTest()
[20:34:18.842] <TB0> INFO: ######################################################################
[20:34:18.858] <TB0> INFO: ----------------------------------------------------------------------
[20:34:18.858] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[20:34:18.858] <TB0> INFO: ----------------------------------------------------------------------
[20:34:19.024] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:34:19.024] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:34:19.046] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:34:19.046] <TB0> INFO: run 1 of 1
[20:34:19.517] <TB0> INFO: Expecting 5025280 events.
[20:35:11.460] <TB0> INFO: 1477880 events read in total (51227ms).
[20:36:00.634] <TB0> INFO: 2944112 events read in total (100401ms).
[20:36:50.197] <TB0> INFO: 4396568 events read in total (149965ms).
[20:37:13.372] <TB0> INFO: 5025280 events read in total (173139ms).
[20:37:13.508] <TB0> INFO: Test took 174457ms.
[20:37:13.681] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:37:58.004] <TB0> INFO: ROC 0 VthrComp = 112
[20:37:58.004] <TB0> INFO: ROC 1 VthrComp = 111
[20:37:58.004] <TB0> INFO: ROC 2 VthrComp = 110
[20:37:58.004] <TB0> INFO: ROC 3 VthrComp = 108
[20:37:58.004] <TB0> INFO: ROC 4 VthrComp = 108
[20:37:58.004] <TB0> INFO: ROC 5 VthrComp = 110
[20:37:58.004] <TB0> INFO: ROC 6 VthrComp = 109
[20:37:58.005] <TB0> INFO: ROC 7 VthrComp = 110
[20:37:58.005] <TB0> INFO: ROC 8 VthrComp = 112
[20:37:58.005] <TB0> INFO: ROC 9 VthrComp = 109
[20:37:58.005] <TB0> INFO: ROC 10 VthrComp = 109
[20:37:58.005] <TB0> INFO: ROC 11 VthrComp = 111
[20:37:58.005] <TB0> INFO: ROC 12 VthrComp = 110
[20:37:58.005] <TB0> INFO: ROC 13 VthrComp = 113
[20:37:58.005] <TB0> INFO: ROC 14 VthrComp = 106
[20:37:58.005] <TB0> INFO: ROC 15 VthrComp = 85
[20:37:58.006] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:37:58.006] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:37:58.037] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:37:58.037] <TB0> INFO: run 1 of 1
[20:37:58.399] <TB0> INFO: Expecting 5025280 events.
[20:38:46.802] <TB0> INFO: 922328 events read in total (47687ms).
[20:39:27.141] <TB0> INFO: 1842832 events read in total (88026ms).
[20:40:08.109] <TB0> INFO: 2758976 events read in total (128995ms).
[20:40:48.549] <TB0> INFO: 3661640 events read in total (169435ms).
[20:41:29.057] <TB0> INFO: 4559704 events read in total (209942ms).
[20:41:50.258] <TB0> INFO: 5025280 events read in total (231143ms).
[20:41:50.444] <TB0> INFO: Test took 232407ms.
[20:41:50.740] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:42:58.302] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 63.8502 for pixel 24/1 mean/min/max = 49.7912/35.6744/63.9079
[20:42:58.303] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 69.1363 for pixel 3/75 mean/min/max = 53.0267/36.7909/69.2626
[20:42:58.308] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 75.7671 for pixel 0/5 mean/min/max = 55.9706/36.0471/75.8942
[20:42:58.309] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 67.9765 for pixel 5/72 mean/min/max = 52.1465/35.5526/68.7403
[20:42:58.310] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 63.4242 for pixel 6/3 mean/min/max = 49.2932/35.1566/63.4299
[20:42:58.312] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 76.6863 for pixel 20/2 mean/min/max = 59.5514/42.2636/76.8393
[20:42:58.313] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 65.6533 for pixel 0/59 mean/min/max = 50.3611/34.8765/65.8457
[20:42:58.314] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 69.4129 for pixel 2/79 mean/min/max = 53.0216/36.4812/69.5619
[20:42:58.316] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 65.5397 for pixel 0/14 mean/min/max = 50.5388/35.3912/65.6863
[20:42:58.317] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 66.936 for pixel 3/1 mean/min/max = 51.0299/35.1204/66.9394
[20:42:58.318] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 67.7144 for pixel 10/78 mean/min/max = 51.7622/35.481/68.0433
[20:42:58.320] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 67.6509 for pixel 18/12 mean/min/max = 51.4851/35.1766/67.7935
[20:42:58.324] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 72.7002 for pixel 0/71 mean/min/max = 55.2962/37.7317/72.8608
[20:42:58.325] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 72.0604 for pixel 0/74 mean/min/max = 54.5491/36.8072/72.291
[20:42:58.326] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 64.9405 for pixel 8/3 mean/min/max = 50.0437/35.0483/65.0391
[20:42:58.328] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 113.898 for pixel 0/73 mean/min/max = 96.1335/76.9015/115.365
[20:42:58.329] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:42:58.470] <TB0> INFO: Expecting 411648 events.
[20:43:07.854] <TB0> INFO: 411648 events read in total (8666ms).
[20:43:07.898] <TB0> INFO: Expecting 411648 events.
[20:43:16.952] <TB0> INFO: 411648 events read in total (8498ms).
[20:43:16.999] <TB0> INFO: Expecting 411648 events.
[20:43:26.329] <TB0> INFO: 411648 events read in total (8804ms).
[20:43:26.357] <TB0> INFO: Expecting 411648 events.
[20:43:37.107] <TB0> INFO: 411648 events read in total (10136ms).
[20:43:37.135] <TB0> INFO: Expecting 411648 events.
[20:43:46.531] <TB0> INFO: 411648 events read in total (8845ms).
[20:43:46.580] <TB0> INFO: Expecting 411648 events.
[20:43:55.343] <TB0> INFO: 411648 events read in total (8192ms).
[20:43:55.377] <TB0> INFO: Expecting 411648 events.
[20:44:04.934] <TB0> INFO: 411648 events read in total (8948ms).
[20:44:05.010] <TB0> INFO: Expecting 411648 events.
[20:44:13.659] <TB0> INFO: 411648 events read in total (8081ms).
[20:44:13.708] <TB0> INFO: Expecting 411648 events.
[20:44:22.383] <TB0> INFO: 411648 events read in total (8068ms).
[20:44:22.442] <TB0> INFO: Expecting 411648 events.
[20:44:31.152] <TB0> INFO: 411648 events read in total (8125ms).
[20:44:31.207] <TB0> INFO: Expecting 411648 events.
[20:44:39.826] <TB0> INFO: 411648 events read in total (8021ms).
[20:44:39.881] <TB0> INFO: Expecting 411648 events.
[20:44:48.609] <TB0> INFO: 411648 events read in total (8131ms).
[20:44:48.696] <TB0> INFO: Expecting 411648 events.
[20:44:57.287] <TB0> INFO: 411648 events read in total (8038ms).
[20:44:57.350] <TB0> INFO: Expecting 411648 events.
[20:45:06.007] <TB0> INFO: 411648 events read in total (8061ms).
[20:45:06.074] <TB0> INFO: Expecting 411648 events.
[20:45:14.837] <TB0> INFO: 411648 events read in total (8178ms).
[20:45:14.907] <TB0> INFO: Expecting 411648 events.
[20:45:23.572] <TB0> INFO: 411648 events read in total (8082ms).
[20:45:23.655] <TB0> INFO: Test took 145326ms.
[20:45:25.033] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:45:25.059] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:45:25.059] <TB0> INFO: run 1 of 1
[20:45:25.535] <TB0> INFO: Expecting 5025280 events.
[20:46:03.094] <TB0> INFO: 884848 events read in total (36841ms).
[20:46:40.208] <TB0> INFO: 1768544 events read in total (73956ms).
[20:47:17.635] <TB0> INFO: 2650192 events read in total (111382ms).
[20:47:55.280] <TB0> INFO: 3519216 events read in total (149027ms).
[20:48:33.122] <TB0> INFO: 4382608 events read in total (186870ms).
[20:49:02.475] <TB0> INFO: 5025280 events read in total (216222ms).
[20:49:02.618] <TB0> INFO: Test took 217560ms.
[20:49:03.122] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:49:59.481] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.120556 .. 255.000000
[20:49:59.577] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[20:49:59.598] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:49:59.598] <TB0> INFO: run 1 of 1
[20:49:59.998] <TB0> INFO: Expecting 8519680 events.
[20:50:39.689] <TB0> INFO: 826088 events read in total (38973ms).
[20:51:16.774] <TB0> INFO: 1651576 events read in total (76058ms).
[20:51:53.001] <TB0> INFO: 2476992 events read in total (113285ms).
[20:52:32.983] <TB0> INFO: 3302664 events read in total (152267ms).
[20:53:10.205] <TB0> INFO: 4128264 events read in total (189489ms).
[20:53:48.036] <TB0> INFO: 4956936 events read in total (227320ms).
[20:54:25.299] <TB0> INFO: 5786096 events read in total (264583ms).
[20:55:02.507] <TB0> INFO: 6614624 events read in total (301791ms).
[20:55:41.766] <TB0> INFO: 7443152 events read in total (341050ms).
[20:56:18.566] <TB0> INFO: 8270816 events read in total (377850ms).
[20:56:30.954] <TB0> INFO: 8519680 events read in total (390238ms).
[20:56:31.218] <TB0> INFO: Test took 391621ms.
[20:56:31.813] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:57:41.274] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 17.824605 .. 54.997574
[20:57:41.399] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 7 .. 64 (-1/-1) hits flags = 528 (plus default)
[20:57:41.444] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:57:41.447] <TB0> INFO: run 1 of 1
[20:57:41.917] <TB0> INFO: Expecting 1930240 events.
[20:58:29.407] <TB0> INFO: 1066240 events read in total (46769ms).
[20:59:03.784] <TB0> INFO: 1930240 events read in total (81146ms).
[20:59:03.839] <TB0> INFO: Test took 82387ms.
[20:59:03.946] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[20:59:35.416] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 13.500000 .. 47.458530
[20:59:35.526] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 3 .. 57 (-1/-1) hits flags = 528 (plus default)
[20:59:35.549] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:59:35.549] <TB0> INFO: run 1 of 1
[20:59:35.968] <TB0> INFO: Expecting 1830400 events.
[21:00:24.637] <TB0> INFO: 1161432 events read in total (47954ms).
[21:00:49.950] <TB0> INFO: 1830400 events read in total (73268ms).
[21:00:49.990] <TB0> INFO: Test took 74442ms.
[21:00:50.061] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:01:21.080] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 13.500000 .. 47.358870
[21:01:21.315] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 3 .. 57 (-1/-1) hits flags = 528 (plus default)
[21:01:21.370] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:01:21.378] <TB0> INFO: run 1 of 1
[21:01:21.883] <TB0> INFO: Expecting 1830400 events.
[21:02:05.830] <TB0> INFO: 1161872 events read in total (43225ms).
[21:02:29.606] <TB0> INFO: 1830400 events read in total (67001ms).
[21:02:29.649] <TB0> INFO: Test took 68261ms.
[21:02:29.745] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:02:58.511] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:02:58.511] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:02:58.534] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:02:58.534] <TB0> INFO: run 1 of 1
[21:02:58.994] <TB0> INFO: Expecting 1364480 events.
[21:03:48.529] <TB0> INFO: 1079344 events read in total (48820ms).
[21:03:59.332] <TB0> INFO: 1364480 events read in total (59623ms).
[21:03:59.367] <TB0> INFO: Test took 60832ms.
[21:03:59.432] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:04:28.998] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C0.dat
[21:04:28.998] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C1.dat
[21:04:28.998] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C2.dat
[21:04:28.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C3.dat
[21:04:28.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C4.dat
[21:04:28.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C5.dat
[21:04:28.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C6.dat
[21:04:28.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C7.dat
[21:04:28.000] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C8.dat
[21:04:28.000] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C9.dat
[21:04:28.001] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C10.dat
[21:04:28.001] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C11.dat
[21:04:28.002] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C12.dat
[21:04:28.003] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C13.dat
[21:04:28.003] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C14.dat
[21:04:28.003] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C15.dat
[21:04:28.004] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C0.dat
[21:04:29.022] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C1.dat
[21:04:29.040] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C2.dat
[21:04:29.054] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C3.dat
[21:04:29.067] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C4.dat
[21:04:29.089] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C5.dat
[21:04:29.104] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C6.dat
[21:04:29.124] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C7.dat
[21:04:29.138] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C8.dat
[21:04:29.154] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C9.dat
[21:04:29.169] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C10.dat
[21:04:29.182] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C11.dat
[21:04:29.207] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C12.dat
[21:04:29.228] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C13.dat
[21:04:29.251] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C14.dat
[21:04:29.266] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//trimParameters35_C15.dat
[21:04:29.280] <TB0> INFO: PixTestTrim::trimTest() done
[21:04:29.280] <TB0> INFO: vtrim: 126 135 116 132 116 181 113 133 131 120 127 138 131 141 131 236
[21:04:29.280] <TB0> INFO: vthrcomp: 112 111 110 108 108 110 109 110 112 109 109 111 110 113 106 85
[21:04:29.280] <TB0> INFO: vcal mean: 35.02 34.97 35.05 35.02 35.00 35.00 35.01 35.10 35.01 35.01 35.01 34.99 35.01 35.01 35.01 35.33
[21:04:29.280] <TB0> INFO: vcal RMS: 1.25 1.50 1.13 1.43 1.00 1.17 1.26 1.05 0.97 1.20 1.10 1.05 1.23 1.14 1.20 2.26
[21:04:29.280] <TB0> INFO: bits mean: 8.43 7.92 6.51 8.11 8.24 7.11 7.90 7.21 8.13 8.36 8.32 8.40 6.82 7.17 8.71 2.63
[21:04:29.280] <TB0> INFO: bits RMS: 2.34 2.23 2.57 2.38 2.51 1.84 2.55 2.40 2.44 2.39 2.31 2.33 2.39 2.42 2.32 1.29
[21:04:29.293] <TB0> INFO: ----------------------------------------------------------------------
[21:04:29.294] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:04:29.294] <TB0> INFO: ----------------------------------------------------------------------
[21:04:29.300] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:04:29.330] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:04:29.330] <TB0> INFO: run 1 of 1
[21:04:29.753] <TB0> INFO: Expecting 4160000 events.
[21:05:25.054] <TB0> INFO: 1381775 events read in total (54566ms).
[21:06:16.646] <TB0> INFO: 2731855 events read in total (106158ms).
[21:07:11.857] <TB0> INFO: 4065220 events read in total (161369ms).
[21:07:15.638] <TB0> INFO: 4160000 events read in total (165150ms).
[21:07:15.747] <TB0> INFO: Test took 166418ms.
[21:07:15.902] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:08:09.679] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[21:08:09.704] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:08:09.708] <TB0> INFO: run 1 of 1
[21:08:10.129] <TB0> INFO: Expecting 4617600 events.
[21:08:59.937] <TB0> INFO: 1219500 events read in total (49092ms).
[21:09:54.778] <TB0> INFO: 2423945 events read in total (103933ms).
[21:10:48.280] <TB0> INFO: 3610790 events read in total (157435ms).
[21:11:31.455] <TB0> INFO: 4617600 events read in total (200610ms).
[21:11:31.554] <TB0> INFO: Test took 201844ms.
[21:11:31.739] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:12:39.324] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[21:12:39.349] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:12:39.349] <TB0> INFO: run 1 of 1
[21:12:39.779] <TB0> INFO: Expecting 4534400 events.
[21:13:29.890] <TB0> INFO: 1233295 events read in total (49396ms).
[21:14:15.266] <TB0> INFO: 2450335 events read in total (94772ms).
[21:15:05.797] <TB0> INFO: 3649605 events read in total (145303ms).
[21:15:43.324] <TB0> INFO: 4534400 events read in total (182830ms).
[21:15:43.432] <TB0> INFO: Test took 184083ms.
[21:15:43.632] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:16:47.441] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[21:16:47.462] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:16:47.462] <TB0> INFO: run 1 of 1
[21:16:47.891] <TB0> INFO: Expecting 4534400 events.
[21:17:41.037] <TB0> INFO: 1233610 events read in total (52431ms).
[21:18:30.294] <TB0> INFO: 2449485 events read in total (101688ms).
[21:19:20.777] <TB0> INFO: 3648020 events read in total (152171ms).
[21:20:00.869] <TB0> INFO: 4534400 events read in total (192263ms).
[21:20:00.988] <TB0> INFO: Test took 193526ms.
[21:20:01.207] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:21:03.819] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[21:21:03.858] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:21:03.859] <TB0> INFO: run 1 of 1
[21:21:04.309] <TB0> INFO: Expecting 4492800 events.
[21:22:00.032] <TB0> INFO: 1240360 events read in total (55005ms).
[21:22:55.791] <TB0> INFO: 2462465 events read in total (110764ms).
[21:23:45.720] <TB0> INFO: 3667505 events read in total (160693ms).
[21:24:19.061] <TB0> INFO: 4492800 events read in total (194034ms).
[21:24:19.174] <TB0> INFO: Test took 195315ms.
[21:24:19.364] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:25:24.479] <TB0> INFO: PixTestTrim::trimBitTest() done
[21:25:24.485] <TB0> INFO: PixTestTrim::doTest() done, duration: 3065 seconds
[21:25:24.485] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:25:24.485] <TB0> INFO: Decoding statistics:
[21:25:24.485] <TB0> INFO: General information:
[21:25:24.485] <TB0> INFO: 16bit words read: 0
[21:25:24.485] <TB0> INFO: valid events total: 0
[21:25:24.486] <TB0> INFO: empty events: 0
[21:25:24.486] <TB0> INFO: valid events with pixels: 0
[21:25:24.486] <TB0> INFO: valid pixel hits: 0
[21:25:24.486] <TB0> INFO: Event errors: 0
[21:25:24.486] <TB0> INFO: start marker: 0
[21:25:24.486] <TB0> INFO: stop marker: 0
[21:25:24.486] <TB0> INFO: overflow: 0
[21:25:24.486] <TB0> INFO: invalid 5bit words: 0
[21:25:24.486] <TB0> INFO: invalid XOR eye diagram: 0
[21:25:24.486] <TB0> INFO: TBM errors: 0
[21:25:24.486] <TB0> INFO: flawed TBM headers: 0
[21:25:24.486] <TB0> INFO: flawed TBM trailers: 0
[21:25:24.486] <TB0> INFO: event ID mismatches: 0
[21:25:24.486] <TB0> INFO: ROC errors: 0
[21:25:24.486] <TB0> INFO: missing ROC header(s): 0
[21:25:24.486] <TB0> INFO: misplaced readback start: 0
[21:25:24.486] <TB0> INFO: Pixel decoding errors: 0
[21:25:24.486] <TB0> INFO: pixel data incomplete: 0
[21:25:24.486] <TB0> INFO: pixel address: 0
[21:25:24.486] <TB0> INFO: pulse height fill bit: 0
[21:25:24.486] <TB0> INFO: buffer corruption: 0
[21:25:25.926] <TB0> INFO: ######################################################################
[21:25:25.926] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:25:25.926] <TB0> INFO: ######################################################################
[21:25:26.436] <TB0> INFO: Expecting 41600 events.
[21:25:30.902] <TB0> INFO: 41600 events read in total (3751ms).
[21:25:30.909] <TB0> INFO: Test took 4978ms.
[21:25:30.930] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:25:31.683] <TB0> INFO: Expecting 41600 events.
[21:25:36.344] <TB0> INFO: 41600 events read in total (3945ms).
[21:25:36.354] <TB0> INFO: Test took 5110ms.
[21:25:36.414] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:25:36.001] <TB0> INFO: Expecting 41600 events.
[21:25:41.404] <TB0> INFO: 41600 events read in total (3687ms).
[21:25:41.406] <TB0> INFO: Test took 4900ms.
[21:25:41.418] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:25:41.793] <TB0> INFO: Expecting 2560 events.
[21:25:42.761] <TB0> INFO: 2560 events read in total (245ms).
[21:25:42.766] <TB0> INFO: Test took 1335ms.
[21:25:43.270] <TB0> INFO: Expecting 2560 events.
[21:25:44.229] <TB0> INFO: 2560 events read in total (243ms).
[21:25:44.229] <TB0> INFO: Test took 1463ms.
[21:25:44.737] <TB0> INFO: Expecting 2560 events.
[21:25:45.697] <TB0> INFO: 2560 events read in total (244ms).
[21:25:45.698] <TB0> INFO: Test took 1468ms.
[21:25:46.224] <TB0> INFO: Expecting 2560 events.
[21:25:47.189] <TB0> INFO: 2560 events read in total (245ms).
[21:25:47.190] <TB0> INFO: Test took 1490ms.
[21:25:47.698] <TB0> INFO: Expecting 2560 events.
[21:25:48.658] <TB0> INFO: 2560 events read in total (244ms).
[21:25:48.659] <TB0> INFO: Test took 1469ms.
[21:25:49.175] <TB0> INFO: Expecting 2560 events.
[21:25:50.135] <TB0> INFO: 2560 events read in total (245ms).
[21:25:50.136] <TB0> INFO: Test took 1469ms.
[21:25:50.644] <TB0> INFO: Expecting 2560 events.
[21:25:51.618] <TB0> INFO: 2560 events read in total (245ms).
[21:25:51.618] <TB0> INFO: Test took 1482ms.
[21:25:52.128] <TB0> INFO: Expecting 2560 events.
[21:25:53.093] <TB0> INFO: 2560 events read in total (247ms).
[21:25:53.101] <TB0> INFO: Test took 1475ms.
[21:25:53.602] <TB0> INFO: Expecting 2560 events.
[21:25:54.560] <TB0> INFO: 2560 events read in total (243ms).
[21:25:54.561] <TB0> INFO: Test took 1455ms.
[21:25:55.069] <TB0> INFO: Expecting 2560 events.
[21:25:56.028] <TB0> INFO: 2560 events read in total (244ms).
[21:25:56.029] <TB0> INFO: Test took 1465ms.
[21:25:56.550] <TB0> INFO: Expecting 2560 events.
[21:25:57.512] <TB0> INFO: 2560 events read in total (246ms).
[21:25:57.515] <TB0> INFO: Test took 1479ms.
[21:25:58.036] <TB0> INFO: Expecting 2560 events.
[21:25:58.996] <TB0> INFO: 2560 events read in total (244ms).
[21:25:58.997] <TB0> INFO: Test took 1479ms.
[21:25:59.507] <TB0> INFO: Expecting 2560 events.
[21:26:00.467] <TB0> INFO: 2560 events read in total (243ms).
[21:26:00.467] <TB0> INFO: Test took 1469ms.
[21:26:00.977] <TB0> INFO: Expecting 2560 events.
[21:26:01.939] <TB0> INFO: 2560 events read in total (247ms).
[21:26:01.939] <TB0> INFO: Test took 1471ms.
[21:26:02.448] <TB0> INFO: Expecting 2560 events.
[21:26:03.412] <TB0> INFO: 2560 events read in total (247ms).
[21:26:03.412] <TB0> INFO: Test took 1472ms.
[21:26:03.921] <TB0> INFO: Expecting 2560 events.
[21:26:04.881] <TB0> INFO: 2560 events read in total (244ms).
[21:26:04.882] <TB0> INFO: Test took 1469ms.
[21:26:04.886] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:26:05.394] <TB0> INFO: Expecting 655360 events.
[21:26:19.326] <TB0> INFO: 655360 events read in total (13216ms).
[21:26:19.344] <TB0> INFO: Expecting 655360 events.
[21:26:33.147] <TB0> INFO: 655360 events read in total (13276ms).
[21:26:33.198] <TB0> INFO: Expecting 655360 events.
[21:26:47.288] <TB0> INFO: 655360 events read in total (13559ms).
[21:26:47.347] <TB0> INFO: Expecting 655360 events.
[21:27:01.043] <TB0> INFO: 655360 events read in total (13170ms).
[21:27:01.089] <TB0> INFO: Expecting 655360 events.
[21:27:14.646] <TB0> INFO: 655360 events read in total (13030ms).
[21:27:14.698] <TB0> INFO: Expecting 655360 events.
[21:27:28.664] <TB0> INFO: 655360 events read in total (13440ms).
[21:27:28.726] <TB0> INFO: Expecting 655360 events.
[21:27:42.950] <TB0> INFO: 655360 events read in total (13697ms).
[21:27:43.020] <TB0> INFO: Expecting 655360 events.
[21:27:56.466] <TB0> INFO: 655360 events read in total (12919ms).
[21:27:56.555] <TB0> INFO: Expecting 655360 events.
[21:28:10.089] <TB0> INFO: 655360 events read in total (13007ms).
[21:28:10.191] <TB0> INFO: Expecting 655360 events.
[21:28:24.231] <TB0> INFO: 655360 events read in total (13513ms).
[21:28:24.347] <TB0> INFO: Expecting 655360 events.
[21:28:38.505] <TB0> INFO: 655360 events read in total (13632ms).
[21:28:38.691] <TB0> INFO: Expecting 655360 events.
[21:28:53.887] <TB0> INFO: 655360 events read in total (14650ms).
[21:28:54.020] <TB0> INFO: Expecting 655360 events.
[21:29:08.242] <TB0> INFO: 655360 events read in total (13695ms).
[21:29:08.362] <TB0> INFO: Expecting 655360 events.
[21:29:22.443] <TB0> INFO: 655360 events read in total (13554ms).
[21:29:22.564] <TB0> INFO: Expecting 655360 events.
[21:29:36.161] <TB0> INFO: 655360 events read in total (13071ms).
[21:29:36.296] <TB0> INFO: Expecting 655360 events.
[21:29:49.781] <TB0> INFO: 655360 events read in total (12959ms).
[21:29:49.910] <TB0> INFO: Test took 225024ms.
[21:29:50.055] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:50.357] <TB0> INFO: Expecting 655360 events.
[21:30:04.413] <TB0> INFO: 655360 events read in total (13340ms).
[21:30:04.433] <TB0> INFO: Expecting 655360 events.
[21:30:18.182] <TB0> INFO: 655360 events read in total (13221ms).
[21:30:18.211] <TB0> INFO: Expecting 655360 events.
[21:30:31.520] <TB0> INFO: 655360 events read in total (12783ms).
[21:30:31.549] <TB0> INFO: Expecting 655360 events.
[21:30:44.892] <TB0> INFO: 655360 events read in total (12816ms).
[21:30:44.937] <TB0> INFO: Expecting 655360 events.
[21:31:00.976] <TB0> INFO: 655360 events read in total (15513ms).
[21:31:01.028] <TB0> INFO: Expecting 655360 events.
[21:31:15.057] <TB0> INFO: 655360 events read in total (13503ms).
[21:31:15.118] <TB0> INFO: Expecting 655360 events.
[21:31:28.527] <TB0> INFO: 655360 events read in total (12883ms).
[21:31:28.586] <TB0> INFO: Expecting 655360 events.
[21:31:42.230] <TB0> INFO: 655360 events read in total (13117ms).
[21:31:42.304] <TB0> INFO: Expecting 655360 events.
[21:31:56.469] <TB0> INFO: 655360 events read in total (13635ms).
[21:31:56.554] <TB0> INFO: Expecting 655360 events.
[21:32:10.233] <TB0> INFO: 655360 events read in total (13152ms).
[21:32:10.345] <TB0> INFO: Expecting 655360 events.
[21:32:24.102] <TB0> INFO: 655360 events read in total (13225ms).
[21:32:24.190] <TB0> INFO: Expecting 655360 events.
[21:32:37.776] <TB0> INFO: 655360 events read in total (13059ms).
[21:32:37.880] <TB0> INFO: Expecting 655360 events.
[21:32:51.346] <TB0> INFO: 655360 events read in total (12939ms).
[21:32:51.446] <TB0> INFO: Expecting 655360 events.
[21:33:05.179] <TB0> INFO: 655360 events read in total (13206ms).
[21:33:05.323] <TB0> INFO: Expecting 655360 events.
[21:33:19.235] <TB0> INFO: 655360 events read in total (13380ms).
[21:33:19.346] <TB0> INFO: Expecting 655360 events.
[21:33:32.901] <TB0> INFO: 655360 events read in total (13028ms).
[21:33:33.013] <TB0> INFO: Test took 222958ms.
[21:33:33.359] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.379] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.397] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.417] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.436] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.450] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.474] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.499] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.516] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.535] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.552] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.600] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.616] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.636] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.654] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.671] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:33:33.781] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C0.dat
[21:33:33.781] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C1.dat
[21:33:33.781] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C2.dat
[21:33:33.782] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C3.dat
[21:33:33.782] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C4.dat
[21:33:33.782] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C5.dat
[21:33:33.782] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C6.dat
[21:33:33.782] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C7.dat
[21:33:33.783] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C8.dat
[21:33:33.783] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C9.dat
[21:33:33.783] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C10.dat
[21:33:33.783] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C11.dat
[21:33:33.784] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C12.dat
[21:33:33.784] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C13.dat
[21:33:33.784] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C14.dat
[21:33:33.784] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//dacParameters35_C15.dat
[21:33:34.216] <TB0> INFO: Expecting 41600 events.
[21:33:38.270] <TB0> INFO: 41600 events read in total (3339ms).
[21:33:38.274] <TB0> INFO: Test took 4483ms.
[21:33:38.991] <TB0> INFO: Expecting 41600 events.
[21:33:43.073] <TB0> INFO: 41600 events read in total (3367ms).
[21:33:43.080] <TB0> INFO: Test took 4505ms.
[21:33:43.720] <TB0> INFO: Expecting 41600 events.
[21:33:47.799] <TB0> INFO: 41600 events read in total (3364ms).
[21:33:47.800] <TB0> INFO: Test took 4485ms.
[21:33:48.104] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:48.238] <TB0> INFO: Expecting 2560 events.
[21:33:49.198] <TB0> INFO: 2560 events read in total (245ms).
[21:33:49.199] <TB0> INFO: Test took 1095ms.
[21:33:49.203] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:49.713] <TB0> INFO: Expecting 2560 events.
[21:33:50.672] <TB0> INFO: 2560 events read in total (244ms).
[21:33:50.672] <TB0> INFO: Test took 1469ms.
[21:33:50.675] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:51.182] <TB0> INFO: Expecting 2560 events.
[21:33:52.143] <TB0> INFO: 2560 events read in total (245ms).
[21:33:52.144] <TB0> INFO: Test took 1469ms.
[21:33:52.148] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:52.653] <TB0> INFO: Expecting 2560 events.
[21:33:53.614] <TB0> INFO: 2560 events read in total (246ms).
[21:33:53.614] <TB0> INFO: Test took 1466ms.
[21:33:53.621] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:54.126] <TB0> INFO: Expecting 2560 events.
[21:33:55.086] <TB0> INFO: 2560 events read in total (244ms).
[21:33:55.091] <TB0> INFO: Test took 1470ms.
[21:33:55.094] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:55.596] <TB0> INFO: Expecting 2560 events.
[21:33:56.556] <TB0> INFO: 2560 events read in total (245ms).
[21:33:56.556] <TB0> INFO: Test took 1462ms.
[21:33:56.561] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:57.066] <TB0> INFO: Expecting 2560 events.
[21:33:58.027] <TB0> INFO: 2560 events read in total (246ms).
[21:33:58.027] <TB0> INFO: Test took 1466ms.
[21:33:58.035] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:33:58.537] <TB0> INFO: Expecting 2560 events.
[21:33:59.508] <TB0> INFO: 2560 events read in total (254ms).
[21:33:59.509] <TB0> INFO: Test took 1474ms.
[21:33:59.514] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:00.019] <TB0> INFO: Expecting 2560 events.
[21:34:00.979] <TB0> INFO: 2560 events read in total (244ms).
[21:34:00.981] <TB0> INFO: Test took 1467ms.
[21:34:00.984] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:01.489] <TB0> INFO: Expecting 2560 events.
[21:34:02.450] <TB0> INFO: 2560 events read in total (246ms).
[21:34:02.452] <TB0> INFO: Test took 1468ms.
[21:34:02.456] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:02.959] <TB0> INFO: Expecting 2560 events.
[21:34:03.924] <TB0> INFO: 2560 events read in total (249ms).
[21:34:03.925] <TB0> INFO: Test took 1469ms.
[21:34:03.932] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:04.435] <TB0> INFO: Expecting 2560 events.
[21:34:05.395] <TB0> INFO: 2560 events read in total (245ms).
[21:34:05.396] <TB0> INFO: Test took 1464ms.
[21:34:05.403] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:05.905] <TB0> INFO: Expecting 2560 events.
[21:34:06.866] <TB0> INFO: 2560 events read in total (246ms).
[21:34:06.866] <TB0> INFO: Test took 1463ms.
[21:34:06.870] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:07.376] <TB0> INFO: Expecting 2560 events.
[21:34:08.339] <TB0> INFO: 2560 events read in total (247ms).
[21:34:08.339] <TB0> INFO: Test took 1469ms.
[21:34:08.346] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:08.849] <TB0> INFO: Expecting 2560 events.
[21:34:09.809] <TB0> INFO: 2560 events read in total (245ms).
[21:34:09.810] <TB0> INFO: Test took 1464ms.
[21:34:09.814] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:10.319] <TB0> INFO: Expecting 2560 events.
[21:34:11.280] <TB0> INFO: 2560 events read in total (245ms).
[21:34:11.280] <TB0> INFO: Test took 1467ms.
[21:34:11.285] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:11.790] <TB0> INFO: Expecting 2560 events.
[21:34:12.751] <TB0> INFO: 2560 events read in total (246ms).
[21:34:12.752] <TB0> INFO: Test took 1467ms.
[21:34:12.758] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:13.261] <TB0> INFO: Expecting 2560 events.
[21:34:14.222] <TB0> INFO: 2560 events read in total (245ms).
[21:34:14.223] <TB0> INFO: Test took 1466ms.
[21:34:14.228] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:14.732] <TB0> INFO: Expecting 2560 events.
[21:34:15.691] <TB0> INFO: 2560 events read in total (244ms).
[21:34:15.692] <TB0> INFO: Test took 1465ms.
[21:34:15.696] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:16.205] <TB0> INFO: Expecting 2560 events.
[21:34:17.164] <TB0> INFO: 2560 events read in total (244ms).
[21:34:17.164] <TB0> INFO: Test took 1468ms.
[21:34:17.169] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:17.676] <TB0> INFO: Expecting 2560 events.
[21:34:18.636] <TB0> INFO: 2560 events read in total (244ms).
[21:34:18.637] <TB0> INFO: Test took 1469ms.
[21:34:18.644] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:19.146] <TB0> INFO: Expecting 2560 events.
[21:34:20.108] <TB0> INFO: 2560 events read in total (246ms).
[21:34:20.108] <TB0> INFO: Test took 1465ms.
[21:34:20.112] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:20.620] <TB0> INFO: Expecting 2560 events.
[21:34:21.580] <TB0> INFO: 2560 events read in total (245ms).
[21:34:21.581] <TB0> INFO: Test took 1469ms.
[21:34:21.589] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:22.096] <TB0> INFO: Expecting 2560 events.
[21:34:23.055] <TB0> INFO: 2560 events read in total (243ms).
[21:34:23.057] <TB0> INFO: Test took 1468ms.
[21:34:23.063] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:23.566] <TB0> INFO: Expecting 2560 events.
[21:34:24.527] <TB0> INFO: 2560 events read in total (246ms).
[21:34:24.527] <TB0> INFO: Test took 1465ms.
[21:34:24.531] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:25.037] <TB0> INFO: Expecting 2560 events.
[21:34:26.011] <TB0> INFO: 2560 events read in total (259ms).
[21:34:26.012] <TB0> INFO: Test took 1481ms.
[21:34:26.019] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:26.531] <TB0> INFO: Expecting 2560 events.
[21:34:27.490] <TB0> INFO: 2560 events read in total (244ms).
[21:34:27.491] <TB0> INFO: Test took 1472ms.
[21:34:27.499] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:27.000] <TB0> INFO: Expecting 2560 events.
[21:34:28.960] <TB0> INFO: 2560 events read in total (244ms).
[21:34:28.961] <TB0> INFO: Test took 1463ms.
[21:34:28.972] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:29.471] <TB0> INFO: Expecting 2560 events.
[21:34:30.433] <TB0> INFO: 2560 events read in total (246ms).
[21:34:30.433] <TB0> INFO: Test took 1462ms.
[21:34:30.439] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:30.942] <TB0> INFO: Expecting 2560 events.
[21:34:31.903] <TB0> INFO: 2560 events read in total (245ms).
[21:34:31.903] <TB0> INFO: Test took 1464ms.
[21:34:31.910] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:32.413] <TB0> INFO: Expecting 2560 events.
[21:34:33.376] <TB0> INFO: 2560 events read in total (247ms).
[21:34:33.376] <TB0> INFO: Test took 1467ms.
[21:34:33.381] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:34:33.886] <TB0> INFO: Expecting 2560 events.
[21:34:34.846] <TB0> INFO: 2560 events read in total (245ms).
[21:34:34.847] <TB0> INFO: Test took 1466ms.
[21:34:35.576] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 549 seconds
[21:34:35.576] <TB0> INFO: PH scale (per ROC): 73 70 62 64 61 79 68 66 64 62 62 62 61 63 58 61
[21:34:35.576] <TB0> INFO: PH offset (per ROC): 176 181 195 195 177 187 186 174 193 177 184 206 195 184 189 186
[21:34:35.586] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:34:35.586] <TB0> INFO: Decoding statistics:
[21:34:35.586] <TB0> INFO: General information:
[21:34:35.586] <TB0> INFO: 16bit words read: 66432
[21:34:35.586] <TB0> INFO: valid events total: 5120
[21:34:35.586] <TB0> INFO: empty events: 2624
[21:34:35.586] <TB0> INFO: valid events with pixels: 2496
[21:34:35.586] <TB0> INFO: valid pixel hits: 2496
[21:34:35.586] <TB0> INFO: Event errors: 0
[21:34:35.586] <TB0> INFO: start marker: 0
[21:34:35.586] <TB0> INFO: stop marker: 0
[21:34:35.586] <TB0> INFO: overflow: 0
[21:34:35.586] <TB0> INFO: invalid 5bit words: 0
[21:34:35.586] <TB0> INFO: invalid XOR eye diagram: 0
[21:34:35.586] <TB0> INFO: TBM errors: 0
[21:34:35.586] <TB0> INFO: flawed TBM headers: 0
[21:34:35.586] <TB0> INFO: flawed TBM trailers: 0
[21:34:35.586] <TB0> INFO: event ID mismatches: 0
[21:34:35.586] <TB0> INFO: ROC errors: 0
[21:34:35.586] <TB0> INFO: missing ROC header(s): 0
[21:34:35.586] <TB0> INFO: misplaced readback start: 0
[21:34:35.586] <TB0> INFO: Pixel decoding errors: 0
[21:34:35.587] <TB0> INFO: pixel data incomplete: 0
[21:34:35.587] <TB0> INFO: pixel address: 0
[21:34:35.587] <TB0> INFO: pulse height fill bit: 0
[21:34:35.587] <TB0> INFO: buffer corruption: 0
[21:34:35.870] <TB0> INFO: ######################################################################
[21:34:35.871] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[21:34:35.871] <TB0> INFO: ######################################################################
[21:34:35.892] <TB0> INFO: scanning low vcal = 10
[21:34:36.252] <TB0> INFO: Expecting 41600 events.
[21:34:39.444] <TB0> INFO: 41600 events read in total (2477ms).
[21:34:39.444] <TB0> INFO: Test took 3552ms.
[21:34:39.447] <TB0> INFO: scanning low vcal = 20
[21:34:39.952] <TB0> INFO: Expecting 41600 events.
[21:34:43.107] <TB0> INFO: 41600 events read in total (2439ms).
[21:34:43.108] <TB0> INFO: Test took 3661ms.
[21:34:43.112] <TB0> INFO: scanning low vcal = 30
[21:34:43.616] <TB0> INFO: Expecting 41600 events.
[21:34:46.845] <TB0> INFO: 41600 events read in total (2513ms).
[21:34:46.847] <TB0> INFO: Test took 3735ms.
[21:34:46.853] <TB0> INFO: scanning low vcal = 40
[21:34:47.333] <TB0> INFO: Expecting 41600 events.
[21:34:51.150] <TB0> INFO: 41600 events read in total (3101ms).
[21:34:51.154] <TB0> INFO: Test took 4301ms.
[21:34:51.161] <TB0> INFO: scanning low vcal = 50
[21:34:51.588] <TB0> INFO: Expecting 41600 events.
[21:34:55.331] <TB0> INFO: 41600 events read in total (3027ms).
[21:34:55.333] <TB0> INFO: Test took 4172ms.
[21:34:55.340] <TB0> INFO: scanning low vcal = 60
[21:34:55.736] <TB0> INFO: Expecting 41600 events.
[21:34:59.459] <TB0> INFO: 41600 events read in total (3008ms).
[21:34:59.461] <TB0> INFO: Test took 4121ms.
[21:34:59.467] <TB0> INFO: scanning low vcal = 70
[21:34:59.886] <TB0> INFO: Expecting 41600 events.
[21:35:03.699] <TB0> INFO: 41600 events read in total (3098ms).
[21:35:03.703] <TB0> INFO: Test took 4236ms.
[21:35:03.710] <TB0> INFO: scanning low vcal = 80
[21:35:04.124] <TB0> INFO: Expecting 41600 events.
[21:35:07.913] <TB0> INFO: 41600 events read in total (3073ms).
[21:35:07.915] <TB0> INFO: Test took 4204ms.
[21:35:07.921] <TB0> INFO: scanning low vcal = 90
[21:35:08.321] <TB0> INFO: Expecting 41600 events.
[21:35:12.180] <TB0> INFO: 41600 events read in total (3144ms).
[21:35:12.183] <TB0> INFO: Test took 4262ms.
[21:35:12.192] <TB0> INFO: scanning low vcal = 100
[21:35:12.579] <TB0> INFO: Expecting 41600 events.
[21:35:16.418] <TB0> INFO: 41600 events read in total (3122ms).
[21:35:16.421] <TB0> INFO: Test took 4229ms.
[21:35:16.428] <TB0> INFO: scanning low vcal = 110
[21:35:16.813] <TB0> INFO: Expecting 41600 events.
[21:35:20.561] <TB0> INFO: 41600 events read in total (3033ms).
[21:35:20.562] <TB0> INFO: Test took 4133ms.
[21:35:20.570] <TB0> INFO: scanning low vcal = 120
[21:35:20.957] <TB0> INFO: Expecting 41600 events.
[21:35:24.757] <TB0> INFO: 41600 events read in total (3085ms).
[21:35:24.759] <TB0> INFO: Test took 4189ms.
[21:35:24.767] <TB0> INFO: scanning low vcal = 130
[21:35:25.139] <TB0> INFO: Expecting 41600 events.
[21:35:28.970] <TB0> INFO: 41600 events read in total (3116ms).
[21:35:28.971] <TB0> INFO: Test took 4204ms.
[21:35:28.977] <TB0> INFO: scanning low vcal = 140
[21:35:29.398] <TB0> INFO: Expecting 41600 events.
[21:35:33.185] <TB0> INFO: 41600 events read in total (3071ms).
[21:35:33.186] <TB0> INFO: Test took 4208ms.
[21:35:33.195] <TB0> INFO: scanning low vcal = 150
[21:35:33.561] <TB0> INFO: Expecting 41600 events.
[21:35:37.369] <TB0> INFO: 41600 events read in total (3092ms).
[21:35:37.372] <TB0> INFO: Test took 4176ms.
[21:35:37.378] <TB0> INFO: scanning low vcal = 160
[21:35:37.734] <TB0> INFO: Expecting 41600 events.
[21:35:41.557] <TB0> INFO: 41600 events read in total (3107ms).
[21:35:41.559] <TB0> INFO: Test took 4181ms.
[21:35:41.565] <TB0> INFO: scanning low vcal = 170
[21:35:41.967] <TB0> INFO: Expecting 41600 events.
[21:35:45.841] <TB0> INFO: 41600 events read in total (3159ms).
[21:35:45.842] <TB0> INFO: Test took 4277ms.
[21:35:45.851] <TB0> INFO: scanning low vcal = 180
[21:35:46.225] <TB0> INFO: Expecting 41600 events.
[21:35:50.016] <TB0> INFO: 41600 events read in total (3076ms).
[21:35:50.017] <TB0> INFO: Test took 4166ms.
[21:35:50.021] <TB0> INFO: scanning low vcal = 190
[21:35:50.425] <TB0> INFO: Expecting 41600 events.
[21:35:54.473] <TB0> INFO: 41600 events read in total (3328ms).
[21:35:54.478] <TB0> INFO: Test took 4456ms.
[21:35:54.483] <TB0> INFO: scanning low vcal = 200
[21:35:54.904] <TB0> INFO: Expecting 41600 events.
[21:35:59.734] <TB0> INFO: 41600 events read in total (4111ms).
[21:35:59.737] <TB0> INFO: Test took 5254ms.
[21:35:59.746] <TB0> INFO: scanning low vcal = 210
[21:36:00.265] <TB0> INFO: Expecting 41600 events.
[21:36:04.176] <TB0> INFO: 41600 events read in total (3195ms).
[21:36:04.178] <TB0> INFO: Test took 4432ms.
[21:36:04.184] <TB0> INFO: scanning low vcal = 220
[21:36:04.637] <TB0> INFO: Expecting 41600 events.
[21:36:08.426] <TB0> INFO: 41600 events read in total (3073ms).
[21:36:08.428] <TB0> INFO: Test took 4243ms.
[21:36:08.436] <TB0> INFO: scanning low vcal = 230
[21:36:08.837] <TB0> INFO: Expecting 41600 events.
[21:36:12.676] <TB0> INFO: 41600 events read in total (3124ms).
[21:36:12.677] <TB0> INFO: Test took 4240ms.
[21:36:12.683] <TB0> INFO: scanning low vcal = 240
[21:36:13.063] <TB0> INFO: Expecting 41600 events.
[21:36:16.933] <TB0> INFO: 41600 events read in total (3146ms).
[21:36:16.934] <TB0> INFO: Test took 4250ms.
[21:36:16.946] <TB0> INFO: scanning low vcal = 250
[21:36:17.333] <TB0> INFO: Expecting 41600 events.
[21:36:21.090] <TB0> INFO: 41600 events read in total (3042ms).
[21:36:21.093] <TB0> INFO: Test took 4147ms.
[21:36:21.108] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[21:36:21.498] <TB0> INFO: Expecting 41600 events.
[21:36:25.358] <TB0> INFO: 41600 events read in total (3144ms).
[21:36:25.360] <TB0> INFO: Test took 4251ms.
[21:36:25.368] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[21:36:25.774] <TB0> INFO: Expecting 41600 events.
[21:36:29.556] <TB0> INFO: 41600 events read in total (3066ms).
[21:36:29.558] <TB0> INFO: Test took 4189ms.
[21:36:29.564] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[21:36:29.969] <TB0> INFO: Expecting 41600 events.
[21:36:33.813] <TB0> INFO: 41600 events read in total (3128ms).
[21:36:33.814] <TB0> INFO: Test took 4249ms.
[21:36:33.821] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[21:36:34.211] <TB0> INFO: Expecting 41600 events.
[21:36:38.214] <TB0> INFO: 41600 events read in total (3288ms).
[21:36:38.217] <TB0> INFO: Test took 4396ms.
[21:36:38.232] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[21:36:38.641] <TB0> INFO: Expecting 41600 events.
[21:36:42.485] <TB0> INFO: 41600 events read in total (3126ms).
[21:36:42.487] <TB0> INFO: Test took 4255ms.
[21:36:43.430] <TB0> INFO: PixTestGainPedestal::measure() done
[21:38:00.757] <TB0> INFO: PixTestGainPedestal::fit() done
[21:38:00.757] <TB0> INFO: non-linearity mean: 0.962 0.959 0.952 0.956 0.956 0.963 0.961 0.960 0.954 0.951 0.959 0.952 0.955 0.961 0.962 0.965
[21:38:00.757] <TB0> INFO: non-linearity RMS: 0.006 0.006 0.009 0.008 0.007 0.006 0.007 0.007 0.008 0.008 0.008 0.009 0.009 0.008 0.007 0.006
[21:38:00.757] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C0.dat
[21:38:00.793] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C1.dat
[21:38:00.828] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C2.dat
[21:38:00.863] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C3.dat
[21:38:00.893] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C4.dat
[21:38:00.929] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C5.dat
[21:38:00.965] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C6.dat
[21:38:00.000] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C7.dat
[21:38:01.036] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C8.dat
[21:38:01.071] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C9.dat
[21:38:01.106] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C10.dat
[21:38:01.139] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C11.dat
[21:38:01.173] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C12.dat
[21:38:01.208] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C13.dat
[21:38:01.239] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C14.dat
[21:38:01.271] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//phCalibrationFitErr35_C15.dat
[21:38:01.307] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 205 seconds
[21:38:01.307] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:38:01.307] <TB0> INFO: Decoding statistics:
[21:38:01.307] <TB0> INFO: General information:
[21:38:01.307] <TB0> INFO: 16bit words read: 2328836
[21:38:01.307] <TB0> INFO: valid events total: 83200
[21:38:01.307] <TB0> INFO: empty events: 0
[21:38:01.307] <TB0> INFO: valid events with pixels: 83200
[21:38:01.307] <TB0> INFO: valid pixel hits: 665218
[21:38:01.307] <TB0> INFO: Event errors: 0
[21:38:01.307] <TB0> INFO: start marker: 0
[21:38:01.307] <TB0> INFO: stop marker: 0
[21:38:01.307] <TB0> INFO: overflow: 0
[21:38:01.307] <TB0> INFO: invalid 5bit words: 0
[21:38:01.307] <TB0> INFO: invalid XOR eye diagram: 0
[21:38:01.307] <TB0> INFO: TBM errors: 0
[21:38:01.307] <TB0> INFO: flawed TBM headers: 0
[21:38:01.307] <TB0> INFO: flawed TBM trailers: 0
[21:38:01.307] <TB0> INFO: event ID mismatches: 0
[21:38:01.307] <TB0> INFO: ROC errors: 0
[21:38:01.307] <TB0> INFO: missing ROC header(s): 0
[21:38:01.307] <TB0> INFO: misplaced readback start: 0
[21:38:01.307] <TB0> INFO: Pixel decoding errors: 0
[21:38:01.307] <TB0> INFO: pixel data incomplete: 0
[21:38:01.307] <TB0> INFO: pixel address: 0
[21:38:01.307] <TB0> INFO: pulse height fill bit: 0
[21:38:01.307] <TB0> INFO: buffer corruption: 0
[21:38:01.321] <TB0> INFO: readReadbackCal: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C15.dat
[21:38:01.323] <TB0> INFO: ######################################################################
[21:38:01.323] <TB0> INFO: PixTestTrim::doTest()
[21:38:01.323] <TB0> INFO: ######################################################################
[21:38:01.324] <TB0> INFO: PixTestReadback::RES sent once
[21:38:12.656] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C0.dat
[21:38:12.686] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C1.dat
[21:38:12.687] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C2.dat
[21:38:12.687] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C3.dat
[21:38:12.687] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C4.dat
[21:38:12.687] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C5.dat
[21:38:12.688] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C6.dat
[21:38:12.688] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C7.dat
[21:38:12.689] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C8.dat
[21:38:12.689] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C9.dat
[21:38:12.689] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C10.dat
[21:38:12.690] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C11.dat
[21:38:12.690] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C12.dat
[21:38:12.690] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C13.dat
[21:38:12.690] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C14.dat
[21:38:12.691] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C15.dat
[21:38:12.728] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[21:38:12.729] <TB0> INFO: PixTestReadback::RES sent once
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C0.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C1.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C2.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C3.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C4.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C5.dat
[21:38:23.969] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C6.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C7.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C8.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C9.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C10.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C11.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C12.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C13.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C14.dat
[21:38:23.970] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C15.dat
[21:38:24.012] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[21:38:24.012] <TB0> INFO: PixTestReadback::RES sent once
[21:38:32.678] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[21:38:32.678] <TB0> INFO: Vbg will be calibrated using Vd calibration
[21:38:32.678] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.3calibrated Vbg = 1.20873 :::*/*/*/*/
[21:38:32.678] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160.6calibrated Vbg = 1.20096 :::*/*/*/*/
[21:38:32.678] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.1calibrated Vbg = 1.21753 :::*/*/*/*/
[21:38:32.678] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 162.3calibrated Vbg = 1.22072 :::*/*/*/*/
[21:38:32.678] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 146calibrated Vbg = 1.21913 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 165.9calibrated Vbg = 1.22285 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.7calibrated Vbg = 1.22037 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 147.3calibrated Vbg = 1.22535 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152calibrated Vbg = 1.22438 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.9calibrated Vbg = 1.22128 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.1calibrated Vbg = 1.22185 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 155calibrated Vbg = 1.21161 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.1calibrated Vbg = 1.20483 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147calibrated Vbg = 1.21178 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.2calibrated Vbg = 1.2072 :::*/*/*/*/
[21:38:32.679] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 168.5calibrated Vbg = 1.20799 :::*/*/*/*/
[21:38:32.687] <TB0> INFO: PixTestReadback::RES sent once
[21:41:28.247] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C0.dat
[21:41:28.247] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C1.dat
[21:41:28.247] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C2.dat
[21:41:28.248] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C3.dat
[21:41:28.251] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C4.dat
[21:41:28.254] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C5.dat
[21:41:28.255] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C6.dat
[21:41:28.258] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C7.dat
[21:41:28.258] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C8.dat
[21:41:28.258] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C9.dat
[21:41:28.259] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C10.dat
[21:41:28.259] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C11.dat
[21:41:28.261] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C12.dat
[21:41:28.263] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C13.dat
[21:41:28.264] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C14.dat
[21:41:28.267] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//005_Fulltest_p17//readbackCal_C15.dat
[21:41:28.342] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[21:41:28.345] <TB0> INFO: PixTestReadback::doTest() done
[21:41:28.346] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[21:41:28.346] <TB0> INFO: Decoding statistics:
[21:41:28.346] <TB0> INFO: General information:
[21:41:28.346] <TB0> INFO: 16bit words read: 768
[21:41:28.346] <TB0> INFO: valid events total: 64
[21:41:28.346] <TB0> INFO: empty events: 64
[21:41:28.346] <TB0> INFO: valid events with pixels: 0
[21:41:28.346] <TB0> INFO: valid pixel hits: 0
[21:41:28.346] <TB0> INFO: Event errors: 0
[21:41:28.346] <TB0> INFO: start marker: 0
[21:41:28.346] <TB0> INFO: stop marker: 0
[21:41:28.346] <TB0> INFO: overflow: 0
[21:41:28.346] <TB0> INFO: invalid 5bit words: 0
[21:41:28.346] <TB0> INFO: invalid XOR eye diagram: 0
[21:41:28.346] <TB0> INFO: TBM errors: 0
[21:41:28.346] <TB0> INFO: flawed TBM headers: 0
[21:41:28.346] <TB0> INFO: flawed TBM trailers: 0
[21:41:28.346] <TB0> INFO: event ID mismatches: 0
[21:41:28.346] <TB0> INFO: ROC errors: 0
[21:41:28.346] <TB0> INFO: missing ROC header(s): 0
[21:41:28.346] <TB0> INFO: misplaced readback start: 0
[21:41:28.346] <TB0> INFO: Pixel decoding errors: 0
[21:41:28.346] <TB0> INFO: pixel data incomplete: 0
[21:41:28.346] <TB0> INFO: pixel address: 0
[21:41:28.346] <TB0> INFO: pulse height fill bit: 0
[21:41:28.346] <TB0> INFO: buffer corruption: 0
[21:41:28.435] <TB0> INFO: Decoding statistics:
[21:41:28.435] <TB0> INFO: General information:
[21:41:28.435] <TB0> INFO: 16bit words read: 9534982
[21:41:28.435] <TB0> INFO: valid events total: 551744
[21:41:28.435] <TB0> INFO: empty events: 275396
[21:41:28.435] <TB0> INFO: valid events with pixels: 276348
[21:41:28.435] <TB0> INFO: valid pixel hits: 1457027
[21:41:28.435] <TB0> INFO: Event errors: 0
[21:41:28.435] <TB0> INFO: start marker: 0
[21:41:28.435] <TB0> INFO: stop marker: 0
[21:41:28.435] <TB0> INFO: overflow: 0
[21:41:28.435] <TB0> INFO: invalid 5bit words: 0
[21:41:28.435] <TB0> INFO: invalid XOR eye diagram: 0
[21:41:28.435] <TB0> INFO: TBM errors: 0
[21:41:28.435] <TB0> INFO: flawed TBM headers: 0
[21:41:28.435] <TB0> INFO: flawed TBM trailers: 0
[21:41:28.435] <TB0> INFO: event ID mismatches: 0
[21:41:28.435] <TB0> INFO: ROC errors: 0
[21:41:28.435] <TB0> INFO: missing ROC header(s): 0
[21:41:28.435] <TB0> INFO: misplaced readback start: 0
[21:41:28.435] <TB0> INFO: Pixel decoding errors: 0
[21:41:28.435] <TB0> INFO: pixel data incomplete: 0
[21:41:28.435] <TB0> INFO: pixel address: 0
[21:41:28.435] <TB0> INFO: pulse height fill bit: 0
[21:41:28.435] <TB0> INFO: buffer corruption: 0
[21:41:28.435] <TB0> INFO: enter test to run
[21:41:28.436] <TB0> INFO: test: no parameter change
[21:41:28.768] <TB0> QUIET: Connection to board 127 closed.
[21:41:28.778] <TB0> INFO: pXar: this is the end, my friend