Test Date: 2015-11-12 10:21
Analysis date: 2015-12-09 11:00
Logfile
LogfileView
[14:29:02.105] INFO: *** Welcome to pxar ***
[14:29:02.105] INFO: *** Today: 2015/11/12
[14:29:02.108] INFO: *** Version: fc0e-dirty
[14:29:02.108] INFO: readRocDacs: M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C0.dat .. M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C15.dat
[14:29:02.109] INFO: readTbmDacs: M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/tbmParameters_C0a.dat .. M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/tbmParameters_C0b.dat
[14:29:02.109] INFO: readMaskFile: M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/defaultMaskFile.dat
[14:29:02.109] INFO: readTrimFile: M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters_C0.dat .. M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters_C15.dat
[14:29:02.179] INFO: clk: 4
[14:29:02.179] INFO: ctr: 4
[14:29:02.179] INFO: sda: 19
[14:29:02.179] INFO: tin: 9
[14:29:02.179] INFO: level: 15
[14:29:02.179] INFO: triggerdelay: 0
[14:29:02.179] QUIET: Instanciating API for pxar prod-10+20~g6580e80
[14:29:02.179] INFO: Log level: INFO
[14:29:02.190] INFO: Found DTB DTB_WS6C22
[14:29:02.204] QUIET: Connection to board DTB_WS6C22 opened.
[14:29:02.207] INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 74
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WS6C22
MAC address: 40D85511804A
Hostname: pixelDTB074
Comment:
------------------------------------------------------
[14:29:02.210] INFO: RPC call hashes of host and DTB match: 397073690
[14:29:03.811] INFO: DUT info:
[14:29:03.811] INFO: The DUT currently contains the following objects:
[14:29:03.811] INFO: 2 TBM Cores tbm08c (2 ON)
[14:29:03.812] INFO: TBM Core alpha (0): 7 registers set
[14:29:03.812] INFO: TBM Core beta (1): 7 registers set
[14:29:03.812] INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:29:03.812] INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:03.812] INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:29:04.213] INFO: enter 'restricted' command line mode
[14:29:04.214] INFO: enter test to run
[14:29:04.214] INFO: test: Pretest no parameter change
[14:29:04.214] INFO: running: pretest
[14:29:04.221] INFO: ######################################################################
[14:29:04.221] INFO: PixTestPretest::doTest()
[14:29:04.221] INFO: ######################################################################
[14:29:04.222] INFO: ----------------------------------------------------------------------
[14:29:04.222] INFO: PixTestPretest::programROC()
[14:29:04.222] INFO: ----------------------------------------------------------------------
[14:29:22.246] INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:29:22.246] INFO: IA differences per ROC: 17.7 16.9 17.7 17.7 19.3 19.3 20.1 18.5 20.1 17.7 18.5 20.1 20.1 18.5 16.9 20.1
[14:29:22.315] INFO: ----------------------------------------------------------------------
[14:29:22.315] INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:29:22.315] INFO: ----------------------------------------------------------------------
[14:29:41.919] INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[14:29:41.921] INFO: ----------------------------------------------------------------------
[14:29:41.921] INFO: PixTestPretest::findTiming()
[14:29:41.921] INFO: ----------------------------------------------------------------------
[14:29:41.921] INFO: PixTestCmd::init()
[14:29:42.554] WARNING: Not unmasking DUT, not setting Calibrate bits!

[14:31:17.070] INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[14:31:17.070] INFO: (success/tries = 100/100), width = 4
[14:31:17.072] INFO: ----------------------------------------------------------------------
[14:31:17.072] INFO: PixTestPretest::findWorkingPixel()
[14:31:17.072] INFO: ----------------------------------------------------------------------
[14:31:17.213] INFO: Expecting 231680 events.
[14:31:22.404] ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (1) != Token Chain Length (8)

[14:31:22.407] ERROR: <datapipe.cc/CheckEventID:L457> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)

[14:31:25.122] INFO: 231680 events read in total (7130ms).
[14:31:25.127] INFO: Test took 8052ms.
[14:31:25.598] INFO: Found working pixel in all ROCs: col/row = 12/22
[14:31:25.648] INFO: ----------------------------------------------------------------------
[14:31:25.648] INFO: PixTestPretest::setVthrCompCalDel()
[14:31:25.648] INFO: ----------------------------------------------------------------------
[14:31:25.788] INFO: Expecting 231680 events.
[14:31:33.584] INFO: 231680 events read in total (7017ms).
[14:31:33.588] INFO: Test took 7935ms.
[14:31:34.083] INFO: PixTestPretest::setVthrCompCalDel() done
[14:31:34.083] INFO: CalDel: 115 131 126 117 122 123 115 125 140 118 124 161 117 137 125 107
[14:31:34.083] INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 53 51 51 51 51
[14:31:34.086] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C0.dat
[14:31:34.086] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C1.dat
[14:31:34.087] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C2.dat
[14:31:34.087] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C3.dat
[14:31:34.087] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C4.dat
[14:31:34.087] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C5.dat
[14:31:34.087] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C6.dat
[14:31:34.088] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C7.dat
[14:31:34.088] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C8.dat
[14:31:34.088] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C9.dat
[14:31:34.088] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C10.dat
[14:31:34.088] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C11.dat
[14:31:34.089] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C12.dat
[14:31:34.089] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C13.dat
[14:31:34.089] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C14.dat
[14:31:34.089] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters_C15.dat
[14:31:34.089] INFO: write tbm parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/tbmParameters_C0a.dat
[14:31:34.089] INFO: write tbm parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/tbmParameters_C0b.dat
[14:31:34.090] INFO: PixTestPretest::doTest() done, duration: 149 seconds
[14:31:34.154] INFO: enter test to run
[14:31:34.154] INFO: test: FullTest no parameter change
[14:31:34.154] INFO: running: fulltest
[14:31:34.154] INFO: ######################################################################
[14:31:34.154] INFO: PixTestFullTest::doTest()
[14:31:34.154] INFO: ######################################################################
[14:31:34.156] INFO: ######################################################################
[14:31:34.156] INFO: PixTestAlive::doTest()
[14:31:34.156] INFO: ######################################################################
[14:31:34.158] INFO: ----------------------------------------------------------------------
[14:31:34.158] INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:31:34.158] INFO: ----------------------------------------------------------------------
[14:31:34.483] INFO: Expecting 41600 events.
[14:31:38.980] INFO: 41600 events read in total (3719ms).
[14:31:38.981] INFO: Test took 4821ms.
[14:31:38.987] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:39.443] INFO: PixTestAlive::aliveTest() done
[14:31:39.443] INFO: number of dead pixels per ROC: 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[14:31:39.445] INFO: ----------------------------------------------------------------------
[14:31:39.445] INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:31:39.445] INFO: ----------------------------------------------------------------------
[14:31:39.777] INFO: Expecting 41600 events.
[14:31:42.951] INFO: 41600 events read in total (2395ms).
[14:31:42.951] INFO: Test took 3504ms.
[14:31:42.951] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:42.952] INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:31:43.438] INFO: PixTestAlive::maskTest() done
[14:31:43.438] INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:31:43.439] INFO: ----------------------------------------------------------------------
[14:31:43.439] INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:31:43.439] INFO: ----------------------------------------------------------------------
[14:31:43.762] INFO: Expecting 41600 events.
[14:31:48.248] INFO: 41600 events read in total (3707ms).
[14:31:48.249] INFO: Test took 4808ms.
[14:31:48.255] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:48.715] INFO: PixTestAlive::addressDecodingTest() done
[14:31:48.715] INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:31:48.715] INFO: PixTestAlive::doTest() done, duration: 14 seconds
[14:31:48.715] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:48.715] INFO: Decoding statistics:
[14:31:48.715] INFO: General information:
[14:31:48.715] INFO: 16bit words read: 0
[14:31:48.715] INFO: valid events total: 0
[14:31:48.715] INFO: empty events: 0
[14:31:48.715] INFO: valid events with pixels: 0
[14:31:48.715] INFO: valid pixel hits: 0
[14:31:48.716] INFO: Event errors: 0
[14:31:48.716] INFO: start marker: 0
[14:31:48.716] INFO: stop marker: 0
[14:31:48.716] INFO: overflow: 0
[14:31:48.716] INFO: invalid 5bit words: 0
[14:31:48.716] INFO: invalid XOR eye diagram: 0
[14:31:48.716] INFO: TBM errors: 0
[14:31:48.716] INFO: flawed TBM headers: 0
[14:31:48.716] INFO: flawed TBM trailers: 0
[14:31:48.716] INFO: event ID mismatches: 0
[14:31:48.716] INFO: ROC errors: 0
[14:31:48.716] INFO: missing ROC header(s): 0
[14:31:48.716] INFO: misplaced readback start: 0
[14:31:48.716] INFO: Pixel decoding errors: 0
[14:31:48.716] INFO: pixel data incomplete: 0
[14:31:48.716] INFO: pixel address: 0
[14:31:48.716] INFO: pulse height fill bit: 0
[14:31:48.716] INFO: buffer corruption: 0
[14:31:48.727] INFO: ######################################################################
[14:31:48.727] INFO: PixTestBBMap::doTest() Ntrig = 16, VcalS = 250 (high range)
[14:31:48.727] INFO: ######################################################################
[14:31:48.731] INFO: ---> dac: VthrComp name: calSMap ntrig: 16 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:31:48.765] INFO: dacScan split into 1 runs with ntrig = 16
[14:31:48.765] INFO: run 1 of 1
[14:31:49.088] INFO: Expecting 9984000 events.
[14:32:24.741] INFO: 1213984 events read in total (34874ms).
[14:32:59.573] INFO: 2413712 events read in total (69707ms).
[14:33:34.295] INFO: 3604128 events read in total (104428ms).
[14:34:08.877] INFO: 4787008 events read in total (139010ms).
[14:34:43.477] INFO: 5970912 events read in total (173610ms).
[14:35:17.932] INFO: 7160896 events read in total (208065ms).
[14:35:52.624] INFO: 8361232 events read in total (242757ms).
[14:36:27.473] INFO: 9573504 events read in total (277606ms).
[14:36:38.054] INFO: 9984000 events read in total (288187ms).
[14:36:38.089] INFO: Test took 289325ms.
[14:36:38.179] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:58.741] INFO: PixTestBBMap::doTest() done, duration: 310 seconds
[14:36:58.741] INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0
[14:36:58.741] INFO: separation cut (per ROC): 142 120 111 116 116 122 112 131 115 117 123 115 103 103 109 145
[14:36:58.741] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:58.741] INFO: Decoding statistics:
[14:36:58.741] INFO: General information:
[14:36:58.741] INFO: 16bit words read: 0
[14:36:58.741] INFO: valid events total: 0
[14:36:58.741] INFO: empty events: 0
[14:36:58.741] INFO: valid events with pixels: 0
[14:36:58.741] INFO: valid pixel hits: 0
[14:36:58.741] INFO: Event errors: 0
[14:36:58.741] INFO: start marker: 0
[14:36:58.741] INFO: stop marker: 0
[14:36:58.741] INFO: overflow: 0
[14:36:58.741] INFO: invalid 5bit words: 0
[14:36:58.741] INFO: invalid XOR eye diagram: 0
[14:36:58.741] INFO: TBM errors: 0
[14:36:58.741] INFO: flawed TBM headers: 0
[14:36:58.741] INFO: flawed TBM trailers: 0
[14:36:58.741] INFO: event ID mismatches: 0
[14:36:58.741] INFO: ROC errors: 0
[14:36:58.741] INFO: missing ROC header(s): 0
[14:36:58.741] INFO: misplaced readback start: 0
[14:36:58.741] INFO: Pixel decoding errors: 0
[14:36:58.741] INFO: pixel data incomplete: 0
[14:36:58.741] INFO: pixel address: 0
[14:36:58.741] INFO: pulse height fill bit: 0
[14:36:58.741] INFO: buffer corruption: 0
[14:36:58.810] INFO: ######################################################################
[14:36:58.810] INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:36:58.810] INFO: ######################################################################
[14:36:58.810] INFO: ----------------------------------------------------------------------
[14:36:58.810] INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:36:58.810] INFO: ----------------------------------------------------------------------
[14:36:58.810] INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:36:58.820] INFO: dacScan split into 1 runs with ntrig = 50
[14:36:58.820] INFO: run 1 of 1
[14:36:59.142] INFO: Expecting 26208000 events.
[14:37:31.142] INFO: 1201350 events read in total (31221ms).
[14:38:02.127] INFO: 2377400 events read in total (62206ms).
[14:38:33.149] INFO: 3557200 events read in total (93228ms).
[14:39:04.197] INFO: 4729100 events read in total (124276ms).
[14:39:35.269] INFO: 5898300 events read in total (155348ms).
[14:40:06.232] INFO: 7068300 events read in total (186311ms).
[14:40:37.205] INFO: 8233000 events read in total (217284ms).
[14:41:08.225] INFO: 9395150 events read in total (248304ms).
[14:41:39.098] INFO: 10552750 events read in total (279177ms).
[14:42:09.996] INFO: 11708700 events read in total (310075ms).
[14:42:40.786] INFO: 12857850 events read in total (340865ms).
[14:43:10.728] INFO: 13995650 events read in total (370807ms).
[14:43:41.249] INFO: 15125750 events read in total (401328ms).
[14:44:11.884] INFO: 16253300 events read in total (431963ms).
[14:44:42.436] INFO: 17378550 events read in total (462515ms).
[14:45:12.809] INFO: 18501750 events read in total (492888ms).
[14:45:43.315] INFO: 19621650 events read in total (523394ms).
[14:46:13.863] INFO: 20740700 events read in total (553942ms).
[14:46:44.379] INFO: 21859150 events read in total (584458ms).
[14:47:14.903] INFO: 22976000 events read in total (614982ms).
[14:47:45.422] INFO: 24095900 events read in total (645501ms).
[14:48:15.958] INFO: 25218550 events read in total (676037ms).
[14:48:39.441] INFO: 26208000 events read in total (699520ms).
[14:48:39.479] INFO: Test took 700659ms.
[14:48:39.559] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:39.747] INFO: dumping ASCII scurve output file: SCurveData
[14:48:41.174] INFO: dumping ASCII scurve output file: SCurveData
[14:48:42.608] INFO: dumping ASCII scurve output file: SCurveData
[14:48:44.042] INFO: dumping ASCII scurve output file: SCurveData
[14:48:45.470] INFO: dumping ASCII scurve output file: SCurveData
[14:48:46.910] INFO: dumping ASCII scurve output file: SCurveData
[14:48:48.355] INFO: dumping ASCII scurve output file: SCurveData
[14:48:49.820] INFO: dumping ASCII scurve output file: SCurveData
[14:48:51.252] INFO: dumping ASCII scurve output file: SCurveData
[14:48:52.695] INFO: dumping ASCII scurve output file: SCurveData
[14:48:54.148] INFO: dumping ASCII scurve output file: SCurveData
[14:48:55.581] INFO: dumping ASCII scurve output file: SCurveData
[14:48:57.008] INFO: dumping ASCII scurve output file: SCurveData
[14:48:58.485] INFO: dumping ASCII scurve output file: SCurveData
[14:48:59.986] INFO: dumping ASCII scurve output file: SCurveData
[14:49:01.457] INFO: dumping ASCII scurve output file: SCurveData
[14:49:02.959] INFO: PixTestScurves::scurves() done
[14:49:02.959] INFO: Vcal mean: 113.08 102.97 104.76 105.26 99.37 99.54 88.59 102.44 102.26 96.73 104.83 108.87 86.11 90.43 97.12 101.88
[14:49:02.959] INFO: Vcal RMS: 5.10 5.43 5.33 4.87 5.09 5.22 4.43 5.38 5.48 5.76 6.38 5.53 6.04 6.37 5.81 6.06
[14:49:02.959] INFO: PixTestScurves::fullTest() done, duration: 724 seconds
[14:49:02.959] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:02.959] INFO: Decoding statistics:
[14:49:02.959] INFO: General information:
[14:49:02.959] INFO: 16bit words read: 0
[14:49:02.959] INFO: valid events total: 0
[14:49:02.959] INFO: empty events: 0
[14:49:02.959] INFO: valid events with pixels: 0
[14:49:02.959] INFO: valid pixel hits: 0
[14:49:02.959] INFO: Event errors: 0
[14:49:02.959] INFO: start marker: 0
[14:49:02.959] INFO: stop marker: 0
[14:49:02.959] INFO: overflow: 0
[14:49:02.959] INFO: invalid 5bit words: 0
[14:49:02.959] INFO: invalid XOR eye diagram: 0
[14:49:02.959] INFO: TBM errors: 0
[14:49:02.959] INFO: flawed TBM headers: 0
[14:49:02.959] INFO: flawed TBM trailers: 0
[14:49:02.960] INFO: event ID mismatches: 0
[14:49:02.960] INFO: ROC errors: 0
[14:49:02.960] INFO: missing ROC header(s): 0
[14:49:02.960] INFO: misplaced readback start: 0
[14:49:02.960] INFO: Pixel decoding errors: 0
[14:49:02.960] INFO: pixel data incomplete: 0
[14:49:02.960] INFO: pixel address: 0
[14:49:02.960] INFO: pulse height fill bit: 0
[14:49:02.960] INFO: buffer corruption: 0
[14:49:03.034] INFO: ######################################################################
[14:49:03.034] INFO: PixTestTrim::doTest()
[14:49:03.034] INFO: ######################################################################
[14:49:03.036] INFO: ----------------------------------------------------------------------
[14:49:03.036] INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:49:03.036] INFO: ----------------------------------------------------------------------
[14:49:03.115] INFO: ---> VthrComp thr map (minimal VthrComp)
[14:49:03.115] INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:49:03.124] INFO: dacScan split into 1 runs with ntrig = 8
[14:49:03.124] INFO: run 1 of 1
[14:49:03.443] INFO: Expecting 5025280 events.
[14:49:47.736] INFO: 1434488 events read in total (43514ms).
[14:50:31.201] INFO: 2850448 events read in total (86979ms).
[14:51:13.828] INFO: 4272120 events read in total (129607ms).
[14:51:34.822] INFO: 5025280 events read in total (150600ms).
[14:51:34.859] INFO: Test took 151735ms.
[14:51:34.913] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:55.455] INFO: ROC 0 VthrComp = 108
[14:51:55.455] INFO: ROC 1 VthrComp = 98
[14:51:55.455] INFO: ROC 2 VthrComp = 98
[14:51:55.456] INFO: ROC 3 VthrComp = 101
[14:51:55.456] INFO: ROC 4 VthrComp = 101
[14:51:55.456] INFO: ROC 5 VthrComp = 102
[14:51:55.456] INFO: ROC 6 VthrComp = 93
[14:51:55.456] INFO: ROC 7 VthrComp = 102
[14:51:55.456] INFO: ROC 8 VthrComp = 100
[14:51:55.456] INFO: ROC 9 VthrComp = 100
[14:51:55.456] INFO: ROC 10 VthrComp = 103
[14:51:55.457] INFO: ROC 11 VthrComp = 103
[14:51:55.457] INFO: ROC 12 VthrComp = 88
[14:51:55.457] INFO: ROC 13 VthrComp = 90
[14:51:55.457] INFO: ROC 14 VthrComp = 97
[14:51:55.457] INFO: ROC 15 VthrComp = 104
[14:51:55.457] INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:51:55.457] INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:51:55.470] INFO: dacScan split into 1 runs with ntrig = 8
[14:51:55.470] INFO: run 1 of 1
[14:51:55.798] INFO: Expecting 5025280 events.
[14:52:31.374] INFO: 888784 events read in total (34797ms).
[14:53:06.128] INFO: 1775696 events read in total (69551ms).
[14:53:40.966] INFO: 2662392 events read in total (104390ms).
[14:54:15.573] INFO: 3540144 events read in total (138996ms).
[14:54:49.389] INFO: 4413184 events read in total (172812ms).
[14:55:11.739] INFO: 5025280 events read in total (195162ms).
[14:55:11.806] INFO: Test took 196336ms.
[14:55:11.973] INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:36.930] INFO: roc 0 with ID = 0 has maximal Vcal 61.5627 for pixel 15/79 mean/min/max = 48.5856/35.4855/61.6856
[14:55:36.931] INFO: roc 1 with ID = 1 has maximal Vcal 61.31 for pixel 16/3 mean/min/max = 47.0379/32.6837/61.392
[14:55:36.931] INFO: roc 2 with ID = 2 has maximal Vcal 61.9109 for pixel 2/13 mean/min/max = 47.1246/32.3057/61.9434
[14:55:36.932] INFO: roc 3 with ID = 3 has maximal Vcal 58.4493 for pixel 10/21 mean/min/max = 45.2268/31.8682/58.5855
[14:55:36.932] INFO: roc 4 with ID = 4 has maximal Vcal 55.9279 for pixel 13/1 mean/min/max = 43.8688/31.7592/55.9783
[14:55:36.933] INFO: roc 5 with ID = 5 has maximal Vcal 56.4838 for pixel 2/79 mean/min/max = 44.462/32.2837/56.6403
[14:55:36.933] INFO: roc 6 with ID = 6 has maximal Vcal 55.0372 for pixel 2/75 mean/min/max = 44.3009/33.502/55.0997
[14:55:36.934] INFO: roc 7 with ID = 7 has maximal Vcal 57.8079 for pixel 22/66 mean/min/max = 45.2296/32.3623/58.097
[14:55:36.934] INFO: roc 8 with ID = 8 has maximal Vcal 57.4799 for pixel 10/72 mean/min/max = 44.8887/32.1872/57.5902
[14:55:36.935] INFO: roc 9 with ID = 9 has maximal Vcal 56.6518 for pixel 9/64 mean/min/max = 44.3775/31.7683/56.9866
[14:55:36.935] INFO: roc 10 with ID = 10 has maximal Vcal 60.9562 for pixel 0/55 mean/min/max = 46.3052/31.5604/61.05
[14:55:36.936] INFO: roc 11 with ID = 11 has maximal Vcal 62.2312 for pixel 34/0 mean/min/max = 47.65/33.0539/62.246
[14:55:36.936] INFO: roc 12 with ID = 12 has maximal Vcal 60.3861 for pixel 0/34 mean/min/max = 46.9895/33.4432/60.5357
[14:55:36.936] INFO: roc 13 with ID = 13 has maximal Vcal 61.271 for pixel 16/76 mean/min/max = 46.7384/32.1883/61.2885
[14:55:36.937] INFO: roc 14 with ID = 14 has maximal Vcal 56.7508 for pixel 20/77 mean/min/max = 44.207/31.5321/56.882
[14:55:36.937] INFO: roc 15 with ID = 15 has maximal Vcal 59.2042 for pixel 51/77 mean/min/max = 46.7897/34.3244/59.255
[14:55:36.937] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:55:37.073] INFO: Expecting 411648 events.
[14:55:45.709] INFO: 411648 events read in total (7858ms).
[14:55:45.715] INFO: Expecting 411648 events.
[14:55:54.223] INFO: 411648 events read in total (7839ms).
[14:55:54.233] INFO: Expecting 411648 events.
[14:56:02.758] INFO: 411648 events read in total (7860ms).
[14:56:02.770] INFO: Expecting 411648 events.
[14:56:11.307] INFO: 411648 events read in total (7874ms).
[14:56:11.321] INFO: Expecting 411648 events.
[14:56:19.866] INFO: 411648 events read in total (7887ms).
[14:56:19.883] INFO: Expecting 411648 events.
[14:56:28.386] INFO: 411648 events read in total (7847ms).
[14:56:28.405] INFO: Expecting 411648 events.
[14:56:36.944] INFO: 411648 events read in total (7884ms).
[14:56:36.970] INFO: Expecting 411648 events.
[14:56:45.539] INFO: 411648 events read in total (7922ms).
[14:56:45.561] INFO: Expecting 411648 events.
[14:56:54.100] INFO: 411648 events read in total (7891ms).
[14:56:54.124] INFO: Expecting 411648 events.
[14:57:02.678] INFO: 411648 events read in total (7900ms).
[14:57:02.709] INFO: Expecting 411648 events.
[14:57:11.249] INFO: 411648 events read in total (7898ms).
[14:57:11.277] INFO: Expecting 411648 events.
[14:57:19.773] INFO: 411648 events read in total (7849ms).
[14:57:19.804] INFO: Expecting 411648 events.
[14:57:28.295] INFO: 411648 events read in total (7838ms).
[14:57:28.330] INFO: Expecting 411648 events.
[14:57:36.890] INFO: 411648 events read in total (7925ms).
[14:57:36.931] INFO: Expecting 411648 events.
[14:57:45.405] INFO: 411648 events read in total (7842ms).
[14:57:45.442] INFO: Expecting 411648 events.
[14:57:54.107] INFO: 411648 events read in total (8022ms).
[14:57:54.147] INFO: Test took 137210ms.
[14:57:55.202] INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:57:55.213] INFO: dacScan split into 1 runs with ntrig = 8
[14:57:55.214] INFO: run 1 of 1
[14:57:55.538] INFO: Expecting 5025280 events.
[14:58:31.168] INFO: 870136 events read in total (34851ms).
[14:59:05.909] INFO: 1738704 events read in total (69592ms).
[14:59:40.751] INFO: 2607480 events read in total (104434ms).
[15:00:15.382] INFO: 3467264 events read in total (139065ms).
[15:00:49.136] INFO: 4322904 events read in total (172819ms).
[15:01:15.104] INFO: 5025280 events read in total (198787ms).
[15:01:15.183] INFO: Test took 199969ms.
[15:01:15.362] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:40.069] INFO: ---> TrimStepCorr4 extremal thresholds: 0.184030 .. 255.000000
[15:01:40.138] INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[15:01:40.151] INFO: dacScan split into 1 runs with ntrig = 8
[15:01:40.151] INFO: run 1 of 1
[15:01:40.474] INFO: Expecting 8519680 events.
[15:02:15.172] INFO: 827048 events read in total (33919ms).
[15:02:48.942] INFO: 1653992 events read in total (67689ms).
[15:03:22.654] INFO: 2481472 events read in total (101401ms).
[15:03:56.414] INFO: 3308600 events read in total (135161ms).
[15:04:30.069] INFO: 4135888 events read in total (168816ms).
[15:05:04.058] INFO: 4962928 events read in total (202805ms).
[15:05:38.011] INFO: 5788912 events read in total (236758ms).
[15:06:11.728] INFO: 6614208 events read in total (270475ms).
[15:06:45.308] INFO: 7438840 events read in total (304055ms).
[15:07:16.165] INFO: 8263312 events read in total (334912ms).
[15:07:26.562] INFO: 8519680 events read in total (345309ms).
[15:07:26.687] INFO: Test took 346537ms.
[15:07:27.019] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:56.723] INFO: ---> TrimStepCorr2 extremal thresholds: 15.654516 .. 47.013534
[15:07:56.793] INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 5 .. 57 (-1/-1) hits flags = 528 (plus default)
[15:07:56.803] INFO: dacScan split into 1 runs with ntrig = 8
[15:07:56.803] INFO: run 1 of 1
[15:07:57.125] INFO: Expecting 1763840 events.
[15:08:34.353] INFO: 1144656 events read in total (36450ms).
[15:08:56.452] INFO: 1763840 events read in total (58549ms).
[15:08:56.473] INFO: Test took 59670ms.
[15:08:56.512] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:10.930] INFO: ---> TrimStepCorr1a extremal thresholds: 21.797019 .. 46.884905
[15:09:10.001] INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 11 .. 56 (-1/-1) hits flags = 528 (plus default)
[15:09:11.011] INFO: dacScan split into 1 runs with ntrig = 8
[15:09:11.011] INFO: run 1 of 1
[15:09:11.332] INFO: Expecting 1530880 events.
[15:09:47.793] INFO: 1105600 events read in total (35682ms).
[15:10:01.129] INFO: 1530880 events read in total (49018ms).
[15:10:01.152] INFO: Test took 50142ms.
[15:10:01.194] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:15.433] INFO: ---> TrimStepCorr1b extremal thresholds: 24.001996 .. 46.884905
[15:10:15.503] INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 56 (-1/-1) hits flags = 528 (plus default)
[15:10:15.512] INFO: dacScan split into 1 runs with ntrig = 8
[15:10:15.513] INFO: run 1 of 1
[15:10:15.833] INFO: Expecting 1431040 events.
[15:10:52.615] INFO: 1079320 events read in total (36003ms).
[15:11:05.461] INFO: 1431040 events read in total (48849ms).
[15:11:05.475] INFO: Test took 49962ms.
[15:11:05.512] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:19.851] INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:11:19.851] INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[15:11:19.861] INFO: dacScan split into 1 runs with ntrig = 8
[15:11:19.861] INFO: run 1 of 1
[15:11:20.182] INFO: Expecting 1364480 events.
[15:11:56.160] INFO: 1077408 events read in total (35199ms).
[15:12:06.792] INFO: 1364480 events read in total (45831ms).
[15:12:06.806] INFO: Test took 46945ms.
[15:12:06.841] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:20.873] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C0.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C1.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C2.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C3.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C4.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C5.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C6.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C7.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C8.dat
[15:12:20.874] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C9.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C10.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C11.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C12.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C13.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C14.dat
[15:12:20.875] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C15.dat
[15:12:20.875] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C0.dat
[15:12:20.881] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C1.dat
[15:12:20.887] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C2.dat
[15:12:20.893] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C3.dat
[15:12:20.899] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C4.dat
[15:12:20.905] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C5.dat
[15:12:20.911] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C6.dat
[15:12:20.917] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C7.dat
[15:12:20.922] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C8.dat
[15:12:20.928] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C9.dat
[15:12:20.934] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C10.dat
[15:12:20.940] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C11.dat
[15:12:20.946] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C12.dat
[15:12:20.952] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C13.dat
[15:12:20.958] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C14.dat
[15:12:20.964] INFO: write trim parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/trimParameters35_C15.dat
[15:12:20.970] INFO: PixTestTrim::trimTest() done
[15:12:20.970] INFO: vtrim: 110 96 104 95 93 92 91 101 93 92 101 89 104 106 86 104
[15:12:20.970] INFO: vthrcomp: 108 98 98 101 101 102 93 102 100 100 103 103 88 90 97 104
[15:12:20.970] INFO: vcal mean: 34.99 34.92 34.96 34.95 34.95 34.97 34.97 34.94 34.91 35.02 35.07 34.98 34.99 34.99 34.96 34.95
[15:12:20.970] INFO: vcal RMS: 0.95 0.99 1.12 1.04 1.09 0.95 0.86 0.92 1.00 0.94 0.97 0.99 0.87 0.94 0.94 0.88
[15:12:20.970] INFO: bits mean: 8.43 9.33 9.24 9.76 10.22 9.93 9.80 9.50 9.59 9.53 9.15 8.48 8.10 9.44 10.17 8.63
[15:12:20.970] INFO: bits RMS: 2.44 2.60 2.71 2.63 2.48 2.59 2.40 2.67 2.71 2.83 2.94 2.77 3.02 2.59 2.53 2.63
[15:12:20.979] INFO: ----------------------------------------------------------------------
[15:12:20.979] INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:12:20.979] INFO: ----------------------------------------------------------------------
[15:12:20.983] INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:12:20.993] INFO: dacScan split into 1 runs with ntrig = 5
[15:12:20.993] INFO: run 1 of 1
[15:12:21.313] INFO: Expecting 4160000 events.
[15:13:08.183] INFO: 1225820 events read in total (46091ms).
[15:13:53.457] INFO: 2425235 events read in total (91365ms).
[15:14:37.293] INFO: 3603600 events read in total (135201ms).
[15:14:56.733] INFO: 4160000 events read in total (154641ms).
[15:14:56.792] INFO: Test took 155799ms.
[15:14:56.917] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:26.102] INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[15:15:26.112] INFO: dacScan split into 1 runs with ntrig = 5
[15:15:26.112] INFO: run 1 of 1
[15:15:26.431] INFO: Expecting 3848000 events.
[15:16:12.562] INFO: 1217005 events read in total (45352ms).
[15:16:57.335] INFO: 2406020 events read in total (90125ms).
[15:17:39.711] INFO: 3577330 events read in total (132501ms).
[15:17:49.452] INFO: 3848000 events read in total (142242ms).
[15:17:49.504] INFO: Test took 143391ms.
[15:17:49.606] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:17.087] INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 170 (-1/-1) hits flags = 528 (plus default)
[15:18:17.097] INFO: dacScan split into 1 runs with ntrig = 5
[15:18:17.097] INFO: run 1 of 1
[15:18:17.415] INFO: Expecting 3556800 events.
[15:19:05.209] INFO: 1278190 events read in total (47015ms).
[15:19:51.258] INFO: 2518435 events read in total (93065ms).
[15:20:27.079] INFO: 3556800 events read in total (128885ms).
[15:20:27.118] INFO: Test took 130021ms.
[15:20:27.198] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:52.983] INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 168 (-1/-1) hits flags = 528 (plus default)
[15:20:52.996] INFO: dacScan split into 1 runs with ntrig = 5
[15:20:52.996] INFO: run 1 of 1
[15:20:53.315] INFO: Expecting 3515200 events.
[15:21:36.188] INFO: 1287270 events read in total (42094ms).
[15:22:22.560] INFO: 2534215 events read in total (88466ms).
[15:22:57.140] INFO: 3515200 events read in total (123046ms).
[15:22:57.177] INFO: Test took 124181ms.
[15:22:57.257] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:22.878] INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 167 (-1/-1) hits flags = 528 (plus default)
[15:23:22.892] INFO: dacScan split into 1 runs with ntrig = 5
[15:23:22.892] INFO: run 1 of 1
[15:23:23.213] INFO: Expecting 3494400 events.
[15:24:10.844] INFO: 1291255 events read in total (46852ms).
[15:24:52.960] INFO: 2541725 events read in total (88969ms).
[15:25:26.124] INFO: 3494400 events read in total (122133ms).
[15:25:26.167] INFO: Test took 123274ms.
[15:25:26.245] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:52.256] INFO: PixTestTrim::trimBitTest() done
[15:25:52.258] INFO: PixTestTrim::doTest() done, duration: 2209 seconds
[15:25:52.258] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:52.258] INFO: Decoding statistics:
[15:25:52.258] INFO: General information:
[15:25:52.258] INFO: 16bit words read: 0
[15:25:52.258] INFO: valid events total: 0
[15:25:52.258] INFO: empty events: 0
[15:25:52.258] INFO: valid events with pixels: 0
[15:25:52.258] INFO: valid pixel hits: 0
[15:25:52.258] INFO: Event errors: 0
[15:25:52.258] INFO: start marker: 0
[15:25:52.258] INFO: stop marker: 0
[15:25:52.258] INFO: overflow: 0
[15:25:52.258] INFO: invalid 5bit words: 0
[15:25:52.258] INFO: invalid XOR eye diagram: 0
[15:25:52.258] INFO: TBM errors: 0
[15:25:52.258] INFO: flawed TBM headers: 0
[15:25:52.258] INFO: flawed TBM trailers: 0
[15:25:52.258] INFO: event ID mismatches: 0
[15:25:52.258] INFO: ROC errors: 0
[15:25:52.258] INFO: missing ROC header(s): 0
[15:25:52.258] INFO: misplaced readback start: 0
[15:25:52.258] INFO: Pixel decoding errors: 0
[15:25:52.258] INFO: pixel data incomplete: 0
[15:25:52.258] INFO: pixel address: 0
[15:25:52.258] INFO: pulse height fill bit: 0
[15:25:52.258] INFO: buffer corruption: 0
[15:25:52.928] INFO: ######################################################################
[15:25:52.928] INFO: PixTestPhOptimization::doTest() Ntrig = 16
[15:25:52.928] INFO: ######################################################################
[15:25:53.248] INFO: Expecting 41600 events.
[15:25:57.737] INFO: 41600 events read in total (3710ms).
[15:25:57.738] INFO: Test took 4808ms.
[15:25:57.744] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:58.492] INFO: Expecting 41600 events.
[15:26:03.018] INFO: 41600 events read in total (3747ms).
[15:26:03.018] INFO: Test took 4857ms.
[15:26:03.027] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:03.528] INFO: Expecting 41600 events.
[15:26:08.068] INFO: 41600 events read in total (3761ms).
[15:26:08.069] INFO: Test took 4929ms.
[15:26:08.080] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:08.575] INFO: Expecting 2560 events.
[15:26:09.603] INFO: 2560 events read in total (249ms).
[15:26:09.603] INFO: Test took 1515ms.
[15:26:10.178] INFO: Expecting 2560 events.
[15:26:11.206] INFO: 2560 events read in total (250ms).
[15:26:11.206] INFO: Test took 1602ms.
[15:26:11.779] INFO: Expecting 2560 events.
[15:26:12.808] INFO: 2560 events read in total (250ms).
[15:26:12.808] INFO: Test took 1601ms.
[15:26:13.383] INFO: Expecting 2560 events.
[15:26:14.410] INFO: 2560 events read in total (248ms).
[15:26:14.411] INFO: Test took 1602ms.
[15:26:14.984] INFO: Expecting 2560 events.
[15:26:16.011] INFO: 2560 events read in total (248ms).
[15:26:16.012] INFO: Test took 1601ms.
[15:26:16.585] INFO: Expecting 2560 events.
[15:26:17.612] INFO: 2560 events read in total (248ms).
[15:26:17.613] INFO: Test took 1601ms.
[15:26:18.186] INFO: Expecting 2560 events.
[15:26:19.215] INFO: 2560 events read in total (250ms).
[15:26:19.215] INFO: Test took 1602ms.
[15:26:19.789] INFO: Expecting 2560 events.
[15:26:20.818] INFO: 2560 events read in total (250ms).
[15:26:20.818] INFO: Test took 1603ms.
[15:26:21.392] INFO: Expecting 2560 events.
[15:26:22.421] INFO: 2560 events read in total (250ms).
[15:26:22.421] INFO: Test took 1602ms.
[15:26:22.995] INFO: Expecting 2560 events.
[15:26:24.023] INFO: 2560 events read in total (249ms).
[15:26:24.023] INFO: Test took 1601ms.
[15:26:24.597] INFO: Expecting 2560 events.
[15:26:25.625] INFO: 2560 events read in total (249ms).
[15:26:25.625] INFO: Test took 1601ms.
[15:26:26.199] INFO: Expecting 2560 events.
[15:26:27.227] INFO: 2560 events read in total (249ms).
[15:26:27.227] INFO: Test took 1601ms.
[15:26:27.800] INFO: Expecting 2560 events.
[15:26:28.828] INFO: 2560 events read in total (249ms).
[15:26:28.828] INFO: Test took 1601ms.
[15:26:29.401] INFO: Expecting 2560 events.
[15:26:30.428] INFO: 2560 events read in total (248ms).
[15:26:30.428] INFO: Test took 1600ms.
[15:26:31.002] INFO: Expecting 2560 events.
[15:26:32.029] INFO: 2560 events read in total (248ms).
[15:26:32.030] INFO: Test took 1601ms.
[15:26:32.603] INFO: Expecting 2560 events.
[15:26:33.630] INFO: 2560 events read in total (248ms).
[15:26:33.631] INFO: Test took 1601ms.
[15:26:33.637] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:26:34.206] INFO: Expecting 655360 events.
[15:26:47.494] INFO: 655360 events read in total (12508ms).
[15:26:47.507] INFO: Expecting 655360 events.
[15:27:00.490] INFO: 655360 events read in total (12402ms).
[15:27:00.505] INFO: Expecting 655360 events.
[15:27:13.519] INFO: 655360 events read in total (12438ms).
[15:27:13.539] INFO: Expecting 655360 events.
[15:27:26.543] INFO: 655360 events read in total (12439ms).
[15:27:26.570] INFO: Expecting 655360 events.
[15:27:38.783] INFO: 655360 events read in total (11648ms).
[15:27:38.809] INFO: Expecting 655360 events.
[15:27:50.956] INFO: 655360 events read in total (11575ms).
[15:27:50.987] INFO: Expecting 655360 events.
[15:28:03.693] INFO: 655360 events read in total (12142ms).
[15:28:03.731] INFO: Expecting 655360 events.
[15:28:16.714] INFO: 655360 events read in total (12430ms).
[15:28:16.756] INFO: Expecting 655360 events.
[15:28:29.840] INFO: 655360 events read in total (12532ms).
[15:28:29.889] INFO: Expecting 655360 events.
[15:28:42.925] INFO: 655360 events read in total (12492ms).
[15:28:42.973] INFO: Expecting 655360 events.
[15:28:56.022] INFO: 655360 events read in total (12502ms).
[15:28:56.079] INFO: Expecting 655360 events.
[15:29:09.131] INFO: 655360 events read in total (12519ms).
[15:29:09.187] INFO: Expecting 655360 events.
[15:29:22.279] INFO: 655360 events read in total (12556ms).
[15:29:22.339] INFO: Expecting 655360 events.
[15:29:35.368] INFO: 655360 events read in total (12499ms).
[15:29:35.437] INFO: Expecting 655360 events.
[15:29:48.406] INFO: 655360 events read in total (12442ms).
[15:29:48.478] INFO: Expecting 655360 events.
[15:30:01.459] INFO: 655360 events read in total (12454ms).
[15:30:01.531] INFO: Test took 207895ms.
[15:30:01.635] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:30:01.999] INFO: Expecting 655360 events.
[15:30:15.169] INFO: 655360 events read in total (12391ms).
[15:30:15.179] INFO: Expecting 655360 events.
[15:30:28.177] INFO: 655360 events read in total (12409ms).
[15:30:28.191] INFO: Expecting 655360 events.
[15:30:41.151] INFO: 655360 events read in total (12371ms).
[15:30:41.170] INFO: Expecting 655360 events.
[15:30:54.092] INFO: 655360 events read in total (12340ms).
[15:30:54.117] INFO: Expecting 655360 events.
[15:31:07.126] INFO: 655360 events read in total (12428ms).
[15:31:07.154] INFO: Expecting 655360 events.
[15:31:20.141] INFO: 655360 events read in total (12419ms).
[15:31:20.171] INFO: Expecting 655360 events.
[15:31:33.201] INFO: 655360 events read in total (12458ms).
[15:31:33.239] INFO: Expecting 655360 events.
[15:31:46.245] INFO: 655360 events read in total (12454ms).
[15:31:46.284] INFO: Expecting 655360 events.
[15:31:59.275] INFO: 655360 events read in total (12435ms).
[15:31:59.322] INFO: Expecting 655360 events.
[15:32:12.291] INFO: 655360 events read in total (12418ms).
[15:32:12.340] INFO: Expecting 655360 events.
[15:32:25.230] INFO: 655360 events read in total (12344ms).
[15:32:25.286] INFO: Expecting 655360 events.
[15:32:38.256] INFO: 655360 events read in total (12419ms).
[15:32:38.317] INFO: Expecting 655360 events.
[15:32:51.343] INFO: 655360 events read in total (12485ms).
[15:32:51.404] INFO: Expecting 655360 events.
[15:33:04.393] INFO: 655360 events read in total (12457ms).
[15:33:04.463] INFO: Expecting 655360 events.
[15:33:17.340] INFO: 655360 events read in total (12350ms).
[15:33:17.409] INFO: Expecting 655360 events.
[15:33:30.247] INFO: 655360 events read in total (12310ms).
[15:33:30.320] INFO: Test took 208685ms.
[15:33:30.515] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.521] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.527] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.533] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.540] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.546] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.552] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.558] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.564] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.570] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.577] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.582] INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[15:33:30.584] INFO: safety margin for low PH: adding 1, margin is now 21
[15:33:30.589] INFO: For ROC 10: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[15:33:30.591] INFO: safety margin for low PH: adding 2, margin is now 22
[15:33:30.597] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.603] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.609] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.615] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.621] INFO: safety margin for low PH: adding 0, margin is now 20
[15:33:30.695] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C0.dat
[15:33:30.695] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C1.dat
[15:33:30.695] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C2.dat
[15:33:30.695] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C3.dat
[15:33:30.696] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C4.dat
[15:33:30.696] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C5.dat
[15:33:30.696] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C6.dat
[15:33:30.696] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C7.dat
[15:33:30.696] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C8.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C9.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C10.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C11.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C12.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C13.dat
[15:33:30.697] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C14.dat
[15:33:30.698] INFO: write dac parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/dacParameters35_C15.dat
[15:33:31.027] INFO: Expecting 41600 events.
[15:33:35.244] INFO: 41600 events read in total (3438ms).
[15:33:35.244] INFO: Test took 4542ms.
[15:33:35.968] INFO: Expecting 41600 events.
[15:33:40.124] INFO: 41600 events read in total (3377ms).
[15:33:40.125] INFO: Test took 4492ms.
[15:33:40.847] INFO: Expecting 41600 events.
[15:33:45.077] INFO: 41600 events read in total (3451ms).
[15:33:45.077] INFO: Test took 4555ms.
[15:33:45.469] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:45.604] INFO: Expecting 2560 events.
[15:33:46.633] INFO: 2560 events read in total (250ms).
[15:33:46.633] INFO: Test took 1164ms.
[15:33:46.636] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:47.207] INFO: Expecting 2560 events.
[15:33:48.235] INFO: 2560 events read in total (249ms).
[15:33:48.235] INFO: Test took 1599ms.
[15:33:48.238] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:48.809] INFO: Expecting 2560 events.
[15:33:49.838] INFO: 2560 events read in total (250ms).
[15:33:49.838] INFO: Test took 1600ms.
[15:33:49.841] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:50.412] INFO: Expecting 2560 events.
[15:33:51.440] INFO: 2560 events read in total (248ms).
[15:33:51.441] INFO: Test took 1600ms.
[15:33:51.444] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:52.015] INFO: Expecting 2560 events.
[15:33:53.043] INFO: 2560 events read in total (249ms).
[15:33:53.044] INFO: Test took 1600ms.
[15:33:53.047] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:53.618] INFO: Expecting 2560 events.
[15:33:54.647] INFO: 2560 events read in total (250ms).
[15:33:54.647] INFO: Test took 1600ms.
[15:33:54.650] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:55.223] INFO: Expecting 2560 events.
[15:33:56.251] INFO: 2560 events read in total (250ms).
[15:33:56.251] INFO: Test took 1601ms.
[15:33:56.254] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:56.826] INFO: Expecting 2560 events.
[15:33:57.855] INFO: 2560 events read in total (250ms).
[15:33:57.855] INFO: Test took 1601ms.
[15:33:57.858] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:33:58.430] INFO: Expecting 2560 events.
[15:33:59.457] INFO: 2560 events read in total (248ms).
[15:33:59.458] INFO: Test took 1600ms.
[15:33:59.461] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:00.032] INFO: Expecting 2560 events.
[15:34:01.060] INFO: 2560 events read in total (249ms).
[15:34:01.060] INFO: Test took 1600ms.
[15:34:01.063] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:01.635] INFO: Expecting 2560 events.
[15:34:02.663] INFO: 2560 events read in total (249ms).
[15:34:02.664] INFO: Test took 1601ms.
[15:34:02.667] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:03.238] INFO: Expecting 2560 events.
[15:34:04.266] INFO: 2560 events read in total (249ms).
[15:34:04.266] INFO: Test took 1600ms.
[15:34:04.269] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:04.840] INFO: Expecting 2560 events.
[15:34:05.867] INFO: 2560 events read in total (248ms).
[15:34:05.867] INFO: Test took 1598ms.
[15:34:05.870] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:06.442] INFO: Expecting 2560 events.
[15:34:07.471] INFO: 2560 events read in total (250ms).
[15:34:07.471] INFO: Test took 1601ms.
[15:34:07.474] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:08.046] INFO: Expecting 2560 events.
[15:34:09.075] INFO: 2560 events read in total (250ms).
[15:34:09.076] INFO: Test took 1602ms.
[15:34:09.079] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:09.651] INFO: Expecting 2560 events.
[15:34:10.679] INFO: 2560 events read in total (249ms).
[15:34:10.679] INFO: Test took 1600ms.
[15:34:10.682] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:11.254] INFO: Expecting 2560 events.
[15:34:12.284] INFO: 2560 events read in total (251ms).
[15:34:12.284] INFO: Test took 1602ms.
[15:34:12.288] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:12.859] INFO: Expecting 2560 events.
[15:34:13.887] INFO: 2560 events read in total (250ms).
[15:34:13.887] INFO: Test took 1600ms.
[15:34:13.890] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:14.462] INFO: Expecting 2560 events.
[15:34:15.491] INFO: 2560 events read in total (250ms).
[15:34:15.491] INFO: Test took 1601ms.
[15:34:15.494] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:16.066] INFO: Expecting 2560 events.
[15:34:17.096] INFO: 2560 events read in total (251ms).
[15:34:17.096] INFO: Test took 1602ms.
[15:34:17.099] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:17.670] INFO: Expecting 2560 events.
[15:34:18.698] INFO: 2560 events read in total (249ms).
[15:34:18.698] INFO: Test took 1599ms.
[15:34:18.701] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:19.274] INFO: Expecting 2560 events.
[15:34:20.302] INFO: 2560 events read in total (249ms).
[15:34:20.303] INFO: Test took 1602ms.
[15:34:20.306] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:20.878] INFO: Expecting 2560 events.
[15:34:21.906] INFO: 2560 events read in total (249ms).
[15:34:21.906] INFO: Test took 1600ms.
[15:34:21.909] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:22.481] INFO: Expecting 2560 events.
[15:34:23.509] INFO: 2560 events read in total (249ms).
[15:34:23.510] INFO: Test took 1601ms.
[15:34:23.513] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:24.085] INFO: Expecting 2560 events.
[15:34:25.112] INFO: 2560 events read in total (248ms).
[15:34:25.113] INFO: Test took 1600ms.
[15:34:25.116] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:25.688] INFO: Expecting 2560 events.
[15:34:26.716] INFO: 2560 events read in total (249ms).
[15:34:26.716] INFO: Test took 1600ms.
[15:34:26.719] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:27.290] INFO: Expecting 2560 events.
[15:34:28.319] INFO: 2560 events read in total (250ms).
[15:34:28.319] INFO: Test took 1600ms.
[15:34:28.322] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:28.893] INFO: Expecting 2560 events.
[15:34:29.921] INFO: 2560 events read in total (249ms).
[15:34:29.921] INFO: Test took 1600ms.
[15:34:29.925] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:30.496] INFO: Expecting 2560 events.
[15:34:31.525] INFO: 2560 events read in total (250ms).
[15:34:31.526] INFO: Test took 1602ms.
[15:34:31.529] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:32.099] INFO: Expecting 2560 events.
[15:34:33.129] INFO: 2560 events read in total (251ms).
[15:34:33.129] INFO: Test took 1601ms.
[15:34:33.132] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:33.704] INFO: Expecting 2560 events.
[15:34:34.732] INFO: 2560 events read in total (249ms).
[15:34:34.732] INFO: Test took 1600ms.
[15:34:34.735] INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:34:35.306] INFO: Expecting 2560 events.
[15:34:36.334] INFO: 2560 events read in total (249ms).
[15:34:36.335] INFO: Test took 1600ms.
[15:34:37.171] INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[15:34:37.171] INFO: PH scale (per ROC): 71 67 75 66 79 77 72 78 74 80 77 67 77 79 77 80
[15:34:37.171] INFO: PH offset (per ROC): 187 194 194 176 171 175 158 176 166 174 176 200 157 172 161 184
[15:34:37.180] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:37.180] INFO: Decoding statistics:
[15:34:37.180] INFO: General information:
[15:34:37.180] INFO: 16bit words read: 66448
[15:34:37.180] INFO: valid events total: 5120
[15:34:37.180] INFO: empty events: 2616
[15:34:37.180] INFO: valid events with pixels: 2504
[15:34:37.180] INFO: valid pixel hits: 2504
[15:34:37.180] INFO: Event errors: 0
[15:34:37.180] INFO: start marker: 0
[15:34:37.180] INFO: stop marker: 0
[15:34:37.180] INFO: overflow: 0
[15:34:37.180] INFO: invalid 5bit words: 0
[15:34:37.180] INFO: invalid XOR eye diagram: 0
[15:34:37.180] INFO: TBM errors: 0
[15:34:37.180] INFO: flawed TBM headers: 0
[15:34:37.180] INFO: flawed TBM trailers: 0
[15:34:37.180] INFO: event ID mismatches: 0
[15:34:37.180] INFO: ROC errors: 0
[15:34:37.180] INFO: missing ROC header(s): 0
[15:34:37.180] INFO: misplaced readback start: 0
[15:34:37.180] INFO: Pixel decoding errors: 0
[15:34:37.181] INFO: pixel data incomplete: 0
[15:34:37.181] INFO: pixel address: 0
[15:34:37.181] INFO: pulse height fill bit: 0
[15:34:37.181] INFO: buffer corruption: 0
[15:34:37.348] INFO: ######################################################################
[15:34:37.348] INFO: PixTestGainPedestal::fullTest() ntrig = 1
[15:34:37.348] INFO: ######################################################################
[15:34:37.365] INFO: scanning low vcal = 10
[15:34:37.692] INFO: Expecting 4160 events.
[15:34:40.567] INFO: 4160 events read in total (2096ms).
[15:34:40.567] INFO: Test took 3202ms.
[15:34:40.570] INFO: scanning low vcal = 20
[15:34:41.142] INFO: Expecting 4160 events.
[15:34:44.018] INFO: 4160 events read in total (2097ms).
[15:34:44.018] INFO: Test took 3448ms.
[15:34:44.020] INFO: scanning low vcal = 30
[15:34:44.593] INFO: Expecting 4160 events.
[15:34:47.474] INFO: 4160 events read in total (2102ms).
[15:34:47.475] INFO: Test took 3455ms.
[15:34:47.477] INFO: scanning low vcal = 40
[15:34:48.048] INFO: Expecting 4160 events.
[15:34:50.992] INFO: 4160 events read in total (2165ms).
[15:34:50.993] INFO: Test took 3516ms.
[15:34:50.996] INFO: scanning low vcal = 50
[15:34:51.542] INFO: Expecting 4160 events.
[15:34:54.488] INFO: 4160 events read in total (2167ms).
[15:34:54.488] INFO: Test took 3492ms.
[15:34:54.492] INFO: scanning low vcal = 60
[15:34:55.037] INFO: Expecting 4160 events.
[15:34:57.980] INFO: 4160 events read in total (2164ms).
[15:34:57.980] INFO: Test took 3488ms.
[15:34:57.984] INFO: scanning low vcal = 70
[15:34:58.531] INFO: Expecting 4160 events.
[15:35:01.486] INFO: 4160 events read in total (2177ms).
[15:35:01.487] INFO: Test took 3503ms.
[15:35:01.490] INFO: scanning low vcal = 80
[15:35:02.039] INFO: Expecting 4160 events.
[15:35:04.997] INFO: 4160 events read in total (2179ms).
[15:35:04.998] INFO: Test took 3508ms.
[15:35:04.001] INFO: scanning low vcal = 90
[15:35:05.544] INFO: Expecting 4160 events.
[15:35:08.574] INFO: 4160 events read in total (2251ms).
[15:35:08.574] INFO: Test took 3573ms.
[15:35:08.578] INFO: scanning low vcal = 100
[15:35:09.121] INFO: Expecting 4160 events.
[15:35:12.068] INFO: 4160 events read in total (2168ms).
[15:35:12.069] INFO: Test took 3491ms.
[15:35:12.073] INFO: scanning low vcal = 110
[15:35:12.620] INFO: Expecting 4160 events.
[15:35:15.570] INFO: 4160 events read in total (2172ms).
[15:35:15.570] INFO: Test took 3496ms.
[15:35:15.574] INFO: scanning low vcal = 120
[15:35:16.117] INFO: Expecting 4160 events.
[15:35:19.071] INFO: 4160 events read in total (2175ms).
[15:35:19.072] INFO: Test took 3498ms.
[15:35:19.075] INFO: scanning low vcal = 130
[15:35:19.616] INFO: Expecting 4160 events.
[15:35:22.566] INFO: 4160 events read in total (2171ms).
[15:35:22.567] INFO: Test took 3492ms.
[15:35:22.570] INFO: scanning low vcal = 140
[15:35:23.113] INFO: Expecting 4160 events.
[15:35:26.060] INFO: 4160 events read in total (2168ms).
[15:35:26.061] INFO: Test took 3491ms.
[15:35:26.065] INFO: scanning low vcal = 150
[15:35:26.610] INFO: Expecting 4160 events.
[15:35:29.551] INFO: 4160 events read in total (2162ms).
[15:35:29.551] INFO: Test took 3486ms.
[15:35:29.555] INFO: scanning low vcal = 160
[15:35:30.107] INFO: Expecting 4160 events.
[15:35:33.043] INFO: 4160 events read in total (2157ms).
[15:35:33.043] INFO: Test took 3488ms.
[15:35:33.047] INFO: scanning low vcal = 170
[15:35:33.591] INFO: Expecting 4160 events.
[15:35:36.523] INFO: 4160 events read in total (2153ms).
[15:35:36.524] INFO: Test took 3477ms.
[15:35:36.529] INFO: scanning low vcal = 180
[15:35:37.079] INFO: Expecting 4160 events.
[15:35:40.028] INFO: 4160 events read in total (2170ms).
[15:35:40.028] INFO: Test took 3499ms.
[15:35:40.032] INFO: scanning low vcal = 190
[15:35:40.578] INFO: Expecting 4160 events.
[15:35:43.530] INFO: 4160 events read in total (2173ms).
[15:35:43.530] INFO: Test took 3498ms.
[15:35:43.534] INFO: scanning low vcal = 200
[15:35:44.079] INFO: Expecting 4160 events.
[15:35:47.023] INFO: 4160 events read in total (2165ms).
[15:35:47.024] INFO: Test took 3490ms.
[15:35:47.027] INFO: scanning low vcal = 210
[15:35:47.573] INFO: Expecting 4160 events.
[15:35:50.518] INFO: 4160 events read in total (2166ms).
[15:35:50.519] INFO: Test took 3492ms.
[15:35:50.523] INFO: scanning low vcal = 220
[15:35:51.072] INFO: Expecting 4160 events.
[15:35:54.002] INFO: 4160 events read in total (2152ms).
[15:35:54.003] INFO: Test took 3480ms.
[15:35:54.006] INFO: scanning low vcal = 230
[15:35:54.557] INFO: Expecting 4160 events.
[15:35:57.485] INFO: 4160 events read in total (2149ms).
[15:35:57.485] INFO: Test took 3479ms.
[15:35:57.489] INFO: scanning low vcal = 240
[15:35:58.040] INFO: Expecting 4160 events.
[15:36:00.968] INFO: 4160 events read in total (2150ms).
[15:36:00.969] INFO: Test took 3480ms.
[15:36:00.972] INFO: scanning low vcal = 250
[15:36:01.523] INFO: Expecting 4160 events.
[15:36:04.452] INFO: 4160 events read in total (2150ms).
[15:36:04.453] INFO: Test took 3481ms.
[15:36:04.458] INFO: scanning high vcal = 30 (= 210 in low range)
[15:36:05.009] INFO: Expecting 4160 events.
[15:36:07.942] INFO: 4160 events read in total (2155ms).
[15:36:07.943] INFO: Test took 3485ms.
[15:36:07.946] INFO: scanning high vcal = 50 (= 350 in low range)
[15:36:08.497] INFO: Expecting 4160 events.
[15:36:11.426] INFO: 4160 events read in total (2150ms).
[15:36:11.426] INFO: Test took 3480ms.
[15:36:11.430] INFO: scanning high vcal = 70 (= 490 in low range)
[15:36:11.980] INFO: Expecting 4160 events.
[15:36:14.916] INFO: 4160 events read in total (2157ms).
[15:36:14.917] INFO: Test took 3487ms.
[15:36:14.921] INFO: scanning high vcal = 90 (= 630 in low range)
[15:36:15.471] INFO: Expecting 4160 events.
[15:36:18.485] INFO: 4160 events read in total (2235ms).
[15:36:18.485] INFO: Test took 3564ms.
[15:36:18.489] INFO: scanning high vcal = 200 (= 1400 in low range)
[15:36:19.039] INFO: Expecting 4160 events.
[15:36:21.973] INFO: 4160 events read in total (2155ms).
[15:36:21.974] INFO: Test took 3485ms.
[15:36:22.476] INFO: PixTestGainPedestal::measure() done
[15:36:56.239] INFO: PixTestGainPedestal::fit() done
[15:36:56.239] INFO: non-linearity mean: 0.956 0.956 0.955 0.950 0.953 0.952 0.946 0.954 0.952 0.955 0.954 0.952 0.948 0.950 0.952 0.953
[15:36:56.239] INFO: non-linearity RMS: 0.007 0.007 0.008 0.008 0.007 0.007 0.008 0.008 0.008 0.006 0.006 0.010 0.006 0.007 0.007 0.007
[15:36:56.239] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C0.dat
[15:36:56.263] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C1.dat
[15:36:56.281] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C2.dat
[15:36:56.300] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C3.dat
[15:36:56.318] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C4.dat
[15:36:56.337] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C5.dat
[15:36:56.355] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C6.dat
[15:36:56.373] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C7.dat
[15:36:56.392] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C8.dat
[15:36:56.410] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C9.dat
[15:36:56.428] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C10.dat
[15:36:56.447] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C11.dat
[15:36:56.465] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C12.dat
[15:36:56.484] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C13.dat
[15:36:56.502] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C14.dat
[15:36:56.520] INFO: write gain/ped parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/phCalibrationFitErr35_C15.dat
[15:36:56.539] INFO: PixTestGainPedestal::doTest() done, duration: 139 seconds
[15:36:56.539] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:56.539] INFO: Decoding statistics:
[15:36:56.539] INFO: General information:
[15:36:56.539] INFO: 16bit words read: 232950
[15:36:56.539] INFO: valid events total: 8320
[15:36:56.539] INFO: empty events: 0
[15:36:56.539] INFO: valid events with pixels: 8320
[15:36:56.539] INFO: valid pixel hits: 66555
[15:36:56.539] INFO: Event errors: 0
[15:36:56.539] INFO: start marker: 0
[15:36:56.539] INFO: stop marker: 0
[15:36:56.539] INFO: overflow: 0
[15:36:56.539] INFO: invalid 5bit words: 0
[15:36:56.539] INFO: invalid XOR eye diagram: 0
[15:36:56.539] INFO: TBM errors: 0
[15:36:56.539] INFO: flawed TBM headers: 0
[15:36:56.539] INFO: flawed TBM trailers: 0
[15:36:56.539] INFO: event ID mismatches: 0
[15:36:56.539] INFO: ROC errors: 0
[15:36:56.539] INFO: missing ROC header(s): 0
[15:36:56.539] INFO: misplaced readback start: 0
[15:36:56.539] INFO: Pixel decoding errors: 0
[15:36:56.539] INFO: pixel data incomplete: 0
[15:36:56.539] INFO: pixel address: 0
[15:36:56.539] INFO: pulse height fill bit: 0
[15:36:56.539] INFO: buffer corruption: 0
[15:36:56.545] INFO: readReadbackCal: M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C0.dat .. M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C15.dat
[15:36:56.556] INFO: ######################################################################
[15:36:56.556] INFO: PixTestTrim::doTest()
[15:36:56.556] INFO: ######################################################################
[15:36:56.557] INFO: PixTestReadback::RES sent once
[15:37:09.212] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C0.dat
[15:37:09.212] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C1.dat
[15:37:09.212] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C2.dat
[15:37:09.212] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C3.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C4.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C5.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C6.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C7.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C8.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C9.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C10.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C11.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C12.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C13.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C14.dat
[15:37:09.213] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C15.dat
[15:37:09.260] INFO: PixTestPattern:: pg_setup set to default.
[15:37:09.260] INFO: PixTestReadback::RES sent once
[15:37:21.884] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C0.dat
[15:37:21.884] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C1.dat
[15:37:21.884] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C2.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C3.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C4.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C5.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C6.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C7.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C8.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C9.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C10.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C11.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C12.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C13.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C14.dat
[15:37:21.885] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C15.dat
[15:37:21.932] INFO: PixTestPattern:: pg_setup set to default.
[15:37:21.932] INFO: PixTestReadback::RES sent once
[15:37:31.642] INFO: PixTestPattern:: pg_setup set to default.
[15:37:31.642] INFO: Vbg will be calibrated using Vd calibration
[15:37:31.642] INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153calibrated Vbg = 1.21734 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.6calibrated Vbg = 1.21413 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.3calibrated Vbg = 1.22725 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.2calibrated Vbg = 1.22697 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 144.8calibrated Vbg = 1.23067 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.4calibrated Vbg = 1.23416 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 150calibrated Vbg = 1.23778 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.1calibrated Vbg = 1.23215 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.5calibrated Vbg = 1.22938 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 145.5calibrated Vbg = 1.23514 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.5calibrated Vbg = 1.22983 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 162.9calibrated Vbg = 1.23241 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 145.6calibrated Vbg = 1.21392 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.7calibrated Vbg = 1.21367 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.8calibrated Vbg = 1.21837 :::*/*/*/*/
[15:37:31.642] INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.4calibrated Vbg = 1.21322 :::*/*/*/*/
[15:37:31.646] INFO: PixTestReadback::RES sent once
[15:40:42.177] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C0.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C1.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C2.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C3.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C4.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C5.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C6.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C7.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C8.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C9.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C10.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C11.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C12.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C13.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C14.dat
[15:40:42.178] INFO: write readback calibration parameters into M4076_FullQualification_2015-11-12_10h21m_1447320084/005_Fulltest_p17/readbackCal_C15.dat
[15:40:42.224] INFO: PixTestPattern:: pg_setup set to default.
[15:40:42.226] INFO: PixTestReadback::doTest() done
[15:40:42.226] INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:42.226] INFO: Decoding statistics:
[15:40:42.226] INFO: General information:
[15:40:42.226] INFO: 16bit words read: 768
[15:40:42.226] INFO: valid events total: 64
[15:40:42.226] INFO: empty events: 64
[15:40:42.226] INFO: valid events with pixels: 0
[15:40:42.226] INFO: valid pixel hits: 0
[15:40:42.226] INFO: Event errors: 0
[15:40:42.226] INFO: start marker: 0
[15:40:42.226] INFO: stop marker: 0
[15:40:42.226] INFO: overflow: 0
[15:40:42.226] INFO: invalid 5bit words: 0
[15:40:42.226] INFO: invalid XOR eye diagram: 0
[15:40:42.226] INFO: TBM errors: 0
[15:40:42.226] INFO: flawed TBM headers: 0
[15:40:42.226] INFO: flawed TBM trailers: 0
[15:40:42.226] INFO: event ID mismatches: 0
[15:40:42.226] INFO: ROC errors: 0
[15:40:42.226] INFO: missing ROC header(s): 0
[15:40:42.226] INFO: misplaced readback start: 0
[15:40:42.226] INFO: Pixel decoding errors: 0
[15:40:42.226] INFO: pixel data incomplete: 0
[15:40:42.226] INFO: pixel address: 0
[15:40:42.226] INFO: pulse height fill bit: 0
[15:40:42.226] INFO: buffer corruption: 0
[15:40:42.244] INFO: Decoding statistics:
[15:40:42.244] INFO: General information:
[15:40:42.244] INFO: 16bit words read: 300166
[15:40:42.244] INFO: valid events total: 13504
[15:40:42.244] INFO: empty events: 2680
[15:40:42.244] INFO: valid events with pixels: 10824
[15:40:42.244] INFO: valid pixel hits: 69059
[15:40:42.244] INFO: Event errors: 0
[15:40:42.244] INFO: start marker: 0
[15:40:42.244] INFO: stop marker: 0
[15:40:42.244] INFO: overflow: 0
[15:40:42.244] INFO: invalid 5bit words: 0
[15:40:42.244] INFO: invalid XOR eye diagram: 0
[15:40:42.244] INFO: TBM errors: 0
[15:40:42.244] INFO: flawed TBM headers: 0
[15:40:42.244] INFO: flawed TBM trailers: 0
[15:40:42.244] INFO: event ID mismatches: 0
[15:40:42.244] INFO: ROC errors: 0
[15:40:42.244] INFO: missing ROC header(s): 0
[15:40:42.244] INFO: misplaced readback start: 0
[15:40:42.244] INFO: Pixel decoding errors: 0
[15:40:42.244] INFO: pixel data incomplete: 0
[15:40:42.244] INFO: pixel address: 0
[15:40:42.244] INFO: pulse height fill bit: 0
[15:40:42.244] INFO: buffer corruption: 0
[15:40:42.244] INFO: enter test to run
[15:40:42.244] INFO: test: BB2 no parameter change
[15:40:42.244] INFO: running: bb2
[15:40:42.246] INFO: ######################################################################
[15:40:42.246] INFO: PixTestBB2Map::doTest() Ntrig = 16, VcalS = 255, PlWidth = 35
[15:40:42.246] INFO: ######################################################################
[15:40:42.248] INFO: ----------------------------------------------------------------------
[15:40:42.248] INFO: PixTestBB2Map::setVana() target Ia = 30 mA/ROC
[15:40:42.248] INFO: ----------------------------------------------------------------------
[15:40:47.350] INFO: PixTestBB2Map::setVana() done, Module Ia 482.4 mA = 30.15 mA/ROC
[15:40:47.352] INFO: ----------------------------------------------------------------------
[15:40:47.352] INFO: PixTestBB2Map::setVthrCompCalDel()
[15:40:47.352] INFO: ----------------------------------------------------------------------
[15:40:47.495] INFO: Expecting 1048576 events.
[15:40:58.706] ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (1) != Token Chain Length (8)

[15:40:58.708] ERROR: <datapipe.cc/CheckEventID:L457> Channel 0 Event ID mismatch: local ID (21) != TBM ID (66)

[15:41:08.805] INFO: 1048576 events read in total (20531ms).
[15:41:08.812] INFO: Test took 21455ms.
[15:41:09.253] INFO: PixTestBB2Map::setVthrCompCalDel() done
[15:41:09.253] INFO: CalDel: 116 133 127 119 121 122 113 125 136 116 123 167 116 134 121 108
[15:41:09.253] INFO: VthrComp: 131 121 120 126 125 128 110 125 111 116 121 114 104 119 114 120
[15:41:09.589] INFO: Expecting 8519680 events.
[15:41:39.595] INFO: 1327504 events read in total (29227ms).
[15:42:08.696] INFO: 2640384 events read in total (58328ms).
[15:42:37.715] INFO: 3945424 events read in total (87348ms).
[15:43:06.722] INFO: 5250416 events read in total (116354ms).
[15:43:35.284] INFO: 6563680 events read in total (144916ms).
[15:44:04.499] INFO: 7888464 events read in total (174131ms).
[15:44:18.638] INFO: 8519680 events read in total (188270ms).
[15:44:18.670] INFO: Test took 189401ms.
[15:44:19.307] INFO: Missing Bumps: 2 0 0 0 1 0 1 31 0 1 1 5 0 0 0 16
[15:44:19.307] INFO: Separation Cut: 45.00 39.03 39.98 30.66 33.53 42.34 45.00 43.07 40.60 43.26 43.22 45.00 39.58 40.32 37.36 45.00
[15:44:19.307] INFO: PixTestBB2Map::doTest() done,217 seconds
[15:44:19.616] INFO: enter test to run
[15:44:19.616] INFO: test: q no parameter change
[15:44:20.283] QUIET: Connection to board 74 closed.
[15:44:20.299] INFO: pXar: this is the end, my friend
MoReWeb-v0.6.7-111-gcc5e703 on branch 20151208_Readback