[21:20:38.400] <TB2> INFO: *** Welcome to pxar ***
[21:20:38.400] <TB2> INFO: *** Today: 2016/10/14
[21:20:38.407] <TB2> INFO: *** Version: c8ba-dirty
[21:20:38.407] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C15.dat
[21:20:38.408] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C1b.dat
[21:20:38.408] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//defaultMaskFile.dat
[21:20:38.408] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters_C15.dat
[21:20:38.474] <TB2> INFO: clk: 4
[21:20:38.474] <TB2> INFO: ctr: 4
[21:20:38.474] <TB2> INFO: sda: 19
[21:20:38.474] <TB2> INFO: tin: 9
[21:20:38.474] <TB2> INFO: level: 15
[21:20:38.474] <TB2> INFO: triggerdelay: 0
[21:20:38.474] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[21:20:38.474] <TB2> INFO: Log level: INFO
[21:20:38.482] <TB2> INFO: Found DTB DTB_WWXUD2
[21:20:38.489] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[21:20:38.491] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[21:20:38.493] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[21:20:39.994] <TB2> INFO: DUT info:
[21:20:39.994] <TB2> INFO: The DUT currently contains the following objects:
[21:20:39.994] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[21:20:39.994] <TB2> INFO: TBM Core alpha (0): 7 registers set
[21:20:39.994] <TB2> INFO: TBM Core beta (1): 7 registers set
[21:20:39.995] <TB2> INFO: TBM Core alpha (2): 7 registers set
[21:20:39.995] <TB2> INFO: TBM Core beta (3): 7 registers set
[21:20:39.995] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[21:20:39.995] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:39.995] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[21:20:40.396] <TB2> INFO: enter 'restricted' command line mode
[21:20:40.396] <TB2> INFO: enter test to run
[21:20:40.396] <TB2> INFO: test: pretest no parameter change
[21:20:40.396] <TB2> INFO: running: pretest
[21:20:40.403] <TB2> INFO: ######################################################################
[21:20:40.403] <TB2> INFO: PixTestPretest::doTest()
[21:20:40.403] <TB2> INFO: ######################################################################
[21:20:40.405] <TB2> INFO: ----------------------------------------------------------------------
[21:20:40.405] <TB2> INFO: PixTestPretest::programROC()
[21:20:40.405] <TB2> INFO: ----------------------------------------------------------------------
[21:20:58.419] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[21:20:58.419] <TB2> INFO: IA differences per ROC: 19.3 17.7 18.5 19.3 18.5 19.3 20.1 19.3 19.3 18.5 21.7 20.1 18.5 20.1 20.1 19.3
[21:20:58.484] <TB2> INFO: ----------------------------------------------------------------------
[21:20:58.484] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[21:20:58.484] <TB2> INFO: ----------------------------------------------------------------------
[21:21:03.366] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[21:21:03.366] <TB2> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 18.5 20.1 19.3 20.1 20.1 19.3 19.3 19.3 20.1 19.3 19.3 19.3 19.3
[21:21:03.401] <TB2> INFO: ----------------------------------------------------------------------
[21:21:03.401] <TB2> INFO: PixTestPretest::findTiming()
[21:21:03.401] <TB2> INFO: ----------------------------------------------------------------------
[21:21:03.401] <TB2> INFO: PixTestCmd::init()

[21:21:35.557] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[21:21:35.557] <TB2> INFO: (success/tries = 100/100), width = 4
[21:21:37.062] <TB2> INFO: ----------------------------------------------------------------------
[21:21:37.062] <TB2> INFO: PixTestPretest::findWorkingPixel()
[21:21:37.062] <TB2> INFO: ----------------------------------------------------------------------
[21:21:37.157] <TB2> INFO: Expecting 231680 events.
[21:21:47.090] <TB2> INFO: 231680 events read in total (9341ms).
[21:21:47.098] <TB2> INFO: Test took 10031ms.
[21:21:47.348] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[21:21:47.383] <TB2> INFO: ----------------------------------------------------------------------
[21:21:47.384] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[21:21:47.384] <TB2> INFO: ----------------------------------------------------------------------
[21:21:47.478] <TB2> INFO: Expecting 231680 events.
[21:21:57.502] <TB2> INFO: 231680 events read in total (9432ms).
[21:21:57.511] <TB2> INFO: Test took 10122ms.
[21:21:57.778] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[21:21:57.778] <TB2> INFO: CalDel: 94 88 97 78 89 99 90 95 97 109 91 91 95 94 102 91
[21:21:57.778] <TB2> INFO: VthrComp: 51 51 51 52 51 51 51 51 54 51 51 53 55 51 51 51
[21:21:57.782] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C0.dat
[21:21:57.782] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C1.dat
[21:21:57.783] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C2.dat
[21:21:57.783] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C3.dat
[21:21:57.783] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C4.dat
[21:21:57.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C5.dat
[21:21:57.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C6.dat
[21:21:57.784] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C7.dat
[21:21:57.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C8.dat
[21:21:57.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C9.dat
[21:21:57.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C10.dat
[21:21:57.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C11.dat
[21:21:57.785] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C12.dat
[21:21:57.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C13.dat
[21:21:57.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C14.dat
[21:21:57.786] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters_C15.dat
[21:21:57.786] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C0a.dat
[21:21:57.786] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C0b.dat
[21:21:57.786] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C1a.dat
[21:21:57.787] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//tbmParameters_C1b.dat
[21:21:57.787] <TB2> INFO: PixTestPretest::doTest() done, duration: 77 seconds
[21:21:57.839] <TB2> INFO: enter test to run
[21:21:57.839] <TB2> INFO: test: FullTest no parameter change
[21:21:57.839] <TB2> INFO: running: fulltest
[21:21:57.839] <TB2> INFO: ######################################################################
[21:21:57.839] <TB2> INFO: PixTestFullTest::doTest()
[21:21:57.839] <TB2> INFO: ######################################################################
[21:21:57.840] <TB2> INFO: ######################################################################
[21:21:57.840] <TB2> INFO: PixTestAlive::doTest()
[21:21:57.841] <TB2> INFO: ######################################################################
[21:21:57.842] <TB2> INFO: ----------------------------------------------------------------------
[21:21:57.842] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[21:21:57.842] <TB2> INFO: ----------------------------------------------------------------------
[21:21:58.086] <TB2> INFO: Expecting 41600 events.
[21:22:01.570] <TB2> INFO: 41600 events read in total (2893ms).
[21:22:01.570] <TB2> INFO: Test took 3727ms.
[21:22:01.799] <TB2> INFO: PixTestAlive::aliveTest() done
[21:22:01.799] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[21:22:01.801] <TB2> INFO: ----------------------------------------------------------------------
[21:22:01.801] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[21:22:01.801] <TB2> INFO: ----------------------------------------------------------------------
[21:22:02.045] <TB2> INFO: Expecting 41600 events.
[21:22:05.048] <TB2> INFO: 41600 events read in total (2411ms).
[21:22:05.048] <TB2> INFO: Test took 3246ms.
[21:22:05.048] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[21:22:05.288] <TB2> INFO: PixTestAlive::maskTest() done
[21:22:05.289] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[21:22:05.290] <TB2> INFO: ----------------------------------------------------------------------
[21:22:05.290] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[21:22:05.290] <TB2> INFO: ----------------------------------------------------------------------
[21:22:05.579] <TB2> INFO: Expecting 41600 events.
[21:22:09.086] <TB2> INFO: 41600 events read in total (2915ms).
[21:22:09.087] <TB2> INFO: Test took 3795ms.
[21:22:09.319] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[21:22:09.319] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[21:22:09.319] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[21:22:09.319] <TB2> INFO: Decoding statistics:
[21:22:09.319] <TB2> INFO: General information:
[21:22:09.319] <TB2> INFO: 16bit words read: 0
[21:22:09.319] <TB2> INFO: valid events total: 0
[21:22:09.319] <TB2> INFO: empty events: 0
[21:22:09.319] <TB2> INFO: valid events with pixels: 0
[21:22:09.319] <TB2> INFO: valid pixel hits: 0
[21:22:09.319] <TB2> INFO: Event errors: 0
[21:22:09.319] <TB2> INFO: start marker: 0
[21:22:09.319] <TB2> INFO: stop marker: 0
[21:22:09.319] <TB2> INFO: overflow: 0
[21:22:09.319] <TB2> INFO: invalid 5bit words: 0
[21:22:09.319] <TB2> INFO: invalid XOR eye diagram: 0
[21:22:09.319] <TB2> INFO: frame (failed synchr.): 0
[21:22:09.319] <TB2> INFO: idle data (no TBM trl): 0
[21:22:09.319] <TB2> INFO: no data (only TBM hdr): 0
[21:22:09.319] <TB2> INFO: TBM errors: 0
[21:22:09.319] <TB2> INFO: flawed TBM headers: 0
[21:22:09.319] <TB2> INFO: flawed TBM trailers: 0
[21:22:09.319] <TB2> INFO: event ID mismatches: 0
[21:22:09.319] <TB2> INFO: ROC errors: 0
[21:22:09.320] <TB2> INFO: missing ROC header(s): 0
[21:22:09.320] <TB2> INFO: misplaced readback start: 0
[21:22:09.320] <TB2> INFO: Pixel decoding errors: 0
[21:22:09.320] <TB2> INFO: pixel data incomplete: 0
[21:22:09.320] <TB2> INFO: pixel address: 0
[21:22:09.320] <TB2> INFO: pulse height fill bit: 0
[21:22:09.320] <TB2> INFO: buffer corruption: 0
[21:22:09.329] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C15.dat
[21:22:09.329] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[21:22:09.330] <TB2> INFO: ######################################################################
[21:22:09.330] <TB2> INFO: PixTestReadback::doTest()
[21:22:09.330] <TB2> INFO: ######################################################################
[21:22:09.330] <TB2> INFO: ----------------------------------------------------------------------
[21:22:09.330] <TB2> INFO: PixTestReadback::CalibrateVd()
[21:22:09.330] <TB2> INFO: ----------------------------------------------------------------------
[21:22:19.292] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C0.dat
[21:22:19.292] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C1.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C2.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C3.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C4.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C5.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C6.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C7.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C8.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C9.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C10.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C11.dat
[21:22:19.293] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C12.dat
[21:22:19.294] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C13.dat
[21:22:19.294] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C14.dat
[21:22:19.294] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C15.dat
[21:22:19.326] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:22:19.326] <TB2> INFO: ----------------------------------------------------------------------
[21:22:19.326] <TB2> INFO: PixTestReadback::CalibrateVa()
[21:22:19.326] <TB2> INFO: ----------------------------------------------------------------------
[21:22:29.256] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C0.dat
[21:22:29.256] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C1.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C2.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C3.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C4.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C5.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C6.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C7.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C8.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C9.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C10.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C11.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C12.dat
[21:22:29.257] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C13.dat
[21:22:29.258] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C14.dat
[21:22:29.258] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C15.dat
[21:22:29.288] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:22:29.288] <TB2> INFO: ----------------------------------------------------------------------
[21:22:29.288] <TB2> INFO: PixTestReadback::readbackVbg()
[21:22:29.288] <TB2> INFO: ----------------------------------------------------------------------
[21:22:36.950] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:22:36.950] <TB2> INFO: ----------------------------------------------------------------------
[21:22:36.950] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[21:22:36.950] <TB2> INFO: ----------------------------------------------------------------------
[21:22:36.950] <TB2> INFO: Vbg will be calibrated using Vd calibration
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.4calibrated Vbg = 1.20085 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 147.9calibrated Vbg = 1.20021 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.2calibrated Vbg = 1.19628 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.7calibrated Vbg = 1.18855 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.1calibrated Vbg = 1.19002 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 158.1calibrated Vbg = 1.20459 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.1calibrated Vbg = 1.19751 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154calibrated Vbg = 1.20417 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.8calibrated Vbg = 1.19959 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.8calibrated Vbg = 1.20081 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154calibrated Vbg = 1.19307 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 162.1calibrated Vbg = 1.18652 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.1calibrated Vbg = 1.19653 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 158calibrated Vbg = 1.19708 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.4calibrated Vbg = 1.19638 :::*/*/*/*/
[21:22:36.950] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158.1calibrated Vbg = 1.20001 :::*/*/*/*/
[21:22:36.953] <TB2> INFO: ----------------------------------------------------------------------
[21:22:36.953] <TB2> INFO: PixTestReadback::CalibrateIa()
[21:22:36.953] <TB2> INFO: ----------------------------------------------------------------------
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C0.dat
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C1.dat
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C2.dat
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C3.dat
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C4.dat
[21:25:17.738] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C5.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C6.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C7.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C8.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C9.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C10.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C11.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C12.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C13.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C14.dat
[21:25:17.739] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//readbackCal_C15.dat
[21:25:17.769] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[21:25:17.771] <TB2> INFO: PixTestReadback::doTest() done
[21:25:17.771] <TB2> INFO: Decoding statistics:
[21:25:17.771] <TB2> INFO: General information:
[21:25:17.771] <TB2> INFO: 16bit words read: 1536
[21:25:17.771] <TB2> INFO: valid events total: 256
[21:25:17.772] <TB2> INFO: empty events: 256
[21:25:17.772] <TB2> INFO: valid events with pixels: 0
[21:25:17.772] <TB2> INFO: valid pixel hits: 0
[21:25:17.772] <TB2> INFO: Event errors: 0
[21:25:17.772] <TB2> INFO: start marker: 0
[21:25:17.772] <TB2> INFO: stop marker: 0
[21:25:17.772] <TB2> INFO: overflow: 0
[21:25:17.772] <TB2> INFO: invalid 5bit words: 0
[21:25:17.772] <TB2> INFO: invalid XOR eye diagram: 0
[21:25:17.772] <TB2> INFO: frame (failed synchr.): 0
[21:25:17.772] <TB2> INFO: idle data (no TBM trl): 0
[21:25:17.772] <TB2> INFO: no data (only TBM hdr): 0
[21:25:17.772] <TB2> INFO: TBM errors: 0
[21:25:17.772] <TB2> INFO: flawed TBM headers: 0
[21:25:17.772] <TB2> INFO: flawed TBM trailers: 0
[21:25:17.772] <TB2> INFO: event ID mismatches: 0
[21:25:17.772] <TB2> INFO: ROC errors: 0
[21:25:17.772] <TB2> INFO: missing ROC header(s): 0
[21:25:17.773] <TB2> INFO: misplaced readback start: 0
[21:25:17.773] <TB2> INFO: Pixel decoding errors: 0
[21:25:17.773] <TB2> INFO: pixel data incomplete: 0
[21:25:17.773] <TB2> INFO: pixel address: 0
[21:25:17.773] <TB2> INFO: pulse height fill bit: 0
[21:25:17.773] <TB2> INFO: buffer corruption: 0
[21:25:17.822] <TB2> INFO: ######################################################################
[21:25:17.822] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[21:25:17.822] <TB2> INFO: ######################################################################
[21:25:17.825] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[21:25:17.838] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:25:17.838] <TB2> INFO: run 1 of 1
[21:25:18.074] <TB2> INFO: Expecting 3120000 events.
[21:25:48.714] <TB2> INFO: 629690 events read in total (30048ms).











[21:26:17.864] <TB2> INFO: 1253490 events read in total (59199ms).











[21:26:47.252] <TB2> INFO: 1873215 events read in total (88586ms).











[21:27:16.682] <TB2> INFO: 2491575 events read in total (118016ms).











[21:27:46.030] <TB2> INFO: 3110740 events read in total (147364ms).
[21:27:46.862] <TB2> INFO: 3120000 events read in total (148196ms).
[21:27:46.936] <TB2> INFO: Test took 149099ms.
[21:28:12.771] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 174 seconds
[21:28:12.771] <TB2> INFO: number of dead bumps (per ROC): 24 0 2 0 7 6 4 2 4 5 0 44 1 1 3 11
[21:28:12.771] <TB2> INFO: separation cut (per ROC): 81 87 102 107 109 118 102 103 111 113 117 114 117 123 92 82
[21:28:12.771] <TB2> INFO: Decoding statistics:
[21:28:12.771] <TB2> INFO: General information:
[21:28:12.771] <TB2> INFO: 16bit words read: 0
[21:28:12.771] <TB2> INFO: valid events total: 0
[21:28:12.771] <TB2> INFO: empty events: 0
[21:28:12.771] <TB2> INFO: valid events with pixels: 0
[21:28:12.771] <TB2> INFO: valid pixel hits: 0
[21:28:12.771] <TB2> INFO: Event errors: 0
[21:28:12.771] <TB2> INFO: start marker: 0
[21:28:12.771] <TB2> INFO: stop marker: 0
[21:28:12.771] <TB2> INFO: overflow: 0
[21:28:12.771] <TB2> INFO: invalid 5bit words: 0
[21:28:12.771] <TB2> INFO: invalid XOR eye diagram: 0
[21:28:12.771] <TB2> INFO: frame (failed synchr.): 0
[21:28:12.771] <TB2> INFO: idle data (no TBM trl): 0
[21:28:12.771] <TB2> INFO: no data (only TBM hdr): 0
[21:28:12.771] <TB2> INFO: TBM errors: 0
[21:28:12.771] <TB2> INFO: flawed TBM headers: 0
[21:28:12.771] <TB2> INFO: flawed TBM trailers: 0
[21:28:12.771] <TB2> INFO: event ID mismatches: 0
[21:28:12.771] <TB2> INFO: ROC errors: 0
[21:28:12.771] <TB2> INFO: missing ROC header(s): 0
[21:28:12.771] <TB2> INFO: misplaced readback start: 0
[21:28:12.771] <TB2> INFO: Pixel decoding errors: 0
[21:28:12.771] <TB2> INFO: pixel data incomplete: 0
[21:28:12.771] <TB2> INFO: pixel address: 0
[21:28:12.771] <TB2> INFO: pulse height fill bit: 0
[21:28:12.771] <TB2> INFO: buffer corruption: 0
[21:28:12.818] <TB2> INFO: ######################################################################
[21:28:12.818] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[21:28:12.818] <TB2> INFO: ######################################################################
[21:28:12.818] <TB2> INFO: ----------------------------------------------------------------------
[21:28:12.818] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[21:28:12.818] <TB2> INFO: ----------------------------------------------------------------------
[21:28:12.818] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[21:28:12.832] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[21:28:12.832] <TB2> INFO: run 1 of 1
[21:28:13.070] <TB2> INFO: Expecting 36608000 events.
[21:28:37.943] <TB2> INFO: 696200 events read in total (24274ms).
[21:29:01.422] <TB2> INFO: 1378350 events read in total (47753ms).
[21:29:24.901] <TB2> INFO: 2059500 events read in total (71232ms).
[21:29:48.437] <TB2> INFO: 2740200 events read in total (94768ms).
[21:30:11.782] <TB2> INFO: 3418200 events read in total (118113ms).
[21:30:35.270] <TB2> INFO: 4096150 events read in total (141601ms).
[21:30:58.536] <TB2> INFO: 4773650 events read in total (164867ms).
[21:31:21.723] <TB2> INFO: 5452450 events read in total (188054ms).
[21:31:45.285] <TB2> INFO: 6129750 events read in total (211616ms).
[21:32:08.622] <TB2> INFO: 6807450 events read in total (234953ms).
[21:32:31.877] <TB2> INFO: 7484650 events read in total (258208ms).
[21:32:54.972] <TB2> INFO: 8160350 events read in total (281303ms).
[21:33:18.087] <TB2> INFO: 8836350 events read in total (304418ms).
[21:33:41.170] <TB2> INFO: 9512900 events read in total (327501ms).
[21:34:04.349] <TB2> INFO: 10188750 events read in total (350680ms).
[21:34:27.364] <TB2> INFO: 10863600 events read in total (373695ms).
[21:34:50.367] <TB2> INFO: 11536150 events read in total (396698ms).
[21:35:13.627] <TB2> INFO: 12210650 events read in total (419958ms).
[21:35:36.682] <TB2> INFO: 12883850 events read in total (443013ms).
[21:35:59.796] <TB2> INFO: 13558750 events read in total (466127ms).
[21:36:23.145] <TB2> INFO: 14233350 events read in total (489476ms).
[21:36:46.395] <TB2> INFO: 14906000 events read in total (512726ms).
[21:37:09.356] <TB2> INFO: 15578500 events read in total (535687ms).
[21:37:32.579] <TB2> INFO: 16252300 events read in total (558910ms).
[21:37:55.993] <TB2> INFO: 16926250 events read in total (582324ms).
[21:38:19.128] <TB2> INFO: 17596950 events read in total (605459ms).
[21:38:42.249] <TB2> INFO: 18266900 events read in total (628580ms).
[21:39:05.275] <TB2> INFO: 18936300 events read in total (651606ms).
[21:39:28.452] <TB2> INFO: 19606150 events read in total (674783ms).
[21:39:51.332] <TB2> INFO: 20275800 events read in total (697663ms).
[21:40:14.298] <TB2> INFO: 20946600 events read in total (720629ms).
[21:40:37.485] <TB2> INFO: 21613800 events read in total (743816ms).
[21:41:00.689] <TB2> INFO: 22281900 events read in total (767021ms).
[21:41:23.705] <TB2> INFO: 22951050 events read in total (790036ms).
[21:41:46.680] <TB2> INFO: 23619650 events read in total (813011ms).
[21:42:10.131] <TB2> INFO: 24288100 events read in total (836462ms).
[21:42:32.964] <TB2> INFO: 24956550 events read in total (859295ms).
[21:42:55.766] <TB2> INFO: 25624700 events read in total (882097ms).
[21:43:18.688] <TB2> INFO: 26292400 events read in total (905019ms).
[21:43:41.923] <TB2> INFO: 26960250 events read in total (928254ms).
[21:44:04.892] <TB2> INFO: 27628550 events read in total (951223ms).
[21:44:27.804] <TB2> INFO: 28296750 events read in total (974135ms).
[21:44:50.728] <TB2> INFO: 28964350 events read in total (997059ms).
[21:45:13.735] <TB2> INFO: 29633300 events read in total (1020066ms).
[21:45:36.796] <TB2> INFO: 30297550 events read in total (1043127ms).
[21:46:00.015] <TB2> INFO: 30965050 events read in total (1066347ms).
[21:46:23.158] <TB2> INFO: 31630350 events read in total (1089489ms).
[21:46:46.581] <TB2> INFO: 32295750 events read in total (1112912ms).
[21:47:09.860] <TB2> INFO: 32964000 events read in total (1136191ms).
[21:47:32.997] <TB2> INFO: 33633600 events read in total (1159328ms).
[21:47:56.118] <TB2> INFO: 34301400 events read in total (1182449ms).
[21:48:19.146] <TB2> INFO: 34968450 events read in total (1205477ms).
[21:48:42.306] <TB2> INFO: 35636300 events read in total (1228637ms).
[21:49:05.645] <TB2> INFO: 36315450 events read in total (1251976ms).
[21:49:16.041] <TB2> INFO: 36608000 events read in total (1262372ms).
[21:49:16.101] <TB2> INFO: Test took 1263269ms.
[21:49:16.487] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:17.968] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:19.874] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:21.533] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:23.606] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:25.370] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:27.049] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:28.719] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:30.193] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:31.725] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:33.196] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:34.814] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:36.543] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:38.535] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:40.037] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:42.029] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:49:44.067] <TB2> INFO: PixTestScurves::scurves() done
[21:49:44.067] <TB2> INFO: Vcal mean: 119.18 116.76 126.01 130.26 112.69 120.20 121.71 123.78 131.86 119.40 129.31 133.10 120.30 130.39 120.50 126.19
[21:49:44.067] <TB2> INFO: Vcal RMS: 5.76 5.45 6.55 6.07 5.01 5.97 5.54 6.31 6.40 6.42 6.47 6.82 5.76 5.94 6.19 5.75
[21:49:44.067] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1291 seconds
[21:49:44.067] <TB2> INFO: Decoding statistics:
[21:49:44.067] <TB2> INFO: General information:
[21:49:44.067] <TB2> INFO: 16bit words read: 0
[21:49:44.067] <TB2> INFO: valid events total: 0
[21:49:44.067] <TB2> INFO: empty events: 0
[21:49:44.067] <TB2> INFO: valid events with pixels: 0
[21:49:44.067] <TB2> INFO: valid pixel hits: 0
[21:49:44.067] <TB2> INFO: Event errors: 0
[21:49:44.067] <TB2> INFO: start marker: 0
[21:49:44.067] <TB2> INFO: stop marker: 0
[21:49:44.067] <TB2> INFO: overflow: 0
[21:49:44.067] <TB2> INFO: invalid 5bit words: 0
[21:49:44.067] <TB2> INFO: invalid XOR eye diagram: 0
[21:49:44.067] <TB2> INFO: frame (failed synchr.): 0
[21:49:44.067] <TB2> INFO: idle data (no TBM trl): 0
[21:49:44.067] <TB2> INFO: no data (only TBM hdr): 0
[21:49:44.067] <TB2> INFO: TBM errors: 0
[21:49:44.067] <TB2> INFO: flawed TBM headers: 0
[21:49:44.067] <TB2> INFO: flawed TBM trailers: 0
[21:49:44.067] <TB2> INFO: event ID mismatches: 0
[21:49:44.067] <TB2> INFO: ROC errors: 0
[21:49:44.067] <TB2> INFO: missing ROC header(s): 0
[21:49:44.067] <TB2> INFO: misplaced readback start: 0
[21:49:44.067] <TB2> INFO: Pixel decoding errors: 0
[21:49:44.067] <TB2> INFO: pixel data incomplete: 0
[21:49:44.067] <TB2> INFO: pixel address: 0
[21:49:44.067] <TB2> INFO: pulse height fill bit: 0
[21:49:44.067] <TB2> INFO: buffer corruption: 0
[21:49:44.138] <TB2> INFO: ######################################################################
[21:49:44.138] <TB2> INFO: PixTestTrim::doTest()
[21:49:44.138] <TB2> INFO: ######################################################################
[21:49:44.139] <TB2> INFO: ----------------------------------------------------------------------
[21:49:44.139] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[21:49:44.139] <TB2> INFO: ----------------------------------------------------------------------
[21:49:44.183] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:49:44.183] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:49:44.196] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:49:44.196] <TB2> INFO: run 1 of 1
[21:49:44.437] <TB2> INFO: Expecting 5025280 events.
[21:50:15.160] <TB2> INFO: 825064 events read in total (30127ms).
[21:50:45.139] <TB2> INFO: 1647256 events read in total (60107ms).
[21:51:15.310] <TB2> INFO: 2466824 events read in total (90277ms).
[21:51:45.496] <TB2> INFO: 3282856 events read in total (120463ms).
[21:52:15.464] <TB2> INFO: 4095176 events read in total (150432ms).
[21:52:45.602] <TB2> INFO: 4905856 events read in total (180569ms).
[21:52:50.380] <TB2> INFO: 5025280 events read in total (185347ms).
[21:52:50.427] <TB2> INFO: Test took 186230ms.
[21:53:10.276] <TB2> INFO: ROC 0 VthrComp = 118
[21:53:10.276] <TB2> INFO: ROC 1 VthrComp = 117
[21:53:10.276] <TB2> INFO: ROC 2 VthrComp = 123
[21:53:10.276] <TB2> INFO: ROC 3 VthrComp = 130
[21:53:10.277] <TB2> INFO: ROC 4 VthrComp = 113
[21:53:10.277] <TB2> INFO: ROC 5 VthrComp = 124
[21:53:10.277] <TB2> INFO: ROC 6 VthrComp = 123
[21:53:10.277] <TB2> INFO: ROC 7 VthrComp = 127
[21:53:10.277] <TB2> INFO: ROC 8 VthrComp = 129
[21:53:10.277] <TB2> INFO: ROC 9 VthrComp = 112
[21:53:10.277] <TB2> INFO: ROC 10 VthrComp = 130
[21:53:10.277] <TB2> INFO: ROC 11 VthrComp = 133
[21:53:10.277] <TB2> INFO: ROC 12 VthrComp = 126
[21:53:10.277] <TB2> INFO: ROC 13 VthrComp = 128
[21:53:10.278] <TB2> INFO: ROC 14 VthrComp = 123
[21:53:10.278] <TB2> INFO: ROC 15 VthrComp = 125
[21:53:10.278] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:53:10.278] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:53:10.293] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:53:10.293] <TB2> INFO: run 1 of 1
[21:53:10.593] <TB2> INFO: Expecting 5025280 events.
[21:53:38.063] <TB2> INFO: 591344 events read in total (26878ms).
[21:54:04.420] <TB2> INFO: 1181792 events read in total (53235ms).
[21:54:30.247] <TB2> INFO: 1771504 events read in total (79062ms).
[21:54:56.229] <TB2> INFO: 2360912 events read in total (105044ms).
[21:55:22.403] <TB2> INFO: 2948280 events read in total (131218ms).
[21:55:48.420] <TB2> INFO: 3534416 events read in total (157235ms).
[21:56:13.871] <TB2> INFO: 4120328 events read in total (182686ms).
[21:56:40.572] <TB2> INFO: 4705696 events read in total (209387ms).
[21:56:54.931] <TB2> INFO: 5025280 events read in total (223746ms).
[21:56:55.017] <TB2> INFO: Test took 224724ms.
[21:57:20.088] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.2208 for pixel 19/14 mean/min/max = 46.1449/31.9513/60.3385
[21:57:20.088] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.4819 for pixel 2/16 mean/min/max = 45.9859/32.4876/59.4842
[21:57:20.089] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.7503 for pixel 37/16 mean/min/max = 46.9162/32.0241/61.8084
[21:57:20.089] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 62.0949 for pixel 0/8 mean/min/max = 48.1936/34.2883/62.0988
[21:57:20.090] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.0597 for pixel 12/72 mean/min/max = 45.8107/32.5403/59.0811
[21:57:20.091] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.8875 for pixel 25/0 mean/min/max = 46.0977/32.1438/60.0517
[21:57:20.091] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.2746 for pixel 26/0 mean/min/max = 46.1878/33.0391/59.3365
[21:57:20.092] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.6821 for pixel 0/1 mean/min/max = 46.0222/31.3554/60.689
[21:57:20.092] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 64.9002 for pixel 10/10 mean/min/max = 48.0436/31.0038/65.0835
[21:57:20.093] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 64.1013 for pixel 16/76 mean/min/max = 48.1096/31.8919/64.3272
[21:57:20.093] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 63.3816 for pixel 0/9 mean/min/max = 48.7862/34.0682/63.5041
[21:57:20.094] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 64.8383 for pixel 7/17 mean/min/max = 49.4843/33.7297/65.239
[21:57:20.094] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.7163 for pixel 0/3 mean/min/max = 45.4435/31.8748/59.0123
[21:57:20.095] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 60.4874 for pixel 18/79 mean/min/max = 46.1662/31.822/60.5105
[21:57:20.096] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 60.3095 for pixel 19/1 mean/min/max = 46.0434/31.64/60.4468
[21:57:20.096] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 61.5389 for pixel 16/53 mean/min/max = 46.3924/31.2308/61.5539
[21:57:20.096] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:57:20.185] <TB2> INFO: Expecting 411648 events.
[21:57:29.554] <TB2> INFO: 411648 events read in total (8771ms).
[21:57:29.565] <TB2> INFO: Expecting 411648 events.
[21:57:38.941] <TB2> INFO: 411648 events read in total (8973ms).
[21:57:38.954] <TB2> INFO: Expecting 411648 events.
[21:57:48.241] <TB2> INFO: 411648 events read in total (8884ms).
[21:57:48.259] <TB2> INFO: Expecting 411648 events.
[21:57:57.519] <TB2> INFO: 411648 events read in total (8857ms).
[21:57:57.536] <TB2> INFO: Expecting 411648 events.
[21:58:06.805] <TB2> INFO: 411648 events read in total (8866ms).
[21:58:06.829] <TB2> INFO: Expecting 411648 events.
[21:58:16.256] <TB2> INFO: 411648 events read in total (9024ms).
[21:58:16.280] <TB2> INFO: Expecting 411648 events.
[21:58:25.600] <TB2> INFO: 411648 events read in total (8917ms).
[21:58:25.635] <TB2> INFO: Expecting 411648 events.
[21:58:34.972] <TB2> INFO: 411648 events read in total (8934ms).
[21:58:34.000] <TB2> INFO: Expecting 411648 events.
[21:58:44.291] <TB2> INFO: 411648 events read in total (8888ms).
[21:58:44.322] <TB2> INFO: Expecting 411648 events.
[21:58:53.576] <TB2> INFO: 411648 events read in total (8851ms).
[21:58:53.610] <TB2> INFO: Expecting 411648 events.
[21:59:02.905] <TB2> INFO: 411648 events read in total (8892ms).
[21:59:02.940] <TB2> INFO: Expecting 411648 events.
[21:59:12.324] <TB2> INFO: 411648 events read in total (8980ms).
[21:59:12.364] <TB2> INFO: Expecting 411648 events.
[21:59:21.728] <TB2> INFO: 411648 events read in total (8961ms).
[21:59:21.770] <TB2> INFO: Expecting 411648 events.
[21:59:30.973] <TB2> INFO: 411648 events read in total (8798ms).
[21:59:31.015] <TB2> INFO: Expecting 411648 events.
[21:59:40.272] <TB2> INFO: 411648 events read in total (8854ms).
[21:59:40.340] <TB2> INFO: Expecting 411648 events.
[21:59:49.597] <TB2> INFO: 411648 events read in total (8853ms).
[21:59:49.733] <TB2> INFO: Test took 149637ms.
[21:59:50.491] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:59:50.504] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:59:50.504] <TB2> INFO: run 1 of 1
[21:59:50.744] <TB2> INFO: Expecting 5025280 events.
[22:00:17.213] <TB2> INFO: 586160 events read in total (25877ms).
[22:00:43.336] <TB2> INFO: 1172592 events read in total (52001ms).
[22:01:09.712] <TB2> INFO: 1756976 events read in total (78376ms).
[22:01:36.070] <TB2> INFO: 2341688 events read in total (104734ms).
[22:02:02.392] <TB2> INFO: 2927360 events read in total (131056ms).
[22:02:28.804] <TB2> INFO: 3514464 events read in total (157468ms).
[22:02:55.192] <TB2> INFO: 4099896 events read in total (183856ms).
[22:03:22.465] <TB2> INFO: 4685488 events read in total (211129ms).
[22:03:38.197] <TB2> INFO: 5025280 events read in total (226861ms).
[22:03:38.364] <TB2> INFO: Test took 227861ms.
[22:04:02.707] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 3.252233 .. 146.801972
[22:04:02.957] <TB2> INFO: Expecting 208000 events.
[22:04:12.504] <TB2> INFO: 208000 events read in total (8955ms).
[22:04:12.505] <TB2> INFO: Test took 9797ms.
[22:04:12.554] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 156 (-1/-1) hits flags = 528 (plus default)
[22:04:12.568] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:04:12.568] <TB2> INFO: run 1 of 1
[22:04:12.892] <TB2> INFO: Expecting 5125120 events.
[22:04:39.435] <TB2> INFO: 581320 events read in total (25951ms).
[22:05:05.294] <TB2> INFO: 1162480 events read in total (51811ms).
[22:05:31.050] <TB2> INFO: 1743624 events read in total (77566ms).
[22:05:56.488] <TB2> INFO: 2324936 events read in total (103004ms).
[22:06:22.442] <TB2> INFO: 2905976 events read in total (128958ms).
[22:06:48.159] <TB2> INFO: 3487008 events read in total (154676ms).
[22:07:14.162] <TB2> INFO: 4067968 events read in total (180678ms).
[22:07:40.395] <TB2> INFO: 4648080 events read in total (206911ms).
[22:08:01.706] <TB2> INFO: 5125120 events read in total (228222ms).
[22:08:01.794] <TB2> INFO: Test took 229227ms.
[22:08:28.094] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 28.100413 .. 47.483557
[22:08:28.365] <TB2> INFO: Expecting 208000 events.
[22:08:38.404] <TB2> INFO: 208000 events read in total (9447ms).
[22:08:38.405] <TB2> INFO: Test took 10310ms.
[22:08:38.453] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 57 (-1/-1) hits flags = 528 (plus default)
[22:08:38.466] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:08:38.466] <TB2> INFO: run 1 of 1
[22:08:38.790] <TB2> INFO: Expecting 1331200 events.
[22:09:07.312] <TB2> INFO: 647976 events read in total (27930ms).
[22:09:35.752] <TB2> INFO: 1293960 events read in total (56370ms).
[22:09:37.775] <TB2> INFO: 1331200 events read in total (58393ms).
[22:09:37.804] <TB2> INFO: Test took 59339ms.
[22:09:52.342] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 27.577879 .. 48.707667
[22:09:52.579] <TB2> INFO: Expecting 208000 events.
[22:10:02.612] <TB2> INFO: 208000 events read in total (9441ms).
[22:10:02.614] <TB2> INFO: Test took 10271ms.
[22:10:02.693] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[22:10:02.708] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:10:02.708] <TB2> INFO: run 1 of 1
[22:10:02.000] <TB2> INFO: Expecting 1397760 events.
[22:10:31.074] <TB2> INFO: 649120 events read in total (27483ms).
[22:10:59.084] <TB2> INFO: 1296992 events read in total (55493ms).
[22:11:03.917] <TB2> INFO: 1397760 events read in total (60326ms).
[22:11:03.946] <TB2> INFO: Test took 61239ms.
[22:11:18.865] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.329767 .. 46.864792
[22:11:19.147] <TB2> INFO: Expecting 208000 events.
[22:11:29.317] <TB2> INFO: 208000 events read in total (9578ms).
[22:11:29.318] <TB2> INFO: Test took 10452ms.
[22:11:29.397] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[22:11:29.411] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:11:29.411] <TB2> INFO: run 1 of 1
[22:11:29.735] <TB2> INFO: Expecting 1397760 events.
[22:11:57.997] <TB2> INFO: 663880 events read in total (27670ms).
[22:12:26.662] <TB2> INFO: 1327528 events read in total (56335ms).
[22:12:29.954] <TB2> INFO: 1397760 events read in total (59627ms).
[22:12:29.981] <TB2> INFO: Test took 60570ms.
[22:12:42.479] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[22:12:42.479] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[22:12:42.493] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:12:42.493] <TB2> INFO: run 1 of 1
[22:12:42.748] <TB2> INFO: Expecting 1364480 events.
[22:13:11.563] <TB2> INFO: 668104 events read in total (28223ms).
[22:13:41.515] <TB2> INFO: 1335456 events read in total (58175ms).
[22:13:43.181] <TB2> INFO: 1364480 events read in total (59842ms).
[22:13:43.215] <TB2> INFO: Test took 60723ms.
[22:13:56.194] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C0.dat
[22:13:56.194] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C1.dat
[22:13:56.194] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C2.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C3.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C4.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C5.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C6.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C7.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C8.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C9.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C10.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C11.dat
[22:13:56.195] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C12.dat
[22:13:56.196] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C13.dat
[22:13:56.196] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C14.dat
[22:13:56.196] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C15.dat
[22:13:56.196] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C0.dat
[22:13:56.202] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C1.dat
[22:13:56.210] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C2.dat
[22:13:56.219] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C3.dat
[22:13:56.227] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C4.dat
[22:13:56.235] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C5.dat
[22:13:56.243] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C6.dat
[22:13:56.250] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C7.dat
[22:13:56.257] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C8.dat
[22:13:56.263] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C9.dat
[22:13:56.270] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C10.dat
[22:13:56.276] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C11.dat
[22:13:56.282] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C12.dat
[22:13:56.288] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C13.dat
[22:13:56.295] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C14.dat
[22:13:56.301] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//trimParameters35_C15.dat
[22:13:56.307] <TB2> INFO: PixTestTrim::trimTest() done
[22:13:56.307] <TB2> INFO: vtrim: 126 131 136 115 126 136 120 116 141 142 130 153 116 117 135 132
[22:13:56.307] <TB2> INFO: vthrcomp: 118 117 123 130 113 124 123 127 129 112 130 133 126 128 123 125
[22:13:56.307] <TB2> INFO: vcal mean: 34.92 34.94 35.01 35.02 35.02 34.92 35.01 34.97 35.32 35.24 35.05 35.15 34.98 34.92 34.93 35.00
[22:13:56.307] <TB2> INFO: vcal RMS: 1.03 1.00 1.23 1.00 0.99 0.97 0.96 1.09 1.49 1.32 1.08 1.24 1.00 1.08 1.05 1.17
[22:13:56.307] <TB2> INFO: bits mean: 9.67 9.60 9.51 8.12 9.79 9.40 9.36 8.95 9.50 9.56 8.06 9.15 9.36 9.30 9.65 9.73
[22:13:56.307] <TB2> INFO: bits RMS: 2.66 2.61 2.72 2.83 2.51 2.75 2.70 3.03 2.81 2.62 2.77 2.44 2.87 2.82 2.69 2.70
[22:13:56.314] <TB2> INFO: ----------------------------------------------------------------------
[22:13:56.314] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[22:13:56.314] <TB2> INFO: ----------------------------------------------------------------------
[22:13:56.317] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[22:13:56.330] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:13:56.330] <TB2> INFO: run 1 of 1
[22:13:56.568] <TB2> INFO: Expecting 4160000 events.
[22:14:30.062] <TB2> INFO: 767990 events read in total (32902ms).
[22:15:02.077] <TB2> INFO: 1528260 events read in total (64917ms).
[22:15:35.147] <TB2> INFO: 2283940 events read in total (97987ms).
[22:16:07.198] <TB2> INFO: 3035515 events read in total (130038ms).
[22:16:39.496] <TB2> INFO: 3785330 events read in total (162336ms).
[22:16:55.629] <TB2> INFO: 4160000 events read in total (178469ms).
[22:16:55.715] <TB2> INFO: Test took 179385ms.
[22:17:21.184] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 223 (-1/-1) hits flags = 528 (plus default)
[22:17:21.198] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:17:21.198] <TB2> INFO: run 1 of 1
[22:17:21.463] <TB2> INFO: Expecting 4659200 events.
[22:17:53.517] <TB2> INFO: 713280 events read in total (31463ms).
[22:18:24.066] <TB2> INFO: 1421770 events read in total (62013ms).
[22:18:55.189] <TB2> INFO: 2127660 events read in total (93135ms).
[22:19:26.183] <TB2> INFO: 2829905 events read in total (124129ms).
[22:19:57.301] <TB2> INFO: 3530270 events read in total (155247ms).
[22:20:27.677] <TB2> INFO: 4229870 events read in total (185623ms).
[22:20:46.476] <TB2> INFO: 4659200 events read in total (204422ms).
[22:20:46.593] <TB2> INFO: Test took 205395ms.
[22:21:14.888] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[22:21:14.899] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:21:14.899] <TB2> INFO: run 1 of 1
[22:21:15.179] <TB2> INFO: Expecting 4222400 events.
[22:21:48.368] <TB2> INFO: 739650 events read in total (32597ms).
[22:22:19.812] <TB2> INFO: 1472680 events read in total (64041ms).
[22:22:51.342] <TB2> INFO: 2202495 events read in total (95571ms).
[22:23:22.910] <TB2> INFO: 2928285 events read in total (127139ms).
[22:23:55.020] <TB2> INFO: 3652290 events read in total (159249ms).
[22:24:19.000] <TB2> INFO: 4222400 events read in total (184229ms).
[22:24:20.113] <TB2> INFO: Test took 185214ms.
[22:24:45.744] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[22:24:45.758] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:24:45.758] <TB2> INFO: run 1 of 1
[22:24:46.015] <TB2> INFO: Expecting 4160000 events.
[22:25:19.136] <TB2> INFO: 744145 events read in total (32529ms).
[22:25:50.558] <TB2> INFO: 1482085 events read in total (63951ms).
[22:26:22.170] <TB2> INFO: 2216210 events read in total (95564ms).
[22:26:53.717] <TB2> INFO: 2946045 events read in total (127110ms).
[22:27:25.732] <TB2> INFO: 3674020 events read in total (159125ms).
[22:27:46.848] <TB2> INFO: 4160000 events read in total (180241ms).
[22:27:46.918] <TB2> INFO: Test took 181159ms.
[22:28:14.110] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:28:14.125] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:28:14.125] <TB2> INFO: run 1 of 1
[22:28:14.370] <TB2> INFO: Expecting 4180800 events.
[22:28:47.357] <TB2> INFO: 742680 events read in total (32395ms).
[22:29:19.003] <TB2> INFO: 1479175 events read in total (64041ms).
[22:29:50.730] <TB2> INFO: 2211975 events read in total (95768ms).
[22:30:22.171] <TB2> INFO: 2940775 events read in total (127209ms).
[22:30:53.528] <TB2> INFO: 3667935 events read in total (158566ms).
[22:31:15.695] <TB2> INFO: 4180800 events read in total (180733ms).
[22:31:15.755] <TB2> INFO: Test took 181630ms.
[22:31:40.471] <TB2> INFO: PixTestTrim::trimBitTest() done
[22:31:40.472] <TB2> INFO: PixTestTrim::doTest() done, duration: 2516 seconds
[22:31:40.472] <TB2> INFO: Decoding statistics:
[22:31:40.472] <TB2> INFO: General information:
[22:31:40.472] <TB2> INFO: 16bit words read: 0
[22:31:40.472] <TB2> INFO: valid events total: 0
[22:31:40.472] <TB2> INFO: empty events: 0
[22:31:40.472] <TB2> INFO: valid events with pixels: 0
[22:31:40.472] <TB2> INFO: valid pixel hits: 0
[22:31:40.472] <TB2> INFO: Event errors: 0
[22:31:40.472] <TB2> INFO: start marker: 0
[22:31:40.472] <TB2> INFO: stop marker: 0
[22:31:40.472] <TB2> INFO: overflow: 0
[22:31:40.472] <TB2> INFO: invalid 5bit words: 0
[22:31:40.472] <TB2> INFO: invalid XOR eye diagram: 0
[22:31:40.472] <TB2> INFO: frame (failed synchr.): 0
[22:31:40.472] <TB2> INFO: idle data (no TBM trl): 0
[22:31:40.472] <TB2> INFO: no data (only TBM hdr): 0
[22:31:40.472] <TB2> INFO: TBM errors: 0
[22:31:40.472] <TB2> INFO: flawed TBM headers: 0
[22:31:40.472] <TB2> INFO: flawed TBM trailers: 0
[22:31:40.472] <TB2> INFO: event ID mismatches: 0
[22:31:40.472] <TB2> INFO: ROC errors: 0
[22:31:40.472] <TB2> INFO: missing ROC header(s): 0
[22:31:40.472] <TB2> INFO: misplaced readback start: 0
[22:31:40.472] <TB2> INFO: Pixel decoding errors: 0
[22:31:40.472] <TB2> INFO: pixel data incomplete: 0
[22:31:40.472] <TB2> INFO: pixel address: 0
[22:31:40.472] <TB2> INFO: pulse height fill bit: 0
[22:31:40.472] <TB2> INFO: buffer corruption: 0
[22:31:41.074] <TB2> INFO: ######################################################################
[22:31:41.074] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[22:31:41.074] <TB2> INFO: ######################################################################
[22:31:41.310] <TB2> INFO: Expecting 41600 events.
[22:31:44.787] <TB2> INFO: 41600 events read in total (2885ms).
[22:31:44.788] <TB2> INFO: Test took 3713ms.
[22:31:45.230] <TB2> INFO: Expecting 41600 events.
[22:31:48.718] <TB2> INFO: 41600 events read in total (2896ms).
[22:31:48.719] <TB2> INFO: Test took 3726ms.
[22:31:49.010] <TB2> INFO: Expecting 41600 events.
[22:31:52.661] <TB2> INFO: 41600 events read in total (3060ms).
[22:31:52.662] <TB2> INFO: Test took 3917ms.
[22:31:52.952] <TB2> INFO: Expecting 41600 events.
[22:31:56.479] <TB2> INFO: 41600 events read in total (2936ms).
[22:31:56.480] <TB2> INFO: Test took 3793ms.
[22:31:56.773] <TB2> INFO: Expecting 41600 events.
[22:32:00.302] <TB2> INFO: 41600 events read in total (2938ms).
[22:32:00.302] <TB2> INFO: Test took 3794ms.
[22:32:00.591] <TB2> INFO: Expecting 41600 events.
[22:32:04.161] <TB2> INFO: 41600 events read in total (2978ms).
[22:32:04.162] <TB2> INFO: Test took 3836ms.
[22:32:04.470] <TB2> INFO: Expecting 41600 events.
[22:32:08.013] <TB2> INFO: 41600 events read in total (2951ms).
[22:32:08.014] <TB2> INFO: Test took 3825ms.
[22:32:08.330] <TB2> INFO: Expecting 41600 events.
[22:32:11.810] <TB2> INFO: 41600 events read in total (2888ms).
[22:32:11.811] <TB2> INFO: Test took 3773ms.
[22:32:12.100] <TB2> INFO: Expecting 41600 events.
[22:32:15.584] <TB2> INFO: 41600 events read in total (2892ms).
[22:32:15.585] <TB2> INFO: Test took 3750ms.
[22:32:15.913] <TB2> INFO: Expecting 41600 events.
[22:32:19.431] <TB2> INFO: 41600 events read in total (2926ms).
[22:32:19.432] <TB2> INFO: Test took 3823ms.
[22:32:19.721] <TB2> INFO: Expecting 41600 events.
[22:32:23.260] <TB2> INFO: 41600 events read in total (2947ms).
[22:32:23.261] <TB2> INFO: Test took 3805ms.
[22:32:23.551] <TB2> INFO: Expecting 41600 events.
[22:32:27.147] <TB2> INFO: 41600 events read in total (3004ms).
[22:32:27.148] <TB2> INFO: Test took 3862ms.
[22:32:27.438] <TB2> INFO: Expecting 41600 events.
[22:32:30.917] <TB2> INFO: 41600 events read in total (2888ms).
[22:32:30.918] <TB2> INFO: Test took 3746ms.
[22:32:31.208] <TB2> INFO: Expecting 41600 events.
[22:32:34.696] <TB2> INFO: 41600 events read in total (2898ms).
[22:32:34.697] <TB2> INFO: Test took 3754ms.
[22:32:34.987] <TB2> INFO: Expecting 41600 events.
[22:32:38.683] <TB2> INFO: 41600 events read in total (3105ms).
[22:32:38.684] <TB2> INFO: Test took 3962ms.
[22:32:38.976] <TB2> INFO: Expecting 41600 events.
[22:32:42.543] <TB2> INFO: 41600 events read in total (2975ms).
[22:32:42.543] <TB2> INFO: Test took 3832ms.
[22:32:42.832] <TB2> INFO: Expecting 41600 events.
[22:32:46.455] <TB2> INFO: 41600 events read in total (3031ms).
[22:32:46.456] <TB2> INFO: Test took 3889ms.
[22:32:46.745] <TB2> INFO: Expecting 41600 events.
[22:32:50.281] <TB2> INFO: 41600 events read in total (2944ms).
[22:32:50.281] <TB2> INFO: Test took 3801ms.
[22:32:50.570] <TB2> INFO: Expecting 41600 events.
[22:32:54.139] <TB2> INFO: 41600 events read in total (2977ms).
[22:32:54.139] <TB2> INFO: Test took 3834ms.
[22:32:54.429] <TB2> INFO: Expecting 41600 events.
[22:32:57.894] <TB2> INFO: 41600 events read in total (2874ms).
[22:32:57.895] <TB2> INFO: Test took 3731ms.
[22:32:58.184] <TB2> INFO: Expecting 41600 events.
[22:33:01.673] <TB2> INFO: 41600 events read in total (2898ms).
[22:33:01.674] <TB2> INFO: Test took 3755ms.
[22:33:01.976] <TB2> INFO: Expecting 41600 events.
[22:33:05.955] <TB2> INFO: 41600 events read in total (3387ms).
[22:33:05.956] <TB2> INFO: Test took 4257ms.
[22:33:06.311] <TB2> INFO: Expecting 41600 events.
[22:33:09.925] <TB2> INFO: 41600 events read in total (3022ms).
[22:33:09.926] <TB2> INFO: Test took 3941ms.
[22:33:10.215] <TB2> INFO: Expecting 41600 events.
[22:33:13.771] <TB2> INFO: 41600 events read in total (2964ms).
[22:33:13.772] <TB2> INFO: Test took 3822ms.
[22:33:14.064] <TB2> INFO: Expecting 41600 events.
[22:33:17.683] <TB2> INFO: 41600 events read in total (3028ms).
[22:33:17.683] <TB2> INFO: Test took 3885ms.
[22:33:17.972] <TB2> INFO: Expecting 41600 events.
[22:33:21.587] <TB2> INFO: 41600 events read in total (3023ms).
[22:33:21.588] <TB2> INFO: Test took 3881ms.
[22:33:21.881] <TB2> INFO: Expecting 41600 events.
[22:33:25.400] <TB2> INFO: 41600 events read in total (2928ms).
[22:33:25.401] <TB2> INFO: Test took 3786ms.
[22:33:25.692] <TB2> INFO: Expecting 2560 events.
[22:33:26.577] <TB2> INFO: 2560 events read in total (293ms).
[22:33:26.578] <TB2> INFO: Test took 1162ms.
[22:33:26.886] <TB2> INFO: Expecting 2560 events.
[22:33:27.769] <TB2> INFO: 2560 events read in total (292ms).
[22:33:27.769] <TB2> INFO: Test took 1191ms.
[22:33:28.077] <TB2> INFO: Expecting 2560 events.
[22:33:28.963] <TB2> INFO: 2560 events read in total (294ms).
[22:33:28.963] <TB2> INFO: Test took 1193ms.
[22:33:29.271] <TB2> INFO: Expecting 2560 events.
[22:33:30.155] <TB2> INFO: 2560 events read in total (293ms).
[22:33:30.155] <TB2> INFO: Test took 1191ms.
[22:33:30.464] <TB2> INFO: Expecting 2560 events.
[22:33:31.345] <TB2> INFO: 2560 events read in total (290ms).
[22:33:31.345] <TB2> INFO: Test took 1190ms.
[22:33:31.653] <TB2> INFO: Expecting 2560 events.
[22:33:32.533] <TB2> INFO: 2560 events read in total (289ms).
[22:33:32.533] <TB2> INFO: Test took 1188ms.
[22:33:32.841] <TB2> INFO: Expecting 2560 events.
[22:33:33.722] <TB2> INFO: 2560 events read in total (289ms).
[22:33:33.723] <TB2> INFO: Test took 1190ms.
[22:33:34.029] <TB2> INFO: Expecting 2560 events.
[22:33:34.910] <TB2> INFO: 2560 events read in total (289ms).
[22:33:34.910] <TB2> INFO: Test took 1186ms.
[22:33:35.218] <TB2> INFO: Expecting 2560 events.
[22:33:36.097] <TB2> INFO: 2560 events read in total (288ms).
[22:33:36.097] <TB2> INFO: Test took 1186ms.
[22:33:36.406] <TB2> INFO: Expecting 2560 events.
[22:33:37.286] <TB2> INFO: 2560 events read in total (289ms).
[22:33:37.287] <TB2> INFO: Test took 1190ms.
[22:33:37.595] <TB2> INFO: Expecting 2560 events.
[22:33:38.476] <TB2> INFO: 2560 events read in total (290ms).
[22:33:38.477] <TB2> INFO: Test took 1190ms.
[22:33:38.784] <TB2> INFO: Expecting 2560 events.
[22:33:39.669] <TB2> INFO: 2560 events read in total (294ms).
[22:33:39.669] <TB2> INFO: Test took 1191ms.
[22:33:39.977] <TB2> INFO: Expecting 2560 events.
[22:33:40.874] <TB2> INFO: 2560 events read in total (305ms).
[22:33:40.875] <TB2> INFO: Test took 1205ms.
[22:33:41.183] <TB2> INFO: Expecting 2560 events.
[22:33:42.074] <TB2> INFO: 2560 events read in total (299ms).
[22:33:42.074] <TB2> INFO: Test took 1199ms.
[22:33:42.382] <TB2> INFO: Expecting 2560 events.
[22:33:43.266] <TB2> INFO: 2560 events read in total (292ms).
[22:33:43.266] <TB2> INFO: Test took 1191ms.
[22:33:43.573] <TB2> INFO: Expecting 2560 events.
[22:33:44.459] <TB2> INFO: 2560 events read in total (294ms).
[22:33:44.459] <TB2> INFO: Test took 1193ms.
[22:33:44.463] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:33:44.768] <TB2> INFO: Expecting 655360 events.
[22:33:59.529] <TB2> INFO: 655360 events read in total (14169ms).
[22:33:59.542] <TB2> INFO: Expecting 655360 events.
[22:34:13.886] <TB2> INFO: 655360 events read in total (13941ms).
[22:34:13.904] <TB2> INFO: Expecting 655360 events.
[22:34:28.524] <TB2> INFO: 655360 events read in total (14217ms).
[22:34:28.555] <TB2> INFO: Expecting 655360 events.
[22:34:42.953] <TB2> INFO: 655360 events read in total (13995ms).
[22:34:42.980] <TB2> INFO: Expecting 655360 events.
[22:34:57.537] <TB2> INFO: 655360 events read in total (14154ms).
[22:34:57.569] <TB2> INFO: Expecting 655360 events.
[22:35:11.959] <TB2> INFO: 655360 events read in total (13987ms).
[22:35:11.997] <TB2> INFO: Expecting 655360 events.
[22:35:26.595] <TB2> INFO: 655360 events read in total (14195ms).
[22:35:26.646] <TB2> INFO: Expecting 655360 events.
[22:35:41.037] <TB2> INFO: 655360 events read in total (13988ms).
[22:35:41.084] <TB2> INFO: Expecting 655360 events.
[22:35:55.584] <TB2> INFO: 655360 events read in total (14097ms).
[22:35:55.631] <TB2> INFO: Expecting 655360 events.
[22:36:09.856] <TB2> INFO: 655360 events read in total (13822ms).
[22:36:09.918] <TB2> INFO: Expecting 655360 events.
[22:36:24.429] <TB2> INFO: 655360 events read in total (14108ms).
[22:36:24.529] <TB2> INFO: Expecting 655360 events.
[22:36:38.862] <TB2> INFO: 655360 events read in total (13930ms).
[22:36:38.986] <TB2> INFO: Expecting 655360 events.
[22:36:53.609] <TB2> INFO: 655360 events read in total (14219ms).
[22:36:53.713] <TB2> INFO: Expecting 655360 events.
[22:37:08.109] <TB2> INFO: 655360 events read in total (13993ms).
[22:37:08.224] <TB2> INFO: Expecting 655360 events.
[22:37:22.512] <TB2> INFO: 655360 events read in total (13885ms).
[22:37:22.601] <TB2> INFO: Expecting 655360 events.
[22:37:36.726] <TB2> INFO: 655360 events read in total (13722ms).
[22:37:36.892] <TB2> INFO: Test took 232429ms.
[22:37:36.987] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:37:37.245] <TB2> INFO: Expecting 655360 events.
[22:37:51.848] <TB2> INFO: 655360 events read in total (14011ms).
[22:37:51.864] <TB2> INFO: Expecting 655360 events.
[22:38:06.216] <TB2> INFO: 655360 events read in total (13949ms).
[22:38:06.241] <TB2> INFO: Expecting 655360 events.
[22:38:20.602] <TB2> INFO: 655360 events read in total (13958ms).
[22:38:20.624] <TB2> INFO: Expecting 655360 events.
[22:38:34.966] <TB2> INFO: 655360 events read in total (13939ms).
[22:38:34.993] <TB2> INFO: Expecting 655360 events.
[22:38:49.438] <TB2> INFO: 655360 events read in total (14042ms).
[22:38:49.474] <TB2> INFO: Expecting 655360 events.
[22:39:03.463] <TB2> INFO: 655360 events read in total (13586ms).
[22:39:03.496] <TB2> INFO: Expecting 655360 events.
[22:39:17.876] <TB2> INFO: 655360 events read in total (13976ms).
[22:39:17.914] <TB2> INFO: Expecting 655360 events.
[22:39:32.167] <TB2> INFO: 655360 events read in total (13850ms).
[22:39:32.209] <TB2> INFO: Expecting 655360 events.
[22:39:46.621] <TB2> INFO: 655360 events read in total (14009ms).
[22:39:46.667] <TB2> INFO: Expecting 655360 events.
[22:40:01.052] <TB2> INFO: 655360 events read in total (13982ms).
[22:40:01.106] <TB2> INFO: Expecting 655360 events.
[22:40:15.302] <TB2> INFO: 655360 events read in total (13793ms).
[22:40:15.362] <TB2> INFO: Expecting 655360 events.
[22:40:29.780] <TB2> INFO: 655360 events read in total (14015ms).
[22:40:29.846] <TB2> INFO: Expecting 655360 events.
[22:40:44.196] <TB2> INFO: 655360 events read in total (13946ms).
[22:40:44.266] <TB2> INFO: Expecting 655360 events.
[22:40:58.790] <TB2> INFO: 655360 events read in total (14121ms).
[22:40:58.920] <TB2> INFO: Expecting 655360 events.
[22:41:13.418] <TB2> INFO: 655360 events read in total (14094ms).
[22:41:13.534] <TB2> INFO: Expecting 655360 events.
[22:41:28.322] <TB2> INFO: 655360 events read in total (14385ms).
[22:41:28.447] <TB2> INFO: Test took 231460ms.
[22:41:28.671] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.679] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.687] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.696] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.704] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.712] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:41:28.720] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:41:28.728] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:41:28.736] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[22:41:28.745] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[22:41:28.753] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[22:41:28.761] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[22:41:28.769] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.776] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.782] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:41:28.787] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.793] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.799] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:41:28.804] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:41:28.810] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.816] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.822] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.828] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.833] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.839] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.845] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:41:28.851] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:41:28.856] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:41:28.862] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:41:28.868] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[22:41:28.874] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[22:41:28.881] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[22:41:28.886] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.892] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.899] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.904] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.910] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.916] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:41:28.952] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C0.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C1.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C2.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C3.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C4.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C5.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C6.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C7.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C8.dat
[22:41:28.953] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C9.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C10.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C11.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C12.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C13.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C14.dat
[22:41:28.954] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//dacParameters35_C15.dat
[22:41:29.199] <TB2> INFO: Expecting 41600 events.
[22:41:32.427] <TB2> INFO: 41600 events read in total (2637ms).
[22:41:32.428] <TB2> INFO: Test took 3471ms.
[22:41:32.893] <TB2> INFO: Expecting 41600 events.
[22:41:36.061] <TB2> INFO: 41600 events read in total (2576ms).
[22:41:36.062] <TB2> INFO: Test took 3420ms.
[22:41:36.526] <TB2> INFO: Expecting 41600 events.
[22:41:39.633] <TB2> INFO: 41600 events read in total (2515ms).
[22:41:39.634] <TB2> INFO: Test took 3354ms.
[22:41:39.849] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:39.938] <TB2> INFO: Expecting 2560 events.
[22:41:40.824] <TB2> INFO: 2560 events read in total (294ms).
[22:41:40.825] <TB2> INFO: Test took 976ms.
[22:41:40.827] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:41.133] <TB2> INFO: Expecting 2560 events.
[22:41:42.021] <TB2> INFO: 2560 events read in total (297ms).
[22:41:42.022] <TB2> INFO: Test took 1195ms.
[22:41:42.024] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:42.329] <TB2> INFO: Expecting 2560 events.
[22:41:43.220] <TB2> INFO: 2560 events read in total (299ms).
[22:41:43.220] <TB2> INFO: Test took 1196ms.
[22:41:43.222] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:43.529] <TB2> INFO: Expecting 2560 events.
[22:41:44.416] <TB2> INFO: 2560 events read in total (295ms).
[22:41:44.416] <TB2> INFO: Test took 1194ms.
[22:41:44.418] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:44.724] <TB2> INFO: Expecting 2560 events.
[22:41:45.619] <TB2> INFO: 2560 events read in total (303ms).
[22:41:45.619] <TB2> INFO: Test took 1201ms.
[22:41:45.622] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:45.927] <TB2> INFO: Expecting 2560 events.
[22:41:46.819] <TB2> INFO: 2560 events read in total (300ms).
[22:41:46.820] <TB2> INFO: Test took 1199ms.
[22:41:46.823] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:47.127] <TB2> INFO: Expecting 2560 events.
[22:41:48.018] <TB2> INFO: 2560 events read in total (299ms).
[22:41:48.018] <TB2> INFO: Test took 1195ms.
[22:41:48.024] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:48.327] <TB2> INFO: Expecting 2560 events.
[22:41:49.222] <TB2> INFO: 2560 events read in total (304ms).
[22:41:49.222] <TB2> INFO: Test took 1198ms.
[22:41:49.225] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:49.530] <TB2> INFO: Expecting 2560 events.
[22:41:50.413] <TB2> INFO: 2560 events read in total (291ms).
[22:41:50.414] <TB2> INFO: Test took 1189ms.
[22:41:50.417] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:50.721] <TB2> INFO: Expecting 2560 events.
[22:41:51.604] <TB2> INFO: 2560 events read in total (291ms).
[22:41:51.604] <TB2> INFO: Test took 1187ms.
[22:41:51.606] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:51.913] <TB2> INFO: Expecting 2560 events.
[22:41:52.793] <TB2> INFO: 2560 events read in total (288ms).
[22:41:52.794] <TB2> INFO: Test took 1188ms.
[22:41:52.796] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:53.103] <TB2> INFO: Expecting 2560 events.
[22:41:53.983] <TB2> INFO: 2560 events read in total (289ms).
[22:41:53.983] <TB2> INFO: Test took 1187ms.
[22:41:53.985] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:54.292] <TB2> INFO: Expecting 2560 events.
[22:41:55.173] <TB2> INFO: 2560 events read in total (289ms).
[22:41:55.173] <TB2> INFO: Test took 1188ms.
[22:41:55.176] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:55.482] <TB2> INFO: Expecting 2560 events.
[22:41:56.363] <TB2> INFO: 2560 events read in total (290ms).
[22:41:56.364] <TB2> INFO: Test took 1188ms.
[22:41:56.368] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:56.672] <TB2> INFO: Expecting 2560 events.
[22:41:57.556] <TB2> INFO: 2560 events read in total (293ms).
[22:41:57.556] <TB2> INFO: Test took 1188ms.
[22:41:57.559] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:57.864] <TB2> INFO: Expecting 2560 events.
[22:41:58.749] <TB2> INFO: 2560 events read in total (293ms).
[22:41:58.750] <TB2> INFO: Test took 1191ms.
[22:41:58.751] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:41:59.058] <TB2> INFO: Expecting 2560 events.
[22:41:59.944] <TB2> INFO: 2560 events read in total (294ms).
[22:41:59.945] <TB2> INFO: Test took 1194ms.
[22:41:59.946] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:00.254] <TB2> INFO: Expecting 2560 events.
[22:42:01.144] <TB2> INFO: 2560 events read in total (298ms).
[22:42:01.145] <TB2> INFO: Test took 1199ms.
[22:42:01.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:01.453] <TB2> INFO: Expecting 2560 events.
[22:42:02.345] <TB2> INFO: 2560 events read in total (301ms).
[22:42:02.346] <TB2> INFO: Test took 1198ms.
[22:42:02.349] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:02.654] <TB2> INFO: Expecting 2560 events.
[22:42:03.545] <TB2> INFO: 2560 events read in total (299ms).
[22:42:03.545] <TB2> INFO: Test took 1196ms.
[22:42:03.549] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:03.853] <TB2> INFO: Expecting 2560 events.
[22:42:04.742] <TB2> INFO: 2560 events read in total (297ms).
[22:42:04.743] <TB2> INFO: Test took 1194ms.
[22:42:04.745] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:05.052] <TB2> INFO: Expecting 2560 events.
[22:42:05.942] <TB2> INFO: 2560 events read in total (299ms).
[22:42:05.943] <TB2> INFO: Test took 1198ms.
[22:42:05.946] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:06.251] <TB2> INFO: Expecting 2560 events.
[22:42:07.135] <TB2> INFO: 2560 events read in total (292ms).
[22:42:07.136] <TB2> INFO: Test took 1190ms.
[22:42:07.139] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:07.444] <TB2> INFO: Expecting 2560 events.
[22:42:08.335] <TB2> INFO: 2560 events read in total (299ms).
[22:42:08.335] <TB2> INFO: Test took 1196ms.
[22:42:08.337] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:08.642] <TB2> INFO: Expecting 2560 events.
[22:42:09.533] <TB2> INFO: 2560 events read in total (299ms).
[22:42:09.533] <TB2> INFO: Test took 1196ms.
[22:42:09.537] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:09.842] <TB2> INFO: Expecting 2560 events.
[22:42:10.734] <TB2> INFO: 2560 events read in total (301ms).
[22:42:10.734] <TB2> INFO: Test took 1198ms.
[22:42:10.737] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:11.042] <TB2> INFO: Expecting 2560 events.
[22:42:11.929] <TB2> INFO: 2560 events read in total (295ms).
[22:42:11.930] <TB2> INFO: Test took 1193ms.
[22:42:11.933] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:12.238] <TB2> INFO: Expecting 2560 events.
[22:42:13.132] <TB2> INFO: 2560 events read in total (302ms).
[22:42:13.133] <TB2> INFO: Test took 1200ms.
[22:42:13.135] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:13.443] <TB2> INFO: Expecting 2560 events.
[22:42:14.326] <TB2> INFO: 2560 events read in total (292ms).
[22:42:14.326] <TB2> INFO: Test took 1191ms.
[22:42:14.328] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:14.635] <TB2> INFO: Expecting 2560 events.
[22:42:15.534] <TB2> INFO: 2560 events read in total (307ms).
[22:42:15.534] <TB2> INFO: Test took 1206ms.
[22:42:15.537] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:15.842] <TB2> INFO: Expecting 2560 events.
[22:42:16.735] <TB2> INFO: 2560 events read in total (301ms).
[22:42:16.735] <TB2> INFO: Test took 1198ms.
[22:42:16.739] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:42:17.042] <TB2> INFO: Expecting 2560 events.
[22:42:17.934] <TB2> INFO: 2560 events read in total (300ms).
[22:42:17.934] <TB2> INFO: Test took 1195ms.
[22:42:18.408] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 637 seconds
[22:42:18.408] <TB2> INFO: PH scale (per ROC): 33 51 41 34 49 38 41 33 37 27 54 46 41 36 50 28
[22:42:18.408] <TB2> INFO: PH offset (per ROC): 101 127 109 106 131 93 106 87 114 95 126 109 108 101 120 88
[22:42:18.418] <TB2> INFO: Decoding statistics:
[22:42:18.418] <TB2> INFO: General information:
[22:42:18.418] <TB2> INFO: 16bit words read: 127880
[22:42:18.418] <TB2> INFO: valid events total: 20480
[22:42:18.418] <TB2> INFO: empty events: 17980
[22:42:18.418] <TB2> INFO: valid events with pixels: 2500
[22:42:18.418] <TB2> INFO: valid pixel hits: 2500
[22:42:18.418] <TB2> INFO: Event errors: 0
[22:42:18.418] <TB2> INFO: start marker: 0
[22:42:18.418] <TB2> INFO: stop marker: 0
[22:42:18.418] <TB2> INFO: overflow: 0
[22:42:18.418] <TB2> INFO: invalid 5bit words: 0
[22:42:18.418] <TB2> INFO: invalid XOR eye diagram: 0
[22:42:18.418] <TB2> INFO: frame (failed synchr.): 0
[22:42:18.418] <TB2> INFO: idle data (no TBM trl): 0
[22:42:18.418] <TB2> INFO: no data (only TBM hdr): 0
[22:42:18.418] <TB2> INFO: TBM errors: 0
[22:42:18.418] <TB2> INFO: flawed TBM headers: 0
[22:42:18.418] <TB2> INFO: flawed TBM trailers: 0
[22:42:18.418] <TB2> INFO: event ID mismatches: 0
[22:42:18.418] <TB2> INFO: ROC errors: 0
[22:42:18.418] <TB2> INFO: missing ROC header(s): 0
[22:42:18.418] <TB2> INFO: misplaced readback start: 0
[22:42:18.418] <TB2> INFO: Pixel decoding errors: 0
[22:42:18.418] <TB2> INFO: pixel data incomplete: 0
[22:42:18.418] <TB2> INFO: pixel address: 0
[22:42:18.418] <TB2> INFO: pulse height fill bit: 0
[22:42:18.418] <TB2> INFO: buffer corruption: 0
[22:42:18.579] <TB2> INFO: ######################################################################
[22:42:18.579] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[22:42:18.579] <TB2> INFO: ######################################################################
[22:42:18.594] <TB2> INFO: scanning low vcal = 10
[22:42:18.832] <TB2> INFO: Expecting 41600 events.
[22:42:22.411] <TB2> INFO: 41600 events read in total (2987ms).
[22:42:22.412] <TB2> INFO: Test took 3817ms.
[22:42:22.413] <TB2> INFO: scanning low vcal = 20
[22:42:22.706] <TB2> INFO: Expecting 41600 events.
[22:42:26.278] <TB2> INFO: 41600 events read in total (2980ms).
[22:42:26.279] <TB2> INFO: Test took 3866ms.
[22:42:26.280] <TB2> INFO: scanning low vcal = 30
[22:42:26.573] <TB2> INFO: Expecting 41600 events.
[22:42:30.292] <TB2> INFO: 41600 events read in total (3127ms).
[22:42:30.293] <TB2> INFO: Test took 4013ms.
[22:42:30.296] <TB2> INFO: scanning low vcal = 40
[22:42:30.572] <TB2> INFO: Expecting 41600 events.
[22:42:34.561] <TB2> INFO: 41600 events read in total (3397ms).
[22:42:34.562] <TB2> INFO: Test took 4266ms.
[22:42:34.565] <TB2> INFO: scanning low vcal = 50
[22:42:34.841] <TB2> INFO: Expecting 41600 events.
[22:42:38.816] <TB2> INFO: 41600 events read in total (3382ms).
[22:42:38.817] <TB2> INFO: Test took 4252ms.
[22:42:38.821] <TB2> INFO: scanning low vcal = 60
[22:42:39.097] <TB2> INFO: Expecting 41600 events.
[22:42:43.094] <TB2> INFO: 41600 events read in total (3405ms).
[22:42:43.095] <TB2> INFO: Test took 4274ms.
[22:42:43.098] <TB2> INFO: scanning low vcal = 70
[22:42:43.375] <TB2> INFO: Expecting 41600 events.
[22:42:47.379] <TB2> INFO: 41600 events read in total (3412ms).
[22:42:47.380] <TB2> INFO: Test took 4282ms.
[22:42:47.383] <TB2> INFO: scanning low vcal = 80
[22:42:47.659] <TB2> INFO: Expecting 41600 events.
[22:42:51.639] <TB2> INFO: 41600 events read in total (3388ms).
[22:42:51.640] <TB2> INFO: Test took 4257ms.
[22:42:51.643] <TB2> INFO: scanning low vcal = 90
[22:42:51.921] <TB2> INFO: Expecting 41600 events.
[22:42:55.890] <TB2> INFO: 41600 events read in total (3377ms).
[22:42:55.891] <TB2> INFO: Test took 4248ms.
[22:42:55.895] <TB2> INFO: scanning low vcal = 100
[22:42:56.171] <TB2> INFO: Expecting 41600 events.
[22:43:00.171] <TB2> INFO: 41600 events read in total (3409ms).
[22:43:00.172] <TB2> INFO: Test took 4277ms.
[22:43:00.175] <TB2> INFO: scanning low vcal = 110
[22:43:00.451] <TB2> INFO: Expecting 41600 events.
[22:43:04.468] <TB2> INFO: 41600 events read in total (3425ms).
[22:43:04.468] <TB2> INFO: Test took 4293ms.
[22:43:04.471] <TB2> INFO: scanning low vcal = 120
[22:43:04.748] <TB2> INFO: Expecting 41600 events.
[22:43:08.706] <TB2> INFO: 41600 events read in total (3366ms).
[22:43:08.706] <TB2> INFO: Test took 4235ms.
[22:43:08.710] <TB2> INFO: scanning low vcal = 130
[22:43:08.986] <TB2> INFO: Expecting 41600 events.
[22:43:12.946] <TB2> INFO: 41600 events read in total (3368ms).
[22:43:12.947] <TB2> INFO: Test took 4237ms.
[22:43:12.950] <TB2> INFO: scanning low vcal = 140
[22:43:13.227] <TB2> INFO: Expecting 41600 events.
[22:43:17.171] <TB2> INFO: 41600 events read in total (3352ms).
[22:43:17.172] <TB2> INFO: Test took 4222ms.
[22:43:17.175] <TB2> INFO: scanning low vcal = 150
[22:43:17.485] <TB2> INFO: Expecting 41600 events.
[22:43:21.473] <TB2> INFO: 41600 events read in total (3396ms).
[22:43:21.474] <TB2> INFO: Test took 4298ms.
[22:43:21.477] <TB2> INFO: scanning low vcal = 160
[22:43:21.754] <TB2> INFO: Expecting 41600 events.
[22:43:25.755] <TB2> INFO: 41600 events read in total (3409ms).
[22:43:25.756] <TB2> INFO: Test took 4279ms.
[22:43:25.759] <TB2> INFO: scanning low vcal = 170
[22:43:26.036] <TB2> INFO: Expecting 41600 events.
[22:43:30.018] <TB2> INFO: 41600 events read in total (3391ms).
[22:43:30.019] <TB2> INFO: Test took 4260ms.
[22:43:30.024] <TB2> INFO: scanning low vcal = 180
[22:43:30.299] <TB2> INFO: Expecting 41600 events.
[22:43:34.325] <TB2> INFO: 41600 events read in total (3435ms).
[22:43:34.326] <TB2> INFO: Test took 4302ms.
[22:43:34.329] <TB2> INFO: scanning low vcal = 190
[22:43:34.606] <TB2> INFO: Expecting 41600 events.
[22:43:38.675] <TB2> INFO: 41600 events read in total (3477ms).
[22:43:38.676] <TB2> INFO: Test took 4346ms.
[22:43:38.679] <TB2> INFO: scanning low vcal = 200
[22:43:38.967] <TB2> INFO: Expecting 41600 events.
[22:43:42.931] <TB2> INFO: 41600 events read in total (3371ms).
[22:43:42.932] <TB2> INFO: Test took 4253ms.
[22:43:42.935] <TB2> INFO: scanning low vcal = 210
[22:43:43.212] <TB2> INFO: Expecting 41600 events.
[22:43:47.213] <TB2> INFO: 41600 events read in total (3409ms).
[22:43:47.213] <TB2> INFO: Test took 4278ms.
[22:43:47.216] <TB2> INFO: scanning low vcal = 220
[22:43:47.493] <TB2> INFO: Expecting 41600 events.
[22:43:51.512] <TB2> INFO: 41600 events read in total (3427ms).
[22:43:51.513] <TB2> INFO: Test took 4297ms.
[22:43:51.516] <TB2> INFO: scanning low vcal = 230
[22:43:51.792] <TB2> INFO: Expecting 41600 events.
[22:43:55.791] <TB2> INFO: 41600 events read in total (3407ms).
[22:43:55.792] <TB2> INFO: Test took 4276ms.
[22:43:55.796] <TB2> INFO: scanning low vcal = 240
[22:43:56.077] <TB2> INFO: Expecting 41600 events.
[22:44:00.016] <TB2> INFO: 41600 events read in total (3348ms).
[22:44:00.017] <TB2> INFO: Test took 4221ms.
[22:44:00.020] <TB2> INFO: scanning low vcal = 250
[22:44:00.296] <TB2> INFO: Expecting 41600 events.
[22:44:04.234] <TB2> INFO: 41600 events read in total (3346ms).
[22:44:04.235] <TB2> INFO: Test took 4215ms.
[22:44:04.239] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[22:44:04.514] <TB2> INFO: Expecting 41600 events.
[22:44:08.479] <TB2> INFO: 41600 events read in total (3373ms).
[22:44:08.480] <TB2> INFO: Test took 4241ms.
[22:44:08.484] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[22:44:08.760] <TB2> INFO: Expecting 41600 events.
[22:44:12.709] <TB2> INFO: 41600 events read in total (3357ms).
[22:44:12.710] <TB2> INFO: Test took 4226ms.
[22:44:12.713] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[22:44:12.989] <TB2> INFO: Expecting 41600 events.
[22:44:16.967] <TB2> INFO: 41600 events read in total (3386ms).
[22:44:16.967] <TB2> INFO: Test took 4254ms.
[22:44:16.971] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[22:44:17.247] <TB2> INFO: Expecting 41600 events.
[22:44:21.177] <TB2> INFO: 41600 events read in total (3338ms).
[22:44:21.178] <TB2> INFO: Test took 4207ms.
[22:44:21.181] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[22:44:21.457] <TB2> INFO: Expecting 41600 events.
[22:44:25.390] <TB2> INFO: 41600 events read in total (3341ms).
[22:44:25.391] <TB2> INFO: Test took 4210ms.
[22:44:25.920] <TB2> INFO: PixTestGainPedestal::measure() done
[22:44:58.000] <TB2> INFO: PixTestGainPedestal::fit() done
[22:44:58.000] <TB2> INFO: non-linearity mean: 0.923 0.978 0.934 0.954 0.978 0.947 0.935 1.040 0.943 1.007 0.983 0.949 0.937 0.957 0.982 1.053
[22:44:58.000] <TB2> INFO: non-linearity RMS: 0.157 0.005 0.125 0.157 0.004 0.166 0.088 0.134 0.047 0.199 0.003 0.060 0.083 0.156 0.004 0.140
[22:44:58.001] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[22:44:59.015] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[22:44:59.030] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[22:44:59.045] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[22:44:59.060] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[22:44:59.075] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[22:44:59.090] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[22:44:59.105] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[22:44:59.120] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[22:44:59.135] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[22:44:59.150] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[22:44:59.165] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[22:44:59.180] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[22:44:59.195] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[22:44:59.210] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[22:44:59.225] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[22:44:59.245] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[22:44:59.245] <TB2> INFO: Decoding statistics:
[22:44:59.245] <TB2> INFO: General information:
[22:44:59.245] <TB2> INFO: 16bit words read: 3308742
[22:44:59.245] <TB2> INFO: valid events total: 332800
[22:44:59.245] <TB2> INFO: empty events: 174
[22:44:59.245] <TB2> INFO: valid events with pixels: 332626
[22:44:59.245] <TB2> INFO: valid pixel hits: 655971
[22:44:59.245] <TB2> INFO: Event errors: 0
[22:44:59.245] <TB2> INFO: start marker: 0
[22:44:59.245] <TB2> INFO: stop marker: 0
[22:44:59.245] <TB2> INFO: overflow: 0
[22:44:59.245] <TB2> INFO: invalid 5bit words: 0
[22:44:59.245] <TB2> INFO: invalid XOR eye diagram: 0
[22:44:59.245] <TB2> INFO: frame (failed synchr.): 0
[22:44:59.245] <TB2> INFO: idle data (no TBM trl): 0
[22:44:59.245] <TB2> INFO: no data (only TBM hdr): 0
[22:44:59.245] <TB2> INFO: TBM errors: 0
[22:44:59.245] <TB2> INFO: flawed TBM headers: 0
[22:44:59.245] <TB2> INFO: flawed TBM trailers: 0
[22:44:59.245] <TB2> INFO: event ID mismatches: 0
[22:44:59.245] <TB2> INFO: ROC errors: 0
[22:44:59.245] <TB2> INFO: missing ROC header(s): 0
[22:44:59.245] <TB2> INFO: misplaced readback start: 0
[22:44:59.245] <TB2> INFO: Pixel decoding errors: 0
[22:44:59.245] <TB2> INFO: pixel data incomplete: 0
[22:44:59.245] <TB2> INFO: pixel address: 0
[22:44:59.245] <TB2> INFO: pulse height fill bit: 0
[22:44:59.245] <TB2> INFO: buffer corruption: 0
[22:44:59.262] <TB2> INFO: Decoding statistics:
[22:44:59.262] <TB2> INFO: General information:
[22:44:59.262] <TB2> INFO: 16bit words read: 3438158
[22:44:59.262] <TB2> INFO: valid events total: 353536
[22:44:59.262] <TB2> INFO: empty events: 18410
[22:44:59.262] <TB2> INFO: valid events with pixels: 335126
[22:44:59.262] <TB2> INFO: valid pixel hits: 658471
[22:44:59.262] <TB2> INFO: Event errors: 0
[22:44:59.262] <TB2> INFO: start marker: 0
[22:44:59.262] <TB2> INFO: stop marker: 0
[22:44:59.262] <TB2> INFO: overflow: 0
[22:44:59.262] <TB2> INFO: invalid 5bit words: 0
[22:44:59.262] <TB2> INFO: invalid XOR eye diagram: 0
[22:44:59.262] <TB2> INFO: frame (failed synchr.): 0
[22:44:59.262] <TB2> INFO: idle data (no TBM trl): 0
[22:44:59.262] <TB2> INFO: no data (only TBM hdr): 0
[22:44:59.262] <TB2> INFO: TBM errors: 0
[22:44:59.262] <TB2> INFO: flawed TBM headers: 0
[22:44:59.262] <TB2> INFO: flawed TBM trailers: 0
[22:44:59.262] <TB2> INFO: event ID mismatches: 0
[22:44:59.262] <TB2> INFO: ROC errors: 0
[22:44:59.262] <TB2> INFO: missing ROC header(s): 0
[22:44:59.262] <TB2> INFO: misplaced readback start: 0
[22:44:59.262] <TB2> INFO: Pixel decoding errors: 0
[22:44:59.262] <TB2> INFO: pixel data incomplete: 0
[22:44:59.262] <TB2> INFO: pixel address: 0
[22:44:59.262] <TB2> INFO: pulse height fill bit: 0
[22:44:59.262] <TB2> INFO: buffer corruption: 0
[22:44:59.262] <TB2> INFO: enter test to run
[22:44:59.262] <TB2> INFO: test: exit no parameter change
[22:44:59.404] <TB2> QUIET: Connection to board 149 closed.
[22:44:59.405] <TB2> INFO: pXar: this is the end, my friend