[19:37:55.796] <TB2> INFO: *** Welcome to pxar ***
[19:37:55.796] <TB2> INFO: *** Today: 2016/10/14
[19:37:55.802] <TB2> INFO: *** Version: c8ba-dirty
[19:37:55.802] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C15.dat
[19:37:55.802] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C1b.dat
[19:37:55.803] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//defaultMaskFile.dat
[19:37:55.803] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters_C15.dat
[19:37:55.865] <TB2> INFO: clk: 4
[19:37:55.865] <TB2> INFO: ctr: 4
[19:37:55.865] <TB2> INFO: sda: 19
[19:37:55.865] <TB2> INFO: tin: 9
[19:37:55.865] <TB2> INFO: level: 15
[19:37:55.865] <TB2> INFO: triggerdelay: 0
[19:37:55.865] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[19:37:55.865] <TB2> INFO: Log level: INFO
[19:37:55.874] <TB2> INFO: Found DTB DTB_WWXUD2
[19:37:55.884] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[19:37:55.886] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[19:37:55.888] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[19:37:57.438] <TB2> INFO: DUT info:
[19:37:57.438] <TB2> INFO: The DUT currently contains the following objects:
[19:37:57.438] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[19:37:57.438] <TB2> INFO: TBM Core alpha (0): 7 registers set
[19:37:57.438] <TB2> INFO: TBM Core beta (1): 7 registers set
[19:37:57.438] <TB2> INFO: TBM Core alpha (2): 7 registers set
[19:37:57.438] <TB2> INFO: TBM Core beta (3): 7 registers set
[19:37:57.438] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:37:57.438] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.438] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:37:57.840] <TB2> INFO: enter 'restricted' command line mode
[19:37:57.840] <TB2> INFO: enter test to run
[19:37:57.840] <TB2> INFO: test: pretest no parameter change
[19:37:57.840] <TB2> INFO: running: pretest
[19:37:57.846] <TB2> INFO: ######################################################################
[19:37:57.846] <TB2> INFO: PixTestPretest::doTest()
[19:37:57.846] <TB2> INFO: ######################################################################
[19:37:57.848] <TB2> INFO: ----------------------------------------------------------------------
[19:37:57.848] <TB2> INFO: PixTestPretest::programROC()
[19:37:57.848] <TB2> INFO: ----------------------------------------------------------------------
[19:38:15.861] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:38:15.862] <TB2> INFO: IA differences per ROC: 19.3 17.7 17.7 20.1 18.5 20.1 20.1 20.1 20.1 18.5 21.7 20.1 19.3 20.9 20.1 20.1
[19:38:15.924] <TB2> INFO: ----------------------------------------------------------------------
[19:38:15.924] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:38:15.924] <TB2> INFO: ----------------------------------------------------------------------
[19:38:22.524] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[19:38:22.525] <TB2> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3 20.1 19.3
[19:38:22.558] <TB2> INFO: ----------------------------------------------------------------------
[19:38:22.558] <TB2> INFO: PixTestPretest::findTiming()
[19:38:22.558] <TB2> INFO: ----------------------------------------------------------------------
[19:38:22.558] <TB2> INFO: PixTestCmd::init()

[19:38:54.547] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:38:54.547] <TB2> INFO: (success/tries = 100/100), width = 4
[19:38:56.050] <TB2> INFO: ----------------------------------------------------------------------
[19:38:56.050] <TB2> INFO: PixTestPretest::findWorkingPixel()
[19:38:56.050] <TB2> INFO: ----------------------------------------------------------------------
[19:38:56.142] <TB2> INFO: Expecting 231680 events.
[19:39:06.014] <TB2> INFO: 231680 events read in total (9280ms).
[19:39:06.022] <TB2> INFO: Test took 9970ms.
[19:39:06.261] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:39:06.293] <TB2> INFO: ----------------------------------------------------------------------
[19:39:06.293] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[19:39:06.293] <TB2> INFO: ----------------------------------------------------------------------
[19:39:06.388] <TB2> INFO: Expecting 231680 events.
[19:39:16.356] <TB2> INFO: 231680 events read in total (9376ms).
[19:39:16.363] <TB2> INFO: Test took 10065ms.
[19:39:16.633] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[19:39:16.633] <TB2> INFO: CalDel: 106 99 109 87 99 111 101 108 109 122 102 101 106 106 113 100
[19:39:16.633] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 53 51 51 51 53 51 51 51
[19:39:16.637] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C0.dat
[19:39:16.637] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C1.dat
[19:39:16.637] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C2.dat
[19:39:16.637] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C3.dat
[19:39:16.638] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C4.dat
[19:39:16.638] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C5.dat
[19:39:16.638] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C6.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C7.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C8.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C9.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C10.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C11.dat
[19:39:16.639] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C12.dat
[19:39:16.640] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C13.dat
[19:39:16.640] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C14.dat
[19:39:16.640] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters_C15.dat
[19:39:16.640] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C0a.dat
[19:39:16.640] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C0b.dat
[19:39:16.640] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C1a.dat
[19:39:16.640] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//tbmParameters_C1b.dat
[19:39:16.640] <TB2> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[19:39:16.695] <TB2> INFO: enter test to run
[19:39:16.695] <TB2> INFO: test: FullTest no parameter change
[19:39:16.695] <TB2> INFO: running: fulltest
[19:39:16.695] <TB2> INFO: ######################################################################
[19:39:16.695] <TB2> INFO: PixTestFullTest::doTest()
[19:39:16.695] <TB2> INFO: ######################################################################
[19:39:16.696] <TB2> INFO: ######################################################################
[19:39:16.696] <TB2> INFO: PixTestAlive::doTest()
[19:39:16.696] <TB2> INFO: ######################################################################
[19:39:16.698] <TB2> INFO: ----------------------------------------------------------------------
[19:39:16.698] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:39:16.698] <TB2> INFO: ----------------------------------------------------------------------
[19:39:16.982] <TB2> INFO: Expecting 41600 events.
[19:39:20.434] <TB2> INFO: 41600 events read in total (2860ms).
[19:39:20.434] <TB2> INFO: Test took 3735ms.
[19:39:20.661] <TB2> INFO: PixTestAlive::aliveTest() done
[19:39:20.661] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:39:20.662] <TB2> INFO: ----------------------------------------------------------------------
[19:39:20.662] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:39:20.662] <TB2> INFO: ----------------------------------------------------------------------
[19:39:20.915] <TB2> INFO: Expecting 41600 events.
[19:39:23.941] <TB2> INFO: 41600 events read in total (2434ms).
[19:39:23.941] <TB2> INFO: Test took 3277ms.
[19:39:23.941] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:39:24.189] <TB2> INFO: PixTestAlive::maskTest() done
[19:39:24.189] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:39:24.191] <TB2> INFO: ----------------------------------------------------------------------
[19:39:24.191] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:39:24.191] <TB2> INFO: ----------------------------------------------------------------------
[19:39:24.434] <TB2> INFO: Expecting 41600 events.
[19:39:27.973] <TB2> INFO: 41600 events read in total (2948ms).
[19:39:27.974] <TB2> INFO: Test took 3781ms.
[19:39:28.204] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[19:39:28.205] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:39:28.205] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:39:28.205] <TB2> INFO: Decoding statistics:
[19:39:28.205] <TB2> INFO: General information:
[19:39:28.205] <TB2> INFO: 16bit words read: 0
[19:39:28.205] <TB2> INFO: valid events total: 0
[19:39:28.205] <TB2> INFO: empty events: 0
[19:39:28.205] <TB2> INFO: valid events with pixels: 0
[19:39:28.205] <TB2> INFO: valid pixel hits: 0
[19:39:28.205] <TB2> INFO: Event errors: 0
[19:39:28.205] <TB2> INFO: start marker: 0
[19:39:28.205] <TB2> INFO: stop marker: 0
[19:39:28.205] <TB2> INFO: overflow: 0
[19:39:28.205] <TB2> INFO: invalid 5bit words: 0
[19:39:28.205] <TB2> INFO: invalid XOR eye diagram: 0
[19:39:28.205] <TB2> INFO: frame (failed synchr.): 0
[19:39:28.205] <TB2> INFO: idle data (no TBM trl): 0
[19:39:28.205] <TB2> INFO: no data (only TBM hdr): 0
[19:39:28.205] <TB2> INFO: TBM errors: 0
[19:39:28.205] <TB2> INFO: flawed TBM headers: 0
[19:39:28.205] <TB2> INFO: flawed TBM trailers: 0
[19:39:28.205] <TB2> INFO: event ID mismatches: 0
[19:39:28.205] <TB2> INFO: ROC errors: 0
[19:39:28.205] <TB2> INFO: missing ROC header(s): 0
[19:39:28.205] <TB2> INFO: misplaced readback start: 0
[19:39:28.205] <TB2> INFO: Pixel decoding errors: 0
[19:39:28.205] <TB2> INFO: pixel data incomplete: 0
[19:39:28.205] <TB2> INFO: pixel address: 0
[19:39:28.205] <TB2> INFO: pulse height fill bit: 0
[19:39:28.205] <TB2> INFO: buffer corruption: 0
[19:39:28.210] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C15.dat
[19:39:28.211] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[19:39:28.211] <TB2> INFO: ######################################################################
[19:39:28.211] <TB2> INFO: PixTestReadback::doTest()
[19:39:28.211] <TB2> INFO: ######################################################################
[19:39:28.211] <TB2> INFO: ----------------------------------------------------------------------
[19:39:28.211] <TB2> INFO: PixTestReadback::CalibrateVd()
[19:39:28.211] <TB2> INFO: ----------------------------------------------------------------------
[19:39:38.175] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C0.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C1.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C2.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C3.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C4.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C5.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C6.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C7.dat
[19:39:38.176] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C8.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C9.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C10.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C11.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C12.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C13.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C14.dat
[19:39:38.177] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C15.dat
[19:39:38.210] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:39:38.210] <TB2> INFO: ----------------------------------------------------------------------
[19:39:38.210] <TB2> INFO: PixTestReadback::CalibrateVa()
[19:39:38.210] <TB2> INFO: ----------------------------------------------------------------------
[19:39:48.138] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C0.dat
[19:39:48.138] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C1.dat
[19:39:48.138] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C2.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C3.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C4.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C5.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C6.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C7.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C8.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C9.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C10.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C11.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C12.dat
[19:39:48.139] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C13.dat
[19:39:48.140] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C14.dat
[19:39:48.140] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C15.dat
[19:39:48.169] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:39:48.170] <TB2> INFO: ----------------------------------------------------------------------
[19:39:48.170] <TB2> INFO: PixTestReadback::readbackVbg()
[19:39:48.170] <TB2> INFO: ----------------------------------------------------------------------
[19:39:55.834] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:39:55.834] <TB2> INFO: ----------------------------------------------------------------------
[19:39:55.834] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[19:39:55.834] <TB2> INFO: ----------------------------------------------------------------------
[19:39:55.834] <TB2> INFO: Vbg will be calibrated using Vd calibration
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.2calibrated Vbg = 1.18279 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 146.3calibrated Vbg = 1.18122 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.9calibrated Vbg = 1.18284 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.8calibrated Vbg = 1.17465 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.4calibrated Vbg = 1.17138 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.2calibrated Vbg = 1.18477 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.2calibrated Vbg = 1.17898 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.7calibrated Vbg = 1.18434 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.6calibrated Vbg = 1.18031 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.7calibrated Vbg = 1.1821 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.9calibrated Vbg = 1.18222 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.6calibrated Vbg = 1.1737 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.8calibrated Vbg = 1.18284 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.6calibrated Vbg = 1.17898 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.6calibrated Vbg = 1.18131 :::*/*/*/*/
[19:39:55.834] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 156.8calibrated Vbg = 1.17918 :::*/*/*/*/
[19:39:55.838] <TB2> INFO: ----------------------------------------------------------------------
[19:39:55.838] <TB2> INFO: PixTestReadback::CalibrateIa()
[19:39:55.838] <TB2> INFO: ----------------------------------------------------------------------
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C0.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C1.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C2.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C3.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C4.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C5.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C6.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C7.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C8.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C9.dat
[19:42:36.602] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C10.dat
[19:42:36.603] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C11.dat
[19:42:36.603] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C12.dat
[19:42:36.603] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C13.dat
[19:42:36.603] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C14.dat
[19:42:36.603] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//readbackCal_C15.dat
[19:42:36.631] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:42:36.633] <TB2> INFO: PixTestReadback::doTest() done
[19:42:36.633] <TB2> INFO: Decoding statistics:
[19:42:36.633] <TB2> INFO: General information:
[19:42:36.633] <TB2> INFO: 16bit words read: 1536
[19:42:36.633] <TB2> INFO: valid events total: 256
[19:42:36.633] <TB2> INFO: empty events: 256
[19:42:36.633] <TB2> INFO: valid events with pixels: 0
[19:42:36.634] <TB2> INFO: valid pixel hits: 0
[19:42:36.634] <TB2> INFO: Event errors: 0
[19:42:36.634] <TB2> INFO: start marker: 0
[19:42:36.634] <TB2> INFO: stop marker: 0
[19:42:36.634] <TB2> INFO: overflow: 0
[19:42:36.634] <TB2> INFO: invalid 5bit words: 0
[19:42:36.634] <TB2> INFO: invalid XOR eye diagram: 0
[19:42:36.634] <TB2> INFO: frame (failed synchr.): 0
[19:42:36.634] <TB2> INFO: idle data (no TBM trl): 0
[19:42:36.634] <TB2> INFO: no data (only TBM hdr): 0
[19:42:36.634] <TB2> INFO: TBM errors: 0
[19:42:36.634] <TB2> INFO: flawed TBM headers: 0
[19:42:36.634] <TB2> INFO: flawed TBM trailers: 0
[19:42:36.634] <TB2> INFO: event ID mismatches: 0
[19:42:36.634] <TB2> INFO: ROC errors: 0
[19:42:36.634] <TB2> INFO: missing ROC header(s): 0
[19:42:36.634] <TB2> INFO: misplaced readback start: 0
[19:42:36.634] <TB2> INFO: Pixel decoding errors: 0
[19:42:36.634] <TB2> INFO: pixel data incomplete: 0
[19:42:36.634] <TB2> INFO: pixel address: 0
[19:42:36.634] <TB2> INFO: pulse height fill bit: 0
[19:42:36.634] <TB2> INFO: buffer corruption: 0
[19:42:36.685] <TB2> INFO: ######################################################################
[19:42:36.685] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:42:36.685] <TB2> INFO: ######################################################################
[19:42:36.687] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:42:36.701] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:42:36.701] <TB2> INFO: run 1 of 1
[19:42:36.937] <TB2> INFO: Expecting 3120000 events.
[19:43:07.242] <TB2> INFO: 620805 events read in total (29713ms).
[19:43:36.158] <TB2> INFO: 1236095 events read in total (58629ms).











[19:44:04.975] <TB2> INFO: 1848805 events read in total (87446ms).











[19:44:34.013] <TB2> INFO: 2460475 events read in total (116484ms).











[19:45:02.675] <TB2> INFO: 3071305 events read in total (145146ms).
[19:45:05.345] <TB2> INFO: 3120000 events read in total (147816ms).
[19:45:05.434] <TB2> INFO: Test took 148732ms.
[19:45:29.866] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 173 seconds
[19:45:29.866] <TB2> INFO: number of dead bumps (per ROC): 39 0 3 1 9 9 4 4 4 5 0 86 1 1 4 15
[19:45:29.866] <TB2> INFO: separation cut (per ROC): 72 80 96 103 96 102 94 89 105 106 108 88 113 114 76 66
[19:45:29.866] <TB2> INFO: Decoding statistics:
[19:45:29.866] <TB2> INFO: General information:
[19:45:29.866] <TB2> INFO: 16bit words read: 0
[19:45:29.866] <TB2> INFO: valid events total: 0
[19:45:29.866] <TB2> INFO: empty events: 0
[19:45:29.866] <TB2> INFO: valid events with pixels: 0
[19:45:29.866] <TB2> INFO: valid pixel hits: 0
[19:45:29.866] <TB2> INFO: Event errors: 0
[19:45:29.866] <TB2> INFO: start marker: 0
[19:45:29.866] <TB2> INFO: stop marker: 0
[19:45:29.866] <TB2> INFO: overflow: 0
[19:45:29.866] <TB2> INFO: invalid 5bit words: 0
[19:45:29.866] <TB2> INFO: invalid XOR eye diagram: 0
[19:45:29.866] <TB2> INFO: frame (failed synchr.): 0
[19:45:29.866] <TB2> INFO: idle data (no TBM trl): 0
[19:45:29.866] <TB2> INFO: no data (only TBM hdr): 0
[19:45:29.866] <TB2> INFO: TBM errors: 0
[19:45:29.866] <TB2> INFO: flawed TBM headers: 0
[19:45:29.866] <TB2> INFO: flawed TBM trailers: 0
[19:45:29.866] <TB2> INFO: event ID mismatches: 0
[19:45:29.866] <TB2> INFO: ROC errors: 0
[19:45:29.866] <TB2> INFO: missing ROC header(s): 0
[19:45:29.866] <TB2> INFO: misplaced readback start: 0
[19:45:29.866] <TB2> INFO: Pixel decoding errors: 0
[19:45:29.866] <TB2> INFO: pixel data incomplete: 0
[19:45:29.866] <TB2> INFO: pixel address: 0
[19:45:29.866] <TB2> INFO: pulse height fill bit: 0
[19:45:29.866] <TB2> INFO: buffer corruption: 0
[19:45:29.918] <TB2> INFO: ######################################################################
[19:45:29.918] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:45:29.918] <TB2> INFO: ######################################################################
[19:45:29.918] <TB2> INFO: ----------------------------------------------------------------------
[19:45:29.918] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:45:29.918] <TB2> INFO: ----------------------------------------------------------------------
[19:45:29.918] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:45:29.933] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[19:45:29.933] <TB2> INFO: run 1 of 1
[19:45:30.208] <TB2> INFO: Expecting 36608000 events.
[19:45:53.942] <TB2> INFO: 666650 events read in total (23142ms).
[19:46:16.549] <TB2> INFO: 1321850 events read in total (45749ms).
[19:46:39.620] <TB2> INFO: 1977700 events read in total (68820ms).
[19:47:02.302] <TB2> INFO: 2632200 events read in total (91502ms).
[19:47:24.883] <TB2> INFO: 3285850 events read in total (114083ms).
[19:47:47.759] <TB2> INFO: 3938700 events read in total (136959ms).
[19:48:10.166] <TB2> INFO: 4591200 events read in total (159366ms).
[19:48:33.142] <TB2> INFO: 5243950 events read in total (182342ms).
[19:48:55.598] <TB2> INFO: 5896750 events read in total (204798ms).
[19:49:18.400] <TB2> INFO: 6549600 events read in total (227600ms).
[19:49:41.162] <TB2> INFO: 7202450 events read in total (250362ms).
[19:50:03.935] <TB2> INFO: 7853650 events read in total (273135ms).
[19:50:26.660] <TB2> INFO: 8505000 events read in total (295860ms).
[19:50:49.323] <TB2> INFO: 9157300 events read in total (318523ms).
[19:51:11.987] <TB2> INFO: 9808600 events read in total (341187ms).
[19:51:34.471] <TB2> INFO: 10457850 events read in total (363671ms).
[19:51:57.091] <TB2> INFO: 11107050 events read in total (386291ms).
[19:52:19.504] <TB2> INFO: 11756250 events read in total (408704ms).
[19:52:42.081] <TB2> INFO: 12405750 events read in total (431281ms).
[19:53:04.945] <TB2> INFO: 13055800 events read in total (454145ms).
[19:53:27.527] <TB2> INFO: 13706700 events read in total (476727ms).
[19:53:49.969] <TB2> INFO: 14355850 events read in total (499169ms).
[19:54:12.366] <TB2> INFO: 15004200 events read in total (521566ms).
[19:54:35.224] <TB2> INFO: 15652950 events read in total (544424ms).
[19:54:58.238] <TB2> INFO: 16303300 events read in total (567438ms).
[19:55:20.956] <TB2> INFO: 16952500 events read in total (590156ms).
[19:55:43.512] <TB2> INFO: 17598400 events read in total (612712ms).
[19:56:06.193] <TB2> INFO: 18244850 events read in total (635393ms).
[19:56:28.991] <TB2> INFO: 18890700 events read in total (658191ms).
[19:56:51.562] <TB2> INFO: 19536300 events read in total (680762ms).
[19:57:14.161] <TB2> INFO: 20183650 events read in total (703361ms).
[19:57:37.070] <TB2> INFO: 20830200 events read in total (726270ms).
[19:57:59.679] <TB2> INFO: 21475900 events read in total (748879ms).
[19:58:22.540] <TB2> INFO: 22119750 events read in total (771740ms).
[19:58:45.149] <TB2> INFO: 22765450 events read in total (794349ms).
[19:59:07.767] <TB2> INFO: 23410100 events read in total (816967ms).
[19:59:30.443] <TB2> INFO: 24055950 events read in total (839643ms).
[19:59:53.189] <TB2> INFO: 24699650 events read in total (862389ms).
[20:00:15.957] <TB2> INFO: 25345200 events read in total (885157ms).
[20:00:38.410] <TB2> INFO: 25988050 events read in total (907610ms).
[20:01:01.150] <TB2> INFO: 26633900 events read in total (930350ms).
[20:01:23.710] <TB2> INFO: 27277550 events read in total (952910ms).
[20:01:46.483] <TB2> INFO: 27923100 events read in total (975683ms).
[20:02:09.276] <TB2> INFO: 28567950 events read in total (998476ms).
[20:02:31.793] <TB2> INFO: 29213300 events read in total (1020993ms).
[20:02:53.966] <TB2> INFO: 29857400 events read in total (1043166ms).
[20:03:16.496] <TB2> INFO: 30500250 events read in total (1065696ms).
[20:03:38.812] <TB2> INFO: 31145700 events read in total (1088012ms).
[20:04:01.114] <TB2> INFO: 31789450 events read in total (1110314ms).
[20:04:23.656] <TB2> INFO: 32432500 events read in total (1132856ms).
[20:04:46.287] <TB2> INFO: 33077100 events read in total (1155487ms).
[20:05:08.893] <TB2> INFO: 33723900 events read in total (1178093ms).
[20:05:31.523] <TB2> INFO: 34368300 events read in total (1200723ms).
[20:05:54.008] <TB2> INFO: 35011900 events read in total (1223208ms).
[20:06:16.520] <TB2> INFO: 35656450 events read in total (1245720ms).
[20:06:39.307] <TB2> INFO: 36311800 events read in total (1268507ms).
[20:06:49.859] <TB2> INFO: 36608000 events read in total (1279059ms).
[20:06:49.961] <TB2> INFO: Test took 1280028ms.
[20:06:50.479] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:06:52.167] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:06:54.155] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:06:56.436] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:06:58.035] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:06:59.566] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:01.344] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:02.953] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:04.885] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:06.951] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:08.946] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:11.235] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:13.323] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:15.363] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:17.683] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:19.493] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[20:07:21.730] <TB2> INFO: PixTestScurves::scurves() done
[20:07:21.730] <TB2> INFO: Vcal mean: 108.52 104.36 112.96 120.49 99.85 107.24 111.00 110.27 122.85 108.47 116.41 122.12 111.19 116.69 108.03 112.07
[20:07:21.730] <TB2> INFO: Vcal RMS: 4.97 5.25 5.43 5.89 5.35 5.20 4.63 5.17 6.38 5.83 5.91 6.56 4.80 5.48 5.11 5.05
[20:07:21.730] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1311 seconds
[20:07:21.730] <TB2> INFO: Decoding statistics:
[20:07:21.730] <TB2> INFO: General information:
[20:07:21.730] <TB2> INFO: 16bit words read: 0
[20:07:21.730] <TB2> INFO: valid events total: 0
[20:07:21.730] <TB2> INFO: empty events: 0
[20:07:21.730] <TB2> INFO: valid events with pixels: 0
[20:07:21.730] <TB2> INFO: valid pixel hits: 0
[20:07:21.730] <TB2> INFO: Event errors: 0
[20:07:21.730] <TB2> INFO: start marker: 0
[20:07:21.730] <TB2> INFO: stop marker: 0
[20:07:21.730] <TB2> INFO: overflow: 0
[20:07:21.730] <TB2> INFO: invalid 5bit words: 0
[20:07:21.730] <TB2> INFO: invalid XOR eye diagram: 0
[20:07:21.730] <TB2> INFO: frame (failed synchr.): 0
[20:07:21.730] <TB2> INFO: idle data (no TBM trl): 0
[20:07:21.730] <TB2> INFO: no data (only TBM hdr): 0
[20:07:21.730] <TB2> INFO: TBM errors: 0
[20:07:21.730] <TB2> INFO: flawed TBM headers: 0
[20:07:21.730] <TB2> INFO: flawed TBM trailers: 0
[20:07:21.730] <TB2> INFO: event ID mismatches: 0
[20:07:21.730] <TB2> INFO: ROC errors: 0
[20:07:21.730] <TB2> INFO: missing ROC header(s): 0
[20:07:21.730] <TB2> INFO: misplaced readback start: 0
[20:07:21.730] <TB2> INFO: Pixel decoding errors: 0
[20:07:21.730] <TB2> INFO: pixel data incomplete: 0
[20:07:21.730] <TB2> INFO: pixel address: 0
[20:07:21.730] <TB2> INFO: pulse height fill bit: 0
[20:07:21.730] <TB2> INFO: buffer corruption: 0
[20:07:21.822] <TB2> INFO: ######################################################################
[20:07:21.822] <TB2> INFO: PixTestTrim::doTest()
[20:07:21.822] <TB2> INFO: ######################################################################
[20:07:21.824] <TB2> INFO: ----------------------------------------------------------------------
[20:07:21.824] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[20:07:21.824] <TB2> INFO: ----------------------------------------------------------------------
[20:07:21.871] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:07:21.871] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:07:21.885] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:07:21.886] <TB2> INFO: run 1 of 1
[20:07:22.127] <TB2> INFO: Expecting 5025280 events.
[20:07:52.086] <TB2> INFO: 810744 events read in total (29359ms).
[20:08:21.517] <TB2> INFO: 1618448 events read in total (58790ms).
[20:08:51.158] <TB2> INFO: 2424488 events read in total (88432ms).
[20:09:20.828] <TB2> INFO: 3228648 events read in total (118101ms).
[20:09:50.558] <TB2> INFO: 4030104 events read in total (147831ms).
[20:10:20.573] <TB2> INFO: 4830424 events read in total (177846ms).
[20:10:27.966] <TB2> INFO: 5025280 events read in total (185239ms).
[20:10:28.037] <TB2> INFO: Test took 186152ms.
[20:10:47.691] <TB2> INFO: ROC 0 VthrComp = 110
[20:10:47.692] <TB2> INFO: ROC 1 VthrComp = 106
[20:10:47.692] <TB2> INFO: ROC 2 VthrComp = 113
[20:10:47.692] <TB2> INFO: ROC 3 VthrComp = 128
[20:10:47.692] <TB2> INFO: ROC 4 VthrComp = 104
[20:10:47.692] <TB2> INFO: ROC 5 VthrComp = 114
[20:10:47.692] <TB2> INFO: ROC 6 VthrComp = 116
[20:10:47.692] <TB2> INFO: ROC 7 VthrComp = 116
[20:10:47.692] <TB2> INFO: ROC 8 VthrComp = 124
[20:10:47.692] <TB2> INFO: ROC 9 VthrComp = 104
[20:10:47.692] <TB2> INFO: ROC 10 VthrComp = 125
[20:10:47.692] <TB2> INFO: ROC 11 VthrComp = 127
[20:10:47.693] <TB2> INFO: ROC 12 VthrComp = 116
[20:10:47.693] <TB2> INFO: ROC 13 VthrComp = 119
[20:10:47.693] <TB2> INFO: ROC 14 VthrComp = 114
[20:10:47.693] <TB2> INFO: ROC 15 VthrComp = 113
[20:10:47.693] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:10:47.693] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:10:47.708] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:10:47.708] <TB2> INFO: run 1 of 1
[20:10:48.031] <TB2> INFO: Expecting 5025280 events.
[20:11:14.463] <TB2> INFO: 590568 events read in total (25841ms).
[20:11:40.188] <TB2> INFO: 1180616 events read in total (51567ms).
[20:12:05.611] <TB2> INFO: 1769576 events read in total (76989ms).
[20:12:31.543] <TB2> INFO: 2358496 events read in total (102921ms).
[20:12:56.926] <TB2> INFO: 2944624 events read in total (128304ms).
[20:13:22.640] <TB2> INFO: 3530336 events read in total (154018ms).
[20:13:48.037] <TB2> INFO: 4114728 events read in total (179415ms).
[20:14:13.909] <TB2> INFO: 4698216 events read in total (205287ms).
[20:14:28.620] <TB2> INFO: 5025280 events read in total (219998ms).
[20:14:28.710] <TB2> INFO: Test took 221002ms.
[20:14:56.415] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.5917 for pixel 9/18 mean/min/max = 48.5411/34.4526/62.6297
[20:14:56.416] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.524 for pixel 10/7 mean/min/max = 47.6219/34.3812/60.8626
[20:14:56.416] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.7447 for pixel 43/10 mean/min/max = 47.0809/32.3087/61.8531
[20:14:56.417] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.1719 for pixel 14/4 mean/min/max = 46.3609/32.4869/60.2349
[20:14:56.417] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.6691 for pixel 0/8 mean/min/max = 47.0716/34.1987/59.9445
[20:14:56.418] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.3297 for pixel 2/14 mean/min/max = 45.608/31.7646/59.4514
[20:14:56.418] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.6992 for pixel 34/4 mean/min/max = 45.5385/32.2953/58.7818
[20:14:56.419] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.5223 for pixel 19/2 mean/min/max = 46.1447/31.7528/60.5366
[20:14:56.419] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 64.1989 for pixel 51/4 mean/min/max = 47.3267/30.4516/64.2019
[20:14:56.420] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 65.6479 for pixel 15/24 mean/min/max = 49.5051/33.1743/65.8358
[20:14:56.420] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.8921 for pixel 0/0 mean/min/max = 45.0402/30.1834/59.897
[20:14:56.421] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.1716 for pixel 2/49 mean/min/max = 45.6833/29.8103/61.5562
[20:14:56.421] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.2711 for pixel 44/22 mean/min/max = 45.6568/32.0148/59.2989
[20:14:56.422] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.9707 for pixel 1/1 mean/min/max = 45.8013/31.5518/60.0507
[20:14:56.422] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.9253 for pixel 19/1 mean/min/max = 45.8326/31.6264/60.0389
[20:14:56.423] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 61.5812 for pixel 45/17 mean/min/max = 46.7768/31.9626/61.591
[20:14:56.423] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:14:56.512] <TB2> INFO: Expecting 411648 events.
[20:15:05.939] <TB2> INFO: 411648 events read in total (8829ms).
[20:15:05.947] <TB2> INFO: Expecting 411648 events.
[20:15:15.104] <TB2> INFO: 411648 events read in total (8754ms).
[20:15:15.114] <TB2> INFO: Expecting 411648 events.
[20:15:24.483] <TB2> INFO: 411648 events read in total (8966ms).
[20:15:24.500] <TB2> INFO: Expecting 411648 events.
[20:15:33.799] <TB2> INFO: 411648 events read in total (8896ms).
[20:15:33.815] <TB2> INFO: Expecting 411648 events.
[20:15:43.106] <TB2> INFO: 411648 events read in total (8888ms).
[20:15:43.125] <TB2> INFO: Expecting 411648 events.
[20:15:52.479] <TB2> INFO: 411648 events read in total (8951ms).
[20:15:52.508] <TB2> INFO: Expecting 411648 events.
[20:16:01.762] <TB2> INFO: 411648 events read in total (8851ms).
[20:16:01.787] <TB2> INFO: Expecting 411648 events.
[20:16:11.124] <TB2> INFO: 411648 events read in total (8934ms).
[20:16:11.154] <TB2> INFO: Expecting 411648 events.
[20:16:20.386] <TB2> INFO: 411648 events read in total (8829ms).
[20:16:20.416] <TB2> INFO: Expecting 411648 events.
[20:16:29.671] <TB2> INFO: 411648 events read in total (8852ms).
[20:16:29.706] <TB2> INFO: Expecting 411648 events.
[20:16:39.080] <TB2> INFO: 411648 events read in total (8971ms).
[20:16:39.116] <TB2> INFO: Expecting 411648 events.
[20:16:48.391] <TB2> INFO: 411648 events read in total (8872ms).
[20:16:48.430] <TB2> INFO: Expecting 411648 events.
[20:16:57.792] <TB2> INFO: 411648 events read in total (8959ms).
[20:16:57.837] <TB2> INFO: Expecting 411648 events.
[20:17:07.157] <TB2> INFO: 411648 events read in total (8917ms).
[20:17:07.213] <TB2> INFO: Expecting 411648 events.
[20:17:16.730] <TB2> INFO: 411648 events read in total (9113ms).
[20:17:16.781] <TB2> INFO: Expecting 411648 events.
[20:17:25.977] <TB2> INFO: 411648 events read in total (8793ms).
[20:17:26.042] <TB2> INFO: Test took 149619ms.
[20:17:26.913] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:17:26.928] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:17:26.928] <TB2> INFO: run 1 of 1
[20:17:27.179] <TB2> INFO: Expecting 5025280 events.
[20:17:53.745] <TB2> INFO: 587008 events read in total (25974ms).
[20:18:19.532] <TB2> INFO: 1172560 events read in total (51762ms).
[20:18:45.349] <TB2> INFO: 1757288 events read in total (77579ms).
[20:19:11.166] <TB2> INFO: 2341312 events read in total (103395ms).
[20:19:37.149] <TB2> INFO: 2925256 events read in total (129378ms).
[20:20:03.149] <TB2> INFO: 3509040 events read in total (155378ms).
[20:20:29.305] <TB2> INFO: 4091160 events read in total (181534ms).
[20:20:55.247] <TB2> INFO: 4673776 events read in total (207476ms).
[20:21:10.893] <TB2> INFO: 5025280 events read in total (223122ms).
[20:21:11.012] <TB2> INFO: Test took 224086ms.
[20:21:37.028] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 2.972709 .. 145.213250
[20:21:37.360] <TB2> INFO: Expecting 208000 events.
[20:21:47.104] <TB2> INFO: 208000 events read in total (9153ms).
[20:21:47.105] <TB2> INFO: Test took 10075ms.
[20:21:47.188] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 155 (-1/-1) hits flags = 528 (plus default)
[20:21:47.202] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:21:47.202] <TB2> INFO: run 1 of 1
[20:21:47.481] <TB2> INFO: Expecting 5125120 events.
[20:22:13.915] <TB2> INFO: 583168 events read in total (25843ms).
[20:22:39.251] <TB2> INFO: 1165992 events read in total (51179ms).
[20:23:04.537] <TB2> INFO: 1749040 events read in total (76465ms).
[20:23:30.036] <TB2> INFO: 2331920 events read in total (101964ms).
[20:23:55.787] <TB2> INFO: 2913664 events read in total (127715ms).
[20:24:21.817] <TB2> INFO: 3496328 events read in total (153745ms).
[20:24:47.774] <TB2> INFO: 4078520 events read in total (179702ms).
[20:25:13.283] <TB2> INFO: 4660240 events read in total (205211ms).
[20:25:34.584] <TB2> INFO: 5125120 events read in total (226512ms).
[20:25:34.693] <TB2> INFO: Test took 227492ms.
[20:25:59.630] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 27.837987 .. 46.131837
[20:25:59.878] <TB2> INFO: Expecting 208000 events.
[20:26:10.082] <TB2> INFO: 208000 events read in total (9612ms).
[20:26:10.084] <TB2> INFO: Test took 10452ms.
[20:26:10.154] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[20:26:10.168] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:26:10.168] <TB2> INFO: run 1 of 1
[20:26:10.451] <TB2> INFO: Expecting 1331200 events.
[20:26:38.776] <TB2> INFO: 654552 events read in total (27733ms).
[20:27:06.029] <TB2> INFO: 1306232 events read in total (54987ms).
[20:27:07.487] <TB2> INFO: 1331200 events read in total (56444ms).
[20:27:07.527] <TB2> INFO: Test took 57360ms.
[20:27:21.480] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 24.551322 .. 47.046581
[20:27:21.719] <TB2> INFO: Expecting 208000 events.
[20:27:31.668] <TB2> INFO: 208000 events read in total (9358ms).
[20:27:31.669] <TB2> INFO: Test took 10188ms.
[20:27:31.720] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 57 (-1/-1) hits flags = 528 (plus default)
[20:27:31.735] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:27:31.735] <TB2> INFO: run 1 of 1
[20:27:32.013] <TB2> INFO: Expecting 1464320 events.
[20:27:59.868] <TB2> INFO: 662624 events read in total (27263ms).
[20:28:28.065] <TB2> INFO: 1324408 events read in total (55460ms).
[20:28:34.108] <TB2> INFO: 1464320 events read in total (61503ms).
[20:28:34.148] <TB2> INFO: Test took 62414ms.
[20:28:48.374] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 24.972071 .. 45.358729
[20:28:48.613] <TB2> INFO: Expecting 208000 events.
[20:28:58.728] <TB2> INFO: 208000 events read in total (9524ms).
[20:28:58.729] <TB2> INFO: Test took 10354ms.
[20:28:58.797] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:28:58.814] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:28:58.814] <TB2> INFO: run 1 of 1
[20:28:59.092] <TB2> INFO: Expecting 1397760 events.
[20:29:27.738] <TB2> INFO: 670696 events read in total (28054ms).
[20:29:55.639] <TB2> INFO: 1341208 events read in total (55955ms).
[20:29:58.486] <TB2> INFO: 1397760 events read in total (58803ms).
[20:29:58.523] <TB2> INFO: Test took 59709ms.
[20:30:12.301] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[20:30:12.304] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:30:12.322] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:30:12.324] <TB2> INFO: run 1 of 1
[20:30:12.595] <TB2> INFO: Expecting 1364480 events.
[20:30:41.057] <TB2> INFO: 667232 events read in total (27870ms).
[20:31:09.086] <TB2> INFO: 1333832 events read in total (55899ms).
[20:31:10.870] <TB2> INFO: 1364480 events read in total (57683ms).
[20:31:10.904] <TB2> INFO: Test took 58580ms.
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C0.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C1.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C2.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C3.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C4.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C5.dat
[20:31:24.390] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C6.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C7.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C8.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C9.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C10.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C11.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C12.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C13.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C14.dat
[20:31:24.391] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C15.dat
[20:31:24.392] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C0.dat
[20:31:24.399] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C1.dat
[20:31:24.406] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C2.dat
[20:31:24.413] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C3.dat
[20:31:24.419] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C4.dat
[20:31:24.426] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C5.dat
[20:31:24.433] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C6.dat
[20:31:24.439] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C7.dat
[20:31:24.445] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C8.dat
[20:31:24.451] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C9.dat
[20:31:24.458] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C10.dat
[20:31:24.464] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C11.dat
[20:31:24.470] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C12.dat
[20:31:24.477] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C13.dat
[20:31:24.483] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C14.dat
[20:31:24.489] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//trimParameters35_C15.dat
[20:31:24.495] <TB2> INFO: PixTestTrim::trimTest() done
[20:31:24.495] <TB2> INFO: vtrim: 136 125 143 125 113 131 123 130 142 142 119 132 141 123 135 144
[20:31:24.495] <TB2> INFO: vthrcomp: 110 106 113 128 104 114 116 116 124 104 125 127 116 119 114 113
[20:31:24.495] <TB2> INFO: vcal mean: 35.04 34.97 34.97 34.94 34.99 34.97 34.99 34.95 34.95 35.01 34.90 34.95 34.95 34.93 34.97 34.94
[20:31:24.495] <TB2> INFO: vcal RMS: 0.98 0.98 1.18 0.98 0.89 0.97 0.95 1.02 1.21 1.09 1.16 1.15 1.06 1.08 1.03 1.11
[20:31:24.495] <TB2> INFO: bits mean: 8.77 8.52 9.67 9.39 8.48 9.38 9.75 9.63 9.58 8.94 9.55 10.02 10.27 9.68 9.54 9.98
[20:31:24.495] <TB2> INFO: bits RMS: 2.48 2.65 2.54 2.62 2.70 2.80 2.62 2.70 2.75 2.57 2.93 2.71 2.40 2.68 2.73 2.43
[20:31:24.504] <TB2> INFO: ----------------------------------------------------------------------
[20:31:24.504] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:31:24.504] <TB2> INFO: ----------------------------------------------------------------------
[20:31:24.506] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:31:24.520] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:31:24.520] <TB2> INFO: run 1 of 1
[20:31:24.801] <TB2> INFO: Expecting 4160000 events.
[20:31:57.015] <TB2> INFO: 733990 events read in total (31622ms).
[20:32:28.055] <TB2> INFO: 1461825 events read in total (62662ms).
[20:32:59.324] <TB2> INFO: 2186535 events read in total (93931ms).
[20:33:30.404] <TB2> INFO: 2907075 events read in total (125011ms).
[20:34:01.605] <TB2> INFO: 3626430 events read in total (156212ms).
[20:34:24.901] <TB2> INFO: 4160000 events read in total (179508ms).
[20:34:24.982] <TB2> INFO: Test took 180462ms.
[20:34:52.075] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:34:52.088] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:34:52.088] <TB2> INFO: run 1 of 1
[20:34:52.328] <TB2> INFO: Expecting 4160000 events.
[20:35:23.684] <TB2> INFO: 711150 events read in total (30764ms).
[20:35:54.493] <TB2> INFO: 1416825 events read in total (61573ms).
[20:36:24.890] <TB2> INFO: 2119930 events read in total (91970ms).
[20:36:55.035] <TB2> INFO: 2819425 events read in total (122115ms).
[20:37:25.593] <TB2> INFO: 3517820 events read in total (152673ms).
[20:37:53.918] <TB2> INFO: 4160000 events read in total (180998ms).
[20:37:54.009] <TB2> INFO: Test took 181920ms.
[20:38:23.229] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[20:38:23.243] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:38:23.243] <TB2> INFO: run 1 of 1
[20:38:23.544] <TB2> INFO: Expecting 3868800 events.
[20:38:55.129] <TB2> INFO: 729965 events read in total (30993ms).
[20:39:25.980] <TB2> INFO: 1453480 events read in total (61844ms).
[20:39:57.091] <TB2> INFO: 2173405 events read in total (92955ms).
[20:40:28.325] <TB2> INFO: 2889405 events read in total (124189ms).
[20:40:59.029] <TB2> INFO: 3605465 events read in total (154893ms).
[20:41:10.655] <TB2> INFO: 3868800 events read in total (166519ms).
[20:41:10.732] <TB2> INFO: Test took 167489ms.
[20:41:36.428] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[20:41:36.442] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:41:36.442] <TB2> INFO: run 1 of 1
[20:41:36.729] <TB2> INFO: Expecting 3868800 events.
[20:42:08.802] <TB2> INFO: 730280 events read in total (31482ms).
[20:42:39.943] <TB2> INFO: 1454035 events read in total (62623ms).
[20:43:11.206] <TB2> INFO: 2174190 events read in total (93886ms).
[20:43:42.463] <TB2> INFO: 2890425 events read in total (125143ms).
[20:44:13.690] <TB2> INFO: 3606595 events read in total (156370ms).
[20:44:24.923] <TB2> INFO: 3868800 events read in total (167603ms).
[20:44:24.994] <TB2> INFO: Test took 168552ms.
[20:44:52.251] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[20:44:52.264] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:44:52.264] <TB2> INFO: run 1 of 1
[20:44:52.521] <TB2> INFO: Expecting 3889600 events.
[20:45:24.731] <TB2> INFO: 728875 events read in total (31619ms).
[20:45:55.645] <TB2> INFO: 1451465 events read in total (62533ms).
[20:46:27.006] <TB2> INFO: 2170670 events read in total (93894ms).
[20:46:58.007] <TB2> INFO: 2885925 events read in total (124895ms).
[20:47:28.381] <TB2> INFO: 3600965 events read in total (155269ms).
[20:47:41.559] <TB2> INFO: 3889600 events read in total (168447ms).
[20:47:41.626] <TB2> INFO: Test took 169361ms.
[20:48:07.008] <TB2> INFO: PixTestTrim::trimBitTest() done
[20:48:07.009] <TB2> INFO: PixTestTrim::doTest() done, duration: 2445 seconds
[20:48:07.010] <TB2> INFO: Decoding statistics:
[20:48:07.011] <TB2> INFO: General information:
[20:48:07.011] <TB2> INFO: 16bit words read: 0
[20:48:07.011] <TB2> INFO: valid events total: 0
[20:48:07.011] <TB2> INFO: empty events: 0
[20:48:07.011] <TB2> INFO: valid events with pixels: 0
[20:48:07.011] <TB2> INFO: valid pixel hits: 0
[20:48:07.011] <TB2> INFO: Event errors: 0
[20:48:07.011] <TB2> INFO: start marker: 0
[20:48:07.011] <TB2> INFO: stop marker: 0
[20:48:07.011] <TB2> INFO: overflow: 0
[20:48:07.012] <TB2> INFO: invalid 5bit words: 0
[20:48:07.012] <TB2> INFO: invalid XOR eye diagram: 0
[20:48:07.012] <TB2> INFO: frame (failed synchr.): 0
[20:48:07.012] <TB2> INFO: idle data (no TBM trl): 0
[20:48:07.012] <TB2> INFO: no data (only TBM hdr): 0
[20:48:07.012] <TB2> INFO: TBM errors: 0
[20:48:07.012] <TB2> INFO: flawed TBM headers: 0
[20:48:07.012] <TB2> INFO: flawed TBM trailers: 0
[20:48:07.012] <TB2> INFO: event ID mismatches: 0
[20:48:07.012] <TB2> INFO: ROC errors: 0
[20:48:07.012] <TB2> INFO: missing ROC header(s): 0
[20:48:07.012] <TB2> INFO: misplaced readback start: 0
[20:48:07.012] <TB2> INFO: Pixel decoding errors: 0
[20:48:07.012] <TB2> INFO: pixel data incomplete: 0
[20:48:07.012] <TB2> INFO: pixel address: 0
[20:48:07.012] <TB2> INFO: pulse height fill bit: 0
[20:48:07.012] <TB2> INFO: buffer corruption: 0
[20:48:07.794] <TB2> INFO: ######################################################################
[20:48:07.794] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:48:07.794] <TB2> INFO: ######################################################################
[20:48:08.108] <TB2> INFO: Expecting 41600 events.
[20:48:11.549] <TB2> INFO: 41600 events read in total (2845ms).
[20:48:11.550] <TB2> INFO: Test took 3754ms.
[20:48:12.008] <TB2> INFO: Expecting 41600 events.
[20:48:15.576] <TB2> INFO: 41600 events read in total (2976ms).
[20:48:15.576] <TB2> INFO: Test took 3820ms.
[20:48:15.868] <TB2> INFO: Expecting 41600 events.
[20:48:19.420] <TB2> INFO: 41600 events read in total (2960ms).
[20:48:19.421] <TB2> INFO: Test took 3818ms.
[20:48:19.709] <TB2> INFO: Expecting 41600 events.
[20:48:23.192] <TB2> INFO: 41600 events read in total (2891ms).
[20:48:23.193] <TB2> INFO: Test took 3749ms.
[20:48:23.482] <TB2> INFO: Expecting 41600 events.
[20:48:27.043] <TB2> INFO: 41600 events read in total (2969ms).
[20:48:27.044] <TB2> INFO: Test took 3827ms.
[20:48:27.333] <TB2> INFO: Expecting 41600 events.
[20:48:30.868] <TB2> INFO: 41600 events read in total (2943ms).
[20:48:30.869] <TB2> INFO: Test took 3801ms.
[20:48:31.159] <TB2> INFO: Expecting 41600 events.
[20:48:34.738] <TB2> INFO: 41600 events read in total (2988ms).
[20:48:34.739] <TB2> INFO: Test took 3846ms.
[20:48:35.040] <TB2> INFO: Expecting 41600 events.
[20:48:38.802] <TB2> INFO: 41600 events read in total (3167ms).
[20:48:38.802] <TB2> INFO: Test took 4036ms.
[20:48:39.091] <TB2> INFO: Expecting 41600 events.
[20:48:42.734] <TB2> INFO: 41600 events read in total (3051ms).
[20:48:42.735] <TB2> INFO: Test took 3909ms.
[20:48:43.095] <TB2> INFO: Expecting 41600 events.
[20:48:46.692] <TB2> INFO: 41600 events read in total (3005ms).
[20:48:46.693] <TB2> INFO: Test took 3933ms.
[20:48:46.982] <TB2> INFO: Expecting 41600 events.
[20:48:50.588] <TB2> INFO: 41600 events read in total (3015ms).
[20:48:50.590] <TB2> INFO: Test took 3873ms.
[20:48:50.882] <TB2> INFO: Expecting 41600 events.
[20:48:54.406] <TB2> INFO: 41600 events read in total (2932ms).
[20:48:54.406] <TB2> INFO: Test took 3792ms.
[20:48:54.695] <TB2> INFO: Expecting 41600 events.
[20:48:58.188] <TB2> INFO: 41600 events read in total (2901ms).
[20:48:58.189] <TB2> INFO: Test took 3758ms.
[20:48:58.478] <TB2> INFO: Expecting 41600 events.
[20:49:01.988] <TB2> INFO: 41600 events read in total (2919ms).
[20:49:01.988] <TB2> INFO: Test took 3775ms.
[20:49:02.281] <TB2> INFO: Expecting 41600 events.
[20:49:05.795] <TB2> INFO: 41600 events read in total (2923ms).
[20:49:05.796] <TB2> INFO: Test took 3783ms.
[20:49:06.098] <TB2> INFO: Expecting 41600 events.
[20:49:09.574] <TB2> INFO: 41600 events read in total (2884ms).
[20:49:09.574] <TB2> INFO: Test took 3753ms.
[20:49:09.881] <TB2> INFO: Expecting 41600 events.
[20:49:13.399] <TB2> INFO: 41600 events read in total (2927ms).
[20:49:13.399] <TB2> INFO: Test took 3800ms.
[20:49:13.691] <TB2> INFO: Expecting 41600 events.
[20:49:17.216] <TB2> INFO: 41600 events read in total (2933ms).
[20:49:17.217] <TB2> INFO: Test took 3793ms.
[20:49:17.563] <TB2> INFO: Expecting 41600 events.
[20:49:21.090] <TB2> INFO: 41600 events read in total (2936ms).
[20:49:21.091] <TB2> INFO: Test took 3847ms.
[20:49:21.472] <TB2> INFO: Expecting 41600 events.
[20:49:25.019] <TB2> INFO: 41600 events read in total (2956ms).
[20:49:25.020] <TB2> INFO: Test took 3899ms.
[20:49:25.309] <TB2> INFO: Expecting 41600 events.
[20:49:28.790] <TB2> INFO: 41600 events read in total (2889ms).
[20:49:28.791] <TB2> INFO: Test took 3746ms.
[20:49:29.081] <TB2> INFO: Expecting 41600 events.
[20:49:32.669] <TB2> INFO: 41600 events read in total (2997ms).
[20:49:32.670] <TB2> INFO: Test took 3854ms.
[20:49:32.959] <TB2> INFO: Expecting 41600 events.
[20:49:36.668] <TB2> INFO: 41600 events read in total (3117ms).
[20:49:36.669] <TB2> INFO: Test took 3974ms.
[20:49:36.961] <TB2> INFO: Expecting 41600 events.
[20:49:40.550] <TB2> INFO: 41600 events read in total (2996ms).
[20:49:40.551] <TB2> INFO: Test took 3854ms.
[20:49:40.862] <TB2> INFO: Expecting 41600 events.
[20:49:44.407] <TB2> INFO: 41600 events read in total (2954ms).
[20:49:44.408] <TB2> INFO: Test took 3831ms.
[20:49:44.697] <TB2> INFO: Expecting 41600 events.
[20:49:48.183] <TB2> INFO: 41600 events read in total (2894ms).
[20:49:48.184] <TB2> INFO: Test took 3751ms.
[20:49:48.473] <TB2> INFO: Expecting 41600 events.
[20:49:52.039] <TB2> INFO: 41600 events read in total (2974ms).
[20:49:52.040] <TB2> INFO: Test took 3831ms.
[20:49:52.330] <TB2> INFO: Expecting 41600 events.
[20:49:55.899] <TB2> INFO: 41600 events read in total (2977ms).
[20:49:55.899] <TB2> INFO: Test took 3835ms.
[20:49:56.192] <TB2> INFO: Expecting 41600 events.
[20:49:59.824] <TB2> INFO: 41600 events read in total (3041ms).
[20:49:59.825] <TB2> INFO: Test took 3899ms.
[20:50:00.115] <TB2> INFO: Expecting 2560 events.
[20:50:00.000] <TB2> INFO: 2560 events read in total (293ms).
[20:50:00.000] <TB2> INFO: Test took 1163ms.
[20:50:01.309] <TB2> INFO: Expecting 2560 events.
[20:50:02.204] <TB2> INFO: 2560 events read in total (303ms).
[20:50:02.204] <TB2> INFO: Test took 1203ms.
[20:50:02.511] <TB2> INFO: Expecting 2560 events.
[20:50:03.400] <TB2> INFO: 2560 events read in total (297ms).
[20:50:03.400] <TB2> INFO: Test took 1195ms.
[20:50:03.708] <TB2> INFO: Expecting 2560 events.
[20:50:04.592] <TB2> INFO: 2560 events read in total (292ms).
[20:50:04.592] <TB2> INFO: Test took 1191ms.
[20:50:04.899] <TB2> INFO: Expecting 2560 events.
[20:50:05.791] <TB2> INFO: 2560 events read in total (300ms).
[20:50:05.791] <TB2> INFO: Test took 1198ms.
[20:50:06.098] <TB2> INFO: Expecting 2560 events.
[20:50:06.980] <TB2> INFO: 2560 events read in total (290ms).
[20:50:06.981] <TB2> INFO: Test took 1189ms.
[20:50:07.289] <TB2> INFO: Expecting 2560 events.
[20:50:08.170] <TB2> INFO: 2560 events read in total (290ms).
[20:50:08.170] <TB2> INFO: Test took 1189ms.
[20:50:08.479] <TB2> INFO: Expecting 2560 events.
[20:50:09.363] <TB2> INFO: 2560 events read in total (292ms).
[20:50:09.363] <TB2> INFO: Test took 1192ms.
[20:50:09.672] <TB2> INFO: Expecting 2560 events.
[20:50:10.550] <TB2> INFO: 2560 events read in total (287ms).
[20:50:10.551] <TB2> INFO: Test took 1187ms.
[20:50:10.859] <TB2> INFO: Expecting 2560 events.
[20:50:11.737] <TB2> INFO: 2560 events read in total (287ms).
[20:50:11.737] <TB2> INFO: Test took 1186ms.
[20:50:12.045] <TB2> INFO: Expecting 2560 events.
[20:50:12.931] <TB2> INFO: 2560 events read in total (294ms).
[20:50:12.931] <TB2> INFO: Test took 1193ms.
[20:50:13.239] <TB2> INFO: Expecting 2560 events.
[20:50:14.123] <TB2> INFO: 2560 events read in total (293ms).
[20:50:14.123] <TB2> INFO: Test took 1191ms.
[20:50:14.431] <TB2> INFO: Expecting 2560 events.
[20:50:15.314] <TB2> INFO: 2560 events read in total (292ms).
[20:50:15.314] <TB2> INFO: Test took 1191ms.
[20:50:15.622] <TB2> INFO: Expecting 2560 events.
[20:50:16.509] <TB2> INFO: 2560 events read in total (295ms).
[20:50:16.509] <TB2> INFO: Test took 1194ms.
[20:50:16.818] <TB2> INFO: Expecting 2560 events.
[20:50:17.704] <TB2> INFO: 2560 events read in total (294ms).
[20:50:17.704] <TB2> INFO: Test took 1194ms.
[20:50:18.012] <TB2> INFO: Expecting 2560 events.
[20:50:18.900] <TB2> INFO: 2560 events read in total (296ms).
[20:50:18.900] <TB2> INFO: Test took 1196ms.
[20:50:18.903] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:50:19.210] <TB2> INFO: Expecting 655360 events.
[20:50:33.929] <TB2> INFO: 655360 events read in total (14128ms).
[20:50:33.943] <TB2> INFO: Expecting 655360 events.
[20:50:48.346] <TB2> INFO: 655360 events read in total (14000ms).
[20:50:48.370] <TB2> INFO: Expecting 655360 events.
[20:51:03.128] <TB2> INFO: 655360 events read in total (14355ms).
[20:51:03.154] <TB2> INFO: Expecting 655360 events.
[20:51:17.420] <TB2> INFO: 655360 events read in total (13863ms).
[20:51:17.460] <TB2> INFO: Expecting 655360 events.
[20:51:32.035] <TB2> INFO: 655360 events read in total (14172ms).
[20:51:32.071] <TB2> INFO: Expecting 655360 events.
[20:51:46.406] <TB2> INFO: 655360 events read in total (13932ms).
[20:51:46.447] <TB2> INFO: Expecting 655360 events.
[20:52:00.920] <TB2> INFO: 655360 events read in total (14069ms).
[20:52:00.958] <TB2> INFO: Expecting 655360 events.
[20:52:15.261] <TB2> INFO: 655360 events read in total (13900ms).
[20:52:15.306] <TB2> INFO: Expecting 655360 events.
[20:52:29.819] <TB2> INFO: 655360 events read in total (14110ms).
[20:52:29.882] <TB2> INFO: Expecting 655360 events.
[20:52:44.219] <TB2> INFO: 655360 events read in total (13933ms).
[20:52:44.415] <TB2> INFO: Expecting 655360 events.
[20:52:58.941] <TB2> INFO: 655360 events read in total (14123ms).
[20:52:59.021] <TB2> INFO: Expecting 655360 events.
[20:53:13.419] <TB2> INFO: 655360 events read in total (13995ms).
[20:53:13.575] <TB2> INFO: Expecting 655360 events.
[20:53:28.168] <TB2> INFO: 655360 events read in total (14190ms).
[20:53:28.251] <TB2> INFO: Expecting 655360 events.
[20:53:42.606] <TB2> INFO: 655360 events read in total (13952ms).
[20:53:42.708] <TB2> INFO: Expecting 655360 events.
[20:53:56.926] <TB2> INFO: 655360 events read in total (13815ms).
[20:53:57.028] <TB2> INFO: Expecting 655360 events.
[20:54:11.400] <TB2> INFO: 655360 events read in total (13969ms).
[20:54:11.549] <TB2> INFO: Test took 232646ms.
[20:54:11.677] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:54:11.929] <TB2> INFO: Expecting 655360 events.
[20:54:26.526] <TB2> INFO: 655360 events read in total (14005ms).
[20:54:26.539] <TB2> INFO: Expecting 655360 events.
[20:54:41.054] <TB2> INFO: 655360 events read in total (14111ms).
[20:54:41.078] <TB2> INFO: Expecting 655360 events.
[20:54:55.588] <TB2> INFO: 655360 events read in total (14107ms).
[20:54:55.616] <TB2> INFO: Expecting 655360 events.
[20:55:09.861] <TB2> INFO: 655360 events read in total (13842ms).
[20:55:09.895] <TB2> INFO: Expecting 655360 events.
[20:55:24.211] <TB2> INFO: 655360 events read in total (13913ms).
[20:55:24.243] <TB2> INFO: Expecting 655360 events.
[20:55:38.818] <TB2> INFO: 655360 events read in total (14172ms).
[20:55:38.865] <TB2> INFO: Expecting 655360 events.
[20:55:53.065] <TB2> INFO: 655360 events read in total (13797ms).
[20:55:53.105] <TB2> INFO: Expecting 655360 events.
[20:56:07.610] <TB2> INFO: 655360 events read in total (14102ms).
[20:56:07.683] <TB2> INFO: Expecting 655360 events.
[20:56:21.862] <TB2> INFO: 655360 events read in total (13776ms).
[20:56:21.913] <TB2> INFO: Expecting 655360 events.
[20:56:36.311] <TB2> INFO: 655360 events read in total (13995ms).
[20:56:36.377] <TB2> INFO: Expecting 655360 events.
[20:56:50.739] <TB2> INFO: 655360 events read in total (13959ms).
[20:56:50.816] <TB2> INFO: Expecting 655360 events.
[20:57:05.262] <TB2> INFO: 655360 events read in total (14043ms).
[20:57:05.340] <TB2> INFO: Expecting 655360 events.
[20:57:19.794] <TB2> INFO: 655360 events read in total (14051ms).
[20:57:19.909] <TB2> INFO: Expecting 655360 events.
[20:57:34.301] <TB2> INFO: 655360 events read in total (13989ms).
[20:57:34.389] <TB2> INFO: Expecting 655360 events.
[20:57:48.646] <TB2> INFO: 655360 events read in total (13854ms).
[20:57:48.751] <TB2> INFO: Expecting 655360 events.
[20:58:03.171] <TB2> INFO: 655360 events read in total (14017ms).
[20:58:03.284] <TB2> INFO: Test took 231607ms.
[20:58:03.465] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.472] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:58:03.478] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:58:03.484] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:58:03.490] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[20:58:03.496] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[20:58:03.503] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.509] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.515] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.522] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.528] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.535] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.541] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.548] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.555] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.562] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:58:03.569] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:58:03.575] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:58:03.582] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.588] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.594] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.600] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:58:03.606] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.611] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.618] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:58:03.623] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:58:03.660] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C0.dat
[20:58:03.660] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C1.dat
[20:58:03.660] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C2.dat
[20:58:03.660] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C3.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C4.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C5.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C6.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C7.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C8.dat
[20:58:03.661] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C9.dat
[20:58:03.662] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C10.dat
[20:58:03.662] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C11.dat
[20:58:03.662] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C12.dat
[20:58:03.662] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C13.dat
[20:58:03.663] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C14.dat
[20:58:03.663] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//dacParameters35_C15.dat
[20:58:03.910] <TB2> INFO: Expecting 41600 events.
[20:58:07.161] <TB2> INFO: 41600 events read in total (2659ms).
[20:58:07.161] <TB2> INFO: Test took 3496ms.
[20:58:07.619] <TB2> INFO: Expecting 41600 events.
[20:58:10.682] <TB2> INFO: 41600 events read in total (2471ms).
[20:58:10.682] <TB2> INFO: Test took 3304ms.
[20:58:11.130] <TB2> INFO: Expecting 41600 events.
[20:58:14.274] <TB2> INFO: 41600 events read in total (2552ms).
[20:58:14.274] <TB2> INFO: Test took 3381ms.
[20:58:14.490] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:14.580] <TB2> INFO: Expecting 2560 events.
[20:58:15.472] <TB2> INFO: 2560 events read in total (300ms).
[20:58:15.473] <TB2> INFO: Test took 983ms.
[20:58:15.475] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:15.780] <TB2> INFO: Expecting 2560 events.
[20:58:16.668] <TB2> INFO: 2560 events read in total (296ms).
[20:58:16.668] <TB2> INFO: Test took 1193ms.
[20:58:16.670] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:16.977] <TB2> INFO: Expecting 2560 events.
[20:58:17.861] <TB2> INFO: 2560 events read in total (292ms).
[20:58:17.861] <TB2> INFO: Test took 1191ms.
[20:58:17.863] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:18.171] <TB2> INFO: Expecting 2560 events.
[20:58:19.065] <TB2> INFO: 2560 events read in total (303ms).
[20:58:19.066] <TB2> INFO: Test took 1203ms.
[20:58:19.070] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:19.374] <TB2> INFO: Expecting 2560 events.
[20:58:20.269] <TB2> INFO: 2560 events read in total (303ms).
[20:58:20.270] <TB2> INFO: Test took 1200ms.
[20:58:20.273] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:20.578] <TB2> INFO: Expecting 2560 events.
[20:58:21.472] <TB2> INFO: 2560 events read in total (302ms).
[20:58:21.473] <TB2> INFO: Test took 1200ms.
[20:58:21.476] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:21.780] <TB2> INFO: Expecting 2560 events.
[20:58:22.673] <TB2> INFO: 2560 events read in total (301ms).
[20:58:22.673] <TB2> INFO: Test took 1197ms.
[20:58:22.676] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:22.981] <TB2> INFO: Expecting 2560 events.
[20:58:23.870] <TB2> INFO: 2560 events read in total (298ms).
[20:58:23.871] <TB2> INFO: Test took 1195ms.
[20:58:23.874] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:24.179] <TB2> INFO: Expecting 2560 events.
[20:58:25.060] <TB2> INFO: 2560 events read in total (289ms).
[20:58:25.060] <TB2> INFO: Test took 1186ms.
[20:58:25.062] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:25.369] <TB2> INFO: Expecting 2560 events.
[20:58:26.250] <TB2> INFO: 2560 events read in total (290ms).
[20:58:26.251] <TB2> INFO: Test took 1189ms.
[20:58:26.253] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:26.558] <TB2> INFO: Expecting 2560 events.
[20:58:27.438] <TB2> INFO: 2560 events read in total (288ms).
[20:58:27.439] <TB2> INFO: Test took 1186ms.
[20:58:27.441] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:27.747] <TB2> INFO: Expecting 2560 events.
[20:58:28.628] <TB2> INFO: 2560 events read in total (289ms).
[20:58:28.629] <TB2> INFO: Test took 1188ms.
[20:58:28.631] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:28.936] <TB2> INFO: Expecting 2560 events.
[20:58:29.821] <TB2> INFO: 2560 events read in total (293ms).
[20:58:29.821] <TB2> INFO: Test took 1190ms.
[20:58:29.825] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:30.129] <TB2> INFO: Expecting 2560 events.
[20:58:31.013] <TB2> INFO: 2560 events read in total (292ms).
[20:58:31.014] <TB2> INFO: Test took 1189ms.
[20:58:31.017] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:31.320] <TB2> INFO: Expecting 2560 events.
[20:58:32.210] <TB2> INFO: 2560 events read in total (298ms).
[20:58:32.211] <TB2> INFO: Test took 1194ms.
[20:58:32.213] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:32.520] <TB2> INFO: Expecting 2560 events.
[20:58:33.400] <TB2> INFO: 2560 events read in total (289ms).
[20:58:33.400] <TB2> INFO: Test took 1187ms.
[20:58:33.403] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:33.710] <TB2> INFO: Expecting 2560 events.
[20:58:34.599] <TB2> INFO: 2560 events read in total (297ms).
[20:58:34.600] <TB2> INFO: Test took 1198ms.
[20:58:34.603] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:34.908] <TB2> INFO: Expecting 2560 events.
[20:58:35.802] <TB2> INFO: 2560 events read in total (302ms).
[20:58:35.803] <TB2> INFO: Test took 1200ms.
[20:58:35.806] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:36.111] <TB2> INFO: Expecting 2560 events.
[20:58:36.999] <TB2> INFO: 2560 events read in total (296ms).
[20:58:36.000] <TB2> INFO: Test took 1194ms.
[20:58:36.002] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:37.307] <TB2> INFO: Expecting 2560 events.
[20:58:38.200] <TB2> INFO: 2560 events read in total (301ms).
[20:58:38.200] <TB2> INFO: Test took 1198ms.
[20:58:38.203] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:38.508] <TB2> INFO: Expecting 2560 events.
[20:58:39.388] <TB2> INFO: 2560 events read in total (288ms).
[20:58:39.388] <TB2> INFO: Test took 1185ms.
[20:58:39.390] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:39.697] <TB2> INFO: Expecting 2560 events.
[20:58:40.576] <TB2> INFO: 2560 events read in total (287ms).
[20:58:40.576] <TB2> INFO: Test took 1186ms.
[20:58:40.578] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:40.886] <TB2> INFO: Expecting 2560 events.
[20:58:41.768] <TB2> INFO: 2560 events read in total (291ms).
[20:58:41.768] <TB2> INFO: Test took 1190ms.
[20:58:41.772] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:42.077] <TB2> INFO: Expecting 2560 events.
[20:58:42.960] <TB2> INFO: 2560 events read in total (291ms).
[20:58:42.961] <TB2> INFO: Test took 1189ms.
[20:58:42.964] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:43.270] <TB2> INFO: Expecting 2560 events.
[20:58:44.156] <TB2> INFO: 2560 events read in total (294ms).
[20:58:44.157] <TB2> INFO: Test took 1193ms.
[20:58:44.160] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:44.465] <TB2> INFO: Expecting 2560 events.
[20:58:45.350] <TB2> INFO: 2560 events read in total (294ms).
[20:58:45.351] <TB2> INFO: Test took 1191ms.
[20:58:45.354] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:45.659] <TB2> INFO: Expecting 2560 events.
[20:58:46.542] <TB2> INFO: 2560 events read in total (291ms).
[20:58:46.542] <TB2> INFO: Test took 1189ms.
[20:58:46.545] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:46.850] <TB2> INFO: Expecting 2560 events.
[20:58:47.741] <TB2> INFO: 2560 events read in total (299ms).
[20:58:47.741] <TB2> INFO: Test took 1197ms.
[20:58:47.743] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:48.050] <TB2> INFO: Expecting 2560 events.
[20:58:48.945] <TB2> INFO: 2560 events read in total (303ms).
[20:58:48.946] <TB2> INFO: Test took 1203ms.
[20:58:48.949] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:49.253] <TB2> INFO: Expecting 2560 events.
[20:58:50.147] <TB2> INFO: 2560 events read in total (302ms).
[20:58:50.148] <TB2> INFO: Test took 1199ms.
[20:58:50.151] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:50.455] <TB2> INFO: Expecting 2560 events.
[20:58:51.351] <TB2> INFO: 2560 events read in total (305ms).
[20:58:51.352] <TB2> INFO: Test took 1201ms.
[20:58:51.355] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:58:51.660] <TB2> INFO: Expecting 2560 events.
[20:58:52.552] <TB2> INFO: 2560 events read in total (300ms).
[20:58:52.553] <TB2> INFO: Test took 1198ms.
[20:58:53.028] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 645 seconds
[20:58:53.028] <TB2> INFO: PH scale (per ROC): 46 59 61 60 55 47 58 42 60 37 60 65 48 66 55 35
[20:58:53.028] <TB2> INFO: PH offset (per ROC): 112 138 130 117 138 99 116 93 133 99 131 125 113 117 126 94
[20:58:53.038] <TB2> INFO: Decoding statistics:
[20:58:53.038] <TB2> INFO: General information:
[20:58:53.038] <TB2> INFO: 16bit words read: 127882
[20:58:53.038] <TB2> INFO: valid events total: 20480
[20:58:53.038] <TB2> INFO: empty events: 17979
[20:58:53.038] <TB2> INFO: valid events with pixels: 2501
[20:58:53.038] <TB2> INFO: valid pixel hits: 2501
[20:58:53.038] <TB2> INFO: Event errors: 0
[20:58:53.038] <TB2> INFO: start marker: 0
[20:58:53.038] <TB2> INFO: stop marker: 0
[20:58:53.038] <TB2> INFO: overflow: 0
[20:58:53.038] <TB2> INFO: invalid 5bit words: 0
[20:58:53.038] <TB2> INFO: invalid XOR eye diagram: 0
[20:58:53.038] <TB2> INFO: frame (failed synchr.): 0
[20:58:53.038] <TB2> INFO: idle data (no TBM trl): 0
[20:58:53.038] <TB2> INFO: no data (only TBM hdr): 0
[20:58:53.038] <TB2> INFO: TBM errors: 0
[20:58:53.038] <TB2> INFO: flawed TBM headers: 0
[20:58:53.038] <TB2> INFO: flawed TBM trailers: 0
[20:58:53.038] <TB2> INFO: event ID mismatches: 0
[20:58:53.038] <TB2> INFO: ROC errors: 0
[20:58:53.038] <TB2> INFO: missing ROC header(s): 0
[20:58:53.038] <TB2> INFO: misplaced readback start: 0
[20:58:53.038] <TB2> INFO: Pixel decoding errors: 0
[20:58:53.038] <TB2> INFO: pixel data incomplete: 0
[20:58:53.038] <TB2> INFO: pixel address: 0
[20:58:53.038] <TB2> INFO: pulse height fill bit: 0
[20:58:53.038] <TB2> INFO: buffer corruption: 0
[20:58:53.201] <TB2> INFO: ######################################################################
[20:58:53.201] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:58:53.201] <TB2> INFO: ######################################################################
[20:58:53.216] <TB2> INFO: scanning low vcal = 10
[20:58:53.458] <TB2> INFO: Expecting 41600 events.
[20:58:57.053] <TB2> INFO: 41600 events read in total (3003ms).
[20:58:57.053] <TB2> INFO: Test took 3837ms.
[20:58:57.055] <TB2> INFO: scanning low vcal = 20
[20:58:57.352] <TB2> INFO: Expecting 41600 events.
[20:59:00.948] <TB2> INFO: 41600 events read in total (3004ms).
[20:59:00.949] <TB2> INFO: Test took 3894ms.
[20:59:00.951] <TB2> INFO: scanning low vcal = 30
[20:59:01.249] <TB2> INFO: Expecting 41600 events.
[20:59:04.924] <TB2> INFO: 41600 events read in total (3083ms).
[20:59:04.925] <TB2> INFO: Test took 3974ms.
[20:59:04.927] <TB2> INFO: scanning low vcal = 40
[20:59:05.204] <TB2> INFO: Expecting 41600 events.
[20:59:09.152] <TB2> INFO: 41600 events read in total (3356ms).
[20:59:09.155] <TB2> INFO: Test took 4228ms.
[20:59:09.160] <TB2> INFO: scanning low vcal = 50
[20:59:09.436] <TB2> INFO: Expecting 41600 events.
[20:59:13.441] <TB2> INFO: 41600 events read in total (3413ms).
[20:59:13.442] <TB2> INFO: Test took 4282ms.
[20:59:13.445] <TB2> INFO: scanning low vcal = 60
[20:59:13.722] <TB2> INFO: Expecting 41600 events.
[20:59:17.755] <TB2> INFO: 41600 events read in total (3440ms).
[20:59:17.756] <TB2> INFO: Test took 4311ms.
[20:59:17.759] <TB2> INFO: scanning low vcal = 70
[20:59:18.037] <TB2> INFO: Expecting 41600 events.
[20:59:22.088] <TB2> INFO: 41600 events read in total (3460ms).
[20:59:22.088] <TB2> INFO: Test took 4329ms.
[20:59:22.091] <TB2> INFO: scanning low vcal = 80
[20:59:22.369] <TB2> INFO: Expecting 41600 events.
[20:59:26.397] <TB2> INFO: 41600 events read in total (3437ms).
[20:59:26.398] <TB2> INFO: Test took 4306ms.
[20:59:26.400] <TB2> INFO: scanning low vcal = 90
[20:59:26.678] <TB2> INFO: Expecting 41600 events.
[20:59:30.691] <TB2> INFO: 41600 events read in total (3421ms).
[20:59:30.692] <TB2> INFO: Test took 4292ms.
[20:59:30.696] <TB2> INFO: scanning low vcal = 100
[20:59:30.972] <TB2> INFO: Expecting 41600 events.
[20:59:35.027] <TB2> INFO: 41600 events read in total (3463ms).
[20:59:35.027] <TB2> INFO: Test took 4331ms.
[20:59:35.030] <TB2> INFO: scanning low vcal = 110
[20:59:35.307] <TB2> INFO: Expecting 41600 events.
[20:59:39.321] <TB2> INFO: 41600 events read in total (3422ms).
[20:59:39.322] <TB2> INFO: Test took 4292ms.
[20:59:39.325] <TB2> INFO: scanning low vcal = 120
[20:59:39.602] <TB2> INFO: Expecting 41600 events.
[20:59:43.646] <TB2> INFO: 41600 events read in total (3452ms).
[20:59:43.647] <TB2> INFO: Test took 4322ms.
[20:59:43.649] <TB2> INFO: scanning low vcal = 130
[20:59:43.926] <TB2> INFO: Expecting 41600 events.
[20:59:47.941] <TB2> INFO: 41600 events read in total (3423ms).
[20:59:47.941] <TB2> INFO: Test took 4293ms.
[20:59:47.945] <TB2> INFO: scanning low vcal = 140
[20:59:48.222] <TB2> INFO: Expecting 41600 events.
[20:59:52.243] <TB2> INFO: 41600 events read in total (3429ms).
[20:59:52.244] <TB2> INFO: Test took 4299ms.
[20:59:52.247] <TB2> INFO: scanning low vcal = 150
[20:59:52.527] <TB2> INFO: Expecting 41600 events.
[20:59:56.543] <TB2> INFO: 41600 events read in total (3424ms).
[20:59:56.544] <TB2> INFO: Test took 4297ms.
[20:59:56.546] <TB2> INFO: scanning low vcal = 160
[20:59:56.823] <TB2> INFO: Expecting 41600 events.
[21:00:00.817] <TB2> INFO: 41600 events read in total (3402ms).
[21:00:00.817] <TB2> INFO: Test took 4271ms.
[21:00:00.820] <TB2> INFO: scanning low vcal = 170
[21:00:01.100] <TB2> INFO: Expecting 41600 events.
[21:00:05.141] <TB2> INFO: 41600 events read in total (3448ms).
[21:00:05.142] <TB2> INFO: Test took 4322ms.
[21:00:05.147] <TB2> INFO: scanning low vcal = 180
[21:00:05.424] <TB2> INFO: Expecting 41600 events.
[21:00:09.416] <TB2> INFO: 41600 events read in total (3400ms).
[21:00:09.417] <TB2> INFO: Test took 4270ms.
[21:00:09.421] <TB2> INFO: scanning low vcal = 190
[21:00:09.698] <TB2> INFO: Expecting 41600 events.
[21:00:13.752] <TB2> INFO: 41600 events read in total (3463ms).
[21:00:13.753] <TB2> INFO: Test took 4332ms.
[21:00:13.757] <TB2> INFO: scanning low vcal = 200
[21:00:14.038] <TB2> INFO: Expecting 41600 events.
[21:00:18.030] <TB2> INFO: 41600 events read in total (3401ms).
[21:00:18.031] <TB2> INFO: Test took 4274ms.
[21:00:18.035] <TB2> INFO: scanning low vcal = 210
[21:00:18.312] <TB2> INFO: Expecting 41600 events.
[21:00:22.393] <TB2> INFO: 41600 events read in total (3490ms).
[21:00:22.393] <TB2> INFO: Test took 4359ms.
[21:00:22.397] <TB2> INFO: scanning low vcal = 220
[21:00:22.673] <TB2> INFO: Expecting 41600 events.
[21:00:26.659] <TB2> INFO: 41600 events read in total (3394ms).
[21:00:26.660] <TB2> INFO: Test took 4263ms.
[21:00:26.666] <TB2> INFO: scanning low vcal = 230
[21:00:26.940] <TB2> INFO: Expecting 41600 events.
[21:00:30.940] <TB2> INFO: 41600 events read in total (3408ms).
[21:00:30.941] <TB2> INFO: Test took 4275ms.
[21:00:30.944] <TB2> INFO: scanning low vcal = 240
[21:00:31.220] <TB2> INFO: Expecting 41600 events.
[21:00:35.252] <TB2> INFO: 41600 events read in total (3440ms).
[21:00:35.253] <TB2> INFO: Test took 4309ms.
[21:00:35.256] <TB2> INFO: scanning low vcal = 250
[21:00:35.532] <TB2> INFO: Expecting 41600 events.
[21:00:39.543] <TB2> INFO: 41600 events read in total (3419ms).
[21:00:39.545] <TB2> INFO: Test took 4289ms.
[21:00:39.549] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[21:00:39.842] <TB2> INFO: Expecting 41600 events.
[21:00:43.831] <TB2> INFO: 41600 events read in total (3397ms).
[21:00:43.832] <TB2> INFO: Test took 4283ms.
[21:00:43.836] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[21:00:44.113] <TB2> INFO: Expecting 41600 events.
[21:00:48.071] <TB2> INFO: 41600 events read in total (3366ms).
[21:00:48.072] <TB2> INFO: Test took 4236ms.
[21:00:48.075] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[21:00:48.351] <TB2> INFO: Expecting 41600 events.
[21:00:52.311] <TB2> INFO: 41600 events read in total (3368ms).
[21:00:52.312] <TB2> INFO: Test took 4237ms.
[21:00:52.315] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[21:00:52.591] <TB2> INFO: Expecting 41600 events.
[21:00:56.614] <TB2> INFO: 41600 events read in total (3431ms).
[21:00:56.615] <TB2> INFO: Test took 4300ms.
[21:00:56.618] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[21:00:56.894] <TB2> INFO: Expecting 41600 events.
[21:01:00.874] <TB2> INFO: 41600 events read in total (3388ms).
[21:01:00.874] <TB2> INFO: Test took 4255ms.
[21:01:01.371] <TB2> INFO: PixTestGainPedestal::measure() done
[21:01:37.987] <TB2> INFO: PixTestGainPedestal::fit() done
[21:01:37.987] <TB2> INFO: non-linearity mean: 0.953 0.980 0.981 0.972 0.974 0.936 0.975 1.033 0.983 1.000 0.982 0.982 0.946 0.982 0.979 1.056
[21:01:37.987] <TB2> INFO: non-linearity RMS: 0.043 0.004 0.003 0.014 0.008 0.148 0.007 0.138 0.002 0.193 0.003 0.003 0.059 0.003 0.006 0.165
[21:01:37.987] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[21:01:38.012] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[21:01:38.030] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[21:01:38.046] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[21:01:38.062] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[21:01:38.078] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[21:01:38.094] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[21:01:38.110] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[21:01:38.125] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[21:01:38.141] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[21:01:38.157] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[21:01:38.173] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[21:01:38.188] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[21:01:38.204] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[21:01:38.219] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[21:01:38.234] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1xxx_FullQualification_2016-10-14_18h46m_1476463594//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[21:01:38.249] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[21:01:38.249] <TB2> INFO: Decoding statistics:
[21:01:38.249] <TB2> INFO: General information:
[21:01:38.249] <TB2> INFO: 16bit words read: 3327890
[21:01:38.249] <TB2> INFO: valid events total: 332800
[21:01:38.249] <TB2> INFO: empty events: 0
[21:01:38.249] <TB2> INFO: valid events with pixels: 332800
[21:01:38.249] <TB2> INFO: valid pixel hits: 665545
[21:01:38.249] <TB2> INFO: Event errors: 0
[21:01:38.249] <TB2> INFO: start marker: 0
[21:01:38.250] <TB2> INFO: stop marker: 0
[21:01:38.250] <TB2> INFO: overflow: 0
[21:01:38.250] <TB2> INFO: invalid 5bit words: 0
[21:01:38.250] <TB2> INFO: invalid XOR eye diagram: 0
[21:01:38.250] <TB2> INFO: frame (failed synchr.): 0
[21:01:38.250] <TB2> INFO: idle data (no TBM trl): 0
[21:01:38.250] <TB2> INFO: no data (only TBM hdr): 0
[21:01:38.250] <TB2> INFO: TBM errors: 0
[21:01:38.250] <TB2> INFO: flawed TBM headers: 0
[21:01:38.250] <TB2> INFO: flawed TBM trailers: 0
[21:01:38.250] <TB2> INFO: event ID mismatches: 0
[21:01:38.250] <TB2> INFO: ROC errors: 0
[21:01:38.250] <TB2> INFO: missing ROC header(s): 0
[21:01:38.250] <TB2> INFO: misplaced readback start: 0
[21:01:38.250] <TB2> INFO: Pixel decoding errors: 0
[21:01:38.250] <TB2> INFO: pixel data incomplete: 0
[21:01:38.250] <TB2> INFO: pixel address: 0
[21:01:38.250] <TB2> INFO: pulse height fill bit: 0
[21:01:38.250] <TB2> INFO: buffer corruption: 0
[21:01:38.267] <TB2> INFO: Decoding statistics:
[21:01:38.267] <TB2> INFO: General information:
[21:01:38.267] <TB2> INFO: 16bit words read: 3457308
[21:01:38.267] <TB2> INFO: valid events total: 353536
[21:01:38.267] <TB2> INFO: empty events: 18235
[21:01:38.267] <TB2> INFO: valid events with pixels: 335301
[21:01:38.267] <TB2> INFO: valid pixel hits: 668046
[21:01:38.267] <TB2> INFO: Event errors: 0
[21:01:38.267] <TB2> INFO: start marker: 0
[21:01:38.267] <TB2> INFO: stop marker: 0
[21:01:38.267] <TB2> INFO: overflow: 0
[21:01:38.267] <TB2> INFO: invalid 5bit words: 0
[21:01:38.267] <TB2> INFO: invalid XOR eye diagram: 0
[21:01:38.267] <TB2> INFO: frame (failed synchr.): 0
[21:01:38.267] <TB2> INFO: idle data (no TBM trl): 0
[21:01:38.267] <TB2> INFO: no data (only TBM hdr): 0
[21:01:38.267] <TB2> INFO: TBM errors: 0
[21:01:38.267] <TB2> INFO: flawed TBM headers: 0
[21:01:38.267] <TB2> INFO: flawed TBM trailers: 0
[21:01:38.267] <TB2> INFO: event ID mismatches: 0
[21:01:38.267] <TB2> INFO: ROC errors: 0
[21:01:38.267] <TB2> INFO: missing ROC header(s): 0
[21:01:38.267] <TB2> INFO: misplaced readback start: 0
[21:01:38.267] <TB2> INFO: Pixel decoding errors: 0
[21:01:38.267] <TB2> INFO: pixel data incomplete: 0
[21:01:38.267] <TB2> INFO: pixel address: 0
[21:01:38.267] <TB2> INFO: pulse height fill bit: 0
[21:01:38.267] <TB2> INFO: buffer corruption: 0
[21:01:38.267] <TB2> INFO: enter test to run
[21:01:38.267] <TB2> INFO: test: exit no parameter change
[21:01:38.400] <TB2> QUIET: Connection to board 149 closed.
[21:01:38.401] <TB2> INFO: pXar: this is the end, my friend