[22:31:02.141] <TB3> INFO: *** Welcome to pxar ***
[22:31:02.141] <TB3> INFO: *** Today: 2016/11/07
[22:31:02.148] <TB3> INFO: *** Version: c8ba-dirty
[22:31:02.148] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:31:02.148] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:31:02.148] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//defaultMaskFile.dat
[22:31:02.148] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters_C15.dat
[22:31:02.206] <TB3> INFO: clk: 4
[22:31:02.206] <TB3> INFO: ctr: 4
[22:31:02.206] <TB3> INFO: sda: 19
[22:31:02.206] <TB3> INFO: tin: 9
[22:31:02.206] <TB3> INFO: level: 15
[22:31:02.206] <TB3> INFO: triggerdelay: 0
[22:31:02.206] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[22:31:02.206] <TB3> INFO: Log level: INFO
[22:31:02.214] <TB3> INFO: Found DTB DTB_WZ4I6J
[22:31:02.223] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[22:31:02.225] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[22:31:02.227] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[22:31:03.710] <TB3> INFO: DUT info:
[22:31:03.710] <TB3> INFO: The DUT currently contains the following objects:
[22:31:03.710] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[22:31:03.710] <TB3> INFO: TBM Core alpha (0): 7 registers set
[22:31:03.710] <TB3> INFO: TBM Core beta (1): 7 registers set
[22:31:03.710] <TB3> INFO: TBM Core alpha (2): 7 registers set
[22:31:03.710] <TB3> INFO: TBM Core beta (3): 7 registers set
[22:31:03.710] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:31:03.710] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.710] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:03.711] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:31:04.111] <TB3> INFO: enter 'restricted' command line mode
[22:31:04.111] <TB3> INFO: enter test to run
[22:31:04.111] <TB3> INFO: test: pretest no parameter change
[22:31:04.111] <TB3> INFO: running: pretest
[22:31:04.650] <TB3> INFO: ######################################################################
[22:31:04.650] <TB3> INFO: PixTestPretest::doTest()
[22:31:04.650] <TB3> INFO: ######################################################################
[22:31:04.651] <TB3> INFO: ----------------------------------------------------------------------
[22:31:04.651] <TB3> INFO: PixTestPretest::programROC()
[22:31:04.651] <TB3> INFO: ----------------------------------------------------------------------
[22:31:22.665] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:31:22.665] <TB3> INFO: IA differences per ROC: 17.7 18.5 19.3 17.7 21.7 18.5 19.3 16.9 17.7 16.9 19.3 19.3 16.9 17.7 19.3 16.9
[22:31:22.701] <TB3> INFO: ----------------------------------------------------------------------
[22:31:22.701] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:31:22.701] <TB3> INFO: ----------------------------------------------------------------------
[22:31:43.940] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[22:31:43.940] <TB3> INFO: i(loss) [mA/ROC]: 21.7 20.1 20.1 19.3 19.3 20.9 20.1 20.1 20.1 19.3 19.3 20.1 20.1 20.1 20.1 19.3
[22:31:43.968] <TB3> INFO: ----------------------------------------------------------------------
[22:31:43.968] <TB3> INFO: PixTestPretest::findTiming()
[22:31:43.968] <TB3> INFO: ----------------------------------------------------------------------
[22:31:43.968] <TB3> INFO: PixTestCmd::init()

[22:32:14.817] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[22:32:14.818] <TB3> INFO: (success/tries = 100/100), width = 3
[22:32:16.317] <TB3> INFO: ----------------------------------------------------------------------
[22:32:16.317] <TB3> INFO: PixTestPretest::findWorkingPixel()
[22:32:16.317] <TB3> INFO: ----------------------------------------------------------------------
[22:32:16.409] <TB3> INFO: Expecting 231680 events.
[22:32:26.048] <TB3> INFO: 231680 events read in total (9047ms).
[22:32:26.054] <TB3> INFO: Test took 9734ms.
[22:32:26.300] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:32:26.331] <TB3> INFO: ----------------------------------------------------------------------
[22:32:26.331] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[22:32:26.331] <TB3> INFO: ----------------------------------------------------------------------
[22:32:26.423] <TB3> INFO: Expecting 231680 events.
[22:32:36.099] <TB3> INFO: 231680 events read in total (9085ms).
[22:32:36.107] <TB3> INFO: Test took 9773ms.
[22:32:36.364] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[22:32:36.365] <TB3> INFO: CalDel: 91 89 93 107 100 92 96 107 96 90 96 87 82 95 92 100
[22:32:36.365] <TB3> INFO: VthrComp: 52 52 51 51 51 51 51 51 51 51 51 53 51 51 51 51
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C0.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C1.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C2.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C3.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C4.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C5.dat
[22:32:36.367] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C6.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C7.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C8.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C9.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C10.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C11.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C12.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C13.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C14.dat
[22:32:36.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:32:36.368] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[22:32:36.369] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[22:32:36.369] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[22:32:36.369] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:32:36.369] <TB3> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[22:32:36.463] <TB3> INFO: enter test to run
[22:32:36.463] <TB3> INFO: test: fulltest no parameter change
[22:32:36.463] <TB3> INFO: running: fulltest
[22:32:36.463] <TB3> INFO: ######################################################################
[22:32:36.463] <TB3> INFO: PixTestFullTest::doTest()
[22:32:36.463] <TB3> INFO: ######################################################################
[22:32:36.464] <TB3> INFO: ######################################################################
[22:32:36.464] <TB3> INFO: PixTestAlive::doTest()
[22:32:36.464] <TB3> INFO: ######################################################################
[22:32:36.465] <TB3> INFO: ----------------------------------------------------------------------
[22:32:36.465] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:36.465] <TB3> INFO: ----------------------------------------------------------------------
[22:32:36.698] <TB3> INFO: Expecting 41600 events.
[22:32:40.296] <TB3> INFO: 41600 events read in total (3006ms).
[22:32:40.297] <TB3> INFO: Test took 3830ms.
[22:32:40.526] <TB3> INFO: PixTestAlive::aliveTest() done
[22:32:40.526] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[22:32:40.527] <TB3> INFO: ----------------------------------------------------------------------
[22:32:40.527] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:40.527] <TB3> INFO: ----------------------------------------------------------------------
[22:32:40.760] <TB3> INFO: Expecting 41600 events.
[22:32:43.688] <TB3> INFO: 41600 events read in total (2336ms).
[22:32:43.688] <TB3> INFO: Test took 3159ms.
[22:32:43.689] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:32:43.930] <TB3> INFO: PixTestAlive::maskTest() done
[22:32:43.930] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:32:43.931] <TB3> INFO: ----------------------------------------------------------------------
[22:32:43.931] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:43.931] <TB3> INFO: ----------------------------------------------------------------------
[22:32:44.164] <TB3> INFO: Expecting 41600 events.
[22:32:47.586] <TB3> INFO: 41600 events read in total (2831ms).
[22:32:47.587] <TB3> INFO: Test took 3655ms.
[22:32:47.815] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[22:32:47.815] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:32:47.815] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:32:47.815] <TB3> INFO: Decoding statistics:
[22:32:47.815] <TB3> INFO: General information:
[22:32:47.815] <TB3> INFO: 16bit words read: 0
[22:32:47.815] <TB3> INFO: valid events total: 0
[22:32:47.815] <TB3> INFO: empty events: 0
[22:32:47.815] <TB3> INFO: valid events with pixels: 0
[22:32:47.815] <TB3> INFO: valid pixel hits: 0
[22:32:47.815] <TB3> INFO: Event errors: 0
[22:32:47.815] <TB3> INFO: start marker: 0
[22:32:47.815] <TB3> INFO: stop marker: 0
[22:32:47.815] <TB3> INFO: overflow: 0
[22:32:47.815] <TB3> INFO: invalid 5bit words: 0
[22:32:47.815] <TB3> INFO: invalid XOR eye diagram: 0
[22:32:47.815] <TB3> INFO: frame (failed synchr.): 0
[22:32:47.815] <TB3> INFO: idle data (no TBM trl): 0
[22:32:47.815] <TB3> INFO: no data (only TBM hdr): 0
[22:32:47.815] <TB3> INFO: TBM errors: 0
[22:32:47.815] <TB3> INFO: flawed TBM headers: 0
[22:32:47.815] <TB3> INFO: flawed TBM trailers: 0
[22:32:47.815] <TB3> INFO: event ID mismatches: 0
[22:32:47.815] <TB3> INFO: ROC errors: 0
[22:32:47.815] <TB3> INFO: missing ROC header(s): 0
[22:32:47.815] <TB3> INFO: misplaced readback start: 0
[22:32:47.815] <TB3> INFO: Pixel decoding errors: 0
[22:32:47.815] <TB3> INFO: pixel data incomplete: 0
[22:32:47.815] <TB3> INFO: pixel address: 0
[22:32:47.815] <TB3> INFO: pulse height fill bit: 0
[22:32:47.815] <TB3> INFO: buffer corruption: 0
[22:32:47.822] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:32:47.822] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[22:32:47.822] <TB3> INFO: ######################################################################
[22:32:47.822] <TB3> INFO: PixTestReadback::doTest()
[22:32:47.822] <TB3> INFO: ######################################################################
[22:32:47.822] <TB3> INFO: ----------------------------------------------------------------------
[22:32:47.822] <TB3> INFO: PixTestReadback::CalibrateVd()
[22:32:47.822] <TB3> INFO: ----------------------------------------------------------------------
[22:32:57.780] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:32:57.781] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:32:57.811] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[22:32:57.811] <TB3> INFO: ----------------------------------------------------------------------
[22:32:57.811] <TB3> INFO: PixTestReadback::CalibrateVa()
[22:32:57.811] <TB3> INFO: ----------------------------------------------------------------------
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:33:07.702] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:33:07.703] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:33:07.733] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[22:33:07.733] <TB3> INFO: ----------------------------------------------------------------------
[22:33:07.733] <TB3> INFO: PixTestReadback::readbackVbg()
[22:33:07.733] <TB3> INFO: ----------------------------------------------------------------------
[22:33:15.375] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[22:33:15.375] <TB3> INFO: ----------------------------------------------------------------------
[22:33:15.375] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[22:33:15.375] <TB3> INFO: ----------------------------------------------------------------------
[22:33:15.375] <TB3> INFO: Vbg will be calibrated using Vd calibration
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.1calibrated Vbg = 1.17722 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160calibrated Vbg = 1.17576 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.9calibrated Vbg = 1.17481 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.1calibrated Vbg = 1.17306 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.5calibrated Vbg = 1.17334 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.8calibrated Vbg = 1.1732 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.8calibrated Vbg = 1.18103 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 150.3calibrated Vbg = 1.18337 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.8calibrated Vbg = 1.17406 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.8calibrated Vbg = 1.17024 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 147.3calibrated Vbg = 1.17034 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.9calibrated Vbg = 1.15924 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.9calibrated Vbg = 1.17013 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.9calibrated Vbg = 1.1713 :::*/*/*/*/
[22:33:15.375] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158calibrated Vbg = 1.17395 :::*/*/*/*/
[22:33:15.376] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 156.1calibrated Vbg = 1.17119 :::*/*/*/*/
[22:33:15.378] <TB3> INFO: ----------------------------------------------------------------------
[22:33:15.378] <TB3> INFO: PixTestReadback::CalibrateIa()
[22:33:15.378] <TB3> INFO: ----------------------------------------------------------------------
[22:35:55.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:35:55.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:35:55.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:35:55.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:35:55.684] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:35:55.711] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[22:35:55.712] <TB3> INFO: PixTestReadback::doTest() done
[22:35:55.712] <TB3> INFO: Decoding statistics:
[22:35:55.712] <TB3> INFO: General information:
[22:35:55.712] <TB3> INFO: 16bit words read: 1536
[22:35:55.712] <TB3> INFO: valid events total: 256
[22:35:55.712] <TB3> INFO: empty events: 256
[22:35:55.712] <TB3> INFO: valid events with pixels: 0
[22:35:55.712] <TB3> INFO: valid pixel hits: 0
[22:35:55.712] <TB3> INFO: Event errors: 0
[22:35:55.712] <TB3> INFO: start marker: 0
[22:35:55.712] <TB3> INFO: stop marker: 0
[22:35:55.712] <TB3> INFO: overflow: 0
[22:35:55.712] <TB3> INFO: invalid 5bit words: 0
[22:35:55.712] <TB3> INFO: invalid XOR eye diagram: 0
[22:35:55.712] <TB3> INFO: frame (failed synchr.): 0
[22:35:55.712] <TB3> INFO: idle data (no TBM trl): 0
[22:35:55.712] <TB3> INFO: no data (only TBM hdr): 0
[22:35:55.712] <TB3> INFO: TBM errors: 0
[22:35:55.712] <TB3> INFO: flawed TBM headers: 0
[22:35:55.713] <TB3> INFO: flawed TBM trailers: 0
[22:35:55.713] <TB3> INFO: event ID mismatches: 0
[22:35:55.713] <TB3> INFO: ROC errors: 0
[22:35:55.713] <TB3> INFO: missing ROC header(s): 0
[22:35:55.713] <TB3> INFO: misplaced readback start: 0
[22:35:55.713] <TB3> INFO: Pixel decoding errors: 0
[22:35:55.713] <TB3> INFO: pixel data incomplete: 0
[22:35:55.713] <TB3> INFO: pixel address: 0
[22:35:55.713] <TB3> INFO: pulse height fill bit: 0
[22:35:55.713] <TB3> INFO: buffer corruption: 0
[22:35:55.747] <TB3> INFO: ######################################################################
[22:35:55.747] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:35:55.747] <TB3> INFO: ######################################################################
[22:35:55.749] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:35:55.761] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[22:35:55.761] <TB3> INFO: run 1 of 1
[22:35:55.995] <TB3> INFO: Expecting 3120000 events.
[22:36:26.625] <TB3> INFO: 668140 events read in total (30039ms).




















[22:36:56.427] <TB3> INFO: 1334345 events read in total (59841ms).











[22:37:26.353] <TB3> INFO: 1997705 events read in total (89767ms).











[22:37:56.265] <TB3> INFO: 2660600 events read in total (119679ms).











[22:38:17.191] <TB3> INFO: 3120000 events read in total (140606ms).
[22:38:17.251] <TB3> INFO: Test took 141491ms.
[22:38:42.221] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[22:38:42.221] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0
[22:38:42.221] <TB3> INFO: separation cut (per ROC): 120 103 110 105 107 107 103 99 102 94 106 107 102 103 110 104
[22:38:42.221] <TB3> INFO: Decoding statistics:
[22:38:42.221] <TB3> INFO: General information:
[22:38:42.221] <TB3> INFO: 16bit words read: 0
[22:38:42.221] <TB3> INFO: valid events total: 0
[22:38:42.221] <TB3> INFO: empty events: 0
[22:38:42.221] <TB3> INFO: valid events with pixels: 0
[22:38:42.221] <TB3> INFO: valid pixel hits: 0
[22:38:42.221] <TB3> INFO: Event errors: 0
[22:38:42.221] <TB3> INFO: start marker: 0
[22:38:42.222] <TB3> INFO: stop marker: 0
[22:38:42.222] <TB3> INFO: overflow: 0
[22:38:42.222] <TB3> INFO: invalid 5bit words: 0
[22:38:42.222] <TB3> INFO: invalid XOR eye diagram: 0
[22:38:42.222] <TB3> INFO: frame (failed synchr.): 0
[22:38:42.222] <TB3> INFO: idle data (no TBM trl): 0
[22:38:42.222] <TB3> INFO: no data (only TBM hdr): 0
[22:38:42.222] <TB3> INFO: TBM errors: 0
[22:38:42.222] <TB3> INFO: flawed TBM headers: 0
[22:38:42.222] <TB3> INFO: flawed TBM trailers: 0
[22:38:42.222] <TB3> INFO: event ID mismatches: 0
[22:38:42.222] <TB3> INFO: ROC errors: 0
[22:38:42.222] <TB3> INFO: missing ROC header(s): 0
[22:38:42.222] <TB3> INFO: misplaced readback start: 0
[22:38:42.222] <TB3> INFO: Pixel decoding errors: 0
[22:38:42.222] <TB3> INFO: pixel data incomplete: 0
[22:38:42.222] <TB3> INFO: pixel address: 0
[22:38:42.222] <TB3> INFO: pulse height fill bit: 0
[22:38:42.222] <TB3> INFO: buffer corruption: 0
[22:38:42.264] <TB3> INFO: ######################################################################
[22:38:42.264] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:38:42.264] <TB3> INFO: ######################################################################
[22:38:42.264] <TB3> INFO: ----------------------------------------------------------------------
[22:38:42.264] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:38:42.264] <TB3> INFO: ----------------------------------------------------------------------
[22:38:42.264] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:38:42.275] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[22:38:42.275] <TB3> INFO: run 1 of 1
[22:38:42.530] <TB3> INFO: Expecting 36608000 events.
[22:39:06.070] <TB3> INFO: 696900 events read in total (22949ms).
[22:39:28.528] <TB3> INFO: 1379400 events read in total (45407ms).
[22:39:51.046] <TB3> INFO: 2059200 events read in total (67925ms).
[22:40:13.876] <TB3> INFO: 2740600 events read in total (90755ms).
[22:40:36.619] <TB3> INFO: 3419550 events read in total (113498ms).
[22:40:59.087] <TB3> INFO: 4096200 events read in total (135966ms).
[22:41:21.784] <TB3> INFO: 4775400 events read in total (158663ms).
[22:41:44.457] <TB3> INFO: 5453300 events read in total (181336ms).
[22:42:07.371] <TB3> INFO: 6131450 events read in total (204250ms).
[22:42:29.962] <TB3> INFO: 6811150 events read in total (226841ms).
[22:42:52.688] <TB3> INFO: 7488800 events read in total (249567ms).
[22:43:15.448] <TB3> INFO: 8165500 events read in total (272327ms).
[22:43:38.315] <TB3> INFO: 8842550 events read in total (295194ms).
[22:44:01.011] <TB3> INFO: 9519950 events read in total (317890ms).
[22:44:23.695] <TB3> INFO: 10196600 events read in total (340574ms).
[22:44:46.323] <TB3> INFO: 10873350 events read in total (363202ms).
[22:45:08.891] <TB3> INFO: 11549050 events read in total (385771ms).
[22:45:31.414] <TB3> INFO: 12224850 events read in total (408293ms).
[22:45:54.062] <TB3> INFO: 12900650 events read in total (430941ms).
[22:46:16.629] <TB3> INFO: 13575750 events read in total (453508ms).
[22:46:39.095] <TB3> INFO: 14249100 events read in total (475974ms).
[22:47:01.729] <TB3> INFO: 14923600 events read in total (498608ms).
[22:47:24.317] <TB3> INFO: 15597800 events read in total (521196ms).
[22:47:46.898] <TB3> INFO: 16269000 events read in total (543777ms).
[22:48:09.418] <TB3> INFO: 16941150 events read in total (566297ms).
[22:48:31.807] <TB3> INFO: 17614600 events read in total (588686ms).
[22:48:54.281] <TB3> INFO: 18285650 events read in total (611160ms).
[22:49:16.667] <TB3> INFO: 18955400 events read in total (633546ms).
[22:49:39.122] <TB3> INFO: 19625450 events read in total (656001ms).
[22:50:01.915] <TB3> INFO: 20295000 events read in total (678794ms).
[22:50:24.331] <TB3> INFO: 20964250 events read in total (701210ms).
[22:50:46.909] <TB3> INFO: 21633900 events read in total (723788ms).
[22:51:09.409] <TB3> INFO: 22302350 events read in total (746288ms).
[22:51:32.218] <TB3> INFO: 22970800 events read in total (769097ms).
[22:51:54.581] <TB3> INFO: 23637050 events read in total (791460ms).
[22:52:16.817] <TB3> INFO: 24304900 events read in total (813696ms).
[22:52:39.344] <TB3> INFO: 24972100 events read in total (836223ms).
[22:53:01.683] <TB3> INFO: 25640250 events read in total (858562ms).
[22:53:24.105] <TB3> INFO: 26307800 events read in total (880984ms).
[22:53:46.622] <TB3> INFO: 26972750 events read in total (903501ms).
[22:54:08.916] <TB3> INFO: 27639400 events read in total (925795ms).
[22:54:31.404] <TB3> INFO: 28305950 events read in total (948283ms).
[22:54:53.807] <TB3> INFO: 28972300 events read in total (970686ms).
[22:55:16.192] <TB3> INFO: 29636900 events read in total (993071ms).
[22:55:38.501] <TB3> INFO: 30303400 events read in total (1015380ms).
[22:56:01.102] <TB3> INFO: 30966900 events read in total (1037981ms).
[22:56:23.727] <TB3> INFO: 31634250 events read in total (1060606ms).
[22:56:45.845] <TB3> INFO: 32301600 events read in total (1082724ms).
[22:57:08.086] <TB3> INFO: 32966800 events read in total (1104965ms).
[22:57:30.421] <TB3> INFO: 33632550 events read in total (1127300ms).
[22:57:52.950] <TB3> INFO: 34300900 events read in total (1149829ms).
[22:58:15.762] <TB3> INFO: 34968500 events read in total (1172641ms).
[22:58:38.373] <TB3> INFO: 35636150 events read in total (1195252ms).
[22:59:01.307] <TB3> INFO: 36314250 events read in total (1218186ms).
[22:59:11.223] <TB3> INFO: 36608000 events read in total (1228102ms).
[22:59:11.276] <TB3> INFO: Test took 1229001ms.
[22:59:11.627] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:13.733] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:15.528] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:17.389] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:19.335] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:21.168] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:23.097] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:25.013] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:26.743] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:28.229] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:29.739] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:31.203] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:32.678] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:34.183] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:35.649] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:37.114] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[22:59:38.583] <TB3> INFO: PixTestScurves::scurves() done
[22:59:38.583] <TB3> INFO: Vcal mean: 131.80 121.95 124.38 113.76 121.88 129.90 116.58 119.23 124.16 108.91 118.97 129.21 123.29 125.14 131.37 132.47
[22:59:38.583] <TB3> INFO: Vcal RMS: 5.48 6.19 6.74 5.70 5.90 5.81 5.52 5.43 6.21 5.19 6.24 6.31 6.19 5.46 6.13 6.18
[22:59:38.583] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1256 seconds
[22:59:38.583] <TB3> INFO: Decoding statistics:
[22:59:38.583] <TB3> INFO: General information:
[22:59:38.583] <TB3> INFO: 16bit words read: 0
[22:59:38.583] <TB3> INFO: valid events total: 0
[22:59:38.583] <TB3> INFO: empty events: 0
[22:59:38.583] <TB3> INFO: valid events with pixels: 0
[22:59:38.583] <TB3> INFO: valid pixel hits: 0
[22:59:38.583] <TB3> INFO: Event errors: 0
[22:59:38.583] <TB3> INFO: start marker: 0
[22:59:38.583] <TB3> INFO: stop marker: 0
[22:59:38.583] <TB3> INFO: overflow: 0
[22:59:38.583] <TB3> INFO: invalid 5bit words: 0
[22:59:38.583] <TB3> INFO: invalid XOR eye diagram: 0
[22:59:38.583] <TB3> INFO: frame (failed synchr.): 0
[22:59:38.583] <TB3> INFO: idle data (no TBM trl): 0
[22:59:38.583] <TB3> INFO: no data (only TBM hdr): 0
[22:59:38.583] <TB3> INFO: TBM errors: 0
[22:59:38.583] <TB3> INFO: flawed TBM headers: 0
[22:59:38.583] <TB3> INFO: flawed TBM trailers: 0
[22:59:38.583] <TB3> INFO: event ID mismatches: 0
[22:59:38.583] <TB3> INFO: ROC errors: 0
[22:59:38.583] <TB3> INFO: missing ROC header(s): 0
[22:59:38.583] <TB3> INFO: misplaced readback start: 0
[22:59:38.583] <TB3> INFO: Pixel decoding errors: 0
[22:59:38.583] <TB3> INFO: pixel data incomplete: 0
[22:59:38.583] <TB3> INFO: pixel address: 0
[22:59:38.583] <TB3> INFO: pulse height fill bit: 0
[22:59:38.583] <TB3> INFO: buffer corruption: 0
[22:59:38.647] <TB3> INFO: ######################################################################
[22:59:38.647] <TB3> INFO: PixTestTrim::doTest()
[22:59:38.647] <TB3> INFO: ######################################################################
[22:59:38.648] <TB3> INFO: ----------------------------------------------------------------------
[22:59:38.648] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[22:59:38.648] <TB3> INFO: ----------------------------------------------------------------------
[22:59:38.689] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[22:59:38.689] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[22:59:38.699] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[22:59:38.699] <TB3> INFO: run 1 of 1
[22:59:38.933] <TB3> INFO: Expecting 5025280 events.
[23:00:09.159] <TB3> INFO: 831744 events read in total (29633ms).
[23:00:39.357] <TB3> INFO: 1661520 events read in total (59831ms).
[23:01:09.089] <TB3> INFO: 2488192 events read in total (89563ms).
[23:01:38.591] <TB3> INFO: 3312600 events read in total (119065ms).
[23:02:08.420] <TB3> INFO: 4132360 events read in total (148895ms).
[23:02:37.760] <TB3> INFO: 4949728 events read in total (178234ms).
[23:02:40.780] <TB3> INFO: 5025280 events read in total (181254ms).
[23:02:40.828] <TB3> INFO: Test took 182128ms.
[23:02:57.132] <TB3> INFO: ROC 0 VthrComp = 132
[23:02:57.133] <TB3> INFO: ROC 1 VthrComp = 116
[23:02:57.133] <TB3> INFO: ROC 2 VthrComp = 131
[23:02:57.135] <TB3> INFO: ROC 3 VthrComp = 113
[23:02:57.135] <TB3> INFO: ROC 4 VthrComp = 123
[23:02:57.135] <TB3> INFO: ROC 5 VthrComp = 131
[23:02:57.135] <TB3> INFO: ROC 6 VthrComp = 117
[23:02:57.136] <TB3> INFO: ROC 7 VthrComp = 122
[23:02:57.136] <TB3> INFO: ROC 8 VthrComp = 123
[23:02:57.137] <TB3> INFO: ROC 9 VthrComp = 108
[23:02:57.137] <TB3> INFO: ROC 10 VthrComp = 119
[23:02:57.137] <TB3> INFO: ROC 11 VthrComp = 130
[23:02:57.137] <TB3> INFO: ROC 12 VthrComp = 123
[23:02:57.138] <TB3> INFO: ROC 13 VthrComp = 128
[23:02:57.138] <TB3> INFO: ROC 14 VthrComp = 132
[23:02:57.139] <TB3> INFO: ROC 15 VthrComp = 127
[23:02:57.374] <TB3> INFO: Expecting 41600 events.
[23:03:00.925] <TB3> INFO: 41600 events read in total (2958ms).
[23:03:00.926] <TB3> INFO: Test took 3786ms.
[23:03:00.935] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:03:00.935] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:03:00.944] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:03:00.944] <TB3> INFO: run 1 of 1
[23:03:01.222] <TB3> INFO: Expecting 5025280 events.
[23:03:26.929] <TB3> INFO: 591240 events read in total (25115ms).
[23:03:52.011] <TB3> INFO: 1180816 events read in total (50197ms).
[23:04:17.795] <TB3> INFO: 1770872 events read in total (75981ms).
[23:04:43.087] <TB3> INFO: 2359744 events read in total (101273ms).
[23:05:08.446] <TB3> INFO: 2946768 events read in total (126632ms).
[23:05:33.323] <TB3> INFO: 3531984 events read in total (151509ms).
[23:05:58.223] <TB3> INFO: 4116856 events read in total (176409ms).
[23:06:24.281] <TB3> INFO: 4700960 events read in total (202467ms).
[23:06:38.500] <TB3> INFO: 5025280 events read in total (216686ms).
[23:06:38.553] <TB3> INFO: Test took 217609ms.
[23:07:04.061] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 61.3845 for pixel 7/3 mean/min/max = 48.03/34.6016/61.4584
[23:07:04.061] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 64.1747 for pixel 45/0 mean/min/max = 47.8933/31.4723/64.3143
[23:07:04.062] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.278 for pixel 6/57 mean/min/max = 45.7823/31.2392/60.3254
[23:07:04.062] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.7668 for pixel 1/79 mean/min/max = 47.324/32.4431/62.205
[23:07:04.063] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.501 for pixel 36/24 mean/min/max = 45.5144/32.4668/58.5619
[23:07:04.063] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.4795 for pixel 8/16 mean/min/max = 46.2419/32.9883/59.4956
[23:07:04.064] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.5348 for pixel 51/79 mean/min/max = 46.1809/32.4942/59.8677
[23:07:04.064] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.2038 for pixel 18/1 mean/min/max = 46.7485/33.1119/60.385
[23:07:04.064] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 63.8026 for pixel 21/7 mean/min/max = 47.8856/31.7165/64.0547
[23:07:04.065] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.0768 for pixel 0/79 mean/min/max = 48.0243/34.9556/61.093
[23:07:04.065] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.8119 for pixel 28/79 mean/min/max = 46.0926/32.0323/60.1529
[23:07:04.066] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.9185 for pixel 13/9 mean/min/max = 48.2605/33.4956/63.0255
[23:07:04.066] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.4364 for pixel 12/2 mean/min/max = 45.913/31.3298/60.4962
[23:07:04.066] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.6271 for pixel 8/2 mean/min/max = 44.8597/31.0525/58.6668
[23:07:04.067] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 63.9557 for pixel 1/69 mean/min/max = 48.9436/33.845/64.0422
[23:07:04.067] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.5689 for pixel 0/3 mean/min/max = 46.8095/30.8656/62.7533
[23:07:04.067] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:07:04.156] <TB3> INFO: Expecting 411648 events.
[23:07:13.388] <TB3> INFO: 411648 events read in total (8641ms).
[23:07:13.397] <TB3> INFO: Expecting 411648 events.
[23:07:22.504] <TB3> INFO: 411648 events read in total (8704ms).
[23:07:22.514] <TB3> INFO: Expecting 411648 events.
[23:07:31.576] <TB3> INFO: 411648 events read in total (8659ms).
[23:07:31.589] <TB3> INFO: Expecting 411648 events.
[23:07:40.584] <TB3> INFO: 411648 events read in total (8592ms).
[23:07:40.599] <TB3> INFO: Expecting 411648 events.
[23:07:49.604] <TB3> INFO: 411648 events read in total (8602ms).
[23:07:49.622] <TB3> INFO: Expecting 411648 events.
[23:07:58.671] <TB3> INFO: 411648 events read in total (8646ms).
[23:07:58.698] <TB3> INFO: Expecting 411648 events.
[23:08:07.761] <TB3> INFO: 411648 events read in total (8660ms).
[23:08:07.792] <TB3> INFO: Expecting 411648 events.
[23:08:16.902] <TB3> INFO: 411648 events read in total (8708ms).
[23:08:16.937] <TB3> INFO: Expecting 411648 events.
[23:08:26.063] <TB3> INFO: 411648 events read in total (8723ms).
[23:08:26.092] <TB3> INFO: Expecting 411648 events.
[23:08:35.152] <TB3> INFO: 411648 events read in total (8657ms).
[23:08:35.182] <TB3> INFO: Expecting 411648 events.
[23:08:44.269] <TB3> INFO: 411648 events read in total (8684ms).
[23:08:44.304] <TB3> INFO: Expecting 411648 events.
[23:08:53.357] <TB3> INFO: 411648 events read in total (8650ms).
[23:08:53.393] <TB3> INFO: Expecting 411648 events.
[23:09:02.475] <TB3> INFO: 411648 events read in total (8679ms).
[23:09:02.514] <TB3> INFO: Expecting 411648 events.
[23:09:11.576] <TB3> INFO: 411648 events read in total (8659ms).
[23:09:11.630] <TB3> INFO: Expecting 411648 events.
[23:09:20.830] <TB3> INFO: 411648 events read in total (8797ms).
[23:09:20.875] <TB3> INFO: Expecting 411648 events.
[23:09:29.976] <TB3> INFO: 411648 events read in total (8698ms).
[23:09:30.039] <TB3> INFO: Test took 145972ms.
[23:09:30.798] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:09:30.810] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:09:30.810] <TB3> INFO: run 1 of 1
[23:09:31.087] <TB3> INFO: Expecting 5025280 events.
[23:09:57.461] <TB3> INFO: 589920 events read in total (25782ms).
[23:10:22.642] <TB3> INFO: 1176280 events read in total (50963ms).
[23:10:48.054] <TB3> INFO: 1761088 events read in total (76375ms).
[23:11:13.539] <TB3> INFO: 2346712 events read in total (101860ms).
[23:11:39.180] <TB3> INFO: 2933720 events read in total (127501ms).
[23:12:04.591] <TB3> INFO: 3522984 events read in total (152912ms).
[23:12:30.301] <TB3> INFO: 4114216 events read in total (178622ms).
[23:12:56.176] <TB3> INFO: 4704472 events read in total (204497ms).
[23:13:10.122] <TB3> INFO: 5025280 events read in total (218443ms).
[23:13:10.243] <TB3> INFO: Test took 219432ms.
[23:13:35.499] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 10.080322 .. 143.827920
[23:13:35.734] <TB3> INFO: Expecting 208000 events.
[23:13:45.317] <TB3> INFO: 208000 events read in total (8991ms).
[23:13:45.319] <TB3> INFO: Test took 9819ms.
[23:13:45.383] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 153 (-1/-1) hits flags = 528 (plus default)
[23:13:45.395] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:13:45.395] <TB3> INFO: run 1 of 1
[23:13:45.673] <TB3> INFO: Expecting 5125120 events.
[23:14:11.406] <TB3> INFO: 587176 events read in total (25142ms).
[23:14:36.476] <TB3> INFO: 1173808 events read in total (50212ms).
[23:15:01.990] <TB3> INFO: 1760840 events read in total (75726ms).
[23:15:27.340] <TB3> INFO: 2347560 events read in total (101076ms).
[23:15:52.637] <TB3> INFO: 2933992 events read in total (126373ms).
[23:16:17.986] <TB3> INFO: 3519664 events read in total (151722ms).
[23:16:43.563] <TB3> INFO: 4104960 events read in total (177299ms).
[23:17:09.787] <TB3> INFO: 4688944 events read in total (203523ms).
[23:17:28.956] <TB3> INFO: 5125120 events read in total (222692ms).
[23:17:29.046] <TB3> INFO: Test took 223652ms.
[23:17:53.610] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.088891 .. 45.256915
[23:17:53.844] <TB3> INFO: Expecting 208000 events.
[23:18:03.587] <TB3> INFO: 208000 events read in total (9151ms).
[23:18:03.588] <TB3> INFO: Test took 9977ms.
[23:18:03.649] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:18:03.660] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:18:03.660] <TB3> INFO: run 1 of 1
[23:18:03.938] <TB3> INFO: Expecting 1297920 events.
[23:18:32.113] <TB3> INFO: 660776 events read in total (27584ms).
[23:18:58.593] <TB3> INFO: 1297920 events read in total (54064ms).
[23:18:58.620] <TB3> INFO: Test took 54961ms.
[23:19:11.339] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.203195 .. 48.503285
[23:19:11.572] <TB3> INFO: Expecting 208000 events.
[23:19:21.615] <TB3> INFO: 208000 events read in total (9452ms).
[23:19:21.616] <TB3> INFO: Test took 10276ms.
[23:19:21.681] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 58 (-1/-1) hits flags = 528 (plus default)
[23:19:21.693] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:19:21.693] <TB3> INFO: run 1 of 1
[23:19:21.971] <TB3> INFO: Expecting 1364480 events.
[23:19:49.426] <TB3> INFO: 645248 events read in total (26864ms).
[23:20:16.432] <TB3> INFO: 1288656 events read in total (53871ms).
[23:20:19.998] <TB3> INFO: 1364480 events read in total (57436ms).
[23:20:20.023] <TB3> INFO: Test took 58331ms.
[23:20:33.289] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.185628 .. 46.309274
[23:20:33.539] <TB3> INFO: Expecting 208000 events.
[23:20:43.259] <TB3> INFO: 208000 events read in total (9128ms).
[23:20:43.260] <TB3> INFO: Test took 9970ms.
[23:20:43.326] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[23:20:43.337] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:20:43.337] <TB3> INFO: run 1 of 1
[23:20:43.615] <TB3> INFO: Expecting 1364480 events.
[23:21:11.258] <TB3> INFO: 659872 events read in total (27051ms).
[23:21:39.248] <TB3> INFO: 1319584 events read in total (55041ms).
[23:21:41.872] <TB3> INFO: 1364480 events read in total (57665ms).
[23:21:41.909] <TB3> INFO: Test took 58571ms.
[23:21:54.720] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:21:54.720] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:21:54.730] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:21:54.730] <TB3> INFO: run 1 of 1
[23:21:54.962] <TB3> INFO: Expecting 1364480 events.
[23:22:22.594] <TB3> INFO: 668104 events read in total (27040ms).
[23:22:50.838] <TB3> INFO: 1335912 events read in total (55284ms).
[23:22:52.483] <TB3> INFO: 1364480 events read in total (56929ms).
[23:22:52.510] <TB3> INFO: Test took 57781ms.
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:23:04.902] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:23:04.903] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:23:04.903] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C0.dat
[23:23:04.909] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C1.dat
[23:23:04.915] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C2.dat
[23:23:04.920] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C3.dat
[23:23:04.925] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C4.dat
[23:23:04.931] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C5.dat
[23:23:04.936] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C6.dat
[23:23:04.942] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C7.dat
[23:23:04.947] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C8.dat
[23:23:04.953] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C9.dat
[23:23:04.958] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C10.dat
[23:23:04.963] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C11.dat
[23:23:04.969] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C12.dat
[23:23:04.974] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C13.dat
[23:23:04.980] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C14.dat
[23:23:04.985] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C15.dat
[23:23:04.990] <TB3> INFO: PixTestTrim::trimTest() done
[23:23:04.990] <TB3> INFO: vtrim: 159 155 142 132 133 135 128 135 162 112 117 160 137 142 174 127
[23:23:04.990] <TB3> INFO: vthrcomp: 132 116 131 113 123 131 117 122 123 108 119 130 123 128 132 127
[23:23:04.990] <TB3> INFO: vcal mean: 34.99 35.29 34.94 35.04 34.97 35.06 34.96 34.98 35.60 35.07 34.97 35.26 35.00 34.92 35.18 35.19
[23:23:04.990] <TB3> INFO: vcal RMS: 0.98 1.42 1.03 1.04 1.03 1.10 1.16 1.06 1.81 1.01 1.03 1.34 1.10 1.08 1.21 1.45
[23:23:04.990] <TB3> INFO: bits mean: 9.05 10.07 10.12 9.40 10.33 9.63 9.31 9.61 10.25 8.12 9.51 9.63 10.10 10.10 9.31 9.70
[23:23:04.990] <TB3> INFO: bits RMS: 2.39 2.46 2.47 2.62 2.30 2.49 2.73 2.51 2.43 2.72 2.70 2.36 2.49 2.59 2.42 2.79
[23:23:04.997] <TB3> INFO: ----------------------------------------------------------------------
[23:23:04.997] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:23:04.997] <TB3> INFO: ----------------------------------------------------------------------
[23:23:04.000] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:23:05.010] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[23:23:05.010] <TB3> INFO: run 1 of 1
[23:23:05.242] <TB3> INFO: Expecting 4160000 events.
[23:23:37.899] <TB3> INFO: 766995 events read in total (32065ms).
[23:24:09.733] <TB3> INFO: 1527060 events read in total (63899ms).
[23:24:41.384] <TB3> INFO: 2280740 events read in total (95550ms).
[23:25:12.728] <TB3> INFO: 3028485 events read in total (126894ms).
[23:25:44.187] <TB3> INFO: 3774075 events read in total (158353ms).
[23:26:00.670] <TB3> INFO: 4160000 events read in total (174836ms).
[23:26:00.718] <TB3> INFO: Test took 175708ms.
[23:26:27.899] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[23:26:27.909] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[23:26:27.909] <TB3> INFO: run 1 of 1
[23:26:28.140] <TB3> INFO: Expecting 4305600 events.
[23:26:59.730] <TB3> INFO: 732525 events read in total (30998ms).
[23:27:30.903] <TB3> INFO: 1459295 events read in total (62171ms).
[23:28:01.966] <TB3> INFO: 2181965 events read in total (93234ms).
[23:28:32.844] <TB3> INFO: 2899365 events read in total (124112ms).
[23:29:03.495] <TB3> INFO: 3614380 events read in total (154763ms).
[23:29:33.158] <TB3> INFO: 4305600 events read in total (184426ms).
[23:29:33.228] <TB3> INFO: Test took 185319ms.
[23:30:02.317] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[23:30:02.327] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[23:30:02.327] <TB3> INFO: run 1 of 1
[23:30:02.605] <TB3> INFO: Expecting 4097600 events.
[23:30:34.701] <TB3> INFO: 747100 events read in total (31504ms).
[23:31:05.736] <TB3> INFO: 1487485 events read in total (62539ms).
[23:31:37.023] <TB3> INFO: 2223005 events read in total (93826ms).
[23:32:08.244] <TB3> INFO: 2953230 events read in total (125047ms).
[23:32:39.215] <TB3> INFO: 3681585 events read in total (156018ms).
[23:32:57.138] <TB3> INFO: 4097600 events read in total (173941ms).
[23:32:57.206] <TB3> INFO: Test took 174879ms.
[23:33:25.224] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[23:33:25.234] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[23:33:25.234] <TB3> INFO: run 1 of 1
[23:33:25.466] <TB3> INFO: Expecting 4076800 events.
[23:33:57.613] <TB3> INFO: 748960 events read in total (31555ms).
[23:34:29.006] <TB3> INFO: 1491230 events read in total (62948ms).
[23:35:00.452] <TB3> INFO: 2227905 events read in total (94394ms).
[23:35:31.794] <TB3> INFO: 2959515 events read in total (125736ms).
[23:36:02.566] <TB3> INFO: 3689585 events read in total (156508ms).
[23:36:19.075] <TB3> INFO: 4076800 events read in total (173017ms).
[23:36:19.124] <TB3> INFO: Test took 173890ms.
[23:36:50.009] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[23:36:50.021] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[23:36:50.021] <TB3> INFO: run 1 of 1
[23:36:50.256] <TB3> INFO: Expecting 4139200 events.
[23:37:22.133] <TB3> INFO: 744470 events read in total (31285ms).
[23:37:53.538] <TB3> INFO: 1482455 events read in total (62690ms).
[23:38:24.885] <TB3> INFO: 2215545 events read in total (94037ms).
[23:38:55.653] <TB3> INFO: 2943680 events read in total (124805ms).
[23:39:26.697] <TB3> INFO: 3669785 events read in total (155849ms).
[23:39:46.892] <TB3> INFO: 4139200 events read in total (176044ms).
[23:39:46.948] <TB3> INFO: Test took 176928ms.
[23:40:15.704] <TB3> INFO: PixTestTrim::trimBitTest() done
[23:40:15.705] <TB3> INFO: PixTestTrim::doTest() done, duration: 2437 seconds
[23:40:15.705] <TB3> INFO: Decoding statistics:
[23:40:15.705] <TB3> INFO: General information:
[23:40:15.705] <TB3> INFO: 16bit words read: 0
[23:40:15.705] <TB3> INFO: valid events total: 0
[23:40:15.705] <TB3> INFO: empty events: 0
[23:40:15.705] <TB3> INFO: valid events with pixels: 0
[23:40:15.705] <TB3> INFO: valid pixel hits: 0
[23:40:15.705] <TB3> INFO: Event errors: 0
[23:40:15.705] <TB3> INFO: start marker: 0
[23:40:15.705] <TB3> INFO: stop marker: 0
[23:40:15.705] <TB3> INFO: overflow: 0
[23:40:15.705] <TB3> INFO: invalid 5bit words: 0
[23:40:15.705] <TB3> INFO: invalid XOR eye diagram: 0
[23:40:15.705] <TB3> INFO: frame (failed synchr.): 0
[23:40:15.705] <TB3> INFO: idle data (no TBM trl): 0
[23:40:15.705] <TB3> INFO: no data (only TBM hdr): 0
[23:40:15.705] <TB3> INFO: TBM errors: 0
[23:40:15.705] <TB3> INFO: flawed TBM headers: 0
[23:40:15.705] <TB3> INFO: flawed TBM trailers: 0
[23:40:15.705] <TB3> INFO: event ID mismatches: 0
[23:40:15.705] <TB3> INFO: ROC errors: 0
[23:40:15.705] <TB3> INFO: missing ROC header(s): 0
[23:40:15.705] <TB3> INFO: misplaced readback start: 0
[23:40:15.705] <TB3> INFO: Pixel decoding errors: 0
[23:40:15.705] <TB3> INFO: pixel data incomplete: 0
[23:40:15.705] <TB3> INFO: pixel address: 0
[23:40:15.705] <TB3> INFO: pulse height fill bit: 0
[23:40:15.705] <TB3> INFO: buffer corruption: 0
[23:40:16.392] <TB3> INFO: ######################################################################
[23:40:16.392] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:40:16.392] <TB3> INFO: ######################################################################
[23:40:16.627] <TB3> INFO: Expecting 41600 events.
[23:40:20.284] <TB3> INFO: 41600 events read in total (3065ms).
[23:40:20.285] <TB3> INFO: Test took 3891ms.
[23:40:20.722] <TB3> INFO: Expecting 41600 events.
[23:40:24.330] <TB3> INFO: 41600 events read in total (3017ms).
[23:40:24.331] <TB3> INFO: Test took 3842ms.
[23:40:24.622] <TB3> INFO: Expecting 41600 events.
[23:40:28.099] <TB3> INFO: 41600 events read in total (2886ms).
[23:40:28.099] <TB3> INFO: Test took 3742ms.
[23:40:28.388] <TB3> INFO: Expecting 41600 events.
[23:40:32.049] <TB3> INFO: 41600 events read in total (3070ms).
[23:40:32.050] <TB3> INFO: Test took 3927ms.
[23:40:32.338] <TB3> INFO: Expecting 41600 events.
[23:40:36.036] <TB3> INFO: 41600 events read in total (3107ms).
[23:40:36.037] <TB3> INFO: Test took 3964ms.
[23:40:36.325] <TB3> INFO: Expecting 41600 events.
[23:40:39.800] <TB3> INFO: 41600 events read in total (2883ms).
[23:40:39.801] <TB3> INFO: Test took 3740ms.
[23:40:40.089] <TB3> INFO: Expecting 41600 events.
[23:40:43.566] <TB3> INFO: 41600 events read in total (2885ms).
[23:40:43.567] <TB3> INFO: Test took 3743ms.
[23:40:43.855] <TB3> INFO: Expecting 41600 events.
[23:40:47.411] <TB3> INFO: 41600 events read in total (2965ms).
[23:40:47.411] <TB3> INFO: Test took 3821ms.
[23:40:47.713] <TB3> INFO: Expecting 41600 events.
[23:40:51.378] <TB3> INFO: 41600 events read in total (3073ms).
[23:40:51.379] <TB3> INFO: Test took 3944ms.
[23:40:51.667] <TB3> INFO: Expecting 41600 events.
[23:40:55.201] <TB3> INFO: 41600 events read in total (2942ms).
[23:40:55.202] <TB3> INFO: Test took 3799ms.
[23:40:55.521] <TB3> INFO: Expecting 41600 events.
[23:40:59.098] <TB3> INFO: 41600 events read in total (2986ms).
[23:40:59.099] <TB3> INFO: Test took 3874ms.
[23:40:59.387] <TB3> INFO: Expecting 41600 events.
[23:41:02.894] <TB3> INFO: 41600 events read in total (2914ms).
[23:41:02.895] <TB3> INFO: Test took 3772ms.
[23:41:03.186] <TB3> INFO: Expecting 41600 events.
[23:41:06.830] <TB3> INFO: 41600 events read in total (3052ms).
[23:41:06.831] <TB3> INFO: Test took 3910ms.
[23:41:07.119] <TB3> INFO: Expecting 41600 events.
[23:41:10.615] <TB3> INFO: 41600 events read in total (2905ms).
[23:41:10.615] <TB3> INFO: Test took 3762ms.
[23:41:10.906] <TB3> INFO: Expecting 41600 events.
[23:41:14.381] <TB3> INFO: 41600 events read in total (2883ms).
[23:41:14.382] <TB3> INFO: Test took 3741ms.
[23:41:14.672] <TB3> INFO: Expecting 41600 events.
[23:41:18.333] <TB3> INFO: 41600 events read in total (3069ms).
[23:41:18.334] <TB3> INFO: Test took 3926ms.
[23:41:18.624] <TB3> INFO: Expecting 41600 events.
[23:41:22.114] <TB3> INFO: 41600 events read in total (2898ms).
[23:41:22.115] <TB3> INFO: Test took 3755ms.
[23:41:22.403] <TB3> INFO: Expecting 41600 events.
[23:41:25.889] <TB3> INFO: 41600 events read in total (2895ms).
[23:41:25.890] <TB3> INFO: Test took 3752ms.
[23:41:26.178] <TB3> INFO: Expecting 41600 events.
[23:41:29.710] <TB3> INFO: 41600 events read in total (2940ms).
[23:41:29.711] <TB3> INFO: Test took 3798ms.
[23:41:29.002] <TB3> INFO: Expecting 41600 events.
[23:41:33.527] <TB3> INFO: 41600 events read in total (2933ms).
[23:41:33.528] <TB3> INFO: Test took 3790ms.
[23:41:33.819] <TB3> INFO: Expecting 41600 events.
[23:41:37.297] <TB3> INFO: 41600 events read in total (2885ms).
[23:41:37.298] <TB3> INFO: Test took 3743ms.
[23:41:37.589] <TB3> INFO: Expecting 41600 events.
[23:41:41.136] <TB3> INFO: 41600 events read in total (2955ms).
[23:41:41.137] <TB3> INFO: Test took 3812ms.
[23:41:41.425] <TB3> INFO: Expecting 41600 events.
[23:41:44.948] <TB3> INFO: 41600 events read in total (2932ms).
[23:41:44.949] <TB3> INFO: Test took 3789ms.
[23:41:45.239] <TB3> INFO: Expecting 41600 events.
[23:41:48.686] <TB3> INFO: 41600 events read in total (2855ms).
[23:41:48.687] <TB3> INFO: Test took 3713ms.
[23:41:48.975] <TB3> INFO: Expecting 41600 events.
[23:41:52.499] <TB3> INFO: 41600 events read in total (2933ms).
[23:41:52.500] <TB3> INFO: Test took 3790ms.
[23:41:52.788] <TB3> INFO: Expecting 41600 events.
[23:41:56.438] <TB3> INFO: 41600 events read in total (3059ms).
[23:41:56.439] <TB3> INFO: Test took 3916ms.
[23:41:56.729] <TB3> INFO: Expecting 41600 events.
[23:42:00.173] <TB3> INFO: 41600 events read in total (2852ms).
[23:42:00.174] <TB3> INFO: Test took 3709ms.
[23:42:00.462] <TB3> INFO: Expecting 41600 events.
[23:42:03.913] <TB3> INFO: 41600 events read in total (2860ms).
[23:42:03.914] <TB3> INFO: Test took 3717ms.
[23:42:04.203] <TB3> INFO: Expecting 41600 events.
[23:42:07.755] <TB3> INFO: 41600 events read in total (2960ms).
[23:42:07.756] <TB3> INFO: Test took 3817ms.
[23:42:08.045] <TB3> INFO: Expecting 2560 events.
[23:42:08.929] <TB3> INFO: 2560 events read in total (292ms).
[23:42:08.929] <TB3> INFO: Test took 1161ms.
[23:42:09.237] <TB3> INFO: Expecting 2560 events.
[23:42:10.119] <TB3> INFO: 2560 events read in total (291ms).
[23:42:10.119] <TB3> INFO: Test took 1190ms.
[23:42:10.426] <TB3> INFO: Expecting 2560 events.
[23:42:11.312] <TB3> INFO: 2560 events read in total (294ms).
[23:42:11.312] <TB3> INFO: Test took 1193ms.
[23:42:11.620] <TB3> INFO: Expecting 2560 events.
[23:42:12.505] <TB3> INFO: 2560 events read in total (294ms).
[23:42:12.505] <TB3> INFO: Test took 1193ms.
[23:42:12.813] <TB3> INFO: Expecting 2560 events.
[23:42:13.694] <TB3> INFO: 2560 events read in total (290ms).
[23:42:13.694] <TB3> INFO: Test took 1189ms.
[23:42:13.002] <TB3> INFO: Expecting 2560 events.
[23:42:14.882] <TB3> INFO: 2560 events read in total (289ms).
[23:42:14.882] <TB3> INFO: Test took 1188ms.
[23:42:15.189] <TB3> INFO: Expecting 2560 events.
[23:42:16.068] <TB3> INFO: 2560 events read in total (287ms).
[23:42:16.069] <TB3> INFO: Test took 1187ms.
[23:42:16.376] <TB3> INFO: Expecting 2560 events.
[23:42:17.262] <TB3> INFO: 2560 events read in total (294ms).
[23:42:17.262] <TB3> INFO: Test took 1193ms.
[23:42:17.570] <TB3> INFO: Expecting 2560 events.
[23:42:18.448] <TB3> INFO: 2560 events read in total (287ms).
[23:42:18.448] <TB3> INFO: Test took 1185ms.
[23:42:18.756] <TB3> INFO: Expecting 2560 events.
[23:42:19.633] <TB3> INFO: 2560 events read in total (286ms).
[23:42:19.633] <TB3> INFO: Test took 1185ms.
[23:42:19.941] <TB3> INFO: Expecting 2560 events.
[23:42:20.821] <TB3> INFO: 2560 events read in total (289ms).
[23:42:20.821] <TB3> INFO: Test took 1187ms.
[23:42:21.129] <TB3> INFO: Expecting 2560 events.
[23:42:22.010] <TB3> INFO: 2560 events read in total (289ms).
[23:42:22.010] <TB3> INFO: Test took 1189ms.
[23:42:22.318] <TB3> INFO: Expecting 2560 events.
[23:42:23.204] <TB3> INFO: 2560 events read in total (294ms).
[23:42:23.204] <TB3> INFO: Test took 1193ms.
[23:42:23.512] <TB3> INFO: Expecting 2560 events.
[23:42:24.396] <TB3> INFO: 2560 events read in total (293ms).
[23:42:24.396] <TB3> INFO: Test took 1192ms.
[23:42:24.704] <TB3> INFO: Expecting 2560 events.
[23:42:25.586] <TB3> INFO: 2560 events read in total (290ms).
[23:42:25.586] <TB3> INFO: Test took 1189ms.
[23:42:25.894] <TB3> INFO: Expecting 2560 events.
[23:42:26.776] <TB3> INFO: 2560 events read in total (290ms).
[23:42:26.777] <TB3> INFO: Test took 1190ms.
[23:42:26.779] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:42:27.085] <TB3> INFO: Expecting 655360 events.
[23:42:41.459] <TB3> INFO: 655360 events read in total (13782ms).
[23:42:41.470] <TB3> INFO: Expecting 655360 events.
[23:42:55.626] <TB3> INFO: 655360 events read in total (13753ms).
[23:42:55.642] <TB3> INFO: Expecting 655360 events.
[23:43:09.738] <TB3> INFO: 655360 events read in total (13693ms).
[23:43:09.758] <TB3> INFO: Expecting 655360 events.
[23:43:23.002] <TB3> INFO: 655360 events read in total (13841ms).
[23:43:24.032] <TB3> INFO: Expecting 655360 events.
[23:43:38.079] <TB3> INFO: 655360 events read in total (13644ms).
[23:43:38.106] <TB3> INFO: Expecting 655360 events.
[23:43:52.246] <TB3> INFO: 655360 events read in total (13737ms).
[23:43:52.286] <TB3> INFO: Expecting 655360 events.
[23:44:06.416] <TB3> INFO: 655360 events read in total (13727ms).
[23:44:06.452] <TB3> INFO: Expecting 655360 events.
[23:44:20.470] <TB3> INFO: 655360 events read in total (13615ms).
[23:44:20.511] <TB3> INFO: Expecting 655360 events.
[23:44:34.578] <TB3> INFO: 655360 events read in total (13664ms).
[23:44:34.622] <TB3> INFO: Expecting 655360 events.
[23:44:48.703] <TB3> INFO: 655360 events read in total (13678ms).
[23:44:48.767] <TB3> INFO: Expecting 655360 events.
[23:45:02.864] <TB3> INFO: 655360 events read in total (13694ms).
[23:45:02.936] <TB3> INFO: Expecting 655360 events.
[23:45:17.071] <TB3> INFO: 655360 events read in total (13732ms).
[23:45:17.150] <TB3> INFO: Expecting 655360 events.
[23:45:31.272] <TB3> INFO: 655360 events read in total (13719ms).
[23:45:31.356] <TB3> INFO: Expecting 655360 events.
[23:45:45.501] <TB3> INFO: 655360 events read in total (13742ms).
[23:45:45.566] <TB3> INFO: Expecting 655360 events.
[23:45:59.673] <TB3> INFO: 655360 events read in total (13704ms).
[23:45:59.743] <TB3> INFO: Expecting 655360 events.
[23:46:13.820] <TB3> INFO: 655360 events read in total (13674ms).
[23:46:13.918] <TB3> INFO: Test took 227139ms.
[23:46:14.012] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:46:14.277] <TB3> INFO: Expecting 655360 events.
[23:46:28.542] <TB3> INFO: 655360 events read in total (13673ms).
[23:46:28.555] <TB3> INFO: Expecting 655360 events.
[23:46:42.739] <TB3> INFO: 655360 events read in total (13781ms).
[23:46:42.758] <TB3> INFO: Expecting 655360 events.
[23:46:56.738] <TB3> INFO: 655360 events read in total (13577ms).
[23:46:56.757] <TB3> INFO: Expecting 655360 events.
[23:47:10.735] <TB3> INFO: 655360 events read in total (13575ms).
[23:47:10.757] <TB3> INFO: Expecting 655360 events.
[23:47:24.431] <TB3> INFO: 655360 events read in total (13271ms).
[23:47:24.458] <TB3> INFO: Expecting 655360 events.
[23:47:38.472] <TB3> INFO: 655360 events read in total (13611ms).
[23:47:38.509] <TB3> INFO: Expecting 655360 events.
[23:47:52.524] <TB3> INFO: 655360 events read in total (13612ms).
[23:47:52.560] <TB3> INFO: Expecting 655360 events.
[23:48:06.486] <TB3> INFO: 655360 events read in total (13523ms).
[23:48:06.526] <TB3> INFO: Expecting 655360 events.
[23:48:20.617] <TB3> INFO: 655360 events read in total (13688ms).
[23:48:20.663] <TB3> INFO: Expecting 655360 events.
[23:48:34.698] <TB3> INFO: 655360 events read in total (13632ms).
[23:48:34.765] <TB3> INFO: Expecting 655360 events.
[23:48:48.724] <TB3> INFO: 655360 events read in total (13556ms).
[23:48:48.777] <TB3> INFO: Expecting 655360 events.
[23:49:02.886] <TB3> INFO: 655360 events read in total (13706ms).
[23:49:02.944] <TB3> INFO: Expecting 655360 events.
[23:49:17.095] <TB3> INFO: 655360 events read in total (13748ms).
[23:49:17.157] <TB3> INFO: Expecting 655360 events.
[23:49:31.270] <TB3> INFO: 655360 events read in total (13704ms).
[23:49:31.336] <TB3> INFO: Expecting 655360 events.
[23:49:45.276] <TB3> INFO: 655360 events read in total (13537ms).
[23:49:45.361] <TB3> INFO: Expecting 655360 events.
[23:49:59.377] <TB3> INFO: 655360 events read in total (13613ms).
[23:49:59.450] <TB3> INFO: Test took 225438ms.
[23:49:59.637] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.642] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.647] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.651] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.656] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[23:49:59.661] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[23:49:59.665] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[23:49:59.670] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[23:49:59.675] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.679] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.684] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.689] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[23:49:59.693] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[23:49:59.698] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[23:49:59.703] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.708] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.713] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.718] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.723] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.727] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.732] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.736] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.741] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.746] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.751] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.755] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.760] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[23:49:59.765] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[23:49:59.769] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[23:49:59.774] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[23:49:59.779] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[23:49:59.784] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[23:49:59.789] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.793] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.798] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.803] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.808] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.813] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[23:49:59.818] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[23:49:59.822] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[23:49:59.827] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.832] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[23:49:59.836] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[23:49:59.841] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[23:49:59.846] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[23:49:59.851] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:49:59.884] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:49:59.885] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:50:00.120] <TB3> INFO: Expecting 41600 events.
[23:50:03.266] <TB3> INFO: 41600 events read in total (2555ms).
[23:50:03.267] <TB3> INFO: Test took 3379ms.
[23:50:03.747] <TB3> INFO: Expecting 41600 events.
[23:50:06.790] <TB3> INFO: 41600 events read in total (2451ms).
[23:50:06.791] <TB3> INFO: Test took 3313ms.
[23:50:07.233] <TB3> INFO: Expecting 41600 events.
[23:50:10.337] <TB3> INFO: 41600 events read in total (2512ms).
[23:50:10.337] <TB3> INFO: Test took 3336ms.
[23:50:10.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:10.640] <TB3> INFO: Expecting 2560 events.
[23:50:11.522] <TB3> INFO: 2560 events read in total (290ms).
[23:50:11.522] <TB3> INFO: Test took 972ms.
[23:50:11.525] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:11.831] <TB3> INFO: Expecting 2560 events.
[23:50:12.713] <TB3> INFO: 2560 events read in total (290ms).
[23:50:12.713] <TB3> INFO: Test took 1188ms.
[23:50:12.715] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:13.022] <TB3> INFO: Expecting 2560 events.
[23:50:13.906] <TB3> INFO: 2560 events read in total (293ms).
[23:50:13.907] <TB3> INFO: Test took 1192ms.
[23:50:13.909] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:14.215] <TB3> INFO: Expecting 2560 events.
[23:50:15.097] <TB3> INFO: 2560 events read in total (291ms).
[23:50:15.097] <TB3> INFO: Test took 1188ms.
[23:50:15.100] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:15.406] <TB3> INFO: Expecting 2560 events.
[23:50:16.291] <TB3> INFO: 2560 events read in total (294ms).
[23:50:16.291] <TB3> INFO: Test took 1191ms.
[23:50:16.293] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:16.599] <TB3> INFO: Expecting 2560 events.
[23:50:17.486] <TB3> INFO: 2560 events read in total (295ms).
[23:50:17.487] <TB3> INFO: Test took 1194ms.
[23:50:17.489] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:17.795] <TB3> INFO: Expecting 2560 events.
[23:50:18.679] <TB3> INFO: 2560 events read in total (293ms).
[23:50:18.679] <TB3> INFO: Test took 1190ms.
[23:50:18.681] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:18.987] <TB3> INFO: Expecting 2560 events.
[23:50:19.873] <TB3> INFO: 2560 events read in total (294ms).
[23:50:19.874] <TB3> INFO: Test took 1193ms.
[23:50:19.876] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:20.182] <TB3> INFO: Expecting 2560 events.
[23:50:21.063] <TB3> INFO: 2560 events read in total (289ms).
[23:50:21.063] <TB3> INFO: Test took 1187ms.
[23:50:21.065] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:21.371] <TB3> INFO: Expecting 2560 events.
[23:50:22.251] <TB3> INFO: 2560 events read in total (288ms).
[23:50:22.251] <TB3> INFO: Test took 1186ms.
[23:50:22.253] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:22.559] <TB3> INFO: Expecting 2560 events.
[23:50:23.438] <TB3> INFO: 2560 events read in total (287ms).
[23:50:23.438] <TB3> INFO: Test took 1185ms.
[23:50:23.440] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:23.746] <TB3> INFO: Expecting 2560 events.
[23:50:24.624] <TB3> INFO: 2560 events read in total (286ms).
[23:50:24.624] <TB3> INFO: Test took 1184ms.
[23:50:24.626] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:24.932] <TB3> INFO: Expecting 2560 events.
[23:50:25.811] <TB3> INFO: 2560 events read in total (287ms).
[23:50:25.811] <TB3> INFO: Test took 1185ms.
[23:50:25.813] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:26.119] <TB3> INFO: Expecting 2560 events.
[23:50:27.003] <TB3> INFO: 2560 events read in total (292ms).
[23:50:27.003] <TB3> INFO: Test took 1190ms.
[23:50:27.005] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:27.312] <TB3> INFO: Expecting 2560 events.
[23:50:28.193] <TB3> INFO: 2560 events read in total (290ms).
[23:50:28.193] <TB3> INFO: Test took 1188ms.
[23:50:28.196] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:28.501] <TB3> INFO: Expecting 2560 events.
[23:50:29.380] <TB3> INFO: 2560 events read in total (287ms).
[23:50:29.380] <TB3> INFO: Test took 1184ms.
[23:50:29.382] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:29.689] <TB3> INFO: Expecting 2560 events.
[23:50:30.567] <TB3> INFO: 2560 events read in total (287ms).
[23:50:30.567] <TB3> INFO: Test took 1185ms.
[23:50:30.569] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:30.875] <TB3> INFO: Expecting 2560 events.
[23:50:31.754] <TB3> INFO: 2560 events read in total (287ms).
[23:50:31.754] <TB3> INFO: Test took 1185ms.
[23:50:31.756] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:32.063] <TB3> INFO: Expecting 2560 events.
[23:50:32.942] <TB3> INFO: 2560 events read in total (288ms).
[23:50:32.942] <TB3> INFO: Test took 1186ms.
[23:50:32.944] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:33.250] <TB3> INFO: Expecting 2560 events.
[23:50:34.132] <TB3> INFO: 2560 events read in total (290ms).
[23:50:34.132] <TB3> INFO: Test took 1188ms.
[23:50:34.134] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:34.441] <TB3> INFO: Expecting 2560 events.
[23:50:35.320] <TB3> INFO: 2560 events read in total (287ms).
[23:50:35.320] <TB3> INFO: Test took 1186ms.
[23:50:35.323] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:35.629] <TB3> INFO: Expecting 2560 events.
[23:50:36.508] <TB3> INFO: 2560 events read in total (288ms).
[23:50:36.508] <TB3> INFO: Test took 1185ms.
[23:50:36.510] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:36.816] <TB3> INFO: Expecting 2560 events.
[23:50:37.698] <TB3> INFO: 2560 events read in total (290ms).
[23:50:37.698] <TB3> INFO: Test took 1188ms.
[23:50:37.700] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:38.006] <TB3> INFO: Expecting 2560 events.
[23:50:38.886] <TB3> INFO: 2560 events read in total (288ms).
[23:50:38.887] <TB3> INFO: Test took 1187ms.
[23:50:38.889] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:39.195] <TB3> INFO: Expecting 2560 events.
[23:50:40.078] <TB3> INFO: 2560 events read in total (292ms).
[23:50:40.078] <TB3> INFO: Test took 1189ms.
[23:50:40.080] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:40.386] <TB3> INFO: Expecting 2560 events.
[23:50:41.269] <TB3> INFO: 2560 events read in total (291ms).
[23:50:41.270] <TB3> INFO: Test took 1190ms.
[23:50:41.271] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:41.578] <TB3> INFO: Expecting 2560 events.
[23:50:42.463] <TB3> INFO: 2560 events read in total (293ms).
[23:50:42.463] <TB3> INFO: Test took 1192ms.
[23:50:42.465] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:42.772] <TB3> INFO: Expecting 2560 events.
[23:50:43.654] <TB3> INFO: 2560 events read in total (291ms).
[23:50:43.655] <TB3> INFO: Test took 1190ms.
[23:50:43.657] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:43.963] <TB3> INFO: Expecting 2560 events.
[23:50:44.849] <TB3> INFO: 2560 events read in total (294ms).
[23:50:44.849] <TB3> INFO: Test took 1192ms.
[23:50:44.851] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:45.158] <TB3> INFO: Expecting 2560 events.
[23:50:46.041] <TB3> INFO: 2560 events read in total (292ms).
[23:50:46.041] <TB3> INFO: Test took 1190ms.
[23:50:46.043] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:46.349] <TB3> INFO: Expecting 2560 events.
[23:50:47.233] <TB3> INFO: 2560 events read in total (292ms).
[23:50:47.233] <TB3> INFO: Test took 1190ms.
[23:50:47.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:47.542] <TB3> INFO: Expecting 2560 events.
[23:50:48.426] <TB3> INFO: 2560 events read in total (293ms).
[23:50:48.426] <TB3> INFO: Test took 1191ms.
[23:50:48.890] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 632 seconds
[23:50:48.890] <TB3> INFO: PH scale (per ROC): 32 37 46 46 42 33 57 36 42 35 48 43 40 46 35 33
[23:50:48.890] <TB3> INFO: PH offset (per ROC): 90 95 101 103 94 97 120 107 111 105 96 108 103 105 99 106
[23:50:48.895] <TB3> INFO: Decoding statistics:
[23:50:48.895] <TB3> INFO: General information:
[23:50:48.895] <TB3> INFO: 16bit words read: 127880
[23:50:48.895] <TB3> INFO: valid events total: 20480
[23:50:48.895] <TB3> INFO: empty events: 17980
[23:50:48.895] <TB3> INFO: valid events with pixels: 2500
[23:50:48.895] <TB3> INFO: valid pixel hits: 2500
[23:50:48.895] <TB3> INFO: Event errors: 0
[23:50:48.895] <TB3> INFO: start marker: 0
[23:50:48.895] <TB3> INFO: stop marker: 0
[23:50:48.895] <TB3> INFO: overflow: 0
[23:50:48.895] <TB3> INFO: invalid 5bit words: 0
[23:50:48.895] <TB3> INFO: invalid XOR eye diagram: 0
[23:50:48.895] <TB3> INFO: frame (failed synchr.): 0
[23:50:48.895] <TB3> INFO: idle data (no TBM trl): 0
[23:50:48.895] <TB3> INFO: no data (only TBM hdr): 0
[23:50:48.895] <TB3> INFO: TBM errors: 0
[23:50:48.895] <TB3> INFO: flawed TBM headers: 0
[23:50:48.895] <TB3> INFO: flawed TBM trailers: 0
[23:50:48.895] <TB3> INFO: event ID mismatches: 0
[23:50:48.895] <TB3> INFO: ROC errors: 0
[23:50:48.895] <TB3> INFO: missing ROC header(s): 0
[23:50:48.895] <TB3> INFO: misplaced readback start: 0
[23:50:48.895] <TB3> INFO: Pixel decoding errors: 0
[23:50:48.895] <TB3> INFO: pixel data incomplete: 0
[23:50:48.895] <TB3> INFO: pixel address: 0
[23:50:48.895] <TB3> INFO: pulse height fill bit: 0
[23:50:48.895] <TB3> INFO: buffer corruption: 0
[23:50:49.188] <TB3> INFO: ######################################################################
[23:50:49.188] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[23:50:49.188] <TB3> INFO: ######################################################################
[23:50:49.197] <TB3> INFO: scanning low vcal = 10
[23:50:49.429] <TB3> INFO: Expecting 41600 events.
[23:50:53.029] <TB3> INFO: 41600 events read in total (3009ms).
[23:50:53.029] <TB3> INFO: Test took 3832ms.
[23:50:53.031] <TB3> INFO: scanning low vcal = 20
[23:50:53.330] <TB3> INFO: Expecting 41600 events.
[23:50:56.888] <TB3> INFO: 41600 events read in total (2967ms).
[23:50:56.889] <TB3> INFO: Test took 3858ms.
[23:50:56.890] <TB3> INFO: scanning low vcal = 30
[23:50:57.188] <TB3> INFO: Expecting 41600 events.
[23:51:00.853] <TB3> INFO: 41600 events read in total (3073ms).
[23:51:00.854] <TB3> INFO: Test took 3963ms.
[23:51:00.856] <TB3> INFO: scanning low vcal = 40
[23:51:01.137] <TB3> INFO: Expecting 41600 events.
[23:51:05.098] <TB3> INFO: 41600 events read in total (3369ms).
[23:51:05.099] <TB3> INFO: Test took 4243ms.
[23:51:05.102] <TB3> INFO: scanning low vcal = 50
[23:51:05.379] <TB3> INFO: Expecting 41600 events.
[23:51:09.337] <TB3> INFO: 41600 events read in total (3367ms).
[23:51:09.338] <TB3> INFO: Test took 4236ms.
[23:51:09.341] <TB3> INFO: scanning low vcal = 60
[23:51:09.618] <TB3> INFO: Expecting 41600 events.
[23:51:13.577] <TB3> INFO: 41600 events read in total (3368ms).
[23:51:13.577] <TB3> INFO: Test took 4236ms.
[23:51:13.580] <TB3> INFO: scanning low vcal = 70
[23:51:13.857] <TB3> INFO: Expecting 41600 events.
[23:51:17.820] <TB3> INFO: 41600 events read in total (3372ms).
[23:51:17.821] <TB3> INFO: Test took 4241ms.
[23:51:17.824] <TB3> INFO: scanning low vcal = 80
[23:51:18.100] <TB3> INFO: Expecting 41600 events.
[23:51:22.090] <TB3> INFO: 41600 events read in total (3398ms).
[23:51:22.091] <TB3> INFO: Test took 4267ms.
[23:51:22.094] <TB3> INFO: scanning low vcal = 90
[23:51:22.371] <TB3> INFO: Expecting 41600 events.
[23:51:26.361] <TB3> INFO: 41600 events read in total (3399ms).
[23:51:26.362] <TB3> INFO: Test took 4268ms.
[23:51:26.364] <TB3> INFO: scanning low vcal = 100
[23:51:26.641] <TB3> INFO: Expecting 41600 events.
[23:51:30.592] <TB3> INFO: 41600 events read in total (3359ms).
[23:51:30.593] <TB3> INFO: Test took 4228ms.
[23:51:30.596] <TB3> INFO: scanning low vcal = 110
[23:51:30.873] <TB3> INFO: Expecting 41600 events.
[23:51:34.818] <TB3> INFO: 41600 events read in total (3354ms).
[23:51:34.818] <TB3> INFO: Test took 4222ms.
[23:51:34.821] <TB3> INFO: scanning low vcal = 120
[23:51:35.097] <TB3> INFO: Expecting 41600 events.
[23:51:39.032] <TB3> INFO: 41600 events read in total (3343ms).
[23:51:39.033] <TB3> INFO: Test took 4212ms.
[23:51:39.036] <TB3> INFO: scanning low vcal = 130
[23:51:39.312] <TB3> INFO: Expecting 41600 events.
[23:51:43.303] <TB3> INFO: 41600 events read in total (3399ms).
[23:51:43.303] <TB3> INFO: Test took 4267ms.
[23:51:43.306] <TB3> INFO: scanning low vcal = 140
[23:51:43.583] <TB3> INFO: Expecting 41600 events.
[23:51:47.543] <TB3> INFO: 41600 events read in total (3368ms).
[23:51:47.544] <TB3> INFO: Test took 4238ms.
[23:51:47.547] <TB3> INFO: scanning low vcal = 150
[23:51:47.824] <TB3> INFO: Expecting 41600 events.
[23:51:51.782] <TB3> INFO: 41600 events read in total (3367ms).
[23:51:51.783] <TB3> INFO: Test took 4236ms.
[23:51:51.785] <TB3> INFO: scanning low vcal = 160
[23:51:52.062] <TB3> INFO: Expecting 41600 events.
[23:51:56.066] <TB3> INFO: 41600 events read in total (3412ms).
[23:51:56.067] <TB3> INFO: Test took 4282ms.
[23:51:56.070] <TB3> INFO: scanning low vcal = 170
[23:51:56.346] <TB3> INFO: Expecting 41600 events.
[23:52:00.311] <TB3> INFO: 41600 events read in total (3373ms).
[23:52:00.311] <TB3> INFO: Test took 4242ms.
[23:52:00.314] <TB3> INFO: scanning low vcal = 180
[23:52:00.591] <TB3> INFO: Expecting 41600 events.
[23:52:04.530] <TB3> INFO: 41600 events read in total (3347ms).
[23:52:04.531] <TB3> INFO: Test took 4216ms.
[23:52:04.533] <TB3> INFO: scanning low vcal = 190
[23:52:04.810] <TB3> INFO: Expecting 41600 events.
[23:52:08.746] <TB3> INFO: 41600 events read in total (3344ms).
[23:52:08.747] <TB3> INFO: Test took 4213ms.
[23:52:08.749] <TB3> INFO: scanning low vcal = 200
[23:52:09.026] <TB3> INFO: Expecting 41600 events.
[23:52:12.999] <TB3> INFO: 41600 events read in total (3381ms).
[23:52:12.000] <TB3> INFO: Test took 4250ms.
[23:52:13.003] <TB3> INFO: scanning low vcal = 210
[23:52:13.280] <TB3> INFO: Expecting 41600 events.
[23:52:17.265] <TB3> INFO: 41600 events read in total (3394ms).
[23:52:17.266] <TB3> INFO: Test took 4263ms.
[23:52:17.268] <TB3> INFO: scanning low vcal = 220
[23:52:17.545] <TB3> INFO: Expecting 41600 events.
[23:52:21.502] <TB3> INFO: 41600 events read in total (3365ms).
[23:52:21.503] <TB3> INFO: Test took 4235ms.
[23:52:21.505] <TB3> INFO: scanning low vcal = 230
[23:52:21.782] <TB3> INFO: Expecting 41600 events.
[23:52:25.719] <TB3> INFO: 41600 events read in total (3345ms).
[23:52:25.719] <TB3> INFO: Test took 4213ms.
[23:52:25.722] <TB3> INFO: scanning low vcal = 240
[23:52:25.999] <TB3> INFO: Expecting 41600 events.
[23:52:29.937] <TB3> INFO: 41600 events read in total (3347ms).
[23:52:29.938] <TB3> INFO: Test took 4216ms.
[23:52:29.941] <TB3> INFO: scanning low vcal = 250
[23:52:30.217] <TB3> INFO: Expecting 41600 events.
[23:52:34.150] <TB3> INFO: 41600 events read in total (3341ms).
[23:52:34.151] <TB3> INFO: Test took 4210ms.
[23:52:34.154] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[23:52:34.430] <TB3> INFO: Expecting 41600 events.
[23:52:38.426] <TB3> INFO: 41600 events read in total (3404ms).
[23:52:38.427] <TB3> INFO: Test took 4272ms.
[23:52:38.430] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[23:52:38.707] <TB3> INFO: Expecting 41600 events.
[23:52:42.639] <TB3> INFO: 41600 events read in total (3341ms).
[23:52:42.640] <TB3> INFO: Test took 4210ms.
[23:52:42.643] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[23:52:42.919] <TB3> INFO: Expecting 41600 events.
[23:52:46.856] <TB3> INFO: 41600 events read in total (3345ms).
[23:52:46.857] <TB3> INFO: Test took 4214ms.
[23:52:46.860] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[23:52:47.137] <TB3> INFO: Expecting 41600 events.
[23:52:51.097] <TB3> INFO: 41600 events read in total (3369ms).
[23:52:51.098] <TB3> INFO: Test took 4238ms.
[23:52:51.101] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[23:52:51.377] <TB3> INFO: Expecting 41600 events.
[23:52:55.319] <TB3> INFO: 41600 events read in total (3350ms).
[23:52:55.320] <TB3> INFO: Test took 4219ms.
[23:52:55.773] <TB3> INFO: PixTestGainPedestal::measure() done
[23:53:37.794] <TB3> INFO: PixTestGainPedestal::fit() done
[23:53:37.794] <TB3> INFO: non-linearity mean: 0.994 0.926 0.951 0.951 0.952 0.992 0.988 0.954 0.958 0.936 0.956 0.938 0.938 0.967 0.917 0.979
[23:53:37.794] <TB3> INFO: non-linearity RMS: 0.168 0.117 0.043 0.050 0.059 0.162 0.003 0.154 0.071 0.144 0.057 0.098 0.070 0.016 0.128 0.171
[23:53:37.795] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[23:53:37.809] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[23:53:37.824] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[23:53:37.838] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[23:53:37.854] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[23:53:37.870] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[23:53:37.887] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[23:53:37.907] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[23:53:37.927] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[23:53:37.947] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[23:53:37.962] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[23:53:37.981] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[23:53:37.999] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[23:53:38.020] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[23:53:38.041] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[23:53:38.061] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[23:53:38.077] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 168 seconds
[23:53:38.077] <TB3> INFO: Decoding statistics:
[23:53:38.077] <TB3> INFO: General information:
[23:53:38.077] <TB3> INFO: 16bit words read: 3304628
[23:53:38.077] <TB3> INFO: valid events total: 332800
[23:53:38.077] <TB3> INFO: empty events: 831
[23:53:38.077] <TB3> INFO: valid events with pixels: 331969
[23:53:38.077] <TB3> INFO: valid pixel hits: 653914
[23:53:38.077] <TB3> INFO: Event errors: 0
[23:53:38.077] <TB3> INFO: start marker: 0
[23:53:38.077] <TB3> INFO: stop marker: 0
[23:53:38.077] <TB3> INFO: overflow: 0
[23:53:38.077] <TB3> INFO: invalid 5bit words: 0
[23:53:38.077] <TB3> INFO: invalid XOR eye diagram: 0
[23:53:38.077] <TB3> INFO: frame (failed synchr.): 0
[23:53:38.077] <TB3> INFO: idle data (no TBM trl): 0
[23:53:38.077] <TB3> INFO: no data (only TBM hdr): 0
[23:53:38.077] <TB3> INFO: TBM errors: 0
[23:53:38.077] <TB3> INFO: flawed TBM headers: 0
[23:53:38.077] <TB3> INFO: flawed TBM trailers: 0
[23:53:38.077] <TB3> INFO: event ID mismatches: 0
[23:53:38.077] <TB3> INFO: ROC errors: 0
[23:53:38.077] <TB3> INFO: missing ROC header(s): 0
[23:53:38.077] <TB3> INFO: misplaced readback start: 0
[23:53:38.077] <TB3> INFO: Pixel decoding errors: 0
[23:53:38.077] <TB3> INFO: pixel data incomplete: 0
[23:53:38.077] <TB3> INFO: pixel address: 0
[23:53:38.077] <TB3> INFO: pulse height fill bit: 0
[23:53:38.077] <TB3> INFO: buffer corruption: 0
[23:53:38.096] <TB3> INFO: Decoding statistics:
[23:53:38.096] <TB3> INFO: General information:
[23:53:38.096] <TB3> INFO: 16bit words read: 3434044
[23:53:38.096] <TB3> INFO: valid events total: 353536
[23:53:38.096] <TB3> INFO: empty events: 19067
[23:53:38.096] <TB3> INFO: valid events with pixels: 334469
[23:53:38.096] <TB3> INFO: valid pixel hits: 656414
[23:53:38.097] <TB3> INFO: Event errors: 0
[23:53:38.097] <TB3> INFO: start marker: 0
[23:53:38.097] <TB3> INFO: stop marker: 0
[23:53:38.097] <TB3> INFO: overflow: 0
[23:53:38.097] <TB3> INFO: invalid 5bit words: 0
[23:53:38.097] <TB3> INFO: invalid XOR eye diagram: 0
[23:53:38.097] <TB3> INFO: frame (failed synchr.): 0
[23:53:38.097] <TB3> INFO: idle data (no TBM trl): 0
[23:53:38.097] <TB3> INFO: no data (only TBM hdr): 0
[23:53:38.097] <TB3> INFO: TBM errors: 0
[23:53:38.097] <TB3> INFO: flawed TBM headers: 0
[23:53:38.097] <TB3> INFO: flawed TBM trailers: 0
[23:53:38.097] <TB3> INFO: event ID mismatches: 0
[23:53:38.097] <TB3> INFO: ROC errors: 0
[23:53:38.097] <TB3> INFO: missing ROC header(s): 0
[23:53:38.097] <TB3> INFO: misplaced readback start: 0
[23:53:38.097] <TB3> INFO: Pixel decoding errors: 0
[23:53:38.097] <TB3> INFO: pixel data incomplete: 0
[23:53:38.097] <TB3> INFO: pixel address: 0
[23:53:38.097] <TB3> INFO: pulse height fill bit: 0
[23:53:38.097] <TB3> INFO: buffer corruption: 0
[23:53:38.097] <TB3> INFO: enter test to run
[23:53:38.097] <TB3> INFO: test: Trim80 no parameter change
[23:53:38.097] <TB3> INFO: running: trim80
[23:53:38.120] <TB3> INFO: ######################################################################
[23:53:38.120] <TB3> INFO: PixTestTrim80::doTest()
[23:53:38.120] <TB3> INFO: ######################################################################
[23:53:38.121] <TB3> INFO: ----------------------------------------------------------------------
[23:53:38.121] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[23:53:38.121] <TB3> INFO: ----------------------------------------------------------------------
[23:53:38.162] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[23:53:38.162] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:53:38.172] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:53:38.172] <TB3> INFO: run 1 of 1
[23:53:38.406] <TB3> INFO: Expecting 5025280 events.
[23:54:06.124] <TB3> INFO: 682104 events read in total (27126ms).
[23:54:33.371] <TB3> INFO: 1360832 events read in total (54373ms).
[23:55:00.353] <TB3> INFO: 2037184 events read in total (81356ms).
[23:55:27.598] <TB3> INFO: 2712896 events read in total (108600ms).
[23:55:54.670] <TB3> INFO: 3387080 events read in total (135672ms).
[23:56:21.680] <TB3> INFO: 4059688 events read in total (162682ms).
[23:56:48.716] <TB3> INFO: 4731544 events read in total (189718ms).
[23:57:00.686] <TB3> INFO: 5025280 events read in total (201688ms).
[23:57:00.765] <TB3> INFO: Test took 202593ms.
[23:57:24.402] <TB3> INFO: ROC 0 VthrComp = 84
[23:57:24.403] <TB3> INFO: ROC 1 VthrComp = 74
[23:57:24.403] <TB3> INFO: ROC 2 VthrComp = 77
[23:57:24.403] <TB3> INFO: ROC 3 VthrComp = 68
[23:57:24.403] <TB3> INFO: ROC 4 VthrComp = 75
[23:57:24.403] <TB3> INFO: ROC 5 VthrComp = 81
[23:57:24.403] <TB3> INFO: ROC 6 VthrComp = 72
[23:57:24.403] <TB3> INFO: ROC 7 VthrComp = 73
[23:57:24.404] <TB3> INFO: ROC 8 VthrComp = 75
[23:57:24.404] <TB3> INFO: ROC 9 VthrComp = 65
[23:57:24.404] <TB3> INFO: ROC 10 VthrComp = 72
[23:57:24.404] <TB3> INFO: ROC 11 VthrComp = 83
[23:57:24.404] <TB3> INFO: ROC 12 VthrComp = 75
[23:57:24.404] <TB3> INFO: ROC 13 VthrComp = 77
[23:57:24.404] <TB3> INFO: ROC 14 VthrComp = 82
[23:57:24.404] <TB3> INFO: ROC 15 VthrComp = 79
[23:57:24.663] <TB3> INFO: Expecting 41600 events.
[23:57:28.100] <TB3> INFO: 41600 events read in total (2842ms).
[23:57:28.101] <TB3> INFO: Test took 3695ms.
[23:57:28.111] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:57:28.111] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:57:28.122] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[23:57:28.122] <TB3> INFO: run 1 of 1
[23:57:28.401] <TB3> INFO: Expecting 5025280 events.
[23:57:56.306] <TB3> INFO: 686224 events read in total (27314ms).
[23:58:23.429] <TB3> INFO: 1369504 events read in total (54437ms).
[23:58:50.175] <TB3> INFO: 2051896 events read in total (81183ms).
[23:59:17.077] <TB3> INFO: 2731008 events read in total (108085ms).
[23:59:44.202] <TB3> INFO: 3408000 events read in total (135210ms).
[00:00:11.431] <TB3> INFO: 4083272 events read in total (162439ms).
[00:00:39.082] <TB3> INFO: 4757528 events read in total (190090ms).
[00:00:50.242] <TB3> INFO: 5025280 events read in total (201250ms).
[00:00:50.290] <TB3> INFO: Test took 202168ms.
[00:01:14.340] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 104.674 for pixel 8/4 mean/min/max = 90.1254/75.3992/104.851
[00:01:14.340] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 109.827 for pixel 45/0 mean/min/max = 93.8946/77.8886/109.901
[00:01:14.340] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 112.714 for pixel 0/20 mean/min/max = 95.1007/77.4355/112.766
[00:01:14.341] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 109.18 for pixel 0/27 mean/min/max = 91.5504/73.8843/109.217
[00:01:14.341] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 107.116 for pixel 46/14 mean/min/max = 92.7926/78.1129/107.472
[00:01:14.342] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 105.651 for pixel 7/24 mean/min/max = 90.5344/75.3519/105.717
[00:01:14.342] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 107.197 for pixel 51/71 mean/min/max = 91.8018/76.275/107.329
[00:01:14.342] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 108.57 for pixel 1/71 mean/min/max = 93.4013/78.1621/108.641
[00:01:14.343] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 112.711 for pixel 0/23 mean/min/max = 95.3164/77.8031/112.83
[00:01:14.343] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 107.609 for pixel 51/3 mean/min/max = 91.4095/74.9984/107.821
[00:01:14.343] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 111.409 for pixel 0/37 mean/min/max = 94.4877/77.3614/111.614
[00:01:14.344] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 107.16 for pixel 51/3 mean/min/max = 90.8363/74.2312/107.441
[00:01:14.344] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 110.011 for pixel 14/6 mean/min/max = 93.4057/76.6973/110.114
[00:01:14.345] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 109.257 for pixel 0/24 mean/min/max = 93.4787/77.6539/109.303
[00:01:14.345] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 108.601 for pixel 2/74 mean/min/max = 91.7998/74.9733/108.626
[00:01:14.345] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 111.606 for pixel 0/19 mean/min/max = 94.5979/77.5778/111.618
[00:01:14.346] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:01:14.434] <TB3> INFO: Expecting 411648 events.
[00:01:23.668] <TB3> INFO: 411648 events read in total (8642ms).
[00:01:23.674] <TB3> INFO: Expecting 411648 events.
[00:01:32.702] <TB3> INFO: 411648 events read in total (8625ms).
[00:01:32.712] <TB3> INFO: Expecting 411648 events.
[00:01:41.775] <TB3> INFO: 411648 events read in total (8660ms).
[00:01:41.787] <TB3> INFO: Expecting 411648 events.
[00:01:50.845] <TB3> INFO: 411648 events read in total (8655ms).
[00:01:50.860] <TB3> INFO: Expecting 411648 events.
[00:01:59.969] <TB3> INFO: 411648 events read in total (8706ms).
[00:01:59.986] <TB3> INFO: Expecting 411648 events.
[00:02:09.053] <TB3> INFO: 411648 events read in total (8664ms).
[00:02:09.078] <TB3> INFO: Expecting 411648 events.
[00:02:18.119] <TB3> INFO: 411648 events read in total (8638ms).
[00:02:18.147] <TB3> INFO: Expecting 411648 events.
[00:02:27.270] <TB3> INFO: 411648 events read in total (8719ms).
[00:02:27.296] <TB3> INFO: Expecting 411648 events.
[00:02:36.317] <TB3> INFO: 411648 events read in total (8618ms).
[00:02:36.344] <TB3> INFO: Expecting 411648 events.
[00:02:45.455] <TB3> INFO: 411648 events read in total (8708ms).
[00:02:45.499] <TB3> INFO: Expecting 411648 events.
[00:02:54.585] <TB3> INFO: 411648 events read in total (8683ms).
[00:02:54.628] <TB3> INFO: Expecting 411648 events.
[00:03:03.623] <TB3> INFO: 411648 events read in total (8592ms).
[00:03:03.659] <TB3> INFO: Expecting 411648 events.
[00:03:12.743] <TB3> INFO: 411648 events read in total (8681ms).
[00:03:12.783] <TB3> INFO: Expecting 411648 events.
[00:03:21.901] <TB3> INFO: 411648 events read in total (8715ms).
[00:03:21.942] <TB3> INFO: Expecting 411648 events.
[00:03:31.038] <TB3> INFO: 411648 events read in total (8693ms).
[00:03:31.083] <TB3> INFO: Expecting 411648 events.
[00:03:40.216] <TB3> INFO: 411648 events read in total (8730ms).
[00:03:40.264] <TB3> INFO: Test took 145918ms.
[00:03:41.960] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[00:03:41.971] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:03:41.971] <TB3> INFO: run 1 of 1
[00:03:42.203] <TB3> INFO: Expecting 5025280 events.
[00:04:09.471] <TB3> INFO: 665304 events read in total (26676ms).
[00:04:36.245] <TB3> INFO: 1328968 events read in total (53450ms).
[00:05:02.760] <TB3> INFO: 1991928 events read in total (79965ms).
[00:05:29.572] <TB3> INFO: 2652552 events read in total (106777ms).
[00:05:56.241] <TB3> INFO: 3309680 events read in total (133446ms).
[00:06:23.152] <TB3> INFO: 3965600 events read in total (160357ms).
[00:06:49.973] <TB3> INFO: 4620752 events read in total (187178ms).
[00:07:06.502] <TB3> INFO: 5025280 events read in total (203707ms).
[00:07:06.553] <TB3> INFO: Test took 204582ms.
[00:07:32.101] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 53.269207 .. 99.225262
[00:07:32.335] <TB3> INFO: Expecting 208000 events.
[00:07:42.163] <TB3> INFO: 208000 events read in total (9236ms).
[00:07:42.164] <TB3> INFO: Test took 10062ms.
[00:07:42.209] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 43 .. 109 (-1/-1) hits flags = 528 (plus default)
[00:07:42.218] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:07:42.218] <TB3> INFO: run 1 of 1
[00:07:42.495] <TB3> INFO: Expecting 2229760 events.
[00:08:10.600] <TB3> INFO: 694768 events read in total (27513ms).
[00:08:38.195] <TB3> INFO: 1385216 events read in total (55108ms).
[00:09:06.008] <TB3> INFO: 2069400 events read in total (82921ms).
[00:09:13.084] <TB3> INFO: 2229760 events read in total (89997ms).
[00:09:13.117] <TB3> INFO: Test took 90899ms.
[00:09:31.190] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 64.181947 .. 87.562217
[00:09:31.424] <TB3> INFO: Expecting 208000 events.
[00:09:41.451] <TB3> INFO: 208000 events read in total (9435ms).
[00:09:41.452] <TB3> INFO: Test took 10261ms.
[00:09:41.516] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 54 .. 97 (-1/-1) hits flags = 528 (plus default)
[00:09:41.528] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:09:41.528] <TB3> INFO: run 1 of 1
[00:09:41.805] <TB3> INFO: Expecting 1464320 events.
[00:10:10.331] <TB3> INFO: 705744 events read in total (27934ms).
[00:10:38.861] <TB3> INFO: 1410816 events read in total (56464ms).
[00:10:41.321] <TB3> INFO: 1464320 events read in total (58925ms).
[00:10:41.345] <TB3> INFO: Test took 59818ms.
[00:10:58.799] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 68.479726 .. 83.277505
[00:10:59.073] <TB3> INFO: Expecting 208000 events.
[00:11:09.075] <TB3> INFO: 208000 events read in total (9410ms).
[00:11:09.076] <TB3> INFO: Test took 10276ms.
[00:11:09.123] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 58 .. 93 (-1/-1) hits flags = 528 (plus default)
[00:11:09.133] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:11:09.133] <TB3> INFO: run 1 of 1
[00:11:09.411] <TB3> INFO: Expecting 1198080 events.
[00:11:38.735] <TB3> INFO: 715304 events read in total (28733ms).
[00:11:57.927] <TB3> INFO: 1198080 events read in total (47926ms).
[00:11:57.949] <TB3> INFO: Test took 48816ms.
[00:12:13.490] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 71.682047 .. 83.040613
[00:12:13.724] <TB3> INFO: Expecting 208000 events.
[00:12:24.057] <TB3> INFO: 208000 events read in total (9741ms).
[00:12:24.058] <TB3> INFO: Test took 10567ms.
[00:12:24.113] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 61 .. 93 (-1/-1) hits flags = 528 (plus default)
[00:12:24.124] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:12:24.124] <TB3> INFO: run 1 of 1
[00:12:24.402] <TB3> INFO: Expecting 1098240 events.
[00:12:53.499] <TB3> INFO: 704280 events read in total (28506ms).
[00:13:09.481] <TB3> INFO: 1098240 events read in total (44488ms).
[00:13:09.507] <TB3> INFO: Test took 45384ms.
[00:13:26.309] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[00:13:26.309] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:13:26.320] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[00:13:26.320] <TB3> INFO: run 1 of 1
[00:13:26.606] <TB3> INFO: Expecting 1364480 events.
[00:13:54.010] <TB3> INFO: 668392 events read in total (26803ms).
[00:14:21.273] <TB3> INFO: 1336584 events read in total (54066ms).
[00:14:22.989] <TB3> INFO: 1364480 events read in total (55782ms).
[00:14:23.009] <TB3> INFO: Test took 56689ms.
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C0.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C1.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C2.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C3.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C4.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C5.dat
[00:14:39.513] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C6.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C7.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C8.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C9.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C10.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C11.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C12.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C13.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C14.dat
[00:14:39.514] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C15.dat
[00:14:39.514] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C0.dat
[00:14:39.523] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C1.dat
[00:14:39.531] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C2.dat
[00:14:39.539] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C3.dat
[00:14:39.547] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C4.dat
[00:14:39.555] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C5.dat
[00:14:39.563] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C6.dat
[00:14:39.571] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C7.dat
[00:14:39.579] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C8.dat
[00:14:39.587] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C9.dat
[00:14:39.595] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C10.dat
[00:14:39.604] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C11.dat
[00:14:39.612] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C12.dat
[00:14:39.620] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C13.dat
[00:14:39.628] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C14.dat
[00:14:39.636] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1140_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C15.dat
[00:14:39.644] <TB3> INFO: PixTestTrim80::trimTest() done
[00:14:39.644] <TB3> INFO: vtrim: 122 124 120 89 104 99 102 103 123 92 106 113 110 111 119 99
[00:14:39.644] <TB3> INFO: vthrcomp: 84 74 77 68 75 81 72 73 75 65 72 83 75 77 82 79
[00:14:39.644] <TB3> INFO: vcal mean: 79.97 79.94 79.96 79.97 79.96 79.99 79.93 79.97 80.00 79.96 79.96 79.96 80.00 79.96 79.99 80.00
[00:14:39.644] <TB3> INFO: vcal RMS: 0.77 0.78 0.80 0.71 0.73 0.73 1.43 0.72 0.78 0.73 0.77 0.78 0.78 0.71 0.76 0.76
[00:14:39.644] <TB3> INFO: bits mean: 10.90 10.03 9.78 9.89 9.83 10.21 9.89 9.66 9.59 10.10 9.67 10.52 9.89 9.26 10.22 8.99
[00:14:39.644] <TB3> INFO: bits RMS: 2.01 2.04 2.08 2.61 2.05 2.32 2.29 2.09 2.13 2.34 2.17 2.28 2.18 2.31 2.30 2.39
[00:14:39.650] <TB3> INFO: ----------------------------------------------------------------------
[00:14:39.650] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[00:14:39.650] <TB3> INFO: ----------------------------------------------------------------------
[00:14:39.653] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:14:39.662] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[00:14:39.662] <TB3> INFO: run 1 of 1
[00:14:39.896] <TB3> INFO: Expecting 4160000 events.
[00:15:12.164] <TB3> INFO: 767020 events read in total (31677ms).
[00:15:43.407] <TB3> INFO: 1526925 events read in total (62920ms).
[00:16:14.455] <TB3> INFO: 2280595 events read in total (93968ms).
[00:16:45.459] <TB3> INFO: 3028280 events read in total (124972ms).
[00:17:16.656] <TB3> INFO: 3773910 events read in total (156169ms).
[00:17:33.023] <TB3> INFO: 4160000 events read in total (172536ms).
[00:17:33.084] <TB3> INFO: Test took 173421ms.
[00:18:00.401] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[00:18:00.412] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[00:18:00.412] <TB3> INFO: run 1 of 1
[00:18:00.644] <TB3> INFO: Expecting 4388800 events.
[00:18:32.038] <TB3> INFO: 727390 events read in total (30803ms).
[00:19:02.863] <TB3> INFO: 1449440 events read in total (61628ms).
[00:19:33.503] <TB3> INFO: 2167505 events read in total (92268ms).
[00:20:03.677] <TB3> INFO: 2880610 events read in total (122442ms).
[00:20:34.129] <TB3> INFO: 3591090 events read in total (152894ms).
[00:21:04.661] <TB3> INFO: 4302145 events read in total (183426ms).
[00:21:08.752] <TB3> INFO: 4388800 events read in total (187517ms).
[00:21:08.810] <TB3> INFO: Test took 188397ms.
[00:21:37.138] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[00:21:37.148] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[00:21:37.148] <TB3> INFO: run 1 of 1
[00:21:37.382] <TB3> INFO: Expecting 4118400 events.
[00:22:09.167] <TB3> INFO: 745735 events read in total (31194ms).
[00:22:40.394] <TB3> INFO: 1484870 events read in total (62421ms).
[00:23:11.420] <TB3> INFO: 2219055 events read in total (93447ms).
[00:23:42.306] <TB3> INFO: 2948070 events read in total (124333ms).
[00:24:13.107] <TB3> INFO: 3675245 events read in total (155134ms).
[00:24:31.829] <TB3> INFO: 4118400 events read in total (173856ms).
[00:24:31.897] <TB3> INFO: Test took 174748ms.
[00:24:58.501] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[00:24:58.511] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[00:24:58.511] <TB3> INFO: run 1 of 1
[00:24:58.754] <TB3> INFO: Expecting 4076800 events.
[00:25:30.866] <TB3> INFO: 748960 events read in total (31521ms).
[00:26:01.812] <TB3> INFO: 1491400 events read in total (62467ms).
[00:26:32.858] <TB3> INFO: 2228060 events read in total (93514ms).
[00:27:03.439] <TB3> INFO: 2959590 events read in total (124094ms).
[00:27:34.345] <TB3> INFO: 3689590 events read in total (155000ms).
[00:27:51.170] <TB3> INFO: 4076800 events read in total (171825ms).
[00:27:51.218] <TB3> INFO: Test took 172708ms.
[00:28:18.598] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[00:28:18.609] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[00:28:18.609] <TB3> INFO: run 1 of 1
[00:28:18.885] <TB3> INFO: Expecting 4139200 events.
[00:28:51.782] <TB3> INFO: 744675 events read in total (32305ms).
[00:29:22.637] <TB3> INFO: 1482570 events read in total (63160ms).
[00:29:53.412] <TB3> INFO: 2215570 events read in total (93935ms).
[00:30:24.112] <TB3> INFO: 2943580 events read in total (124635ms).
[00:30:55.052] <TB3> INFO: 3669615 events read in total (155575ms).
[00:31:15.345] <TB3> INFO: 4139200 events read in total (175868ms).
[00:31:15.413] <TB3> INFO: Test took 176804ms.
[00:31:44.805] <TB3> INFO: PixTestTrim80::trimBitTest() done
[00:31:44.807] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2286 seconds
[00:31:45.437] <TB3> INFO: enter test to run
[00:31:45.437] <TB3> INFO: test: exit no parameter change
[00:31:45.533] <TB3> QUIET: Connection to board 170 closed.
[00:31:45.533] <TB3> INFO: pXar: this is the end, my friend