[20:48:29.575] <TB2> INFO: *** Welcome to pxar ***
[20:48:29.575] <TB2> INFO: *** Today: 2016/11/07
[20:48:29.581] <TB2> INFO: *** Version: c8ba-dirty
[20:48:29.581] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C15.dat
[20:48:29.582] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1b.dat
[20:48:29.582] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//defaultMaskFile.dat
[20:48:29.582] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters_C15.dat
[20:48:29.638] <TB2> INFO: clk: 4
[20:48:29.638] <TB2> INFO: ctr: 4
[20:48:29.638] <TB2> INFO: sda: 19
[20:48:29.638] <TB2> INFO: tin: 9
[20:48:29.638] <TB2> INFO: level: 15
[20:48:29.638] <TB2> INFO: triggerdelay: 0
[20:48:29.638] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[20:48:29.638] <TB2> INFO: Log level: INFO
[20:48:29.646] <TB2> INFO: Found DTB DTB_WXC55Z
[20:48:29.657] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[20:48:29.659] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[20:48:29.661] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[20:48:31.171] <TB2> INFO: DUT info:
[20:48:31.172] <TB2> INFO: The DUT currently contains the following objects:
[20:48:31.172] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[20:48:31.172] <TB2> INFO: TBM Core alpha (0): 7 registers set
[20:48:31.172] <TB2> INFO: TBM Core beta (1): 7 registers set
[20:48:31.172] <TB2> INFO: TBM Core alpha (2): 7 registers set
[20:48:31.172] <TB2> INFO: TBM Core beta (3): 7 registers set
[20:48:31.172] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:48:31.172] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.172] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:31.573] <TB2> INFO: enter 'restricted' command line mode
[20:48:31.573] <TB2> INFO: enter test to run
[20:48:31.573] <TB2> INFO: test: pretest no parameter change
[20:48:31.573] <TB2> INFO: running: pretest
[20:48:32.147] <TB2> INFO: ######################################################################
[20:48:32.148] <TB2> INFO: PixTestPretest::doTest()
[20:48:32.148] <TB2> INFO: ######################################################################
[20:48:32.149] <TB2> INFO: ----------------------------------------------------------------------
[20:48:32.149] <TB2> INFO: PixTestPretest::programROC()
[20:48:32.149] <TB2> INFO: ----------------------------------------------------------------------
[20:48:50.161] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:48:50.161] <TB2> INFO: IA differences per ROC: 20.1 19.3 20.1 19.3 20.1 20.9 17.7 20.9 16.9 20.1 19.3 16.9 19.3 17.7 18.5 20.9
[20:48:50.195] <TB2> INFO: ----------------------------------------------------------------------
[20:48:50.195] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:48:50.195] <TB2> INFO: ----------------------------------------------------------------------
[20:49:11.444] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 394.7 mA = 24.6687 mA/ROC
[20:49:11.444] <TB2> INFO: i(loss) [mA/ROC]: 20.9 18.5 20.1 20.9 20.1 20.1 19.3 19.3 19.3 20.9 20.9 20.1 18.5 20.1 19.3 20.9
[20:49:11.472] <TB2> INFO: ----------------------------------------------------------------------
[20:49:11.472] <TB2> INFO: PixTestPretest::findTiming()
[20:49:11.472] <TB2> INFO: ----------------------------------------------------------------------
[20:49:11.472] <TB2> INFO: PixTestCmd::init()

[20:49:42.571] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:49:42.571] <TB2> INFO: (success/tries = 100/100), width = 3
[20:49:44.063] <TB2> INFO: ----------------------------------------------------------------------
[20:49:44.063] <TB2> INFO: PixTestPretest::findWorkingPixel()
[20:49:44.063] <TB2> INFO: ----------------------------------------------------------------------
[20:49:44.154] <TB2> INFO: Expecting 231680 events.
[20:49:53.812] <TB2> INFO: 231680 events read in total (9066ms).
[20:49:53.821] <TB2> INFO: Test took 9756ms.
[20:49:54.065] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:49:54.093] <TB2> INFO: ----------------------------------------------------------------------
[20:49:54.093] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[20:49:54.093] <TB2> INFO: ----------------------------------------------------------------------
[20:49:54.185] <TB2> INFO: Expecting 231680 events.
[20:50:03.858] <TB2> INFO: 231680 events read in total (9081ms).
[20:50:03.866] <TB2> INFO: Test took 9769ms.
[20:50:04.125] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[20:50:04.125] <TB2> INFO: CalDel: 101 107 100 107 97 111 111 111 100 105 94 100 112 111 119 111
[20:50:04.125] <TB2> INFO: VthrComp: 51 51 51 52 51 51 51 54 52 51 51 51 52 51 52 51
[20:50:04.127] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C0.dat
[20:50:04.127] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C1.dat
[20:50:04.127] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C2.dat
[20:50:04.127] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C3.dat
[20:50:04.127] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C4.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C5.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C6.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C7.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C8.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C9.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C10.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C11.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C12.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C13.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C14.dat
[20:50:04.128] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C15.dat
[20:50:04.128] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0a.dat
[20:50:04.128] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0b.dat
[20:50:04.129] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1a.dat
[20:50:04.129] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1b.dat
[20:50:04.129] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[20:50:04.226] <TB2> INFO: enter test to run
[20:50:04.226] <TB2> INFO: test: FullTest no parameter change
[20:50:04.226] <TB2> INFO: running: fulltest
[20:50:04.226] <TB2> INFO: ######################################################################
[20:50:04.226] <TB2> INFO: PixTestFullTest::doTest()
[20:50:04.226] <TB2> INFO: ######################################################################
[20:50:04.227] <TB2> INFO: ######################################################################
[20:50:04.227] <TB2> INFO: PixTestAlive::doTest()
[20:50:04.227] <TB2> INFO: ######################################################################
[20:50:04.228] <TB2> INFO: ----------------------------------------------------------------------
[20:50:04.228] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:50:04.228] <TB2> INFO: ----------------------------------------------------------------------
[20:50:04.464] <TB2> INFO: Expecting 41600 events.
[20:50:07.997] <TB2> INFO: 41600 events read in total (2941ms).
[20:50:07.998] <TB2> INFO: Test took 3768ms.
[20:50:08.224] <TB2> INFO: PixTestAlive::aliveTest() done
[20:50:08.224] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:50:08.225] <TB2> INFO: ----------------------------------------------------------------------
[20:50:08.225] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:50:08.225] <TB2> INFO: ----------------------------------------------------------------------
[20:50:08.493] <TB2> INFO: Expecting 41600 events.
[20:50:11.407] <TB2> INFO: 41600 events read in total (2322ms).
[20:50:11.408] <TB2> INFO: Test took 3182ms.
[20:50:11.408] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:50:11.647] <TB2> INFO: PixTestAlive::maskTest() done
[20:50:11.647] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:50:11.648] <TB2> INFO: ----------------------------------------------------------------------
[20:50:11.648] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:50:11.648] <TB2> INFO: ----------------------------------------------------------------------
[20:50:11.881] <TB2> INFO: Expecting 41600 events.
[20:50:15.383] <TB2> INFO: 41600 events read in total (2911ms).
[20:50:15.384] <TB2> INFO: Test took 3735ms.
[20:50:15.611] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[20:50:15.611] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:50:15.611] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:50:15.611] <TB2> INFO: Decoding statistics:
[20:50:15.611] <TB2> INFO: General information:
[20:50:15.611] <TB2> INFO: 16bit words read: 0
[20:50:15.611] <TB2> INFO: valid events total: 0
[20:50:15.611] <TB2> INFO: empty events: 0
[20:50:15.611] <TB2> INFO: valid events with pixels: 0
[20:50:15.611] <TB2> INFO: valid pixel hits: 0
[20:50:15.611] <TB2> INFO: Event errors: 0
[20:50:15.611] <TB2> INFO: start marker: 0
[20:50:15.611] <TB2> INFO: stop marker: 0
[20:50:15.611] <TB2> INFO: overflow: 0
[20:50:15.612] <TB2> INFO: invalid 5bit words: 0
[20:50:15.612] <TB2> INFO: invalid XOR eye diagram: 0
[20:50:15.612] <TB2> INFO: frame (failed synchr.): 0
[20:50:15.612] <TB2> INFO: idle data (no TBM trl): 0
[20:50:15.612] <TB2> INFO: no data (only TBM hdr): 0
[20:50:15.612] <TB2> INFO: TBM errors: 0
[20:50:15.612] <TB2> INFO: flawed TBM headers: 0
[20:50:15.612] <TB2> INFO: flawed TBM trailers: 0
[20:50:15.612] <TB2> INFO: event ID mismatches: 0
[20:50:15.612] <TB2> INFO: ROC errors: 0
[20:50:15.612] <TB2> INFO: missing ROC header(s): 0
[20:50:15.612] <TB2> INFO: misplaced readback start: 0
[20:50:15.612] <TB2> INFO: Pixel decoding errors: 0
[20:50:15.612] <TB2> INFO: pixel data incomplete: 0
[20:50:15.612] <TB2> INFO: pixel address: 0
[20:50:15.612] <TB2> INFO: pulse height fill bit: 0
[20:50:15.612] <TB2> INFO: buffer corruption: 0
[20:50:15.619] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:50:15.619] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[20:50:15.619] <TB2> INFO: ######################################################################
[20:50:15.619] <TB2> INFO: PixTestReadback::doTest()
[20:50:15.619] <TB2> INFO: ######################################################################
[20:50:15.619] <TB2> INFO: ----------------------------------------------------------------------
[20:50:15.619] <TB2> INFO: PixTestReadback::CalibrateVd()
[20:50:15.619] <TB2> INFO: ----------------------------------------------------------------------
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:50:25.573] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:50:25.574] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:50:25.574] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:50:25.600] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:50:25.600] <TB2> INFO: ----------------------------------------------------------------------
[20:50:25.601] <TB2> INFO: PixTestReadback::CalibrateVa()
[20:50:25.601] <TB2> INFO: ----------------------------------------------------------------------
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:50:35.492] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:50:35.493] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:50:35.521] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:50:35.521] <TB2> INFO: ----------------------------------------------------------------------
[20:50:35.521] <TB2> INFO: PixTestReadback::readbackVbg()
[20:50:35.521] <TB2> INFO: ----------------------------------------------------------------------
[20:50:43.160] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:50:43.160] <TB2> INFO: ----------------------------------------------------------------------
[20:50:43.160] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[20:50:43.160] <TB2> INFO: ----------------------------------------------------------------------
[20:50:43.161] <TB2> INFO: Vbg will be calibrated using Vd calibration
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 149.4calibrated Vbg = 1.16754 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.9calibrated Vbg = 1.15801 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152calibrated Vbg = 1.15911 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149calibrated Vbg = 1.15825 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159calibrated Vbg = 1.15868 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.8calibrated Vbg = 1.16313 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.4calibrated Vbg = 1.16219 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.8calibrated Vbg = 1.16278 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156.8calibrated Vbg = 1.15744 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 162calibrated Vbg = 1.15792 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.6calibrated Vbg = 1.15136 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 146.8calibrated Vbg = 1.14194 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.1calibrated Vbg = 1.14836 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 145.7calibrated Vbg = 1.15634 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 148.1calibrated Vbg = 1.16281 :::*/*/*/*/
[20:50:43.161] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 143.8calibrated Vbg = 1.16084 :::*/*/*/*/
[20:50:43.163] <TB2> INFO: ----------------------------------------------------------------------
[20:50:43.163] <TB2> INFO: PixTestReadback::CalibrateIa()
[20:50:43.163] <TB2> INFO: ----------------------------------------------------------------------
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:53:23.435] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:53:23.436] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:53:23.436] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:53:23.436] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:53:23.436] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:53:23.436] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:53:23.463] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[20:53:23.464] <TB2> INFO: PixTestReadback::doTest() done
[20:53:23.464] <TB2> INFO: Decoding statistics:
[20:53:23.464] <TB2> INFO: General information:
[20:53:23.464] <TB2> INFO: 16bit words read: 1536
[20:53:23.464] <TB2> INFO: valid events total: 256
[20:53:23.464] <TB2> INFO: empty events: 256
[20:53:23.464] <TB2> INFO: valid events with pixels: 0
[20:53:23.464] <TB2> INFO: valid pixel hits: 0
[20:53:23.464] <TB2> INFO: Event errors: 0
[20:53:23.464] <TB2> INFO: start marker: 0
[20:53:23.464] <TB2> INFO: stop marker: 0
[20:53:23.464] <TB2> INFO: overflow: 0
[20:53:23.464] <TB2> INFO: invalid 5bit words: 0
[20:53:23.464] <TB2> INFO: invalid XOR eye diagram: 0
[20:53:23.464] <TB2> INFO: frame (failed synchr.): 0
[20:53:23.464] <TB2> INFO: idle data (no TBM trl): 0
[20:53:23.464] <TB2> INFO: no data (only TBM hdr): 0
[20:53:23.464] <TB2> INFO: TBM errors: 0
[20:53:23.464] <TB2> INFO: flawed TBM headers: 0
[20:53:23.464] <TB2> INFO: flawed TBM trailers: 0
[20:53:23.464] <TB2> INFO: event ID mismatches: 0
[20:53:23.464] <TB2> INFO: ROC errors: 0
[20:53:23.464] <TB2> INFO: missing ROC header(s): 0
[20:53:23.464] <TB2> INFO: misplaced readback start: 0
[20:53:23.464] <TB2> INFO: Pixel decoding errors: 0
[20:53:23.464] <TB2> INFO: pixel data incomplete: 0
[20:53:23.464] <TB2> INFO: pixel address: 0
[20:53:23.464] <TB2> INFO: pulse height fill bit: 0
[20:53:23.464] <TB2> INFO: buffer corruption: 0
[20:53:23.498] <TB2> INFO: ######################################################################
[20:53:23.498] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:53:23.498] <TB2> INFO: ######################################################################
[20:53:23.502] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:53:23.513] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:53:23.513] <TB2> INFO: run 1 of 1
[20:53:23.744] <TB2> INFO: Expecting 3120000 events.
[20:53:53.603] <TB2> INFO: 655720 events read in total (29267ms).











[20:54:23.246] <TB2> INFO: 1314270 events read in total (58910ms).





















[20:54:52.996] <TB2> INFO: 1969435 events read in total (88660ms).











[20:55:22.660] <TB2> INFO: 2625430 events read in total (118324ms).











[20:55:44.845] <TB2> INFO: 3120000 events read in total (140509ms).
[20:55:44.931] <TB2> INFO: Test took 141419ms.
[20:56:11.186] <TB2> INFO: PixTestBBMap::doTest() done with 30 decoding errors: , duration: 167 seconds
[20:56:11.186] <TB2> INFO: number of dead bumps (per ROC): 0 0 1 1 0 0 0 0 0 0 0 0 3 1 3 2
[20:56:11.186] <TB2> INFO: separation cut (per ROC): 108 3370 98 113 106 117 102 106 99 108 107 99 107 108 108 109
[20:56:11.186] <TB2> INFO: Decoding statistics:
[20:56:11.186] <TB2> INFO: General information:
[20:56:11.186] <TB2> INFO: 16bit words read: 0
[20:56:11.186] <TB2> INFO: valid events total: 0
[20:56:11.186] <TB2> INFO: empty events: 0
[20:56:11.186] <TB2> INFO: valid events with pixels: 0
[20:56:11.186] <TB2> INFO: valid pixel hits: 0
[20:56:11.186] <TB2> INFO: Event errors: 0
[20:56:11.186] <TB2> INFO: start marker: 0
[20:56:11.186] <TB2> INFO: stop marker: 0
[20:56:11.186] <TB2> INFO: overflow: 0
[20:56:11.186] <TB2> INFO: invalid 5bit words: 0
[20:56:11.186] <TB2> INFO: invalid XOR eye diagram: 0
[20:56:11.186] <TB2> INFO: frame (failed synchr.): 0
[20:56:11.186] <TB2> INFO: idle data (no TBM trl): 0
[20:56:11.186] <TB2> INFO: no data (only TBM hdr): 0
[20:56:11.186] <TB2> INFO: TBM errors: 0
[20:56:11.186] <TB2> INFO: flawed TBM headers: 0
[20:56:11.186] <TB2> INFO: flawed TBM trailers: 0
[20:56:11.186] <TB2> INFO: event ID mismatches: 0
[20:56:11.186] <TB2> INFO: ROC errors: 0
[20:56:11.186] <TB2> INFO: missing ROC header(s): 0
[20:56:11.186] <TB2> INFO: misplaced readback start: 0
[20:56:11.186] <TB2> INFO: Pixel decoding errors: 0
[20:56:11.186] <TB2> INFO: pixel data incomplete: 0
[20:56:11.186] <TB2> INFO: pixel address: 0
[20:56:11.186] <TB2> INFO: pulse height fill bit: 0
[20:56:11.186] <TB2> INFO: buffer corruption: 0
[20:56:11.252] <TB2> INFO: ######################################################################
[20:56:11.252] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:56:11.252] <TB2> INFO: ######################################################################
[20:56:11.252] <TB2> INFO: ----------------------------------------------------------------------
[20:56:11.252] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:56:11.252] <TB2> INFO: ----------------------------------------------------------------------
[20:56:11.252] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[20:56:11.262] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[20:56:11.262] <TB2> INFO: run 1 of 1
[20:56:11.498] <TB2> INFO: Expecting 36608000 events.
[20:56:34.605] <TB2> INFO: 667800 events read in total (22516ms).
[20:56:57.083] <TB2> INFO: 1328800 events read in total (44994ms).
[20:57:19.566] <TB2> INFO: 1987900 events read in total (67477ms).
[20:57:42.208] <TB2> INFO: 2647350 events read in total (90119ms).
[20:58:04.793] <TB2> INFO: 3305300 events read in total (112704ms).
[20:58:27.536] <TB2> INFO: 3965100 events read in total (135447ms).
[20:58:50.114] <TB2> INFO: 4623650 events read in total (158025ms).
[20:59:12.673] <TB2> INFO: 5281500 events read in total (180584ms).
[20:59:35.122] <TB2> INFO: 5938450 events read in total (203033ms).
[20:59:57.838] <TB2> INFO: 6596100 events read in total (225749ms).
[21:00:20.393] <TB2> INFO: 7252800 events read in total (248304ms).
[21:00:42.923] <TB2> INFO: 7908100 events read in total (270834ms).
[21:01:05.192] <TB2> INFO: 8565200 events read in total (293103ms).
[21:01:27.873] <TB2> INFO: 9220850 events read in total (315784ms).
[21:01:50.308] <TB2> INFO: 9878000 events read in total (338219ms).
[21:02:13.049] <TB2> INFO: 10531450 events read in total (360960ms).
[21:02:35.696] <TB2> INFO: 11188600 events read in total (383607ms).
[21:02:57.976] <TB2> INFO: 11841100 events read in total (405887ms).
[21:03:20.556] <TB2> INFO: 12493850 events read in total (428467ms).
[21:03:43.325] <TB2> INFO: 13147200 events read in total (451236ms).
[21:04:05.724] <TB2> INFO: 13802300 events read in total (473635ms).
[21:04:28.058] <TB2> INFO: 14455650 events read in total (495969ms).
[21:04:50.157] <TB2> INFO: 15108450 events read in total (518068ms).
[21:05:12.571] <TB2> INFO: 15760900 events read in total (540482ms).
[21:05:35.228] <TB2> INFO: 16414250 events read in total (563139ms).
[21:05:57.646] <TB2> INFO: 17067650 events read in total (585557ms).
[21:06:19.906] <TB2> INFO: 17719200 events read in total (607817ms).
[21:06:42.142] <TB2> INFO: 18371050 events read in total (630053ms).
[21:07:04.427] <TB2> INFO: 19020550 events read in total (652338ms).
[21:07:26.997] <TB2> INFO: 19670700 events read in total (674908ms).
[21:07:49.466] <TB2> INFO: 20317850 events read in total (697377ms).
[21:08:11.975] <TB2> INFO: 20969100 events read in total (719886ms).
[21:08:34.330] <TB2> INFO: 21619500 events read in total (742241ms).
[21:08:56.721] <TB2> INFO: 22268900 events read in total (764632ms).
[21:09:18.916] <TB2> INFO: 22916650 events read in total (786827ms).
[21:09:41.344] <TB2> INFO: 23565650 events read in total (809255ms).
[21:10:03.836] <TB2> INFO: 24216300 events read in total (831747ms).
[21:10:26.239] <TB2> INFO: 24866000 events read in total (854150ms).
[21:10:48.735] <TB2> INFO: 25516900 events read in total (876646ms).
[21:11:11.009] <TB2> INFO: 26166350 events read in total (898920ms).
[21:11:33.293] <TB2> INFO: 26817300 events read in total (921204ms).
[21:11:55.584] <TB2> INFO: 27464250 events read in total (943495ms).
[21:12:17.758] <TB2> INFO: 28113300 events read in total (965669ms).
[21:12:39.787] <TB2> INFO: 28762100 events read in total (987698ms).
[21:13:01.959] <TB2> INFO: 29411200 events read in total (1009870ms).
[21:13:24.394] <TB2> INFO: 30059400 events read in total (1032305ms).
[21:13:46.707] <TB2> INFO: 30709850 events read in total (1054618ms).
[21:14:08.972] <TB2> INFO: 31357650 events read in total (1076883ms).
[21:14:31.079] <TB2> INFO: 32006500 events read in total (1098990ms).
[21:14:53.425] <TB2> INFO: 32656350 events read in total (1121336ms).
[21:15:15.550] <TB2> INFO: 33306000 events read in total (1143461ms).
[21:15:38.027] <TB2> INFO: 33957350 events read in total (1165938ms).
[21:16:00.442] <TB2> INFO: 34608700 events read in total (1188354ms).
[21:16:23.088] <TB2> INFO: 35259100 events read in total (1210999ms).
[21:16:45.422] <TB2> INFO: 35910300 events read in total (1233333ms).
[21:17:07.999] <TB2> INFO: 36572000 events read in total (1255910ms).
[21:17:09.647] <TB2> INFO: 36608000 events read in total (1257558ms).
[21:17:09.703] <TB2> INFO: Test took 1258441ms.
[21:17:10.161] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:11.648] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:13.322] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:14.858] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:16.280] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:18.004] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:19.841] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:21.819] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:23.628] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:26.098] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:28.075] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:30.077] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:32.121] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:33.962] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:35.658] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:37.538] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[21:17:39.470] <TB2> INFO: PixTestScurves::scurves() done
[21:17:39.470] <TB2> INFO: Vcal mean: 113.16 99.09 102.72 120.23 115.39 117.92 112.83 119.98 115.15 120.71 115.85 107.42 117.33 116.18 123.81 116.50
[21:17:39.470] <TB2> INFO: Vcal RMS: 4.85 5.50 5.05 5.71 5.14 5.63 5.20 6.00 5.89 6.28 5.54 5.02 5.72 5.36 6.03 5.23
[21:17:39.470] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1288 seconds
[21:17:39.470] <TB2> INFO: Decoding statistics:
[21:17:39.470] <TB2> INFO: General information:
[21:17:39.470] <TB2> INFO: 16bit words read: 0
[21:17:39.470] <TB2> INFO: valid events total: 0
[21:17:39.471] <TB2> INFO: empty events: 0
[21:17:39.471] <TB2> INFO: valid events with pixels: 0
[21:17:39.471] <TB2> INFO: valid pixel hits: 0
[21:17:39.471] <TB2> INFO: Event errors: 0
[21:17:39.471] <TB2> INFO: start marker: 0
[21:17:39.471] <TB2> INFO: stop marker: 0
[21:17:39.471] <TB2> INFO: overflow: 0
[21:17:39.471] <TB2> INFO: invalid 5bit words: 0
[21:17:39.471] <TB2> INFO: invalid XOR eye diagram: 0
[21:17:39.471] <TB2> INFO: frame (failed synchr.): 0
[21:17:39.471] <TB2> INFO: idle data (no TBM trl): 0
[21:17:39.471] <TB2> INFO: no data (only TBM hdr): 0
[21:17:39.471] <TB2> INFO: TBM errors: 0
[21:17:39.471] <TB2> INFO: flawed TBM headers: 0
[21:17:39.471] <TB2> INFO: flawed TBM trailers: 0
[21:17:39.471] <TB2> INFO: event ID mismatches: 0
[21:17:39.471] <TB2> INFO: ROC errors: 0
[21:17:39.471] <TB2> INFO: missing ROC header(s): 0
[21:17:39.471] <TB2> INFO: misplaced readback start: 0
[21:17:39.471] <TB2> INFO: Pixel decoding errors: 0
[21:17:39.471] <TB2> INFO: pixel data incomplete: 0
[21:17:39.471] <TB2> INFO: pixel address: 0
[21:17:39.471] <TB2> INFO: pulse height fill bit: 0
[21:17:39.471] <TB2> INFO: buffer corruption: 0
[21:17:39.540] <TB2> INFO: ######################################################################
[21:17:39.540] <TB2> INFO: PixTestTrim::doTest()
[21:17:39.540] <TB2> INFO: ######################################################################
[21:17:39.542] <TB2> INFO: ----------------------------------------------------------------------
[21:17:39.542] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[21:17:39.542] <TB2> INFO: ----------------------------------------------------------------------
[21:17:39.583] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:17:39.583] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:17:39.593] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:17:39.593] <TB2> INFO: run 1 of 1
[21:17:39.827] <TB2> INFO: Expecting 5025280 events.
[21:18:09.879] <TB2> INFO: 823824 events read in total (29459ms).
[21:18:39.469] <TB2> INFO: 1645896 events read in total (59049ms).
[21:19:09.459] <TB2> INFO: 2467720 events read in total (89039ms).
[21:19:39.249] <TB2> INFO: 3284184 events read in total (118829ms).
[21:20:09.259] <TB2> INFO: 4099040 events read in total (148839ms).
[21:20:38.839] <TB2> INFO: 4913448 events read in total (178419ms).
[21:20:43.409] <TB2> INFO: 5025280 events read in total (182989ms).
[21:20:43.453] <TB2> INFO: Test took 183860ms.
[21:21:00.300] <TB2> INFO: ROC 0 VthrComp = 128
[21:21:00.300] <TB2> INFO: ROC 1 VthrComp = 94
[21:21:00.300] <TB2> INFO: ROC 2 VthrComp = 109
[21:21:00.300] <TB2> INFO: ROC 3 VthrComp = 121
[21:21:00.300] <TB2> INFO: ROC 4 VthrComp = 120
[21:21:00.300] <TB2> INFO: ROC 5 VthrComp = 126
[21:21:00.301] <TB2> INFO: ROC 6 VthrComp = 115
[21:21:00.301] <TB2> INFO: ROC 7 VthrComp = 123
[21:21:00.301] <TB2> INFO: ROC 8 VthrComp = 119
[21:21:00.301] <TB2> INFO: ROC 9 VthrComp = 126
[21:21:00.301] <TB2> INFO: ROC 10 VthrComp = 124
[21:21:00.301] <TB2> INFO: ROC 11 VthrComp = 115
[21:21:00.301] <TB2> INFO: ROC 12 VthrComp = 115
[21:21:00.301] <TB2> INFO: ROC 13 VthrComp = 124
[21:21:00.301] <TB2> INFO: ROC 14 VthrComp = 130
[21:21:00.301] <TB2> INFO: ROC 15 VthrComp = 128
[21:21:00.536] <TB2> INFO: Expecting 41600 events.
[21:21:04.031] <TB2> INFO: 41600 events read in total (2904ms).
[21:21:04.032] <TB2> INFO: Test took 3729ms.
[21:21:04.041] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:21:04.041] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:21:04.051] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:21:04.051] <TB2> INFO: run 1 of 1
[21:21:04.329] <TB2> INFO: Expecting 5025280 events.
[21:21:30.143] <TB2> INFO: 589568 events read in total (25222ms).
[21:21:55.686] <TB2> INFO: 1178424 events read in total (50765ms).
[21:22:21.276] <TB2> INFO: 1767368 events read in total (76355ms).
[21:22:46.604] <TB2> INFO: 2356272 events read in total (101683ms).
[21:23:11.826] <TB2> INFO: 2943360 events read in total (126905ms).
[21:23:36.816] <TB2> INFO: 3528968 events read in total (151895ms).
[21:24:02.063] <TB2> INFO: 4113512 events read in total (177142ms).
[21:24:27.553] <TB2> INFO: 4697352 events read in total (202632ms).
[21:24:42.123] <TB2> INFO: 5025280 events read in total (217202ms).
[21:24:42.195] <TB2> INFO: Test took 218144ms.
[21:25:07.584] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 57.1264 for pixel 13/79 mean/min/max = 44.7688/32.3785/57.1591
[21:25:07.584] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 66.348 for pixel 8/53 mean/min/max = 52.3215/38.0002/66.6428
[21:25:07.585] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.1349 for pixel 33/5 mean/min/max = 46.7524/34.1891/59.3157
[21:25:07.585] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 64.5515 for pixel 21/24 mean/min/max = 49.9572/35.2918/64.6226
[21:25:07.585] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.1733 for pixel 1/72 mean/min/max = 46.546/32.7778/60.3143
[21:25:07.586] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.1051 for pixel 17/16 mean/min/max = 45.1872/31.1635/59.2109
[21:25:07.586] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.5858 for pixel 29/14 mean/min/max = 46.2271/31.8592/60.595
[21:25:07.586] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.2188 for pixel 51/79 mean/min/max = 46.7575/32.2255/61.2896
[21:25:07.586] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 62.0792 for pixel 0/13 mean/min/max = 46.6302/30.7425/62.518
[21:25:07.587] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.5931 for pixel 0/2 mean/min/max = 45.7218/30.7166/60.7271
[21:25:07.587] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.7439 for pixel 27/28 mean/min/max = 46.3173/31.5347/61.0999
[21:25:07.587] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.8846 for pixel 14/9 mean/min/max = 44.7668/31.579/57.9546
[21:25:07.588] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.4174 for pixel 15/71 mean/min/max = 46.5172/31.3733/61.661
[21:25:07.588] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.9804 for pixel 0/57 mean/min/max = 45.6535/32.2239/59.0831
[21:25:07.588] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 60.4663 for pixel 9/6 mean/min/max = 46.3823/32.2572/60.5074
[21:25:07.588] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.0752 for pixel 0/8 mean/min/max = 44.5477/30.9629/58.1325
[21:25:07.589] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:25:07.677] <TB2> INFO: Expecting 411648 events.
[21:25:16.965] <TB2> INFO: 411648 events read in total (8696ms).
[21:25:16.974] <TB2> INFO: Expecting 411648 events.
[21:25:26.028] <TB2> INFO: 411648 events read in total (8651ms).
[21:25:26.040] <TB2> INFO: Expecting 411648 events.
[21:25:35.145] <TB2> INFO: 411648 events read in total (8702ms).
[21:25:35.158] <TB2> INFO: Expecting 411648 events.
[21:25:44.293] <TB2> INFO: 411648 events read in total (8732ms).
[21:25:44.308] <TB2> INFO: Expecting 411648 events.
[21:25:53.363] <TB2> INFO: 411648 events read in total (8652ms).
[21:25:53.380] <TB2> INFO: Expecting 411648 events.
[21:26:02.469] <TB2> INFO: 411648 events read in total (8686ms).
[21:26:02.489] <TB2> INFO: Expecting 411648 events.
[21:26:11.543] <TB2> INFO: 411648 events read in total (8651ms).
[21:26:11.566] <TB2> INFO: Expecting 411648 events.
[21:26:20.568] <TB2> INFO: 411648 events read in total (8599ms).
[21:26:20.591] <TB2> INFO: Expecting 411648 events.
[21:26:29.597] <TB2> INFO: 411648 events read in total (8603ms).
[21:26:29.623] <TB2> INFO: Expecting 411648 events.
[21:26:38.656] <TB2> INFO: 411648 events read in total (8630ms).
[21:26:38.686] <TB2> INFO: Expecting 411648 events.
[21:26:47.825] <TB2> INFO: 411648 events read in total (8736ms).
[21:26:47.857] <TB2> INFO: Expecting 411648 events.
[21:26:56.959] <TB2> INFO: 411648 events read in total (8699ms).
[21:26:57.004] <TB2> INFO: Expecting 411648 events.
[21:27:06.069] <TB2> INFO: 411648 events read in total (8662ms).
[21:27:06.106] <TB2> INFO: Expecting 411648 events.
[21:27:15.159] <TB2> INFO: 411648 events read in total (8650ms).
[21:27:15.198] <TB2> INFO: Expecting 411648 events.
[21:27:24.286] <TB2> INFO: 411648 events read in total (8685ms).
[21:27:24.333] <TB2> INFO: Expecting 411648 events.
[21:27:33.402] <TB2> INFO: 411648 events read in total (8666ms).
[21:27:33.458] <TB2> INFO: Test took 145869ms.
[21:27:34.230] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:27:34.240] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:27:34.240] <TB2> INFO: run 1 of 1
[21:27:34.473] <TB2> INFO: Expecting 5025280 events.
[21:28:00.308] <TB2> INFO: 584416 events read in total (25244ms).
[21:28:25.737] <TB2> INFO: 1167432 events read in total (50673ms).
[21:28:50.895] <TB2> INFO: 1749176 events read in total (75832ms).
[21:29:16.458] <TB2> INFO: 2331208 events read in total (101394ms).
[21:29:41.352] <TB2> INFO: 2911808 events read in total (126288ms).
[21:30:06.523] <TB2> INFO: 3491576 events read in total (151459ms).
[21:30:31.529] <TB2> INFO: 4070240 events read in total (176465ms).
[21:30:57.070] <TB2> INFO: 4649760 events read in total (202006ms).
[21:31:13.547] <TB2> INFO: 5025280 events read in total (218483ms).
[21:31:13.635] <TB2> INFO: Test took 219396ms.
[21:31:36.843] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.034748 .. 147.105969
[21:31:37.130] <TB2> INFO: Expecting 208000 events.
[21:31:46.606] <TB2> INFO: 208000 events read in total (8884ms).
[21:31:46.607] <TB2> INFO: Test took 9762ms.
[21:31:46.654] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[21:31:46.664] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:31:46.664] <TB2> INFO: run 1 of 1
[21:31:46.942] <TB2> INFO: Expecting 5258240 events.
[21:32:12.630] <TB2> INFO: 584936 events read in total (25096ms).
[21:32:37.997] <TB2> INFO: 1170032 events read in total (50463ms).
[21:33:03.478] <TB2> INFO: 1754640 events read in total (75944ms).
[21:33:28.645] <TB2> INFO: 2339968 events read in total (101111ms).
[21:33:53.902] <TB2> INFO: 2924744 events read in total (126368ms).
[21:34:19.140] <TB2> INFO: 3509208 events read in total (151606ms).
[21:34:44.614] <TB2> INFO: 4092512 events read in total (177080ms).
[21:35:09.930] <TB2> INFO: 4676288 events read in total (202396ms).
[21:35:35.271] <TB2> INFO: 5258240 events read in total (227737ms).
[21:35:35.339] <TB2> INFO: Test took 228676ms.
[21:36:01.537] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.919034 .. 44.935785
[21:36:01.781] <TB2> INFO: Expecting 208000 events.
[21:36:11.681] <TB2> INFO: 208000 events read in total (9309ms).
[21:36:11.682] <TB2> INFO: Test took 10144ms.
[21:36:11.739] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 54 (-1/-1) hits flags = 528 (plus default)
[21:36:11.751] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:36:11.751] <TB2> INFO: run 1 of 1
[21:36:12.029] <TB2> INFO: Expecting 1297920 events.
[21:36:40.335] <TB2> INFO: 666528 events read in total (27715ms).
[21:37:06.363] <TB2> INFO: 1297920 events read in total (53744ms).
[21:37:06.399] <TB2> INFO: Test took 54649ms.
[21:37:19.682] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 26.608088 .. 48.187038
[21:37:19.958] <TB2> INFO: Expecting 208000 events.
[21:37:29.737] <TB2> INFO: 208000 events read in total (9187ms).
[21:37:29.738] <TB2> INFO: Test took 10055ms.
[21:37:29.784] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[21:37:29.795] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:37:29.795] <TB2> INFO: run 1 of 1
[21:37:30.072] <TB2> INFO: Expecting 1431040 events.
[21:37:58.120] <TB2> INFO: 651744 events read in total (27456ms).
[21:38:25.047] <TB2> INFO: 1302440 events read in total (54383ms).
[21:38:30.958] <TB2> INFO: 1431040 events read in total (60294ms).
[21:38:30.990] <TB2> INFO: Test took 61196ms.
[21:38:44.472] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.397174 .. 49.806517
[21:38:44.707] <TB2> INFO: Expecting 208000 events.
[21:38:54.359] <TB2> INFO: 208000 events read in total (9061ms).
[21:38:54.360] <TB2> INFO: Test took 9887ms.
[21:38:54.406] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 59 (-1/-1) hits flags = 528 (plus default)
[21:38:54.416] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:38:54.416] <TB2> INFO: run 1 of 1
[21:38:54.694] <TB2> INFO: Expecting 1497600 events.
[21:39:22.895] <TB2> INFO: 651880 events read in total (27609ms).
[21:39:50.078] <TB2> INFO: 1303384 events read in total (54792ms).
[21:39:58.388] <TB2> INFO: 1497600 events read in total (63102ms).
[21:39:58.416] <TB2> INFO: Test took 64000ms.
[21:40:13.788] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:40:13.788] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:40:13.797] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[21:40:13.797] <TB2> INFO: run 1 of 1
[21:40:14.032] <TB2> INFO: Expecting 1364480 events.
[21:40:41.884] <TB2> INFO: 667000 events read in total (27260ms).
[21:41:09.318] <TB2> INFO: 1332880 events read in total (54694ms).
[21:41:11.005] <TB2> INFO: 1364480 events read in total (56381ms).
[21:41:11.037] <TB2> INFO: Test took 57241ms.
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C0.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C1.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C2.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C3.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C4.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C5.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C6.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C7.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C8.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C9.dat
[21:41:24.916] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C10.dat
[21:41:24.917] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C11.dat
[21:41:24.917] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C12.dat
[21:41:24.917] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C13.dat
[21:41:24.917] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C14.dat
[21:41:24.917] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C15.dat
[21:41:24.917] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C0.dat
[21:41:24.923] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C1.dat
[21:41:24.928] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C2.dat
[21:41:24.936] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C3.dat
[21:41:24.945] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C4.dat
[21:41:24.954] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C5.dat
[21:41:24.962] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C6.dat
[21:41:24.971] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C7.dat
[21:41:24.980] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C8.dat
[21:41:24.988] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C9.dat
[21:41:24.997] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C10.dat
[21:41:25.006] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C11.dat
[21:41:25.014] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C12.dat
[21:41:25.023] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C13.dat
[21:41:25.032] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C14.dat
[21:41:25.041] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C15.dat
[21:41:25.049] <TB2> INFO: PixTestTrim::trimTest() done
[21:41:25.049] <TB2> INFO: vtrim: 135 142 130 160 150 143 135 117 128 138 165 139 115 122 135 119
[21:41:25.049] <TB2> INFO: vthrcomp: 128 94 109 121 120 126 115 123 119 126 124 115 115 124 130 128
[21:41:25.049] <TB2> INFO: vcal mean: 34.94 34.97 35.03 35.04 35.02 34.90 35.00 35.00 34.91 34.93 34.95 34.94 35.00 34.94 34.95 34.93
[21:41:25.049] <TB2> INFO: vcal RMS: 1.03 1.40 0.99 1.43 1.17 1.16 1.11 1.09 1.11 1.16 1.20 1.05 1.26 0.99 1.14 1.10
[21:41:25.049] <TB2> INFO: bits mean: 9.91 8.61 8.97 9.41 10.08 10.22 9.93 9.17 9.40 9.72 9.82 10.48 10.04 9.19 9.75 9.82
[21:41:25.049] <TB2> INFO: bits RMS: 2.53 1.97 2.56 2.10 2.34 2.50 2.50 2.73 2.83 2.72 2.61 2.35 2.46 2.83 2.54 2.77
[21:41:25.057] <TB2> INFO: ----------------------------------------------------------------------
[21:41:25.057] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:41:25.057] <TB2> INFO: ----------------------------------------------------------------------
[21:41:25.059] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:41:25.069] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:41:25.069] <TB2> INFO: run 1 of 1
[21:41:25.303] <TB2> INFO: Expecting 4160000 events.
[21:41:56.977] <TB2> INFO: 741605 events read in total (31083ms).
[21:42:28.052] <TB2> INFO: 1476525 events read in total (62158ms).
[21:42:58.624] <TB2> INFO: 2206720 events read in total (92730ms).
[21:43:29.454] <TB2> INFO: 2933300 events read in total (123560ms).
[21:44:00.298] <TB2> INFO: 3659415 events read in total (154404ms).
[21:44:21.804] <TB2> INFO: 4160000 events read in total (175910ms).
[21:44:21.868] <TB2> INFO: Test took 176799ms.
[21:44:49.469] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[21:44:49.480] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:44:49.481] <TB2> INFO: run 1 of 1
[21:44:49.714] <TB2> INFO: Expecting 4097600 events.
[21:45:21.056] <TB2> INFO: 721300 events read in total (30750ms).
[21:45:51.651] <TB2> INFO: 1436750 events read in total (61345ms).
[21:46:21.859] <TB2> INFO: 2147805 events read in total (91553ms).
[21:46:51.875] <TB2> INFO: 2855460 events read in total (121569ms).
[21:47:22.907] <TB2> INFO: 3562595 events read in total (152601ms).
[21:47:46.802] <TB2> INFO: 4097600 events read in total (176496ms).
[21:47:46.859] <TB2> INFO: Test took 177378ms.
[21:48:16.196] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[21:48:16.208] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:48:16.208] <TB2> INFO: run 1 of 1
[21:48:16.484] <TB2> INFO: Expecting 3952000 events.
[21:48:47.744] <TB2> INFO: 731110 events read in total (30668ms).
[21:49:18.133] <TB2> INFO: 1455335 events read in total (61057ms).
[21:49:48.340] <TB2> INFO: 2175070 events read in total (91265ms).
[21:50:19.012] <TB2> INFO: 2891910 events read in total (121936ms).
[21:50:49.828] <TB2> INFO: 3607900 events read in total (152752ms).
[21:51:04.549] <TB2> INFO: 3952000 events read in total (167473ms).
[21:51:04.598] <TB2> INFO: Test took 168390ms.
[21:51:30.060] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[21:51:30.071] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:51:30.071] <TB2> INFO: run 1 of 1
[21:51:30.303] <TB2> INFO: Expecting 3931200 events.
[21:52:01.476] <TB2> INFO: 732550 events read in total (30582ms).
[21:52:31.908] <TB2> INFO: 1458095 events read in total (61014ms).
[21:53:02.609] <TB2> INFO: 2178895 events read in total (91715ms).
[21:53:33.006] <TB2> INFO: 2896890 events read in total (122112ms).
[21:54:04.199] <TB2> INFO: 3614055 events read in total (153305ms).
[21:54:17.002] <TB2> INFO: 3931200 events read in total (167108ms).
[21:54:18.056] <TB2> INFO: Test took 167985ms.
[21:54:43.201] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 189 (-1/-1) hits flags = 528 (plus default)
[21:54:43.211] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[21:54:43.211] <TB2> INFO: run 1 of 1
[21:54:43.443] <TB2> INFO: Expecting 3952000 events.
[21:55:14.723] <TB2> INFO: 731000 events read in total (30688ms).
[21:55:45.276] <TB2> INFO: 1455130 events read in total (61241ms).
[21:56:15.869] <TB2> INFO: 2174485 events read in total (91834ms).
[21:56:47.111] <TB2> INFO: 2891285 events read in total (123076ms).
[21:57:17.947] <TB2> INFO: 3606995 events read in total (153912ms).
[21:57:32.585] <TB2> INFO: 3952000 events read in total (168550ms).
[21:57:32.636] <TB2> INFO: Test took 169424ms.
[21:57:57.536] <TB2> INFO: PixTestTrim::trimBitTest() done
[21:57:57.537] <TB2> INFO: PixTestTrim::doTest() done, duration: 2417 seconds
[21:57:57.537] <TB2> INFO: Decoding statistics:
[21:57:57.538] <TB2> INFO: General information:
[21:57:57.538] <TB2> INFO: 16bit words read: 0
[21:57:57.538] <TB2> INFO: valid events total: 0
[21:57:57.538] <TB2> INFO: empty events: 0
[21:57:57.538] <TB2> INFO: valid events with pixels: 0
[21:57:57.538] <TB2> INFO: valid pixel hits: 0
[21:57:57.538] <TB2> INFO: Event errors: 0
[21:57:57.538] <TB2> INFO: start marker: 0
[21:57:57.538] <TB2> INFO: stop marker: 0
[21:57:57.538] <TB2> INFO: overflow: 0
[21:57:57.538] <TB2> INFO: invalid 5bit words: 0
[21:57:57.538] <TB2> INFO: invalid XOR eye diagram: 0
[21:57:57.538] <TB2> INFO: frame (failed synchr.): 0
[21:57:57.538] <TB2> INFO: idle data (no TBM trl): 0
[21:57:57.538] <TB2> INFO: no data (only TBM hdr): 0
[21:57:57.538] <TB2> INFO: TBM errors: 0
[21:57:57.538] <TB2> INFO: flawed TBM headers: 0
[21:57:57.538] <TB2> INFO: flawed TBM trailers: 0
[21:57:57.538] <TB2> INFO: event ID mismatches: 0
[21:57:57.538] <TB2> INFO: ROC errors: 0
[21:57:57.538] <TB2> INFO: missing ROC header(s): 0
[21:57:57.538] <TB2> INFO: misplaced readback start: 0
[21:57:57.538] <TB2> INFO: Pixel decoding errors: 0
[21:57:57.538] <TB2> INFO: pixel data incomplete: 0
[21:57:57.538] <TB2> INFO: pixel address: 0
[21:57:57.538] <TB2> INFO: pulse height fill bit: 0
[21:57:57.538] <TB2> INFO: buffer corruption: 0
[21:57:58.185] <TB2> INFO: ######################################################################
[21:57:58.185] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:57:58.185] <TB2> INFO: ######################################################################
[21:57:58.422] <TB2> INFO: Expecting 41600 events.
[21:58:01.827] <TB2> INFO: 41600 events read in total (2813ms).
[21:58:01.827] <TB2> INFO: Test took 3640ms.
[21:58:02.303] <TB2> INFO: Expecting 41600 events.
[21:58:05.784] <TB2> INFO: 41600 events read in total (2889ms).
[21:58:05.784] <TB2> INFO: Test took 3754ms.
[21:58:06.072] <TB2> INFO: Expecting 41600 events.
[21:58:09.556] <TB2> INFO: 41600 events read in total (2892ms).
[21:58:09.557] <TB2> INFO: Test took 3750ms.
[21:58:09.845] <TB2> INFO: Expecting 41600 events.
[21:58:13.468] <TB2> INFO: 41600 events read in total (3031ms).
[21:58:13.469] <TB2> INFO: Test took 3889ms.
[21:58:13.757] <TB2> INFO: Expecting 41600 events.
[21:58:17.342] <TB2> INFO: 41600 events read in total (2993ms).
[21:58:17.343] <TB2> INFO: Test took 3850ms.
[21:58:17.631] <TB2> INFO: Expecting 41600 events.
[21:58:21.212] <TB2> INFO: 41600 events read in total (2989ms).
[21:58:21.213] <TB2> INFO: Test took 3847ms.
[21:58:21.503] <TB2> INFO: Expecting 41600 events.
[21:58:25.025] <TB2> INFO: 41600 events read in total (2930ms).
[21:58:25.026] <TB2> INFO: Test took 3787ms.
[21:58:25.314] <TB2> INFO: Expecting 41600 events.
[21:58:28.824] <TB2> INFO: 41600 events read in total (2918ms).
[21:58:28.825] <TB2> INFO: Test took 3775ms.
[21:58:29.113] <TB2> INFO: Expecting 41600 events.
[21:58:32.634] <TB2> INFO: 41600 events read in total (2929ms).
[21:58:32.635] <TB2> INFO: Test took 3787ms.
[21:58:32.923] <TB2> INFO: Expecting 41600 events.
[21:58:36.469] <TB2> INFO: 41600 events read in total (2954ms).
[21:58:36.470] <TB2> INFO: Test took 3811ms.
[21:58:36.761] <TB2> INFO: Expecting 41600 events.
[21:58:40.243] <TB2> INFO: 41600 events read in total (2891ms).
[21:58:40.244] <TB2> INFO: Test took 3748ms.
[21:58:40.532] <TB2> INFO: Expecting 41600 events.
[21:58:44.045] <TB2> INFO: 41600 events read in total (2922ms).
[21:58:44.046] <TB2> INFO: Test took 3779ms.
[21:58:44.335] <TB2> INFO: Expecting 41600 events.
[21:58:47.833] <TB2> INFO: 41600 events read in total (2907ms).
[21:58:47.834] <TB2> INFO: Test took 3764ms.
[21:58:48.125] <TB2> INFO: Expecting 41600 events.
[21:58:51.581] <TB2> INFO: 41600 events read in total (2865ms).
[21:58:51.582] <TB2> INFO: Test took 3722ms.
[21:58:51.872] <TB2> INFO: Expecting 41600 events.
[21:58:55.376] <TB2> INFO: 41600 events read in total (2912ms).
[21:58:55.377] <TB2> INFO: Test took 3769ms.
[21:58:55.668] <TB2> INFO: Expecting 41600 events.
[21:58:59.128] <TB2> INFO: 41600 events read in total (2869ms).
[21:58:59.129] <TB2> INFO: Test took 3726ms.
[21:58:59.419] <TB2> INFO: Expecting 41600 events.
[21:59:02.989] <TB2> INFO: 41600 events read in total (2978ms).
[21:59:02.990] <TB2> INFO: Test took 3835ms.
[21:59:03.278] <TB2> INFO: Expecting 41600 events.
[21:59:06.797] <TB2> INFO: 41600 events read in total (2927ms).
[21:59:06.797] <TB2> INFO: Test took 3783ms.
[21:59:07.085] <TB2> INFO: Expecting 41600 events.
[21:59:10.553] <TB2> INFO: 41600 events read in total (2876ms).
[21:59:10.554] <TB2> INFO: Test took 3733ms.
[21:59:10.842] <TB2> INFO: Expecting 41600 events.
[21:59:14.328] <TB2> INFO: 41600 events read in total (2895ms).
[21:59:14.329] <TB2> INFO: Test took 3752ms.
[21:59:14.617] <TB2> INFO: Expecting 41600 events.
[21:59:18.102] <TB2> INFO: 41600 events read in total (2893ms).
[21:59:18.102] <TB2> INFO: Test took 3749ms.
[21:59:18.390] <TB2> INFO: Expecting 41600 events.
[21:59:21.986] <TB2> INFO: 41600 events read in total (3004ms).
[21:59:21.987] <TB2> INFO: Test took 3861ms.
[21:59:22.286] <TB2> INFO: Expecting 41600 events.
[21:59:25.912] <TB2> INFO: 41600 events read in total (3034ms).
[21:59:25.913] <TB2> INFO: Test took 3903ms.
[21:59:26.212] <TB2> INFO: Expecting 41600 events.
[21:59:29.802] <TB2> INFO: 41600 events read in total (2999ms).
[21:59:29.803] <TB2> INFO: Test took 3864ms.
[21:59:30.093] <TB2> INFO: Expecting 41600 events.
[21:59:33.695] <TB2> INFO: 41600 events read in total (3010ms).
[21:59:33.696] <TB2> INFO: Test took 3867ms.
[21:59:33.984] <TB2> INFO: Expecting 41600 events.
[21:59:37.460] <TB2> INFO: 41600 events read in total (2885ms).
[21:59:37.461] <TB2> INFO: Test took 3742ms.
[21:59:37.749] <TB2> INFO: Expecting 41600 events.
[21:59:41.244] <TB2> INFO: 41600 events read in total (2904ms).
[21:59:41.245] <TB2> INFO: Test took 3761ms.
[21:59:41.548] <TB2> INFO: Expecting 41600 events.
[21:59:45.077] <TB2> INFO: 41600 events read in total (2938ms).
[21:59:45.078] <TB2> INFO: Test took 3807ms.
[21:59:45.366] <TB2> INFO: Expecting 41600 events.
[21:59:48.805] <TB2> INFO: 41600 events read in total (2848ms).
[21:59:48.806] <TB2> INFO: Test took 3705ms.
[21:59:49.096] <TB2> INFO: Expecting 41600 events.
[21:59:52.598] <TB2> INFO: 41600 events read in total (2910ms).
[21:59:52.599] <TB2> INFO: Test took 3767ms.
[21:59:52.890] <TB2> INFO: Expecting 41600 events.
[21:59:56.368] <TB2> INFO: 41600 events read in total (2886ms).
[21:59:56.368] <TB2> INFO: Test took 3742ms.
[21:59:56.657] <TB2> INFO: Expecting 41600 events.
[22:00:00.178] <TB2> INFO: 41600 events read in total (2930ms).
[22:00:00.179] <TB2> INFO: Test took 3787ms.
[22:00:00.468] <TB2> INFO: Expecting 41600 events.
[22:00:03.998] <TB2> INFO: 41600 events read in total (2939ms).
[22:00:03.999] <TB2> INFO: Test took 3796ms.
[22:00:04.296] <TB2> INFO: Expecting 41600 events.
[22:00:07.784] <TB2> INFO: 41600 events read in total (2897ms).
[22:00:07.785] <TB2> INFO: Test took 3762ms.
[22:00:08.073] <TB2> INFO: Expecting 41600 events.
[22:00:11.542] <TB2> INFO: 41600 events read in total (2877ms).
[22:00:11.542] <TB2> INFO: Test took 3733ms.
[22:00:11.830] <TB2> INFO: Expecting 41600 events.
[22:00:15.340] <TB2> INFO: 41600 events read in total (2918ms).
[22:00:15.340] <TB2> INFO: Test took 3774ms.
[22:00:15.628] <TB2> INFO: Expecting 41600 events.
[22:00:19.083] <TB2> INFO: 41600 events read in total (2863ms).
[22:00:19.083] <TB2> INFO: Test took 3719ms.
[22:00:19.372] <TB2> INFO: Expecting 41600 events.
[22:00:22.876] <TB2> INFO: 41600 events read in total (2913ms).
[22:00:22.877] <TB2> INFO: Test took 3770ms.
[22:00:23.168] <TB2> INFO: Expecting 41600 events.
[22:00:26.606] <TB2> INFO: 41600 events read in total (2847ms).
[22:00:26.607] <TB2> INFO: Test took 3704ms.
[22:00:26.902] <TB2> INFO: Expecting 41600 events.
[22:00:30.418] <TB2> INFO: 41600 events read in total (2925ms).
[22:00:30.418] <TB2> INFO: Test took 3788ms.
[22:00:30.706] <TB2> INFO: Expecting 41600 events.
[22:00:34.292] <TB2> INFO: 41600 events read in total (2994ms).
[22:00:34.293] <TB2> INFO: Test took 3851ms.
[22:00:34.584] <TB2> INFO: Expecting 41600 events.
[22:00:38.053] <TB2> INFO: 41600 events read in total (2878ms).
[22:00:38.053] <TB2> INFO: Test took 3734ms.
[22:00:38.342] <TB2> INFO: Expecting 41600 events.
[22:00:41.873] <TB2> INFO: 41600 events read in total (2940ms).
[22:00:41.874] <TB2> INFO: Test took 3797ms.
[22:00:42.162] <TB2> INFO: Expecting 41600 events.
[22:00:45.621] <TB2> INFO: 41600 events read in total (2867ms).
[22:00:45.622] <TB2> INFO: Test took 3724ms.
[22:00:45.917] <TB2> INFO: Expecting 41600 events.
[22:00:49.484] <TB2> INFO: 41600 events read in total (2975ms).
[22:00:49.484] <TB2> INFO: Test took 3838ms.
[22:00:49.776] <TB2> INFO: Expecting 41600 events.
[22:00:53.313] <TB2> INFO: 41600 events read in total (2946ms).
[22:00:53.314] <TB2> INFO: Test took 3803ms.
[22:00:53.602] <TB2> INFO: Expecting 41600 events.
[22:00:57.124] <TB2> INFO: 41600 events read in total (2930ms).
[22:00:57.125] <TB2> INFO: Test took 3787ms.
[22:00:57.413] <TB2> INFO: Expecting 41600 events.
[22:01:00.892] <TB2> INFO: 41600 events read in total (2887ms).
[22:01:00.892] <TB2> INFO: Test took 3743ms.
[22:01:01.189] <TB2> INFO: Expecting 41600 events.
[22:01:04.696] <TB2> INFO: 41600 events read in total (2915ms).
[22:01:04.697] <TB2> INFO: Test took 3781ms.
[22:01:04.001] <TB2> INFO: Expecting 41600 events.
[22:01:08.530] <TB2> INFO: 41600 events read in total (2938ms).
[22:01:08.531] <TB2> INFO: Test took 3808ms.
[22:01:08.820] <TB2> INFO: Expecting 41600 events.
[22:01:12.341] <TB2> INFO: 41600 events read in total (2930ms).
[22:01:12.342] <TB2> INFO: Test took 3787ms.
[22:01:12.640] <TB2> INFO: Expecting 41600 events.
[22:01:16.079] <TB2> INFO: 41600 events read in total (2848ms).
[22:01:16.079] <TB2> INFO: Test took 3713ms.
[22:01:16.381] <TB2> INFO: Expecting 41600 events.
[22:01:19.868] <TB2> INFO: 41600 events read in total (2896ms).
[22:01:19.869] <TB2> INFO: Test took 3766ms.
[22:01:20.175] <TB2> INFO: Expecting 41600 events.
[22:01:23.706] <TB2> INFO: 41600 events read in total (2939ms).
[22:01:23.707] <TB2> INFO: Test took 3813ms.
[22:01:23.995] <TB2> INFO: Expecting 2560 events.
[22:01:24.878] <TB2> INFO: 2560 events read in total (291ms).
[22:01:24.878] <TB2> INFO: Test took 1159ms.
[22:01:25.186] <TB2> INFO: Expecting 2560 events.
[22:01:26.072] <TB2> INFO: 2560 events read in total (294ms).
[22:01:26.072] <TB2> INFO: Test took 1194ms.
[22:01:26.380] <TB2> INFO: Expecting 2560 events.
[22:01:27.261] <TB2> INFO: 2560 events read in total (290ms).
[22:01:27.262] <TB2> INFO: Test took 1190ms.
[22:01:27.570] <TB2> INFO: Expecting 2560 events.
[22:01:28.452] <TB2> INFO: 2560 events read in total (291ms).
[22:01:28.452] <TB2> INFO: Test took 1190ms.
[22:01:28.759] <TB2> INFO: Expecting 2560 events.
[22:01:29.638] <TB2> INFO: 2560 events read in total (287ms).
[22:01:29.638] <TB2> INFO: Test took 1186ms.
[22:01:29.946] <TB2> INFO: Expecting 2560 events.
[22:01:30.825] <TB2> INFO: 2560 events read in total (287ms).
[22:01:30.825] <TB2> INFO: Test took 1186ms.
[22:01:31.133] <TB2> INFO: Expecting 2560 events.
[22:01:32.013] <TB2> INFO: 2560 events read in total (288ms).
[22:01:32.014] <TB2> INFO: Test took 1188ms.
[22:01:32.321] <TB2> INFO: Expecting 2560 events.
[22:01:33.200] <TB2> INFO: 2560 events read in total (287ms).
[22:01:33.200] <TB2> INFO: Test took 1186ms.
[22:01:33.508] <TB2> INFO: Expecting 2560 events.
[22:01:34.392] <TB2> INFO: 2560 events read in total (293ms).
[22:01:34.392] <TB2> INFO: Test took 1192ms.
[22:01:34.700] <TB2> INFO: Expecting 2560 events.
[22:01:35.581] <TB2> INFO: 2560 events read in total (290ms).
[22:01:35.581] <TB2> INFO: Test took 1189ms.
[22:01:35.889] <TB2> INFO: Expecting 2560 events.
[22:01:36.766] <TB2> INFO: 2560 events read in total (285ms).
[22:01:36.766] <TB2> INFO: Test took 1184ms.
[22:01:37.074] <TB2> INFO: Expecting 2560 events.
[22:01:37.952] <TB2> INFO: 2560 events read in total (286ms).
[22:01:37.952] <TB2> INFO: Test took 1185ms.
[22:01:38.261] <TB2> INFO: Expecting 2560 events.
[22:01:39.141] <TB2> INFO: 2560 events read in total (289ms).
[22:01:39.142] <TB2> INFO: Test took 1189ms.
[22:01:39.450] <TB2> INFO: Expecting 2560 events.
[22:01:40.332] <TB2> INFO: 2560 events read in total (291ms).
[22:01:40.332] <TB2> INFO: Test took 1190ms.
[22:01:40.640] <TB2> INFO: Expecting 2560 events.
[22:01:41.522] <TB2> INFO: 2560 events read in total (291ms).
[22:01:41.523] <TB2> INFO: Test took 1191ms.
[22:01:41.830] <TB2> INFO: Expecting 2560 events.
[22:01:42.716] <TB2> INFO: 2560 events read in total (294ms).
[22:01:42.716] <TB2> INFO: Test took 1193ms.
[22:01:42.719] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:01:43.025] <TB2> INFO: Expecting 655360 events.
[22:01:57.140] <TB2> INFO: 655360 events read in total (13524ms).
[22:01:57.152] <TB2> INFO: Expecting 655360 events.
[22:02:11.168] <TB2> INFO: 655360 events read in total (13614ms).
[22:02:11.183] <TB2> INFO: Expecting 655360 events.
[22:02:25.155] <TB2> INFO: 655360 events read in total (13569ms).
[22:02:25.174] <TB2> INFO: Expecting 655360 events.
[22:02:39.277] <TB2> INFO: 655360 events read in total (13700ms).
[22:02:39.300] <TB2> INFO: Expecting 655360 events.
[22:02:53.273] <TB2> INFO: 655360 events read in total (13570ms).
[22:02:53.300] <TB2> INFO: Expecting 655360 events.
[22:03:07.356] <TB2> INFO: 655360 events read in total (13653ms).
[22:03:07.388] <TB2> INFO: Expecting 655360 events.
[22:03:21.418] <TB2> INFO: 655360 events read in total (13627ms).
[22:03:21.452] <TB2> INFO: Expecting 655360 events.
[22:03:35.076] <TB2> INFO: 655360 events read in total (13221ms).
[22:03:35.114] <TB2> INFO: Expecting 655360 events.
[22:03:49.065] <TB2> INFO: 655360 events read in total (13548ms).
[22:03:49.110] <TB2> INFO: Expecting 655360 events.
[22:04:03.119] <TB2> INFO: 655360 events read in total (13606ms).
[22:04:03.165] <TB2> INFO: Expecting 655360 events.
[22:04:17.242] <TB2> INFO: 655360 events read in total (13674ms).
[22:04:17.295] <TB2> INFO: Expecting 655360 events.
[22:04:31.331] <TB2> INFO: 655360 events read in total (13634ms).
[22:04:31.387] <TB2> INFO: Expecting 655360 events.
[22:04:45.352] <TB2> INFO: 655360 events read in total (13562ms).
[22:04:45.412] <TB2> INFO: Expecting 655360 events.
[22:04:59.353] <TB2> INFO: 655360 events read in total (13538ms).
[22:04:59.418] <TB2> INFO: Expecting 655360 events.
[22:05:13.484] <TB2> INFO: 655360 events read in total (13663ms).
[22:05:13.554] <TB2> INFO: Expecting 655360 events.
[22:05:27.521] <TB2> INFO: 655360 events read in total (13564ms).
[22:05:27.594] <TB2> INFO: Test took 224875ms.
[22:05:27.672] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:05:27.937] <TB2> INFO: Expecting 655360 events.
[22:05:42.036] <TB2> INFO: 655360 events read in total (13507ms).
[22:05:42.049] <TB2> INFO: Expecting 655360 events.
[22:05:55.856] <TB2> INFO: 655360 events read in total (13404ms).
[22:05:55.875] <TB2> INFO: Expecting 655360 events.
[22:06:09.935] <TB2> INFO: 655360 events read in total (13657ms).
[22:06:09.953] <TB2> INFO: Expecting 655360 events.
[22:06:23.867] <TB2> INFO: 655360 events read in total (13510ms).
[22:06:23.896] <TB2> INFO: Expecting 655360 events.
[22:06:38.024] <TB2> INFO: 655360 events read in total (13725ms).
[22:06:38.049] <TB2> INFO: Expecting 655360 events.
[22:06:52.039] <TB2> INFO: 655360 events read in total (13587ms).
[22:06:52.070] <TB2> INFO: Expecting 655360 events.
[22:07:05.956] <TB2> INFO: 655360 events read in total (13483ms).
[22:07:05.990] <TB2> INFO: Expecting 655360 events.
[22:07:19.943] <TB2> INFO: 655360 events read in total (13550ms).
[22:07:19.981] <TB2> INFO: Expecting 655360 events.
[22:07:34.113] <TB2> INFO: 655360 events read in total (13729ms).
[22:07:34.159] <TB2> INFO: Expecting 655360 events.
[22:07:48.209] <TB2> INFO: 655360 events read in total (13647ms).
[22:07:48.255] <TB2> INFO: Expecting 655360 events.
[22:08:02.275] <TB2> INFO: 655360 events read in total (13618ms).
[22:08:02.329] <TB2> INFO: Expecting 655360 events.
[22:08:16.458] <TB2> INFO: 655360 events read in total (13726ms).
[22:08:16.533] <TB2> INFO: Expecting 655360 events.
[22:08:30.398] <TB2> INFO: 655360 events read in total (13456ms).
[22:08:30.481] <TB2> INFO: Expecting 655360 events.
[22:08:44.638] <TB2> INFO: 655360 events read in total (13755ms).
[22:08:44.731] <TB2> INFO: Expecting 655360 events.
[22:08:58.601] <TB2> INFO: 655360 events read in total (13467ms).
[22:08:58.671] <TB2> INFO: Expecting 655360 events.
[22:09:12.489] <TB2> INFO: 655360 events read in total (13415ms).
[22:09:12.563] <TB2> INFO: Test took 224891ms.
[22:09:12.718] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.723] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.727] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:09:12.732] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:09:12.736] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:09:12.741] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:09:12.745] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[22:09:12.750] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[22:09:12.754] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.759] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.763] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.768] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.772] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:09:12.776] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:09:12.781] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:09:12.785] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.790] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.794] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:09:12.799] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:09:12.804] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:09:12.808] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[22:09:12.815] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[22:09:12.821] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[22:09:12.827] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[22:09:12.833] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[22:09:12.839] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[22:09:12.845] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.851] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.857] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.861] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:09:12.865] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:09:12.870] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:09:12.874] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.879] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.883] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.888] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.892] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[22:09:12.897] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[22:09:12.901] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[22:09:12.906] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[22:09:12.938] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C0.dat
[22:09:12.938] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C1.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C2.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C3.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C4.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C5.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C6.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C7.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C8.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C9.dat
[22:09:12.939] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C10.dat
[22:09:12.940] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C11.dat
[22:09:12.940] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C12.dat
[22:09:12.940] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C13.dat
[22:09:12.940] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C14.dat
[22:09:12.940] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C15.dat
[22:09:13.177] <TB2> INFO: Expecting 41600 events.
[22:09:16.268] <TB2> INFO: 41600 events read in total (2499ms).
[22:09:16.269] <TB2> INFO: Test took 3326ms.
[22:09:16.739] <TB2> INFO: Expecting 41600 events.
[22:09:19.748] <TB2> INFO: 41600 events read in total (2417ms).
[22:09:19.749] <TB2> INFO: Test took 3269ms.
[22:09:20.206] <TB2> INFO: Expecting 41600 events.
[22:09:23.332] <TB2> INFO: 41600 events read in total (2534ms).
[22:09:23.332] <TB2> INFO: Test took 3372ms.
[22:09:23.548] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:23.636] <TB2> INFO: Expecting 2560 events.
[22:09:24.520] <TB2> INFO: 2560 events read in total (292ms).
[22:09:24.520] <TB2> INFO: Test took 972ms.
[22:09:24.522] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:24.828] <TB2> INFO: Expecting 2560 events.
[22:09:25.715] <TB2> INFO: 2560 events read in total (295ms).
[22:09:25.715] <TB2> INFO: Test took 1193ms.
[22:09:25.717] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:26.023] <TB2> INFO: Expecting 2560 events.
[22:09:26.906] <TB2> INFO: 2560 events read in total (291ms).
[22:09:26.907] <TB2> INFO: Test took 1190ms.
[22:09:26.909] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:27.215] <TB2> INFO: Expecting 2560 events.
[22:09:28.101] <TB2> INFO: 2560 events read in total (294ms).
[22:09:28.101] <TB2> INFO: Test took 1192ms.
[22:09:28.103] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:28.410] <TB2> INFO: Expecting 2560 events.
[22:09:29.292] <TB2> INFO: 2560 events read in total (291ms).
[22:09:29.293] <TB2> INFO: Test took 1190ms.
[22:09:29.294] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:29.601] <TB2> INFO: Expecting 2560 events.
[22:09:30.487] <TB2> INFO: 2560 events read in total (294ms).
[22:09:30.488] <TB2> INFO: Test took 1194ms.
[22:09:30.490] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:30.796] <TB2> INFO: Expecting 2560 events.
[22:09:31.679] <TB2> INFO: 2560 events read in total (291ms).
[22:09:31.679] <TB2> INFO: Test took 1189ms.
[22:09:31.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:31.988] <TB2> INFO: Expecting 2560 events.
[22:09:32.871] <TB2> INFO: 2560 events read in total (292ms).
[22:09:32.871] <TB2> INFO: Test took 1190ms.
[22:09:32.873] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:33.180] <TB2> INFO: Expecting 2560 events.
[22:09:34.059] <TB2> INFO: 2560 events read in total (288ms).
[22:09:34.060] <TB2> INFO: Test took 1187ms.
[22:09:34.062] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:34.368] <TB2> INFO: Expecting 2560 events.
[22:09:35.246] <TB2> INFO: 2560 events read in total (287ms).
[22:09:35.246] <TB2> INFO: Test took 1184ms.
[22:09:35.248] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:35.555] <TB2> INFO: Expecting 2560 events.
[22:09:36.433] <TB2> INFO: 2560 events read in total (287ms).
[22:09:36.434] <TB2> INFO: Test took 1186ms.
[22:09:36.436] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:36.742] <TB2> INFO: Expecting 2560 events.
[22:09:37.623] <TB2> INFO: 2560 events read in total (289ms).
[22:09:37.623] <TB2> INFO: Test took 1187ms.
[22:09:37.625] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:37.931] <TB2> INFO: Expecting 2560 events.
[22:09:38.810] <TB2> INFO: 2560 events read in total (287ms).
[22:09:38.810] <TB2> INFO: Test took 1185ms.
[22:09:38.812] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:39.119] <TB2> INFO: Expecting 2560 events.
[22:09:40.003] <TB2> INFO: 2560 events read in total (293ms).
[22:09:40.003] <TB2> INFO: Test took 1191ms.
[22:09:40.005] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:40.312] <TB2> INFO: Expecting 2560 events.
[22:09:41.192] <TB2> INFO: 2560 events read in total (289ms).
[22:09:41.192] <TB2> INFO: Test took 1187ms.
[22:09:41.194] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:41.501] <TB2> INFO: Expecting 2560 events.
[22:09:42.381] <TB2> INFO: 2560 events read in total (289ms).
[22:09:42.381] <TB2> INFO: Test took 1187ms.
[22:09:42.383] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:42.689] <TB2> INFO: Expecting 2560 events.
[22:09:43.570] <TB2> INFO: 2560 events read in total (289ms).
[22:09:43.570] <TB2> INFO: Test took 1187ms.
[22:09:43.572] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:43.879] <TB2> INFO: Expecting 2560 events.
[22:09:44.757] <TB2> INFO: 2560 events read in total (286ms).
[22:09:44.758] <TB2> INFO: Test took 1186ms.
[22:09:44.761] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:45.066] <TB2> INFO: Expecting 2560 events.
[22:09:45.948] <TB2> INFO: 2560 events read in total (290ms).
[22:09:45.948] <TB2> INFO: Test took 1187ms.
[22:09:45.950] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:46.256] <TB2> INFO: Expecting 2560 events.
[22:09:47.146] <TB2> INFO: 2560 events read in total (298ms).
[22:09:47.146] <TB2> INFO: Test took 1196ms.
[22:09:47.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:47.455] <TB2> INFO: Expecting 2560 events.
[22:09:48.336] <TB2> INFO: 2560 events read in total (290ms).
[22:09:48.336] <TB2> INFO: Test took 1188ms.
[22:09:48.338] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:48.645] <TB2> INFO: Expecting 2560 events.
[22:09:49.522] <TB2> INFO: 2560 events read in total (286ms).
[22:09:49.523] <TB2> INFO: Test took 1185ms.
[22:09:49.524] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:49.831] <TB2> INFO: Expecting 2560 events.
[22:09:50.712] <TB2> INFO: 2560 events read in total (289ms).
[22:09:50.712] <TB2> INFO: Test took 1188ms.
[22:09:50.714] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:51.020] <TB2> INFO: Expecting 2560 events.
[22:09:51.904] <TB2> INFO: 2560 events read in total (293ms).
[22:09:51.904] <TB2> INFO: Test took 1191ms.
[22:09:51.906] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:52.212] <TB2> INFO: Expecting 2560 events.
[22:09:53.097] <TB2> INFO: 2560 events read in total (293ms).
[22:09:53.097] <TB2> INFO: Test took 1191ms.
[22:09:53.099] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:53.405] <TB2> INFO: Expecting 2560 events.
[22:09:54.293] <TB2> INFO: 2560 events read in total (296ms).
[22:09:54.293] <TB2> INFO: Test took 1194ms.
[22:09:54.295] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:54.601] <TB2> INFO: Expecting 2560 events.
[22:09:55.489] <TB2> INFO: 2560 events read in total (296ms).
[22:09:55.490] <TB2> INFO: Test took 1195ms.
[22:09:55.492] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:55.798] <TB2> INFO: Expecting 2560 events.
[22:09:56.680] <TB2> INFO: 2560 events read in total (291ms).
[22:09:56.680] <TB2> INFO: Test took 1188ms.
[22:09:56.682] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:56.989] <TB2> INFO: Expecting 2560 events.
[22:09:57.876] <TB2> INFO: 2560 events read in total (296ms).
[22:09:57.876] <TB2> INFO: Test took 1194ms.
[22:09:57.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:58.184] <TB2> INFO: Expecting 2560 events.
[22:09:59.068] <TB2> INFO: 2560 events read in total (292ms).
[22:09:59.069] <TB2> INFO: Test took 1191ms.
[22:09:59.071] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:09:59.377] <TB2> INFO: Expecting 2560 events.
[22:10:00.261] <TB2> INFO: 2560 events read in total (292ms).
[22:10:00.262] <TB2> INFO: Test took 1192ms.
[22:10:00.263] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:10:00.570] <TB2> INFO: Expecting 2560 events.
[22:10:01.458] <TB2> INFO: 2560 events read in total (296ms).
[22:10:01.458] <TB2> INFO: Test took 1195ms.
[22:10:01.919] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 723 seconds
[22:10:01.919] <TB2> INFO: PH scale (per ROC): 40 38 54 44 43 41 49 43 42 42 43 38 42 52 29 42
[22:10:01.919] <TB2> INFO: PH offset (per ROC): 105 129 136 113 139 110 132 111 104 103 91 117 111 135 124 110
[22:10:01.924] <TB2> INFO: Decoding statistics:
[22:10:01.924] <TB2> INFO: General information:
[22:10:01.924] <TB2> INFO: 16bit words read: 127878
[22:10:01.924] <TB2> INFO: valid events total: 20480
[22:10:01.924] <TB2> INFO: empty events: 17981
[22:10:01.924] <TB2> INFO: valid events with pixels: 2499
[22:10:01.924] <TB2> INFO: valid pixel hits: 2499
[22:10:01.924] <TB2> INFO: Event errors: 0
[22:10:01.924] <TB2> INFO: start marker: 0
[22:10:01.924] <TB2> INFO: stop marker: 0
[22:10:01.924] <TB2> INFO: overflow: 0
[22:10:01.924] <TB2> INFO: invalid 5bit words: 0
[22:10:01.924] <TB2> INFO: invalid XOR eye diagram: 0
[22:10:01.924] <TB2> INFO: frame (failed synchr.): 0
[22:10:01.924] <TB2> INFO: idle data (no TBM trl): 0
[22:10:01.925] <TB2> INFO: no data (only TBM hdr): 0
[22:10:01.925] <TB2> INFO: TBM errors: 0
[22:10:01.925] <TB2> INFO: flawed TBM headers: 0
[22:10:01.925] <TB2> INFO: flawed TBM trailers: 0
[22:10:01.925] <TB2> INFO: event ID mismatches: 0
[22:10:01.925] <TB2> INFO: ROC errors: 0
[22:10:01.925] <TB2> INFO: missing ROC header(s): 0
[22:10:01.925] <TB2> INFO: misplaced readback start: 0
[22:10:01.925] <TB2> INFO: Pixel decoding errors: 0
[22:10:01.925] <TB2> INFO: pixel data incomplete: 0
[22:10:01.925] <TB2> INFO: pixel address: 0
[22:10:01.925] <TB2> INFO: pulse height fill bit: 0
[22:10:01.925] <TB2> INFO: buffer corruption: 0
[22:10:02.187] <TB2> INFO: ######################################################################
[22:10:02.187] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[22:10:02.187] <TB2> INFO: ######################################################################
[22:10:02.198] <TB2> INFO: scanning low vcal = 10
[22:10:02.429] <TB2> INFO: Expecting 41600 events.
[22:10:05.998] <TB2> INFO: 41600 events read in total (2977ms).
[22:10:05.998] <TB2> INFO: Test took 3800ms.
[22:10:05.000] <TB2> INFO: scanning low vcal = 20
[22:10:06.299] <TB2> INFO: Expecting 41600 events.
[22:10:09.875] <TB2> INFO: 41600 events read in total (2985ms).
[22:10:09.875] <TB2> INFO: Test took 3875ms.
[22:10:09.877] <TB2> INFO: scanning low vcal = 30
[22:10:10.172] <TB2> INFO: Expecting 41600 events.
[22:10:13.825] <TB2> INFO: 41600 events read in total (3062ms).
[22:10:13.826] <TB2> INFO: Test took 3949ms.
[22:10:13.829] <TB2> INFO: scanning low vcal = 40
[22:10:14.106] <TB2> INFO: Expecting 41600 events.
[22:10:18.107] <TB2> INFO: 41600 events read in total (3410ms).
[22:10:18.109] <TB2> INFO: Test took 4279ms.
[22:10:18.112] <TB2> INFO: scanning low vcal = 50
[22:10:18.388] <TB2> INFO: Expecting 41600 events.
[22:10:22.370] <TB2> INFO: 41600 events read in total (3390ms).
[22:10:22.370] <TB2> INFO: Test took 4258ms.
[22:10:22.373] <TB2> INFO: scanning low vcal = 60
[22:10:22.650] <TB2> INFO: Expecting 41600 events.
[22:10:26.616] <TB2> INFO: 41600 events read in total (3375ms).
[22:10:26.616] <TB2> INFO: Test took 4243ms.
[22:10:26.619] <TB2> INFO: scanning low vcal = 70
[22:10:26.902] <TB2> INFO: Expecting 41600 events.
[22:10:30.940] <TB2> INFO: 41600 events read in total (3446ms).
[22:10:30.941] <TB2> INFO: Test took 4322ms.
[22:10:30.944] <TB2> INFO: scanning low vcal = 80
[22:10:31.220] <TB2> INFO: Expecting 41600 events.
[22:10:35.243] <TB2> INFO: 41600 events read in total (3431ms).
[22:10:35.244] <TB2> INFO: Test took 4300ms.
[22:10:35.247] <TB2> INFO: scanning low vcal = 90
[22:10:35.524] <TB2> INFO: Expecting 41600 events.
[22:10:39.526] <TB2> INFO: 41600 events read in total (3411ms).
[22:10:39.526] <TB2> INFO: Test took 4279ms.
[22:10:39.529] <TB2> INFO: scanning low vcal = 100
[22:10:39.806] <TB2> INFO: Expecting 41600 events.
[22:10:43.856] <TB2> INFO: 41600 events read in total (3459ms).
[22:10:43.857] <TB2> INFO: Test took 4328ms.
[22:10:43.860] <TB2> INFO: scanning low vcal = 110
[22:10:44.177] <TB2> INFO: Expecting 41600 events.
[22:10:48.127] <TB2> INFO: 41600 events read in total (3358ms).
[22:10:48.127] <TB2> INFO: Test took 4267ms.
[22:10:48.131] <TB2> INFO: scanning low vcal = 120
[22:10:48.407] <TB2> INFO: Expecting 41600 events.
[22:10:52.366] <TB2> INFO: 41600 events read in total (3367ms).
[22:10:52.367] <TB2> INFO: Test took 4236ms.
[22:10:52.370] <TB2> INFO: scanning low vcal = 130
[22:10:52.647] <TB2> INFO: Expecting 41600 events.
[22:10:56.591] <TB2> INFO: 41600 events read in total (3352ms).
[22:10:56.591] <TB2> INFO: Test took 4221ms.
[22:10:56.595] <TB2> INFO: scanning low vcal = 140
[22:10:56.871] <TB2> INFO: Expecting 41600 events.
[22:11:00.824] <TB2> INFO: 41600 events read in total (3361ms).
[22:11:00.824] <TB2> INFO: Test took 4230ms.
[22:11:00.827] <TB2> INFO: scanning low vcal = 150
[22:11:01.104] <TB2> INFO: Expecting 41600 events.
[22:11:05.053] <TB2> INFO: 41600 events read in total (3357ms).
[22:11:05.054] <TB2> INFO: Test took 4227ms.
[22:11:05.057] <TB2> INFO: scanning low vcal = 160
[22:11:05.334] <TB2> INFO: Expecting 41600 events.
[22:11:09.289] <TB2> INFO: 41600 events read in total (3363ms).
[22:11:09.289] <TB2> INFO: Test took 4232ms.
[22:11:09.292] <TB2> INFO: scanning low vcal = 170
[22:11:09.569] <TB2> INFO: Expecting 41600 events.
[22:11:13.521] <TB2> INFO: 41600 events read in total (3360ms).
[22:11:13.521] <TB2> INFO: Test took 4229ms.
[22:11:13.524] <TB2> INFO: scanning low vcal = 180
[22:11:13.801] <TB2> INFO: Expecting 41600 events.
[22:11:17.748] <TB2> INFO: 41600 events read in total (3355ms).
[22:11:17.748] <TB2> INFO: Test took 4224ms.
[22:11:17.751] <TB2> INFO: scanning low vcal = 190
[22:11:18.028] <TB2> INFO: Expecting 41600 events.
[22:11:21.982] <TB2> INFO: 41600 events read in total (3362ms).
[22:11:21.983] <TB2> INFO: Test took 4232ms.
[22:11:21.985] <TB2> INFO: scanning low vcal = 200
[22:11:22.263] <TB2> INFO: Expecting 41600 events.
[22:11:26.212] <TB2> INFO: 41600 events read in total (3357ms).
[22:11:26.213] <TB2> INFO: Test took 4227ms.
[22:11:26.216] <TB2> INFO: scanning low vcal = 210
[22:11:26.493] <TB2> INFO: Expecting 41600 events.
[22:11:30.439] <TB2> INFO: 41600 events read in total (3354ms).
[22:11:30.440] <TB2> INFO: Test took 4224ms.
[22:11:30.443] <TB2> INFO: scanning low vcal = 220
[22:11:30.720] <TB2> INFO: Expecting 41600 events.
[22:11:34.675] <TB2> INFO: 41600 events read in total (3363ms).
[22:11:34.676] <TB2> INFO: Test took 4233ms.
[22:11:34.678] <TB2> INFO: scanning low vcal = 230
[22:11:34.955] <TB2> INFO: Expecting 41600 events.
[22:11:39.006] <TB2> INFO: 41600 events read in total (3459ms).
[22:11:39.007] <TB2> INFO: Test took 4329ms.
[22:11:39.010] <TB2> INFO: scanning low vcal = 240
[22:11:39.287] <TB2> INFO: Expecting 41600 events.
[22:11:43.232] <TB2> INFO: 41600 events read in total (3353ms).
[22:11:43.233] <TB2> INFO: Test took 4223ms.
[22:11:43.235] <TB2> INFO: scanning low vcal = 250
[22:11:43.512] <TB2> INFO: Expecting 41600 events.
[22:11:47.456] <TB2> INFO: 41600 events read in total (3352ms).
[22:11:47.457] <TB2> INFO: Test took 4222ms.
[22:11:47.460] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[22:11:47.737] <TB2> INFO: Expecting 41600 events.
[22:11:51.797] <TB2> INFO: 41600 events read in total (3468ms).
[22:11:51.797] <TB2> INFO: Test took 4336ms.
[22:11:51.800] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[22:11:52.077] <TB2> INFO: Expecting 41600 events.
[22:11:56.022] <TB2> INFO: 41600 events read in total (3353ms).
[22:11:56.023] <TB2> INFO: Test took 4223ms.
[22:11:56.025] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[22:11:56.302] <TB2> INFO: Expecting 41600 events.
[22:12:00.250] <TB2> INFO: 41600 events read in total (3356ms).
[22:12:00.251] <TB2> INFO: Test took 4226ms.
[22:12:00.254] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[22:12:00.531] <TB2> INFO: Expecting 41600 events.
[22:12:04.480] <TB2> INFO: 41600 events read in total (3357ms).
[22:12:04.481] <TB2> INFO: Test took 4227ms.
[22:12:04.484] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[22:12:04.761] <TB2> INFO: Expecting 41600 events.
[22:12:08.707] <TB2> INFO: 41600 events read in total (3354ms).
[22:12:08.708] <TB2> INFO: Test took 4224ms.
[22:12:09.105] <TB2> INFO: PixTestGainPedestal::measure() done
[22:12:40.540] <TB2> INFO: PixTestGainPedestal::fit() done
[22:12:40.540] <TB2> INFO: non-linearity mean: 0.981 0.958 0.977 0.956 0.970 0.955 0.973 0.949 0.928 0.919 0.935 0.933 0.970 0.970 0.927 0.940
[22:12:40.540] <TB2> INFO: non-linearity RMS: 0.165 0.010 0.004 0.015 0.012 0.012 0.004 0.034 0.059 0.199 0.080 0.045 0.174 0.005 0.171 0.036
[22:12:40.540] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[22:12:40.554] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[22:12:40.568] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[22:12:40.582] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[22:12:40.595] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[22:12:40.609] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[22:12:40.623] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[22:12:40.636] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[22:12:40.650] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[22:12:40.664] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[22:12:40.678] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[22:12:40.692] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[22:12:40.706] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[22:12:40.720] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[22:12:40.734] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[22:12:40.748] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[22:12:40.762] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 158 seconds
[22:12:40.762] <TB2> INFO: Decoding statistics:
[22:12:40.762] <TB2> INFO: General information:
[22:12:40.762] <TB2> INFO: 16bit words read: 3327836
[22:12:40.762] <TB2> INFO: valid events total: 332800
[22:12:40.762] <TB2> INFO: empty events: 0
[22:12:40.762] <TB2> INFO: valid events with pixels: 332800
[22:12:40.762] <TB2> INFO: valid pixel hits: 665518
[22:12:40.762] <TB2> INFO: Event errors: 0
[22:12:40.762] <TB2> INFO: start marker: 0
[22:12:40.762] <TB2> INFO: stop marker: 0
[22:12:40.762] <TB2> INFO: overflow: 0
[22:12:40.762] <TB2> INFO: invalid 5bit words: 0
[22:12:40.762] <TB2> INFO: invalid XOR eye diagram: 0
[22:12:40.762] <TB2> INFO: frame (failed synchr.): 0
[22:12:40.762] <TB2> INFO: idle data (no TBM trl): 0
[22:12:40.762] <TB2> INFO: no data (only TBM hdr): 0
[22:12:40.762] <TB2> INFO: TBM errors: 0
[22:12:40.762] <TB2> INFO: flawed TBM headers: 0
[22:12:40.762] <TB2> INFO: flawed TBM trailers: 0
[22:12:40.763] <TB2> INFO: event ID mismatches: 0
[22:12:40.763] <TB2> INFO: ROC errors: 0
[22:12:40.763] <TB2> INFO: missing ROC header(s): 0
[22:12:40.763] <TB2> INFO: misplaced readback start: 0
[22:12:40.763] <TB2> INFO: Pixel decoding errors: 0
[22:12:40.763] <TB2> INFO: pixel data incomplete: 0
[22:12:40.763] <TB2> INFO: pixel address: 0
[22:12:40.763] <TB2> INFO: pulse height fill bit: 0
[22:12:40.763] <TB2> INFO: buffer corruption: 0
[22:12:40.778] <TB2> INFO: Decoding statistics:
[22:12:40.778] <TB2> INFO: General information:
[22:12:40.778] <TB2> INFO: 16bit words read: 3457250
[22:12:40.778] <TB2> INFO: valid events total: 353536
[22:12:40.779] <TB2> INFO: empty events: 18237
[22:12:40.779] <TB2> INFO: valid events with pixels: 335299
[22:12:40.779] <TB2> INFO: valid pixel hits: 668017
[22:12:40.779] <TB2> INFO: Event errors: 0
[22:12:40.779] <TB2> INFO: start marker: 0
[22:12:40.779] <TB2> INFO: stop marker: 0
[22:12:40.779] <TB2> INFO: overflow: 0
[22:12:40.779] <TB2> INFO: invalid 5bit words: 0
[22:12:40.779] <TB2> INFO: invalid XOR eye diagram: 0
[22:12:40.779] <TB2> INFO: frame (failed synchr.): 0
[22:12:40.779] <TB2> INFO: idle data (no TBM trl): 0
[22:12:40.779] <TB2> INFO: no data (only TBM hdr): 0
[22:12:40.779] <TB2> INFO: TBM errors: 0
[22:12:40.779] <TB2> INFO: flawed TBM headers: 0
[22:12:40.779] <TB2> INFO: flawed TBM trailers: 0
[22:12:40.779] <TB2> INFO: event ID mismatches: 0
[22:12:40.779] <TB2> INFO: ROC errors: 0
[22:12:40.779] <TB2> INFO: missing ROC header(s): 0
[22:12:40.779] <TB2> INFO: misplaced readback start: 0
[22:12:40.779] <TB2> INFO: Pixel decoding errors: 0
[22:12:40.779] <TB2> INFO: pixel data incomplete: 0
[22:12:40.779] <TB2> INFO: pixel address: 0
[22:12:40.779] <TB2> INFO: pulse height fill bit: 0
[22:12:40.779] <TB2> INFO: buffer corruption: 0
[22:12:40.779] <TB2> INFO: enter test to run
[22:12:40.779] <TB2> INFO: test: exit no parameter change
[22:12:40.836] <TB2> QUIET: Connection to board 156 closed.
[22:12:40.837] <TB2> INFO: pXar: this is the end, my friend