[22:30:52.185] <TB2> INFO: *** Welcome to pxar ***
[22:30:52.185] <TB2> INFO: *** Today: 2016/11/07
[22:30:52.193] <TB2> INFO: *** Version: c8ba-dirty
[22:30:52.193] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:30:52.193] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:30:52.193] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//defaultMaskFile.dat
[22:30:52.193] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters_C15.dat
[22:30:52.248] <TB2> INFO: clk: 4
[22:30:52.248] <TB2> INFO: ctr: 4
[22:30:52.248] <TB2> INFO: sda: 19
[22:30:52.248] <TB2> INFO: tin: 9
[22:30:52.248] <TB2> INFO: level: 15
[22:30:52.248] <TB2> INFO: triggerdelay: 0
[22:30:52.248] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[22:30:52.248] <TB2> INFO: Log level: INFO
[22:30:52.256] <TB2> INFO: Found DTB DTB_WXC55Z
[22:30:52.267] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[22:30:52.269] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[22:30:52.271] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[22:30:53.755] <TB2> INFO: DUT info:
[22:30:53.755] <TB2> INFO: The DUT currently contains the following objects:
[22:30:53.755] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[22:30:53.755] <TB2> INFO: TBM Core alpha (0): 7 registers set
[22:30:53.755] <TB2> INFO: TBM Core beta (1): 7 registers set
[22:30:53.755] <TB2> INFO: TBM Core alpha (2): 7 registers set
[22:30:53.755] <TB2> INFO: TBM Core beta (3): 7 registers set
[22:30:53.755] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[22:30:53.755] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:53.755] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[22:30:54.156] <TB2> INFO: enter 'restricted' command line mode
[22:30:54.156] <TB2> INFO: enter test to run
[22:30:54.156] <TB2> INFO: test: pretest no parameter change
[22:30:54.156] <TB2> INFO: running: pretest
[22:30:54.693] <TB2> INFO: ######################################################################
[22:30:54.693] <TB2> INFO: PixTestPretest::doTest()
[22:30:54.693] <TB2> INFO: ######################################################################
[22:30:54.695] <TB2> INFO: ----------------------------------------------------------------------
[22:30:54.695] <TB2> INFO: PixTestPretest::programROC()
[22:30:54.695] <TB2> INFO: ----------------------------------------------------------------------
[22:31:12.707] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[22:31:12.707] <TB2> INFO: IA differences per ROC: 20.1 18.5 20.1 19.3 20.1 20.9 17.7 20.9 17.7 20.1 20.1 17.7 19.3 17.7 18.5 20.1
[22:31:12.744] <TB2> INFO: ----------------------------------------------------------------------
[22:31:12.744] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[22:31:12.744] <TB2> INFO: ----------------------------------------------------------------------
[22:31:33.994] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[22:31:33.995] <TB2> INFO: i(loss) [mA/ROC]: 19.3 18.5 19.3 20.1 18.5 18.5 20.1 18.5 19.3 18.5 19.3 20.1 19.3 20.1 19.3 19.3
[22:31:34.023] <TB2> INFO: ----------------------------------------------------------------------
[22:31:34.023] <TB2> INFO: PixTestPretest::findTiming()
[22:31:34.023] <TB2> INFO: ----------------------------------------------------------------------
[22:31:34.023] <TB2> INFO: PixTestCmd::init()

[22:32:05.037] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[22:32:05.037] <TB2> INFO: (success/tries = 100/100), width = 4
[22:32:06.548] <TB2> INFO: ----------------------------------------------------------------------
[22:32:06.548] <TB2> INFO: PixTestPretest::findWorkingPixel()
[22:32:06.548] <TB2> INFO: ----------------------------------------------------------------------
[22:32:06.639] <TB2> INFO: Expecting 231680 events.
[22:32:16.251] <TB2> INFO: 231680 events read in total (9020ms).
[22:32:16.260] <TB2> INFO: Test took 9710ms.
[22:32:16.505] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[22:32:16.533] <TB2> INFO: ----------------------------------------------------------------------
[22:32:16.533] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[22:32:16.533] <TB2> INFO: ----------------------------------------------------------------------
[22:32:16.625] <TB2> INFO: Expecting 231680 events.
[22:32:26.294] <TB2> INFO: 231680 events read in total (9077ms).
[22:32:26.302] <TB2> INFO: Test took 9765ms.
[22:32:26.561] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[22:32:26.561] <TB2> INFO: CalDel: 90 95 91 92 87 100 99 99 90 93 84 87 105 100 108 99
[22:32:26.561] <TB2> INFO: VthrComp: 51 51 51 53 51 51 51 53 53 51 51 51 53 51 53 51
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C0.dat
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C1.dat
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C2.dat
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C3.dat
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C4.dat
[22:32:26.564] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C5.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C6.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C7.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C8.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C9.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C10.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C11.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C12.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C13.dat
[22:32:26.565] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C14.dat
[22:32:26.566] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters_C15.dat
[22:32:26.566] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[22:32:26.566] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[22:32:26.566] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[22:32:26.566] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[22:32:26.566] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[22:32:26.700] <TB2> INFO: enter test to run
[22:32:26.700] <TB2> INFO: test: fulltest no parameter change
[22:32:26.700] <TB2> INFO: running: fulltest
[22:32:26.700] <TB2> INFO: ######################################################################
[22:32:26.700] <TB2> INFO: PixTestFullTest::doTest()
[22:32:26.700] <TB2> INFO: ######################################################################
[22:32:26.702] <TB2> INFO: ######################################################################
[22:32:26.702] <TB2> INFO: PixTestAlive::doTest()
[22:32:26.702] <TB2> INFO: ######################################################################
[22:32:26.703] <TB2> INFO: ----------------------------------------------------------------------
[22:32:26.703] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:26.703] <TB2> INFO: ----------------------------------------------------------------------
[22:32:26.936] <TB2> INFO: Expecting 41600 events.
[22:32:30.427] <TB2> INFO: 41600 events read in total (2900ms).
[22:32:30.427] <TB2> INFO: Test took 3723ms.
[22:32:30.652] <TB2> INFO: PixTestAlive::aliveTest() done
[22:32:30.652] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:32:30.653] <TB2> INFO: ----------------------------------------------------------------------
[22:32:30.653] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:30.653] <TB2> INFO: ----------------------------------------------------------------------
[22:32:30.886] <TB2> INFO: Expecting 41600 events.
[22:32:33.803] <TB2> INFO: 41600 events read in total (2325ms).
[22:32:33.804] <TB2> INFO: Test took 3149ms.
[22:32:33.804] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[22:32:34.041] <TB2> INFO: PixTestAlive::maskTest() done
[22:32:34.041] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:32:34.042] <TB2> INFO: ----------------------------------------------------------------------
[22:32:34.042] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[22:32:34.042] <TB2> INFO: ----------------------------------------------------------------------
[22:32:34.282] <TB2> INFO: Expecting 41600 events.
[22:32:37.818] <TB2> INFO: 41600 events read in total (2944ms).
[22:32:37.819] <TB2> INFO: Test took 3776ms.
[22:32:38.051] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[22:32:38.051] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[22:32:38.051] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[22:32:38.051] <TB2> INFO: Decoding statistics:
[22:32:38.051] <TB2> INFO: General information:
[22:32:38.051] <TB2> INFO: 16bit words read: 0
[22:32:38.051] <TB2> INFO: valid events total: 0
[22:32:38.051] <TB2> INFO: empty events: 0
[22:32:38.051] <TB2> INFO: valid events with pixels: 0
[22:32:38.051] <TB2> INFO: valid pixel hits: 0
[22:32:38.051] <TB2> INFO: Event errors: 0
[22:32:38.051] <TB2> INFO: start marker: 0
[22:32:38.052] <TB2> INFO: stop marker: 0
[22:32:38.052] <TB2> INFO: overflow: 0
[22:32:38.052] <TB2> INFO: invalid 5bit words: 0
[22:32:38.052] <TB2> INFO: invalid XOR eye diagram: 0
[22:32:38.052] <TB2> INFO: frame (failed synchr.): 0
[22:32:38.052] <TB2> INFO: idle data (no TBM trl): 0
[22:32:38.052] <TB2> INFO: no data (only TBM hdr): 0
[22:32:38.052] <TB2> INFO: TBM errors: 0
[22:32:38.052] <TB2> INFO: flawed TBM headers: 0
[22:32:38.052] <TB2> INFO: flawed TBM trailers: 0
[22:32:38.052] <TB2> INFO: event ID mismatches: 0
[22:32:38.052] <TB2> INFO: ROC errors: 0
[22:32:38.052] <TB2> INFO: missing ROC header(s): 0
[22:32:38.052] <TB2> INFO: misplaced readback start: 0
[22:32:38.052] <TB2> INFO: Pixel decoding errors: 0
[22:32:38.052] <TB2> INFO: pixel data incomplete: 0
[22:32:38.052] <TB2> INFO: pixel address: 0
[22:32:38.052] <TB2> INFO: pulse height fill bit: 0
[22:32:38.052] <TB2> INFO: buffer corruption: 0
[22:32:38.061] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:32:38.061] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[22:32:38.061] <TB2> INFO: ######################################################################
[22:32:38.061] <TB2> INFO: PixTestReadback::doTest()
[22:32:38.061] <TB2> INFO: ######################################################################
[22:32:38.061] <TB2> INFO: ----------------------------------------------------------------------
[22:32:38.061] <TB2> INFO: PixTestReadback::CalibrateVd()
[22:32:38.061] <TB2> INFO: ----------------------------------------------------------------------
[22:32:48.019] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:32:48.019] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:32:48.019] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:32:48.019] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:32:48.020] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:32:48.048] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:32:48.048] <TB2> INFO: ----------------------------------------------------------------------
[22:32:48.048] <TB2> INFO: PixTestReadback::CalibrateVa()
[22:32:48.048] <TB2> INFO: ----------------------------------------------------------------------
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:32:57.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:32:57.938] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:32:57.938] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:32:57.938] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:32:57.938] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:32:57.967] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:32:57.967] <TB2> INFO: ----------------------------------------------------------------------
[22:32:57.967] <TB2> INFO: PixTestReadback::readbackVbg()
[22:32:57.967] <TB2> INFO: ----------------------------------------------------------------------
[22:33:05.607] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:33:05.607] <TB2> INFO: ----------------------------------------------------------------------
[22:33:05.607] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[22:33:05.607] <TB2> INFO: ----------------------------------------------------------------------
[22:33:05.607] <TB2> INFO: Vbg will be calibrated using Vd calibration
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151calibrated Vbg = 1.18499 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.8calibrated Vbg = 1.17908 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.8calibrated Vbg = 1.17395 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150calibrated Vbg = 1.17293 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159calibrated Vbg = 1.17602 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.2calibrated Vbg = 1.1797 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.5calibrated Vbg = 1.17837 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.4calibrated Vbg = 1.18131 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.7calibrated Vbg = 1.1713 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 162.3calibrated Vbg = 1.17589 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.7calibrated Vbg = 1.16403 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 148calibrated Vbg = 1.15833 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.7calibrated Vbg = 1.16591 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 147.1calibrated Vbg = 1.17403 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 148.8calibrated Vbg = 1.17908 :::*/*/*/*/
[22:33:05.608] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 145.5calibrated Vbg = 1.17439 :::*/*/*/*/
[22:33:05.609] <TB2> INFO: ----------------------------------------------------------------------
[22:33:05.609] <TB2> INFO: PixTestReadback::CalibrateIa()
[22:33:05.610] <TB2> INFO: ----------------------------------------------------------------------
[22:35:45.889] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C0.dat
[22:35:45.889] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C1.dat
[22:35:45.889] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C2.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C3.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C4.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C5.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C6.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C7.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C8.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C9.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C10.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C11.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C12.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C13.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C14.dat
[22:35:45.890] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//readbackCal_C15.dat
[22:35:45.917] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[22:35:45.918] <TB2> INFO: PixTestReadback::doTest() done
[22:35:45.918] <TB2> INFO: Decoding statistics:
[22:35:45.918] <TB2> INFO: General information:
[22:35:45.918] <TB2> INFO: 16bit words read: 1536
[22:35:45.918] <TB2> INFO: valid events total: 256
[22:35:45.918] <TB2> INFO: empty events: 256
[22:35:45.918] <TB2> INFO: valid events with pixels: 0
[22:35:45.918] <TB2> INFO: valid pixel hits: 0
[22:35:45.918] <TB2> INFO: Event errors: 0
[22:35:45.918] <TB2> INFO: start marker: 0
[22:35:45.918] <TB2> INFO: stop marker: 0
[22:35:45.918] <TB2> INFO: overflow: 0
[22:35:45.918] <TB2> INFO: invalid 5bit words: 0
[22:35:45.918] <TB2> INFO: invalid XOR eye diagram: 0
[22:35:45.918] <TB2> INFO: frame (failed synchr.): 0
[22:35:45.918] <TB2> INFO: idle data (no TBM trl): 0
[22:35:45.918] <TB2> INFO: no data (only TBM hdr): 0
[22:35:45.918] <TB2> INFO: TBM errors: 0
[22:35:45.918] <TB2> INFO: flawed TBM headers: 0
[22:35:45.918] <TB2> INFO: flawed TBM trailers: 0
[22:35:45.918] <TB2> INFO: event ID mismatches: 0
[22:35:45.918] <TB2> INFO: ROC errors: 0
[22:35:45.918] <TB2> INFO: missing ROC header(s): 0
[22:35:45.918] <TB2> INFO: misplaced readback start: 0
[22:35:45.918] <TB2> INFO: Pixel decoding errors: 0
[22:35:45.918] <TB2> INFO: pixel data incomplete: 0
[22:35:45.918] <TB2> INFO: pixel address: 0
[22:35:45.918] <TB2> INFO: pulse height fill bit: 0
[22:35:45.918] <TB2> INFO: buffer corruption: 0
[22:35:45.953] <TB2> INFO: ######################################################################
[22:35:45.953] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[22:35:45.953] <TB2> INFO: ######################################################################
[22:35:45.956] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[22:35:45.968] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[22:35:45.968] <TB2> INFO: run 1 of 1
[22:35:46.199] <TB2> INFO: Expecting 3120000 events.
[22:36:16.586] <TB2> INFO: 667555 events read in total (29795ms).











[22:36:46.365] <TB2> INFO: 1336575 events read in total (59574ms).




















[22:37:16.370] <TB2> INFO: 2002010 events read in total (89579ms).











[22:37:46.461] <TB2> INFO: 2668310 events read in total (119670ms).
[22:38:06.660] <TB2> INFO: 3120000 events read in total (139869ms).
[22:38:06.715] <TB2> INFO: Test took 140748ms.
[22:38:33.146] <TB2> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[22:38:33.146] <TB2> INFO: number of dead bumps (per ROC): 0 8 1 0 0 0 0 0 0 0 0 0 3 0 2 2
[22:38:33.146] <TB2> INFO: separation cut (per ROC): 104 104 102 122 104 118 105 104 102 105 104 105 111 110 114 106
[22:38:33.146] <TB2> INFO: Decoding statistics:
[22:38:33.146] <TB2> INFO: General information:
[22:38:33.146] <TB2> INFO: 16bit words read: 0
[22:38:33.146] <TB2> INFO: valid events total: 0
[22:38:33.146] <TB2> INFO: empty events: 0
[22:38:33.146] <TB2> INFO: valid events with pixels: 0
[22:38:33.146] <TB2> INFO: valid pixel hits: 0
[22:38:33.146] <TB2> INFO: Event errors: 0
[22:38:33.146] <TB2> INFO: start marker: 0
[22:38:33.146] <TB2> INFO: stop marker: 0
[22:38:33.146] <TB2> INFO: overflow: 0
[22:38:33.146] <TB2> INFO: invalid 5bit words: 0
[22:38:33.146] <TB2> INFO: invalid XOR eye diagram: 0
[22:38:33.147] <TB2> INFO: frame (failed synchr.): 0
[22:38:33.147] <TB2> INFO: idle data (no TBM trl): 0
[22:38:33.147] <TB2> INFO: no data (only TBM hdr): 0
[22:38:33.147] <TB2> INFO: TBM errors: 0
[22:38:33.147] <TB2> INFO: flawed TBM headers: 0
[22:38:33.147] <TB2> INFO: flawed TBM trailers: 0
[22:38:33.147] <TB2> INFO: event ID mismatches: 0
[22:38:33.147] <TB2> INFO: ROC errors: 0
[22:38:33.147] <TB2> INFO: missing ROC header(s): 0
[22:38:33.147] <TB2> INFO: misplaced readback start: 0
[22:38:33.147] <TB2> INFO: Pixel decoding errors: 0
[22:38:33.147] <TB2> INFO: pixel data incomplete: 0
[22:38:33.147] <TB2> INFO: pixel address: 0
[22:38:33.147] <TB2> INFO: pulse height fill bit: 0
[22:38:33.147] <TB2> INFO: buffer corruption: 0
[22:38:33.184] <TB2> INFO: ######################################################################
[22:38:33.184] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:38:33.184] <TB2> INFO: ######################################################################
[22:38:33.184] <TB2> INFO: ----------------------------------------------------------------------
[22:38:33.184] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[22:38:33.184] <TB2> INFO: ----------------------------------------------------------------------
[22:38:33.185] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[22:38:33.195] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[22:38:33.195] <TB2> INFO: run 1 of 1
[22:38:33.426] <TB2> INFO: Expecting 36608000 events.
[22:38:56.815] <TB2> INFO: 701650 events read in total (22797ms).
[22:39:19.993] <TB2> INFO: 1387950 events read in total (45975ms).
[22:39:43.036] <TB2> INFO: 2071850 events read in total (69018ms).
[22:40:05.826] <TB2> INFO: 2755800 events read in total (91808ms).
[22:40:28.605] <TB2> INFO: 3438050 events read in total (114587ms).
[22:40:51.265] <TB2> INFO: 4122550 events read in total (137247ms).
[22:41:13.847] <TB2> INFO: 4804200 events read in total (159829ms).
[22:41:36.581] <TB2> INFO: 5487600 events read in total (182563ms).
[22:41:59.010] <TB2> INFO: 6167700 events read in total (204992ms).
[22:42:21.748] <TB2> INFO: 6851050 events read in total (227730ms).
[22:42:44.428] <TB2> INFO: 7529450 events read in total (250410ms).
[22:43:06.920] <TB2> INFO: 8208900 events read in total (272902ms).
[22:43:29.725] <TB2> INFO: 8888750 events read in total (295707ms).
[22:43:52.336] <TB2> INFO: 9569850 events read in total (318318ms).
[22:44:14.841] <TB2> INFO: 10248650 events read in total (340823ms).
[22:44:37.448] <TB2> INFO: 10928300 events read in total (363430ms).
[22:45:00.011] <TB2> INFO: 11605850 events read in total (385993ms).
[22:45:22.438] <TB2> INFO: 12282650 events read in total (408420ms).
[22:45:45.051] <TB2> INFO: 12959600 events read in total (431033ms).
[22:46:07.434] <TB2> INFO: 13636750 events read in total (453416ms).
[22:46:30.221] <TB2> INFO: 14314150 events read in total (476203ms).
[22:46:52.808] <TB2> INFO: 14988950 events read in total (498790ms).
[22:47:15.310] <TB2> INFO: 15665000 events read in total (521292ms).
[22:47:37.966] <TB2> INFO: 16340450 events read in total (543948ms).
[22:48:00.548] <TB2> INFO: 17016500 events read in total (566530ms).
[22:48:23.092] <TB2> INFO: 17689800 events read in total (589074ms).
[22:48:45.649] <TB2> INFO: 18364150 events read in total (611631ms).
[22:49:07.875] <TB2> INFO: 19035200 events read in total (633857ms).
[22:49:30.348] <TB2> INFO: 19708650 events read in total (656330ms).
[22:49:52.811] <TB2> INFO: 20378050 events read in total (678793ms).
[22:50:15.426] <TB2> INFO: 21051900 events read in total (701408ms).
[22:50:37.858] <TB2> INFO: 21723350 events read in total (723840ms).
[22:51:00.416] <TB2> INFO: 22393500 events read in total (746398ms).
[22:51:22.927] <TB2> INFO: 23062850 events read in total (768909ms).
[22:51:45.482] <TB2> INFO: 23733700 events read in total (791464ms).
[22:52:08.279] <TB2> INFO: 24406100 events read in total (814261ms).
[22:52:31.055] <TB2> INFO: 25077300 events read in total (837037ms).
[22:52:53.693] <TB2> INFO: 25748100 events read in total (859675ms).
[22:53:16.431] <TB2> INFO: 26420750 events read in total (882413ms).
[22:53:38.872] <TB2> INFO: 27091950 events read in total (904854ms).
[22:54:01.450] <TB2> INFO: 27761800 events read in total (927432ms).
[22:54:24.085] <TB2> INFO: 28431550 events read in total (950067ms).
[22:54:46.677] <TB2> INFO: 29101950 events read in total (972659ms).
[22:55:09.323] <TB2> INFO: 29773150 events read in total (995305ms).
[22:55:31.734] <TB2> INFO: 30443800 events read in total (1017716ms).
[22:55:54.114] <TB2> INFO: 31113650 events read in total (1040096ms).
[22:56:16.717] <TB2> INFO: 31783150 events read in total (1062699ms).
[22:56:39.178] <TB2> INFO: 32454100 events read in total (1085160ms).
[22:57:01.715] <TB2> INFO: 33124100 events read in total (1107697ms).
[22:57:24.270] <TB2> INFO: 33797550 events read in total (1130252ms).
[22:57:46.766] <TB2> INFO: 34468950 events read in total (1152748ms).
[22:58:09.175] <TB2> INFO: 35141050 events read in total (1175157ms).
[22:58:31.682] <TB2> INFO: 35813650 events read in total (1197664ms).
[22:58:54.699] <TB2> INFO: 36500400 events read in total (1220681ms).
[22:58:58.564] <TB2> INFO: 36608000 events read in total (1224546ms).
[22:58:58.615] <TB2> INFO: Test took 1225420ms.
[22:58:58.947] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:00.746] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:02.362] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:03.780] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:05.372] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:06.825] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:08.319] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:09.750] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:11.233] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:13.163] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:15.098] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:17.049] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:18.836] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:20.719] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:22.447] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:24.255] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[22:59:26.240] <TB2> INFO: PixTestScurves::scurves() done
[22:59:26.240] <TB2> INFO: Vcal mean: 119.36 117.01 111.67 130.89 124.19 126.51 125.35 128.04 124.07 124.96 123.23 118.98 131.79 130.81 131.90 123.94
[22:59:26.240] <TB2> INFO: Vcal RMS: 5.79 5.76 4.52 6.04 5.71 6.13 6.39 6.19 6.65 6.35 6.41 5.82 5.99 6.10 6.13 5.87
[22:59:26.240] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1253 seconds
[22:59:26.240] <TB2> INFO: Decoding statistics:
[22:59:26.240] <TB2> INFO: General information:
[22:59:26.240] <TB2> INFO: 16bit words read: 0
[22:59:26.240] <TB2> INFO: valid events total: 0
[22:59:26.240] <TB2> INFO: empty events: 0
[22:59:26.240] <TB2> INFO: valid events with pixels: 0
[22:59:26.240] <TB2> INFO: valid pixel hits: 0
[22:59:26.240] <TB2> INFO: Event errors: 0
[22:59:26.240] <TB2> INFO: start marker: 0
[22:59:26.240] <TB2> INFO: stop marker: 0
[22:59:26.240] <TB2> INFO: overflow: 0
[22:59:26.240] <TB2> INFO: invalid 5bit words: 0
[22:59:26.240] <TB2> INFO: invalid XOR eye diagram: 0
[22:59:26.240] <TB2> INFO: frame (failed synchr.): 0
[22:59:26.240] <TB2> INFO: idle data (no TBM trl): 0
[22:59:26.240] <TB2> INFO: no data (only TBM hdr): 0
[22:59:26.240] <TB2> INFO: TBM errors: 0
[22:59:26.240] <TB2> INFO: flawed TBM headers: 0
[22:59:26.240] <TB2> INFO: flawed TBM trailers: 0
[22:59:26.240] <TB2> INFO: event ID mismatches: 0
[22:59:26.240] <TB2> INFO: ROC errors: 0
[22:59:26.240] <TB2> INFO: missing ROC header(s): 0
[22:59:26.240] <TB2> INFO: misplaced readback start: 0
[22:59:26.240] <TB2> INFO: Pixel decoding errors: 0
[22:59:26.240] <TB2> INFO: pixel data incomplete: 0
[22:59:26.240] <TB2> INFO: pixel address: 0
[22:59:26.240] <TB2> INFO: pulse height fill bit: 0
[22:59:26.240] <TB2> INFO: buffer corruption: 0
[22:59:26.305] <TB2> INFO: ######################################################################
[22:59:26.305] <TB2> INFO: PixTestTrim::doTest()
[22:59:26.305] <TB2> INFO: ######################################################################
[22:59:26.306] <TB2> INFO: ----------------------------------------------------------------------
[22:59:26.306] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[22:59:26.306] <TB2> INFO: ----------------------------------------------------------------------
[22:59:26.347] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[22:59:26.347] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[22:59:26.358] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[22:59:26.358] <TB2> INFO: run 1 of 1
[22:59:26.600] <TB2> INFO: Expecting 5025280 events.
[22:59:57.042] <TB2> INFO: 835912 events read in total (29849ms).
[23:00:26.785] <TB2> INFO: 1670328 events read in total (59592ms).
[23:00:56.749] <TB2> INFO: 2503000 events read in total (89556ms).
[23:01:26.260] <TB2> INFO: 3331800 events read in total (119067ms).
[23:01:56.381] <TB2> INFO: 4157664 events read in total (149189ms).
[23:02:25.847] <TB2> INFO: 4982152 events read in total (178654ms).
[23:02:27.997] <TB2> INFO: 5025280 events read in total (180804ms).
[23:02:28.034] <TB2> INFO: Test took 181676ms.
[23:02:44.881] <TB2> INFO: ROC 0 VthrComp = 127
[23:02:44.881] <TB2> INFO: ROC 1 VthrComp = 110
[23:02:44.881] <TB2> INFO: ROC 2 VthrComp = 111
[23:02:44.881] <TB2> INFO: ROC 3 VthrComp = 131
[23:02:44.881] <TB2> INFO: ROC 4 VthrComp = 120
[23:02:44.881] <TB2> INFO: ROC 5 VthrComp = 125
[23:02:44.881] <TB2> INFO: ROC 6 VthrComp = 124
[23:02:44.882] <TB2> INFO: ROC 7 VthrComp = 123
[23:02:44.882] <TB2> INFO: ROC 8 VthrComp = 126
[23:02:44.882] <TB2> INFO: ROC 9 VthrComp = 123
[23:02:44.882] <TB2> INFO: ROC 10 VthrComp = 121
[23:02:44.882] <TB2> INFO: ROC 11 VthrComp = 123
[23:02:44.882] <TB2> INFO: ROC 12 VthrComp = 128
[23:02:44.882] <TB2> INFO: ROC 13 VthrComp = 132
[23:02:44.882] <TB2> INFO: ROC 14 VthrComp = 133
[23:02:44.882] <TB2> INFO: ROC 15 VthrComp = 126
[23:02:45.155] <TB2> INFO: Expecting 41600 events.
[23:02:48.712] <TB2> INFO: 41600 events read in total (2966ms).
[23:02:48.712] <TB2> INFO: Test took 3828ms.
[23:02:48.721] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:02:48.721] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:02:48.729] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:02:48.729] <TB2> INFO: run 1 of 1
[23:02:49.007] <TB2> INFO: Expecting 5025280 events.
[23:03:15.161] <TB2> INFO: 590824 events read in total (25562ms).
[23:03:40.540] <TB2> INFO: 1180696 events read in total (50941ms).
[23:04:05.597] <TB2> INFO: 1770640 events read in total (75998ms).
[23:04:30.653] <TB2> INFO: 2361240 events read in total (101054ms).
[23:04:55.667] <TB2> INFO: 2949696 events read in total (126068ms).
[23:05:20.667] <TB2> INFO: 3537048 events read in total (151068ms).
[23:05:45.602] <TB2> INFO: 4123456 events read in total (176003ms).
[23:06:11.389] <TB2> INFO: 4709024 events read in total (201790ms).
[23:06:25.136] <TB2> INFO: 5025280 events read in total (215537ms).
[23:06:25.193] <TB2> INFO: Test took 216463ms.
[23:06:49.765] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 57.0394 for pixel 7/11 mean/min/max = 44.0289/30.9396/57.1181
[23:06:49.765] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 67.4242 for pixel 15/9 mean/min/max = 52.8419/38.2243/67.4594
[23:06:49.765] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.5884 for pixel 19/73 mean/min/max = 47.7934/34.956/60.6309
[23:06:49.766] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 62.5496 for pixel 0/75 mean/min/max = 48.4574/34.3363/62.5785
[23:06:49.766] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 61.7467 for pixel 20/24 mean/min/max = 47.7073/33.5611/61.8536
[23:06:49.766] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.77 for pixel 5/3 mean/min/max = 46.2356/31.6918/60.7794
[23:06:49.767] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 61.2992 for pixel 9/0 mean/min/max = 46.5299/31.7459/61.3139
[23:06:49.767] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.5789 for pixel 40/62 mean/min/max = 47.0533/32.3737/61.733
[23:06:49.767] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 63.6949 for pixel 4/4 mean/min/max = 47.7016/31.6908/63.7124
[23:06:49.768] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 61.3839 for pixel 0/2 mean/min/max = 46.695/31.961/61.429
[23:06:49.768] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 62.5397 for pixel 8/1 mean/min/max = 47.9796/32.8556/63.1037
[23:06:49.768] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.801 for pixel 49/5 mean/min/max = 45.9812/33.0661/58.8962
[23:06:49.769] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.2486 for pixel 38/61 mean/min/max = 46.4765/31.6465/61.3064
[23:06:49.769] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.645 for pixel 7/12 mean/min/max = 45.9203/32.1618/59.6789
[23:06:49.769] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.5705 for pixel 9/6 mean/min/max = 47.4138/33.0712/61.7565
[23:06:49.770] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.8619 for pixel 8/0 mean/min/max = 46.5009/33.1137/59.8881
[23:06:49.770] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:06:49.859] <TB2> INFO: Expecting 411648 events.
[23:06:59.064] <TB2> INFO: 411648 events read in total (8614ms).
[23:06:59.071] <TB2> INFO: Expecting 411648 events.
[23:07:08.228] <TB2> INFO: 411648 events read in total (8754ms).
[23:07:08.237] <TB2> INFO: Expecting 411648 events.
[23:07:17.272] <TB2> INFO: 411648 events read in total (8632ms).
[23:07:17.283] <TB2> INFO: Expecting 411648 events.
[23:07:26.304] <TB2> INFO: 411648 events read in total (8618ms).
[23:07:26.320] <TB2> INFO: Expecting 411648 events.
[23:07:35.332] <TB2> INFO: 411648 events read in total (8609ms).
[23:07:35.349] <TB2> INFO: Expecting 411648 events.
[23:07:44.362] <TB2> INFO: 411648 events read in total (8610ms).
[23:07:44.381] <TB2> INFO: Expecting 411648 events.
[23:07:53.382] <TB2> INFO: 411648 events read in total (8598ms).
[23:07:53.403] <TB2> INFO: Expecting 411648 events.
[23:08:02.411] <TB2> INFO: 411648 events read in total (8605ms).
[23:08:02.443] <TB2> INFO: Expecting 411648 events.
[23:08:11.500] <TB2> INFO: 411648 events read in total (8654ms).
[23:08:11.535] <TB2> INFO: Expecting 411648 events.
[23:08:20.487] <TB2> INFO: 411648 events read in total (8549ms).
[23:08:20.525] <TB2> INFO: Expecting 411648 events.
[23:08:29.600] <TB2> INFO: 411648 events read in total (8672ms).
[23:08:29.632] <TB2> INFO: Expecting 411648 events.
[23:08:38.682] <TB2> INFO: 411648 events read in total (8647ms).
[23:08:38.727] <TB2> INFO: Expecting 411648 events.
[23:08:47.718] <TB2> INFO: 411648 events read in total (8588ms).
[23:08:47.755] <TB2> INFO: Expecting 411648 events.
[23:08:56.853] <TB2> INFO: 411648 events read in total (8695ms).
[23:08:56.904] <TB2> INFO: Expecting 411648 events.
[23:09:06.063] <TB2> INFO: 411648 events read in total (8756ms).
[23:09:06.104] <TB2> INFO: Expecting 411648 events.
[23:09:15.276] <TB2> INFO: 411648 events read in total (8769ms).
[23:09:15.344] <TB2> INFO: Test took 145574ms.
[23:09:15.996] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[23:09:16.006] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:09:16.006] <TB2> INFO: run 1 of 1
[23:09:16.238] <TB2> INFO: Expecting 5025280 events.
[23:09:42.330] <TB2> INFO: 592984 events read in total (25501ms).
[23:10:07.696] <TB2> INFO: 1185352 events read in total (50867ms).
[23:10:33.770] <TB2> INFO: 1777144 events read in total (76942ms).
[23:10:59.281] <TB2> INFO: 2367000 events read in total (102452ms).
[23:11:25.073] <TB2> INFO: 2959584 events read in total (128245ms).
[23:11:50.411] <TB2> INFO: 3551464 events read in total (153582ms).
[23:12:16.076] <TB2> INFO: 4144872 events read in total (179247ms).
[23:12:42.751] <TB2> INFO: 4740568 events read in total (205922ms).
[23:12:55.605] <TB2> INFO: 5025280 events read in total (218776ms).
[23:12:55.737] <TB2> INFO: Test took 219732ms.
[23:13:19.842] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 141.298724
[23:13:20.076] <TB2> INFO: Expecting 208000 events.
[23:13:29.466] <TB2> INFO: 208000 events read in total (8799ms).
[23:13:29.468] <TB2> INFO: Test took 9625ms.
[23:13:29.515] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 151 (-1/-1) hits flags = 528 (plus default)
[23:13:29.526] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:13:29.526] <TB2> INFO: run 1 of 1
[23:13:29.804] <TB2> INFO: Expecting 5025280 events.
[23:13:55.868] <TB2> INFO: 586768 events read in total (25473ms).
[23:14:21.315] <TB2> INFO: 1173632 events read in total (50921ms).
[23:14:46.482] <TB2> INFO: 1760240 events read in total (76087ms).
[23:15:11.903] <TB2> INFO: 2347304 events read in total (101508ms).
[23:15:37.166] <TB2> INFO: 2934112 events read in total (126771ms).
[23:16:02.423] <TB2> INFO: 3520232 events read in total (152028ms).
[23:16:27.719] <TB2> INFO: 4105952 events read in total (177324ms).
[23:16:53.408] <TB2> INFO: 4691464 events read in total (203013ms).
[23:17:08.228] <TB2> INFO: 5025280 events read in total (217833ms).
[23:17:08.320] <TB2> INFO: Test took 218795ms.
[23:17:34.422] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 25.787869 .. 46.017137
[23:17:34.684] <TB2> INFO: Expecting 208000 events.
[23:17:44.615] <TB2> INFO: 208000 events read in total (9339ms).
[23:17:44.616] <TB2> INFO: Test took 10193ms.
[23:17:44.662] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[23:17:44.670] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:17:44.670] <TB2> INFO: run 1 of 1
[23:17:44.948] <TB2> INFO: Expecting 1397760 events.
[23:18:13.769] <TB2> INFO: 670128 events read in total (28229ms).
[23:18:42.248] <TB2> INFO: 1339216 events read in total (56708ms).
[23:18:44.000] <TB2> INFO: 1397760 events read in total (59461ms).
[23:18:45.037] <TB2> INFO: Test took 60368ms.
[23:18:57.998] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 28.655722 .. 48.408099
[23:18:58.255] <TB2> INFO: Expecting 208000 events.
[23:19:07.998] <TB2> INFO: 208000 events read in total (9152ms).
[23:19:07.999] <TB2> INFO: Test took 9998ms.
[23:19:08.046] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 58 (-1/-1) hits flags = 528 (plus default)
[23:19:08.056] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:19:08.056] <TB2> INFO: run 1 of 1
[23:19:08.334] <TB2> INFO: Expecting 1364480 events.
[23:19:36.065] <TB2> INFO: 648632 events read in total (27139ms).
[23:20:03.252] <TB2> INFO: 1295384 events read in total (54326ms).
[23:20:06.478] <TB2> INFO: 1364480 events read in total (57552ms).
[23:20:06.504] <TB2> INFO: Test took 58448ms.
[23:20:20.201] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 26.488536 .. 50.145359
[23:20:20.520] <TB2> INFO: Expecting 208000 events.
[23:20:30.411] <TB2> INFO: 208000 events read in total (9299ms).
[23:20:30.412] <TB2> INFO: Test took 10210ms.
[23:20:30.458] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 60 (-1/-1) hits flags = 528 (plus default)
[23:20:30.468] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:20:30.469] <TB2> INFO: run 1 of 1
[23:20:30.747] <TB2> INFO: Expecting 1497600 events.
[23:20:58.523] <TB2> INFO: 646120 events read in total (27185ms).
[23:21:25.611] <TB2> INFO: 1292024 events read in total (54273ms).
[23:21:34.981] <TB2> INFO: 1497600 events read in total (63643ms).
[23:21:35.012] <TB2> INFO: Test took 64544ms.
[23:21:49.336] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[23:21:49.336] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[23:21:49.347] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:21:49.347] <TB2> INFO: run 1 of 1
[23:21:49.580] <TB2> INFO: Expecting 1364480 events.
[23:22:18.219] <TB2> INFO: 668856 events read in total (28047ms).
[23:22:45.623] <TB2> INFO: 1336536 events read in total (55451ms).
[23:22:47.344] <TB2> INFO: 1364480 events read in total (57173ms).
[23:22:47.370] <TB2> INFO: Test took 58023ms.
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:23:01.529] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:23:01.530] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:23:01.531] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:23:01.531] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:23:01.531] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C0.dat
[23:23:01.538] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C1.dat
[23:23:01.546] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C2.dat
[23:23:01.551] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C3.dat
[23:23:01.556] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C4.dat
[23:23:01.563] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C5.dat
[23:23:01.570] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C6.dat
[23:23:01.577] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C7.dat
[23:23:01.583] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C8.dat
[23:23:01.589] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C9.dat
[23:23:01.594] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C10.dat
[23:23:01.600] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C11.dat
[23:23:01.605] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C12.dat
[23:23:01.610] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C13.dat
[23:23:01.616] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C14.dat
[23:23:01.621] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters35_C15.dat
[23:23:01.627] <TB2> INFO: PixTestTrim::trimTest() done
[23:23:01.627] <TB2> INFO: vtrim: 134 145 126 145 134 127 139 143 141 133 154 129 131 136 137 131
[23:23:01.627] <TB2> INFO: vthrcomp: 127 110 111 131 120 125 124 123 126 123 121 123 128 132 133 126
[23:23:01.627] <TB2> INFO: vcal mean: 35.02 35.63 35.04 35.11 35.16 35.00 35.08 35.28 35.14 35.02 35.60 35.05 35.27 34.98 35.00 35.06
[23:23:01.627] <TB2> INFO: vcal RMS: 1.31 1.95 1.08 1.46 1.30 1.19 1.22 1.41 1.23 1.23 1.75 1.02 1.47 1.05 1.29 1.14
[23:23:01.627] <TB2> INFO: bits mean: 10.76 8.41 8.80 9.34 9.49 9.64 10.00 10.48 9.50 9.64 9.68 9.67 10.55 9.66 9.56 9.74
[23:23:01.627] <TB2> INFO: bits RMS: 2.34 2.24 2.51 2.35 2.54 2.70 2.49 2.18 2.65 2.61 2.60 2.52 2.24 2.63 2.53 2.47
[23:23:01.633] <TB2> INFO: ----------------------------------------------------------------------
[23:23:01.633] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[23:23:01.634] <TB2> INFO: ----------------------------------------------------------------------
[23:23:01.636] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:23:01.645] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:23:01.645] <TB2> INFO: run 1 of 1
[23:23:01.906] <TB2> INFO: Expecting 4160000 events.
[23:23:34.516] <TB2> INFO: 774880 events read in total (32018ms).
[23:24:06.525] <TB2> INFO: 1539935 events read in total (64027ms).
[23:24:38.430] <TB2> INFO: 2298635 events read in total (95932ms).
[23:25:10.526] <TB2> INFO: 3053880 events read in total (128028ms).
[23:25:42.342] <TB2> INFO: 3807310 events read in total (159844ms).
[23:25:57.428] <TB2> INFO: 4160000 events read in total (174930ms).
[23:25:57.474] <TB2> INFO: Test took 175829ms.
[23:26:24.494] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[23:26:24.505] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:26:24.505] <TB2> INFO: run 1 of 1
[23:26:24.737] <TB2> INFO: Expecting 4326400 events.
[23:26:56.750] <TB2> INFO: 736100 events read in total (31422ms).
[23:27:27.752] <TB2> INFO: 1466070 events read in total (62424ms).
[23:27:58.578] <TB2> INFO: 2191880 events read in total (93251ms).
[23:28:29.440] <TB2> INFO: 2913195 events read in total (124112ms).
[23:29:00.319] <TB2> INFO: 3633870 events read in total (154991ms).
[23:29:29.849] <TB2> INFO: 4326400 events read in total (184521ms).
[23:29:29.918] <TB2> INFO: Test took 185413ms.
[23:30:00.513] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[23:30:00.524] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:30:00.524] <TB2> INFO: run 1 of 1
[23:30:00.757] <TB2> INFO: Expecting 4180800 events.
[23:30:32.682] <TB2> INFO: 746390 events read in total (31334ms).
[23:31:04.028] <TB2> INFO: 1485825 events read in total (62680ms).
[23:31:35.104] <TB2> INFO: 2220475 events read in total (93757ms).
[23:32:06.386] <TB2> INFO: 2951225 events read in total (125038ms).
[23:32:37.581] <TB2> INFO: 3680895 events read in total (156233ms).
[23:32:59.451] <TB2> INFO: 4180800 events read in total (178103ms).
[23:32:59.516] <TB2> INFO: Test took 178991ms.
[23:33:27.579] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[23:33:27.591] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:33:27.591] <TB2> INFO: run 1 of 1
[23:33:27.877] <TB2> INFO: Expecting 4139200 events.
[23:34:00.064] <TB2> INFO: 749430 events read in total (31596ms).
[23:34:31.629] <TB2> INFO: 1491775 events read in total (63161ms).
[23:35:02.691] <TB2> INFO: 2229540 events read in total (94223ms).
[23:35:33.888] <TB2> INFO: 2962910 events read in total (125420ms).
[23:36:05.160] <TB2> INFO: 3695380 events read in total (156692ms).
[23:36:24.575] <TB2> INFO: 4139200 events read in total (176107ms).
[23:36:24.647] <TB2> INFO: Test took 177056ms.
[23:36:52.830] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[23:36:52.840] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[23:36:52.840] <TB2> INFO: run 1 of 1
[23:36:53.074] <TB2> INFO: Expecting 4160000 events.
[23:37:24.962] <TB2> INFO: 748140 events read in total (31296ms).
[23:37:56.141] <TB2> INFO: 1489420 events read in total (62475ms).
[23:38:27.604] <TB2> INFO: 2225760 events read in total (93938ms).
[23:38:59.080] <TB2> INFO: 2957935 events read in total (125414ms).
[23:39:30.215] <TB2> INFO: 3689290 events read in total (156549ms).
[23:39:50.476] <TB2> INFO: 4160000 events read in total (176810ms).
[23:39:50.533] <TB2> INFO: Test took 177693ms.
[23:40:19.533] <TB2> INFO: PixTestTrim::trimBitTest() done
[23:40:19.534] <TB2> INFO: PixTestTrim::doTest() done, duration: 2453 seconds
[23:40:19.534] <TB2> INFO: Decoding statistics:
[23:40:19.534] <TB2> INFO: General information:
[23:40:19.534] <TB2> INFO: 16bit words read: 0
[23:40:19.534] <TB2> INFO: valid events total: 0
[23:40:19.534] <TB2> INFO: empty events: 0
[23:40:19.534] <TB2> INFO: valid events with pixels: 0
[23:40:19.534] <TB2> INFO: valid pixel hits: 0
[23:40:19.534] <TB2> INFO: Event errors: 0
[23:40:19.534] <TB2> INFO: start marker: 0
[23:40:19.534] <TB2> INFO: stop marker: 0
[23:40:19.534] <TB2> INFO: overflow: 0
[23:40:19.534] <TB2> INFO: invalid 5bit words: 0
[23:40:19.534] <TB2> INFO: invalid XOR eye diagram: 0
[23:40:19.534] <TB2> INFO: frame (failed synchr.): 0
[23:40:19.534] <TB2> INFO: idle data (no TBM trl): 0
[23:40:19.534] <TB2> INFO: no data (only TBM hdr): 0
[23:40:19.534] <TB2> INFO: TBM errors: 0
[23:40:19.534] <TB2> INFO: flawed TBM headers: 0
[23:40:19.534] <TB2> INFO: flawed TBM trailers: 0
[23:40:19.534] <TB2> INFO: event ID mismatches: 0
[23:40:19.534] <TB2> INFO: ROC errors: 0
[23:40:19.534] <TB2> INFO: missing ROC header(s): 0
[23:40:19.534] <TB2> INFO: misplaced readback start: 0
[23:40:19.534] <TB2> INFO: Pixel decoding errors: 0
[23:40:19.534] <TB2> INFO: pixel data incomplete: 0
[23:40:19.534] <TB2> INFO: pixel address: 0
[23:40:19.534] <TB2> INFO: pulse height fill bit: 0
[23:40:19.534] <TB2> INFO: buffer corruption: 0
[23:40:20.212] <TB2> INFO: ######################################################################
[23:40:20.212] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[23:40:20.212] <TB2> INFO: ######################################################################
[23:40:20.447] <TB2> INFO: Expecting 41600 events.
[23:40:23.927] <TB2> INFO: 41600 events read in total (2888ms).
[23:40:23.928] <TB2> INFO: Test took 3714ms.
[23:40:24.362] <TB2> INFO: Expecting 41600 events.
[23:40:27.843] <TB2> INFO: 41600 events read in total (2889ms).
[23:40:27.843] <TB2> INFO: Test took 3713ms.
[23:40:28.133] <TB2> INFO: Expecting 41600 events.
[23:40:31.610] <TB2> INFO: 41600 events read in total (2885ms).
[23:40:31.611] <TB2> INFO: Test took 3743ms.
[23:40:31.900] <TB2> INFO: Expecting 41600 events.
[23:40:35.471] <TB2> INFO: 41600 events read in total (2979ms).
[23:40:35.472] <TB2> INFO: Test took 3836ms.
[23:40:35.763] <TB2> INFO: Expecting 41600 events.
[23:40:39.212] <TB2> INFO: 41600 events read in total (2858ms).
[23:40:39.213] <TB2> INFO: Test took 3718ms.
[23:40:39.501] <TB2> INFO: Expecting 41600 events.
[23:40:42.951] <TB2> INFO: 41600 events read in total (2859ms).
[23:40:42.952] <TB2> INFO: Test took 3716ms.
[23:40:43.243] <TB2> INFO: Expecting 41600 events.
[23:40:46.724] <TB2> INFO: 41600 events read in total (2890ms).
[23:40:46.725] <TB2> INFO: Test took 3747ms.
[23:40:47.018] <TB2> INFO: Expecting 41600 events.
[23:40:50.551] <TB2> INFO: 41600 events read in total (2942ms).
[23:40:50.551] <TB2> INFO: Test took 3798ms.
[23:40:50.840] <TB2> INFO: Expecting 41600 events.
[23:40:54.324] <TB2> INFO: 41600 events read in total (2893ms).
[23:40:54.325] <TB2> INFO: Test took 3750ms.
[23:40:54.631] <TB2> INFO: Expecting 41600 events.
[23:40:58.167] <TB2> INFO: 41600 events read in total (2944ms).
[23:40:58.168] <TB2> INFO: Test took 3820ms.
[23:40:58.492] <TB2> INFO: Expecting 41600 events.
[23:41:01.985] <TB2> INFO: 41600 events read in total (2901ms).
[23:41:01.986] <TB2> INFO: Test took 3794ms.
[23:41:02.277] <TB2> INFO: Expecting 41600 events.
[23:41:05.772] <TB2> INFO: 41600 events read in total (2904ms).
[23:41:05.772] <TB2> INFO: Test took 3761ms.
[23:41:06.074] <TB2> INFO: Expecting 41600 events.
[23:41:09.533] <TB2> INFO: 41600 events read in total (2867ms).
[23:41:09.534] <TB2> INFO: Test took 3738ms.
[23:41:09.822] <TB2> INFO: Expecting 41600 events.
[23:41:13.302] <TB2> INFO: 41600 events read in total (2888ms).
[23:41:13.303] <TB2> INFO: Test took 3745ms.
[23:41:13.594] <TB2> INFO: Expecting 41600 events.
[23:41:17.125] <TB2> INFO: 41600 events read in total (2939ms).
[23:41:17.126] <TB2> INFO: Test took 3797ms.
[23:41:17.414] <TB2> INFO: Expecting 41600 events.
[23:41:20.972] <TB2> INFO: 41600 events read in total (2966ms).
[23:41:20.973] <TB2> INFO: Test took 3824ms.
[23:41:21.268] <TB2> INFO: Expecting 41600 events.
[23:41:24.869] <TB2> INFO: 41600 events read in total (3009ms).
[23:41:24.870] <TB2> INFO: Test took 3874ms.
[23:41:25.161] <TB2> INFO: Expecting 41600 events.
[23:41:28.703] <TB2> INFO: 41600 events read in total (2951ms).
[23:41:28.704] <TB2> INFO: Test took 3808ms.
[23:41:28.993] <TB2> INFO: Expecting 41600 events.
[23:41:32.439] <TB2> INFO: 41600 events read in total (2855ms).
[23:41:32.440] <TB2> INFO: Test took 3712ms.
[23:41:32.728] <TB2> INFO: Expecting 41600 events.
[23:41:36.247] <TB2> INFO: 41600 events read in total (2927ms).
[23:41:36.247] <TB2> INFO: Test took 3784ms.
[23:41:36.536] <TB2> INFO: Expecting 41600 events.
[23:41:40.036] <TB2> INFO: 41600 events read in total (2909ms).
[23:41:40.037] <TB2> INFO: Test took 3766ms.
[23:41:40.326] <TB2> INFO: Expecting 41600 events.
[23:41:43.891] <TB2> INFO: 41600 events read in total (2974ms).
[23:41:43.892] <TB2> INFO: Test took 3831ms.
[23:41:44.180] <TB2> INFO: Expecting 41600 events.
[23:41:47.689] <TB2> INFO: 41600 events read in total (2917ms).
[23:41:47.689] <TB2> INFO: Test took 3773ms.
[23:41:47.977] <TB2> INFO: Expecting 41600 events.
[23:41:51.430] <TB2> INFO: 41600 events read in total (2861ms).
[23:41:51.430] <TB2> INFO: Test took 3717ms.
[23:41:51.719] <TB2> INFO: Expecting 41600 events.
[23:41:55.247] <TB2> INFO: 41600 events read in total (2937ms).
[23:41:55.247] <TB2> INFO: Test took 3793ms.
[23:41:55.536] <TB2> INFO: Expecting 41600 events.
[23:41:59.049] <TB2> INFO: 41600 events read in total (2922ms).
[23:41:59.050] <TB2> INFO: Test took 3779ms.
[23:41:59.338] <TB2> INFO: Expecting 41600 events.
[23:42:02.878] <TB2> INFO: 41600 events read in total (2948ms).
[23:42:02.879] <TB2> INFO: Test took 3805ms.
[23:42:03.167] <TB2> INFO: Expecting 41600 events.
[23:42:06.690] <TB2> INFO: 41600 events read in total (2931ms).
[23:42:06.691] <TB2> INFO: Test took 3788ms.
[23:42:06.979] <TB2> INFO: Expecting 41600 events.
[23:42:10.494] <TB2> INFO: 41600 events read in total (2924ms).
[23:42:10.495] <TB2> INFO: Test took 3781ms.
[23:42:10.788] <TB2> INFO: Expecting 41600 events.
[23:42:14.268] <TB2> INFO: 41600 events read in total (2889ms).
[23:42:14.269] <TB2> INFO: Test took 3746ms.
[23:42:14.558] <TB2> INFO: Expecting 2560 events.
[23:42:15.440] <TB2> INFO: 2560 events read in total (291ms).
[23:42:15.440] <TB2> INFO: Test took 1159ms.
[23:42:15.748] <TB2> INFO: Expecting 2560 events.
[23:42:16.629] <TB2> INFO: 2560 events read in total (290ms).
[23:42:16.629] <TB2> INFO: Test took 1189ms.
[23:42:16.937] <TB2> INFO: Expecting 2560 events.
[23:42:17.825] <TB2> INFO: 2560 events read in total (295ms).
[23:42:17.825] <TB2> INFO: Test took 1195ms.
[23:42:18.133] <TB2> INFO: Expecting 2560 events.
[23:42:19.015] <TB2> INFO: 2560 events read in total (291ms).
[23:42:19.016] <TB2> INFO: Test took 1191ms.
[23:42:19.323] <TB2> INFO: Expecting 2560 events.
[23:42:20.205] <TB2> INFO: 2560 events read in total (290ms).
[23:42:20.205] <TB2> INFO: Test took 1189ms.
[23:42:20.513] <TB2> INFO: Expecting 2560 events.
[23:42:21.392] <TB2> INFO: 2560 events read in total (287ms).
[23:42:21.393] <TB2> INFO: Test took 1187ms.
[23:42:21.701] <TB2> INFO: Expecting 2560 events.
[23:42:22.579] <TB2> INFO: 2560 events read in total (287ms).
[23:42:22.579] <TB2> INFO: Test took 1186ms.
[23:42:22.887] <TB2> INFO: Expecting 2560 events.
[23:42:23.765] <TB2> INFO: 2560 events read in total (286ms).
[23:42:23.765] <TB2> INFO: Test took 1186ms.
[23:42:24.073] <TB2> INFO: Expecting 2560 events.
[23:42:24.955] <TB2> INFO: 2560 events read in total (290ms).
[23:42:24.955] <TB2> INFO: Test took 1189ms.
[23:42:25.263] <TB2> INFO: Expecting 2560 events.
[23:42:26.146] <TB2> INFO: 2560 events read in total (291ms).
[23:42:26.146] <TB2> INFO: Test took 1190ms.
[23:42:26.454] <TB2> INFO: Expecting 2560 events.
[23:42:27.333] <TB2> INFO: 2560 events read in total (288ms).
[23:42:27.333] <TB2> INFO: Test took 1187ms.
[23:42:27.641] <TB2> INFO: Expecting 2560 events.
[23:42:28.519] <TB2> INFO: 2560 events read in total (286ms).
[23:42:28.519] <TB2> INFO: Test took 1185ms.
[23:42:28.827] <TB2> INFO: Expecting 2560 events.
[23:42:29.712] <TB2> INFO: 2560 events read in total (293ms).
[23:42:29.712] <TB2> INFO: Test took 1193ms.
[23:42:30.020] <TB2> INFO: Expecting 2560 events.
[23:42:30.904] <TB2> INFO: 2560 events read in total (292ms).
[23:42:30.904] <TB2> INFO: Test took 1191ms.
[23:42:31.212] <TB2> INFO: Expecting 2560 events.
[23:42:32.094] <TB2> INFO: 2560 events read in total (290ms).
[23:42:32.096] <TB2> INFO: Test took 1192ms.
[23:42:32.402] <TB2> INFO: Expecting 2560 events.
[23:42:33.287] <TB2> INFO: 2560 events read in total (293ms).
[23:42:33.287] <TB2> INFO: Test took 1191ms.
[23:42:33.290] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:42:33.596] <TB2> INFO: Expecting 655360 events.
[23:42:47.782] <TB2> INFO: 655360 events read in total (13594ms).
[23:42:47.792] <TB2> INFO: Expecting 655360 events.
[23:43:01.834] <TB2> INFO: 655360 events read in total (13639ms).
[23:43:01.849] <TB2> INFO: Expecting 655360 events.
[23:43:15.887] <TB2> INFO: 655360 events read in total (13635ms).
[23:43:15.912] <TB2> INFO: Expecting 655360 events.
[23:43:29.904] <TB2> INFO: 655360 events read in total (13589ms).
[23:43:29.934] <TB2> INFO: Expecting 655360 events.
[23:43:43.872] <TB2> INFO: 655360 events read in total (13535ms).
[23:43:43.911] <TB2> INFO: Expecting 655360 events.
[23:43:57.921] <TB2> INFO: 655360 events read in total (13607ms).
[23:43:57.954] <TB2> INFO: Expecting 655360 events.
[23:44:11.863] <TB2> INFO: 655360 events read in total (13507ms).
[23:44:11.900] <TB2> INFO: Expecting 655360 events.
[23:44:25.912] <TB2> INFO: 655360 events read in total (13609ms).
[23:44:25.965] <TB2> INFO: Expecting 655360 events.
[23:44:40.018] <TB2> INFO: 655360 events read in total (13649ms).
[23:44:40.064] <TB2> INFO: Expecting 655360 events.
[23:44:54.024] <TB2> INFO: 655360 events read in total (13557ms).
[23:44:54.071] <TB2> INFO: Expecting 655360 events.
[23:45:08.068] <TB2> INFO: 655360 events read in total (13594ms).
[23:45:08.120] <TB2> INFO: Expecting 655360 events.
[23:45:22.116] <TB2> INFO: 655360 events read in total (13593ms).
[23:45:22.174] <TB2> INFO: Expecting 655360 events.
[23:45:36.117] <TB2> INFO: 655360 events read in total (13540ms).
[23:45:36.201] <TB2> INFO: Expecting 655360 events.
[23:45:50.297] <TB2> INFO: 655360 events read in total (13693ms).
[23:45:50.400] <TB2> INFO: Expecting 655360 events.
[23:46:04.449] <TB2> INFO: 655360 events read in total (13646ms).
[23:46:04.525] <TB2> INFO: Expecting 655360 events.
[23:46:18.510] <TB2> INFO: 655360 events read in total (13582ms).
[23:46:18.609] <TB2> INFO: Test took 225319ms.
[23:46:18.691] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:46:18.956] <TB2> INFO: Expecting 655360 events.
[23:46:33.069] <TB2> INFO: 655360 events read in total (13522ms).
[23:46:33.082] <TB2> INFO: Expecting 655360 events.
[23:46:47.027] <TB2> INFO: 655360 events read in total (13542ms).
[23:46:47.042] <TB2> INFO: Expecting 655360 events.
[23:47:01.039] <TB2> INFO: 655360 events read in total (13594ms).
[23:47:01.057] <TB2> INFO: Expecting 655360 events.
[23:47:14.772] <TB2> INFO: 655360 events read in total (13312ms).
[23:47:14.796] <TB2> INFO: Expecting 655360 events.
[23:47:28.742] <TB2> INFO: 655360 events read in total (13543ms).
[23:47:28.768] <TB2> INFO: Expecting 655360 events.
[23:47:42.454] <TB2> INFO: 655360 events read in total (13283ms).
[23:47:42.487] <TB2> INFO: Expecting 655360 events.
[23:47:56.382] <TB2> INFO: 655360 events read in total (13492ms).
[23:47:56.421] <TB2> INFO: Expecting 655360 events.
[23:48:10.379] <TB2> INFO: 655360 events read in total (13555ms).
[23:48:10.433] <TB2> INFO: Expecting 655360 events.
[23:48:24.316] <TB2> INFO: 655360 events read in total (13480ms).
[23:48:24.364] <TB2> INFO: Expecting 655360 events.
[23:48:38.332] <TB2> INFO: 655360 events read in total (13561ms).
[23:48:38.381] <TB2> INFO: Expecting 655360 events.
[23:48:52.301] <TB2> INFO: 655360 events read in total (13517ms).
[23:48:52.361] <TB2> INFO: Expecting 655360 events.
[23:49:06.276] <TB2> INFO: 655360 events read in total (13512ms).
[23:49:06.334] <TB2> INFO: Expecting 655360 events.
[23:49:20.159] <TB2> INFO: 655360 events read in total (13422ms).
[23:49:20.220] <TB2> INFO: Expecting 655360 events.
[23:49:34.129] <TB2> INFO: 655360 events read in total (13507ms).
[23:49:34.193] <TB2> INFO: Expecting 655360 events.
[23:49:48.112] <TB2> INFO: 655360 events read in total (13516ms).
[23:49:48.207] <TB2> INFO: Expecting 655360 events.
[23:50:02.313] <TB2> INFO: 655360 events read in total (13703ms).
[23:50:02.418] <TB2> INFO: Test took 223727ms.
[23:50:02.602] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.607] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.611] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.616] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.621] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.627] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.632] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:50:02.637] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:50:02.642] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:50:02.647] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.652] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.657] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.661] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.666] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.672] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.677] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:50:02.683] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.688] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.693] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.698] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:50:02.704] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:50:02.710] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:50:02.717] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[23:50:02.723] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[23:50:02.730] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[23:50:02.736] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[23:50:02.742] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[23:50:02.748] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[23:50:02.755] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[23:50:02.761] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[23:50:02.768] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.774] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.781] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.787] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.793] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.799] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.804] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.809] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.814] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.819] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.824] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.828] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[23:50:02.833] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[23:50:02.838] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[23:50:02.843] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[23:50:02.847] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[23:50:02.853] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[23:50:02.857] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[23:50:02.862] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[23:50:02.867] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.871] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C0.dat
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C1.dat
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C2.dat
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C3.dat
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C4.dat
[23:50:02.905] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C5.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C6.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C7.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C8.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C9.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C10.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C11.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C12.dat
[23:50:02.906] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C13.dat
[23:50:02.907] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C14.dat
[23:50:02.907] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters35_C15.dat
[23:50:03.153] <TB2> INFO: Expecting 41600 events.
[23:50:06.282] <TB2> INFO: 41600 events read in total (2534ms).
[23:50:06.283] <TB2> INFO: Test took 3374ms.
[23:50:06.735] <TB2> INFO: Expecting 41600 events.
[23:50:09.736] <TB2> INFO: 41600 events read in total (2409ms).
[23:50:09.736] <TB2> INFO: Test took 3243ms.
[23:50:10.178] <TB2> INFO: Expecting 41600 events.
[23:50:13.284] <TB2> INFO: 41600 events read in total (2515ms).
[23:50:13.284] <TB2> INFO: Test took 3337ms.
[23:50:13.499] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:13.587] <TB2> INFO: Expecting 2560 events.
[23:50:14.469] <TB2> INFO: 2560 events read in total (290ms).
[23:50:14.470] <TB2> INFO: Test took 971ms.
[23:50:14.471] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:14.778] <TB2> INFO: Expecting 2560 events.
[23:50:15.662] <TB2> INFO: 2560 events read in total (292ms).
[23:50:15.662] <TB2> INFO: Test took 1191ms.
[23:50:15.664] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:15.970] <TB2> INFO: Expecting 2560 events.
[23:50:16.853] <TB2> INFO: 2560 events read in total (291ms).
[23:50:16.853] <TB2> INFO: Test took 1189ms.
[23:50:16.855] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:17.161] <TB2> INFO: Expecting 2560 events.
[23:50:18.045] <TB2> INFO: 2560 events read in total (292ms).
[23:50:18.045] <TB2> INFO: Test took 1190ms.
[23:50:18.047] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:18.353] <TB2> INFO: Expecting 2560 events.
[23:50:19.237] <TB2> INFO: 2560 events read in total (292ms).
[23:50:19.238] <TB2> INFO: Test took 1191ms.
[23:50:19.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:19.546] <TB2> INFO: Expecting 2560 events.
[23:50:20.429] <TB2> INFO: 2560 events read in total (292ms).
[23:50:20.429] <TB2> INFO: Test took 1190ms.
[23:50:20.431] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:20.738] <TB2> INFO: Expecting 2560 events.
[23:50:21.622] <TB2> INFO: 2560 events read in total (293ms).
[23:50:21.623] <TB2> INFO: Test took 1192ms.
[23:50:21.625] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:21.931] <TB2> INFO: Expecting 2560 events.
[23:50:22.814] <TB2> INFO: 2560 events read in total (292ms).
[23:50:22.814] <TB2> INFO: Test took 1189ms.
[23:50:22.816] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:23.123] <TB2> INFO: Expecting 2560 events.
[23:50:23.002] <TB2> INFO: 2560 events read in total (288ms).
[23:50:23.002] <TB2> INFO: Test took 1186ms.
[23:50:24.004] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:24.310] <TB2> INFO: Expecting 2560 events.
[23:50:25.192] <TB2> INFO: 2560 events read in total (290ms).
[23:50:25.193] <TB2> INFO: Test took 1189ms.
[23:50:25.194] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:25.501] <TB2> INFO: Expecting 2560 events.
[23:50:26.380] <TB2> INFO: 2560 events read in total (288ms).
[23:50:26.380] <TB2> INFO: Test took 1186ms.
[23:50:26.382] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:26.689] <TB2> INFO: Expecting 2560 events.
[23:50:27.567] <TB2> INFO: 2560 events read in total (287ms).
[23:50:27.567] <TB2> INFO: Test took 1185ms.
[23:50:27.569] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:27.875] <TB2> INFO: Expecting 2560 events.
[23:50:28.758] <TB2> INFO: 2560 events read in total (291ms).
[23:50:28.758] <TB2> INFO: Test took 1189ms.
[23:50:28.760] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:29.067] <TB2> INFO: Expecting 2560 events.
[23:50:29.945] <TB2> INFO: 2560 events read in total (287ms).
[23:50:29.946] <TB2> INFO: Test took 1186ms.
[23:50:29.947] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:30.254] <TB2> INFO: Expecting 2560 events.
[23:50:31.135] <TB2> INFO: 2560 events read in total (290ms).
[23:50:31.135] <TB2> INFO: Test took 1188ms.
[23:50:31.137] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:31.443] <TB2> INFO: Expecting 2560 events.
[23:50:32.322] <TB2> INFO: 2560 events read in total (287ms).
[23:50:32.323] <TB2> INFO: Test took 1187ms.
[23:50:32.325] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:32.631] <TB2> INFO: Expecting 2560 events.
[23:50:33.510] <TB2> INFO: 2560 events read in total (287ms).
[23:50:33.511] <TB2> INFO: Test took 1186ms.
[23:50:33.512] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:33.819] <TB2> INFO: Expecting 2560 events.
[23:50:34.699] <TB2> INFO: 2560 events read in total (289ms).
[23:50:34.699] <TB2> INFO: Test took 1187ms.
[23:50:34.701] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:35.007] <TB2> INFO: Expecting 2560 events.
[23:50:35.889] <TB2> INFO: 2560 events read in total (290ms).
[23:50:35.890] <TB2> INFO: Test took 1189ms.
[23:50:35.891] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:36.198] <TB2> INFO: Expecting 2560 events.
[23:50:37.078] <TB2> INFO: 2560 events read in total (288ms).
[23:50:37.078] <TB2> INFO: Test took 1187ms.
[23:50:37.080] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:37.386] <TB2> INFO: Expecting 2560 events.
[23:50:38.266] <TB2> INFO: 2560 events read in total (288ms).
[23:50:38.266] <TB2> INFO: Test took 1186ms.
[23:50:38.268] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:38.574] <TB2> INFO: Expecting 2560 events.
[23:50:39.454] <TB2> INFO: 2560 events read in total (288ms).
[23:50:39.454] <TB2> INFO: Test took 1186ms.
[23:50:39.456] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:39.762] <TB2> INFO: Expecting 2560 events.
[23:50:40.641] <TB2> INFO: 2560 events read in total (287ms).
[23:50:40.641] <TB2> INFO: Test took 1185ms.
[23:50:40.644] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:40.950] <TB2> INFO: Expecting 2560 events.
[23:50:41.829] <TB2> INFO: 2560 events read in total (288ms).
[23:50:41.830] <TB2> INFO: Test took 1187ms.
[23:50:41.831] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:42.138] <TB2> INFO: Expecting 2560 events.
[23:50:43.021] <TB2> INFO: 2560 events read in total (291ms).
[23:50:43.022] <TB2> INFO: Test took 1191ms.
[23:50:43.024] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:43.330] <TB2> INFO: Expecting 2560 events.
[23:50:44.213] <TB2> INFO: 2560 events read in total (291ms).
[23:50:44.213] <TB2> INFO: Test took 1190ms.
[23:50:44.215] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:44.522] <TB2> INFO: Expecting 2560 events.
[23:50:45.407] <TB2> INFO: 2560 events read in total (294ms).
[23:50:45.407] <TB2> INFO: Test took 1192ms.
[23:50:45.409] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:45.716] <TB2> INFO: Expecting 2560 events.
[23:50:46.601] <TB2> INFO: 2560 events read in total (294ms).
[23:50:46.601] <TB2> INFO: Test took 1192ms.
[23:50:46.603] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:46.909] <TB2> INFO: Expecting 2560 events.
[23:50:47.792] <TB2> INFO: 2560 events read in total (291ms).
[23:50:47.792] <TB2> INFO: Test took 1189ms.
[23:50:47.794] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:48.101] <TB2> INFO: Expecting 2560 events.
[23:50:48.984] <TB2> INFO: 2560 events read in total (292ms).
[23:50:48.984] <TB2> INFO: Test took 1190ms.
[23:50:48.986] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:49.292] <TB2> INFO: Expecting 2560 events.
[23:50:50.176] <TB2> INFO: 2560 events read in total (292ms).
[23:50:50.176] <TB2> INFO: Test took 1190ms.
[23:50:50.178] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[23:50:50.484] <TB2> INFO: Expecting 2560 events.
[23:50:51.368] <TB2> INFO: 2560 events read in total (292ms).
[23:50:51.368] <TB2> INFO: Test took 1190ms.
[23:50:51.832] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 631 seconds
[23:50:51.832] <TB2> INFO: PH scale (per ROC): 31 47 57 40 42 46 45 47 47 39 42 42 35 41 38 48
[23:50:51.832] <TB2> INFO: PH offset (per ROC): 99 112 123 99 130 95 112 96 90 95 83 107 101 115 108 94
[23:50:51.838] <TB2> INFO: Decoding statistics:
[23:50:51.838] <TB2> INFO: General information:
[23:50:51.838] <TB2> INFO: 16bit words read: 127888
[23:50:51.838] <TB2> INFO: valid events total: 20480
[23:50:51.838] <TB2> INFO: empty events: 17976
[23:50:51.838] <TB2> INFO: valid events with pixels: 2504
[23:50:51.838] <TB2> INFO: valid pixel hits: 2504
[23:50:51.838] <TB2> INFO: Event errors: 0
[23:50:51.838] <TB2> INFO: start marker: 0
[23:50:51.838] <TB2> INFO: stop marker: 0
[23:50:51.838] <TB2> INFO: overflow: 0
[23:50:51.838] <TB2> INFO: invalid 5bit words: 0
[23:50:51.838] <TB2> INFO: invalid XOR eye diagram: 0
[23:50:51.838] <TB2> INFO: frame (failed synchr.): 0
[23:50:51.838] <TB2> INFO: idle data (no TBM trl): 0
[23:50:51.838] <TB2> INFO: no data (only TBM hdr): 0
[23:50:51.838] <TB2> INFO: TBM errors: 0
[23:50:51.838] <TB2> INFO: flawed TBM headers: 0
[23:50:51.838] <TB2> INFO: flawed TBM trailers: 0
[23:50:51.838] <TB2> INFO: event ID mismatches: 0
[23:50:51.838] <TB2> INFO: ROC errors: 0
[23:50:51.838] <TB2> INFO: missing ROC header(s): 0
[23:50:51.838] <TB2> INFO: misplaced readback start: 0
[23:50:51.838] <TB2> INFO: Pixel decoding errors: 0
[23:50:51.838] <TB2> INFO: pixel data incomplete: 0
[23:50:51.838] <TB2> INFO: pixel address: 0
[23:50:51.838] <TB2> INFO: pulse height fill bit: 0
[23:50:51.838] <TB2> INFO: buffer corruption: 0
[23:50:52.197] <TB2> INFO: ######################################################################
[23:50:52.197] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[23:50:52.197] <TB2> INFO: ######################################################################
[23:50:52.211] <TB2> INFO: scanning low vcal = 10
[23:50:52.443] <TB2> INFO: Expecting 41600 events.
[23:50:56.024] <TB2> INFO: 41600 events read in total (2989ms).
[23:50:56.024] <TB2> INFO: Test took 3813ms.
[23:50:56.026] <TB2> INFO: scanning low vcal = 20
[23:50:56.322] <TB2> INFO: Expecting 41600 events.
[23:50:59.891] <TB2> INFO: 41600 events read in total (2978ms).
[23:50:59.892] <TB2> INFO: Test took 3866ms.
[23:50:59.893] <TB2> INFO: scanning low vcal = 30
[23:51:00.189] <TB2> INFO: Expecting 41600 events.
[23:51:03.839] <TB2> INFO: 41600 events read in total (3059ms).
[23:51:03.840] <TB2> INFO: Test took 3947ms.
[23:51:03.842] <TB2> INFO: scanning low vcal = 40
[23:51:04.119] <TB2> INFO: Expecting 41600 events.
[23:51:08.011] <TB2> INFO: 41600 events read in total (3300ms).
[23:51:08.013] <TB2> INFO: Test took 4171ms.
[23:51:08.015] <TB2> INFO: scanning low vcal = 50
[23:51:08.292] <TB2> INFO: Expecting 41600 events.
[23:51:12.223] <TB2> INFO: 41600 events read in total (3339ms).
[23:51:12.223] <TB2> INFO: Test took 4208ms.
[23:51:12.226] <TB2> INFO: scanning low vcal = 60
[23:51:12.504] <TB2> INFO: Expecting 41600 events.
[23:51:16.424] <TB2> INFO: 41600 events read in total (3329ms).
[23:51:16.425] <TB2> INFO: Test took 4199ms.
[23:51:16.428] <TB2> INFO: scanning low vcal = 70
[23:51:16.704] <TB2> INFO: Expecting 41600 events.
[23:51:20.623] <TB2> INFO: 41600 events read in total (3327ms).
[23:51:20.624] <TB2> INFO: Test took 4196ms.
[23:51:20.627] <TB2> INFO: scanning low vcal = 80
[23:51:20.903] <TB2> INFO: Expecting 41600 events.
[23:51:24.820] <TB2> INFO: 41600 events read in total (3325ms).
[23:51:24.821] <TB2> INFO: Test took 4194ms.
[23:51:24.824] <TB2> INFO: scanning low vcal = 90
[23:51:25.101] <TB2> INFO: Expecting 41600 events.
[23:51:29.068] <TB2> INFO: 41600 events read in total (3375ms).
[23:51:29.069] <TB2> INFO: Test took 4245ms.
[23:51:29.072] <TB2> INFO: scanning low vcal = 100
[23:51:29.349] <TB2> INFO: Expecting 41600 events.
[23:51:33.275] <TB2> INFO: 41600 events read in total (3335ms).
[23:51:33.276] <TB2> INFO: Test took 4204ms.
[23:51:33.280] <TB2> INFO: scanning low vcal = 110
[23:51:33.555] <TB2> INFO: Expecting 41600 events.
[23:51:37.527] <TB2> INFO: 41600 events read in total (3380ms).
[23:51:37.528] <TB2> INFO: Test took 4248ms.
[23:51:37.531] <TB2> INFO: scanning low vcal = 120
[23:51:37.807] <TB2> INFO: Expecting 41600 events.
[23:51:41.730] <TB2> INFO: 41600 events read in total (3331ms).
[23:51:41.730] <TB2> INFO: Test took 4200ms.
[23:51:41.734] <TB2> INFO: scanning low vcal = 130
[23:51:42.010] <TB2> INFO: Expecting 41600 events.
[23:51:45.987] <TB2> INFO: 41600 events read in total (3385ms).
[23:51:45.988] <TB2> INFO: Test took 4254ms.
[23:51:45.990] <TB2> INFO: scanning low vcal = 140
[23:51:46.267] <TB2> INFO: Expecting 41600 events.
[23:51:50.186] <TB2> INFO: 41600 events read in total (3327ms).
[23:51:50.187] <TB2> INFO: Test took 4196ms.
[23:51:50.190] <TB2> INFO: scanning low vcal = 150
[23:51:50.466] <TB2> INFO: Expecting 41600 events.
[23:51:54.389] <TB2> INFO: 41600 events read in total (3331ms).
[23:51:54.390] <TB2> INFO: Test took 4200ms.
[23:51:54.393] <TB2> INFO: scanning low vcal = 160
[23:51:54.670] <TB2> INFO: Expecting 41600 events.
[23:51:58.607] <TB2> INFO: 41600 events read in total (3346ms).
[23:51:58.608] <TB2> INFO: Test took 4215ms.
[23:51:58.611] <TB2> INFO: scanning low vcal = 170
[23:51:58.888] <TB2> INFO: Expecting 41600 events.
[23:52:02.854] <TB2> INFO: 41600 events read in total (3375ms).
[23:52:02.855] <TB2> INFO: Test took 4244ms.
[23:52:02.858] <TB2> INFO: scanning low vcal = 180
[23:52:03.134] <TB2> INFO: Expecting 41600 events.
[23:52:07.087] <TB2> INFO: 41600 events read in total (3361ms).
[23:52:07.088] <TB2> INFO: Test took 4230ms.
[23:52:07.091] <TB2> INFO: scanning low vcal = 190
[23:52:07.367] <TB2> INFO: Expecting 41600 events.
[23:52:11.291] <TB2> INFO: 41600 events read in total (3332ms).
[23:52:11.292] <TB2> INFO: Test took 4201ms.
[23:52:11.295] <TB2> INFO: scanning low vcal = 200
[23:52:11.571] <TB2> INFO: Expecting 41600 events.
[23:52:15.509] <TB2> INFO: 41600 events read in total (3346ms).
[23:52:15.510] <TB2> INFO: Test took 4215ms.
[23:52:15.513] <TB2> INFO: scanning low vcal = 210
[23:52:15.789] <TB2> INFO: Expecting 41600 events.
[23:52:19.723] <TB2> INFO: 41600 events read in total (3342ms).
[23:52:19.724] <TB2> INFO: Test took 4211ms.
[23:52:19.726] <TB2> INFO: scanning low vcal = 220
[23:52:20.003] <TB2> INFO: Expecting 41600 events.
[23:52:23.936] <TB2> INFO: 41600 events read in total (3341ms).
[23:52:23.937] <TB2> INFO: Test took 4210ms.
[23:52:23.940] <TB2> INFO: scanning low vcal = 230
[23:52:24.216] <TB2> INFO: Expecting 41600 events.
[23:52:28.149] <TB2> INFO: 41600 events read in total (3341ms).
[23:52:28.150] <TB2> INFO: Test took 4210ms.
[23:52:28.153] <TB2> INFO: scanning low vcal = 240
[23:52:28.430] <TB2> INFO: Expecting 41600 events.
[23:52:32.385] <TB2> INFO: 41600 events read in total (3364ms).
[23:52:32.386] <TB2> INFO: Test took 4233ms.
[23:52:32.389] <TB2> INFO: scanning low vcal = 250
[23:52:32.665] <TB2> INFO: Expecting 41600 events.
[23:52:36.599] <TB2> INFO: 41600 events read in total (3342ms).
[23:52:36.600] <TB2> INFO: Test took 4211ms.
[23:52:36.603] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[23:52:36.879] <TB2> INFO: Expecting 41600 events.
[23:52:40.851] <TB2> INFO: 41600 events read in total (3380ms).
[23:52:40.852] <TB2> INFO: Test took 4249ms.
[23:52:40.855] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[23:52:41.132] <TB2> INFO: Expecting 41600 events.
[23:52:45.067] <TB2> INFO: 41600 events read in total (3344ms).
[23:52:45.068] <TB2> INFO: Test took 4213ms.
[23:52:45.070] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[23:52:45.347] <TB2> INFO: Expecting 41600 events.
[23:52:49.277] <TB2> INFO: 41600 events read in total (3338ms).
[23:52:49.278] <TB2> INFO: Test took 4207ms.
[23:52:49.281] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[23:52:49.558] <TB2> INFO: Expecting 41600 events.
[23:52:53.494] <TB2> INFO: 41600 events read in total (3345ms).
[23:52:53.495] <TB2> INFO: Test took 4214ms.
[23:52:53.498] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[23:52:53.774] <TB2> INFO: Expecting 41600 events.
[23:52:57.796] <TB2> INFO: 41600 events read in total (3430ms).
[23:52:57.797] <TB2> INFO: Test took 4299ms.
[23:52:58.367] <TB2> INFO: PixTestGainPedestal::measure() done
[23:53:39.411] <TB2> INFO: PixTestGainPedestal::fit() done
[23:53:39.411] <TB2> INFO: non-linearity mean: 0.999 0.975 0.984 0.931 0.980 0.973 0.961 0.963 0.949 0.935 0.952 0.954 0.983 0.927 0.948 0.964
[23:53:39.412] <TB2> INFO: non-linearity RMS: 0.174 0.007 0.004 0.065 0.004 0.008 0.046 0.039 0.052 0.186 0.071 0.038 0.180 0.086 0.137 0.034
[23:53:39.412] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[23:53:39.426] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[23:53:39.439] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[23:53:39.455] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[23:53:39.468] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[23:53:39.483] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[23:53:39.498] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[23:53:39.512] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[23:53:39.527] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[23:53:39.547] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[23:53:39.567] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[23:53:39.588] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[23:53:39.609] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[23:53:39.630] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[23:53:39.653] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[23:53:39.673] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[23:53:39.692] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[23:53:39.692] <TB2> INFO: Decoding statistics:
[23:53:39.692] <TB2> INFO: General information:
[23:53:39.692] <TB2> INFO: 16bit words read: 3300778
[23:53:39.692] <TB2> INFO: valid events total: 332800
[23:53:39.692] <TB2> INFO: empty events: 467
[23:53:39.692] <TB2> INFO: valid events with pixels: 332333
[23:53:39.692] <TB2> INFO: valid pixel hits: 651989
[23:53:39.692] <TB2> INFO: Event errors: 0
[23:53:39.692] <TB2> INFO: start marker: 0
[23:53:39.692] <TB2> INFO: stop marker: 0
[23:53:39.692] <TB2> INFO: overflow: 0
[23:53:39.692] <TB2> INFO: invalid 5bit words: 0
[23:53:39.692] <TB2> INFO: invalid XOR eye diagram: 0
[23:53:39.692] <TB2> INFO: frame (failed synchr.): 0
[23:53:39.692] <TB2> INFO: idle data (no TBM trl): 0
[23:53:39.692] <TB2> INFO: no data (only TBM hdr): 0
[23:53:39.692] <TB2> INFO: TBM errors: 0
[23:53:39.692] <TB2> INFO: flawed TBM headers: 0
[23:53:39.692] <TB2> INFO: flawed TBM trailers: 0
[23:53:39.692] <TB2> INFO: event ID mismatches: 0
[23:53:39.692] <TB2> INFO: ROC errors: 0
[23:53:39.692] <TB2> INFO: missing ROC header(s): 0
[23:53:39.692] <TB2> INFO: misplaced readback start: 0
[23:53:39.692] <TB2> INFO: Pixel decoding errors: 0
[23:53:39.692] <TB2> INFO: pixel data incomplete: 0
[23:53:39.692] <TB2> INFO: pixel address: 0
[23:53:39.692] <TB2> INFO: pulse height fill bit: 0
[23:53:39.692] <TB2> INFO: buffer corruption: 0
[23:53:39.711] <TB2> INFO: Decoding statistics:
[23:53:39.711] <TB2> INFO: General information:
[23:53:39.711] <TB2> INFO: 16bit words read: 3430202
[23:53:39.711] <TB2> INFO: valid events total: 353536
[23:53:39.711] <TB2> INFO: empty events: 18699
[23:53:39.712] <TB2> INFO: valid events with pixels: 334837
[23:53:39.712] <TB2> INFO: valid pixel hits: 654493
[23:53:39.712] <TB2> INFO: Event errors: 0
[23:53:39.712] <TB2> INFO: start marker: 0
[23:53:39.712] <TB2> INFO: stop marker: 0
[23:53:39.712] <TB2> INFO: overflow: 0
[23:53:39.712] <TB2> INFO: invalid 5bit words: 0
[23:53:39.712] <TB2> INFO: invalid XOR eye diagram: 0
[23:53:39.712] <TB2> INFO: frame (failed synchr.): 0
[23:53:39.712] <TB2> INFO: idle data (no TBM trl): 0
[23:53:39.712] <TB2> INFO: no data (only TBM hdr): 0
[23:53:39.712] <TB2> INFO: TBM errors: 0
[23:53:39.712] <TB2> INFO: flawed TBM headers: 0
[23:53:39.712] <TB2> INFO: flawed TBM trailers: 0
[23:53:39.712] <TB2> INFO: event ID mismatches: 0
[23:53:39.712] <TB2> INFO: ROC errors: 0
[23:53:39.712] <TB2> INFO: missing ROC header(s): 0
[23:53:39.712] <TB2> INFO: misplaced readback start: 0
[23:53:39.712] <TB2> INFO: Pixel decoding errors: 0
[23:53:39.712] <TB2> INFO: pixel data incomplete: 0
[23:53:39.712] <TB2> INFO: pixel address: 0
[23:53:39.712] <TB2> INFO: pulse height fill bit: 0
[23:53:39.712] <TB2> INFO: buffer corruption: 0
[23:53:39.712] <TB2> INFO: enter test to run
[23:53:39.712] <TB2> INFO: test: Trim80 no parameter change
[23:53:39.712] <TB2> INFO: running: trim80
[23:53:39.734] <TB2> INFO: ######################################################################
[23:53:39.734] <TB2> INFO: PixTestTrim80::doTest()
[23:53:39.734] <TB2> INFO: ######################################################################
[23:53:39.735] <TB2> INFO: ----------------------------------------------------------------------
[23:53:39.735] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[23:53:39.735] <TB2> INFO: ----------------------------------------------------------------------
[23:53:39.776] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[23:53:39.776] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:53:39.785] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:53:39.785] <TB2> INFO: run 1 of 1
[23:53:40.021] <TB2> INFO: Expecting 5025280 events.
[23:54:08.131] <TB2> INFO: 687232 events read in total (27518ms).
[23:54:35.601] <TB2> INFO: 1370888 events read in total (54988ms).
[23:55:02.853] <TB2> INFO: 2051992 events read in total (82240ms).
[23:55:30.340] <TB2> INFO: 2731248 events read in total (109727ms).
[23:55:57.598] <TB2> INFO: 3410680 events read in total (136985ms).
[23:56:24.645] <TB2> INFO: 4089048 events read in total (164032ms).
[23:56:51.612] <TB2> INFO: 4766936 events read in total (190999ms).
[23:57:02.182] <TB2> INFO: 5025280 events read in total (201569ms).
[23:57:02.263] <TB2> INFO: Test took 202479ms.
[23:57:25.395] <TB2> INFO: ROC 0 VthrComp = 74
[23:57:25.396] <TB2> INFO: ROC 1 VthrComp = 72
[23:57:25.396] <TB2> INFO: ROC 2 VthrComp = 69
[23:57:25.396] <TB2> INFO: ROC 3 VthrComp = 84
[23:57:25.396] <TB2> INFO: ROC 4 VthrComp = 75
[23:57:25.396] <TB2> INFO: ROC 5 VthrComp = 75
[23:57:25.396] <TB2> INFO: ROC 6 VthrComp = 75
[23:57:25.396] <TB2> INFO: ROC 7 VthrComp = 78
[23:57:25.396] <TB2> INFO: ROC 8 VthrComp = 77
[23:57:25.396] <TB2> INFO: ROC 9 VthrComp = 75
[23:57:25.396] <TB2> INFO: ROC 10 VthrComp = 74
[23:57:25.397] <TB2> INFO: ROC 11 VthrComp = 73
[23:57:25.397] <TB2> INFO: ROC 12 VthrComp = 81
[23:57:25.397] <TB2> INFO: ROC 13 VthrComp = 81
[23:57:25.397] <TB2> INFO: ROC 14 VthrComp = 85
[23:57:25.397] <TB2> INFO: ROC 15 VthrComp = 76
[23:57:25.630] <TB2> INFO: Expecting 41600 events.
[23:57:29.122] <TB2> INFO: 41600 events read in total (2900ms).
[23:57:29.123] <TB2> INFO: Test took 3725ms.
[23:57:29.133] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[23:57:29.133] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[23:57:29.142] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[23:57:29.142] <TB2> INFO: run 1 of 1
[23:57:29.420] <TB2> INFO: Expecting 5025280 events.
[23:57:56.879] <TB2> INFO: 682872 events read in total (26868ms).
[23:58:23.648] <TB2> INFO: 1362376 events read in total (53638ms).
[23:58:51.006] <TB2> INFO: 2041720 events read in total (80995ms).
[23:59:18.019] <TB2> INFO: 2717768 events read in total (108008ms).
[23:59:44.581] <TB2> INFO: 3391752 events read in total (134570ms).
[00:00:11.682] <TB2> INFO: 4063920 events read in total (161671ms).
[00:00:38.761] <TB2> INFO: 4734672 events read in total (188750ms).
[00:00:50.708] <TB2> INFO: 5025280 events read in total (200697ms).
[00:00:50.774] <TB2> INFO: Test took 201633ms.
[00:01:14.137] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 108.867 for pixel 0/79 mean/min/max = 92.8897/76.8832/108.896
[00:01:14.137] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 109.441 for pixel 12/79 mean/min/max = 92.9747/76.4549/109.495
[00:01:14.138] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 103.48 for pixel 19/73 mean/min/max = 88.848/73.8839/103.812
[00:01:14.138] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 107.131 for pixel 13/12 mean/min/max = 91.063/74.982/107.144
[00:01:14.139] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 108.71 for pixel 27/79 mean/min/max = 93.5495/78.3479/108.751
[00:01:14.139] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 112.87 for pixel 5/6 mean/min/max = 95.8582/78.559/113.157
[00:01:14.139] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 111.654 for pixel 7/79 mean/min/max = 94.9165/78.139/111.694
[00:01:14.140] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 110.7 for pixel 4/78 mean/min/max = 94.3468/77.8302/110.864
[00:01:14.140] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 113.089 for pixel 0/1 mean/min/max = 95.0718/77.0243/113.119
[00:01:14.141] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 111.986 for pixel 0/5 mean/min/max = 94.7977/77.5621/112.033
[00:01:14.141] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 112.493 for pixel 4/79 mean/min/max = 95.2957/78.0721/112.519
[00:01:14.141] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 108.94 for pixel 1/8 mean/min/max = 93.1675/77.3795/108.956
[00:01:14.142] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 106.316 for pixel 39/70 mean/min/max = 91.0704/75.8115/106.329
[00:01:14.142] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 106.599 for pixel 0/41 mean/min/max = 90.8476/74.9689/106.726
[00:01:14.142] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 106.75 for pixel 0/15 mean/min/max = 90.3495/73.9095/106.79
[00:01:14.143] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 108.946 for pixel 51/12 mean/min/max = 94.0274/78.6769/109.378
[00:01:14.143] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[00:01:14.232] <TB2> INFO: Expecting 411648 events.
[00:01:23.521] <TB2> INFO: 411648 events read in total (8697ms).
[00:01:23.529] <TB2> INFO: Expecting 411648 events.
[00:01:32.576] <TB2> INFO: 411648 events read in total (8644ms).
[00:01:32.589] <TB2> INFO: Expecting 411648 events.
[00:01:41.685] <TB2> INFO: 411648 events read in total (8693ms).
[00:01:41.702] <TB2> INFO: Expecting 411648 events.
[00:01:50.785] <TB2> INFO: 411648 events read in total (8680ms).
[00:01:50.803] <TB2> INFO: Expecting 411648 events.
[00:01:59.821] <TB2> INFO: 411648 events read in total (8615ms).
[00:01:59.841] <TB2> INFO: Expecting 411648 events.
[00:02:08.893] <TB2> INFO: 411648 events read in total (8649ms).
[00:02:08.913] <TB2> INFO: Expecting 411648 events.
[00:02:17.934] <TB2> INFO: 411648 events read in total (8618ms).
[00:02:17.964] <TB2> INFO: Expecting 411648 events.
[00:02:27.023] <TB2> INFO: 411648 events read in total (8656ms).
[00:02:27.056] <TB2> INFO: Expecting 411648 events.
[00:02:36.106] <TB2> INFO: 411648 events read in total (8647ms).
[00:02:36.134] <TB2> INFO: Expecting 411648 events.
[00:02:45.163] <TB2> INFO: 411648 events read in total (8626ms).
[00:02:45.195] <TB2> INFO: Expecting 411648 events.
[00:02:54.245] <TB2> INFO: 411648 events read in total (8647ms).
[00:02:54.279] <TB2> INFO: Expecting 411648 events.
[00:03:03.343] <TB2> INFO: 411648 events read in total (8661ms).
[00:03:03.391] <TB2> INFO: Expecting 411648 events.
[00:03:12.463] <TB2> INFO: 411648 events read in total (8669ms).
[00:03:12.511] <TB2> INFO: Expecting 411648 events.
[00:03:21.651] <TB2> INFO: 411648 events read in total (8737ms).
[00:03:21.692] <TB2> INFO: Expecting 411648 events.
[00:03:30.770] <TB2> INFO: 411648 events read in total (8675ms).
[00:03:30.818] <TB2> INFO: Expecting 411648 events.
[00:03:39.840] <TB2> INFO: 411648 events read in total (8619ms).
[00:03:39.887] <TB2> INFO: Test took 145744ms.
[00:03:41.470] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[00:03:41.481] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:03:41.481] <TB2> INFO: run 1 of 1
[00:03:41.766] <TB2> INFO: Expecting 5025280 events.
[00:04:09.045] <TB2> INFO: 665168 events read in total (26688ms).
[00:04:35.661] <TB2> INFO: 1328024 events read in total (53304ms).
[00:05:02.090] <TB2> INFO: 1990920 events read in total (79733ms).
[00:05:28.948] <TB2> INFO: 2651928 events read in total (106591ms).
[00:05:55.554] <TB2> INFO: 3310152 events read in total (133197ms).
[00:06:22.376] <TB2> INFO: 3967008 events read in total (160019ms).
[00:06:49.133] <TB2> INFO: 4621832 events read in total (186776ms).
[00:07:05.582] <TB2> INFO: 5025280 events read in total (203225ms).
[00:07:05.649] <TB2> INFO: Test took 204168ms.
[00:07:30.041] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 51.437493 .. 98.490519
[00:07:30.283] <TB2> INFO: Expecting 208000 events.
[00:07:40.202] <TB2> INFO: 208000 events read in total (9328ms).
[00:07:40.203] <TB2> INFO: Test took 10161ms.
[00:07:40.251] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 41 .. 108 (-1/-1) hits flags = 528 (plus default)
[00:07:40.262] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:07:40.262] <TB2> INFO: run 1 of 1
[00:07:40.540] <TB2> INFO: Expecting 2263040 events.
[00:08:09.088] <TB2> INFO: 698944 events read in total (27956ms).
[00:08:36.600] <TB2> INFO: 1394480 events read in total (55468ms).
[00:09:03.998] <TB2> INFO: 2082584 events read in total (82866ms).
[00:09:11.537] <TB2> INFO: 2263040 events read in total (90405ms).
[00:09:11.570] <TB2> INFO: Test took 91308ms.
[00:09:29.390] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 61.106710 .. 90.398857
[00:09:29.624] <TB2> INFO: Expecting 208000 events.
[00:09:39.609] <TB2> INFO: 208000 events read in total (9394ms).
[00:09:39.610] <TB2> INFO: Test took 10219ms.
[00:09:39.687] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:09:39.699] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:09:39.700] <TB2> INFO: run 1 of 1
[00:09:40.020] <TB2> INFO: Expecting 1664000 events.
[00:10:08.711] <TB2> INFO: 700768 events read in total (28100ms).
[00:10:36.876] <TB2> INFO: 1399968 events read in total (56266ms).
[00:10:47.577] <TB2> INFO: 1664000 events read in total (66966ms).
[00:10:47.606] <TB2> INFO: Test took 67906ms.
[00:11:05.219] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 66.481253 .. 85.540919
[00:11:05.513] <TB2> INFO: Expecting 208000 events.
[00:11:15.283] <TB2> INFO: 208000 events read in total (9178ms).
[00:11:15.284] <TB2> INFO: Test took 10064ms.
[00:11:15.361] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 56 .. 95 (-1/-1) hits flags = 528 (plus default)
[00:11:15.371] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:11:15.371] <TB2> INFO: run 1 of 1
[00:11:15.649] <TB2> INFO: Expecting 1331200 events.
[00:11:44.569] <TB2> INFO: 709576 events read in total (28328ms).
[00:12:10.023] <TB2> INFO: 1331200 events read in total (53783ms).
[00:12:10.048] <TB2> INFO: Test took 54678ms.
[00:12:25.040] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 70.037078 .. 84.489588
[00:12:25.298] <TB2> INFO: Expecting 208000 events.
[00:12:34.862] <TB2> INFO: 208000 events read in total (8973ms).
[00:12:34.863] <TB2> INFO: Test took 9822ms.
[00:12:34.911] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 60 .. 94 (-1/-1) hits flags = 528 (plus default)
[00:12:34.921] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:12:34.921] <TB2> INFO: run 1 of 1
[00:12:35.199] <TB2> INFO: Expecting 1164800 events.
[00:13:03.956] <TB2> INFO: 701920 events read in total (28166ms).
[00:13:23.065] <TB2> INFO: 1164800 events read in total (47276ms).
[00:13:23.088] <TB2> INFO: Test took 48168ms.
[00:13:38.993] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[00:13:38.994] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[00:13:39.006] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[00:13:39.006] <TB2> INFO: run 1 of 1
[00:13:39.242] <TB2> INFO: Expecting 1364480 events.
[00:14:07.251] <TB2> INFO: 668208 events read in total (27411ms).
[00:14:35.150] <TB2> INFO: 1336064 events read in total (55311ms).
[00:14:36.714] <TB2> INFO: 1364480 events read in total (56874ms).
[00:14:36.737] <TB2> INFO: Test took 57731ms.
[00:14:52.231] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C0.dat
[00:14:52.231] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C1.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C2.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C3.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C4.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C5.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C6.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C7.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C8.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C9.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C10.dat
[00:14:52.232] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C11.dat
[00:14:52.233] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C12.dat
[00:14:52.233] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C13.dat
[00:14:52.233] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C14.dat
[00:14:52.233] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//dacParameters80_C15.dat
[00:14:52.233] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C0.dat
[00:14:52.240] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C1.dat
[00:14:52.247] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C2.dat
[00:14:52.255] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C3.dat
[00:14:52.261] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C4.dat
[00:14:52.266] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C5.dat
[00:14:52.271] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C6.dat
[00:14:52.277] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C7.dat
[00:14:52.282] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C8.dat
[00:14:52.288] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C9.dat
[00:14:52.293] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C10.dat
[00:14:52.298] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C11.dat
[00:14:52.304] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C12.dat
[00:14:52.309] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C13.dat
[00:14:52.315] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C14.dat
[00:14:52.320] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1139_FullQualification_2016-11-07_19h53m_1478544796//003_FulltestTrim80_p17//trimParameters80_C15.dat
[00:14:52.326] <TB2> INFO: PixTestTrim80::trimTest() done
[00:14:52.326] <TB2> INFO: vtrim: 98 96 94 110 94 122 112 108 118 116 119 109 94 103 96 106
[00:14:52.326] <TB2> INFO: vthrcomp: 74 72 69 84 75 75 75 78 77 75 74 73 81 81 85 76
[00:14:52.326] <TB2> INFO: vcal mean: 79.99 80.10 79.99 80.13 79.99 79.93 79.93 79.97 79.93 79.97 79.96 79.95 80.05 79.96 79.96 79.97
[00:14:52.326] <TB2> INFO: vcal RMS: 0.67 1.15 0.74 1.26 0.71 0.73 0.75 0.84 0.82 0.80 0.74 0.72 0.82 0.74 0.78 0.74
[00:14:52.326] <TB2> INFO: bits mean: 9.53 10.01 11.01 10.69 9.01 9.77 9.59 9.89 9.78 9.59 9.35 9.93 10.57 10.27 10.37 9.58
[00:14:52.326] <TB2> INFO: bits RMS: 2.26 2.16 2.20 2.15 2.37 1.94 2.10 2.03 2.11 2.16 2.20 2.07 2.10 2.32 2.44 2.03
[00:14:52.332] <TB2> INFO: ----------------------------------------------------------------------
[00:14:52.332] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[00:14:52.332] <TB2> INFO: ----------------------------------------------------------------------
[00:14:52.335] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:14:52.344] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:14:52.344] <TB2> INFO: run 1 of 1
[00:14:52.576] <TB2> INFO: Expecting 4160000 events.
[00:15:24.938] <TB2> INFO: 774830 events read in total (31770ms).
[00:15:56.225] <TB2> INFO: 1539855 events read in total (63057ms).
[00:16:27.667] <TB2> INFO: 2298535 events read in total (94499ms).
[00:16:58.795] <TB2> INFO: 3053795 events read in total (125627ms).
[00:17:30.482] <TB2> INFO: 3807130 events read in total (157315ms).
[00:17:45.728] <TB2> INFO: 4160000 events read in total (172560ms).
[00:17:45.775] <TB2> INFO: Test took 173431ms.
[00:18:12.513] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 228 (-1/-1) hits flags = 528 (plus default)
[00:18:12.523] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:18:12.523] <TB2> INFO: run 1 of 1
[00:18:12.774] <TB2> INFO: Expecting 4763200 events.
[00:18:43.725] <TB2> INFO: 711590 events read in total (30359ms).
[00:19:14.084] <TB2> INFO: 1418335 events read in total (60718ms).
[00:19:44.222] <TB2> INFO: 2121460 events read in total (90856ms).
[00:20:14.487] <TB2> INFO: 2821195 events read in total (121121ms).
[00:20:44.616] <TB2> INFO: 3519530 events read in total (151250ms).
[00:21:15.397] <TB2> INFO: 4216935 events read in total (182031ms).
[00:21:38.872] <TB2> INFO: 4763200 events read in total (205506ms).
[00:21:38.933] <TB2> INFO: Test took 206410ms.
[00:22:09.234] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:22:09.245] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:22:09.246] <TB2> INFO: run 1 of 1
[00:22:09.518] <TB2> INFO: Expecting 4160000 events.
[00:22:41.361] <TB2> INFO: 747945 events read in total (31251ms).
[00:23:12.767] <TB2> INFO: 1488920 events read in total (62657ms).
[00:23:43.796] <TB2> INFO: 2225125 events read in total (93686ms).
[00:24:14.695] <TB2> INFO: 2957185 events read in total (124585ms).
[00:24:46.372] <TB2> INFO: 3688420 events read in total (156263ms).
[00:25:06.324] <TB2> INFO: 4160000 events read in total (176214ms).
[00:25:06.376] <TB2> INFO: Test took 177130ms.
[00:25:34.128] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[00:25:34.140] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:25:34.140] <TB2> INFO: run 1 of 1
[00:25:34.413] <TB2> INFO: Expecting 4180800 events.
[00:26:06.616] <TB2> INFO: 746690 events read in total (31612ms).
[00:26:37.522] <TB2> INFO: 1486315 events read in total (62518ms).
[00:27:08.311] <TB2> INFO: 2221035 events read in total (93307ms).
[00:27:39.304] <TB2> INFO: 2951775 events read in total (124300ms).
[00:28:11.301] <TB2> INFO: 3681580 events read in total (156297ms).
[00:28:32.426] <TB2> INFO: 4180800 events read in total (177423ms).
[00:28:32.479] <TB2> INFO: Test took 178339ms.
[00:29:00.476] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[00:29:00.486] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[00:29:00.487] <TB2> INFO: run 1 of 1
[00:29:00.747] <TB2> INFO: Expecting 4160000 events.
[00:29:32.636] <TB2> INFO: 748040 events read in total (31297ms).
[00:30:03.872] <TB2> INFO: 1489105 events read in total (62533ms).
[00:30:34.693] <TB2> INFO: 2225500 events read in total (93354ms).
[00:31:05.839] <TB2> INFO: 2957545 events read in total (124500ms).
[00:31:37.416] <TB2> INFO: 3688845 events read in total (156077ms).
[00:31:58.830] <TB2> INFO: 4160000 events read in total (177491ms).
[00:31:58.880] <TB2> INFO: Test took 178393ms.
[00:32:22.132] <TB2> INFO: PixTestTrim80::trimBitTest() done
[00:32:22.133] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2322 seconds
[00:32:23.056] <TB2> INFO: enter test to run
[00:32:23.056] <TB2> INFO: test: exit no parameter change
[00:32:23.180] <TB2> QUIET: Connection to board 156 closed.
[00:32:23.181] <TB2> INFO: pXar: this is the end, my friend