[20:48:19.455] <TB1> INFO: *** Welcome to pxar ***
[20:48:19.455] <TB1> INFO: *** Today: 2016/11/07
[20:48:19.464] <TB1> INFO: *** Version: c8ba-dirty
[20:48:19.464] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C15.dat
[20:48:19.464] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1b.dat
[20:48:19.464] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//defaultMaskFile.dat
[20:48:19.464] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters_C15.dat
[20:48:19.519] <TB1> INFO: clk: 4
[20:48:19.519] <TB1> INFO: ctr: 4
[20:48:19.519] <TB1> INFO: sda: 19
[20:48:19.519] <TB1> INFO: tin: 9
[20:48:19.519] <TB1> INFO: level: 15
[20:48:19.519] <TB1> INFO: triggerdelay: 0
[20:48:19.519] <TB1> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[20:48:19.519] <TB1> INFO: Log level: INFO
[20:48:19.528] <TB1> INFO: Found DTB DTB_WXBYFL
[20:48:19.538] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[20:48:19.540] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[20:48:19.541] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[20:48:21.023] <TB1> INFO: DUT info:
[20:48:21.024] <TB1> INFO: The DUT currently contains the following objects:
[20:48:21.024] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[20:48:21.024] <TB1> INFO: TBM Core alpha (0): 7 registers set
[20:48:21.024] <TB1> INFO: TBM Core beta (1): 7 registers set
[20:48:21.024] <TB1> INFO: TBM Core alpha (2): 7 registers set
[20:48:21.024] <TB1> INFO: TBM Core beta (3): 7 registers set
[20:48:21.024] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:48:21.024] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.024] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:48:21.425] <TB1> INFO: enter 'restricted' command line mode
[20:48:21.425] <TB1> INFO: enter test to run
[20:48:21.425] <TB1> INFO: test: pretest no parameter change
[20:48:21.425] <TB1> INFO: running: pretest
[20:48:21.958] <TB1> INFO: ######################################################################
[20:48:21.958] <TB1> INFO: PixTestPretest::doTest()
[20:48:21.958] <TB1> INFO: ######################################################################
[20:48:21.959] <TB1> INFO: ----------------------------------------------------------------------
[20:48:21.959] <TB1> INFO: PixTestPretest::programROC()
[20:48:21.960] <TB1> INFO: ----------------------------------------------------------------------
[20:48:39.972] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:48:39.972] <TB1> INFO: IA differences per ROC: 16.9 20.1 18.5 19.3 19.3 21.7 19.3 20.9 18.5 17.7 20.9 21.7 20.9 20.9 21.7 20.1
[20:48:40.005] <TB1> INFO: ----------------------------------------------------------------------
[20:48:40.005] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:48:40.005] <TB1> INFO: ----------------------------------------------------------------------
[20:48:47.183] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[20:48:47.183] <TB1> INFO: i(loss) [mA/ROC]: 18.5 19.3 19.3 19.3 19.3 19.3 19.3 18.5 18.5 18.5 19.3 19.3 19.3 18.5 19.3 18.5
[20:48:47.210] <TB1> INFO: ----------------------------------------------------------------------
[20:48:47.210] <TB1> INFO: PixTestPretest::findTiming()
[20:48:47.210] <TB1> INFO: ----------------------------------------------------------------------
[20:48:47.210] <TB1> INFO: PixTestCmd::init()

[20:49:18.322] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:49:18.322] <TB1> INFO: (success/tries = 100/100), width = 3
[20:49:19.816] <TB1> INFO: ----------------------------------------------------------------------
[20:49:19.816] <TB1> INFO: PixTestPretest::findWorkingPixel()
[20:49:19.816] <TB1> INFO: ----------------------------------------------------------------------
[20:49:19.908] <TB1> INFO: Expecting 231680 events.
[20:49:29.550] <TB1> INFO: 231680 events read in total (9050ms).
[20:49:29.559] <TB1> INFO: Test took 9740ms.
[20:49:29.805] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:49:29.835] <TB1> INFO: ----------------------------------------------------------------------
[20:49:29.836] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[20:49:29.836] <TB1> INFO: ----------------------------------------------------------------------
[20:49:29.928] <TB1> INFO: Expecting 231680 events.
[20:49:39.575] <TB1> INFO: 231680 events read in total (9055ms).
[20:49:39.581] <TB1> INFO: Test took 9743ms.
[20:49:39.839] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[20:49:39.839] <TB1> INFO: CalDel: 105 94 108 99 103 102 119 118 111 95 85 96 120 111 106 94
[20:49:39.839] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 52 51 51 51 51 51 51
[20:49:39.841] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C0.dat
[20:49:39.841] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C1.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C2.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C3.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C4.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C5.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C6.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C7.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C8.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C9.dat
[20:49:39.842] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C10.dat
[20:49:39.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C11.dat
[20:49:39.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C12.dat
[20:49:39.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C13.dat
[20:49:39.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C14.dat
[20:49:39.843] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters_C15.dat
[20:49:39.843] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0a.dat
[20:49:39.843] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C0b.dat
[20:49:39.843] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1a.dat
[20:49:39.843] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//tbmParameters_C1b.dat
[20:49:39.843] <TB1> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[20:49:39.937] <TB1> INFO: enter test to run
[20:49:39.937] <TB1> INFO: test: FullTest no parameter change
[20:49:39.937] <TB1> INFO: running: fulltest
[20:49:39.938] <TB1> INFO: ######################################################################
[20:49:39.938] <TB1> INFO: PixTestFullTest::doTest()
[20:49:39.938] <TB1> INFO: ######################################################################
[20:49:39.939] <TB1> INFO: ######################################################################
[20:49:39.939] <TB1> INFO: PixTestAlive::doTest()
[20:49:39.939] <TB1> INFO: ######################################################################
[20:49:39.940] <TB1> INFO: ----------------------------------------------------------------------
[20:49:39.940] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:49:39.940] <TB1> INFO: ----------------------------------------------------------------------
[20:49:40.173] <TB1> INFO: Expecting 41600 events.
[20:49:43.629] <TB1> INFO: 41600 events read in total (2865ms).
[20:49:43.630] <TB1> INFO: Test took 3689ms.
[20:49:43.855] <TB1> INFO: PixTestAlive::aliveTest() done
[20:49:43.855] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:49:43.856] <TB1> INFO: ----------------------------------------------------------------------
[20:49:43.857] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:49:43.857] <TB1> INFO: ----------------------------------------------------------------------
[20:49:44.089] <TB1> INFO: Expecting 41600 events.
[20:49:47.124] <TB1> INFO: 41600 events read in total (2443ms).
[20:49:47.125] <TB1> INFO: Test took 3267ms.
[20:49:47.125] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:49:47.365] <TB1> INFO: PixTestAlive::maskTest() done
[20:49:47.365] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:49:47.366] <TB1> INFO: ----------------------------------------------------------------------
[20:49:47.366] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:49:47.366] <TB1> INFO: ----------------------------------------------------------------------
[20:49:47.631] <TB1> INFO: Expecting 41600 events.
[20:49:51.054] <TB1> INFO: 41600 events read in total (2832ms).
[20:49:51.054] <TB1> INFO: Test took 3687ms.
[20:49:51.281] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[20:49:51.281] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:49:51.281] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:49:51.281] <TB1> INFO: Decoding statistics:
[20:49:51.281] <TB1> INFO: General information:
[20:49:51.281] <TB1> INFO: 16bit words read: 0
[20:49:51.281] <TB1> INFO: valid events total: 0
[20:49:51.281] <TB1> INFO: empty events: 0
[20:49:51.281] <TB1> INFO: valid events with pixels: 0
[20:49:51.281] <TB1> INFO: valid pixel hits: 0
[20:49:51.281] <TB1> INFO: Event errors: 0
[20:49:51.281] <TB1> INFO: start marker: 0
[20:49:51.281] <TB1> INFO: stop marker: 0
[20:49:51.281] <TB1> INFO: overflow: 0
[20:49:51.281] <TB1> INFO: invalid 5bit words: 0
[20:49:51.281] <TB1> INFO: invalid XOR eye diagram: 0
[20:49:51.281] <TB1> INFO: frame (failed synchr.): 0
[20:49:51.281] <TB1> INFO: idle data (no TBM trl): 0
[20:49:51.281] <TB1> INFO: no data (only TBM hdr): 0
[20:49:51.281] <TB1> INFO: TBM errors: 0
[20:49:51.281] <TB1> INFO: flawed TBM headers: 0
[20:49:51.281] <TB1> INFO: flawed TBM trailers: 0
[20:49:51.281] <TB1> INFO: event ID mismatches: 0
[20:49:51.281] <TB1> INFO: ROC errors: 0
[20:49:51.281] <TB1> INFO: missing ROC header(s): 0
[20:49:51.281] <TB1> INFO: misplaced readback start: 0
[20:49:51.281] <TB1> INFO: Pixel decoding errors: 0
[20:49:51.281] <TB1> INFO: pixel data incomplete: 0
[20:49:51.281] <TB1> INFO: pixel address: 0
[20:49:51.281] <TB1> INFO: pulse height fill bit: 0
[20:49:51.281] <TB1> INFO: buffer corruption: 0
[20:49:51.290] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:49:51.291] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[20:49:51.291] <TB1> INFO: ######################################################################
[20:49:51.291] <TB1> INFO: PixTestReadback::doTest()
[20:49:51.291] <TB1> INFO: ######################################################################
[20:49:51.291] <TB1> INFO: ----------------------------------------------------------------------
[20:49:51.291] <TB1> INFO: PixTestReadback::CalibrateVd()
[20:49:51.291] <TB1> INFO: ----------------------------------------------------------------------
[20:50:01.250] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:50:01.250] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:50:01.251] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:50:01.252] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:50:01.252] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:50:01.278] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[20:50:01.278] <TB1> INFO: ----------------------------------------------------------------------
[20:50:01.278] <TB1> INFO: PixTestReadback::CalibrateVa()
[20:50:01.278] <TB1> INFO: ----------------------------------------------------------------------
[20:50:11.165] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:50:11.165] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:50:11.165] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:50:11.166] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:50:11.167] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:50:11.167] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:50:11.167] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:50:11.193] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[20:50:11.193] <TB1> INFO: ----------------------------------------------------------------------
[20:50:11.193] <TB1> INFO: PixTestReadback::readbackVbg()
[20:50:11.193] <TB1> INFO: ----------------------------------------------------------------------
[20:50:18.833] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[20:50:18.833] <TB1> INFO: ----------------------------------------------------------------------
[20:50:18.833] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[20:50:18.833] <TB1> INFO: ----------------------------------------------------------------------
[20:50:18.833] <TB1> INFO: Vbg will be calibrated using Vd calibration
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152calibrated Vbg = 1.1391 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 146calibrated Vbg = 1.13882 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158.4calibrated Vbg = 1.13987 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160calibrated Vbg = 1.13046 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.2calibrated Vbg = 1.13099 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157calibrated Vbg = 1.13683 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155calibrated Vbg = 1.14185 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 145.2calibrated Vbg = 1.14077 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 144.6calibrated Vbg = 1.1388 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 162.3calibrated Vbg = 1.1376 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 148.6calibrated Vbg = 1.12835 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 155.7calibrated Vbg = 1.13141 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 152.3calibrated Vbg = 1.13638 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 154.4calibrated Vbg = 1.14346 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.8calibrated Vbg = 1.13908 :::*/*/*/*/
[20:50:18.833] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.6calibrated Vbg = 1.13868 :::*/*/*/*/
[20:50:18.835] <TB1> INFO: ----------------------------------------------------------------------
[20:50:18.835] <TB1> INFO: PixTestReadback::CalibrateIa()
[20:50:18.835] <TB1> INFO: ----------------------------------------------------------------------
[20:52:59.104] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C0.dat
[20:52:59.104] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C1.dat
[20:52:59.104] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C2.dat
[20:52:59.104] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C3.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C4.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C5.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C6.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C7.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C8.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C9.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C10.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C11.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C12.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C13.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C14.dat
[20:52:59.105] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//readbackCal_C15.dat
[20:52:59.133] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[20:52:59.134] <TB1> INFO: PixTestReadback::doTest() done
[20:52:59.134] <TB1> INFO: Decoding statistics:
[20:52:59.134] <TB1> INFO: General information:
[20:52:59.134] <TB1> INFO: 16bit words read: 1536
[20:52:59.134] <TB1> INFO: valid events total: 256
[20:52:59.134] <TB1> INFO: empty events: 256
[20:52:59.134] <TB1> INFO: valid events with pixels: 0
[20:52:59.134] <TB1> INFO: valid pixel hits: 0
[20:52:59.134] <TB1> INFO: Event errors: 0
[20:52:59.134] <TB1> INFO: start marker: 0
[20:52:59.134] <TB1> INFO: stop marker: 0
[20:52:59.134] <TB1> INFO: overflow: 0
[20:52:59.134] <TB1> INFO: invalid 5bit words: 0
[20:52:59.134] <TB1> INFO: invalid XOR eye diagram: 0
[20:52:59.134] <TB1> INFO: frame (failed synchr.): 0
[20:52:59.134] <TB1> INFO: idle data (no TBM trl): 0
[20:52:59.134] <TB1> INFO: no data (only TBM hdr): 0
[20:52:59.134] <TB1> INFO: TBM errors: 0
[20:52:59.134] <TB1> INFO: flawed TBM headers: 0
[20:52:59.134] <TB1> INFO: flawed TBM trailers: 0
[20:52:59.134] <TB1> INFO: event ID mismatches: 0
[20:52:59.134] <TB1> INFO: ROC errors: 0
[20:52:59.134] <TB1> INFO: missing ROC header(s): 0
[20:52:59.134] <TB1> INFO: misplaced readback start: 0
[20:52:59.134] <TB1> INFO: Pixel decoding errors: 0
[20:52:59.134] <TB1> INFO: pixel data incomplete: 0
[20:52:59.134] <TB1> INFO: pixel address: 0
[20:52:59.134] <TB1> INFO: pulse height fill bit: 0
[20:52:59.134] <TB1> INFO: buffer corruption: 0
[20:52:59.168] <TB1> INFO: ######################################################################
[20:52:59.168] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:52:59.168] <TB1> INFO: ######################################################################
[20:52:59.171] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:52:59.185] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:52:59.185] <TB1> INFO: run 1 of 1
[20:52:59.462] <TB1> INFO: Expecting 3120000 events.
[20:53:29.805] <TB1> INFO: 676900 events read in total (29751ms).











[20:53:59.291] <TB1> INFO: 1347680 events read in total (59237ms).











[20:54:29.045] <TB1> INFO: 2015065 events read in total (88991ms).
[20:54:58.805] <TB1> INFO: 2681795 events read in total (118751ms).
[20:55:18.615] <TB1> INFO: 3120000 events read in total (138561ms).
[20:55:18.687] <TB1> INFO: Test took 139501ms.
[20:55:47.228] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 168 seconds
[20:55:47.228] <TB1> INFO: number of dead bumps (per ROC): 3 0 0 2 0 0 0 0 2 0 0 0 0 1 0 3
[20:55:47.228] <TB1> INFO: separation cut (per ROC): 103 112 103 108 105 112 110 104 106 107 107 112 125 102 104 103
[20:55:47.228] <TB1> INFO: Decoding statistics:
[20:55:47.228] <TB1> INFO: General information:
[20:55:47.228] <TB1> INFO: 16bit words read: 0
[20:55:47.228] <TB1> INFO: valid events total: 0
[20:55:47.228] <TB1> INFO: empty events: 0
[20:55:47.228] <TB1> INFO: valid events with pixels: 0
[20:55:47.228] <TB1> INFO: valid pixel hits: 0
[20:55:47.228] <TB1> INFO: Event errors: 0
[20:55:47.228] <TB1> INFO: start marker: 0
[20:55:47.228] <TB1> INFO: stop marker: 0
[20:55:47.228] <TB1> INFO: overflow: 0
[20:55:47.228] <TB1> INFO: invalid 5bit words: 0
[20:55:47.228] <TB1> INFO: invalid XOR eye diagram: 0
[20:55:47.228] <TB1> INFO: frame (failed synchr.): 0
[20:55:47.228] <TB1> INFO: idle data (no TBM trl): 0
[20:55:47.228] <TB1> INFO: no data (only TBM hdr): 0
[20:55:47.228] <TB1> INFO: TBM errors: 0
[20:55:47.228] <TB1> INFO: flawed TBM headers: 0
[20:55:47.228] <TB1> INFO: flawed TBM trailers: 0
[20:55:47.228] <TB1> INFO: event ID mismatches: 0
[20:55:47.228] <TB1> INFO: ROC errors: 0
[20:55:47.228] <TB1> INFO: missing ROC header(s): 0
[20:55:47.228] <TB1> INFO: misplaced readback start: 0
[20:55:47.228] <TB1> INFO: Pixel decoding errors: 0
[20:55:47.228] <TB1> INFO: pixel data incomplete: 0
[20:55:47.228] <TB1> INFO: pixel address: 0
[20:55:47.228] <TB1> INFO: pulse height fill bit: 0
[20:55:47.228] <TB1> INFO: buffer corruption: 0
[20:55:47.267] <TB1> INFO: ######################################################################
[20:55:47.267] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:55:47.267] <TB1> INFO: ######################################################################
[20:55:47.267] <TB1> INFO: ----------------------------------------------------------------------
[20:55:47.267] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:55:47.267] <TB1> INFO: ----------------------------------------------------------------------
[20:55:47.267] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[20:55:47.279] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[20:55:47.279] <TB1> INFO: run 1 of 1
[20:55:47.524] <TB1> INFO: Expecting 36608000 events.
[20:56:10.956] <TB1> INFO: 676900 events read in total (22841ms).
[20:56:33.529] <TB1> INFO: 1344250 events read in total (45414ms).
[20:56:56.239] <TB1> INFO: 2012350 events read in total (68124ms).
[20:57:18.638] <TB1> INFO: 2678000 events read in total (90523ms).
[20:57:41.212] <TB1> INFO: 3341050 events read in total (113097ms).
[20:58:03.895] <TB1> INFO: 4002400 events read in total (135780ms).
[20:58:26.195] <TB1> INFO: 4664950 events read in total (158080ms).
[20:58:48.526] <TB1> INFO: 5325150 events read in total (180411ms).
[20:59:10.947] <TB1> INFO: 5987050 events read in total (202832ms).
[20:59:33.607] <TB1> INFO: 6648750 events read in total (225492ms).
[20:59:55.921] <TB1> INFO: 7308500 events read in total (247806ms).
[21:00:18.430] <TB1> INFO: 7969150 events read in total (270315ms).
[21:00:41.030] <TB1> INFO: 8628800 events read in total (292915ms).
[21:01:03.350] <TB1> INFO: 9289100 events read in total (315235ms).
[21:01:25.649] <TB1> INFO: 9946900 events read in total (337534ms).
[21:01:48.111] <TB1> INFO: 10605000 events read in total (359996ms).
[21:02:10.517] <TB1> INFO: 11263850 events read in total (382402ms).
[21:02:32.869] <TB1> INFO: 11921250 events read in total (404754ms).
[21:02:55.030] <TB1> INFO: 12577600 events read in total (426915ms).
[21:03:17.496] <TB1> INFO: 13235800 events read in total (449381ms).
[21:03:40.306] <TB1> INFO: 13894100 events read in total (472191ms).
[21:04:02.810] <TB1> INFO: 14551600 events read in total (494695ms).
[21:04:25.038] <TB1> INFO: 15206100 events read in total (516923ms).
[21:04:47.297] <TB1> INFO: 15863250 events read in total (539182ms).
[21:05:09.454] <TB1> INFO: 16519200 events read in total (561339ms).
[21:05:31.594] <TB1> INFO: 17176400 events read in total (583479ms).
[21:05:53.920] <TB1> INFO: 17831000 events read in total (605805ms).
[21:06:16.179] <TB1> INFO: 18485850 events read in total (628064ms).
[21:06:38.359] <TB1> INFO: 19138900 events read in total (650244ms).
[21:07:00.747] <TB1> INFO: 19792000 events read in total (672632ms).
[21:07:23.139] <TB1> INFO: 20445400 events read in total (695024ms).
[21:07:45.393] <TB1> INFO: 21098050 events read in total (717278ms).
[21:08:07.591] <TB1> INFO: 21748400 events read in total (739476ms).
[21:08:29.764] <TB1> INFO: 22398250 events read in total (761649ms).
[21:08:51.932] <TB1> INFO: 23049450 events read in total (783817ms).
[21:09:14.233] <TB1> INFO: 23702300 events read in total (806118ms).
[21:09:36.359] <TB1> INFO: 24354850 events read in total (828244ms).
[21:09:58.524] <TB1> INFO: 25006800 events read in total (850409ms).
[21:10:20.690] <TB1> INFO: 25658900 events read in total (872575ms).
[21:10:42.638] <TB1> INFO: 26310300 events read in total (894523ms).
[21:11:04.712] <TB1> INFO: 26961750 events read in total (916597ms).
[21:11:26.900] <TB1> INFO: 27612400 events read in total (938785ms).
[21:11:49.055] <TB1> INFO: 28263750 events read in total (960940ms).
[21:12:11.179] <TB1> INFO: 28914250 events read in total (983064ms).
[21:12:33.259] <TB1> INFO: 29564950 events read in total (1005144ms).
[21:12:55.598] <TB1> INFO: 30213900 events read in total (1027483ms).
[21:13:17.980] <TB1> INFO: 30862400 events read in total (1049865ms).
[21:13:40.144] <TB1> INFO: 31511350 events read in total (1072029ms).
[21:14:02.183] <TB1> INFO: 32163250 events read in total (1094068ms).
[21:14:24.354] <TB1> INFO: 32816700 events read in total (1116239ms).
[21:14:46.591] <TB1> INFO: 33472750 events read in total (1138476ms).
[21:15:09.022] <TB1> INFO: 34127400 events read in total (1160907ms).
[21:15:31.202] <TB1> INFO: 34783200 events read in total (1183087ms).
[21:15:53.176] <TB1> INFO: 35436800 events read in total (1205061ms).
[21:16:15.325] <TB1> INFO: 36095800 events read in total (1227210ms).
[21:16:32.726] <TB1> INFO: 36608000 events read in total (1244611ms).
[21:16:32.783] <TB1> INFO: Test took 1245504ms.
[21:16:33.266] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:35.181] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:37.169] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:39.095] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:41.020] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:43.055] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:45.161] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:47.155] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:48.653] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:50.147] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:52.213] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:54.143] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:56.047] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:57.892] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:16:59.692] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:17:01.732] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[21:17:03.754] <TB1> INFO: PixTestScurves::scurves() done
[21:17:03.754] <TB1> INFO: Vcal mean: 112.90 122.58 118.58 115.81 113.13 120.78 112.01 103.74 107.62 118.72 113.49 118.45 119.83 107.65 115.03 114.65
[21:17:03.754] <TB1> INFO: Vcal RMS: 5.26 5.77 5.98 5.32 5.64 6.35 5.26 5.83 5.35 6.59 5.19 6.28 5.95 5.37 5.51 5.53
[21:17:03.754] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1276 seconds
[21:17:03.754] <TB1> INFO: Decoding statistics:
[21:17:03.754] <TB1> INFO: General information:
[21:17:03.754] <TB1> INFO: 16bit words read: 0
[21:17:03.754] <TB1> INFO: valid events total: 0
[21:17:03.754] <TB1> INFO: empty events: 0
[21:17:03.754] <TB1> INFO: valid events with pixels: 0
[21:17:03.754] <TB1> INFO: valid pixel hits: 0
[21:17:03.754] <TB1> INFO: Event errors: 0
[21:17:03.754] <TB1> INFO: start marker: 0
[21:17:03.754] <TB1> INFO: stop marker: 0
[21:17:03.754] <TB1> INFO: overflow: 0
[21:17:03.754] <TB1> INFO: invalid 5bit words: 0
[21:17:03.754] <TB1> INFO: invalid XOR eye diagram: 0
[21:17:03.754] <TB1> INFO: frame (failed synchr.): 0
[21:17:03.754] <TB1> INFO: idle data (no TBM trl): 0
[21:17:03.754] <TB1> INFO: no data (only TBM hdr): 0
[21:17:03.754] <TB1> INFO: TBM errors: 0
[21:17:03.754] <TB1> INFO: flawed TBM headers: 0
[21:17:03.754] <TB1> INFO: flawed TBM trailers: 0
[21:17:03.754] <TB1> INFO: event ID mismatches: 0
[21:17:03.754] <TB1> INFO: ROC errors: 0
[21:17:03.754] <TB1> INFO: missing ROC header(s): 0
[21:17:03.754] <TB1> INFO: misplaced readback start: 0
[21:17:03.754] <TB1> INFO: Pixel decoding errors: 0
[21:17:03.754] <TB1> INFO: pixel data incomplete: 0
[21:17:03.754] <TB1> INFO: pixel address: 0
[21:17:03.754] <TB1> INFO: pulse height fill bit: 0
[21:17:03.754] <TB1> INFO: buffer corruption: 0
[21:17:03.823] <TB1> INFO: ######################################################################
[21:17:03.823] <TB1> INFO: PixTestTrim::doTest()
[21:17:03.823] <TB1> INFO: ######################################################################
[21:17:03.824] <TB1> INFO: ----------------------------------------------------------------------
[21:17:03.824] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[21:17:03.824] <TB1> INFO: ----------------------------------------------------------------------
[21:17:03.876] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:17:03.876] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:17:03.887] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:17:03.887] <TB1> INFO: run 1 of 1
[21:17:04.143] <TB1> INFO: Expecting 5025280 events.
[21:17:34.961] <TB1> INFO: 828168 events read in total (30222ms).
[21:18:04.566] <TB1> INFO: 1652232 events read in total (59827ms).
[21:18:33.975] <TB1> INFO: 2472560 events read in total (89236ms).
[21:19:03.366] <TB1> INFO: 3290920 events read in total (118627ms).
[21:19:32.522] <TB1> INFO: 4105880 events read in total (147784ms).
[21:20:01.751] <TB1> INFO: 4920320 events read in total (177012ms).
[21:20:05.887] <TB1> INFO: 5025280 events read in total (181148ms).
[21:20:05.929] <TB1> INFO: Test took 182042ms.
[21:20:25.943] <TB1> INFO: ROC 0 VthrComp = 112
[21:20:25.943] <TB1> INFO: ROC 1 VthrComp = 131
[21:20:25.943] <TB1> INFO: ROC 2 VthrComp = 122
[21:20:25.944] <TB1> INFO: ROC 3 VthrComp = 119
[21:20:25.944] <TB1> INFO: ROC 4 VthrComp = 114
[21:20:25.944] <TB1> INFO: ROC 5 VthrComp = 126
[21:20:25.945] <TB1> INFO: ROC 6 VthrComp = 117
[21:20:25.945] <TB1> INFO: ROC 7 VthrComp = 104
[21:20:25.945] <TB1> INFO: ROC 8 VthrComp = 105
[21:20:25.945] <TB1> INFO: ROC 9 VthrComp = 117
[21:20:25.945] <TB1> INFO: ROC 10 VthrComp = 124
[21:20:25.945] <TB1> INFO: ROC 11 VthrComp = 125
[21:20:25.945] <TB1> INFO: ROC 12 VthrComp = 128
[21:20:25.945] <TB1> INFO: ROC 13 VthrComp = 109
[21:20:25.946] <TB1> INFO: ROC 14 VthrComp = 118
[21:20:25.946] <TB1> INFO: ROC 15 VthrComp = 118
[21:20:26.223] <TB1> INFO: Expecting 41600 events.
[21:20:29.736] <TB1> INFO: 41600 events read in total (2921ms).
[21:20:29.737] <TB1> INFO: Test took 3790ms.
[21:20:29.746] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:20:29.746] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:20:29.755] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:20:29.755] <TB1> INFO: run 1 of 1
[21:20:30.033] <TB1> INFO: Expecting 5025280 events.
[21:20:56.687] <TB1> INFO: 591160 events read in total (26058ms).
[21:21:21.873] <TB1> INFO: 1181040 events read in total (51244ms).
[21:21:47.402] <TB1> INFO: 1770464 events read in total (76773ms).
[21:22:12.849] <TB1> INFO: 2359392 events read in total (102220ms).
[21:22:38.144] <TB1> INFO: 2946336 events read in total (127515ms).
[21:23:03.701] <TB1> INFO: 3531968 events read in total (153072ms).
[21:23:28.990] <TB1> INFO: 4116544 events read in total (178361ms).
[21:23:53.901] <TB1> INFO: 4702280 events read in total (203272ms).
[21:24:07.947] <TB1> INFO: 5025280 events read in total (217318ms).
[21:24:07.002] <TB1> INFO: Test took 218247ms.
[21:24:34.910] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.6908 for pixel 16/6 mean/min/max = 46.6542/32.5643/60.7442
[21:24:34.911] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.332 for pixel 45/8 mean/min/max = 45.7639/31.9271/59.6008
[21:24:34.911] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.0994 for pixel 0/8 mean/min/max = 46.2128/32.0288/60.3968
[21:24:34.911] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 59.6398 for pixel 25/1 mean/min/max = 45.3266/30.9569/59.6962
[21:24:34.912] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 62.8148 for pixel 0/41 mean/min/max = 47.5053/32.033/62.9776
[21:24:34.912] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 60.5269 for pixel 10/40 mean/min/max = 46.3247/32.1074/60.542
[21:24:34.912] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.4062 for pixel 12/4 mean/min/max = 45.8322/32.0321/59.6324
[21:24:34.912] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 61.7331 for pixel 11/2 mean/min/max = 47.6785/33.3999/61.957
[21:24:34.913] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 63.2881 for pixel 11/0 mean/min/max = 48.62/33.922/63.318
[21:24:34.913] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 62.5754 for pixel 5/53 mean/min/max = 47.4159/31.785/63.0468
[21:24:34.913] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 58.4827 for pixel 10/14 mean/min/max = 45.289/31.6515/58.9264
[21:24:34.914] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.5607 for pixel 5/41 mean/min/max = 45.9509/32.2832/59.6185
[21:24:34.914] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 58.4274 for pixel 15/8 mean/min/max = 44.648/30.7925/58.5036
[21:24:34.914] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 63.1963 for pixel 21/1 mean/min/max = 48.6966/34.1893/63.2039
[21:24:34.914] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 60.7272 for pixel 2/2 mean/min/max = 45.9968/31.2527/60.741
[21:24:34.915] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 60.5413 for pixel 8/1 mean/min/max = 45.6088/30.6487/60.5689
[21:24:34.915] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:24:35.003] <TB1> INFO: Expecting 411648 events.
[21:24:44.514] <TB1> INFO: 411648 events read in total (8911ms).
[21:24:44.520] <TB1> INFO: Expecting 411648 events.
[21:24:53.709] <TB1> INFO: 411648 events read in total (8786ms).
[21:24:53.719] <TB1> INFO: Expecting 411648 events.
[21:25:02.886] <TB1> INFO: 411648 events read in total (8765ms).
[21:25:02.898] <TB1> INFO: Expecting 411648 events.
[21:25:11.982] <TB1> INFO: 411648 events read in total (8681ms).
[21:25:11.001] <TB1> INFO: Expecting 411648 events.
[21:25:21.036] <TB1> INFO: 411648 events read in total (8632ms).
[21:25:21.058] <TB1> INFO: Expecting 411648 events.
[21:25:30.161] <TB1> INFO: 411648 events read in total (8701ms).
[21:25:30.180] <TB1> INFO: Expecting 411648 events.
[21:25:39.323] <TB1> INFO: 411648 events read in total (8740ms).
[21:25:39.344] <TB1> INFO: Expecting 411648 events.
[21:25:48.358] <TB1> INFO: 411648 events read in total (8611ms).
[21:25:48.390] <TB1> INFO: Expecting 411648 events.
[21:25:57.345] <TB1> INFO: 411648 events read in total (8552ms).
[21:25:57.378] <TB1> INFO: Expecting 411648 events.
[21:26:06.399] <TB1> INFO: 411648 events read in total (8618ms).
[21:26:06.428] <TB1> INFO: Expecting 411648 events.
[21:26:15.506] <TB1> INFO: 411648 events read in total (8675ms).
[21:26:15.537] <TB1> INFO: Expecting 411648 events.
[21:26:24.604] <TB1> INFO: 411648 events read in total (8664ms).
[21:26:24.651] <TB1> INFO: Expecting 411648 events.
[21:26:33.673] <TB1> INFO: 411648 events read in total (8619ms).
[21:26:33.709] <TB1> INFO: Expecting 411648 events.
[21:26:42.779] <TB1> INFO: 411648 events read in total (8667ms).
[21:26:42.820] <TB1> INFO: Expecting 411648 events.
[21:26:51.881] <TB1> INFO: 411648 events read in total (8658ms).
[21:26:51.938] <TB1> INFO: Expecting 411648 events.
[21:27:01.056] <TB1> INFO: 411648 events read in total (8715ms).
[21:27:01.102] <TB1> INFO: Test took 146187ms.
[21:27:01.924] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:27:01.934] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:27:01.934] <TB1> INFO: run 1 of 1
[21:27:02.166] <TB1> INFO: Expecting 5025280 events.
[21:27:28.112] <TB1> INFO: 591328 events read in total (25355ms).
[21:27:53.757] <TB1> INFO: 1182016 events read in total (51000ms).
[21:28:18.940] <TB1> INFO: 1770072 events read in total (76183ms).
[21:28:44.234] <TB1> INFO: 2357616 events read in total (101477ms).
[21:29:09.555] <TB1> INFO: 2945264 events read in total (126798ms).
[21:29:34.775] <TB1> INFO: 3533904 events read in total (152018ms).
[21:29:59.979] <TB1> INFO: 4121368 events read in total (177222ms).
[21:30:25.304] <TB1> INFO: 4708464 events read in total (202547ms).
[21:30:39.204] <TB1> INFO: 5025280 events read in total (216447ms).
[21:30:39.291] <TB1> INFO: Test took 217358ms.
[21:31:02.584] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 3.621508 .. 146.482064
[21:31:02.853] <TB1> INFO: Expecting 208000 events.
[21:31:12.442] <TB1> INFO: 208000 events read in total (8996ms).
[21:31:12.443] <TB1> INFO: Test took 9858ms.
[21:31:12.489] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 156 (-1/-1) hits flags = 528 (plus default)
[21:31:12.499] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:31:12.499] <TB1> INFO: run 1 of 1
[21:31:12.777] <TB1> INFO: Expecting 5125120 events.
[21:31:38.700] <TB1> INFO: 581464 events read in total (25332ms).
[21:32:03.718] <TB1> INFO: 1163560 events read in total (50350ms).
[21:32:29.165] <TB1> INFO: 1745000 events read in total (75797ms).
[21:32:54.139] <TB1> INFO: 2326624 events read in total (100771ms).
[21:33:19.083] <TB1> INFO: 2908152 events read in total (125715ms).
[21:33:44.212] <TB1> INFO: 3488104 events read in total (150844ms).
[21:34:09.443] <TB1> INFO: 4068040 events read in total (176075ms).
[21:34:34.375] <TB1> INFO: 4647872 events read in total (201007ms).
[21:34:55.164] <TB1> INFO: 5125120 events read in total (221797ms).
[21:34:55.235] <TB1> INFO: Test took 222736ms.
[21:35:22.372] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.931343 .. 44.605511
[21:35:22.621] <TB1> INFO: Expecting 208000 events.
[21:35:32.138] <TB1> INFO: 208000 events read in total (8925ms).
[21:35:32.139] <TB1> INFO: Test took 9765ms.
[21:35:32.200] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 54 (-1/-1) hits flags = 528 (plus default)
[21:35:32.210] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:35:32.210] <TB1> INFO: run 1 of 1
[21:35:32.488] <TB1> INFO: Expecting 1264640 events.
[21:36:00.721] <TB1> INFO: 662056 events read in total (27641ms).
[21:36:25.995] <TB1> INFO: 1264640 events read in total (52916ms).
[21:36:26.031] <TB1> INFO: Test took 53822ms.
[21:36:40.117] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 26.224765 .. 45.099766
[21:36:40.352] <TB1> INFO: Expecting 208000 events.
[21:36:50.031] <TB1> INFO: 208000 events read in total (9087ms).
[21:36:50.031] <TB1> INFO: Test took 9913ms.
[21:36:50.077] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:36:50.087] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:36:50.087] <TB1> INFO: run 1 of 1
[21:36:50.365] <TB1> INFO: Expecting 1331200 events.
[21:37:18.758] <TB1> INFO: 663432 events read in total (27801ms).
[21:37:46.126] <TB1> INFO: 1325144 events read in total (55169ms).
[21:37:46.805] <TB1> INFO: 1331200 events read in total (55848ms).
[21:37:46.826] <TB1> INFO: Test took 56739ms.
[21:38:00.814] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.723180 .. 43.163056
[21:38:01.047] <TB1> INFO: Expecting 208000 events.
[21:38:10.766] <TB1> INFO: 208000 events read in total (9127ms).
[21:38:10.767] <TB1> INFO: Test took 9951ms.
[21:38:10.813] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 53 (-1/-1) hits flags = 528 (plus default)
[21:38:10.823] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:38:10.824] <TB1> INFO: run 1 of 1
[21:38:11.101] <TB1> INFO: Expecting 1297920 events.
[21:38:39.883] <TB1> INFO: 676080 events read in total (28190ms).
[21:39:05.446] <TB1> INFO: 1297920 events read in total (53753ms).
[21:39:05.470] <TB1> INFO: Test took 54646ms.
[21:39:18.048] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:39:18.048] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:39:18.060] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[21:39:18.060] <TB1> INFO: run 1 of 1
[21:39:18.336] <TB1> INFO: Expecting 1364480 events.
[21:39:46.744] <TB1> INFO: 667040 events read in total (27816ms).
[21:40:13.898] <TB1> INFO: 1332936 events read in total (54970ms).
[21:40:15.595] <TB1> INFO: 1364480 events read in total (56667ms).
[21:40:15.624] <TB1> INFO: Test took 57565ms.
[21:40:27.561] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C0.dat
[21:40:27.561] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C1.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C2.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C3.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C4.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C5.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C6.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C7.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C8.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C9.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C10.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C11.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C12.dat
[21:40:27.562] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C13.dat
[21:40:27.563] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C14.dat
[21:40:27.563] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C15.dat
[21:40:27.563] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C0.dat
[21:40:27.570] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C1.dat
[21:40:27.577] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C2.dat
[21:40:27.582] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C3.dat
[21:40:27.588] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C4.dat
[21:40:27.594] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C5.dat
[21:40:27.600] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C6.dat
[21:40:27.606] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C7.dat
[21:40:27.611] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C8.dat
[21:40:27.617] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C9.dat
[21:40:27.622] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C10.dat
[21:40:27.628] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C11.dat
[21:40:27.633] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C12.dat
[21:40:27.639] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C13.dat
[21:40:27.644] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C14.dat
[21:40:27.650] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//trimParameters35_C15.dat
[21:40:27.655] <TB1> INFO: PixTestTrim::trimTest() done
[21:40:27.655] <TB1> INFO: vtrim: 128 159 127 142 138 145 134 138 126 126 139 137 125 135 151 141
[21:40:27.655] <TB1> INFO: vthrcomp: 112 131 122 119 114 126 117 104 105 117 124 125 128 109 118 118
[21:40:27.655] <TB1> INFO: vcal mean: 34.97 35.00 34.96 34.84 35.01 34.99 35.00 34.99 35.02 35.00 34.96 34.98 34.95 35.01 35.01 35.00
[21:40:27.655] <TB1> INFO: vcal RMS: 1.07 1.19 1.05 1.15 1.06 1.14 0.96 1.00 1.04 1.14 1.05 1.06 1.01 1.00 1.13 1.07
[21:40:27.655] <TB1> INFO: bits mean: 9.61 10.72 9.59 10.12 9.25 9.87 9.84 9.14 9.26 9.64 10.08 10.21 10.13 9.07 10.41 9.99
[21:40:27.655] <TB1> INFO: bits RMS: 2.53 2.15 2.62 2.59 2.70 2.48 2.52 2.54 2.40 2.57 2.51 2.31 2.67 2.39 2.39 2.63
[21:40:27.662] <TB1> INFO: ----------------------------------------------------------------------
[21:40:27.662] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:40:27.662] <TB1> INFO: ----------------------------------------------------------------------
[21:40:27.665] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:40:27.674] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[21:40:27.674] <TB1> INFO: run 1 of 1
[21:40:27.929] <TB1> INFO: Expecting 4160000 events.
[21:40:59.800] <TB1> INFO: 749145 events read in total (31280ms).
[21:41:31.141] <TB1> INFO: 1488975 events read in total (62621ms).
[21:42:02.056] <TB1> INFO: 2223920 events read in total (93536ms).
[21:42:33.218] <TB1> INFO: 2954115 events read in total (124698ms).
[21:43:04.272] <TB1> INFO: 3682355 events read in total (155752ms).
[21:43:24.917] <TB1> INFO: 4160000 events read in total (176397ms).
[21:43:24.980] <TB1> INFO: Test took 177306ms.
[21:43:52.871] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[21:43:52.882] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[21:43:52.882] <TB1> INFO: run 1 of 1
[21:43:53.149] <TB1> INFO: Expecting 4118400 events.
[21:44:26.014] <TB1> INFO: 728380 events read in total (32273ms).
[21:44:56.556] <TB1> INFO: 1447700 events read in total (62815ms).
[21:45:26.931] <TB1> INFO: 2162385 events read in total (93191ms).
[21:45:57.367] <TB1> INFO: 2872260 events read in total (123626ms).
[21:46:27.868] <TB1> INFO: 3580325 events read in total (154127ms).
[21:46:50.915] <TB1> INFO: 4118400 events read in total (177174ms).
[21:46:50.982] <TB1> INFO: Test took 178100ms.
[21:47:19.042] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[21:47:19.055] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[21:47:19.055] <TB1> INFO: run 1 of 1
[21:47:19.335] <TB1> INFO: Expecting 3806400 events.
[21:47:52.363] <TB1> INFO: 750655 events read in total (32436ms).
[21:48:23.126] <TB1> INFO: 1491395 events read in total (63199ms).
[21:48:54.084] <TB1> INFO: 2225395 events read in total (94157ms).
[21:49:24.789] <TB1> INFO: 2955260 events read in total (124862ms).
[21:49:55.237] <TB1> INFO: 3686350 events read in total (155310ms).
[21:50:00.577] <TB1> INFO: 3806400 events read in total (160650ms).
[21:50:00.617] <TB1> INFO: Test took 161563ms.
[21:50:24.877] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[21:50:24.887] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[21:50:24.887] <TB1> INFO: run 1 of 1
[21:50:25.120] <TB1> INFO: Expecting 3806400 events.
[21:50:57.254] <TB1> INFO: 751180 events read in total (31543ms).
[21:51:28.318] <TB1> INFO: 1492350 events read in total (62607ms).
[21:51:59.509] <TB1> INFO: 2226610 events read in total (93798ms).
[21:52:30.173] <TB1> INFO: 2956605 events read in total (124462ms).
[21:53:01.253] <TB1> INFO: 3687840 events read in total (155542ms).
[21:53:06.500] <TB1> INFO: 3806400 events read in total (160789ms).
[21:53:06.552] <TB1> INFO: Test took 161665ms.
[21:53:29.018] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[21:53:29.028] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[21:53:29.028] <TB1> INFO: run 1 of 1
[21:53:29.287] <TB1> INFO: Expecting 3785600 events.
[21:54:01.841] <TB1> INFO: 753055 events read in total (31962ms).
[21:54:32.895] <TB1> INFO: 1495970 events read in total (63016ms).
[21:55:03.982] <TB1> INFO: 2232000 events read in total (94103ms).
[21:55:34.629] <TB1> INFO: 2963680 events read in total (124750ms).
[21:56:05.506] <TB1> INFO: 3697060 events read in total (155627ms).
[21:56:09.791] <TB1> INFO: 3785600 events read in total (159912ms).
[21:56:09.833] <TB1> INFO: Test took 160805ms.
[21:56:34.284] <TB1> INFO: PixTestTrim::trimBitTest() done
[21:56:34.285] <TB1> INFO: PixTestTrim::doTest() done, duration: 2370 seconds
[21:56:34.285] <TB1> INFO: Decoding statistics:
[21:56:34.285] <TB1> INFO: General information:
[21:56:34.285] <TB1> INFO: 16bit words read: 0
[21:56:34.285] <TB1> INFO: valid events total: 0
[21:56:34.285] <TB1> INFO: empty events: 0
[21:56:34.285] <TB1> INFO: valid events with pixels: 0
[21:56:34.285] <TB1> INFO: valid pixel hits: 0
[21:56:34.285] <TB1> INFO: Event errors: 0
[21:56:34.285] <TB1> INFO: start marker: 0
[21:56:34.285] <TB1> INFO: stop marker: 0
[21:56:34.285] <TB1> INFO: overflow: 0
[21:56:34.285] <TB1> INFO: invalid 5bit words: 0
[21:56:34.285] <TB1> INFO: invalid XOR eye diagram: 0
[21:56:34.285] <TB1> INFO: frame (failed synchr.): 0
[21:56:34.285] <TB1> INFO: idle data (no TBM trl): 0
[21:56:34.285] <TB1> INFO: no data (only TBM hdr): 0
[21:56:34.285] <TB1> INFO: TBM errors: 0
[21:56:34.285] <TB1> INFO: flawed TBM headers: 0
[21:56:34.285] <TB1> INFO: flawed TBM trailers: 0
[21:56:34.285] <TB1> INFO: event ID mismatches: 0
[21:56:34.285] <TB1> INFO: ROC errors: 0
[21:56:34.286] <TB1> INFO: missing ROC header(s): 0
[21:56:34.286] <TB1> INFO: misplaced readback start: 0
[21:56:34.286] <TB1> INFO: Pixel decoding errors: 0
[21:56:34.286] <TB1> INFO: pixel data incomplete: 0
[21:56:34.286] <TB1> INFO: pixel address: 0
[21:56:34.286] <TB1> INFO: pulse height fill bit: 0
[21:56:34.286] <TB1> INFO: buffer corruption: 0
[21:56:34.911] <TB1> INFO: ######################################################################
[21:56:34.911] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:56:34.911] <TB1> INFO: ######################################################################
[21:56:35.152] <TB1> INFO: Expecting 41600 events.
[21:56:38.732] <TB1> INFO: 41600 events read in total (2988ms).
[21:56:38.733] <TB1> INFO: Test took 3820ms.
[21:56:39.175] <TB1> INFO: Expecting 41600 events.
[21:56:42.790] <TB1> INFO: 41600 events read in total (3023ms).
[21:56:42.791] <TB1> INFO: Test took 3855ms.
[21:56:43.081] <TB1> INFO: Expecting 41600 events.
[21:56:46.711] <TB1> INFO: 41600 events read in total (3039ms).
[21:56:46.712] <TB1> INFO: Test took 3896ms.
[21:56:47.014] <TB1> INFO: Expecting 41600 events.
[21:56:50.612] <TB1> INFO: 41600 events read in total (3006ms).
[21:56:50.612] <TB1> INFO: Test took 3874ms.
[21:56:50.905] <TB1> INFO: Expecting 41600 events.
[21:56:54.490] <TB1> INFO: 41600 events read in total (2993ms).
[21:56:54.491] <TB1> INFO: Test took 3850ms.
[21:56:54.788] <TB1> INFO: Expecting 41600 events.
[21:56:58.282] <TB1> INFO: 41600 events read in total (2902ms).
[21:56:58.283] <TB1> INFO: Test took 3769ms.
[21:56:58.574] <TB1> INFO: Expecting 41600 events.
[21:57:02.180] <TB1> INFO: 41600 events read in total (3015ms).
[21:57:02.181] <TB1> INFO: Test took 3872ms.
[21:57:02.469] <TB1> INFO: Expecting 41600 events.
[21:57:05.984] <TB1> INFO: 41600 events read in total (2924ms).
[21:57:05.985] <TB1> INFO: Test took 3781ms.
[21:57:06.274] <TB1> INFO: Expecting 41600 events.
[21:57:09.896] <TB1> INFO: 41600 events read in total (3031ms).
[21:57:09.897] <TB1> INFO: Test took 3888ms.
[21:57:10.185] <TB1> INFO: Expecting 41600 events.
[21:57:13.706] <TB1> INFO: 41600 events read in total (2929ms).
[21:57:13.707] <TB1> INFO: Test took 3786ms.
[21:57:13.995] <TB1> INFO: Expecting 41600 events.
[21:57:17.572] <TB1> INFO: 41600 events read in total (2986ms).
[21:57:17.573] <TB1> INFO: Test took 3843ms.
[21:57:17.923] <TB1> INFO: Expecting 41600 events.
[21:57:21.429] <TB1> INFO: 41600 events read in total (2915ms).
[21:57:21.429] <TB1> INFO: Test took 3829ms.
[21:57:21.718] <TB1> INFO: Expecting 41600 events.
[21:57:25.201] <TB1> INFO: 41600 events read in total (2892ms).
[21:57:25.202] <TB1> INFO: Test took 3749ms.
[21:57:25.490] <TB1> INFO: Expecting 41600 events.
[21:57:28.961] <TB1> INFO: 41600 events read in total (2880ms).
[21:57:28.962] <TB1> INFO: Test took 3737ms.
[21:57:29.251] <TB1> INFO: Expecting 41600 events.
[21:57:32.833] <TB1> INFO: 41600 events read in total (2991ms).
[21:57:32.834] <TB1> INFO: Test took 3848ms.
[21:57:33.122] <TB1> INFO: Expecting 41600 events.
[21:57:36.655] <TB1> INFO: 41600 events read in total (2942ms).
[21:57:36.656] <TB1> INFO: Test took 3799ms.
[21:57:36.947] <TB1> INFO: Expecting 41600 events.
[21:57:40.441] <TB1> INFO: 41600 events read in total (2903ms).
[21:57:40.442] <TB1> INFO: Test took 3760ms.
[21:57:40.730] <TB1> INFO: Expecting 41600 events.
[21:57:44.178] <TB1> INFO: 41600 events read in total (2857ms).
[21:57:44.178] <TB1> INFO: Test took 3713ms.
[21:57:44.467] <TB1> INFO: Expecting 41600 events.
[21:57:47.916] <TB1> INFO: 41600 events read in total (2858ms).
[21:57:47.916] <TB1> INFO: Test took 3714ms.
[21:57:48.204] <TB1> INFO: Expecting 41600 events.
[21:57:51.724] <TB1> INFO: 41600 events read in total (2928ms).
[21:57:51.725] <TB1> INFO: Test took 3785ms.
[21:57:52.013] <TB1> INFO: Expecting 41600 events.
[21:57:55.487] <TB1> INFO: 41600 events read in total (2883ms).
[21:57:55.487] <TB1> INFO: Test took 3739ms.
[21:57:55.784] <TB1> INFO: Expecting 41600 events.
[21:57:59.306] <TB1> INFO: 41600 events read in total (2930ms).
[21:57:59.306] <TB1> INFO: Test took 3795ms.
[21:57:59.608] <TB1> INFO: Expecting 41600 events.
[21:58:03.088] <TB1> INFO: 41600 events read in total (2890ms).
[21:58:03.089] <TB1> INFO: Test took 3759ms.
[21:58:03.380] <TB1> INFO: Expecting 41600 events.
[21:58:06.929] <TB1> INFO: 41600 events read in total (2958ms).
[21:58:06.929] <TB1> INFO: Test took 3814ms.
[21:58:07.220] <TB1> INFO: Expecting 41600 events.
[21:58:10.804] <TB1> INFO: 41600 events read in total (2992ms).
[21:58:10.805] <TB1> INFO: Test took 3849ms.
[21:58:11.093] <TB1> INFO: Expecting 41600 events.
[21:58:14.638] <TB1> INFO: 41600 events read in total (2954ms).
[21:58:14.639] <TB1> INFO: Test took 3811ms.
[21:58:14.927] <TB1> INFO: Expecting 41600 events.
[21:58:18.406] <TB1> INFO: 41600 events read in total (2887ms).
[21:58:18.406] <TB1> INFO: Test took 3744ms.
[21:58:18.708] <TB1> INFO: Expecting 41600 events.
[21:58:22.159] <TB1> INFO: 41600 events read in total (2859ms).
[21:58:22.159] <TB1> INFO: Test took 3729ms.
[21:58:22.460] <TB1> INFO: Expecting 41600 events.
[21:58:25.926] <TB1> INFO: 41600 events read in total (2874ms).
[21:58:25.927] <TB1> INFO: Test took 3744ms.
[21:58:26.218] <TB1> INFO: Expecting 41600 events.
[21:58:29.784] <TB1> INFO: 41600 events read in total (2975ms).
[21:58:29.784] <TB1> INFO: Test took 3831ms.
[21:58:30.073] <TB1> INFO: Expecting 2560 events.
[21:58:30.955] <TB1> INFO: 2560 events read in total (290ms).
[21:58:30.955] <TB1> INFO: Test took 1159ms.
[21:58:31.264] <TB1> INFO: Expecting 2560 events.
[21:58:32.150] <TB1> INFO: 2560 events read in total (295ms).
[21:58:32.151] <TB1> INFO: Test took 1195ms.
[21:58:32.458] <TB1> INFO: Expecting 2560 events.
[21:58:33.341] <TB1> INFO: 2560 events read in total (291ms).
[21:58:33.341] <TB1> INFO: Test took 1190ms.
[21:58:33.649] <TB1> INFO: Expecting 2560 events.
[21:58:34.535] <TB1> INFO: 2560 events read in total (294ms).
[21:58:34.536] <TB1> INFO: Test took 1194ms.
[21:58:34.844] <TB1> INFO: Expecting 2560 events.
[21:58:35.725] <TB1> INFO: 2560 events read in total (290ms).
[21:58:35.725] <TB1> INFO: Test took 1189ms.
[21:58:36.033] <TB1> INFO: Expecting 2560 events.
[21:58:36.915] <TB1> INFO: 2560 events read in total (291ms).
[21:58:36.915] <TB1> INFO: Test took 1190ms.
[21:58:37.223] <TB1> INFO: Expecting 2560 events.
[21:58:38.101] <TB1> INFO: 2560 events read in total (287ms).
[21:58:38.101] <TB1> INFO: Test took 1185ms.
[21:58:38.410] <TB1> INFO: Expecting 2560 events.
[21:58:39.289] <TB1> INFO: 2560 events read in total (288ms).
[21:58:39.290] <TB1> INFO: Test took 1188ms.
[21:58:39.598] <TB1> INFO: Expecting 2560 events.
[21:58:40.482] <TB1> INFO: 2560 events read in total (293ms).
[21:58:40.482] <TB1> INFO: Test took 1192ms.
[21:58:40.790] <TB1> INFO: Expecting 2560 events.
[21:58:41.670] <TB1> INFO: 2560 events read in total (289ms).
[21:58:41.670] <TB1> INFO: Test took 1188ms.
[21:58:41.978] <TB1> INFO: Expecting 2560 events.
[21:58:42.857] <TB1> INFO: 2560 events read in total (287ms).
[21:58:42.857] <TB1> INFO: Test took 1186ms.
[21:58:43.165] <TB1> INFO: Expecting 2560 events.
[21:58:44.043] <TB1> INFO: 2560 events read in total (287ms).
[21:58:44.043] <TB1> INFO: Test took 1186ms.
[21:58:44.351] <TB1> INFO: Expecting 2560 events.
[21:58:45.235] <TB1> INFO: 2560 events read in total (292ms).
[21:58:45.235] <TB1> INFO: Test took 1191ms.
[21:58:45.543] <TB1> INFO: Expecting 2560 events.
[21:58:46.424] <TB1> INFO: 2560 events read in total (289ms).
[21:58:46.425] <TB1> INFO: Test took 1189ms.
[21:58:46.732] <TB1> INFO: Expecting 2560 events.
[21:58:47.619] <TB1> INFO: 2560 events read in total (295ms).
[21:58:47.619] <TB1> INFO: Test took 1194ms.
[21:58:47.927] <TB1> INFO: Expecting 2560 events.
[21:58:48.811] <TB1> INFO: 2560 events read in total (292ms).
[21:58:48.811] <TB1> INFO: Test took 1191ms.
[21:58:48.815] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:58:49.120] <TB1> INFO: Expecting 655360 events.
[21:59:03.535] <TB1> INFO: 655360 events read in total (13824ms).
[21:59:03.546] <TB1> INFO: Expecting 655360 events.
[21:59:17.774] <TB1> INFO: 655360 events read in total (13825ms).
[21:59:17.795] <TB1> INFO: Expecting 655360 events.
[21:59:32.040] <TB1> INFO: 655360 events read in total (13842ms).
[21:59:32.061] <TB1> INFO: Expecting 655360 events.
[21:59:46.298] <TB1> INFO: 655360 events read in total (13834ms).
[21:59:46.320] <TB1> INFO: Expecting 655360 events.
[22:00:00.491] <TB1> INFO: 655360 events read in total (13768ms).
[22:00:00.517] <TB1> INFO: Expecting 655360 events.
[22:00:14.625] <TB1> INFO: 655360 events read in total (13705ms).
[22:00:14.655] <TB1> INFO: Expecting 655360 events.
[22:00:28.692] <TB1> INFO: 655360 events read in total (13635ms).
[22:00:28.729] <TB1> INFO: Expecting 655360 events.
[22:00:42.884] <TB1> INFO: 655360 events read in total (13753ms).
[22:00:42.922] <TB1> INFO: Expecting 655360 events.
[22:00:57.076] <TB1> INFO: 655360 events read in total (13751ms).
[22:00:57.122] <TB1> INFO: Expecting 655360 events.
[22:01:11.183] <TB1> INFO: 655360 events read in total (13658ms).
[22:01:11.233] <TB1> INFO: Expecting 655360 events.
[22:01:25.357] <TB1> INFO: 655360 events read in total (13721ms).
[22:01:25.410] <TB1> INFO: Expecting 655360 events.
[22:01:39.469] <TB1> INFO: 655360 events read in total (13656ms).
[22:01:39.542] <TB1> INFO: Expecting 655360 events.
[22:01:53.677] <TB1> INFO: 655360 events read in total (13732ms).
[22:01:53.740] <TB1> INFO: Expecting 655360 events.
[22:02:07.738] <TB1> INFO: 655360 events read in total (13595ms).
[22:02:07.804] <TB1> INFO: Expecting 655360 events.
[22:02:21.852] <TB1> INFO: 655360 events read in total (13645ms).
[22:02:21.944] <TB1> INFO: Expecting 655360 events.
[22:02:35.924] <TB1> INFO: 655360 events read in total (13577ms).
[22:02:36.014] <TB1> INFO: Test took 227199ms.
[22:02:36.097] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:02:36.362] <TB1> INFO: Expecting 655360 events.
[22:02:50.556] <TB1> INFO: 655360 events read in total (13603ms).
[22:02:50.570] <TB1> INFO: Expecting 655360 events.
[22:03:04.202] <TB1> INFO: 655360 events read in total (13229ms).
[22:03:04.215] <TB1> INFO: Expecting 655360 events.
[22:03:18.322] <TB1> INFO: 655360 events read in total (13704ms).
[22:03:18.345] <TB1> INFO: Expecting 655360 events.
[22:03:32.202] <TB1> INFO: 655360 events read in total (13454ms).
[22:03:32.227] <TB1> INFO: Expecting 655360 events.
[22:03:46.203] <TB1> INFO: 655360 events read in total (13573ms).
[22:03:46.232] <TB1> INFO: Expecting 655360 events.
[22:04:00.182] <TB1> INFO: 655360 events read in total (13547ms).
[22:04:00.217] <TB1> INFO: Expecting 655360 events.
[22:04:14.341] <TB1> INFO: 655360 events read in total (13722ms).
[22:04:14.390] <TB1> INFO: Expecting 655360 events.
[22:04:28.406] <TB1> INFO: 655360 events read in total (13613ms).
[22:04:28.457] <TB1> INFO: Expecting 655360 events.
[22:04:42.486] <TB1> INFO: 655360 events read in total (13626ms).
[22:04:42.528] <TB1> INFO: Expecting 655360 events.
[22:04:56.534] <TB1> INFO: 655360 events read in total (13603ms).
[22:04:56.581] <TB1> INFO: Expecting 655360 events.
[22:05:10.625] <TB1> INFO: 655360 events read in total (13641ms).
[22:05:10.676] <TB1> INFO: Expecting 655360 events.
[22:05:24.629] <TB1> INFO: 655360 events read in total (13550ms).
[22:05:24.686] <TB1> INFO: Expecting 655360 events.
[22:05:38.729] <TB1> INFO: 655360 events read in total (13641ms).
[22:05:38.786] <TB1> INFO: Expecting 655360 events.
[22:05:52.857] <TB1> INFO: 655360 events read in total (13668ms).
[22:05:52.922] <TB1> INFO: Expecting 655360 events.
[22:06:06.954] <TB1> INFO: 655360 events read in total (13629ms).
[22:06:07.047] <TB1> INFO: Expecting 655360 events.
[22:06:20.940] <TB1> INFO: 655360 events read in total (13490ms).
[22:06:21.014] <TB1> INFO: Test took 224917ms.
[22:06:21.244] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.250] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[22:06:21.257] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[22:06:21.263] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.270] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.276] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.282] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.289] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.295] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.301] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.308] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[22:06:21.314] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.320] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.326] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.333] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.339] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[22:06:21.345] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[22:06:21.352] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[22:06:21.358] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[22:06:21.364] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[22:06:21.371] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[22:06:21.377] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[22:06:21.384] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[22:06:21.390] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[22:06:21.397] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[22:06:21.403] <TB1> INFO: safety margin for low PH: adding 11, margin is now 31
[22:06:21.409] <TB1> INFO: safety margin for low PH: adding 12, margin is now 32
[22:06:21.415] <TB1> INFO: safety margin for low PH: adding 13, margin is now 33
[22:06:21.420] <TB1> INFO: safety margin for low PH: adding 14, margin is now 34
[22:06:21.425] <TB1> INFO: safety margin for low PH: adding 15, margin is now 35
[22:06:21.429] <TB1> INFO: safety margin for low PH: adding 16, margin is now 36
[22:06:21.434] <TB1> INFO: safety margin for low PH: adding 17, margin is now 37
[22:06:21.438] <TB1> INFO: safety margin for low PH: adding 18, margin is now 38
[22:06:21.443] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.448] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.452] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[22:06:21.457] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[22:06:21.462] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[22:06:21.466] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.471] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[22:06:21.504] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C0.dat
[22:06:21.504] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C1.dat
[22:06:21.504] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C2.dat
[22:06:21.504] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C3.dat
[22:06:21.504] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C4.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C5.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C6.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C7.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C8.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C9.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C10.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C11.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C12.dat
[22:06:21.505] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C13.dat
[22:06:21.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C14.dat
[22:06:21.506] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//dacParameters35_C15.dat
[22:06:21.741] <TB1> INFO: Expecting 41600 events.
[22:06:24.841] <TB1> INFO: 41600 events read in total (2509ms).
[22:06:24.841] <TB1> INFO: Test took 3333ms.
[22:06:25.290] <TB1> INFO: Expecting 41600 events.
[22:06:28.332] <TB1> INFO: 41600 events read in total (2451ms).
[22:06:28.333] <TB1> INFO: Test took 3277ms.
[22:06:28.776] <TB1> INFO: Expecting 41600 events.
[22:06:31.850] <TB1> INFO: 41600 events read in total (2482ms).
[22:06:31.851] <TB1> INFO: Test took 3307ms.
[22:06:32.066] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:32.154] <TB1> INFO: Expecting 2560 events.
[22:06:33.039] <TB1> INFO: 2560 events read in total (293ms).
[22:06:33.039] <TB1> INFO: Test took 973ms.
[22:06:33.041] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:33.348] <TB1> INFO: Expecting 2560 events.
[22:06:34.231] <TB1> INFO: 2560 events read in total (292ms).
[22:06:34.232] <TB1> INFO: Test took 1191ms.
[22:06:34.233] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:34.540] <TB1> INFO: Expecting 2560 events.
[22:06:35.422] <TB1> INFO: 2560 events read in total (290ms).
[22:06:35.422] <TB1> INFO: Test took 1189ms.
[22:06:35.425] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:35.730] <TB1> INFO: Expecting 2560 events.
[22:06:36.613] <TB1> INFO: 2560 events read in total (291ms).
[22:06:36.613] <TB1> INFO: Test took 1188ms.
[22:06:36.615] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:36.922] <TB1> INFO: Expecting 2560 events.
[22:06:37.805] <TB1> INFO: 2560 events read in total (292ms).
[22:06:37.805] <TB1> INFO: Test took 1190ms.
[22:06:37.808] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:38.114] <TB1> INFO: Expecting 2560 events.
[22:06:38.996] <TB1> INFO: 2560 events read in total (291ms).
[22:06:38.996] <TB1> INFO: Test took 1188ms.
[22:06:38.998] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:39.304] <TB1> INFO: Expecting 2560 events.
[22:06:40.187] <TB1> INFO: 2560 events read in total (291ms).
[22:06:40.187] <TB1> INFO: Test took 1189ms.
[22:06:40.190] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:40.495] <TB1> INFO: Expecting 2560 events.
[22:06:41.378] <TB1> INFO: 2560 events read in total (291ms).
[22:06:41.378] <TB1> INFO: Test took 1188ms.
[22:06:41.380] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:41.687] <TB1> INFO: Expecting 2560 events.
[22:06:42.567] <TB1> INFO: 2560 events read in total (289ms).
[22:06:42.567] <TB1> INFO: Test took 1187ms.
[22:06:42.569] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:42.875] <TB1> INFO: Expecting 2560 events.
[22:06:43.754] <TB1> INFO: 2560 events read in total (287ms).
[22:06:43.754] <TB1> INFO: Test took 1185ms.
[22:06:43.756] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:44.062] <TB1> INFO: Expecting 2560 events.
[22:06:44.941] <TB1> INFO: 2560 events read in total (287ms).
[22:06:44.941] <TB1> INFO: Test took 1185ms.
[22:06:44.944] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:45.249] <TB1> INFO: Expecting 2560 events.
[22:06:46.129] <TB1> INFO: 2560 events read in total (288ms).
[22:06:46.130] <TB1> INFO: Test took 1186ms.
[22:06:46.132] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:46.438] <TB1> INFO: Expecting 2560 events.
[22:06:47.317] <TB1> INFO: 2560 events read in total (287ms).
[22:06:47.317] <TB1> INFO: Test took 1185ms.
[22:06:47.319] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:47.625] <TB1> INFO: Expecting 2560 events.
[22:06:48.504] <TB1> INFO: 2560 events read in total (287ms).
[22:06:48.504] <TB1> INFO: Test took 1185ms.
[22:06:48.506] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:48.813] <TB1> INFO: Expecting 2560 events.
[22:06:49.693] <TB1> INFO: 2560 events read in total (289ms).
[22:06:49.693] <TB1> INFO: Test took 1187ms.
[22:06:49.695] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:49.001] <TB1> INFO: Expecting 2560 events.
[22:06:50.880] <TB1> INFO: 2560 events read in total (287ms).
[22:06:50.880] <TB1> INFO: Test took 1185ms.
[22:06:50.882] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:51.189] <TB1> INFO: Expecting 2560 events.
[22:06:52.067] <TB1> INFO: 2560 events read in total (287ms).
[22:06:52.067] <TB1> INFO: Test took 1185ms.
[22:06:52.069] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:52.376] <TB1> INFO: Expecting 2560 events.
[22:06:53.253] <TB1> INFO: 2560 events read in total (286ms).
[22:06:53.253] <TB1> INFO: Test took 1184ms.
[22:06:53.255] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:53.562] <TB1> INFO: Expecting 2560 events.
[22:06:54.442] <TB1> INFO: 2560 events read in total (289ms).
[22:06:54.443] <TB1> INFO: Test took 1188ms.
[22:06:54.444] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:54.751] <TB1> INFO: Expecting 2560 events.
[22:06:55.629] <TB1> INFO: 2560 events read in total (286ms).
[22:06:55.629] <TB1> INFO: Test took 1185ms.
[22:06:55.631] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:55.937] <TB1> INFO: Expecting 2560 events.
[22:06:56.816] <TB1> INFO: 2560 events read in total (287ms).
[22:06:56.816] <TB1> INFO: Test took 1186ms.
[22:06:56.818] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:57.124] <TB1> INFO: Expecting 2560 events.
[22:06:58.004] <TB1> INFO: 2560 events read in total (288ms).
[22:06:58.005] <TB1> INFO: Test took 1187ms.
[22:06:58.007] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:58.312] <TB1> INFO: Expecting 2560 events.
[22:06:59.193] <TB1> INFO: 2560 events read in total (289ms).
[22:06:59.193] <TB1> INFO: Test took 1186ms.
[22:06:59.195] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:06:59.501] <TB1> INFO: Expecting 2560 events.
[22:07:00.379] <TB1> INFO: 2560 events read in total (286ms).
[22:07:00.380] <TB1> INFO: Test took 1185ms.
[22:07:00.381] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:00.688] <TB1> INFO: Expecting 2560 events.
[22:07:01.573] <TB1> INFO: 2560 events read in total (294ms).
[22:07:01.573] <TB1> INFO: Test took 1192ms.
[22:07:01.575] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:01.882] <TB1> INFO: Expecting 2560 events.
[22:07:02.764] <TB1> INFO: 2560 events read in total (291ms).
[22:07:02.764] <TB1> INFO: Test took 1189ms.
[22:07:02.766] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:03.073] <TB1> INFO: Expecting 2560 events.
[22:07:03.955] <TB1> INFO: 2560 events read in total (291ms).
[22:07:03.955] <TB1> INFO: Test took 1189ms.
[22:07:03.957] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:04.264] <TB1> INFO: Expecting 2560 events.
[22:07:05.148] <TB1> INFO: 2560 events read in total (293ms).
[22:07:05.148] <TB1> INFO: Test took 1191ms.
[22:07:05.151] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:05.457] <TB1> INFO: Expecting 2560 events.
[22:07:06.341] <TB1> INFO: 2560 events read in total (292ms).
[22:07:06.341] <TB1> INFO: Test took 1191ms.
[22:07:06.343] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:06.649] <TB1> INFO: Expecting 2560 events.
[22:07:07.530] <TB1> INFO: 2560 events read in total (289ms).
[22:07:07.531] <TB1> INFO: Test took 1188ms.
[22:07:07.532] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:07.839] <TB1> INFO: Expecting 2560 events.
[22:07:08.722] <TB1> INFO: 2560 events read in total (291ms).
[22:07:08.722] <TB1> INFO: Test took 1190ms.
[22:07:08.724] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[22:07:09.031] <TB1> INFO: Expecting 2560 events.
[22:07:09.913] <TB1> INFO: 2560 events read in total (291ms).
[22:07:09.913] <TB1> INFO: Test took 1189ms.
[22:07:10.375] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 635 seconds
[22:07:10.375] <TB1> INFO: PH scale (per ROC): 54 52 55 58 61 60 50 45 56 48 53 46 62 43 46 66
[22:07:10.375] <TB1> INFO: PH offset (per ROC): 123 118 132 134 130 116 122 114 129 100 97 112 131 106 111 120
[22:07:10.380] <TB1> INFO: Decoding statistics:
[22:07:10.380] <TB1> INFO: General information:
[22:07:10.380] <TB1> INFO: 16bit words read: 127884
[22:07:10.380] <TB1> INFO: valid events total: 20480
[22:07:10.380] <TB1> INFO: empty events: 17978
[22:07:10.380] <TB1> INFO: valid events with pixels: 2502
[22:07:10.380] <TB1> INFO: valid pixel hits: 2502
[22:07:10.380] <TB1> INFO: Event errors: 0
[22:07:10.380] <TB1> INFO: start marker: 0
[22:07:10.380] <TB1> INFO: stop marker: 0
[22:07:10.380] <TB1> INFO: overflow: 0
[22:07:10.380] <TB1> INFO: invalid 5bit words: 0
[22:07:10.380] <TB1> INFO: invalid XOR eye diagram: 0
[22:07:10.380] <TB1> INFO: frame (failed synchr.): 0
[22:07:10.380] <TB1> INFO: idle data (no TBM trl): 0
[22:07:10.380] <TB1> INFO: no data (only TBM hdr): 0
[22:07:10.380] <TB1> INFO: TBM errors: 0
[22:07:10.380] <TB1> INFO: flawed TBM headers: 0
[22:07:10.380] <TB1> INFO: flawed TBM trailers: 0
[22:07:10.380] <TB1> INFO: event ID mismatches: 0
[22:07:10.380] <TB1> INFO: ROC errors: 0
[22:07:10.380] <TB1> INFO: missing ROC header(s): 0
[22:07:10.380] <TB1> INFO: misplaced readback start: 0
[22:07:10.380] <TB1> INFO: Pixel decoding errors: 0
[22:07:10.380] <TB1> INFO: pixel data incomplete: 0
[22:07:10.381] <TB1> INFO: pixel address: 0
[22:07:10.381] <TB1> INFO: pulse height fill bit: 0
[22:07:10.381] <TB1> INFO: buffer corruption: 0
[22:07:10.643] <TB1> INFO: ######################################################################
[22:07:10.643] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[22:07:10.643] <TB1> INFO: ######################################################################
[22:07:10.654] <TB1> INFO: scanning low vcal = 10
[22:07:10.889] <TB1> INFO: Expecting 41600 events.
[22:07:14.444] <TB1> INFO: 41600 events read in total (2964ms).
[22:07:14.444] <TB1> INFO: Test took 3789ms.
[22:07:14.445] <TB1> INFO: scanning low vcal = 20
[22:07:14.745] <TB1> INFO: Expecting 41600 events.
[22:07:18.311] <TB1> INFO: 41600 events read in total (2974ms).
[22:07:18.312] <TB1> INFO: Test took 3866ms.
[22:07:18.313] <TB1> INFO: scanning low vcal = 30
[22:07:18.612] <TB1> INFO: Expecting 41600 events.
[22:07:22.280] <TB1> INFO: 41600 events read in total (3076ms).
[22:07:22.280] <TB1> INFO: Test took 3966ms.
[22:07:22.282] <TB1> INFO: scanning low vcal = 40
[22:07:22.559] <TB1> INFO: Expecting 41600 events.
[22:07:26.483] <TB1> INFO: 41600 events read in total (3332ms).
[22:07:26.485] <TB1> INFO: Test took 4202ms.
[22:07:26.487] <TB1> INFO: scanning low vcal = 50
[22:07:26.764] <TB1> INFO: Expecting 41600 events.
[22:07:30.703] <TB1> INFO: 41600 events read in total (3347ms).
[22:07:30.704] <TB1> INFO: Test took 4217ms.
[22:07:30.706] <TB1> INFO: scanning low vcal = 60
[22:07:30.983] <TB1> INFO: Expecting 41600 events.
[22:07:34.984] <TB1> INFO: 41600 events read in total (3410ms).
[22:07:34.984] <TB1> INFO: Test took 4278ms.
[22:07:34.987] <TB1> INFO: scanning low vcal = 70
[22:07:35.264] <TB1> INFO: Expecting 41600 events.
[22:07:39.215] <TB1> INFO: 41600 events read in total (3360ms).
[22:07:39.216] <TB1> INFO: Test took 4229ms.
[22:07:39.219] <TB1> INFO: scanning low vcal = 80
[22:07:39.496] <TB1> INFO: Expecting 41600 events.
[22:07:43.413] <TB1> INFO: 41600 events read in total (3326ms).
[22:07:43.414] <TB1> INFO: Test took 4195ms.
[22:07:43.416] <TB1> INFO: scanning low vcal = 90
[22:07:43.693] <TB1> INFO: Expecting 41600 events.
[22:07:47.639] <TB1> INFO: 41600 events read in total (3355ms).
[22:07:47.639] <TB1> INFO: Test took 4222ms.
[22:07:47.642] <TB1> INFO: scanning low vcal = 100
[22:07:47.918] <TB1> INFO: Expecting 41600 events.
[22:07:51.892] <TB1> INFO: 41600 events read in total (3382ms).
[22:07:51.892] <TB1> INFO: Test took 4250ms.
[22:07:51.895] <TB1> INFO: scanning low vcal = 110
[22:07:52.172] <TB1> INFO: Expecting 41600 events.
[22:07:56.086] <TB1> INFO: 41600 events read in total (3323ms).
[22:07:56.086] <TB1> INFO: Test took 4191ms.
[22:07:56.089] <TB1> INFO: scanning low vcal = 120
[22:07:56.366] <TB1> INFO: Expecting 41600 events.
[22:08:00.312] <TB1> INFO: 41600 events read in total (3355ms).
[22:08:00.313] <TB1> INFO: Test took 4224ms.
[22:08:00.316] <TB1> INFO: scanning low vcal = 130
[22:08:00.593] <TB1> INFO: Expecting 41600 events.
[22:08:04.533] <TB1> INFO: 41600 events read in total (3349ms).
[22:08:04.534] <TB1> INFO: Test took 4218ms.
[22:08:04.536] <TB1> INFO: scanning low vcal = 140
[22:08:04.813] <TB1> INFO: Expecting 41600 events.
[22:08:08.743] <TB1> INFO: 41600 events read in total (3339ms).
[22:08:08.744] <TB1> INFO: Test took 4208ms.
[22:08:08.746] <TB1> INFO: scanning low vcal = 150
[22:08:09.023] <TB1> INFO: Expecting 41600 events.
[22:08:12.958] <TB1> INFO: 41600 events read in total (3343ms).
[22:08:12.959] <TB1> INFO: Test took 4213ms.
[22:08:12.962] <TB1> INFO: scanning low vcal = 160
[22:08:13.238] <TB1> INFO: Expecting 41600 events.
[22:08:17.157] <TB1> INFO: 41600 events read in total (3327ms).
[22:08:17.158] <TB1> INFO: Test took 4196ms.
[22:08:17.161] <TB1> INFO: scanning low vcal = 170
[22:08:17.437] <TB1> INFO: Expecting 41600 events.
[22:08:21.356] <TB1> INFO: 41600 events read in total (3327ms).
[22:08:21.356] <TB1> INFO: Test took 4195ms.
[22:08:21.359] <TB1> INFO: scanning low vcal = 180
[22:08:21.636] <TB1> INFO: Expecting 41600 events.
[22:08:25.593] <TB1> INFO: 41600 events read in total (3366ms).
[22:08:25.594] <TB1> INFO: Test took 4235ms.
[22:08:25.597] <TB1> INFO: scanning low vcal = 190
[22:08:25.873] <TB1> INFO: Expecting 41600 events.
[22:08:29.792] <TB1> INFO: 41600 events read in total (3327ms).
[22:08:29.793] <TB1> INFO: Test took 4196ms.
[22:08:29.795] <TB1> INFO: scanning low vcal = 200
[22:08:30.072] <TB1> INFO: Expecting 41600 events.
[22:08:33.002] <TB1> INFO: 41600 events read in total (3338ms).
[22:08:34.003] <TB1> INFO: Test took 4207ms.
[22:08:34.006] <TB1> INFO: scanning low vcal = 210
[22:08:34.282] <TB1> INFO: Expecting 41600 events.
[22:08:38.252] <TB1> INFO: 41600 events read in total (3378ms).
[22:08:38.252] <TB1> INFO: Test took 4246ms.
[22:08:38.255] <TB1> INFO: scanning low vcal = 220
[22:08:38.532] <TB1> INFO: Expecting 41600 events.
[22:08:42.481] <TB1> INFO: 41600 events read in total (3358ms).
[22:08:42.482] <TB1> INFO: Test took 4226ms.
[22:08:42.485] <TB1> INFO: scanning low vcal = 230
[22:08:42.761] <TB1> INFO: Expecting 41600 events.
[22:08:46.676] <TB1> INFO: 41600 events read in total (3323ms).
[22:08:46.676] <TB1> INFO: Test took 4191ms.
[22:08:46.679] <TB1> INFO: scanning low vcal = 240
[22:08:46.955] <TB1> INFO: Expecting 41600 events.
[22:08:50.876] <TB1> INFO: 41600 events read in total (3329ms).
[22:08:50.877] <TB1> INFO: Test took 4198ms.
[22:08:50.879] <TB1> INFO: scanning low vcal = 250
[22:08:51.156] <TB1> INFO: Expecting 41600 events.
[22:08:55.058] <TB1> INFO: 41600 events read in total (3310ms).
[22:08:55.058] <TB1> INFO: Test took 4179ms.
[22:08:55.062] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[22:08:55.338] <TB1> INFO: Expecting 41600 events.
[22:08:59.278] <TB1> INFO: 41600 events read in total (3348ms).
[22:08:59.279] <TB1> INFO: Test took 4217ms.
[22:08:59.281] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[22:08:59.558] <TB1> INFO: Expecting 41600 events.
[22:09:03.512] <TB1> INFO: 41600 events read in total (3362ms).
[22:09:03.513] <TB1> INFO: Test took 4231ms.
[22:09:03.516] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[22:09:03.792] <TB1> INFO: Expecting 41600 events.
[22:09:07.754] <TB1> INFO: 41600 events read in total (3370ms).
[22:09:07.755] <TB1> INFO: Test took 4239ms.
[22:09:07.757] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[22:09:08.034] <TB1> INFO: Expecting 41600 events.
[22:09:11.956] <TB1> INFO: 41600 events read in total (3331ms).
[22:09:11.957] <TB1> INFO: Test took 4200ms.
[22:09:11.960] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[22:09:12.236] <TB1> INFO: Expecting 41600 events.
[22:09:16.163] <TB1> INFO: 41600 events read in total (3335ms).
[22:09:16.163] <TB1> INFO: Test took 4203ms.
[22:09:16.660] <TB1> INFO: PixTestGainPedestal::measure() done
[22:09:50.069] <TB1> INFO: PixTestGainPedestal::fit() done
[22:09:50.069] <TB1> INFO: non-linearity mean: 0.985 0.967 0.981 0.983 0.982 0.982 0.940 0.945 0.983 0.954 0.929 0.931 0.986 0.931 0.933 0.983
[22:09:50.069] <TB1> INFO: non-linearity RMS: 0.002 0.038 0.004 0.005 0.003 0.003 0.044 0.063 0.003 0.076 0.102 0.109 0.003 0.081 0.059 0.004
[22:09:50.070] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[22:09:50.084] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[22:09:50.098] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[22:09:50.113] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[22:09:50.126] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[22:09:50.141] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[22:09:50.155] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[22:09:50.168] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[22:09:50.183] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[22:09:50.197] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[22:09:50.211] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[22:09:50.225] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[22:09:50.239] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[22:09:50.253] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[22:09:50.267] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[22:09:50.287] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1138_FullQualification_2016-11-07_19h53m_1478544796//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[22:09:50.307] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[22:09:50.307] <TB1> INFO: Decoding statistics:
[22:09:50.307] <TB1> INFO: General information:
[22:09:50.307] <TB1> INFO: 16bit words read: 3327848
[22:09:50.307] <TB1> INFO: valid events total: 332800
[22:09:50.307] <TB1> INFO: empty events: 0
[22:09:50.307] <TB1> INFO: valid events with pixels: 332800
[22:09:50.307] <TB1> INFO: valid pixel hits: 665524
[22:09:50.307] <TB1> INFO: Event errors: 0
[22:09:50.307] <TB1> INFO: start marker: 0
[22:09:50.307] <TB1> INFO: stop marker: 0
[22:09:50.307] <TB1> INFO: overflow: 0
[22:09:50.307] <TB1> INFO: invalid 5bit words: 0
[22:09:50.307] <TB1> INFO: invalid XOR eye diagram: 0
[22:09:50.308] <TB1> INFO: frame (failed synchr.): 0
[22:09:50.308] <TB1> INFO: idle data (no TBM trl): 0
[22:09:50.308] <TB1> INFO: no data (only TBM hdr): 0
[22:09:50.308] <TB1> INFO: TBM errors: 0
[22:09:50.308] <TB1> INFO: flawed TBM headers: 0
[22:09:50.308] <TB1> INFO: flawed TBM trailers: 0
[22:09:50.308] <TB1> INFO: event ID mismatches: 0
[22:09:50.308] <TB1> INFO: ROC errors: 0
[22:09:50.308] <TB1> INFO: missing ROC header(s): 0
[22:09:50.308] <TB1> INFO: misplaced readback start: 0
[22:09:50.308] <TB1> INFO: Pixel decoding errors: 0
[22:09:50.308] <TB1> INFO: pixel data incomplete: 0
[22:09:50.308] <TB1> INFO: pixel address: 0
[22:09:50.308] <TB1> INFO: pulse height fill bit: 0
[22:09:50.308] <TB1> INFO: buffer corruption: 0
[22:09:50.327] <TB1> INFO: Decoding statistics:
[22:09:50.327] <TB1> INFO: General information:
[22:09:50.327] <TB1> INFO: 16bit words read: 3457268
[22:09:50.327] <TB1> INFO: valid events total: 353536
[22:09:50.327] <TB1> INFO: empty events: 18234
[22:09:50.327] <TB1> INFO: valid events with pixels: 335302
[22:09:50.327] <TB1> INFO: valid pixel hits: 668026
[22:09:50.327] <TB1> INFO: Event errors: 0
[22:09:50.327] <TB1> INFO: start marker: 0
[22:09:50.327] <TB1> INFO: stop marker: 0
[22:09:50.327] <TB1> INFO: overflow: 0
[22:09:50.327] <TB1> INFO: invalid 5bit words: 0
[22:09:50.327] <TB1> INFO: invalid XOR eye diagram: 0
[22:09:50.327] <TB1> INFO: frame (failed synchr.): 0
[22:09:50.327] <TB1> INFO: idle data (no TBM trl): 0
[22:09:50.327] <TB1> INFO: no data (only TBM hdr): 0
[22:09:50.327] <TB1> INFO: TBM errors: 0
[22:09:50.327] <TB1> INFO: flawed TBM headers: 0
[22:09:50.327] <TB1> INFO: flawed TBM trailers: 0
[22:09:50.327] <TB1> INFO: event ID mismatches: 0
[22:09:50.327] <TB1> INFO: ROC errors: 0
[22:09:50.327] <TB1> INFO: missing ROC header(s): 0
[22:09:50.327] <TB1> INFO: misplaced readback start: 0
[22:09:50.327] <TB1> INFO: Pixel decoding errors: 0
[22:09:50.327] <TB1> INFO: pixel data incomplete: 0
[22:09:50.327] <TB1> INFO: pixel address: 0
[22:09:50.327] <TB1> INFO: pulse height fill bit: 0
[22:09:50.327] <TB1> INFO: buffer corruption: 0
[22:09:50.327] <TB1> INFO: enter test to run
[22:09:50.327] <TB1> INFO: test: exit no parameter change
[22:09:50.381] <TB1> QUIET: Connection to board 153 closed.
[22:09:50.382] <TB1> INFO: pXar: this is the end, my friend