[13:59:01.900] <TB3> INFO: *** Welcome to pxar ***
[13:59:01.900] <TB3> INFO: *** Today: 2016/11/07
[13:59:01.907] <TB3> INFO: *** Version: c8ba-dirty
[13:59:01.907] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C15.dat
[13:59:01.907] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[13:59:01.907] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//defaultMaskFile.dat
[13:59:01.907] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters_C15.dat
[13:59:01.964] <TB3> INFO: clk: 4
[13:59:01.964] <TB3> INFO: ctr: 4
[13:59:01.964] <TB3> INFO: sda: 19
[13:59:01.964] <TB3> INFO: tin: 9
[13:59:01.964] <TB3> INFO: level: 15
[13:59:01.964] <TB3> INFO: triggerdelay: 0
[13:59:01.964] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[13:59:01.964] <TB3> INFO: Log level: INFO
[13:59:01.972] <TB3> INFO: Found DTB DTB_WZ4I6J
[13:59:01.981] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[13:59:01.983] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[13:59:01.985] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[13:59:03.472] <TB3> INFO: DUT info:
[13:59:03.472] <TB3> INFO: The DUT currently contains the following objects:
[13:59:03.472] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[13:59:03.472] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:59:03.472] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:59:03.472] <TB3> INFO: TBM Core alpha (2): 7 registers set
[13:59:03.472] <TB3> INFO: TBM Core beta (3): 7 registers set
[13:59:03.472] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[13:59:03.472] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.472] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:59:03.873] <TB3> INFO: enter 'restricted' command line mode
[13:59:03.873] <TB3> INFO: enter test to run
[13:59:03.873] <TB3> INFO: test: pretest no parameter change
[13:59:03.873] <TB3> INFO: running: pretest
[13:59:04.460] <TB3> INFO: ######################################################################
[13:59:04.460] <TB3> INFO: PixTestPretest::doTest()
[13:59:04.460] <TB3> INFO: ######################################################################
[13:59:04.461] <TB3> INFO: ----------------------------------------------------------------------
[13:59:04.461] <TB3> INFO: PixTestPretest::programROC()
[13:59:04.461] <TB3> INFO: ----------------------------------------------------------------------
[13:59:22.474] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:59:22.474] <TB3> INFO: IA differences per ROC: 20.9 19.3 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 17.7 19.3 20.1 20.1 20.1 20.9
[13:59:22.511] <TB3> INFO: ----------------------------------------------------------------------
[13:59:22.511] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:59:22.511] <TB3> INFO: ----------------------------------------------------------------------
[13:59:27.383] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[13:59:27.384] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 20.1 19.3 19.3 19.3 19.3 20.1 19.3 19.3 20.1 19.3 20.1 19.3
[13:59:27.412] <TB3> INFO: ----------------------------------------------------------------------
[13:59:27.412] <TB3> INFO: PixTestPretest::findTiming()
[13:59:27.412] <TB3> INFO: ----------------------------------------------------------------------
[13:59:27.412] <TB3> INFO: PixTestCmd::init()

[13:59:58.536] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[13:59:58.536] <TB3> INFO: (success/tries = 100/100), width = 3
[14:00:00.038] <TB3> INFO: ----------------------------------------------------------------------
[14:00:00.038] <TB3> INFO: PixTestPretest::findWorkingPixel()
[14:00:00.038] <TB3> INFO: ----------------------------------------------------------------------
[14:00:00.130] <TB3> INFO: Expecting 231680 events.
[14:00:09.759] <TB3> INFO: 231680 events read in total (9038ms).
[14:00:09.766] <TB3> INFO: Test took 9725ms.
[14:00:10.013] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:00:10.042] <TB3> INFO: ----------------------------------------------------------------------
[14:00:10.042] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[14:00:10.042] <TB3> INFO: ----------------------------------------------------------------------
[14:00:10.133] <TB3> INFO: Expecting 231680 events.
[14:00:19.847] <TB3> INFO: 231680 events read in total (9122ms).
[14:00:19.854] <TB3> INFO: Test took 9809ms.
[14:00:20.111] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[14:00:20.111] <TB3> INFO: CalDel: 85 95 109 104 92 91 98 104 110 126 116 114 114 107 111 122
[14:00:20.111] <TB3> INFO: VthrComp: 55 51 53 51 51 51 52 57 53 52 55 53 51 51 54 51
[14:00:20.113] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C0.dat
[14:00:20.113] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C1.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C2.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C3.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C4.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C5.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C6.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C7.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C8.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C9.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C10.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C11.dat
[14:00:20.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C12.dat
[14:00:20.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C13.dat
[14:00:20.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C14.dat
[14:00:20.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters_C15.dat
[14:00:20.115] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[14:00:20.115] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[14:00:20.115] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[14:00:20.115] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[14:00:20.115] <TB3> INFO: PixTestPretest::doTest() done, duration: 76 seconds
[14:00:20.210] <TB3> INFO: enter test to run
[14:00:20.210] <TB3> INFO: test: fulltest no parameter change
[14:00:20.210] <TB3> INFO: running: fulltest
[14:00:20.210] <TB3> INFO: ######################################################################
[14:00:20.210] <TB3> INFO: PixTestFullTest::doTest()
[14:00:20.210] <TB3> INFO: ######################################################################
[14:00:20.211] <TB3> INFO: ######################################################################
[14:00:20.211] <TB3> INFO: PixTestAlive::doTest()
[14:00:20.211] <TB3> INFO: ######################################################################
[14:00:20.212] <TB3> INFO: ----------------------------------------------------------------------
[14:00:20.212] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:00:20.212] <TB3> INFO: ----------------------------------------------------------------------
[14:00:20.445] <TB3> INFO: Expecting 41600 events.
[14:00:23.958] <TB3> INFO: 41600 events read in total (2921ms).
[14:00:23.958] <TB3> INFO: Test took 3744ms.
[14:00:24.184] <TB3> INFO: PixTestAlive::aliveTest() done
[14:00:24.184] <TB3> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0
[14:00:24.185] <TB3> INFO: ----------------------------------------------------------------------
[14:00:24.186] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:00:24.186] <TB3> INFO: ----------------------------------------------------------------------
[14:00:24.436] <TB3> INFO: Expecting 41600 events.
[14:00:27.383] <TB3> INFO: 41600 events read in total (2356ms).
[14:00:27.383] <TB3> INFO: Test took 3196ms.
[14:00:27.383] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:00:27.625] <TB3> INFO: PixTestAlive::maskTest() done
[14:00:27.625] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:00:27.626] <TB3> INFO: ----------------------------------------------------------------------
[14:00:27.626] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:00:27.626] <TB3> INFO: ----------------------------------------------------------------------
[14:00:27.863] <TB3> INFO: Expecting 41600 events.
[14:00:31.293] <TB3> INFO: 41600 events read in total (2840ms).
[14:00:31.294] <TB3> INFO: Test took 3667ms.
[14:00:31.525] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[14:00:31.525] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:00:31.525] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:00:31.525] <TB3> INFO: Decoding statistics:
[14:00:31.525] <TB3> INFO: General information:
[14:00:31.526] <TB3> INFO: 16bit words read: 0
[14:00:31.526] <TB3> INFO: valid events total: 0
[14:00:31.526] <TB3> INFO: empty events: 0
[14:00:31.526] <TB3> INFO: valid events with pixels: 0
[14:00:31.526] <TB3> INFO: valid pixel hits: 0
[14:00:31.526] <TB3> INFO: Event errors: 0
[14:00:31.526] <TB3> INFO: start marker: 0
[14:00:31.526] <TB3> INFO: stop marker: 0
[14:00:31.526] <TB3> INFO: overflow: 0
[14:00:31.526] <TB3> INFO: invalid 5bit words: 0
[14:00:31.526] <TB3> INFO: invalid XOR eye diagram: 0
[14:00:31.526] <TB3> INFO: frame (failed synchr.): 0
[14:00:31.526] <TB3> INFO: idle data (no TBM trl): 0
[14:00:31.526] <TB3> INFO: no data (only TBM hdr): 0
[14:00:31.526] <TB3> INFO: TBM errors: 0
[14:00:31.526] <TB3> INFO: flawed TBM headers: 0
[14:00:31.526] <TB3> INFO: flawed TBM trailers: 0
[14:00:31.526] <TB3> INFO: event ID mismatches: 0
[14:00:31.526] <TB3> INFO: ROC errors: 0
[14:00:31.526] <TB3> INFO: missing ROC header(s): 0
[14:00:31.526] <TB3> INFO: misplaced readback start: 0
[14:00:31.526] <TB3> INFO: Pixel decoding errors: 0
[14:00:31.526] <TB3> INFO: pixel data incomplete: 0
[14:00:31.526] <TB3> INFO: pixel address: 0
[14:00:31.526] <TB3> INFO: pulse height fill bit: 0
[14:00:31.526] <TB3> INFO: buffer corruption: 0
[14:00:31.533] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:00:31.533] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[14:00:31.533] <TB3> INFO: ######################################################################
[14:00:31.533] <TB3> INFO: PixTestReadback::doTest()
[14:00:31.533] <TB3> INFO: ######################################################################
[14:00:31.533] <TB3> INFO: ----------------------------------------------------------------------
[14:00:31.533] <TB3> INFO: PixTestReadback::CalibrateVd()
[14:00:31.533] <TB3> INFO: ----------------------------------------------------------------------
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:00:41.510] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:00:41.511] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:00:41.540] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:00:41.540] <TB3> INFO: ----------------------------------------------------------------------
[14:00:41.540] <TB3> INFO: PixTestReadback::CalibrateVa()
[14:00:41.540] <TB3> INFO: ----------------------------------------------------------------------
[14:00:51.429] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:00:51.429] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:00:51.429] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:00:51.430] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:00:51.464] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:00:51.464] <TB3> INFO: ----------------------------------------------------------------------
[14:00:51.464] <TB3> INFO: PixTestReadback::readbackVbg()
[14:00:51.464] <TB3> INFO: ----------------------------------------------------------------------
[14:00:59.103] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:00:59.104] <TB3> INFO: ----------------------------------------------------------------------
[14:00:59.104] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[14:00:59.104] <TB3> INFO: ----------------------------------------------------------------------
[14:00:59.104] <TB3> INFO: Vbg will be calibrated using Vd calibration
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 164.2calibrated Vbg = 1.18196 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.5calibrated Vbg = 1.17765 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159.8calibrated Vbg = 1.1786 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.4calibrated Vbg = 1.17567 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.9calibrated Vbg = 1.17136 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.9calibrated Vbg = 1.17581 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162.5calibrated Vbg = 1.18019 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.4calibrated Vbg = 1.18151 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.6calibrated Vbg = 1.18366 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.8calibrated Vbg = 1.17204 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.2calibrated Vbg = 1.16903 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 163.2calibrated Vbg = 1.16166 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 161calibrated Vbg = 1.17413 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.2calibrated Vbg = 1.17572 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.1calibrated Vbg = 1.18112 :::*/*/*/*/
[14:00:59.104] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.7calibrated Vbg = 1.18218 :::*/*/*/*/
[14:00:59.106] <TB3> INFO: ----------------------------------------------------------------------
[14:00:59.106] <TB3> INFO: PixTestReadback::CalibrateIa()
[14:00:59.106] <TB3> INFO: ----------------------------------------------------------------------
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:03:39.391] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:03:39.392] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:03:39.418] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[14:03:39.419] <TB3> INFO: PixTestReadback::doTest() done
[14:03:39.419] <TB3> INFO: Decoding statistics:
[14:03:39.419] <TB3> INFO: General information:
[14:03:39.419] <TB3> INFO: 16bit words read: 1536
[14:03:39.419] <TB3> INFO: valid events total: 256
[14:03:39.419] <TB3> INFO: empty events: 256
[14:03:39.419] <TB3> INFO: valid events with pixels: 0
[14:03:39.419] <TB3> INFO: valid pixel hits: 0
[14:03:39.419] <TB3> INFO: Event errors: 0
[14:03:39.419] <TB3> INFO: start marker: 0
[14:03:39.419] <TB3> INFO: stop marker: 0
[14:03:39.419] <TB3> INFO: overflow: 0
[14:03:39.419] <TB3> INFO: invalid 5bit words: 0
[14:03:39.419] <TB3> INFO: invalid XOR eye diagram: 0
[14:03:39.419] <TB3> INFO: frame (failed synchr.): 0
[14:03:39.419] <TB3> INFO: idle data (no TBM trl): 0
[14:03:39.419] <TB3> INFO: no data (only TBM hdr): 0
[14:03:39.419] <TB3> INFO: TBM errors: 0
[14:03:39.419] <TB3> INFO: flawed TBM headers: 0
[14:03:39.419] <TB3> INFO: flawed TBM trailers: 0
[14:03:39.419] <TB3> INFO: event ID mismatches: 0
[14:03:39.419] <TB3> INFO: ROC errors: 0
[14:03:39.419] <TB3> INFO: missing ROC header(s): 0
[14:03:39.419] <TB3> INFO: misplaced readback start: 0
[14:03:39.419] <TB3> INFO: Pixel decoding errors: 0
[14:03:39.419] <TB3> INFO: pixel data incomplete: 0
[14:03:39.419] <TB3> INFO: pixel address: 0
[14:03:39.420] <TB3> INFO: pulse height fill bit: 0
[14:03:39.420] <TB3> INFO: buffer corruption: 0
[14:03:39.453] <TB3> INFO: ######################################################################
[14:03:39.453] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:03:39.453] <TB3> INFO: ######################################################################
[14:03:39.455] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:03:39.467] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:03:39.467] <TB3> INFO: run 1 of 1
[14:03:39.703] <TB3> INFO: Expecting 3120000 events.
[14:04:09.938] <TB3> INFO: 663415 events read in total (29639ms).











[14:04:39.210] <TB3> INFO: 1322935 events read in total (58911ms).











[14:05:08.873] <TB3> INFO: 1981285 events read in total (88575ms).
[14:05:38.703] <TB3> INFO: 2641335 events read in total (118404ms).











[14:06:00.131] <TB3> INFO: 3120000 events read in total (139832ms).
[14:06:00.199] <TB3> INFO: Test took 140733ms.
[14:06:26.142] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[14:06:26.142] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0
[14:06:26.142] <TB3> INFO: separation cut (per ROC): 108 100 99 93 106 105 106 106 103 96 98 102 108 105 112 87
[14:06:26.142] <TB3> INFO: Decoding statistics:
[14:06:26.142] <TB3> INFO: General information:
[14:06:26.142] <TB3> INFO: 16bit words read: 0
[14:06:26.142] <TB3> INFO: valid events total: 0
[14:06:26.142] <TB3> INFO: empty events: 0
[14:06:26.142] <TB3> INFO: valid events with pixels: 0
[14:06:26.142] <TB3> INFO: valid pixel hits: 0
[14:06:26.142] <TB3> INFO: Event errors: 0
[14:06:26.142] <TB3> INFO: start marker: 0
[14:06:26.142] <TB3> INFO: stop marker: 0
[14:06:26.142] <TB3> INFO: overflow: 0
[14:06:26.142] <TB3> INFO: invalid 5bit words: 0
[14:06:26.142] <TB3> INFO: invalid XOR eye diagram: 0
[14:06:26.142] <TB3> INFO: frame (failed synchr.): 0
[14:06:26.142] <TB3> INFO: idle data (no TBM trl): 0
[14:06:26.142] <TB3> INFO: no data (only TBM hdr): 0
[14:06:26.142] <TB3> INFO: TBM errors: 0
[14:06:26.142] <TB3> INFO: flawed TBM headers: 0
[14:06:26.142] <TB3> INFO: flawed TBM trailers: 0
[14:06:26.142] <TB3> INFO: event ID mismatches: 0
[14:06:26.142] <TB3> INFO: ROC errors: 0
[14:06:26.142] <TB3> INFO: missing ROC header(s): 0
[14:06:26.142] <TB3> INFO: misplaced readback start: 0
[14:06:26.142] <TB3> INFO: Pixel decoding errors: 0
[14:06:26.143] <TB3> INFO: pixel data incomplete: 0
[14:06:26.143] <TB3> INFO: pixel address: 0
[14:06:26.143] <TB3> INFO: pulse height fill bit: 0
[14:06:26.143] <TB3> INFO: buffer corruption: 0
[14:06:26.179] <TB3> INFO: ######################################################################
[14:06:26.179] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:06:26.179] <TB3> INFO: ######################################################################
[14:06:26.179] <TB3> INFO: ----------------------------------------------------------------------
[14:06:26.179] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:06:26.179] <TB3> INFO: ----------------------------------------------------------------------
[14:06:26.179] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[14:06:26.191] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[14:06:26.191] <TB3> INFO: run 1 of 1
[14:06:26.422] <TB3> INFO: Expecting 36608000 events.
[14:06:50.430] <TB3> INFO: 714450 events read in total (23416ms).
[14:07:13.432] <TB3> INFO: 1410100 events read in total (46418ms).
[14:07:36.361] <TB3> INFO: 2103250 events read in total (69347ms).
[14:07:59.268] <TB3> INFO: 2796250 events read in total (92254ms).
[14:08:22.293] <TB3> INFO: 3490900 events read in total (115279ms).
[14:08:45.411] <TB3> INFO: 4182000 events read in total (138397ms).
[14:09:08.459] <TB3> INFO: 4875500 events read in total (161445ms).
[14:09:31.298] <TB3> INFO: 5565850 events read in total (184284ms).
[14:09:54.259] <TB3> INFO: 6256250 events read in total (207245ms).
[14:10:17.519] <TB3> INFO: 6947700 events read in total (230505ms).
[14:10:40.634] <TB3> INFO: 7637850 events read in total (253620ms).
[14:11:03.364] <TB3> INFO: 8325850 events read in total (276350ms).
[14:11:26.465] <TB3> INFO: 9017950 events read in total (299451ms).
[14:11:49.588] <TB3> INFO: 9707550 events read in total (322574ms).
[14:12:12.600] <TB3> INFO: 10398000 events read in total (345586ms).
[14:12:35.472] <TB3> INFO: 11086250 events read in total (368458ms).
[14:12:58.415] <TB3> INFO: 11773750 events read in total (391401ms).
[14:13:21.499] <TB3> INFO: 12461550 events read in total (414485ms).
[14:13:44.217] <TB3> INFO: 13150300 events read in total (437203ms).
[14:14:07.258] <TB3> INFO: 13838050 events read in total (460244ms).
[14:14:30.226] <TB3> INFO: 14525450 events read in total (483212ms).
[14:14:52.923] <TB3> INFO: 15210200 events read in total (505909ms).
[14:15:15.771] <TB3> INFO: 15895050 events read in total (528757ms).
[14:15:38.725] <TB3> INFO: 16579500 events read in total (551711ms).
[14:16:02.080] <TB3> INFO: 17265500 events read in total (575066ms).
[14:16:25.077] <TB3> INFO: 17950500 events read in total (598063ms).
[14:16:47.895] <TB3> INFO: 18632800 events read in total (620881ms).
[14:17:10.802] <TB3> INFO: 19311900 events read in total (643788ms).
[14:17:33.722] <TB3> INFO: 19990300 events read in total (666708ms).
[14:17:56.684] <TB3> INFO: 20667450 events read in total (689670ms).
[14:18:19.377] <TB3> INFO: 21344300 events read in total (712363ms).
[14:18:41.868] <TB3> INFO: 22022200 events read in total (734854ms).
[14:19:04.905] <TB3> INFO: 22697700 events read in total (757891ms).
[14:19:27.441] <TB3> INFO: 23373350 events read in total (780427ms).
[14:19:50.345] <TB3> INFO: 24048000 events read in total (803331ms).
[14:20:12.001] <TB3> INFO: 24723450 events read in total (825987ms).
[14:20:35.757] <TB3> INFO: 25397700 events read in total (848743ms).
[14:20:58.407] <TB3> INFO: 26073400 events read in total (871393ms).
[14:21:21.106] <TB3> INFO: 26747000 events read in total (894092ms).
[14:21:43.930] <TB3> INFO: 27421600 events read in total (916916ms).
[14:22:06.646] <TB3> INFO: 28095900 events read in total (939632ms).
[14:22:29.196] <TB3> INFO: 28770300 events read in total (962182ms).
[14:22:51.959] <TB3> INFO: 29443600 events read in total (984945ms).
[14:23:14.574] <TB3> INFO: 30117650 events read in total (1007560ms).
[14:23:37.166] <TB3> INFO: 30788550 events read in total (1030152ms).
[14:23:59.898] <TB3> INFO: 31462300 events read in total (1052884ms).
[14:24:22.789] <TB3> INFO: 32136400 events read in total (1075775ms).
[14:24:45.506] <TB3> INFO: 32812100 events read in total (1098492ms).
[14:25:08.147] <TB3> INFO: 33485800 events read in total (1121133ms).
[14:25:30.862] <TB3> INFO: 34160350 events read in total (1143848ms).
[14:25:53.626] <TB3> INFO: 34835050 events read in total (1166612ms).
[14:26:16.459] <TB3> INFO: 35510600 events read in total (1189445ms).
[14:26:39.179] <TB3> INFO: 36192650 events read in total (1212165ms).
[14:26:53.148] <TB3> INFO: 36608000 events read in total (1226134ms).
[14:26:53.212] <TB3> INFO: Test took 1227021ms.
[14:26:53.590] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:26:55.106] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:26:56.555] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:26:58.036] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:26:59.506] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:00.947] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:02.358] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:03.788] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:05.250] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:06.903] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:08.790] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:10.460] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:12.210] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:13.944] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:15.904] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:17.918] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:27:19.970] <TB3> INFO: PixTestScurves::scurves() done
[14:27:19.970] <TB3> INFO: Vcal mean: 133.23 114.69 124.21 119.72 122.15 126.56 122.55 125.84 132.77 126.29 130.63 133.81 129.72 126.13 137.80 110.81
[14:27:19.970] <TB3> INFO: Vcal RMS: 6.44 5.79 7.12 7.77 6.21 5.93 6.70 6.81 6.57 7.20 7.29 6.40 6.53 6.70 6.30 5.43
[14:27:19.970] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1253 seconds
[14:27:19.970] <TB3> INFO: Decoding statistics:
[14:27:19.970] <TB3> INFO: General information:
[14:27:19.970] <TB3> INFO: 16bit words read: 0
[14:27:19.970] <TB3> INFO: valid events total: 0
[14:27:19.970] <TB3> INFO: empty events: 0
[14:27:19.970] <TB3> INFO: valid events with pixels: 0
[14:27:19.970] <TB3> INFO: valid pixel hits: 0
[14:27:19.970] <TB3> INFO: Event errors: 0
[14:27:19.970] <TB3> INFO: start marker: 0
[14:27:19.970] <TB3> INFO: stop marker: 0
[14:27:19.970] <TB3> INFO: overflow: 0
[14:27:19.970] <TB3> INFO: invalid 5bit words: 0
[14:27:19.970] <TB3> INFO: invalid XOR eye diagram: 0
[14:27:19.970] <TB3> INFO: frame (failed synchr.): 0
[14:27:19.970] <TB3> INFO: idle data (no TBM trl): 0
[14:27:19.970] <TB3> INFO: no data (only TBM hdr): 0
[14:27:19.970] <TB3> INFO: TBM errors: 0
[14:27:19.970] <TB3> INFO: flawed TBM headers: 0
[14:27:19.970] <TB3> INFO: flawed TBM trailers: 0
[14:27:19.970] <TB3> INFO: event ID mismatches: 0
[14:27:19.970] <TB3> INFO: ROC errors: 0
[14:27:19.970] <TB3> INFO: missing ROC header(s): 0
[14:27:19.970] <TB3> INFO: misplaced readback start: 0
[14:27:19.970] <TB3> INFO: Pixel decoding errors: 0
[14:27:19.970] <TB3> INFO: pixel data incomplete: 0
[14:27:19.971] <TB3> INFO: pixel address: 0
[14:27:19.971] <TB3> INFO: pulse height fill bit: 0
[14:27:19.971] <TB3> INFO: buffer corruption: 0
[14:27:20.041] <TB3> INFO: ######################################################################
[14:27:20.041] <TB3> INFO: PixTestTrim::doTest()
[14:27:20.041] <TB3> INFO: ######################################################################
[14:27:20.042] <TB3> INFO: ----------------------------------------------------------------------
[14:27:20.042] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:27:20.042] <TB3> INFO: ----------------------------------------------------------------------
[14:27:20.084] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:27:20.084] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:27:20.094] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:27:20.094] <TB3> INFO: run 1 of 1
[14:27:20.340] <TB3> INFO: Expecting 5025280 events.
[14:27:50.795] <TB3> INFO: 835744 events read in total (29860ms).
[14:28:21.206] <TB3> INFO: 1669808 events read in total (60271ms).
[14:28:51.058] <TB3> INFO: 2500808 events read in total (90123ms).
[14:29:20.661] <TB3> INFO: 3327336 events read in total (119726ms).
[14:29:50.338] <TB3> INFO: 4150080 events read in total (149403ms).
[14:30:20.216] <TB3> INFO: 4971608 events read in total (179281ms).
[14:30:22.595] <TB3> INFO: 5025280 events read in total (181660ms).
[14:30:22.641] <TB3> INFO: Test took 182547ms.
[14:30:39.399] <TB3> INFO: ROC 0 VthrComp = 135
[14:30:39.399] <TB3> INFO: ROC 1 VthrComp = 113
[14:30:39.399] <TB3> INFO: ROC 2 VthrComp = 112
[14:30:39.399] <TB3> INFO: ROC 3 VthrComp = 108
[14:30:39.399] <TB3> INFO: ROC 4 VthrComp = 126
[14:30:39.399] <TB3> INFO: ROC 5 VthrComp = 124
[14:30:39.399] <TB3> INFO: ROC 6 VthrComp = 115
[14:30:39.399] <TB3> INFO: ROC 7 VthrComp = 121
[14:30:39.400] <TB3> INFO: ROC 8 VthrComp = 126
[14:30:39.400] <TB3> INFO: ROC 9 VthrComp = 113
[14:30:39.400] <TB3> INFO: ROC 10 VthrComp = 117
[14:30:39.400] <TB3> INFO: ROC 11 VthrComp = 119
[14:30:39.400] <TB3> INFO: ROC 12 VthrComp = 127
[14:30:39.400] <TB3> INFO: ROC 13 VthrComp = 117
[14:30:39.400] <TB3> INFO: ROC 14 VthrComp = 134
[14:30:39.400] <TB3> INFO: ROC 15 VthrComp = 103
[14:30:39.646] <TB3> INFO: Expecting 41600 events.
[14:30:43.137] <TB3> INFO: 41600 events read in total (2899ms).
[14:30:43.138] <TB3> INFO: Test took 3736ms.
[14:30:43.149] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:30:43.149] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:30:43.159] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:30:43.159] <TB3> INFO: run 1 of 1
[14:30:43.437] <TB3> INFO: Expecting 5025280 events.
[14:31:09.380] <TB3> INFO: 592920 events read in total (25351ms).
[14:31:35.034] <TB3> INFO: 1184272 events read in total (51005ms).
[14:32:00.505] <TB3> INFO: 1776336 events read in total (76476ms).
[14:32:25.887] <TB3> INFO: 2366592 events read in total (101858ms).
[14:32:51.594] <TB3> INFO: 2955488 events read in total (127565ms).
[14:33:17.081] <TB3> INFO: 3543648 events read in total (153052ms).
[14:33:42.661] <TB3> INFO: 4131168 events read in total (178632ms).
[14:34:07.938] <TB3> INFO: 4718416 events read in total (203909ms).
[14:34:21.410] <TB3> INFO: 5025280 events read in total (217381ms).
[14:34:21.480] <TB3> INFO: Test took 218320ms.
[14:34:45.952] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 63.3169 for pixel 0/0 mean/min/max = 48.6195/33.891/63.348
[14:34:45.952] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 63.4496 for pixel 15/4 mean/min/max = 47.7432/31.9252/63.5612
[14:34:45.953] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 71.0511 for pixel 17/7 mean/min/max = 51.8437/32.2238/71.4635
[14:34:45.953] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 70.7159 for pixel 0/30 mean/min/max = 52.2009/33.5564/70.8454
[14:34:45.953] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.0095 for pixel 51/30 mean/min/max = 46.1791/32.1973/60.161
[14:34:45.954] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 61.3684 for pixel 2/15 mean/min/max = 46.8349/32.1272/61.5426
[14:34:45.954] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 64.3893 for pixel 51/1 mean/min/max = 47.8516/31.206/64.4971
[14:34:45.955] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 67.0747 for pixel 2/0 mean/min/max = 49.8167/32.3082/67.3252
[14:34:45.955] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 64.9829 for pixel 35/3 mean/min/max = 48.613/32.1945/65.0316
[14:34:45.955] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 71.7761 for pixel 2/12 mean/min/max = 51.6552/31.5032/71.8073
[14:34:45.956] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 71.8397 for pixel 15/2 mean/min/max = 51.717/31.2285/72.2056
[14:34:45.956] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 71.7724 for pixel 0/20 mean/min/max = 51.6768/31.5275/71.8261
[14:34:45.957] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 61.6046 for pixel 20/0 mean/min/max = 46.5163/31.349/61.6836
[14:34:45.957] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 66.6435 for pixel 44/2 mean/min/max = 48.7244/30.6277/66.8211
[14:34:45.957] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 65.5368 for pixel 0/60 mean/min/max = 49.9132/34.1104/65.716
[14:34:45.958] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 66.2406 for pixel 0/3 mean/min/max = 49.4285/32.4097/66.4474
[14:34:45.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:34:46.047] <TB3> INFO: Expecting 411648 events.
[14:34:55.320] <TB3> INFO: 411648 events read in total (8682ms).
[14:34:55.326] <TB3> INFO: Expecting 411648 events.
[14:35:04.441] <TB3> INFO: 411648 events read in total (8712ms).
[14:35:04.451] <TB3> INFO: Expecting 411648 events.
[14:35:13.585] <TB3> INFO: 411648 events read in total (8731ms).
[14:35:13.597] <TB3> INFO: Expecting 411648 events.
[14:35:22.644] <TB3> INFO: 411648 events read in total (8644ms).
[14:35:22.657] <TB3> INFO: Expecting 411648 events.
[14:35:31.738] <TB3> INFO: 411648 events read in total (8678ms).
[14:35:31.760] <TB3> INFO: Expecting 411648 events.
[14:35:40.786] <TB3> INFO: 411648 events read in total (8623ms).
[14:35:40.805] <TB3> INFO: Expecting 411648 events.
[14:35:49.878] <TB3> INFO: 411648 events read in total (8670ms).
[14:35:49.905] <TB3> INFO: Expecting 411648 events.
[14:35:58.985] <TB3> INFO: 411648 events read in total (8677ms).
[14:35:59.008] <TB3> INFO: Expecting 411648 events.
[14:36:07.966] <TB3> INFO: 411648 events read in total (8555ms).
[14:36:07.992] <TB3> INFO: Expecting 411648 events.
[14:36:17.015] <TB3> INFO: 411648 events read in total (8620ms).
[14:36:17.045] <TB3> INFO: Expecting 411648 events.
[14:36:26.026] <TB3> INFO: 411648 events read in total (8578ms).
[14:36:26.056] <TB3> INFO: Expecting 411648 events.
[14:36:35.061] <TB3> INFO: 411648 events read in total (8602ms).
[14:36:35.093] <TB3> INFO: Expecting 411648 events.
[14:36:44.168] <TB3> INFO: 411648 events read in total (8672ms).
[14:36:44.203] <TB3> INFO: Expecting 411648 events.
[14:36:53.234] <TB3> INFO: 411648 events read in total (8628ms).
[14:36:53.272] <TB3> INFO: Expecting 411648 events.
[14:37:02.293] <TB3> INFO: 411648 events read in total (8618ms).
[14:37:02.337] <TB3> INFO: Expecting 411648 events.
[14:37:11.428] <TB3> INFO: 411648 events read in total (8688ms).
[14:37:11.470] <TB3> INFO: Test took 145512ms.
[14:37:12.010] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:37:12.021] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:37:12.021] <TB3> INFO: run 1 of 1
[14:37:12.253] <TB3> INFO: Expecting 5025280 events.
[14:37:38.402] <TB3> INFO: 593696 events read in total (25557ms).
[14:38:03.929] <TB3> INFO: 1187384 events read in total (51084ms).
[14:38:29.213] <TB3> INFO: 1777608 events read in total (76369ms).
[14:38:54.433] <TB3> INFO: 2368064 events read in total (101588ms).
[14:39:19.833] <TB3> INFO: 2960176 events read in total (126988ms).
[14:39:45.201] <TB3> INFO: 3554232 events read in total (152356ms).
[14:40:10.258] <TB3> INFO: 4146312 events read in total (177413ms).
[14:40:35.967] <TB3> INFO: 4737960 events read in total (203123ms).
[14:40:48.644] <TB3> INFO: 5025280 events read in total (215799ms).
[14:40:48.779] <TB3> INFO: Test took 216759ms.
[14:41:09.116] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 5.299116 .. 144.638623
[14:41:09.358] <TB3> INFO: Expecting 208000 events.
[14:41:18.533] <TB3> INFO: 208000 events read in total (8584ms).
[14:41:18.535] <TB3> INFO: Test took 9418ms.
[14:41:18.591] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 154 (-1/-1) hits flags = 528 (plus default)
[14:41:18.601] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:41:18.601] <TB3> INFO: run 1 of 1
[14:41:18.879] <TB3> INFO: Expecting 4992000 events.
[14:41:44.632] <TB3> INFO: 581104 events read in total (25162ms).
[14:42:09.564] <TB3> INFO: 1161528 events read in total (50095ms).
[14:42:34.994] <TB3> INFO: 1741912 events read in total (75525ms).
[14:43:00.115] <TB3> INFO: 2322216 events read in total (100645ms).
[14:43:25.868] <TB3> INFO: 2902800 events read in total (126398ms).
[14:43:51.204] <TB3> INFO: 3482104 events read in total (151734ms).
[14:44:16.639] <TB3> INFO: 4061584 events read in total (177169ms).
[14:44:42.067] <TB3> INFO: 4641128 events read in total (202597ms).
[14:44:57.874] <TB3> INFO: 4992000 events read in total (218404ms).
[14:44:57.970] <TB3> INFO: Test took 219370ms.
[14:45:23.854] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 25.163830 .. 49.184164
[14:45:24.086] <TB3> INFO: Expecting 208000 events.
[14:45:33.777] <TB3> INFO: 208000 events read in total (9099ms).
[14:45:33.778] <TB3> INFO: Test took 9922ms.
[14:45:33.841] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 15 .. 59 (-1/-1) hits flags = 528 (plus default)
[14:45:33.853] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:45:33.853] <TB3> INFO: run 1 of 1
[14:45:34.130] <TB3> INFO: Expecting 1497600 events.
[14:46:01.823] <TB3> INFO: 657680 events read in total (27101ms).
[14:46:29.320] <TB3> INFO: 1312600 events read in total (54598ms).
[14:46:37.189] <TB3> INFO: 1497600 events read in total (62467ms).
[14:46:37.218] <TB3> INFO: Test took 63366ms.
[14:46:51.437] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.745851 .. 53.608014
[14:46:51.671] <TB3> INFO: Expecting 208000 events.
[14:47:01.691] <TB3> INFO: 208000 events read in total (9429ms).
[14:47:01.692] <TB3> INFO: Test took 10253ms.
[14:47:01.762] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 63 (-1/-1) hits flags = 528 (plus default)
[14:47:01.773] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:47:01.773] <TB3> INFO: run 1 of 1
[14:47:02.051] <TB3> INFO: Expecting 1530880 events.
[14:47:29.421] <TB3> INFO: 631984 events read in total (26779ms).
[14:47:56.840] <TB3> INFO: 1262864 events read in total (54199ms).
[14:48:08.481] <TB3> INFO: 1530880 events read in total (65839ms).
[14:48:08.515] <TB3> INFO: Test took 66742ms.
[14:48:22.741] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.523542 .. 56.214064
[14:48:23.013] <TB3> INFO: Expecting 208000 events.
[14:48:32.763] <TB3> INFO: 208000 events read in total (9159ms).
[14:48:32.763] <TB3> INFO: Test took 10021ms.
[14:48:32.809] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 66 (-1/-1) hits flags = 528 (plus default)
[14:48:32.819] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:48:32.819] <TB3> INFO: run 1 of 1
[14:48:33.097] <TB3> INFO: Expecting 1697280 events.
[14:49:00.311] <TB3> INFO: 630112 events read in total (26622ms).
[14:49:26.926] <TB3> INFO: 1260568 events read in total (53237ms).
[14:49:45.338] <TB3> INFO: 1697280 events read in total (71649ms).
[14:49:45.369] <TB3> INFO: Test took 72550ms.
[14:49:59.412] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:49:59.412] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:49:59.423] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:49:59.423] <TB3> INFO: run 1 of 1
[14:49:59.655] <TB3> INFO: Expecting 1364480 events.
[14:50:27.642] <TB3> INFO: 668472 events read in total (27395ms).
[14:50:55.165] <TB3> INFO: 1336744 events read in total (54918ms).
[14:50:56.745] <TB3> INFO: 1364480 events read in total (56499ms).
[14:50:56.777] <TB3> INFO: Test took 57355ms.
[14:51:09.599] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C0.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C1.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C2.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C3.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C4.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C5.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C6.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C7.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C8.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C9.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C10.dat
[14:51:09.600] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C11.dat
[14:51:09.601] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C12.dat
[14:51:09.601] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C13.dat
[14:51:09.601] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C14.dat
[14:51:09.601] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C15.dat
[14:51:09.601] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C0.dat
[14:51:09.606] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C1.dat
[14:51:09.615] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C2.dat
[14:51:09.623] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C3.dat
[14:51:09.631] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C4.dat
[14:51:09.639] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C5.dat
[14:51:09.647] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C6.dat
[14:51:09.656] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C7.dat
[14:51:09.665] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C8.dat
[14:51:09.673] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C9.dat
[14:51:09.681] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C10.dat
[14:51:09.690] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C11.dat
[14:51:09.698] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C12.dat
[14:51:09.706] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C13.dat
[14:51:09.713] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C14.dat
[14:51:09.721] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters35_C15.dat
[14:51:09.729] <TB3> INFO: PixTestTrim::trimTest() done
[14:51:09.729] <TB3> INFO: vtrim: 142 173 153 127 134 136 130 128 146 162 148 144 131 173 148 129
[14:51:09.729] <TB3> INFO: vthrcomp: 135 113 112 108 126 124 115 121 126 113 117 119 127 117 134 103
[14:51:09.729] <TB3> INFO: vcal mean: 35.28 35.07 37.30 35.81 34.96 35.02 35.19 35.97 36.67 36.35 36.88 36.70 35.11 35.44 35.25 35.00
[14:51:09.729] <TB3> INFO: vcal RMS: 1.44 1.29 3.11 2.19 1.05 1.21 1.36 2.15 2.74 2.67 3.01 2.80 1.27 1.80 1.33 1.13
[14:51:09.729] <TB3> INFO: bits mean: 9.23 10.20 10.10 8.43 9.93 9.87 9.81 9.62 10.19 10.30 10.14 9.87 10.00 10.56 9.09 8.91
[14:51:09.729] <TB3> INFO: bits RMS: 2.44 2.27 2.50 2.82 2.47 2.49 2.56 2.61 2.48 2.29 2.53 2.71 2.59 2.29 2.41 2.72
[14:51:09.736] <TB3> INFO: ----------------------------------------------------------------------
[14:51:09.736] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:51:09.736] <TB3> INFO: ----------------------------------------------------------------------
[14:51:09.739] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:51:09.749] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:51:09.749] <TB3> INFO: run 1 of 1
[14:51:09.982] <TB3> INFO: Expecting 4160000 events.
[14:51:42.911] <TB3> INFO: 792090 events read in total (32337ms).
[14:52:14.936] <TB3> INFO: 1576025 events read in total (64362ms).
[14:52:47.302] <TB3> INFO: 2353095 events read in total (96728ms).
[14:53:19.009] <TB3> INFO: 3120495 events read in total (128435ms).
[14:53:51.193] <TB3> INFO: 3884720 events read in total (160619ms).
[14:54:02.765] <TB3> INFO: 4160000 events read in total (172191ms).
[14:54:02.813] <TB3> INFO: Test took 173063ms.
[14:54:34.825] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[14:54:34.837] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:54:34.837] <TB3> INFO: run 1 of 1
[14:54:35.163] <TB3> INFO: Expecting 4555200 events.
[14:55:06.591] <TB3> INFO: 733020 events read in total (30836ms).
[14:55:37.119] <TB3> INFO: 1460400 events read in total (61364ms).
[14:56:07.741] <TB3> INFO: 2185330 events read in total (91986ms).
[14:56:38.117] <TB3> INFO: 2904235 events read in total (122362ms).
[14:57:08.886] <TB3> INFO: 3619760 events read in total (153131ms).
[14:57:39.904] <TB3> INFO: 4333500 events read in total (184149ms).
[14:57:49.499] <TB3> INFO: 4555200 events read in total (193744ms).
[14:57:49.574] <TB3> INFO: Test took 194737ms.
[14:58:19.933] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[14:58:19.945] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:58:19.945] <TB3> INFO: run 1 of 1
[14:58:20.271] <TB3> INFO: Expecting 4492800 events.
[14:58:51.931] <TB3> INFO: 737120 events read in total (31068ms).
[14:59:23.094] <TB3> INFO: 1468835 events read in total (62231ms).
[14:59:53.897] <TB3> INFO: 2197230 events read in total (93034ms).
[15:00:24.669] <TB3> INFO: 2919240 events read in total (123806ms).
[15:00:55.142] <TB3> INFO: 3638445 events read in total (154279ms).
[15:01:26.172] <TB3> INFO: 4356590 events read in total (185309ms).
[15:01:32.206] <TB3> INFO: 4492800 events read in total (191343ms).
[15:01:32.268] <TB3> INFO: Test took 192323ms.
[15:02:01.823] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 216 (-1/-1) hits flags = 528 (plus default)
[15:02:01.833] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:02:01.833] <TB3> INFO: run 1 of 1
[15:02:02.065] <TB3> INFO: Expecting 4513600 events.
[15:02:33.453] <TB3> INFO: 736015 events read in total (30796ms).
[15:03:04.470] <TB3> INFO: 1466620 events read in total (61813ms).
[15:03:35.344] <TB3> INFO: 2194165 events read in total (92687ms).
[15:04:05.984] <TB3> INFO: 2915585 events read in total (123327ms).
[15:04:36.703] <TB3> INFO: 3634035 events read in total (154046ms).
[15:05:07.439] <TB3> INFO: 4351170 events read in total (184782ms).
[15:05:14.756] <TB3> INFO: 4513600 events read in total (192099ms).
[15:05:14.820] <TB3> INFO: Test took 192987ms.
[15:05:44.090] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 220 (-1/-1) hits flags = 528 (plus default)
[15:05:44.101] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:05:44.101] <TB3> INFO: run 1 of 1
[15:05:44.333] <TB3> INFO: Expecting 4596800 events.
[15:06:15.737] <TB3> INFO: 731490 events read in total (30813ms).
[15:06:46.478] <TB3> INFO: 1457250 events read in total (61554ms).
[15:07:17.054] <TB3> INFO: 2180365 events read in total (92130ms).
[15:07:47.660] <TB3> INFO: 2898115 events read in total (122736ms).
[15:08:18.305] <TB3> INFO: 3612240 events read in total (153381ms).
[15:08:49.428] <TB3> INFO: 4324945 events read in total (184504ms).
[15:09:01.341] <TB3> INFO: 4596800 events read in total (196417ms).
[15:09:01.437] <TB3> INFO: Test took 197336ms.
[15:09:30.697] <TB3> INFO: PixTestTrim::trimBitTest() done
[15:09:30.698] <TB3> INFO: PixTestTrim::doTest() done, duration: 2530 seconds
[15:09:30.698] <TB3> INFO: Decoding statistics:
[15:09:30.698] <TB3> INFO: General information:
[15:09:30.698] <TB3> INFO: 16bit words read: 0
[15:09:30.698] <TB3> INFO: valid events total: 0
[15:09:30.698] <TB3> INFO: empty events: 0
[15:09:30.698] <TB3> INFO: valid events with pixels: 0
[15:09:30.698] <TB3> INFO: valid pixel hits: 0
[15:09:30.698] <TB3> INFO: Event errors: 0
[15:09:30.699] <TB3> INFO: start marker: 0
[15:09:30.699] <TB3> INFO: stop marker: 0
[15:09:30.699] <TB3> INFO: overflow: 0
[15:09:30.699] <TB3> INFO: invalid 5bit words: 0
[15:09:30.699] <TB3> INFO: invalid XOR eye diagram: 0
[15:09:30.699] <TB3> INFO: frame (failed synchr.): 0
[15:09:30.699] <TB3> INFO: idle data (no TBM trl): 0
[15:09:30.699] <TB3> INFO: no data (only TBM hdr): 0
[15:09:30.699] <TB3> INFO: TBM errors: 0
[15:09:30.699] <TB3> INFO: flawed TBM headers: 0
[15:09:30.699] <TB3> INFO: flawed TBM trailers: 0
[15:09:30.699] <TB3> INFO: event ID mismatches: 0
[15:09:30.699] <TB3> INFO: ROC errors: 0
[15:09:30.699] <TB3> INFO: missing ROC header(s): 0
[15:09:30.699] <TB3> INFO: misplaced readback start: 0
[15:09:30.699] <TB3> INFO: Pixel decoding errors: 0
[15:09:30.699] <TB3> INFO: pixel data incomplete: 0
[15:09:30.699] <TB3> INFO: pixel address: 0
[15:09:30.699] <TB3> INFO: pulse height fill bit: 0
[15:09:30.699] <TB3> INFO: buffer corruption: 0
[15:09:31.493] <TB3> INFO: ######################################################################
[15:09:31.493] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:09:31.493] <TB3> INFO: ######################################################################
[15:09:31.727] <TB3> INFO: Expecting 41600 events.
[15:09:35.146] <TB3> INFO: 41600 events read in total (2827ms).
[15:09:35.147] <TB3> INFO: Test took 3652ms.
[15:09:35.594] <TB3> INFO: Expecting 41600 events.
[15:09:39.098] <TB3> INFO: 41600 events read in total (2912ms).
[15:09:39.099] <TB3> INFO: Test took 3748ms.
[15:09:39.388] <TB3> INFO: Expecting 41600 events.
[15:09:42.844] <TB3> INFO: 41600 events read in total (2864ms).
[15:09:42.845] <TB3> INFO: Test took 3722ms.
[15:09:43.135] <TB3> INFO: Expecting 41600 events.
[15:09:46.668] <TB3> INFO: 41600 events read in total (2941ms).
[15:09:46.669] <TB3> INFO: Test took 3798ms.
[15:09:46.957] <TB3> INFO: Expecting 41600 events.
[15:09:50.413] <TB3> INFO: 41600 events read in total (2864ms).
[15:09:50.414] <TB3> INFO: Test took 3721ms.
[15:09:50.705] <TB3> INFO: Expecting 41600 events.
[15:09:54.179] <TB3> INFO: 41600 events read in total (2883ms).
[15:09:54.180] <TB3> INFO: Test took 3740ms.
[15:09:54.468] <TB3> INFO: Expecting 41600 events.
[15:09:57.934] <TB3> INFO: 41600 events read in total (2874ms).
[15:09:57.935] <TB3> INFO: Test took 3731ms.
[15:09:58.223] <TB3> INFO: Expecting 41600 events.
[15:10:01.815] <TB3> INFO: 41600 events read in total (3001ms).
[15:10:01.816] <TB3> INFO: Test took 3857ms.
[15:10:02.104] <TB3> INFO: Expecting 41600 events.
[15:10:05.560] <TB3> INFO: 41600 events read in total (2865ms).
[15:10:05.561] <TB3> INFO: Test took 3722ms.
[15:10:05.850] <TB3> INFO: Expecting 41600 events.
[15:10:09.271] <TB3> INFO: 41600 events read in total (2829ms).
[15:10:09.272] <TB3> INFO: Test took 3687ms.
[15:10:09.561] <TB3> INFO: Expecting 41600 events.
[15:10:13.008] <TB3> INFO: 41600 events read in total (2856ms).
[15:10:13.009] <TB3> INFO: Test took 3713ms.
[15:10:13.297] <TB3> INFO: Expecting 41600 events.
[15:10:16.723] <TB3> INFO: 41600 events read in total (2835ms).
[15:10:16.724] <TB3> INFO: Test took 3692ms.
[15:10:17.012] <TB3> INFO: Expecting 41600 events.
[15:10:20.592] <TB3> INFO: 41600 events read in total (2989ms).
[15:10:20.593] <TB3> INFO: Test took 3846ms.
[15:10:20.880] <TB3> INFO: Expecting 41600 events.
[15:10:24.303] <TB3> INFO: 41600 events read in total (2831ms).
[15:10:24.304] <TB3> INFO: Test took 3688ms.
[15:10:24.592] <TB3> INFO: Expecting 41600 events.
[15:10:28.064] <TB3> INFO: 41600 events read in total (2881ms).
[15:10:28.065] <TB3> INFO: Test took 3738ms.
[15:10:28.353] <TB3> INFO: Expecting 41600 events.
[15:10:31.791] <TB3> INFO: 41600 events read in total (2847ms).
[15:10:31.792] <TB3> INFO: Test took 3704ms.
[15:10:32.080] <TB3> INFO: Expecting 41600 events.
[15:10:35.549] <TB3> INFO: 41600 events read in total (2878ms).
[15:10:35.550] <TB3> INFO: Test took 3735ms.
[15:10:35.846] <TB3> INFO: Expecting 41600 events.
[15:10:39.392] <TB3> INFO: 41600 events read in total (2954ms).
[15:10:39.393] <TB3> INFO: Test took 3820ms.
[15:10:39.690] <TB3> INFO: Expecting 41600 events.
[15:10:43.115] <TB3> INFO: 41600 events read in total (2834ms).
[15:10:43.116] <TB3> INFO: Test took 3700ms.
[15:10:43.403] <TB3> INFO: Expecting 41600 events.
[15:10:46.862] <TB3> INFO: 41600 events read in total (2867ms).
[15:10:46.863] <TB3> INFO: Test took 3724ms.
[15:10:47.150] <TB3> INFO: Expecting 41600 events.
[15:10:50.729] <TB3> INFO: 41600 events read in total (2987ms).
[15:10:50.730] <TB3> INFO: Test took 3844ms.
[15:10:51.018] <TB3> INFO: Expecting 41600 events.
[15:10:54.535] <TB3> INFO: 41600 events read in total (2925ms).
[15:10:54.536] <TB3> INFO: Test took 3783ms.
[15:10:54.824] <TB3> INFO: Expecting 41600 events.
[15:10:58.297] <TB3> INFO: 41600 events read in total (2882ms).
[15:10:58.298] <TB3> INFO: Test took 3739ms.
[15:10:58.597] <TB3> INFO: Expecting 41600 events.
[15:11:02.025] <TB3> INFO: 41600 events read in total (2836ms).
[15:11:02.026] <TB3> INFO: Test took 3704ms.
[15:11:02.317] <TB3> INFO: Expecting 41600 events.
[15:11:05.844] <TB3> INFO: 41600 events read in total (2936ms).
[15:11:05.845] <TB3> INFO: Test took 3793ms.
[15:11:06.145] <TB3> INFO: Expecting 41600 events.
[15:11:09.690] <TB3> INFO: 41600 events read in total (2953ms).
[15:11:09.690] <TB3> INFO: Test took 3821ms.
[15:11:09.978] <TB3> INFO: Expecting 41600 events.
[15:11:13.479] <TB3> INFO: 41600 events read in total (2909ms).
[15:11:13.480] <TB3> INFO: Test took 3766ms.
[15:11:13.768] <TB3> INFO: Expecting 41600 events.
[15:11:17.350] <TB3> INFO: 41600 events read in total (2991ms).
[15:11:17.351] <TB3> INFO: Test took 3848ms.
[15:11:17.652] <TB3> INFO: Expecting 41600 events.
[15:11:21.150] <TB3> INFO: 41600 events read in total (2906ms).
[15:11:21.151] <TB3> INFO: Test took 3776ms.
[15:11:21.442] <TB3> INFO: Expecting 2560 events.
[15:11:22.326] <TB3> INFO: 2560 events read in total (292ms).
[15:11:22.326] <TB3> INFO: Test took 1161ms.
[15:11:22.634] <TB3> INFO: Expecting 2560 events.
[15:11:23.514] <TB3> INFO: 2560 events read in total (289ms).
[15:11:23.515] <TB3> INFO: Test took 1189ms.
[15:11:23.823] <TB3> INFO: Expecting 2560 events.
[15:11:24.706] <TB3> INFO: 2560 events read in total (292ms).
[15:11:24.706] <TB3> INFO: Test took 1191ms.
[15:11:25.013] <TB3> INFO: Expecting 2560 events.
[15:11:25.898] <TB3> INFO: 2560 events read in total (293ms).
[15:11:25.899] <TB3> INFO: Test took 1193ms.
[15:11:26.206] <TB3> INFO: Expecting 2560 events.
[15:11:27.085] <TB3> INFO: 2560 events read in total (287ms).
[15:11:27.086] <TB3> INFO: Test took 1187ms.
[15:11:27.394] <TB3> INFO: Expecting 2560 events.
[15:11:28.277] <TB3> INFO: 2560 events read in total (292ms).
[15:11:28.277] <TB3> INFO: Test took 1191ms.
[15:11:28.585] <TB3> INFO: Expecting 2560 events.
[15:11:29.465] <TB3> INFO: 2560 events read in total (289ms).
[15:11:29.466] <TB3> INFO: Test took 1189ms.
[15:11:29.773] <TB3> INFO: Expecting 2560 events.
[15:11:30.652] <TB3> INFO: 2560 events read in total (287ms).
[15:11:30.652] <TB3> INFO: Test took 1186ms.
[15:11:30.960] <TB3> INFO: Expecting 2560 events.
[15:11:31.838] <TB3> INFO: 2560 events read in total (286ms).
[15:11:31.838] <TB3> INFO: Test took 1186ms.
[15:11:32.146] <TB3> INFO: Expecting 2560 events.
[15:11:33.024] <TB3> INFO: 2560 events read in total (287ms).
[15:11:33.024] <TB3> INFO: Test took 1186ms.
[15:11:33.332] <TB3> INFO: Expecting 2560 events.
[15:11:34.214] <TB3> INFO: 2560 events read in total (290ms).
[15:11:34.214] <TB3> INFO: Test took 1189ms.
[15:11:34.523] <TB3> INFO: Expecting 2560 events.
[15:11:35.400] <TB3> INFO: 2560 events read in total (286ms).
[15:11:35.401] <TB3> INFO: Test took 1186ms.
[15:11:35.709] <TB3> INFO: Expecting 2560 events.
[15:11:36.590] <TB3> INFO: 2560 events read in total (290ms).
[15:11:36.590] <TB3> INFO: Test took 1189ms.
[15:11:36.898] <TB3> INFO: Expecting 2560 events.
[15:11:37.780] <TB3> INFO: 2560 events read in total (290ms).
[15:11:37.780] <TB3> INFO: Test took 1189ms.
[15:11:38.088] <TB3> INFO: Expecting 2560 events.
[15:11:38.971] <TB3> INFO: 2560 events read in total (291ms).
[15:11:38.971] <TB3> INFO: Test took 1190ms.
[15:11:39.279] <TB3> INFO: Expecting 2560 events.
[15:11:40.165] <TB3> INFO: 2560 events read in total (294ms).
[15:11:40.165] <TB3> INFO: Test took 1193ms.
[15:11:40.169] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:11:40.474] <TB3> INFO: Expecting 655360 events.
[15:11:54.685] <TB3> INFO: 655360 events read in total (13619ms).
[15:11:54.701] <TB3> INFO: Expecting 655360 events.
[15:12:08.803] <TB3> INFO: 655360 events read in total (13699ms).
[15:12:08.818] <TB3> INFO: Expecting 655360 events.
[15:12:22.808] <TB3> INFO: 655360 events read in total (13587ms).
[15:12:22.827] <TB3> INFO: Expecting 655360 events.
[15:12:36.839] <TB3> INFO: 655360 events read in total (13609ms).
[15:12:36.861] <TB3> INFO: Expecting 655360 events.
[15:12:50.866] <TB3> INFO: 655360 events read in total (13602ms).
[15:12:50.901] <TB3> INFO: Expecting 655360 events.
[15:13:04.000] <TB3> INFO: 655360 events read in total (13696ms).
[15:13:05.042] <TB3> INFO: Expecting 655360 events.
[15:13:19.270] <TB3> INFO: 655360 events read in total (13826ms).
[15:13:19.319] <TB3> INFO: Expecting 655360 events.
[15:13:33.325] <TB3> INFO: 655360 events read in total (13603ms).
[15:13:33.377] <TB3> INFO: Expecting 655360 events.
[15:13:47.338] <TB3> INFO: 655360 events read in total (13558ms).
[15:13:47.396] <TB3> INFO: Expecting 655360 events.
[15:14:01.408] <TB3> INFO: 655360 events read in total (13609ms).
[15:14:01.456] <TB3> INFO: Expecting 655360 events.
[15:14:15.491] <TB3> INFO: 655360 events read in total (13632ms).
[15:14:15.557] <TB3> INFO: Expecting 655360 events.
[15:14:29.723] <TB3> INFO: 655360 events read in total (13763ms).
[15:14:29.808] <TB3> INFO: Expecting 655360 events.
[15:14:43.898] <TB3> INFO: 655360 events read in total (13687ms).
[15:14:43.981] <TB3> INFO: Expecting 655360 events.
[15:14:58.038] <TB3> INFO: 655360 events read in total (13654ms).
[15:14:58.161] <TB3> INFO: Expecting 655360 events.
[15:15:12.299] <TB3> INFO: 655360 events read in total (13735ms).
[15:15:12.405] <TB3> INFO: Expecting 655360 events.
[15:15:26.374] <TB3> INFO: 655360 events read in total (13566ms).
[15:15:26.474] <TB3> INFO: Test took 226305ms.
[15:15:26.551] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:15:26.816] <TB3> INFO: Expecting 655360 events.
[15:15:40.780] <TB3> INFO: 655360 events read in total (13373ms).
[15:15:40.791] <TB3> INFO: Expecting 655360 events.
[15:15:54.866] <TB3> INFO: 655360 events read in total (13672ms).
[15:15:54.884] <TB3> INFO: Expecting 655360 events.
[15:16:08.784] <TB3> INFO: 655360 events read in total (13496ms).
[15:16:08.805] <TB3> INFO: Expecting 655360 events.
[15:16:22.649] <TB3> INFO: 655360 events read in total (13441ms).
[15:16:22.673] <TB3> INFO: Expecting 655360 events.
[15:16:36.562] <TB3> INFO: 655360 events read in total (13486ms).
[15:16:36.591] <TB3> INFO: Expecting 655360 events.
[15:16:50.438] <TB3> INFO: 655360 events read in total (13444ms).
[15:16:50.469] <TB3> INFO: Expecting 655360 events.
[15:17:04.429] <TB3> INFO: 655360 events read in total (13557ms).
[15:17:04.464] <TB3> INFO: Expecting 655360 events.
[15:17:18.421] <TB3> INFO: 655360 events read in total (13554ms).
[15:17:18.465] <TB3> INFO: Expecting 655360 events.
[15:17:32.318] <TB3> INFO: 655360 events read in total (13450ms).
[15:17:32.360] <TB3> INFO: Expecting 655360 events.
[15:17:46.086] <TB3> INFO: 655360 events read in total (13323ms).
[15:17:46.149] <TB3> INFO: Expecting 655360 events.
[15:17:59.961] <TB3> INFO: 655360 events read in total (13409ms).
[15:18:00.062] <TB3> INFO: Expecting 655360 events.
[15:18:14.004] <TB3> INFO: 655360 events read in total (13538ms).
[15:18:14.084] <TB3> INFO: Expecting 655360 events.
[15:18:27.825] <TB3> INFO: 655360 events read in total (13338ms).
[15:18:27.926] <TB3> INFO: Expecting 655360 events.
[15:18:41.638] <TB3> INFO: 655360 events read in total (13309ms).
[15:18:41.727] <TB3> INFO: Expecting 655360 events.
[15:18:55.573] <TB3> INFO: 655360 events read in total (13443ms).
[15:18:55.661] <TB3> INFO: Expecting 655360 events.
[15:19:09.700] <TB3> INFO: 655360 events read in total (13636ms).
[15:19:09.813] <TB3> INFO: Test took 223262ms.
[15:19:10.038] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.045] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.051] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.057] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.064] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:19:10.070] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:19:10.077] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:19:10.083] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:19:10.089] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[15:19:10.096] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[15:19:10.102] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[15:19:10.108] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[15:19:10.115] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[15:19:10.121] <TB3> INFO: safety margin for low PH: adding 13, margin is now 33
[15:19:10.128] <TB3> INFO: safety margin for low PH: adding 14, margin is now 34
[15:19:10.134] <TB3> INFO: safety margin for low PH: adding 15, margin is now 35
[15:19:10.140] <TB3> INFO: safety margin for low PH: adding 16, margin is now 36
[15:19:10.147] <TB3> INFO: safety margin for low PH: adding 17, margin is now 37
[15:19:10.153] <TB3> INFO: safety margin for low PH: adding 18, margin is now 38
[15:19:10.160] <TB3> INFO: safety margin for low PH: adding 19, margin is now 39
[15:19:10.166] <TB3> INFO: safety margin for low PH: adding 20, margin is now 40
[15:19:10.172] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.179] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.185] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.192] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.198] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:19:10.204] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.211] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.218] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.225] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.231] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.238] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.242] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.247] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.252] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.256] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.261] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.266] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.270] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.275] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.280] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.284] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:19:10.289] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:19:10.293] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:19:10.298] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:19:10.302] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[15:19:10.307] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[15:19:10.312] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.316] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.321] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.326] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.330] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.335] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.339] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.344] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.349] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:19:10.353] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:19:10.358] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:19:10.363] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:19:10.367] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[15:19:10.372] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[15:19:10.376] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.381] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.386] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.390] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.395] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.400] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:19:10.404] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:19:10.409] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:19:10.413] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:19:10.418] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:19:10.423] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:19:10.456] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C0.dat
[15:19:10.456] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C1.dat
[15:19:10.456] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C2.dat
[15:19:10.456] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C3.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C4.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C5.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C6.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C7.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C8.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C9.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C10.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C11.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C12.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C13.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C14.dat
[15:19:10.457] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters35_C15.dat
[15:19:10.694] <TB3> INFO: Expecting 41600 events.
[15:19:13.814] <TB3> INFO: 41600 events read in total (2529ms).
[15:19:13.815] <TB3> INFO: Test took 3355ms.
[15:19:14.259] <TB3> INFO: Expecting 41600 events.
[15:19:17.256] <TB3> INFO: 41600 events read in total (2406ms).
[15:19:17.257] <TB3> INFO: Test took 3231ms.
[15:19:17.742] <TB3> INFO: Expecting 41600 events.
[15:19:20.858] <TB3> INFO: 41600 events read in total (2524ms).
[15:19:20.859] <TB3> INFO: Test took 3391ms.
[15:19:21.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:21.163] <TB3> INFO: Expecting 2560 events.
[15:19:22.047] <TB3> INFO: 2560 events read in total (293ms).
[15:19:22.047] <TB3> INFO: Test took 973ms.
[15:19:22.049] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:22.356] <TB3> INFO: Expecting 2560 events.
[15:19:23.240] <TB3> INFO: 2560 events read in total (293ms).
[15:19:23.240] <TB3> INFO: Test took 1191ms.
[15:19:23.242] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:23.549] <TB3> INFO: Expecting 2560 events.
[15:19:24.431] <TB3> INFO: 2560 events read in total (291ms).
[15:19:24.432] <TB3> INFO: Test took 1190ms.
[15:19:24.433] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:24.740] <TB3> INFO: Expecting 2560 events.
[15:19:25.623] <TB3> INFO: 2560 events read in total (292ms).
[15:19:25.624] <TB3> INFO: Test took 1191ms.
[15:19:25.626] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:25.932] <TB3> INFO: Expecting 2560 events.
[15:19:26.817] <TB3> INFO: 2560 events read in total (294ms).
[15:19:26.818] <TB3> INFO: Test took 1192ms.
[15:19:26.819] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:27.126] <TB3> INFO: Expecting 2560 events.
[15:19:28.009] <TB3> INFO: 2560 events read in total (292ms).
[15:19:28.009] <TB3> INFO: Test took 1190ms.
[15:19:28.011] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:28.317] <TB3> INFO: Expecting 2560 events.
[15:19:29.202] <TB3> INFO: 2560 events read in total (293ms).
[15:19:29.202] <TB3> INFO: Test took 1191ms.
[15:19:29.204] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:29.511] <TB3> INFO: Expecting 2560 events.
[15:19:30.393] <TB3> INFO: 2560 events read in total (291ms).
[15:19:30.394] <TB3> INFO: Test took 1190ms.
[15:19:30.396] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:30.702] <TB3> INFO: Expecting 2560 events.
[15:19:31.580] <TB3> INFO: 2560 events read in total (286ms).
[15:19:31.581] <TB3> INFO: Test took 1185ms.
[15:19:31.582] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:31.889] <TB3> INFO: Expecting 2560 events.
[15:19:32.770] <TB3> INFO: 2560 events read in total (289ms).
[15:19:32.770] <TB3> INFO: Test took 1188ms.
[15:19:32.772] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:33.078] <TB3> INFO: Expecting 2560 events.
[15:19:33.957] <TB3> INFO: 2560 events read in total (287ms).
[15:19:33.958] <TB3> INFO: Test took 1186ms.
[15:19:33.961] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:34.266] <TB3> INFO: Expecting 2560 events.
[15:19:35.144] <TB3> INFO: 2560 events read in total (287ms).
[15:19:35.144] <TB3> INFO: Test took 1183ms.
[15:19:35.146] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:35.453] <TB3> INFO: Expecting 2560 events.
[15:19:36.330] <TB3> INFO: 2560 events read in total (286ms).
[15:19:36.330] <TB3> INFO: Test took 1184ms.
[15:19:36.333] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:36.639] <TB3> INFO: Expecting 2560 events.
[15:19:37.516] <TB3> INFO: 2560 events read in total (286ms).
[15:19:37.517] <TB3> INFO: Test took 1185ms.
[15:19:37.519] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:37.825] <TB3> INFO: Expecting 2560 events.
[15:19:38.706] <TB3> INFO: 2560 events read in total (289ms).
[15:19:38.706] <TB3> INFO: Test took 1187ms.
[15:19:38.709] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:39.015] <TB3> INFO: Expecting 2560 events.
[15:19:39.896] <TB3> INFO: 2560 events read in total (289ms).
[15:19:39.896] <TB3> INFO: Test took 1187ms.
[15:19:39.898] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:40.204] <TB3> INFO: Expecting 2560 events.
[15:19:41.082] <TB3> INFO: 2560 events read in total (286ms).
[15:19:41.082] <TB3> INFO: Test took 1184ms.
[15:19:41.084] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:41.391] <TB3> INFO: Expecting 2560 events.
[15:19:42.272] <TB3> INFO: 2560 events read in total (290ms).
[15:19:42.272] <TB3> INFO: Test took 1188ms.
[15:19:42.274] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:42.581] <TB3> INFO: Expecting 2560 events.
[15:19:43.461] <TB3> INFO: 2560 events read in total (289ms).
[15:19:43.461] <TB3> INFO: Test took 1187ms.
[15:19:43.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:43.770] <TB3> INFO: Expecting 2560 events.
[15:19:44.652] <TB3> INFO: 2560 events read in total (291ms).
[15:19:44.652] <TB3> INFO: Test took 1189ms.
[15:19:44.654] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:44.960] <TB3> INFO: Expecting 2560 events.
[15:19:45.838] <TB3> INFO: 2560 events read in total (286ms).
[15:19:45.839] <TB3> INFO: Test took 1185ms.
[15:19:45.841] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:46.147] <TB3> INFO: Expecting 2560 events.
[15:19:47.026] <TB3> INFO: 2560 events read in total (288ms).
[15:19:47.026] <TB3> INFO: Test took 1185ms.
[15:19:47.028] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:47.335] <TB3> INFO: Expecting 2560 events.
[15:19:48.214] <TB3> INFO: 2560 events read in total (287ms).
[15:19:48.215] <TB3> INFO: Test took 1187ms.
[15:19:48.217] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:48.523] <TB3> INFO: Expecting 2560 events.
[15:19:49.403] <TB3> INFO: 2560 events read in total (288ms).
[15:19:49.403] <TB3> INFO: Test took 1186ms.
[15:19:49.405] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:49.712] <TB3> INFO: Expecting 2560 events.
[15:19:50.597] <TB3> INFO: 2560 events read in total (294ms).
[15:19:50.597] <TB3> INFO: Test took 1192ms.
[15:19:50.599] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:50.905] <TB3> INFO: Expecting 2560 events.
[15:19:51.789] <TB3> INFO: 2560 events read in total (292ms).
[15:19:51.789] <TB3> INFO: Test took 1190ms.
[15:19:51.791] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:52.098] <TB3> INFO: Expecting 2560 events.
[15:19:52.981] <TB3> INFO: 2560 events read in total (292ms).
[15:19:52.981] <TB3> INFO: Test took 1190ms.
[15:19:52.983] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:53.289] <TB3> INFO: Expecting 2560 events.
[15:19:54.174] <TB3> INFO: 2560 events read in total (293ms).
[15:19:54.175] <TB3> INFO: Test took 1192ms.
[15:19:54.177] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:54.485] <TB3> INFO: Expecting 2560 events.
[15:19:55.370] <TB3> INFO: 2560 events read in total (293ms).
[15:19:55.370] <TB3> INFO: Test took 1193ms.
[15:19:55.372] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:55.678] <TB3> INFO: Expecting 2560 events.
[15:19:56.561] <TB3> INFO: 2560 events read in total (291ms).
[15:19:56.562] <TB3> INFO: Test took 1190ms.
[15:19:56.563] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:56.870] <TB3> INFO: Expecting 2560 events.
[15:19:57.752] <TB3> INFO: 2560 events read in total (290ms).
[15:19:57.752] <TB3> INFO: Test took 1189ms.
[15:19:57.754] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:19:58.060] <TB3> INFO: Expecting 2560 events.
[15:19:58.945] <TB3> INFO: 2560 events read in total (293ms).
[15:19:58.945] <TB3> INFO: Test took 1191ms.
[15:19:59.407] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 627 seconds
[15:19:59.407] <TB3> INFO: PH scale (per ROC): 50 45 35 28 58 48 45 32 41 42 27 41 34 42 33 47
[15:19:59.407] <TB3> INFO: PH offset (per ROC): 112 96 92 94 126 81 92 96 82 110 85 84 110 96 90 100
[15:19:59.412] <TB3> INFO: Decoding statistics:
[15:19:59.412] <TB3> INFO: General information:
[15:19:59.412] <TB3> INFO: 16bit words read: 127884
[15:19:59.412] <TB3> INFO: valid events total: 20480
[15:19:59.412] <TB3> INFO: empty events: 17978
[15:19:59.412] <TB3> INFO: valid events with pixels: 2502
[15:19:59.412] <TB3> INFO: valid pixel hits: 2502
[15:19:59.412] <TB3> INFO: Event errors: 0
[15:19:59.412] <TB3> INFO: start marker: 0
[15:19:59.412] <TB3> INFO: stop marker: 0
[15:19:59.412] <TB3> INFO: overflow: 0
[15:19:59.412] <TB3> INFO: invalid 5bit words: 0
[15:19:59.412] <TB3> INFO: invalid XOR eye diagram: 0
[15:19:59.412] <TB3> INFO: frame (failed synchr.): 0
[15:19:59.413] <TB3> INFO: idle data (no TBM trl): 0
[15:19:59.413] <TB3> INFO: no data (only TBM hdr): 0
[15:19:59.413] <TB3> INFO: TBM errors: 0
[15:19:59.413] <TB3> INFO: flawed TBM headers: 0
[15:19:59.413] <TB3> INFO: flawed TBM trailers: 0
[15:19:59.413] <TB3> INFO: event ID mismatches: 0
[15:19:59.413] <TB3> INFO: ROC errors: 0
[15:19:59.413] <TB3> INFO: missing ROC header(s): 0
[15:19:59.413] <TB3> INFO: misplaced readback start: 0
[15:19:59.413] <TB3> INFO: Pixel decoding errors: 0
[15:19:59.413] <TB3> INFO: pixel data incomplete: 0
[15:19:59.413] <TB3> INFO: pixel address: 0
[15:19:59.413] <TB3> INFO: pulse height fill bit: 0
[15:19:59.413] <TB3> INFO: buffer corruption: 0
[15:19:59.682] <TB3> INFO: ######################################################################
[15:19:59.683] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:19:59.683] <TB3> INFO: ######################################################################
[15:19:59.695] <TB3> INFO: scanning low vcal = 10
[15:19:59.927] <TB3> INFO: Expecting 41600 events.
[15:20:03.497] <TB3> INFO: 41600 events read in total (2978ms).
[15:20:03.498] <TB3> INFO: Test took 3802ms.
[15:20:03.499] <TB3> INFO: scanning low vcal = 20
[15:20:03.799] <TB3> INFO: Expecting 41600 events.
[15:20:07.372] <TB3> INFO: 41600 events read in total (2982ms).
[15:20:07.373] <TB3> INFO: Test took 3874ms.
[15:20:07.374] <TB3> INFO: scanning low vcal = 30
[15:20:07.671] <TB3> INFO: Expecting 41600 events.
[15:20:11.289] <TB3> INFO: 41600 events read in total (3027ms).
[15:20:11.290] <TB3> INFO: Test took 3915ms.
[15:20:11.293] <TB3> INFO: scanning low vcal = 40
[15:20:11.569] <TB3> INFO: Expecting 41600 events.
[15:20:15.491] <TB3> INFO: 41600 events read in total (3330ms).
[15:20:15.492] <TB3> INFO: Test took 4199ms.
[15:20:15.495] <TB3> INFO: scanning low vcal = 50
[15:20:15.772] <TB3> INFO: Expecting 41600 events.
[15:20:19.709] <TB3> INFO: 41600 events read in total (3346ms).
[15:20:19.710] <TB3> INFO: Test took 4215ms.
[15:20:19.715] <TB3> INFO: scanning low vcal = 60
[15:20:19.990] <TB3> INFO: Expecting 41600 events.
[15:20:23.911] <TB3> INFO: 41600 events read in total (3330ms).
[15:20:23.912] <TB3> INFO: Test took 4197ms.
[15:20:23.915] <TB3> INFO: scanning low vcal = 70
[15:20:24.192] <TB3> INFO: Expecting 41600 events.
[15:20:28.165] <TB3> INFO: 41600 events read in total (3382ms).
[15:20:28.165] <TB3> INFO: Test took 4251ms.
[15:20:28.168] <TB3> INFO: scanning low vcal = 80
[15:20:28.445] <TB3> INFO: Expecting 41600 events.
[15:20:32.374] <TB3> INFO: 41600 events read in total (3337ms).
[15:20:32.375] <TB3> INFO: Test took 4206ms.
[15:20:32.378] <TB3> INFO: scanning low vcal = 90
[15:20:32.655] <TB3> INFO: Expecting 41600 events.
[15:20:36.602] <TB3> INFO: 41600 events read in total (3356ms).
[15:20:36.603] <TB3> INFO: Test took 4225ms.
[15:20:36.607] <TB3> INFO: scanning low vcal = 100
[15:20:36.883] <TB3> INFO: Expecting 41600 events.
[15:20:40.829] <TB3> INFO: 41600 events read in total (3354ms).
[15:20:40.829] <TB3> INFO: Test took 4222ms.
[15:20:40.834] <TB3> INFO: scanning low vcal = 110
[15:20:41.109] <TB3> INFO: Expecting 41600 events.
[15:20:45.048] <TB3> INFO: 41600 events read in total (3348ms).
[15:20:45.049] <TB3> INFO: Test took 4215ms.
[15:20:45.052] <TB3> INFO: scanning low vcal = 120
[15:20:45.328] <TB3> INFO: Expecting 41600 events.
[15:20:49.290] <TB3> INFO: 41600 events read in total (3370ms).
[15:20:49.291] <TB3> INFO: Test took 4239ms.
[15:20:49.294] <TB3> INFO: scanning low vcal = 130
[15:20:49.570] <TB3> INFO: Expecting 41600 events.
[15:20:53.504] <TB3> INFO: 41600 events read in total (3342ms).
[15:20:53.505] <TB3> INFO: Test took 4211ms.
[15:20:53.508] <TB3> INFO: scanning low vcal = 140
[15:20:53.784] <TB3> INFO: Expecting 41600 events.
[15:20:57.703] <TB3> INFO: 41600 events read in total (3327ms).
[15:20:57.703] <TB3> INFO: Test took 4195ms.
[15:20:57.706] <TB3> INFO: scanning low vcal = 150
[15:20:57.983] <TB3> INFO: Expecting 41600 events.
[15:21:01.921] <TB3> INFO: 41600 events read in total (3346ms).
[15:21:01.922] <TB3> INFO: Test took 4216ms.
[15:21:01.924] <TB3> INFO: scanning low vcal = 160
[15:21:02.201] <TB3> INFO: Expecting 41600 events.
[15:21:06.139] <TB3> INFO: 41600 events read in total (3347ms).
[15:21:06.140] <TB3> INFO: Test took 4215ms.
[15:21:06.143] <TB3> INFO: scanning low vcal = 170
[15:21:06.420] <TB3> INFO: Expecting 41600 events.
[15:21:10.335] <TB3> INFO: 41600 events read in total (3324ms).
[15:21:10.336] <TB3> INFO: Test took 4193ms.
[15:21:10.339] <TB3> INFO: scanning low vcal = 180
[15:21:10.615] <TB3> INFO: Expecting 41600 events.
[15:21:14.528] <TB3> INFO: 41600 events read in total (3321ms).
[15:21:14.529] <TB3> INFO: Test took 4190ms.
[15:21:14.532] <TB3> INFO: scanning low vcal = 190
[15:21:14.809] <TB3> INFO: Expecting 41600 events.
[15:21:18.726] <TB3> INFO: 41600 events read in total (3326ms).
[15:21:18.727] <TB3> INFO: Test took 4194ms.
[15:21:18.730] <TB3> INFO: scanning low vcal = 200
[15:21:19.006] <TB3> INFO: Expecting 41600 events.
[15:21:22.950] <TB3> INFO: 41600 events read in total (3352ms).
[15:21:22.951] <TB3> INFO: Test took 4221ms.
[15:21:22.954] <TB3> INFO: scanning low vcal = 210
[15:21:23.230] <TB3> INFO: Expecting 41600 events.
[15:21:27.160] <TB3> INFO: 41600 events read in total (3338ms).
[15:21:27.162] <TB3> INFO: Test took 4208ms.
[15:21:27.165] <TB3> INFO: scanning low vcal = 220
[15:21:27.442] <TB3> INFO: Expecting 41600 events.
[15:21:31.394] <TB3> INFO: 41600 events read in total (3361ms).
[15:21:31.395] <TB3> INFO: Test took 4230ms.
[15:21:31.398] <TB3> INFO: scanning low vcal = 230
[15:21:31.675] <TB3> INFO: Expecting 41600 events.
[15:21:35.613] <TB3> INFO: 41600 events read in total (3347ms).
[15:21:35.614] <TB3> INFO: Test took 4216ms.
[15:21:35.617] <TB3> INFO: scanning low vcal = 240
[15:21:35.893] <TB3> INFO: Expecting 41600 events.
[15:21:39.818] <TB3> INFO: 41600 events read in total (3333ms).
[15:21:39.819] <TB3> INFO: Test took 4202ms.
[15:21:39.822] <TB3> INFO: scanning low vcal = 250
[15:21:40.098] <TB3> INFO: Expecting 41600 events.
[15:21:44.052] <TB3> INFO: 41600 events read in total (3362ms).
[15:21:44.053] <TB3> INFO: Test took 4231ms.
[15:21:44.057] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:21:44.332] <TB3> INFO: Expecting 41600 events.
[15:21:48.371] <TB3> INFO: 41600 events read in total (3447ms).
[15:21:48.372] <TB3> INFO: Test took 4315ms.
[15:21:48.375] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:21:48.652] <TB3> INFO: Expecting 41600 events.
[15:21:52.626] <TB3> INFO: 41600 events read in total (3383ms).
[15:21:52.627] <TB3> INFO: Test took 4252ms.
[15:21:52.630] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:21:52.906] <TB3> INFO: Expecting 41600 events.
[15:21:56.857] <TB3> INFO: 41600 events read in total (3359ms).
[15:21:56.858] <TB3> INFO: Test took 4228ms.
[15:21:56.861] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:21:57.138] <TB3> INFO: Expecting 41600 events.
[15:22:01.080] <TB3> INFO: 41600 events read in total (3351ms).
[15:22:01.081] <TB3> INFO: Test took 4220ms.
[15:22:01.084] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:22:01.361] <TB3> INFO: Expecting 41600 events.
[15:22:05.303] <TB3> INFO: 41600 events read in total (3350ms).
[15:22:05.304] <TB3> INFO: Test took 4219ms.
[15:22:05.761] <TB3> INFO: PixTestGainPedestal::measure() done
[15:22:46.994] <TB3> INFO: PixTestGainPedestal::fit() done
[15:22:46.994] <TB3> INFO: non-linearity mean: 0.976 0.962 0.955 0.959 0.982 0.962 0.952 0.932 0.926 0.973 0.978 0.927 0.932 0.951 0.924 0.977
[15:22:46.994] <TB3> INFO: non-linearity RMS: 0.010 0.050 0.144 0.167 0.004 0.060 0.066 0.100 0.081 0.034 0.173 0.113 0.125 0.044 0.170 0.007
[15:22:46.994] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[15:22:47.009] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[15:22:47.030] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[15:22:47.054] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[15:22:47.078] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[15:22:47.103] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[15:22:47.127] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[15:22:47.151] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[15:22:47.174] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[15:22:47.195] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[15:22:47.209] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[15:22:47.223] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[15:22:47.236] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[15:22:47.250] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[15:22:47.263] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[15:22:47.277] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[15:22:47.291] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[15:22:47.291] <TB3> INFO: Decoding statistics:
[15:22:47.291] <TB3> INFO: General information:
[15:22:47.291] <TB3> INFO: 16bit words read: 3190654
[15:22:47.291] <TB3> INFO: valid events total: 332800
[15:22:47.291] <TB3> INFO: empty events: 7605
[15:22:47.291] <TB3> INFO: valid events with pixels: 325195
[15:22:47.291] <TB3> INFO: valid pixel hits: 596927
[15:22:47.291] <TB3> INFO: Event errors: 0
[15:22:47.291] <TB3> INFO: start marker: 0
[15:22:47.291] <TB3> INFO: stop marker: 0
[15:22:47.291] <TB3> INFO: overflow: 0
[15:22:47.291] <TB3> INFO: invalid 5bit words: 0
[15:22:47.291] <TB3> INFO: invalid XOR eye diagram: 0
[15:22:47.291] <TB3> INFO: frame (failed synchr.): 0
[15:22:47.291] <TB3> INFO: idle data (no TBM trl): 0
[15:22:47.291] <TB3> INFO: no data (only TBM hdr): 0
[15:22:47.291] <TB3> INFO: TBM errors: 0
[15:22:47.291] <TB3> INFO: flawed TBM headers: 0
[15:22:47.291] <TB3> INFO: flawed TBM trailers: 0
[15:22:47.291] <TB3> INFO: event ID mismatches: 0
[15:22:47.291] <TB3> INFO: ROC errors: 0
[15:22:47.291] <TB3> INFO: missing ROC header(s): 0
[15:22:47.291] <TB3> INFO: misplaced readback start: 0
[15:22:47.291] <TB3> INFO: Pixel decoding errors: 0
[15:22:47.291] <TB3> INFO: pixel data incomplete: 0
[15:22:47.291] <TB3> INFO: pixel address: 0
[15:22:47.291] <TB3> INFO: pulse height fill bit: 0
[15:22:47.291] <TB3> INFO: buffer corruption: 0
[15:22:47.310] <TB3> INFO: Decoding statistics:
[15:22:47.310] <TB3> INFO: General information:
[15:22:47.310] <TB3> INFO: 16bit words read: 3320074
[15:22:47.310] <TB3> INFO: valid events total: 353536
[15:22:47.310] <TB3> INFO: empty events: 25839
[15:22:47.310] <TB3> INFO: valid events with pixels: 327697
[15:22:47.310] <TB3> INFO: valid pixel hits: 599429
[15:22:47.310] <TB3> INFO: Event errors: 0
[15:22:47.310] <TB3> INFO: start marker: 0
[15:22:47.310] <TB3> INFO: stop marker: 0
[15:22:47.310] <TB3> INFO: overflow: 0
[15:22:47.310] <TB3> INFO: invalid 5bit words: 0
[15:22:47.310] <TB3> INFO: invalid XOR eye diagram: 0
[15:22:47.310] <TB3> INFO: frame (failed synchr.): 0
[15:22:47.310] <TB3> INFO: idle data (no TBM trl): 0
[15:22:47.310] <TB3> INFO: no data (only TBM hdr): 0
[15:22:47.310] <TB3> INFO: TBM errors: 0
[15:22:47.310] <TB3> INFO: flawed TBM headers: 0
[15:22:47.310] <TB3> INFO: flawed TBM trailers: 0
[15:22:47.310] <TB3> INFO: event ID mismatches: 0
[15:22:47.310] <TB3> INFO: ROC errors: 0
[15:22:47.310] <TB3> INFO: missing ROC header(s): 0
[15:22:47.310] <TB3> INFO: misplaced readback start: 0
[15:22:47.310] <TB3> INFO: Pixel decoding errors: 0
[15:22:47.310] <TB3> INFO: pixel data incomplete: 0
[15:22:47.310] <TB3> INFO: pixel address: 0
[15:22:47.310] <TB3> INFO: pulse height fill bit: 0
[15:22:47.310] <TB3> INFO: buffer corruption: 0
[15:22:47.311] <TB3> INFO: enter test to run
[15:22:47.311] <TB3> INFO: test: Trim80 no parameter change
[15:22:47.311] <TB3> INFO: running: trim80
[15:22:47.333] <TB3> INFO: ######################################################################
[15:22:47.333] <TB3> INFO: PixTestTrim80::doTest()
[15:22:47.333] <TB3> INFO: ######################################################################
[15:22:47.335] <TB3> INFO: ----------------------------------------------------------------------
[15:22:47.335] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[15:22:47.335] <TB3> INFO: ----------------------------------------------------------------------
[15:22:47.375] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:22:47.375] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:22:47.383] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:22:47.383] <TB3> INFO: run 1 of 1
[15:22:47.617] <TB3> INFO: Expecting 5025280 events.
[15:23:15.222] <TB3> INFO: 686824 events read in total (27013ms).
[15:23:42.287] <TB3> INFO: 1369848 events read in total (54078ms).
[15:24:09.382] <TB3> INFO: 2052056 events read in total (81173ms).
[15:24:36.456] <TB3> INFO: 2731280 events read in total (108247ms).
[15:25:03.233] <TB3> INFO: 3409360 events read in total (135024ms).
[15:25:30.430] <TB3> INFO: 4085232 events read in total (162221ms).
[15:25:57.603] <TB3> INFO: 4760224 events read in total (189394ms).
[15:26:08.192] <TB3> INFO: 5025280 events read in total (199983ms).
[15:26:08.278] <TB3> INFO: Test took 200895ms.
[15:26:31.519] <TB3> INFO: ROC 0 VthrComp = 87
[15:26:31.519] <TB3> INFO: ROC 1 VthrComp = 69
[15:26:31.519] <TB3> INFO: ROC 2 VthrComp = 74
[15:26:31.519] <TB3> INFO: ROC 3 VthrComp = 70
[15:26:31.519] <TB3> INFO: ROC 4 VthrComp = 75
[15:26:31.520] <TB3> INFO: ROC 5 VthrComp = 76
[15:26:31.520] <TB3> INFO: ROC 6 VthrComp = 73
[15:26:31.521] <TB3> INFO: ROC 7 VthrComp = 79
[15:26:31.521] <TB3> INFO: ROC 8 VthrComp = 82
[15:26:31.521] <TB3> INFO: ROC 9 VthrComp = 74
[15:26:31.521] <TB3> INFO: ROC 10 VthrComp = 79
[15:26:31.521] <TB3> INFO: ROC 11 VthrComp = 80
[15:26:31.521] <TB3> INFO: ROC 12 VthrComp = 78
[15:26:31.521] <TB3> INFO: ROC 13 VthrComp = 74
[15:26:31.522] <TB3> INFO: ROC 14 VthrComp = 90
[15:26:31.522] <TB3> INFO: ROC 15 VthrComp = 64
[15:26:31.774] <TB3> INFO: Expecting 41600 events.
[15:26:35.258] <TB3> INFO: 41600 events read in total (2892ms).
[15:26:35.259] <TB3> INFO: Test took 3736ms.
[15:26:35.267] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:26:35.268] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:26:35.277] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:26:35.277] <TB3> INFO: run 1 of 1
[15:26:35.555] <TB3> INFO: Expecting 5025280 events.
[15:27:03.383] <TB3> INFO: 690472 events read in total (27237ms).
[15:27:30.844] <TB3> INFO: 1374664 events read in total (54698ms).
[15:27:57.827] <TB3> INFO: 2057472 events read in total (81681ms).
[15:28:25.029] <TB3> INFO: 2737144 events read in total (108883ms).
[15:28:52.131] <TB3> INFO: 3414024 events read in total (135985ms).
[15:29:19.590] <TB3> INFO: 4087832 events read in total (163444ms).
[15:29:47.118] <TB3> INFO: 4760184 events read in total (190972ms).
[15:29:57.601] <TB3> INFO: 5025280 events read in total (201455ms).
[15:29:57.656] <TB3> INFO: Test took 202379ms.
[15:30:20.178] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 108.259 for pixel 51/21 mean/min/max = 91.5691/74.7345/108.404
[15:30:20.179] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 108.342 for pixel 1/79 mean/min/max = 91.5875/74.5252/108.65
[15:30:20.179] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 116.477 for pixel 15/10 mean/min/max = 96.9698/76.9061/117.033
[15:30:20.179] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 114.883 for pixel 0/21 mean/min/max = 93.2764/71.6274/114.925
[15:30:20.180] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 109.34 for pixel 4/71 mean/min/max = 93.6598/77.9585/109.361
[15:30:20.180] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 111.523 for pixel 0/3 mean/min/max = 94.9168/78.2844/111.549
[15:30:20.181] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 112.544 for pixel 23/79 mean/min/max = 95.1201/77.2432/112.997
[15:30:20.181] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 112.208 for pixel 0/8 mean/min/max = 94.9765/77.0071/112.946
[15:30:20.181] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 109.202 for pixel 30/65 mean/min/max = 91.8628/74.4899/109.236
[15:30:20.182] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 116.415 for pixel 0/9 mean/min/max = 96.7717/76.787/116.756
[15:30:20.182] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 116.215 for pixel 0/10 mean/min/max = 96.4016/76.3717/116.431
[15:30:20.183] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 113.239 for pixel 0/0 mean/min/max = 94.0638/74.4577/113.67
[15:30:20.183] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 112.367 for pixel 0/40 mean/min/max = 94.8937/77.3139/112.474
[15:30:20.183] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 113.201 for pixel 14/15 mean/min/max = 95.3842/77.337/113.431
[15:30:20.184] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 109.521 for pixel 0/48 mean/min/max = 92.4902/75.4282/109.552
[15:30:20.184] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 110.912 for pixel 51/1 mean/min/max = 93.1045/75.0124/111.197
[15:30:20.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:30:20.273] <TB3> INFO: Expecting 411648 events.
[15:30:29.769] <TB3> INFO: 411648 events read in total (8905ms).
[15:30:29.783] <TB3> INFO: Expecting 411648 events.
[15:30:38.948] <TB3> INFO: 411648 events read in total (8762ms).
[15:30:38.959] <TB3> INFO: Expecting 411648 events.
[15:30:48.258] <TB3> INFO: 411648 events read in total (8896ms).
[15:30:48.270] <TB3> INFO: Expecting 411648 events.
[15:30:57.348] <TB3> INFO: 411648 events read in total (8675ms).
[15:30:57.362] <TB3> INFO: Expecting 411648 events.
[15:31:06.489] <TB3> INFO: 411648 events read in total (8724ms).
[15:31:06.507] <TB3> INFO: Expecting 411648 events.
[15:31:15.589] <TB3> INFO: 411648 events read in total (8679ms).
[15:31:15.608] <TB3> INFO: Expecting 411648 events.
[15:31:24.654] <TB3> INFO: 411648 events read in total (8643ms).
[15:31:24.677] <TB3> INFO: Expecting 411648 events.
[15:31:33.696] <TB3> INFO: 411648 events read in total (8616ms).
[15:31:33.721] <TB3> INFO: Expecting 411648 events.
[15:31:42.805] <TB3> INFO: 411648 events read in total (8681ms).
[15:31:42.836] <TB3> INFO: Expecting 411648 events.
[15:31:51.914] <TB3> INFO: 411648 events read in total (8675ms).
[15:31:51.965] <TB3> INFO: Expecting 411648 events.
[15:32:01.057] <TB3> INFO: 411648 events read in total (8689ms).
[15:32:01.126] <TB3> INFO: Expecting 411648 events.
[15:32:10.256] <TB3> INFO: 411648 events read in total (8727ms).
[15:32:10.316] <TB3> INFO: Expecting 411648 events.
[15:32:19.386] <TB3> INFO: 411648 events read in total (8667ms).
[15:32:19.454] <TB3> INFO: Expecting 411648 events.
[15:32:28.544] <TB3> INFO: 411648 events read in total (8688ms).
[15:32:28.615] <TB3> INFO: Expecting 411648 events.
[15:32:37.782] <TB3> INFO: 411648 events read in total (8764ms).
[15:32:37.860] <TB3> INFO: Expecting 411648 events.
[15:32:46.987] <TB3> INFO: 411648 events read in total (8724ms).
[15:32:47.071] <TB3> INFO: Test took 146887ms.
[15:32:48.743] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[15:32:48.753] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:32:48.754] <TB3> INFO: run 1 of 1
[15:32:49.014] <TB3> INFO: Expecting 5025280 events.
[15:33:16.340] <TB3> INFO: 666008 events read in total (26734ms).
[15:33:42.984] <TB3> INFO: 1329440 events read in total (53378ms).
[15:34:10.385] <TB3> INFO: 1992624 events read in total (80779ms).
[15:34:37.274] <TB3> INFO: 2652808 events read in total (107668ms).
[15:35:04.083] <TB3> INFO: 3308440 events read in total (134477ms).
[15:35:30.785] <TB3> INFO: 3962016 events read in total (161179ms).
[15:35:57.675] <TB3> INFO: 4614720 events read in total (188069ms).
[15:36:14.387] <TB3> INFO: 5025280 events read in total (204781ms).
[15:36:14.454] <TB3> INFO: Test took 205700ms.
[15:36:37.932] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 50.310519 .. 105.325968
[15:36:38.167] <TB3> INFO: Expecting 208000 events.
[15:36:48.070] <TB3> INFO: 208000 events read in total (9313ms).
[15:36:48.071] <TB3> INFO: Test took 10138ms.
[15:36:48.138] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 40 .. 115 (-1/-1) hits flags = 528 (plus default)
[15:36:48.150] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:36:48.150] <TB3> INFO: run 1 of 1
[15:36:48.428] <TB3> INFO: Expecting 2529280 events.
[15:37:16.222] <TB3> INFO: 683184 events read in total (27203ms).
[15:37:43.962] <TB3> INFO: 1364608 events read in total (54944ms).
[15:38:11.690] <TB3> INFO: 2039568 events read in total (82671ms).
[15:38:31.330] <TB3> INFO: 2529280 events read in total (102311ms).
[15:38:31.378] <TB3> INFO: Test took 103228ms.
[15:38:48.698] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 60.988651 .. 94.721397
[15:38:48.930] <TB3> INFO: Expecting 208000 events.
[15:38:59.052] <TB3> INFO: 208000 events read in total (9530ms).
[15:38:59.053] <TB3> INFO: Test took 10354ms.
[15:38:59.122] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 50 .. 104 (-1/-1) hits flags = 528 (plus default)
[15:38:59.134] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:38:59.134] <TB3> INFO: run 1 of 1
[15:38:59.412] <TB3> INFO: Expecting 1830400 events.
[15:39:27.345] <TB3> INFO: 687144 events read in total (27342ms).
[15:39:54.464] <TB3> INFO: 1373288 events read in total (54461ms).
[15:40:12.893] <TB3> INFO: 1830400 events read in total (72890ms).
[15:40:12.923] <TB3> INFO: Test took 73790ms.
[15:40:30.488] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 65.722720 .. 88.011447
[15:40:30.722] <TB3> INFO: Expecting 208000 events.
[15:40:40.646] <TB3> INFO: 208000 events read in total (9333ms).
[15:40:40.646] <TB3> INFO: Test took 10157ms.
[15:40:40.706] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 55 .. 98 (-1/-1) hits flags = 528 (plus default)
[15:40:40.718] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:40:40.718] <TB3> INFO: run 1 of 1
[15:40:40.996] <TB3> INFO: Expecting 1464320 events.
[15:41:09.605] <TB3> INFO: 696864 events read in total (28018ms).
[15:41:37.836] <TB3> INFO: 1392456 events read in total (56249ms).
[15:41:41.255] <TB3> INFO: 1464320 events read in total (59668ms).
[15:41:41.277] <TB3> INFO: Test took 60559ms.
[15:41:58.543] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 67.943479 .. 87.564992
[15:41:58.777] <TB3> INFO: Expecting 208000 events.
[15:42:08.460] <TB3> INFO: 208000 events read in total (9091ms).
[15:42:08.461] <TB3> INFO: Test took 9917ms.
[15:42:08.507] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 57 .. 97 (-1/-1) hits flags = 528 (plus default)
[15:42:08.519] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:42:08.520] <TB3> INFO: run 1 of 1
[15:42:08.797] <TB3> INFO: Expecting 1364480 events.
[15:42:37.173] <TB3> INFO: 695912 events read in total (27784ms).
[15:43:04.338] <TB3> INFO: 1364480 events read in total (54949ms).
[15:43:04.365] <TB3> INFO: Test took 55846ms.
[15:43:24.155] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[15:43:24.155] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[15:43:24.167] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:43:24.167] <TB3> INFO: run 1 of 1
[15:43:24.488] <TB3> INFO: Expecting 1364480 events.
[15:43:52.655] <TB3> INFO: 668648 events read in total (27576ms).
[15:44:19.731] <TB3> INFO: 1336472 events read in total (54652ms).
[15:44:21.425] <TB3> INFO: 1364480 events read in total (56346ms).
[15:44:21.454] <TB3> INFO: Test took 57288ms.
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C0.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C1.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C2.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C3.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C4.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C5.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C6.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C7.dat
[15:44:39.700] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C8.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C9.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C10.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C11.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C12.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C13.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C14.dat
[15:44:39.701] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//dacParameters80_C15.dat
[15:44:39.701] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C0.dat
[15:44:39.709] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C1.dat
[15:44:39.714] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C2.dat
[15:44:39.720] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C3.dat
[15:44:39.726] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C4.dat
[15:44:39.731] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C5.dat
[15:44:39.738] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C6.dat
[15:44:39.745] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C7.dat
[15:44:39.752] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C8.dat
[15:44:39.760] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C9.dat
[15:44:39.768] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C10.dat
[15:44:39.775] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C11.dat
[15:44:39.783] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C12.dat
[15:44:39.788] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C13.dat
[15:44:39.794] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C14.dat
[15:44:39.799] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1135_FullQualification_2016-11-07_11h20m_1478514052//003_FulltestTrim80_p17//trimParameters80_C15.dat
[15:44:39.805] <TB3> INFO: PixTestTrim80::trimTest() done
[15:44:39.805] <TB3> INFO: vtrim: 98 104 121 99 105 104 114 103 115 111 115 102 115 119 105 98
[15:44:39.805] <TB3> INFO: vthrcomp: 87 69 74 70 75 76 73 79 82 74 79 80 78 74 90 64
[15:44:39.805] <TB3> INFO: vcal mean: 79.97 79.92 79.96 79.95 80.00 79.94 79.94 80.00 79.90 79.97 79.94 79.94 79.99 79.91 79.96 79.92
[15:44:39.805] <TB3> INFO: vcal RMS: 0.79 0.78 1.55 0.86 0.77 0.75 0.86 0.82 1.51 0.85 0.91 0.87 0.82 1.50 0.83 0.80
[15:44:39.805] <TB3> INFO: bits mean: 10.11 9.93 9.78 10.04 9.80 9.37 10.03 9.84 10.73 9.62 9.71 9.94 9.93 9.83 9.88 10.16
[15:44:39.805] <TB3> INFO: bits RMS: 2.42 2.54 2.14 2.62 2.11 2.15 2.02 2.15 2.09 2.22 2.23 2.41 2.04 2.12 2.37 2.26
[15:44:39.811] <TB3> INFO: ----------------------------------------------------------------------
[15:44:39.811] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:44:39.811] <TB3> INFO: ----------------------------------------------------------------------
[15:44:39.814] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:44:39.822] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:44:39.822] <TB3> INFO: run 1 of 1
[15:44:40.054] <TB3> INFO: Expecting 4160000 events.
[15:45:12.905] <TB3> INFO: 791710 events read in total (32259ms).
[15:45:45.258] <TB3> INFO: 1575405 events read in total (64612ms).
[15:46:17.342] <TB3> INFO: 2352395 events read in total (96696ms).
[15:46:49.288] <TB3> INFO: 3119505 events read in total (128642ms).
[15:47:21.336] <TB3> INFO: 3883530 events read in total (160690ms).
[15:47:33.140] <TB3> INFO: 4160000 events read in total (172494ms).
[15:47:33.187] <TB3> INFO: Test took 173365ms.
[15:48:00.035] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[15:48:00.046] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:48:00.046] <TB3> INFO: run 1 of 1
[15:48:00.278] <TB3> INFO: Expecting 5324800 events.
[15:48:31.234] <TB3> INFO: 695110 events read in total (30365ms).
[15:49:01.322] <TB3> INFO: 1385800 events read in total (60453ms).
[15:49:31.522] <TB3> INFO: 2076080 events read in total (90654ms).
[15:50:01.533] <TB3> INFO: 2763760 events read in total (120664ms).
[15:50:31.595] <TB3> INFO: 3446605 events read in total (150726ms).
[15:51:01.339] <TB3> INFO: 4127950 events read in total (180470ms).
[15:51:31.175] <TB3> INFO: 4807640 events read in total (210306ms).
[15:51:54.087] <TB3> INFO: 5324800 events read in total (233218ms).
[15:51:54.172] <TB3> INFO: Test took 234126ms.
[15:52:28.481] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[15:52:28.491] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:52:28.492] <TB3> INFO: run 1 of 1
[15:52:28.724] <TB3> INFO: Expecting 4617600 events.
[15:52:59.790] <TB3> INFO: 729565 events read in total (30474ms).
[15:53:30.379] <TB3> INFO: 1453425 events read in total (61063ms).
[15:54:01.280] <TB3> INFO: 2174730 events read in total (91964ms).
[15:54:31.864] <TB3> INFO: 2890980 events read in total (122548ms).
[15:55:02.194] <TB3> INFO: 3603460 events read in total (152878ms).
[15:55:32.448] <TB3> INFO: 4314325 events read in total (183132ms).
[15:55:45.852] <TB3> INFO: 4617600 events read in total (196536ms).
[15:55:45.929] <TB3> INFO: Test took 197437ms.
[15:56:15.636] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 220 (-1/-1) hits flags = 528 (plus default)
[15:56:15.645] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:56:15.646] <TB3> INFO: run 1 of 1
[15:56:15.877] <TB3> INFO: Expecting 4596800 events.
[15:56:47.720] <TB3> INFO: 730960 events read in total (31252ms).
[15:57:18.667] <TB3> INFO: 1456245 events read in total (62199ms).
[15:57:49.453] <TB3> INFO: 2179015 events read in total (92985ms).
[15:58:20.387] <TB3> INFO: 2896360 events read in total (123919ms).
[15:58:51.267] <TB3> INFO: 3610325 events read in total (154799ms).
[15:59:22.111] <TB3> INFO: 4322670 events read in total (185643ms).
[15:59:33.988] <TB3> INFO: 4596800 events read in total (197520ms).
[15:59:34.049] <TB3> INFO: Test took 198403ms.
[16:00:05.865] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[16:00:05.876] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:00:05.876] <TB3> INFO: run 1 of 1
[16:00:06.149] <TB3> INFO: Expecting 4617600 events.
[16:00:37.899] <TB3> INFO: 730225 events read in total (31158ms).
[16:01:08.756] <TB3> INFO: 1454570 events read in total (62015ms).
[16:01:39.348] <TB3> INFO: 2176540 events read in total (92607ms).
[16:02:10.181] <TB3> INFO: 2893385 events read in total (123440ms).
[16:02:41.883] <TB3> INFO: 3606500 events read in total (155142ms).
[16:03:13.458] <TB3> INFO: 4317970 events read in total (186717ms).
[16:03:26.587] <TB3> INFO: 4617600 events read in total (199846ms).
[16:03:26.668] <TB3> INFO: Test took 200792ms.
[16:03:52.348] <TB3> INFO: PixTestTrim80::trimBitTest() done
[16:03:52.349] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2465 seconds
[16:03:52.990] <TB3> INFO: enter test to run
[16:03:52.990] <TB3> INFO: test: exit no parameter change
[16:03:53.090] <TB3> QUIET: Connection to board 170 closed.
[16:03:53.091] <TB3> INFO: pXar: this is the end, my friend