[14:19:36.638] <TB0> INFO: *** Welcome to pxar ***
[14:19:36.638] <TB0> INFO: *** Today: 2016/11/07
[14:19:36.651] <TB0> INFO: *** Version: c8ba-dirty
[14:19:36.651] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C15.dat
[14:19:36.652] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C1b.dat
[14:19:36.652] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//defaultMaskFile.dat
[14:19:36.652] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters_C15.dat
[14:19:36.712] <TB0> INFO: clk: 4
[14:19:36.712] <TB0> INFO: ctr: 4
[14:19:36.712] <TB0> INFO: sda: 19
[14:19:36.712] <TB0> INFO: tin: 9
[14:19:36.712] <TB0> INFO: level: 15
[14:19:36.712] <TB0> INFO: triggerdelay: 0
[14:19:36.712] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[14:19:36.712] <TB0> INFO: Log level: INFO
[14:19:36.721] <TB0> INFO: Found DTB DTB_WRQ4OZ
[14:19:36.731] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[14:19:36.733] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[14:19:36.735] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[14:19:38.224] <TB0> INFO: DUT info:
[14:19:38.224] <TB0> INFO: The DUT currently contains the following objects:
[14:19:38.224] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[14:19:38.224] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:19:38.224] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:19:38.224] <TB0> INFO: TBM Core alpha (2): 7 registers set
[14:19:38.225] <TB0> INFO: TBM Core beta (3): 7 registers set
[14:19:38.225] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[14:19:38.225] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.225] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:19:38.626] <TB0> INFO: enter 'restricted' command line mode
[14:19:38.626] <TB0> INFO: enter test to run
[14:19:38.626] <TB0> INFO: test: pretest no parameter change
[14:19:38.626] <TB0> INFO: running: pretest
[14:19:38.630] <TB0> INFO: ######################################################################
[14:19:38.630] <TB0> INFO: PixTestPretest::doTest()
[14:19:38.630] <TB0> INFO: ######################################################################
[14:19:38.632] <TB0> INFO: ----------------------------------------------------------------------
[14:19:38.632] <TB0> INFO: PixTestPretest::programROC()
[14:19:38.632] <TB0> INFO: ----------------------------------------------------------------------
[14:19:56.646] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:19:56.646] <TB0> INFO: IA differences per ROC: 18.5 21.7 20.1 21.7 20.1 19.3 18.5 19.3 16.9 16.9 18.5 18.5 18.5 16.1 20.1 18.5
[14:19:56.704] <TB0> INFO: ----------------------------------------------------------------------
[14:19:56.704] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:19:56.704] <TB0> INFO: ----------------------------------------------------------------------
[14:20:04.188] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[14:20:04.188] <TB0> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 20.1 20.1 19.3 19.3 20.1 19.3 19.3 20.1 20.1 19.3 19.3 19.3
[14:20:04.220] <TB0> INFO: ----------------------------------------------------------------------
[14:20:04.220] <TB0> INFO: PixTestPretest::findTiming()
[14:20:04.220] <TB0> INFO: ----------------------------------------------------------------------
[14:20:04.220] <TB0> INFO: PixTestCmd::init()

[14:20:36.594] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[14:20:36.594] <TB0> INFO: (success/tries = 100/100), width = 3
[14:20:38.101] <TB0> INFO: ----------------------------------------------------------------------
[14:20:38.101] <TB0> INFO: PixTestPretest::findWorkingPixel()
[14:20:38.101] <TB0> INFO: ----------------------------------------------------------------------
[14:20:38.196] <TB0> INFO: Expecting 231680 events.
[14:20:48.271] <TB0> INFO: 231680 events read in total (9483ms).
[14:20:48.279] <TB0> INFO: Test took 10173ms.
[14:20:48.533] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:20:48.572] <TB0> INFO: ----------------------------------------------------------------------
[14:20:48.572] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[14:20:48.572] <TB0> INFO: ----------------------------------------------------------------------
[14:20:48.667] <TB0> INFO: Expecting 231680 events.
[14:20:58.722] <TB0> INFO: 231680 events read in total (9463ms).
[14:20:58.733] <TB0> INFO: Test took 10156ms.
[14:20:58.001] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[14:20:58.002] <TB0> INFO: CalDel: 105 99 88 108 99 111 107 106 84 103 85 111 99 112 109 101
[14:20:58.002] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 54 51 51 51 51 51 51 51
[14:20:59.005] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C0.dat
[14:20:59.005] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C1.dat
[14:20:59.006] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C2.dat
[14:20:59.006] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C3.dat
[14:20:59.006] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C4.dat
[14:20:59.006] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C5.dat
[14:20:59.007] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C6.dat
[14:20:59.007] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C7.dat
[14:20:59.007] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C8.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C9.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C10.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C11.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C12.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C13.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C14.dat
[14:20:59.008] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters_C15.dat
[14:20:59.009] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C0a.dat
[14:20:59.009] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C0b.dat
[14:20:59.009] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C1a.dat
[14:20:59.009] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//tbmParameters_C1b.dat
[14:20:59.009] <TB0> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[14:20:59.068] <TB0> INFO: enter test to run
[14:20:59.068] <TB0> INFO: test: FullTest no parameter change
[14:20:59.068] <TB0> INFO: running: fulltest
[14:20:59.068] <TB0> INFO: ######################################################################
[14:20:59.068] <TB0> INFO: PixTestFullTest::doTest()
[14:20:59.068] <TB0> INFO: ######################################################################
[14:20:59.069] <TB0> INFO: ######################################################################
[14:20:59.069] <TB0> INFO: PixTestAlive::doTest()
[14:20:59.069] <TB0> INFO: ######################################################################
[14:20:59.070] <TB0> INFO: ----------------------------------------------------------------------
[14:20:59.070] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:20:59.070] <TB0> INFO: ----------------------------------------------------------------------
[14:20:59.314] <TB0> INFO: Expecting 41600 events.
[14:21:02.808] <TB0> INFO: 41600 events read in total (2902ms).
[14:21:02.809] <TB0> INFO: Test took 3737ms.
[14:21:03.043] <TB0> INFO: PixTestAlive::aliveTest() done
[14:21:03.043] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:21:03.044] <TB0> INFO: ----------------------------------------------------------------------
[14:21:03.045] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:21:03.045] <TB0> INFO: ----------------------------------------------------------------------
[14:21:03.288] <TB0> INFO: Expecting 41600 events.
[14:21:06.298] <TB0> INFO: 41600 events read in total (2418ms).
[14:21:06.298] <TB0> INFO: Test took 3252ms.
[14:21:06.299] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:21:06.539] <TB0> INFO: PixTestAlive::maskTest() done
[14:21:06.539] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:21:06.541] <TB0> INFO: ----------------------------------------------------------------------
[14:21:06.541] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:21:06.541] <TB0> INFO: ----------------------------------------------------------------------
[14:21:06.785] <TB0> INFO: Expecting 41600 events.
[14:21:10.271] <TB0> INFO: 41600 events read in total (2894ms).
[14:21:10.272] <TB0> INFO: Test took 3729ms.
[14:21:10.500] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[14:21:10.501] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:21:10.501] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:21:10.501] <TB0> INFO: Decoding statistics:
[14:21:10.501] <TB0> INFO: General information:
[14:21:10.501] <TB0> INFO: 16bit words read: 0
[14:21:10.501] <TB0> INFO: valid events total: 0
[14:21:10.501] <TB0> INFO: empty events: 0
[14:21:10.501] <TB0> INFO: valid events with pixels: 0
[14:21:10.501] <TB0> INFO: valid pixel hits: 0
[14:21:10.501] <TB0> INFO: Event errors: 0
[14:21:10.501] <TB0> INFO: start marker: 0
[14:21:10.501] <TB0> INFO: stop marker: 0
[14:21:10.501] <TB0> INFO: overflow: 0
[14:21:10.501] <TB0> INFO: invalid 5bit words: 0
[14:21:10.501] <TB0> INFO: invalid XOR eye diagram: 0
[14:21:10.501] <TB0> INFO: frame (failed synchr.): 0
[14:21:10.501] <TB0> INFO: idle data (no TBM trl): 0
[14:21:10.501] <TB0> INFO: no data (only TBM hdr): 0
[14:21:10.501] <TB0> INFO: TBM errors: 0
[14:21:10.501] <TB0> INFO: flawed TBM headers: 0
[14:21:10.501] <TB0> INFO: flawed TBM trailers: 0
[14:21:10.501] <TB0> INFO: event ID mismatches: 0
[14:21:10.501] <TB0> INFO: ROC errors: 0
[14:21:10.501] <TB0> INFO: missing ROC header(s): 0
[14:21:10.501] <TB0> INFO: misplaced readback start: 0
[14:21:10.501] <TB0> INFO: Pixel decoding errors: 0
[14:21:10.501] <TB0> INFO: pixel data incomplete: 0
[14:21:10.501] <TB0> INFO: pixel address: 0
[14:21:10.501] <TB0> INFO: pulse height fill bit: 0
[14:21:10.501] <TB0> INFO: buffer corruption: 0
[14:21:10.505] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C15.dat
[14:21:10.506] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[14:21:10.506] <TB0> INFO: ######################################################################
[14:21:10.506] <TB0> INFO: PixTestReadback::doTest()
[14:21:10.506] <TB0> INFO: ######################################################################
[14:21:10.506] <TB0> INFO: ----------------------------------------------------------------------
[14:21:10.506] <TB0> INFO: PixTestReadback::CalibrateVd()
[14:21:10.506] <TB0> INFO: ----------------------------------------------------------------------
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C0.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C1.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C2.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C3.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C4.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C5.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C6.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C7.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C8.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C9.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C10.dat
[14:21:20.501] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C11.dat
[14:21:20.502] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C12.dat
[14:21:20.502] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C13.dat
[14:21:20.502] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C14.dat
[14:21:20.502] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C15.dat
[14:21:20.529] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:21:20.529] <TB0> INFO: ----------------------------------------------------------------------
[14:21:20.529] <TB0> INFO: PixTestReadback::CalibrateVa()
[14:21:20.529] <TB0> INFO: ----------------------------------------------------------------------
[14:21:30.459] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C0.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C1.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C2.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C3.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C4.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C5.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C6.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C7.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C8.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C9.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C10.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C11.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C12.dat
[14:21:30.460] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C13.dat
[14:21:30.461] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C14.dat
[14:21:30.461] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C15.dat
[14:21:30.489] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:21:30.489] <TB0> INFO: ----------------------------------------------------------------------
[14:21:30.489] <TB0> INFO: PixTestReadback::readbackVbg()
[14:21:30.489] <TB0> INFO: ----------------------------------------------------------------------
[14:21:38.152] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:21:38.152] <TB0> INFO: ----------------------------------------------------------------------
[14:21:38.152] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[14:21:38.152] <TB0> INFO: ----------------------------------------------------------------------
[14:21:38.152] <TB0> INFO: Vbg will be calibrated using Vd calibration
[14:21:38.152] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154calibrated Vbg = 1.17122 :::*/*/*/*/
[14:21:38.152] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.6calibrated Vbg = 1.17302 :::*/*/*/*/
[14:21:38.152] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.8calibrated Vbg = 1.16609 :::*/*/*/*/
[14:21:38.152] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.2calibrated Vbg = 1.16875 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.7calibrated Vbg = 1.17075 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 161.2calibrated Vbg = 1.17302 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162calibrated Vbg = 1.17308 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159.1calibrated Vbg = 1.17355 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.8calibrated Vbg = 1.16309 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 159.2calibrated Vbg = 1.16615 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.8calibrated Vbg = 1.15928 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.3calibrated Vbg = 1.15819 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 157.3calibrated Vbg = 1.16487 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.4calibrated Vbg = 1.16728 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.9calibrated Vbg = 1.16786 :::*/*/*/*/
[14:21:38.153] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.9calibrated Vbg = 1.16664 :::*/*/*/*/
[14:21:38.156] <TB0> INFO: ----------------------------------------------------------------------
[14:21:38.156] <TB0> INFO: PixTestReadback::CalibrateIa()
[14:21:38.156] <TB0> INFO: ----------------------------------------------------------------------
[14:24:19.010] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C0.dat
[14:24:19.010] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C1.dat
[14:24:19.010] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C2.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C3.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C4.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C5.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C6.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C7.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C8.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C9.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C10.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C11.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C12.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C13.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C14.dat
[14:24:19.011] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//readbackCal_C15.dat
[14:24:19.041] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:24:19.044] <TB0> INFO: PixTestReadback::doTest() done
[14:24:19.044] <TB0> INFO: Decoding statistics:
[14:24:19.044] <TB0> INFO: General information:
[14:24:19.044] <TB0> INFO: 16bit words read: 1536
[14:24:19.044] <TB0> INFO: valid events total: 256
[14:24:19.044] <TB0> INFO: empty events: 256
[14:24:19.044] <TB0> INFO: valid events with pixels: 0
[14:24:19.044] <TB0> INFO: valid pixel hits: 0
[14:24:19.044] <TB0> INFO: Event errors: 0
[14:24:19.044] <TB0> INFO: start marker: 0
[14:24:19.044] <TB0> INFO: stop marker: 0
[14:24:19.044] <TB0> INFO: overflow: 0
[14:24:19.044] <TB0> INFO: invalid 5bit words: 0
[14:24:19.044] <TB0> INFO: invalid XOR eye diagram: 0
[14:24:19.044] <TB0> INFO: frame (failed synchr.): 0
[14:24:19.044] <TB0> INFO: idle data (no TBM trl): 0
[14:24:19.044] <TB0> INFO: no data (only TBM hdr): 0
[14:24:19.044] <TB0> INFO: TBM errors: 0
[14:24:19.044] <TB0> INFO: flawed TBM headers: 0
[14:24:19.044] <TB0> INFO: flawed TBM trailers: 0
[14:24:19.044] <TB0> INFO: event ID mismatches: 0
[14:24:19.044] <TB0> INFO: ROC errors: 0
[14:24:19.045] <TB0> INFO: missing ROC header(s): 0
[14:24:19.045] <TB0> INFO: misplaced readback start: 0
[14:24:19.045] <TB0> INFO: Pixel decoding errors: 0
[14:24:19.045] <TB0> INFO: pixel data incomplete: 0
[14:24:19.045] <TB0> INFO: pixel address: 0
[14:24:19.045] <TB0> INFO: pulse height fill bit: 0
[14:24:19.045] <TB0> INFO: buffer corruption: 0
[14:24:19.114] <TB0> INFO: ######################################################################
[14:24:19.114] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:24:19.114] <TB0> INFO: ######################################################################
[14:24:19.116] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:24:19.138] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[14:24:19.138] <TB0> INFO: run 1 of 1
[14:24:19.381] <TB0> INFO: Expecting 3120000 events.
[14:24:51.287] <TB0> INFO: 651675 events read in total (31314ms).











[14:25:21.355] <TB0> INFO: 1299720 events read in total (61382ms).











[14:25:51.351] <TB0> INFO: 1943675 events read in total (91378ms).











[14:26:21.011] <TB0> INFO: 2587335 events read in total (121038ms).











[14:26:45.834] <TB0> INFO: 3120000 events read in total (145861ms).
[14:26:45.967] <TB0> INFO: Test took 146830ms.
[14:27:10.297] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 171 seconds
[14:27:10.297] <TB0> INFO: number of dead bumps (per ROC): 1 0 1 1 1 0 2 0 0 0 0 0 0 0 0 0
[14:27:10.297] <TB0> INFO: separation cut (per ROC): 104 105 106 108 100 107 106 94 108 102 100 84 100 98 102 102
[14:27:10.297] <TB0> INFO: Decoding statistics:
[14:27:10.297] <TB0> INFO: General information:
[14:27:10.297] <TB0> INFO: 16bit words read: 0
[14:27:10.297] <TB0> INFO: valid events total: 0
[14:27:10.297] <TB0> INFO: empty events: 0
[14:27:10.297] <TB0> INFO: valid events with pixels: 0
[14:27:10.297] <TB0> INFO: valid pixel hits: 0
[14:27:10.297] <TB0> INFO: Event errors: 0
[14:27:10.297] <TB0> INFO: start marker: 0
[14:27:10.297] <TB0> INFO: stop marker: 0
[14:27:10.297] <TB0> INFO: overflow: 0
[14:27:10.297] <TB0> INFO: invalid 5bit words: 0
[14:27:10.297] <TB0> INFO: invalid XOR eye diagram: 0
[14:27:10.297] <TB0> INFO: frame (failed synchr.): 0
[14:27:10.297] <TB0> INFO: idle data (no TBM trl): 0
[14:27:10.297] <TB0> INFO: no data (only TBM hdr): 0
[14:27:10.297] <TB0> INFO: TBM errors: 0
[14:27:10.297] <TB0> INFO: flawed TBM headers: 0
[14:27:10.297] <TB0> INFO: flawed TBM trailers: 0
[14:27:10.297] <TB0> INFO: event ID mismatches: 0
[14:27:10.297] <TB0> INFO: ROC errors: 0
[14:27:10.297] <TB0> INFO: missing ROC header(s): 0
[14:27:10.297] <TB0> INFO: misplaced readback start: 0
[14:27:10.297] <TB0> INFO: Pixel decoding errors: 0
[14:27:10.297] <TB0> INFO: pixel data incomplete: 0
[14:27:10.297] <TB0> INFO: pixel address: 0
[14:27:10.297] <TB0> INFO: pulse height fill bit: 0
[14:27:10.297] <TB0> INFO: buffer corruption: 0
[14:27:10.336] <TB0> INFO: ######################################################################
[14:27:10.336] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:27:10.336] <TB0> INFO: ######################################################################
[14:27:10.336] <TB0> INFO: ----------------------------------------------------------------------
[14:27:10.336] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:27:10.336] <TB0> INFO: ----------------------------------------------------------------------
[14:27:10.337] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[14:27:10.350] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[14:27:10.350] <TB0> INFO: run 1 of 1
[14:27:10.625] <TB0> INFO: Expecting 36608000 events.
[14:27:35.331] <TB0> INFO: 674550 events read in total (24115ms).
[14:27:58.502] <TB0> INFO: 1335350 events read in total (47285ms).
[14:28:22.233] <TB0> INFO: 1996800 events read in total (71016ms).
[14:28:45.150] <TB0> INFO: 2659150 events read in total (93933ms).
[14:29:09.274] <TB0> INFO: 3320300 events read in total (118057ms).
[14:29:33.414] <TB0> INFO: 3982150 events read in total (142197ms).
[14:29:56.367] <TB0> INFO: 4643200 events read in total (165150ms).
[14:30:19.571] <TB0> INFO: 5304950 events read in total (188354ms).
[14:30:42.183] <TB0> INFO: 5965900 events read in total (210966ms).
[14:31:04.784] <TB0> INFO: 6626450 events read in total (233567ms).
[14:31:28.190] <TB0> INFO: 7287600 events read in total (256973ms).
[14:31:51.232] <TB0> INFO: 7950050 events read in total (280015ms).
[14:32:14.200] <TB0> INFO: 8611050 events read in total (302983ms).
[14:32:37.204] <TB0> INFO: 9272300 events read in total (325987ms).
[14:33:00.482] <TB0> INFO: 9932400 events read in total (349265ms).
[14:33:23.750] <TB0> INFO: 10593150 events read in total (372533ms).
[14:33:46.556] <TB0> INFO: 11251850 events read in total (395339ms).
[14:34:09.704] <TB0> INFO: 11912650 events read in total (418487ms).
[14:34:32.774] <TB0> INFO: 12573050 events read in total (441557ms).
[14:34:55.625] <TB0> INFO: 13231900 events read in total (464408ms).
[14:35:18.743] <TB0> INFO: 13890550 events read in total (487526ms).
[14:35:41.616] <TB0> INFO: 14550050 events read in total (510399ms).
[14:36:04.400] <TB0> INFO: 15208400 events read in total (533183ms).
[14:36:27.012] <TB0> INFO: 15867700 events read in total (555795ms).
[14:36:49.978] <TB0> INFO: 16526350 events read in total (578761ms).
[14:37:12.842] <TB0> INFO: 17185150 events read in total (601625ms).
[14:37:35.789] <TB0> INFO: 17844250 events read in total (624572ms).
[14:37:58.725] <TB0> INFO: 18502700 events read in total (647508ms).
[14:38:21.822] <TB0> INFO: 19160600 events read in total (670605ms).
[14:38:44.390] <TB0> INFO: 19816850 events read in total (693173ms).
[14:39:07.275] <TB0> INFO: 20474800 events read in total (716058ms).
[14:39:29.955] <TB0> INFO: 21131050 events read in total (738738ms).
[14:39:52.986] <TB0> INFO: 21787000 events read in total (761769ms).
[14:40:15.780] <TB0> INFO: 22442650 events read in total (784564ms).
[14:40:38.657] <TB0> INFO: 23098100 events read in total (807440ms).
[14:41:01.379] <TB0> INFO: 23754400 events read in total (830162ms).
[14:41:24.457] <TB0> INFO: 24410250 events read in total (853240ms).
[14:41:47.347] <TB0> INFO: 25068450 events read in total (876130ms).
[14:42:10.238] <TB0> INFO: 25723700 events read in total (899021ms).
[14:42:32.965] <TB0> INFO: 26380450 events read in total (921748ms).
[14:42:55.839] <TB0> INFO: 27036950 events read in total (944622ms).
[14:43:18.550] <TB0> INFO: 27694550 events read in total (967333ms).
[14:43:41.129] <TB0> INFO: 28351100 events read in total (989912ms).
[14:44:04.016] <TB0> INFO: 29008750 events read in total (1012799ms).
[14:44:26.753] <TB0> INFO: 29664100 events read in total (1035536ms).
[14:44:49.788] <TB0> INFO: 30321450 events read in total (1058571ms).
[14:45:12.632] <TB0> INFO: 30977900 events read in total (1081415ms).
[14:45:35.360] <TB0> INFO: 31634050 events read in total (1104143ms).
[14:45:58.259] <TB0> INFO: 32290800 events read in total (1127042ms).
[14:46:20.921] <TB0> INFO: 32946100 events read in total (1149704ms).
[14:46:43.798] <TB0> INFO: 33604350 events read in total (1172581ms).
[14:47:06.514] <TB0> INFO: 34262950 events read in total (1195297ms).
[14:47:29.254] <TB0> INFO: 34920800 events read in total (1218037ms).
[14:47:51.833] <TB0> INFO: 35578050 events read in total (1240616ms).
[14:48:14.776] <TB0> INFO: 36242650 events read in total (1263559ms).
[14:48:27.431] <TB0> INFO: 36608000 events read in total (1276214ms).
[14:48:27.535] <TB0> INFO: Test took 1277184ms.
[14:48:28.024] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:29.889] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:31.515] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:32.987] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:34.828] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:36.807] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:38.870] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:40.815] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:42.868] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:44.644] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:46.538] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:48.577] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:50.615] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:52.812] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:55.309] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:57.862] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[14:48:59.723] <TB0> INFO: PixTestScurves::scurves() done
[14:48:59.724] <TB0> INFO: Vcal mean: 111.85 109.67 112.69 126.58 108.34 119.18 116.48 106.31 124.91 112.50 111.93 107.63 109.30 109.95 111.90 122.85
[14:48:59.724] <TB0> INFO: Vcal RMS: 4.99 4.63 4.83 5.91 4.83 5.78 5.66 4.94 6.57 5.62 4.76 4.74 4.48 5.34 5.01 6.88
[14:48:59.724] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1309 seconds
[14:48:59.724] <TB0> INFO: Decoding statistics:
[14:48:59.724] <TB0> INFO: General information:
[14:48:59.724] <TB0> INFO: 16bit words read: 0
[14:48:59.724] <TB0> INFO: valid events total: 0
[14:48:59.724] <TB0> INFO: empty events: 0
[14:48:59.724] <TB0> INFO: valid events with pixels: 0
[14:48:59.724] <TB0> INFO: valid pixel hits: 0
[14:48:59.724] <TB0> INFO: Event errors: 0
[14:48:59.724] <TB0> INFO: start marker: 0
[14:48:59.724] <TB0> INFO: stop marker: 0
[14:48:59.724] <TB0> INFO: overflow: 0
[14:48:59.724] <TB0> INFO: invalid 5bit words: 0
[14:48:59.724] <TB0> INFO: invalid XOR eye diagram: 0
[14:48:59.724] <TB0> INFO: frame (failed synchr.): 0
[14:48:59.724] <TB0> INFO: idle data (no TBM trl): 0
[14:48:59.724] <TB0> INFO: no data (only TBM hdr): 0
[14:48:59.724] <TB0> INFO: TBM errors: 0
[14:48:59.724] <TB0> INFO: flawed TBM headers: 0
[14:48:59.724] <TB0> INFO: flawed TBM trailers: 0
[14:48:59.724] <TB0> INFO: event ID mismatches: 0
[14:48:59.724] <TB0> INFO: ROC errors: 0
[14:48:59.724] <TB0> INFO: missing ROC header(s): 0
[14:48:59.724] <TB0> INFO: misplaced readback start: 0
[14:48:59.724] <TB0> INFO: Pixel decoding errors: 0
[14:48:59.724] <TB0> INFO: pixel data incomplete: 0
[14:48:59.724] <TB0> INFO: pixel address: 0
[14:48:59.724] <TB0> INFO: pulse height fill bit: 0
[14:48:59.724] <TB0> INFO: buffer corruption: 0
[14:48:59.790] <TB0> INFO: ######################################################################
[14:48:59.790] <TB0> INFO: PixTestTrim::doTest()
[14:48:59.790] <TB0> INFO: ######################################################################
[14:48:59.791] <TB0> INFO: ----------------------------------------------------------------------
[14:48:59.791] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[14:48:59.791] <TB0> INFO: ----------------------------------------------------------------------
[14:48:59.837] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:48:59.837] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:48:59.853] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[14:48:59.853] <TB0> INFO: run 1 of 1
[14:49:00.133] <TB0> INFO: Expecting 5025280 events.
[14:49:31.493] <TB0> INFO: 821416 events read in total (30748ms).
[14:50:01.309] <TB0> INFO: 1639720 events read in total (60565ms).
[14:50:31.266] <TB0> INFO: 2455688 events read in total (90522ms).
[14:51:00.767] <TB0> INFO: 3266664 events read in total (120022ms).
[14:51:30.645] <TB0> INFO: 4074704 events read in total (149900ms).
[14:52:00.473] <TB0> INFO: 4881536 events read in total (179728ms).
[14:52:06.312] <TB0> INFO: 5025280 events read in total (185567ms).
[14:52:06.370] <TB0> INFO: Test took 186517ms.
[14:52:23.243] <TB0> INFO: ROC 0 VthrComp = 116
[14:52:23.243] <TB0> INFO: ROC 1 VthrComp = 118
[14:52:23.243] <TB0> INFO: ROC 2 VthrComp = 123
[14:52:23.243] <TB0> INFO: ROC 3 VthrComp = 135
[14:52:23.244] <TB0> INFO: ROC 4 VthrComp = 114
[14:52:23.244] <TB0> INFO: ROC 5 VthrComp = 128
[14:52:23.244] <TB0> INFO: ROC 6 VthrComp = 119
[14:52:23.244] <TB0> INFO: ROC 7 VthrComp = 108
[14:52:23.244] <TB0> INFO: ROC 8 VthrComp = 130
[14:52:23.244] <TB0> INFO: ROC 9 VthrComp = 116
[14:52:23.244] <TB0> INFO: ROC 10 VthrComp = 122
[14:52:23.244] <TB0> INFO: ROC 11 VthrComp = 109
[14:52:23.244] <TB0> INFO: ROC 12 VthrComp = 120
[14:52:23.244] <TB0> INFO: ROC 13 VthrComp = 113
[14:52:23.245] <TB0> INFO: ROC 14 VthrComp = 115
[14:52:23.245] <TB0> INFO: ROC 15 VthrComp = 121
[14:52:23.484] <TB0> INFO: Expecting 41600 events.
[14:52:27.150] <TB0> INFO: 41600 events read in total (3075ms).
[14:52:27.151] <TB0> INFO: Test took 3905ms.
[14:52:27.161] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:52:27.161] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:52:27.173] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[14:52:27.173] <TB0> INFO: run 1 of 1
[14:52:27.450] <TB0> INFO: Expecting 5025280 events.
[14:52:54.753] <TB0> INFO: 589456 events read in total (26711ms).
[14:53:20.396] <TB0> INFO: 1177840 events read in total (52354ms).
[14:53:46.144] <TB0> INFO: 1766480 events read in total (78102ms).
[14:54:12.118] <TB0> INFO: 2354880 events read in total (104076ms).
[14:54:38.020] <TB0> INFO: 2941768 events read in total (129978ms).
[14:55:03.913] <TB0> INFO: 3526728 events read in total (155871ms).
[14:55:29.642] <TB0> INFO: 4111512 events read in total (181600ms).
[14:55:55.400] <TB0> INFO: 4696352 events read in total (207358ms).
[14:56:10.517] <TB0> INFO: 5025280 events read in total (222475ms).
[14:56:10.596] <TB0> INFO: Test took 223424ms.
[14:56:35.671] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.0041 for pixel 8/0 mean/min/max = 46.0393/31.9739/60.1047
[14:56:35.671] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 57.6272 for pixel 8/69 mean/min/max = 44.6784/31.6207/57.736
[14:56:35.671] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.4158 for pixel 19/77 mean/min/max = 44.9365/31.267/58.606
[14:56:35.672] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.0507 for pixel 4/0 mean/min/max = 47.2808/33.4508/61.1109
[14:56:35.672] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.9293 for pixel 0/5 mean/min/max = 45.6533/32.3282/58.9784
[14:56:35.672] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.6673 for pixel 1/24 mean/min/max = 45.0357/31.3808/58.6906
[14:56:35.672] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.2133 for pixel 25/1 mean/min/max = 46.0964/31.8796/60.3132
[14:56:35.673] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 61.787 for pixel 0/68 mean/min/max = 48.4699/34.8492/62.0905
[14:56:35.673] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 63.2056 for pixel 20/60 mean/min/max = 46.6854/29.9657/63.4051
[14:56:35.673] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.5236 for pixel 0/17 mean/min/max = 46.3024/31.0672/61.5376
[14:56:35.674] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 57.6551 for pixel 3/64 mean/min/max = 44.4954/31.0535/57.9372
[14:56:35.674] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 60.9862 for pixel 1/7 mean/min/max = 47.5887/33.9588/61.2186
[14:56:35.674] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 57.8568 for pixel 13/8 mean/min/max = 44.9947/32.0269/57.9625
[14:56:35.675] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.8045 for pixel 0/4 mean/min/max = 46.0174/32.0161/60.0186
[14:56:35.675] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 59.2643 for pixel 20/10 mean/min/max = 45.4432/31.4556/59.4309
[14:56:35.675] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 63.9296 for pixel 2/1 mean/min/max = 47.122/30.2954/63.9486
[14:56:35.676] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:56:35.764] <TB0> INFO: Expecting 411648 events.
[14:56:45.153] <TB0> INFO: 411648 events read in total (8797ms).
[14:56:45.160] <TB0> INFO: Expecting 411648 events.
[14:56:54.645] <TB0> INFO: 411648 events read in total (9082ms).
[14:56:54.659] <TB0> INFO: Expecting 411648 events.
[14:57:04.116] <TB0> INFO: 411648 events read in total (9054ms).
[14:57:04.135] <TB0> INFO: Expecting 411648 events.
[14:57:13.311] <TB0> INFO: 411648 events read in total (8773ms).
[14:57:13.330] <TB0> INFO: Expecting 411648 events.
[14:57:22.562] <TB0> INFO: 411648 events read in total (8829ms).
[14:57:22.585] <TB0> INFO: Expecting 411648 events.
[14:57:31.976] <TB0> INFO: 411648 events read in total (8988ms).
[14:57:31.002] <TB0> INFO: Expecting 411648 events.
[14:57:41.377] <TB0> INFO: 411648 events read in total (8972ms).
[14:57:41.403] <TB0> INFO: Expecting 411648 events.
[14:57:50.665] <TB0> INFO: 411648 events read in total (8859ms).
[14:57:50.698] <TB0> INFO: Expecting 411648 events.
[14:58:00.030] <TB0> INFO: 411648 events read in total (8929ms).
[14:58:00.060] <TB0> INFO: Expecting 411648 events.
[14:58:09.426] <TB0> INFO: 411648 events read in total (8963ms).
[14:58:09.459] <TB0> INFO: Expecting 411648 events.
[14:58:18.778] <TB0> INFO: 411648 events read in total (8916ms).
[14:58:18.817] <TB0> INFO: Expecting 411648 events.
[14:58:28.203] <TB0> INFO: 411648 events read in total (8983ms).
[14:58:28.251] <TB0> INFO: Expecting 411648 events.
[14:58:37.589] <TB0> INFO: 411648 events read in total (8935ms).
[14:58:37.631] <TB0> INFO: Expecting 411648 events.
[14:58:46.955] <TB0> INFO: 411648 events read in total (8921ms).
[14:58:47.008] <TB0> INFO: Expecting 411648 events.
[14:58:56.373] <TB0> INFO: 411648 events read in total (8962ms).
[14:58:56.423] <TB0> INFO: Expecting 411648 events.
[14:59:05.733] <TB0> INFO: 411648 events read in total (8907ms).
[14:59:05.782] <TB0> INFO: Test took 150106ms.
[14:59:06.527] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:59:06.539] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[14:59:06.539] <TB0> INFO: run 1 of 1
[14:59:06.776] <TB0> INFO: Expecting 5025280 events.
[14:59:33.430] <TB0> INFO: 586600 events read in total (26064ms).
[14:59:59.463] <TB0> INFO: 1172800 events read in total (52096ms).
[15:00:25.700] <TB0> INFO: 1760328 events read in total (78333ms).
[15:00:51.991] <TB0> INFO: 2344952 events read in total (104624ms).
[15:01:18.239] <TB0> INFO: 2929880 events read in total (130872ms).
[15:01:44.789] <TB0> INFO: 3514992 events read in total (157422ms).
[15:02:11.112] <TB0> INFO: 4100016 events read in total (183745ms).
[15:02:37.012] <TB0> INFO: 4683032 events read in total (209645ms).
[15:02:52.742] <TB0> INFO: 5025280 events read in total (225375ms).
[15:02:52.860] <TB0> INFO: Test took 226321ms.
[15:03:16.064] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 1.757793 .. 143.655416
[15:03:16.301] <TB0> INFO: Expecting 208000 events.
[15:03:25.739] <TB0> INFO: 208000 events read in total (8847ms).
[15:03:25.741] <TB0> INFO: Test took 9676ms.
[15:03:25.789] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 153 (-1/-1) hits flags = 528 (plus default)
[15:03:25.803] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:03:25.803] <TB0> INFO: run 1 of 1
[15:03:26.087] <TB0> INFO: Expecting 5091840 events.
[15:03:53.337] <TB0> INFO: 585184 events read in total (26658ms).
[15:04:18.733] <TB0> INFO: 1170160 events read in total (52054ms).
[15:04:44.058] <TB0> INFO: 1754832 events read in total (77379ms).
[15:05:09.521] <TB0> INFO: 2339656 events read in total (102842ms).
[15:05:35.463] <TB0> INFO: 2924416 events read in total (128784ms).
[15:06:00.714] <TB0> INFO: 3508592 events read in total (154035ms).
[15:06:26.672] <TB0> INFO: 4092592 events read in total (179993ms).
[15:06:52.429] <TB0> INFO: 4676288 events read in total (205750ms).
[15:07:10.890] <TB0> INFO: 5091840 events read in total (224211ms).
[15:07:10.974] <TB0> INFO: Test took 225172ms.
[15:07:36.764] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 28.262107 .. 46.192964
[15:07:37.020] <TB0> INFO: Expecting 208000 events.
[15:07:47.318] <TB0> INFO: 208000 events read in total (9707ms).
[15:07:47.319] <TB0> INFO: Test took 10554ms.
[15:07:47.387] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 56 (-1/-1) hits flags = 528 (plus default)
[15:07:47.402] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:07:47.402] <TB0> INFO: run 1 of 1
[15:07:47.679] <TB0> INFO: Expecting 1297920 events.
[15:08:16.627] <TB0> INFO: 649888 events read in total (28356ms).
[15:08:44.311] <TB0> INFO: 1297920 events read in total (56040ms).
[15:08:44.356] <TB0> INFO: Test took 56955ms.
[15:08:57.065] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 25.556181 .. 46.427210
[15:08:57.303] <TB0> INFO: Expecting 208000 events.
[15:09:07.151] <TB0> INFO: 208000 events read in total (9257ms).
[15:09:07.153] <TB0> INFO: Test took 10086ms.
[15:09:07.237] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[15:09:07.251] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:09:07.251] <TB0> INFO: run 1 of 1
[15:09:07.528] <TB0> INFO: Expecting 1397760 events.
[15:09:36.101] <TB0> INFO: 663152 events read in total (27981ms).
[15:10:03.672] <TB0> INFO: 1325376 events read in total (55552ms).
[15:10:07.237] <TB0> INFO: 1397760 events read in total (59118ms).
[15:10:07.275] <TB0> INFO: Test took 60025ms.
[15:10:19.703] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 24.930059 .. 43.373372
[15:10:19.943] <TB0> INFO: Expecting 208000 events.
[15:10:30.006] <TB0> INFO: 208000 events read in total (9471ms).
[15:10:30.007] <TB0> INFO: Test took 10302ms.
[15:10:30.059] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 53 (-1/-1) hits flags = 528 (plus default)
[15:10:30.072] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:10:30.072] <TB0> INFO: run 1 of 1
[15:10:30.351] <TB0> INFO: Expecting 1331200 events.
[15:10:59.695] <TB0> INFO: 680648 events read in total (28752ms).
[15:11:26.435] <TB0> INFO: 1331200 events read in total (55493ms).
[15:11:26.469] <TB0> INFO: Test took 56397ms.
[15:11:39.880] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:11:39.880] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[15:11:39.894] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:11:39.894] <TB0> INFO: run 1 of 1
[15:11:40.142] <TB0> INFO: Expecting 1364480 events.
[15:12:08.957] <TB0> INFO: 666768 events read in total (28223ms).
[15:12:36.453] <TB0> INFO: 1333272 events read in total (55719ms).
[15:12:38.154] <TB0> INFO: 1364480 events read in total (57420ms).
[15:12:38.183] <TB0> INFO: Test took 58289ms.
[15:12:50.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C0.dat
[15:12:50.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C1.dat
[15:12:50.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C2.dat
[15:12:50.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C3.dat
[15:12:50.179] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C4.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C5.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C6.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C7.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C8.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C9.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C10.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C11.dat
[15:12:50.180] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C12.dat
[15:12:50.181] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C13.dat
[15:12:50.181] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C14.dat
[15:12:50.181] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C15.dat
[15:12:50.181] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C0.dat
[15:12:50.190] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C1.dat
[15:12:50.195] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C2.dat
[15:12:50.200] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C3.dat
[15:12:50.205] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C4.dat
[15:12:50.210] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C5.dat
[15:12:50.215] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C6.dat
[15:12:50.219] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C7.dat
[15:12:50.224] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C8.dat
[15:12:50.229] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C9.dat
[15:12:50.234] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C10.dat
[15:12:50.238] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C11.dat
[15:12:50.243] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C12.dat
[15:12:50.248] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C13.dat
[15:12:50.253] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C14.dat
[15:12:50.257] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//trimParameters35_C15.dat
[15:12:50.262] <TB0> INFO: PixTestTrim::trimTest() done
[15:12:50.262] <TB0> INFO: vtrim: 121 124 145 123 111 127 124 123 127 132 119 134 133 108 113 135
[15:12:50.262] <TB0> INFO: vthrcomp: 116 118 123 135 114 128 119 108 130 116 122 109 120 113 115 121
[15:12:50.262] <TB0> INFO: vcal mean: 34.86 34.96 34.93 34.94 34.95 34.90 35.01 35.00 35.01 34.94 34.96 34.96 34.96 34.95 34.95 35.05
[15:12:50.262] <TB0> INFO: vcal RMS: 1.01 1.03 1.02 1.03 0.98 1.06 1.07 0.99 1.38 1.06 1.06 1.05 0.98 1.06 1.04 1.29
[15:12:50.262] <TB0> INFO: bits mean: 9.50 9.81 10.09 8.62 8.98 9.73 9.53 7.91 9.71 9.25 9.98 9.17 9.62 9.21 9.77 9.40
[15:12:50.262] <TB0> INFO: bits RMS: 2.71 2.70 2.55 2.77 2.91 2.73 2.70 2.79 2.84 2.89 2.69 2.49 2.71 2.80 2.68 2.92
[15:12:50.269] <TB0> INFO: ----------------------------------------------------------------------
[15:12:50.269] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:12:50.269] <TB0> INFO: ----------------------------------------------------------------------
[15:12:50.272] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:12:50.287] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:12:50.287] <TB0> INFO: run 1 of 1
[15:12:50.526] <TB0> INFO: Expecting 4160000 events.
[15:13:23.586] <TB0> INFO: 742120 events read in total (32468ms).
[15:13:55.368] <TB0> INFO: 1481860 events read in total (64250ms).
[15:14:27.479] <TB0> INFO: 2217340 events read in total (96361ms).
[15:14:59.373] <TB0> INFO: 2950880 events read in total (128255ms).
[15:15:31.404] <TB0> INFO: 3684390 events read in total (160286ms).
[15:15:52.206] <TB0> INFO: 4160000 events read in total (181088ms).
[15:15:52.315] <TB0> INFO: Test took 182028ms.
[15:16:15.722] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[15:16:15.734] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:16:15.734] <TB0> INFO: run 1 of 1
[15:16:16.012] <TB0> INFO: Expecting 4180800 events.
[15:16:49.414] <TB0> INFO: 717810 events read in total (32810ms).
[15:17:20.798] <TB0> INFO: 1432815 events read in total (64194ms).
[15:17:52.117] <TB0> INFO: 2145035 events read in total (95513ms).
[15:18:23.333] <TB0> INFO: 2853770 events read in total (126729ms).
[15:18:54.506] <TB0> INFO: 3562790 events read in total (157902ms).
[15:19:21.551] <TB0> INFO: 4180800 events read in total (184947ms).
[15:19:21.633] <TB0> INFO: Test took 185898ms.
[15:19:46.171] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[15:19:46.185] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:19:46.186] <TB0> INFO: run 1 of 1
[15:19:46.466] <TB0> INFO: Expecting 4056000 events.
[15:20:19.403] <TB0> INFO: 726000 events read in total (32346ms).
[15:20:50.482] <TB0> INFO: 1448695 events read in total (63425ms).
[15:21:21.902] <TB0> INFO: 2168315 events read in total (94845ms).
[15:21:53.247] <TB0> INFO: 2884855 events read in total (126190ms).
[15:22:24.377] <TB0> INFO: 3601435 events read in total (157320ms).
[15:22:44.493] <TB0> INFO: 4056000 events read in total (177436ms).
[15:22:44.590] <TB0> INFO: Test took 178404ms.
[15:23:12.442] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[15:23:12.460] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:23:12.460] <TB0> INFO: run 1 of 1
[15:23:12.699] <TB0> INFO: Expecting 4076800 events.
[15:23:45.246] <TB0> INFO: 724450 events read in total (31956ms).
[15:24:16.394] <TB0> INFO: 1446280 events read in total (63104ms).
[15:24:47.638] <TB0> INFO: 2164705 events read in total (94348ms).
[15:25:19.113] <TB0> INFO: 2880170 events read in total (125823ms).
[15:25:50.704] <TB0> INFO: 3595635 events read in total (157414ms).
[15:26:11.727] <TB0> INFO: 4076800 events read in total (178437ms).
[15:26:11.803] <TB0> INFO: Test took 179343ms.
[15:26:41.188] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[15:26:41.202] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:26:41.202] <TB0> INFO: run 1 of 1
[15:26:41.438] <TB0> INFO: Expecting 4076800 events.
[15:27:13.250] <TB0> INFO: 724485 events read in total (31220ms).
[15:27:44.503] <TB0> INFO: 1446400 events read in total (62473ms).
[15:28:15.906] <TB0> INFO: 2164735 events read in total (93876ms).
[15:28:47.156] <TB0> INFO: 2880150 events read in total (125126ms).
[15:29:18.191] <TB0> INFO: 3595800 events read in total (156161ms).
[15:29:39.165] <TB0> INFO: 4076800 events read in total (177135ms).
[15:29:39.260] <TB0> INFO: Test took 178058ms.
[15:30:07.116] <TB0> INFO: PixTestTrim::trimBitTest() done
[15:30:07.117] <TB0> INFO: PixTestTrim::doTest() done, duration: 2467 seconds
[15:30:07.117] <TB0> INFO: Decoding statistics:
[15:30:07.117] <TB0> INFO: General information:
[15:30:07.117] <TB0> INFO: 16bit words read: 0
[15:30:07.117] <TB0> INFO: valid events total: 0
[15:30:07.117] <TB0> INFO: empty events: 0
[15:30:07.117] <TB0> INFO: valid events with pixels: 0
[15:30:07.117] <TB0> INFO: valid pixel hits: 0
[15:30:07.117] <TB0> INFO: Event errors: 0
[15:30:07.117] <TB0> INFO: start marker: 0
[15:30:07.117] <TB0> INFO: stop marker: 0
[15:30:07.117] <TB0> INFO: overflow: 0
[15:30:07.117] <TB0> INFO: invalid 5bit words: 0
[15:30:07.117] <TB0> INFO: invalid XOR eye diagram: 0
[15:30:07.117] <TB0> INFO: frame (failed synchr.): 0
[15:30:07.117] <TB0> INFO: idle data (no TBM trl): 0
[15:30:07.117] <TB0> INFO: no data (only TBM hdr): 0
[15:30:07.117] <TB0> INFO: TBM errors: 0
[15:30:07.117] <TB0> INFO: flawed TBM headers: 0
[15:30:07.117] <TB0> INFO: flawed TBM trailers: 0
[15:30:07.117] <TB0> INFO: event ID mismatches: 0
[15:30:07.117] <TB0> INFO: ROC errors: 0
[15:30:07.117] <TB0> INFO: missing ROC header(s): 0
[15:30:07.117] <TB0> INFO: misplaced readback start: 0
[15:30:07.117] <TB0> INFO: Pixel decoding errors: 0
[15:30:07.117] <TB0> INFO: pixel data incomplete: 0
[15:30:07.117] <TB0> INFO: pixel address: 0
[15:30:07.117] <TB0> INFO: pulse height fill bit: 0
[15:30:07.117] <TB0> INFO: buffer corruption: 0
[15:30:07.762] <TB0> INFO: ######################################################################
[15:30:07.762] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:30:07.762] <TB0> INFO: ######################################################################
[15:30:07.000] <TB0> INFO: Expecting 41600 events.
[15:30:11.644] <TB0> INFO: 41600 events read in total (3053ms).
[15:30:11.645] <TB0> INFO: Test took 3882ms.
[15:30:12.132] <TB0> INFO: Expecting 41600 events.
[15:30:15.654] <TB0> INFO: 41600 events read in total (2930ms).
[15:30:15.656] <TB0> INFO: Test took 3805ms.
[15:30:15.952] <TB0> INFO: Expecting 41600 events.
[15:30:19.457] <TB0> INFO: 41600 events read in total (2913ms).
[15:30:19.458] <TB0> INFO: Test took 3773ms.
[15:30:19.750] <TB0> INFO: Expecting 41600 events.
[15:30:23.325] <TB0> INFO: 41600 events read in total (2983ms).
[15:30:23.327] <TB0> INFO: Test took 3842ms.
[15:30:23.616] <TB0> INFO: Expecting 41600 events.
[15:30:27.157] <TB0> INFO: 41600 events read in total (2949ms).
[15:30:27.157] <TB0> INFO: Test took 3806ms.
[15:30:27.449] <TB0> INFO: Expecting 41600 events.
[15:30:31.091] <TB0> INFO: 41600 events read in total (3050ms).
[15:30:31.092] <TB0> INFO: Test took 3908ms.
[15:30:31.384] <TB0> INFO: Expecting 41600 events.
[15:30:34.910] <TB0> INFO: 41600 events read in total (2934ms).
[15:30:34.911] <TB0> INFO: Test took 3792ms.
[15:30:35.203] <TB0> INFO: Expecting 41600 events.
[15:30:38.717] <TB0> INFO: 41600 events read in total (2922ms).
[15:30:38.717] <TB0> INFO: Test took 3779ms.
[15:30:39.007] <TB0> INFO: Expecting 41600 events.
[15:30:42.731] <TB0> INFO: 41600 events read in total (3132ms).
[15:30:42.733] <TB0> INFO: Test took 3991ms.
[15:30:43.041] <TB0> INFO: Expecting 41600 events.
[15:30:46.673] <TB0> INFO: 41600 events read in total (3040ms).
[15:30:46.674] <TB0> INFO: Test took 3913ms.
[15:30:46.967] <TB0> INFO: Expecting 41600 events.
[15:30:50.549] <TB0> INFO: 41600 events read in total (2990ms).
[15:30:50.550] <TB0> INFO: Test took 3852ms.
[15:30:50.841] <TB0> INFO: Expecting 41600 events.
[15:30:54.339] <TB0> INFO: 41600 events read in total (2906ms).
[15:30:54.340] <TB0> INFO: Test took 3764ms.
[15:30:54.628] <TB0> INFO: Expecting 41600 events.
[15:30:58.224] <TB0> INFO: 41600 events read in total (3004ms).
[15:30:58.224] <TB0> INFO: Test took 3860ms.
[15:30:58.513] <TB0> INFO: Expecting 41600 events.
[15:31:02.021] <TB0> INFO: 41600 events read in total (2916ms).
[15:31:02.022] <TB0> INFO: Test took 3773ms.
[15:31:02.311] <TB0> INFO: Expecting 41600 events.
[15:31:05.824] <TB0> INFO: 41600 events read in total (2921ms).
[15:31:05.825] <TB0> INFO: Test took 3779ms.
[15:31:06.114] <TB0> INFO: Expecting 41600 events.
[15:31:09.651] <TB0> INFO: 41600 events read in total (2945ms).
[15:31:09.652] <TB0> INFO: Test took 3803ms.
[15:31:09.941] <TB0> INFO: Expecting 41600 events.
[15:31:13.479] <TB0> INFO: 41600 events read in total (2946ms).
[15:31:13.480] <TB0> INFO: Test took 3804ms.
[15:31:13.773] <TB0> INFO: Expecting 41600 events.
[15:31:17.256] <TB0> INFO: 41600 events read in total (2892ms).
[15:31:17.257] <TB0> INFO: Test took 3749ms.
[15:31:17.547] <TB0> INFO: Expecting 41600 events.
[15:31:21.060] <TB0> INFO: 41600 events read in total (2922ms).
[15:31:21.060] <TB0> INFO: Test took 3778ms.
[15:31:21.349] <TB0> INFO: Expecting 41600 events.
[15:31:24.928] <TB0> INFO: 41600 events read in total (2987ms).
[15:31:24.928] <TB0> INFO: Test took 3843ms.
[15:31:25.218] <TB0> INFO: Expecting 41600 events.
[15:31:28.708] <TB0> INFO: 41600 events read in total (2899ms).
[15:31:28.709] <TB0> INFO: Test took 3757ms.
[15:31:28.999] <TB0> INFO: Expecting 41600 events.
[15:31:32.660] <TB0> INFO: 41600 events read in total (3069ms).
[15:31:32.660] <TB0> INFO: Test took 3926ms.
[15:31:32.991] <TB0> INFO: Expecting 41600 events.
[15:31:36.624] <TB0> INFO: 41600 events read in total (3042ms).
[15:31:36.624] <TB0> INFO: Test took 3935ms.
[15:31:36.914] <TB0> INFO: Expecting 41600 events.
[15:31:40.396] <TB0> INFO: 41600 events read in total (2891ms).
[15:31:40.397] <TB0> INFO: Test took 3748ms.
[15:31:40.686] <TB0> INFO: Expecting 41600 events.
[15:31:44.168] <TB0> INFO: 41600 events read in total (2890ms).
[15:31:44.169] <TB0> INFO: Test took 3748ms.
[15:31:44.458] <TB0> INFO: Expecting 41600 events.
[15:31:48.020] <TB0> INFO: 41600 events read in total (2971ms).
[15:31:48.020] <TB0> INFO: Test took 3827ms.
[15:31:48.310] <TB0> INFO: Expecting 41600 events.
[15:31:51.848] <TB0> INFO: 41600 events read in total (2947ms).
[15:31:51.849] <TB0> INFO: Test took 3804ms.
[15:31:52.154] <TB0> INFO: Expecting 41600 events.
[15:31:55.673] <TB0> INFO: 41600 events read in total (2923ms).
[15:31:55.674] <TB0> INFO: Test took 3800ms.
[15:31:55.966] <TB0> INFO: Expecting 41600 events.
[15:31:59.437] <TB0> INFO: 41600 events read in total (2879ms).
[15:31:59.438] <TB0> INFO: Test took 3737ms.
[15:31:59.730] <TB0> INFO: Expecting 2560 events.
[15:32:00.617] <TB0> INFO: 2560 events read in total (295ms).
[15:32:00.617] <TB0> INFO: Test took 1164ms.
[15:32:00.925] <TB0> INFO: Expecting 2560 events.
[15:32:01.807] <TB0> INFO: 2560 events read in total (290ms).
[15:32:01.808] <TB0> INFO: Test took 1190ms.
[15:32:02.115] <TB0> INFO: Expecting 2560 events.
[15:32:02.998] <TB0> INFO: 2560 events read in total (291ms).
[15:32:02.999] <TB0> INFO: Test took 1190ms.
[15:32:03.314] <TB0> INFO: Expecting 2560 events.
[15:32:04.198] <TB0> INFO: 2560 events read in total (292ms).
[15:32:04.198] <TB0> INFO: Test took 1199ms.
[15:32:04.506] <TB0> INFO: Expecting 2560 events.
[15:32:05.388] <TB0> INFO: 2560 events read in total (291ms).
[15:32:05.388] <TB0> INFO: Test took 1190ms.
[15:32:05.695] <TB0> INFO: Expecting 2560 events.
[15:32:06.578] <TB0> INFO: 2560 events read in total (291ms).
[15:32:06.578] <TB0> INFO: Test took 1190ms.
[15:32:06.886] <TB0> INFO: Expecting 2560 events.
[15:32:07.769] <TB0> INFO: 2560 events read in total (292ms).
[15:32:07.769] <TB0> INFO: Test took 1191ms.
[15:32:08.080] <TB0> INFO: Expecting 2560 events.
[15:32:08.960] <TB0> INFO: 2560 events read in total (288ms).
[15:32:08.960] <TB0> INFO: Test took 1190ms.
[15:32:09.268] <TB0> INFO: Expecting 2560 events.
[15:32:10.147] <TB0> INFO: 2560 events read in total (288ms).
[15:32:10.147] <TB0> INFO: Test took 1185ms.
[15:32:10.455] <TB0> INFO: Expecting 2560 events.
[15:32:11.334] <TB0> INFO: 2560 events read in total (287ms).
[15:32:11.334] <TB0> INFO: Test took 1186ms.
[15:32:11.642] <TB0> INFO: Expecting 2560 events.
[15:32:12.522] <TB0> INFO: 2560 events read in total (288ms).
[15:32:12.522] <TB0> INFO: Test took 1187ms.
[15:32:12.830] <TB0> INFO: Expecting 2560 events.
[15:32:13.709] <TB0> INFO: 2560 events read in total (287ms).
[15:32:13.710] <TB0> INFO: Test took 1188ms.
[15:32:14.019] <TB0> INFO: Expecting 2560 events.
[15:32:14.911] <TB0> INFO: 2560 events read in total (300ms).
[15:32:14.912] <TB0> INFO: Test took 1201ms.
[15:32:15.220] <TB0> INFO: Expecting 2560 events.
[15:32:16.109] <TB0> INFO: 2560 events read in total (297ms).
[15:32:16.110] <TB0> INFO: Test took 1198ms.
[15:32:16.418] <TB0> INFO: Expecting 2560 events.
[15:32:17.311] <TB0> INFO: 2560 events read in total (301ms).
[15:32:17.311] <TB0> INFO: Test took 1201ms.
[15:32:17.620] <TB0> INFO: Expecting 2560 events.
[15:32:18.513] <TB0> INFO: 2560 events read in total (301ms).
[15:32:18.513] <TB0> INFO: Test took 1201ms.
[15:32:18.517] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:32:18.821] <TB0> INFO: Expecting 655360 events.
[15:32:33.912] <TB0> INFO: 655360 events read in total (14499ms).
[15:32:33.926] <TB0> INFO: Expecting 655360 events.
[15:32:48.440] <TB0> INFO: 655360 events read in total (14110ms).
[15:32:48.460] <TB0> INFO: Expecting 655360 events.
[15:33:03.060] <TB0> INFO: 655360 events read in total (14197ms).
[15:33:03.084] <TB0> INFO: Expecting 655360 events.
[15:33:17.695] <TB0> INFO: 655360 events read in total (14208ms).
[15:33:17.723] <TB0> INFO: Expecting 655360 events.
[15:33:32.530] <TB0> INFO: 655360 events read in total (14404ms).
[15:33:32.562] <TB0> INFO: Expecting 655360 events.
[15:33:47.191] <TB0> INFO: 655360 events read in total (14226ms).
[15:33:47.232] <TB0> INFO: Expecting 655360 events.
[15:34:01.768] <TB0> INFO: 655360 events read in total (14133ms).
[15:34:01.877] <TB0> INFO: Expecting 655360 events.
[15:34:16.617] <TB0> INFO: 655360 events read in total (14337ms).
[15:34:16.667] <TB0> INFO: Expecting 655360 events.
[15:34:31.359] <TB0> INFO: 655360 events read in total (14289ms).
[15:34:31.420] <TB0> INFO: Expecting 655360 events.
[15:34:45.910] <TB0> INFO: 655360 events read in total (14087ms).
[15:34:45.984] <TB0> INFO: Expecting 655360 events.
[15:35:00.553] <TB0> INFO: 655360 events read in total (14166ms).
[15:35:00.629] <TB0> INFO: Expecting 655360 events.
[15:35:15.108] <TB0> INFO: 655360 events read in total (14076ms).
[15:35:15.184] <TB0> INFO: Expecting 655360 events.
[15:35:29.633] <TB0> INFO: 655360 events read in total (14046ms).
[15:35:29.748] <TB0> INFO: Expecting 655360 events.
[15:35:44.301] <TB0> INFO: 655360 events read in total (14149ms).
[15:35:44.420] <TB0> INFO: Expecting 655360 events.
[15:35:58.802] <TB0> INFO: 655360 events read in total (13979ms).
[15:35:58.899] <TB0> INFO: Expecting 655360 events.
[15:36:13.382] <TB0> INFO: 655360 events read in total (14080ms).
[15:36:13.486] <TB0> INFO: Test took 234969ms.
[15:36:13.584] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:36:13.838] <TB0> INFO: Expecting 655360 events.
[15:36:28.528] <TB0> INFO: 655360 events read in total (14099ms).
[15:36:28.540] <TB0> INFO: Expecting 655360 events.
[15:36:42.997] <TB0> INFO: 655360 events read in total (14054ms).
[15:36:43.015] <TB0> INFO: Expecting 655360 events.
[15:36:57.109] <TB0> INFO: 655360 events read in total (13691ms).
[15:36:57.130] <TB0> INFO: Expecting 655360 events.
[15:37:11.425] <TB0> INFO: 655360 events read in total (13892ms).
[15:37:11.450] <TB0> INFO: Expecting 655360 events.
[15:37:25.847] <TB0> INFO: 655360 events read in total (13994ms).
[15:37:25.876] <TB0> INFO: Expecting 655360 events.
[15:37:40.142] <TB0> INFO: 655360 events read in total (13863ms).
[15:37:40.189] <TB0> INFO: Expecting 655360 events.
[15:37:54.694] <TB0> INFO: 655360 events read in total (14102ms).
[15:37:54.760] <TB0> INFO: Expecting 655360 events.
[15:38:08.950] <TB0> INFO: 655360 events read in total (13787ms).
[15:38:08.996] <TB0> INFO: Expecting 655360 events.
[15:38:23.256] <TB0> INFO: 655360 events read in total (13857ms).
[15:38:23.305] <TB0> INFO: Expecting 655360 events.
[15:38:37.670] <TB0> INFO: 655360 events read in total (13962ms).
[15:38:37.777] <TB0> INFO: Expecting 655360 events.
[15:38:52.065] <TB0> INFO: 655360 events read in total (13885ms).
[15:38:52.140] <TB0> INFO: Expecting 655360 events.
[15:39:06.733] <TB0> INFO: 655360 events read in total (14190ms).
[15:39:06.813] <TB0> INFO: Expecting 655360 events.
[15:39:21.168] <TB0> INFO: 655360 events read in total (13952ms).
[15:39:21.254] <TB0> INFO: Expecting 655360 events.
[15:39:35.407] <TB0> INFO: 655360 events read in total (13749ms).
[15:39:35.586] <TB0> INFO: Expecting 655360 events.
[15:39:49.613] <TB0> INFO: 655360 events read in total (13624ms).
[15:39:49.735] <TB0> INFO: Expecting 655360 events.
[15:40:03.988] <TB0> INFO: 655360 events read in total (13850ms).
[15:40:04.103] <TB0> INFO: Test took 230519ms.
[15:40:04.276] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.282] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.289] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.296] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.304] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.312] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:40:04.319] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:40:04.328] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:40:04.336] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.344] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:40:04.353] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:40:04.363] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.372] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.382] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.392] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.401] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.410] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:40:04.418] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:40:04.427] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:40:04.435] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:40:04.445] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.453] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.462] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.471] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.480] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:40:04.521] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C0.dat
[15:40:04.521] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C1.dat
[15:40:04.521] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C2.dat
[15:40:04.521] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C3.dat
[15:40:04.521] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C4.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C5.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C6.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C7.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C8.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C9.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C10.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C11.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C12.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C13.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C14.dat
[15:40:04.522] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//dacParameters35_C15.dat
[15:40:04.763] <TB0> INFO: Expecting 41600 events.
[15:40:07.940] <TB0> INFO: 41600 events read in total (2585ms).
[15:40:07.941] <TB0> INFO: Test took 3415ms.
[15:40:08.390] <TB0> INFO: Expecting 41600 events.
[15:40:11.469] <TB0> INFO: 41600 events read in total (2488ms).
[15:40:11.470] <TB0> INFO: Test took 3318ms.
[15:40:11.927] <TB0> INFO: Expecting 41600 events.
[15:40:15.129] <TB0> INFO: 41600 events read in total (2611ms).
[15:40:15.130] <TB0> INFO: Test took 3446ms.
[15:40:15.347] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:15.435] <TB0> INFO: Expecting 2560 events.
[15:40:16.327] <TB0> INFO: 2560 events read in total (300ms).
[15:40:16.328] <TB0> INFO: Test took 981ms.
[15:40:16.330] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:16.635] <TB0> INFO: Expecting 2560 events.
[15:40:17.522] <TB0> INFO: 2560 events read in total (295ms).
[15:40:17.522] <TB0> INFO: Test took 1192ms.
[15:40:17.525] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:17.830] <TB0> INFO: Expecting 2560 events.
[15:40:18.717] <TB0> INFO: 2560 events read in total (295ms).
[15:40:18.717] <TB0> INFO: Test took 1192ms.
[15:40:18.720] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:19.027] <TB0> INFO: Expecting 2560 events.
[15:40:19.915] <TB0> INFO: 2560 events read in total (296ms).
[15:40:19.916] <TB0> INFO: Test took 1196ms.
[15:40:19.919] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:20.224] <TB0> INFO: Expecting 2560 events.
[15:40:21.117] <TB0> INFO: 2560 events read in total (299ms).
[15:40:21.118] <TB0> INFO: Test took 1199ms.
[15:40:21.121] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:21.426] <TB0> INFO: Expecting 2560 events.
[15:40:22.318] <TB0> INFO: 2560 events read in total (300ms).
[15:40:22.319] <TB0> INFO: Test took 1198ms.
[15:40:22.322] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:22.626] <TB0> INFO: Expecting 2560 events.
[15:40:23.522] <TB0> INFO: 2560 events read in total (304ms).
[15:40:23.522] <TB0> INFO: Test took 1200ms.
[15:40:23.524] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:23.831] <TB0> INFO: Expecting 2560 events.
[15:40:24.723] <TB0> INFO: 2560 events read in total (301ms).
[15:40:24.723] <TB0> INFO: Test took 1199ms.
[15:40:24.725] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:25.033] <TB0> INFO: Expecting 2560 events.
[15:40:25.923] <TB0> INFO: 2560 events read in total (298ms).
[15:40:25.924] <TB0> INFO: Test took 1199ms.
[15:40:25.927] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:26.232] <TB0> INFO: Expecting 2560 events.
[15:40:27.122] <TB0> INFO: 2560 events read in total (298ms).
[15:40:27.122] <TB0> INFO: Test took 1195ms.
[15:40:27.125] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:27.431] <TB0> INFO: Expecting 2560 events.
[15:40:28.325] <TB0> INFO: 2560 events read in total (302ms).
[15:40:28.325] <TB0> INFO: Test took 1200ms.
[15:40:28.328] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:28.633] <TB0> INFO: Expecting 2560 events.
[15:40:29.522] <TB0> INFO: 2560 events read in total (297ms).
[15:40:29.522] <TB0> INFO: Test took 1194ms.
[15:40:29.525] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:29.831] <TB0> INFO: Expecting 2560 events.
[15:40:30.724] <TB0> INFO: 2560 events read in total (301ms).
[15:40:30.724] <TB0> INFO: Test took 1200ms.
[15:40:30.726] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:31.033] <TB0> INFO: Expecting 2560 events.
[15:40:31.922] <TB0> INFO: 2560 events read in total (297ms).
[15:40:31.922] <TB0> INFO: Test took 1196ms.
[15:40:31.924] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:32.231] <TB0> INFO: Expecting 2560 events.
[15:40:33.116] <TB0> INFO: 2560 events read in total (293ms).
[15:40:33.116] <TB0> INFO: Test took 1192ms.
[15:40:33.120] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:33.425] <TB0> INFO: Expecting 2560 events.
[15:40:34.309] <TB0> INFO: 2560 events read in total (292ms).
[15:40:34.309] <TB0> INFO: Test took 1190ms.
[15:40:34.312] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:34.618] <TB0> INFO: Expecting 2560 events.
[15:40:35.510] <TB0> INFO: 2560 events read in total (300ms).
[15:40:35.511] <TB0> INFO: Test took 1199ms.
[15:40:35.516] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:35.818] <TB0> INFO: Expecting 2560 events.
[15:40:36.715] <TB0> INFO: 2560 events read in total (305ms).
[15:40:36.715] <TB0> INFO: Test took 1199ms.
[15:40:36.717] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:37.023] <TB0> INFO: Expecting 2560 events.
[15:40:37.909] <TB0> INFO: 2560 events read in total (294ms).
[15:40:37.910] <TB0> INFO: Test took 1193ms.
[15:40:37.912] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:38.219] <TB0> INFO: Expecting 2560 events.
[15:40:39.110] <TB0> INFO: 2560 events read in total (299ms).
[15:40:39.110] <TB0> INFO: Test took 1198ms.
[15:40:39.112] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:39.419] <TB0> INFO: Expecting 2560 events.
[15:40:40.302] <TB0> INFO: 2560 events read in total (291ms).
[15:40:40.302] <TB0> INFO: Test took 1190ms.
[15:40:40.305] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:40.612] <TB0> INFO: Expecting 2560 events.
[15:40:41.499] <TB0> INFO: 2560 events read in total (296ms).
[15:40:41.500] <TB0> INFO: Test took 1195ms.
[15:40:41.502] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:41.809] <TB0> INFO: Expecting 2560 events.
[15:40:42.699] <TB0> INFO: 2560 events read in total (298ms).
[15:40:42.699] <TB0> INFO: Test took 1197ms.
[15:40:42.701] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:43.009] <TB0> INFO: Expecting 2560 events.
[15:40:43.900] <TB0> INFO: 2560 events read in total (299ms).
[15:40:43.900] <TB0> INFO: Test took 1199ms.
[15:40:43.903] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:44.208] <TB0> INFO: Expecting 2560 events.
[15:40:45.104] <TB0> INFO: 2560 events read in total (304ms).
[15:40:45.104] <TB0> INFO: Test took 1201ms.
[15:40:45.107] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:45.413] <TB0> INFO: Expecting 2560 events.
[15:40:46.307] <TB0> INFO: 2560 events read in total (303ms).
[15:40:46.307] <TB0> INFO: Test took 1200ms.
[15:40:46.311] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:46.615] <TB0> INFO: Expecting 2560 events.
[15:40:47.512] <TB0> INFO: 2560 events read in total (305ms).
[15:40:47.513] <TB0> INFO: Test took 1203ms.
[15:40:47.516] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:47.820] <TB0> INFO: Expecting 2560 events.
[15:40:48.713] <TB0> INFO: 2560 events read in total (301ms).
[15:40:48.714] <TB0> INFO: Test took 1199ms.
[15:40:48.716] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:49.021] <TB0> INFO: Expecting 2560 events.
[15:40:49.909] <TB0> INFO: 2560 events read in total (296ms).
[15:40:49.909] <TB0> INFO: Test took 1193ms.
[15:40:49.912] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:50.217] <TB0> INFO: Expecting 2560 events.
[15:40:51.104] <TB0> INFO: 2560 events read in total (295ms).
[15:40:51.105] <TB0> INFO: Test took 1194ms.
[15:40:51.108] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:51.413] <TB0> INFO: Expecting 2560 events.
[15:40:52.303] <TB0> INFO: 2560 events read in total (298ms).
[15:40:52.303] <TB0> INFO: Test took 1196ms.
[15:40:52.307] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:40:52.611] <TB0> INFO: Expecting 2560 events.
[15:40:53.501] <TB0> INFO: 2560 events read in total (297ms).
[15:40:53.501] <TB0> INFO: Test took 1194ms.
[15:40:53.983] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[15:40:53.983] <TB0> INFO: PH scale (per ROC): 62 69 67 56 49 47 42 52 59 63 48 59 68 56 57 50
[15:40:53.983] <TB0> INFO: PH offset (per ROC): 133 119 116 123 115 109 99 130 117 135 111 124 113 127 119 102
[15:40:53.993] <TB0> INFO: Decoding statistics:
[15:40:53.993] <TB0> INFO: General information:
[15:40:53.993] <TB0> INFO: 16bit words read: 127882
[15:40:53.993] <TB0> INFO: valid events total: 20480
[15:40:53.993] <TB0> INFO: empty events: 17979
[15:40:53.993] <TB0> INFO: valid events with pixels: 2501
[15:40:53.993] <TB0> INFO: valid pixel hits: 2501
[15:40:53.993] <TB0> INFO: Event errors: 0
[15:40:53.993] <TB0> INFO: start marker: 0
[15:40:53.993] <TB0> INFO: stop marker: 0
[15:40:53.993] <TB0> INFO: overflow: 0
[15:40:53.993] <TB0> INFO: invalid 5bit words: 0
[15:40:53.993] <TB0> INFO: invalid XOR eye diagram: 0
[15:40:53.993] <TB0> INFO: frame (failed synchr.): 0
[15:40:53.993] <TB0> INFO: idle data (no TBM trl): 0
[15:40:53.993] <TB0> INFO: no data (only TBM hdr): 0
[15:40:53.993] <TB0> INFO: TBM errors: 0
[15:40:53.993] <TB0> INFO: flawed TBM headers: 0
[15:40:53.993] <TB0> INFO: flawed TBM trailers: 0
[15:40:53.993] <TB0> INFO: event ID mismatches: 0
[15:40:53.993] <TB0> INFO: ROC errors: 0
[15:40:53.993] <TB0> INFO: missing ROC header(s): 0
[15:40:53.993] <TB0> INFO: misplaced readback start: 0
[15:40:53.993] <TB0> INFO: Pixel decoding errors: 0
[15:40:53.993] <TB0> INFO: pixel data incomplete: 0
[15:40:53.993] <TB0> INFO: pixel address: 0
[15:40:53.993] <TB0> INFO: pulse height fill bit: 0
[15:40:53.993] <TB0> INFO: buffer corruption: 0
[15:40:54.175] <TB0> INFO: ######################################################################
[15:40:54.175] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:40:54.175] <TB0> INFO: ######################################################################
[15:40:54.189] <TB0> INFO: scanning low vcal = 10
[15:40:54.427] <TB0> INFO: Expecting 41600 events.
[15:40:58.036] <TB0> INFO: 41600 events read in total (3017ms).
[15:40:58.036] <TB0> INFO: Test took 3847ms.
[15:40:58.039] <TB0> INFO: scanning low vcal = 20
[15:40:58.332] <TB0> INFO: Expecting 41600 events.
[15:41:01.939] <TB0> INFO: 41600 events read in total (3016ms).
[15:41:01.939] <TB0> INFO: Test took 3900ms.
[15:41:01.941] <TB0> INFO: scanning low vcal = 30
[15:41:02.237] <TB0> INFO: Expecting 41600 events.
[15:41:05.893] <TB0> INFO: 41600 events read in total (3064ms).
[15:41:05.894] <TB0> INFO: Test took 3953ms.
[15:41:05.897] <TB0> INFO: scanning low vcal = 40
[15:41:06.173] <TB0> INFO: Expecting 41600 events.
[15:41:10.163] <TB0> INFO: 41600 events read in total (3398ms).
[15:41:10.165] <TB0> INFO: Test took 4268ms.
[15:41:10.168] <TB0> INFO: scanning low vcal = 50
[15:41:10.446] <TB0> INFO: Expecting 41600 events.
[15:41:14.541] <TB0> INFO: 41600 events read in total (3504ms).
[15:41:14.542] <TB0> INFO: Test took 4374ms.
[15:41:14.545] <TB0> INFO: scanning low vcal = 60
[15:41:14.822] <TB0> INFO: Expecting 41600 events.
[15:41:18.820] <TB0> INFO: 41600 events read in total (3406ms).
[15:41:18.820] <TB0> INFO: Test took 4275ms.
[15:41:18.825] <TB0> INFO: scanning low vcal = 70
[15:41:19.101] <TB0> INFO: Expecting 41600 events.
[15:41:23.099] <TB0> INFO: 41600 events read in total (3406ms).
[15:41:23.100] <TB0> INFO: Test took 4274ms.
[15:41:23.103] <TB0> INFO: scanning low vcal = 80
[15:41:23.380] <TB0> INFO: Expecting 41600 events.
[15:41:27.374] <TB0> INFO: 41600 events read in total (3402ms).
[15:41:27.375] <TB0> INFO: Test took 4272ms.
[15:41:27.378] <TB0> INFO: scanning low vcal = 90
[15:41:27.654] <TB0> INFO: Expecting 41600 events.
[15:41:31.671] <TB0> INFO: 41600 events read in total (3425ms).
[15:41:31.672] <TB0> INFO: Test took 4294ms.
[15:41:31.677] <TB0> INFO: scanning low vcal = 100
[15:41:31.952] <TB0> INFO: Expecting 41600 events.
[15:41:35.990] <TB0> INFO: 41600 events read in total (3446ms).
[15:41:35.991] <TB0> INFO: Test took 4313ms.
[15:41:35.994] <TB0> INFO: scanning low vcal = 110
[15:41:36.270] <TB0> INFO: Expecting 41600 events.
[15:41:40.245] <TB0> INFO: 41600 events read in total (3383ms).
[15:41:40.246] <TB0> INFO: Test took 4252ms.
[15:41:40.249] <TB0> INFO: scanning low vcal = 120
[15:41:40.527] <TB0> INFO: Expecting 41600 events.
[15:41:44.570] <TB0> INFO: 41600 events read in total (3452ms).
[15:41:44.571] <TB0> INFO: Test took 4322ms.
[15:41:44.573] <TB0> INFO: scanning low vcal = 130
[15:41:44.851] <TB0> INFO: Expecting 41600 events.
[15:41:48.845] <TB0> INFO: 41600 events read in total (3402ms).
[15:41:48.846] <TB0> INFO: Test took 4272ms.
[15:41:48.849] <TB0> INFO: scanning low vcal = 140
[15:41:49.128] <TB0> INFO: Expecting 41600 events.
[15:41:53.145] <TB0> INFO: 41600 events read in total (3425ms).
[15:41:53.146] <TB0> INFO: Test took 4297ms.
[15:41:53.149] <TB0> INFO: scanning low vcal = 150
[15:41:53.426] <TB0> INFO: Expecting 41600 events.
[15:41:57.482] <TB0> INFO: 41600 events read in total (3464ms).
[15:41:57.483] <TB0> INFO: Test took 4333ms.
[15:41:57.486] <TB0> INFO: scanning low vcal = 160
[15:41:57.763] <TB0> INFO: Expecting 41600 events.
[15:42:01.761] <TB0> INFO: 41600 events read in total (3406ms).
[15:42:01.762] <TB0> INFO: Test took 4276ms.
[15:42:01.765] <TB0> INFO: scanning low vcal = 170
[15:42:02.042] <TB0> INFO: Expecting 41600 events.
[15:42:06.054] <TB0> INFO: 41600 events read in total (3420ms).
[15:42:06.055] <TB0> INFO: Test took 4290ms.
[15:42:06.063] <TB0> INFO: scanning low vcal = 180
[15:42:06.335] <TB0> INFO: Expecting 41600 events.
[15:42:10.348] <TB0> INFO: 41600 events read in total (3421ms).
[15:42:10.349] <TB0> INFO: Test took 4286ms.
[15:42:10.352] <TB0> INFO: scanning low vcal = 190
[15:42:10.630] <TB0> INFO: Expecting 41600 events.
[15:42:14.690] <TB0> INFO: 41600 events read in total (3468ms).
[15:42:14.691] <TB0> INFO: Test took 4339ms.
[15:42:14.694] <TB0> INFO: scanning low vcal = 200
[15:42:14.972] <TB0> INFO: Expecting 41600 events.
[15:42:19.019] <TB0> INFO: 41600 events read in total (3456ms).
[15:42:19.020] <TB0> INFO: Test took 4326ms.
[15:42:19.023] <TB0> INFO: scanning low vcal = 210
[15:42:19.300] <TB0> INFO: Expecting 41600 events.
[15:42:23.302] <TB0> INFO: 41600 events read in total (3410ms).
[15:42:23.303] <TB0> INFO: Test took 4280ms.
[15:42:23.308] <TB0> INFO: scanning low vcal = 220
[15:42:23.589] <TB0> INFO: Expecting 41600 events.
[15:42:27.628] <TB0> INFO: 41600 events read in total (3448ms).
[15:42:27.629] <TB0> INFO: Test took 4321ms.
[15:42:27.632] <TB0> INFO: scanning low vcal = 230
[15:42:27.909] <TB0> INFO: Expecting 41600 events.
[15:42:31.951] <TB0> INFO: 41600 events read in total (3451ms).
[15:42:31.952] <TB0> INFO: Test took 4320ms.
[15:42:31.955] <TB0> INFO: scanning low vcal = 240
[15:42:32.232] <TB0> INFO: Expecting 41600 events.
[15:42:36.290] <TB0> INFO: 41600 events read in total (3466ms).
[15:42:36.291] <TB0> INFO: Test took 4336ms.
[15:42:36.294] <TB0> INFO: scanning low vcal = 250
[15:42:36.572] <TB0> INFO: Expecting 41600 events.
[15:42:40.659] <TB0> INFO: 41600 events read in total (3495ms).
[15:42:40.660] <TB0> INFO: Test took 4366ms.
[15:42:40.664] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[15:42:40.941] <TB0> INFO: Expecting 41600 events.
[15:42:45.010] <TB0> INFO: 41600 events read in total (3477ms).
[15:42:45.011] <TB0> INFO: Test took 4347ms.
[15:42:45.014] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[15:42:45.291] <TB0> INFO: Expecting 41600 events.
[15:42:49.327] <TB0> INFO: 41600 events read in total (3444ms).
[15:42:49.328] <TB0> INFO: Test took 4314ms.
[15:42:49.331] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[15:42:49.608] <TB0> INFO: Expecting 41600 events.
[15:42:53.651] <TB0> INFO: 41600 events read in total (3451ms).
[15:42:53.652] <TB0> INFO: Test took 4321ms.
[15:42:53.655] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[15:42:53.932] <TB0> INFO: Expecting 41600 events.
[15:42:57.968] <TB0> INFO: 41600 events read in total (3444ms).
[15:42:57.969] <TB0> INFO: Test took 4314ms.
[15:42:57.972] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:42:58.249] <TB0> INFO: Expecting 41600 events.
[15:43:02.318] <TB0> INFO: 41600 events read in total (3477ms).
[15:43:02.319] <TB0> INFO: Test took 4347ms.
[15:43:02.709] <TB0> INFO: PixTestGainPedestal::measure() done
[15:43:37.788] <TB0> INFO: PixTestGainPedestal::fit() done
[15:43:37.788] <TB0> INFO: non-linearity mean: 0.981 0.984 0.983 0.980 0.968 0.924 0.908 0.981 0.983 0.985 0.958 0.979 0.987 0.983 0.980 0.969
[15:43:37.788] <TB0> INFO: non-linearity RMS: 0.004 0.003 0.005 0.003 0.024 0.100 0.110 0.003 0.003 0.004 0.044 0.003 0.002 0.004 0.003 0.030
[15:43:37.788] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[15:43:37.802] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[15:43:37.815] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[15:43:37.829] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[15:43:37.842] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[15:43:37.856] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[15:43:37.869] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[15:43:37.883] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[15:43:37.896] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[15:43:37.909] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[15:43:37.922] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[15:43:37.938] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[15:43:37.951] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[15:43:37.965] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[15:43:37.978] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[15:43:37.991] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1127_FullQualification_2016-11-07_11h17m_1478513836//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[15:43:38.005] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[15:43:38.005] <TB0> INFO: Decoding statistics:
[15:43:38.005] <TB0> INFO: General information:
[15:43:38.005] <TB0> INFO: 16bit words read: 3327804
[15:43:38.005] <TB0> INFO: valid events total: 332800
[15:43:38.005] <TB0> INFO: empty events: 0
[15:43:38.005] <TB0> INFO: valid events with pixels: 332800
[15:43:38.005] <TB0> INFO: valid pixel hits: 665502
[15:43:38.005] <TB0> INFO: Event errors: 0
[15:43:38.005] <TB0> INFO: start marker: 0
[15:43:38.005] <TB0> INFO: stop marker: 0
[15:43:38.005] <TB0> INFO: overflow: 0
[15:43:38.005] <TB0> INFO: invalid 5bit words: 0
[15:43:38.005] <TB0> INFO: invalid XOR eye diagram: 0
[15:43:38.005] <TB0> INFO: frame (failed synchr.): 0
[15:43:38.005] <TB0> INFO: idle data (no TBM trl): 0
[15:43:38.005] <TB0> INFO: no data (only TBM hdr): 0
[15:43:38.005] <TB0> INFO: TBM errors: 0
[15:43:38.005] <TB0> INFO: flawed TBM headers: 0
[15:43:38.005] <TB0> INFO: flawed TBM trailers: 0
[15:43:38.005] <TB0> INFO: event ID mismatches: 0
[15:43:38.005] <TB0> INFO: ROC errors: 0
[15:43:38.005] <TB0> INFO: missing ROC header(s): 0
[15:43:38.005] <TB0> INFO: misplaced readback start: 0
[15:43:38.005] <TB0> INFO: Pixel decoding errors: 0
[15:43:38.005] <TB0> INFO: pixel data incomplete: 0
[15:43:38.005] <TB0> INFO: pixel address: 0
[15:43:38.005] <TB0> INFO: pulse height fill bit: 0
[15:43:38.005] <TB0> INFO: buffer corruption: 0
[15:43:38.022] <TB0> INFO: Decoding statistics:
[15:43:38.022] <TB0> INFO: General information:
[15:43:38.022] <TB0> INFO: 16bit words read: 3457222
[15:43:38.022] <TB0> INFO: valid events total: 353536
[15:43:38.022] <TB0> INFO: empty events: 18235
[15:43:38.022] <TB0> INFO: valid events with pixels: 335301
[15:43:38.022] <TB0> INFO: valid pixel hits: 668003
[15:43:38.022] <TB0> INFO: Event errors: 0
[15:43:38.022] <TB0> INFO: start marker: 0
[15:43:38.022] <TB0> INFO: stop marker: 0
[15:43:38.022] <TB0> INFO: overflow: 0
[15:43:38.022] <TB0> INFO: invalid 5bit words: 0
[15:43:38.022] <TB0> INFO: invalid XOR eye diagram: 0
[15:43:38.022] <TB0> INFO: frame (failed synchr.): 0
[15:43:38.022] <TB0> INFO: idle data (no TBM trl): 0
[15:43:38.022] <TB0> INFO: no data (only TBM hdr): 0
[15:43:38.022] <TB0> INFO: TBM errors: 0
[15:43:38.022] <TB0> INFO: flawed TBM headers: 0
[15:43:38.022] <TB0> INFO: flawed TBM trailers: 0
[15:43:38.022] <TB0> INFO: event ID mismatches: 0
[15:43:38.022] <TB0> INFO: ROC errors: 0
[15:43:38.022] <TB0> INFO: missing ROC header(s): 0
[15:43:38.022] <TB0> INFO: misplaced readback start: 0
[15:43:38.022] <TB0> INFO: Pixel decoding errors: 0
[15:43:38.022] <TB0> INFO: pixel data incomplete: 0
[15:43:38.022] <TB0> INFO: pixel address: 0
[15:43:38.022] <TB0> INFO: pulse height fill bit: 0
[15:43:38.022] <TB0> INFO: buffer corruption: 0
[15:43:38.022] <TB0> INFO: enter test to run
[15:43:38.022] <TB0> INFO: test: exit no parameter change
[15:43:38.149] <TB0> QUIET: Connection to board 71 closed.
[15:43:38.150] <TB0> INFO: pXar: this is the end, my friend