[09:38:45.573] <TB0> INFO: *** Welcome to pxar ***
[09:38:45.573] <TB0> INFO: *** Today: 2016/11/09
[09:38:45.602] <TB0> INFO: *** Version: c8ba-dirty
[09:38:45.602] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C15.dat
[09:38:45.603] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C1b.dat
[09:38:45.603] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//defaultMaskFile.dat
[09:38:45.603] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters_C15.dat
[09:38:45.664] <TB0> INFO: clk: 4
[09:38:45.664] <TB0> INFO: ctr: 4
[09:38:45.664] <TB0> INFO: sda: 19
[09:38:45.664] <TB0> INFO: tin: 9
[09:38:45.664] <TB0> INFO: level: 15
[09:38:45.664] <TB0> INFO: triggerdelay: 0
[09:38:45.664] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[09:38:45.664] <TB0> INFO: Log level: INFO
[09:38:45.673] <TB0> INFO: Found DTB DTB_WRQ4OZ
[09:38:45.683] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[09:38:45.685] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[09:38:45.687] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[09:38:47.174] <TB0> INFO: DUT info:
[09:38:47.174] <TB0> INFO: The DUT currently contains the following objects:
[09:38:47.174] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[09:38:47.174] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:38:47.174] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:38:47.174] <TB0> INFO: TBM Core alpha (2): 7 registers set
[09:38:47.174] <TB0> INFO: TBM Core beta (3): 7 registers set
[09:38:47.174] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[09:38:47.174] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.174] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:38:47.576] <TB0> INFO: enter 'restricted' command line mode
[09:38:47.576] <TB0> INFO: enter test to run
[09:38:47.576] <TB0> INFO: test: pretest no parameter change
[09:38:47.576] <TB0> INFO: running: pretest
[09:38:47.584] <TB0> INFO: ######################################################################
[09:38:47.584] <TB0> INFO: PixTestPretest::doTest()
[09:38:47.584] <TB0> INFO: ######################################################################
[09:38:47.585] <TB0> INFO: ----------------------------------------------------------------------
[09:38:47.585] <TB0> INFO: PixTestPretest::programROC()
[09:38:47.585] <TB0> INFO: ----------------------------------------------------------------------
[09:39:05.599] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:39:05.599] <TB0> INFO: IA differences per ROC: 18.5 19.3 22.5 19.3 20.9 20.1 21.7 19.3 20.9 16.9 17.7 17.7 20.9 20.1 20.1 20.1
[09:39:05.681] <TB0> INFO: ----------------------------------------------------------------------
[09:39:05.681] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:39:05.681] <TB0> INFO: ----------------------------------------------------------------------
[09:39:12.458] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[09:39:12.458] <TB0> INFO: i(loss) [mA/ROC]: 18.5 19.3 18.5 19.3 18.5 19.3 20.1 19.3 18.5 18.5 19.3 19.3 19.3 19.3 19.3 19.3
[09:39:12.485] <TB0> INFO: ----------------------------------------------------------------------
[09:39:12.485] <TB0> INFO: PixTestPretest::findTiming()
[09:39:12.485] <TB0> INFO: ----------------------------------------------------------------------
[09:39:12.485] <TB0> INFO: PixTestCmd::init()

[09:39:43.777] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:39:43.777] <TB0> INFO: (success/tries = 100/100), width = 3
[09:39:45.283] <TB0> INFO: ----------------------------------------------------------------------
[09:39:45.283] <TB0> INFO: PixTestPretest::findWorkingPixel()
[09:39:45.283] <TB0> INFO: ----------------------------------------------------------------------
[09:39:45.376] <TB0> INFO: Expecting 231680 events.
[09:39:55.123] <TB0> INFO: 231680 events read in total (9155ms).
[09:39:55.136] <TB0> INFO: Test took 9849ms.
[09:39:55.389] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:39:55.423] <TB0> INFO: ----------------------------------------------------------------------
[09:39:55.423] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[09:39:55.423] <TB0> INFO: ----------------------------------------------------------------------
[09:39:55.516] <TB0> INFO: Expecting 231680 events.
[09:40:05.293] <TB0> INFO: 231680 events read in total (9185ms).
[09:40:05.305] <TB0> INFO: Test took 9878ms.
[09:40:05.559] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[09:40:05.559] <TB0> INFO: CalDel: 82 87 99 101 98 96 84 91 106 111 111 96 100 93 93 101
[09:40:05.559] <TB0> INFO: VthrComp: 51 51 51 51 51 55 51 51 51 51 51 51 51 51 51 51
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C0.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C1.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C2.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C3.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C4.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C5.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C6.dat
[09:40:05.561] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C7.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C8.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C9.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C10.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C11.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C12.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C13.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C14.dat
[09:40:05.562] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters_C15.dat
[09:40:05.562] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C0a.dat
[09:40:05.562] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C0b.dat
[09:40:05.562] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C1a.dat
[09:40:05.562] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//tbmParameters_C1b.dat
[09:40:05.562] <TB0> INFO: PixTestPretest::doTest() done, duration: 77 seconds
[09:40:05.614] <TB0> INFO: enter test to run
[09:40:05.614] <TB0> INFO: test: FullTest no parameter change
[09:40:05.614] <TB0> INFO: running: fulltest
[09:40:05.614] <TB0> INFO: ######################################################################
[09:40:05.614] <TB0> INFO: PixTestFullTest::doTest()
[09:40:05.614] <TB0> INFO: ######################################################################
[09:40:05.615] <TB0> INFO: ######################################################################
[09:40:05.615] <TB0> INFO: PixTestAlive::doTest()
[09:40:05.615] <TB0> INFO: ######################################################################
[09:40:05.617] <TB0> INFO: ----------------------------------------------------------------------
[09:40:05.617] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:40:05.617] <TB0> INFO: ----------------------------------------------------------------------
[09:40:05.854] <TB0> INFO: Expecting 41600 events.
[09:40:09.345] <TB0> INFO: 41600 events read in total (2900ms).
[09:40:09.346] <TB0> INFO: Test took 3728ms.
[09:40:09.576] <TB0> INFO: PixTestAlive::aliveTest() done
[09:40:09.576] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:40:09.577] <TB0> INFO: ----------------------------------------------------------------------
[09:40:09.577] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:40:09.577] <TB0> INFO: ----------------------------------------------------------------------
[09:40:09.825] <TB0> INFO: Expecting 41600 events.
[09:40:12.874] <TB0> INFO: 41600 events read in total (2457ms).
[09:40:12.874] <TB0> INFO: Test took 3295ms.
[09:40:12.875] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:40:13.114] <TB0> INFO: PixTestAlive::maskTest() done
[09:40:13.114] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:40:13.116] <TB0> INFO: ----------------------------------------------------------------------
[09:40:13.116] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:40:13.116] <TB0> INFO: ----------------------------------------------------------------------
[09:40:13.353] <TB0> INFO: Expecting 41600 events.
[09:40:16.827] <TB0> INFO: 41600 events read in total (2883ms).
[09:40:16.828] <TB0> INFO: Test took 3711ms.
[09:40:17.061] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[09:40:17.061] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:40:17.061] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[09:40:17.062] <TB0> INFO: Decoding statistics:
[09:40:17.062] <TB0> INFO: General information:
[09:40:17.062] <TB0> INFO: 16bit words read: 0
[09:40:17.062] <TB0> INFO: valid events total: 0
[09:40:17.062] <TB0> INFO: empty events: 0
[09:40:17.062] <TB0> INFO: valid events with pixels: 0
[09:40:17.062] <TB0> INFO: valid pixel hits: 0
[09:40:17.062] <TB0> INFO: Event errors: 0
[09:40:17.062] <TB0> INFO: start marker: 0
[09:40:17.062] <TB0> INFO: stop marker: 0
[09:40:17.062] <TB0> INFO: overflow: 0
[09:40:17.062] <TB0> INFO: invalid 5bit words: 0
[09:40:17.062] <TB0> INFO: invalid XOR eye diagram: 0
[09:40:17.062] <TB0> INFO: frame (failed synchr.): 0
[09:40:17.062] <TB0> INFO: idle data (no TBM trl): 0
[09:40:17.062] <TB0> INFO: no data (only TBM hdr): 0
[09:40:17.062] <TB0> INFO: TBM errors: 0
[09:40:17.062] <TB0> INFO: flawed TBM headers: 0
[09:40:17.062] <TB0> INFO: flawed TBM trailers: 0
[09:40:17.062] <TB0> INFO: event ID mismatches: 0
[09:40:17.062] <TB0> INFO: ROC errors: 0
[09:40:17.062] <TB0> INFO: missing ROC header(s): 0
[09:40:17.062] <TB0> INFO: misplaced readback start: 0
[09:40:17.062] <TB0> INFO: Pixel decoding errors: 0
[09:40:17.062] <TB0> INFO: pixel data incomplete: 0
[09:40:17.062] <TB0> INFO: pixel address: 0
[09:40:17.062] <TB0> INFO: pulse height fill bit: 0
[09:40:17.062] <TB0> INFO: buffer corruption: 0
[09:40:17.066] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C15.dat
[09:40:17.066] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr_C15.dat

[09:40:17.066] <TB0> INFO: ######################################################################
[09:40:17.066] <TB0> INFO: PixTestReadback::doTest()
[09:40:17.066] <TB0> INFO: ######################################################################
[09:40:17.066] <TB0> INFO: ----------------------------------------------------------------------
[09:40:17.066] <TB0> INFO: PixTestReadback::CalibrateVd()
[09:40:17.066] <TB0> INFO: ----------------------------------------------------------------------
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C0.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C1.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C2.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C3.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C4.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C5.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C6.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C7.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C8.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C9.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C10.dat
[09:40:26.998] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C11.dat
[09:40:26.999] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C12.dat
[09:40:26.999] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C13.dat
[09:40:26.999] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C14.dat
[09:40:26.999] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C15.dat
[09:40:27.031] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[09:40:27.031] <TB0> INFO: ----------------------------------------------------------------------
[09:40:27.031] <TB0> INFO: PixTestReadback::CalibrateVa()
[09:40:27.031] <TB0> INFO: ----------------------------------------------------------------------
[09:40:36.934] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C0.dat
[09:40:36.934] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C1.dat
[09:40:36.934] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C2.dat
[09:40:36.934] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C3.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C4.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C5.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C6.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C7.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C8.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C9.dat
[09:40:36.935] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C10.dat
[09:40:36.936] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C11.dat
[09:40:36.936] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C12.dat
[09:40:36.936] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C13.dat
[09:40:36.936] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C14.dat
[09:40:36.936] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C15.dat
[09:40:36.965] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[09:40:36.965] <TB0> INFO: ----------------------------------------------------------------------
[09:40:36.965] <TB0> INFO: PixTestReadback::readbackVbg()
[09:40:36.965] <TB0> INFO: ----------------------------------------------------------------------
[09:40:44.614] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[09:40:44.614] <TB0> INFO: ----------------------------------------------------------------------
[09:40:44.614] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[09:40:44.614] <TB0> INFO: ----------------------------------------------------------------------
[09:40:44.614] <TB0> INFO: Vbg will be calibrated using Vd calibration
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.5calibrated Vbg = 1.17283 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.8calibrated Vbg = 1.16606 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 159calibrated Vbg = 1.17417 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.9calibrated Vbg = 1.16434 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 168.4calibrated Vbg = 1.16677 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157calibrated Vbg = 1.16899 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152calibrated Vbg = 1.17669 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161calibrated Vbg = 1.17725 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158.6calibrated Vbg = 1.16981 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 163.4calibrated Vbg = 1.16409 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.3calibrated Vbg = 1.15908 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152calibrated Vbg = 1.15248 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 164.9calibrated Vbg = 1.1641 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.9calibrated Vbg = 1.17212 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 148.4calibrated Vbg = 1.16815 :::*/*/*/*/
[09:40:44.614] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158.2calibrated Vbg = 1.167 :::*/*/*/*/
[09:40:44.616] <TB0> INFO: ----------------------------------------------------------------------
[09:40:44.616] <TB0> INFO: PixTestReadback::CalibrateIa()
[09:40:44.616] <TB0> INFO: ----------------------------------------------------------------------
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C0.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C1.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C2.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C3.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C4.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C5.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C6.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C7.dat
[09:43:24.931] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C8.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C9.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C10.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C11.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C12.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C13.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C14.dat
[09:43:24.932] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//readbackCal_C15.dat
[09:43:24.959] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[09:43:24.960] <TB0> INFO: PixTestReadback::doTest() done
[09:43:24.961] <TB0> INFO: Decoding statistics:
[09:43:24.961] <TB0> INFO: General information:
[09:43:24.961] <TB0> INFO: 16bit words read: 1536
[09:43:24.961] <TB0> INFO: valid events total: 256
[09:43:24.961] <TB0> INFO: empty events: 256
[09:43:24.961] <TB0> INFO: valid events with pixels: 0
[09:43:24.961] <TB0> INFO: valid pixel hits: 0
[09:43:24.961] <TB0> INFO: Event errors: 0
[09:43:24.961] <TB0> INFO: start marker: 0
[09:43:24.961] <TB0> INFO: stop marker: 0
[09:43:24.961] <TB0> INFO: overflow: 0
[09:43:24.961] <TB0> INFO: invalid 5bit words: 0
[09:43:24.961] <TB0> INFO: invalid XOR eye diagram: 0
[09:43:24.961] <TB0> INFO: frame (failed synchr.): 0
[09:43:24.961] <TB0> INFO: idle data (no TBM trl): 0
[09:43:24.961] <TB0> INFO: no data (only TBM hdr): 0
[09:43:24.961] <TB0> INFO: TBM errors: 0
[09:43:24.961] <TB0> INFO: flawed TBM headers: 0
[09:43:24.961] <TB0> INFO: flawed TBM trailers: 0
[09:43:24.961] <TB0> INFO: event ID mismatches: 0
[09:43:24.961] <TB0> INFO: ROC errors: 0
[09:43:24.961] <TB0> INFO: missing ROC header(s): 0
[09:43:24.961] <TB0> INFO: misplaced readback start: 0
[09:43:24.961] <TB0> INFO: Pixel decoding errors: 0
[09:43:24.961] <TB0> INFO: pixel data incomplete: 0
[09:43:24.961] <TB0> INFO: pixel address: 0
[09:43:24.961] <TB0> INFO: pulse height fill bit: 0
[09:43:24.961] <TB0> INFO: buffer corruption: 0
[09:43:25.015] <TB0> INFO: ######################################################################
[09:43:25.015] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:43:25.015] <TB0> INFO: ######################################################################
[09:43:25.018] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:43:25.067] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[09:43:25.067] <TB0> INFO: run 1 of 1
[09:43:25.367] <TB0> INFO: Expecting 3120000 events.
[09:43:57.617] <TB0> INFO: 682340 events read in total (31659ms).











[09:44:28.949] <TB0> INFO: 1363240 events read in total (62991ms).











[09:45:00.656] <TB0> INFO: 2042055 events read in total (94698ms).
[09:45:32.507] <TB0> INFO: 2721140 events read in total (126549ms).











[09:45:51.181] <TB0> INFO: 3120000 events read in total (145223ms).
[09:45:51.265] <TB0> INFO: Test took 146199ms.
[09:46:14.692] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 169 seconds
[09:46:14.692] <TB0> INFO: number of dead bumps (per ROC): 0 0 1 1 1 0 1 1 0 0 2 1 0 0 0 0
[09:46:14.692] <TB0> INFO: separation cut (per ROC): 104 108 118 105 107 117 111 116 108 104 107 112 114 111 118 105
[09:46:14.692] <TB0> INFO: Decoding statistics:
[09:46:14.692] <TB0> INFO: General information:
[09:46:14.692] <TB0> INFO: 16bit words read: 0
[09:46:14.692] <TB0> INFO: valid events total: 0
[09:46:14.692] <TB0> INFO: empty events: 0
[09:46:14.692] <TB0> INFO: valid events with pixels: 0
[09:46:14.692] <TB0> INFO: valid pixel hits: 0
[09:46:14.692] <TB0> INFO: Event errors: 0
[09:46:14.692] <TB0> INFO: start marker: 0
[09:46:14.692] <TB0> INFO: stop marker: 0
[09:46:14.692] <TB0> INFO: overflow: 0
[09:46:14.692] <TB0> INFO: invalid 5bit words: 0
[09:46:14.692] <TB0> INFO: invalid XOR eye diagram: 0
[09:46:14.692] <TB0> INFO: frame (failed synchr.): 0
[09:46:14.692] <TB0> INFO: idle data (no TBM trl): 0
[09:46:14.692] <TB0> INFO: no data (only TBM hdr): 0
[09:46:14.692] <TB0> INFO: TBM errors: 0
[09:46:14.692] <TB0> INFO: flawed TBM headers: 0
[09:46:14.692] <TB0> INFO: flawed TBM trailers: 0
[09:46:14.692] <TB0> INFO: event ID mismatches: 0
[09:46:14.692] <TB0> INFO: ROC errors: 0
[09:46:14.692] <TB0> INFO: missing ROC header(s): 0
[09:46:14.692] <TB0> INFO: misplaced readback start: 0
[09:46:14.692] <TB0> INFO: Pixel decoding errors: 0
[09:46:14.692] <TB0> INFO: pixel data incomplete: 0
[09:46:14.692] <TB0> INFO: pixel address: 0
[09:46:14.692] <TB0> INFO: pulse height fill bit: 0
[09:46:14.692] <TB0> INFO: buffer corruption: 0
[09:46:14.731] <TB0> INFO: ######################################################################
[09:46:14.731] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:46:14.731] <TB0> INFO: ######################################################################
[09:46:14.731] <TB0> INFO: ----------------------------------------------------------------------
[09:46:14.731] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:46:14.731] <TB0> INFO: ----------------------------------------------------------------------
[09:46:14.731] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[09:46:14.748] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[09:46:14.748] <TB0> INFO: run 1 of 1
[09:46:15.028] <TB0> INFO: Expecting 36608000 events.
[09:46:40.683] <TB0> INFO: 667550 events read in total (25063ms).
[09:47:04.216] <TB0> INFO: 1324050 events read in total (48596ms).
[09:47:27.724] <TB0> INFO: 1980400 events read in total (72104ms).
[09:47:50.753] <TB0> INFO: 2636150 events read in total (95133ms).
[09:48:14.411] <TB0> INFO: 3291250 events read in total (118791ms).
[09:48:37.777] <TB0> INFO: 3946850 events read in total (142158ms).
[09:49:01.687] <TB0> INFO: 4601550 events read in total (166067ms).
[09:49:25.452] <TB0> INFO: 5258950 events read in total (189832ms).
[09:49:49.405] <TB0> INFO: 5914400 events read in total (213785ms).
[09:50:12.456] <TB0> INFO: 6571000 events read in total (236836ms).
[09:50:36.541] <TB0> INFO: 7224800 events read in total (260921ms).
[09:51:00.128] <TB0> INFO: 7880850 events read in total (284508ms).
[09:51:23.864] <TB0> INFO: 8533850 events read in total (308244ms).
[09:51:47.758] <TB0> INFO: 9190800 events read in total (332138ms).
[09:52:10.929] <TB0> INFO: 9843000 events read in total (355309ms).
[09:52:34.527] <TB0> INFO: 10498750 events read in total (378907ms).
[09:52:58.670] <TB0> INFO: 11152550 events read in total (403050ms).
[09:53:22.363] <TB0> INFO: 11806500 events read in total (426743ms).
[09:53:45.793] <TB0> INFO: 12460250 events read in total (450173ms).
[09:54:09.399] <TB0> INFO: 13114950 events read in total (473779ms).
[09:54:33.122] <TB0> INFO: 13768000 events read in total (497502ms).
[09:54:56.939] <TB0> INFO: 14420450 events read in total (521319ms).
[09:55:20.184] <TB0> INFO: 15072400 events read in total (544564ms).
[09:55:43.562] <TB0> INFO: 15723800 events read in total (567942ms).
[09:56:07.651] <TB0> INFO: 16376000 events read in total (592031ms).
[09:56:31.568] <TB0> INFO: 17027350 events read in total (615948ms).
[09:56:54.981] <TB0> INFO: 17680950 events read in total (639361ms).
[09:57:18.042] <TB0> INFO: 18330400 events read in total (662422ms).
[09:57:42.045] <TB0> INFO: 18978300 events read in total (686425ms).
[09:58:05.290] <TB0> INFO: 19622850 events read in total (709670ms).
[09:58:29.025] <TB0> INFO: 20271500 events read in total (733405ms).
[09:58:52.469] <TB0> INFO: 20918150 events read in total (756849ms).
[09:59:15.778] <TB0> INFO: 21565800 events read in total (780158ms).
[09:59:39.228] <TB0> INFO: 22213200 events read in total (803608ms).
[10:00:03.040] <TB0> INFO: 22861750 events read in total (827420ms).
[10:00:26.593] <TB0> INFO: 23510550 events read in total (850973ms).
[10:00:50.432] <TB0> INFO: 24158500 events read in total (874812ms).
[10:01:13.468] <TB0> INFO: 24806300 events read in total (897848ms).
[10:01:36.462] <TB0> INFO: 25454350 events read in total (920842ms).
[10:01:59.616] <TB0> INFO: 26103050 events read in total (943996ms).
[10:02:22.985] <TB0> INFO: 26748950 events read in total (967365ms).
[10:02:46.478] <TB0> INFO: 27396200 events read in total (990858ms).
[10:03:10.325] <TB0> INFO: 28041650 events read in total (1014705ms).
[10:03:34.610] <TB0> INFO: 28688750 events read in total (1038990ms).
[10:03:58.050] <TB0> INFO: 29336250 events read in total (1062430ms).
[10:04:21.475] <TB0> INFO: 29984450 events read in total (1085855ms).
[10:04:45.016] <TB0> INFO: 30631500 events read in total (1109396ms).
[10:05:08.760] <TB0> INFO: 31279800 events read in total (1133140ms).
[10:05:32.598] <TB0> INFO: 31925500 events read in total (1156978ms).
[10:05:55.600] <TB0> INFO: 32571300 events read in total (1179980ms).
[10:06:19.189] <TB0> INFO: 33218650 events read in total (1203569ms).
[10:06:43.008] <TB0> INFO: 33865300 events read in total (1227388ms).
[10:07:06.744] <TB0> INFO: 34514550 events read in total (1251124ms).
[10:07:30.424] <TB0> INFO: 35161200 events read in total (1274804ms).
[10:07:53.786] <TB0> INFO: 35809500 events read in total (1298166ms).
[10:08:17.331] <TB0> INFO: 36465050 events read in total (1321711ms).
[10:08:22.490] <TB0> INFO: 36608000 events read in total (1326870ms).
[10:08:22.570] <TB0> INFO: Test took 1327823ms.
[10:08:23.035] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:24.534] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:26.401] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:28.372] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:30.357] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:32.757] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:35.229] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:36.999] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:39.500] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:41.825] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:43.374] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:45.389] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:47.526] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:49.978] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:52.390] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:54.070] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:08:56.370] <TB0> INFO: PixTestScurves::scurves() done
[10:08:56.370] <TB0> INFO: Vcal mean: 103.61 106.45 106.62 107.95 104.28 123.30 113.74 112.98 110.77 105.39 111.75 111.20 112.65 112.17 107.28 109.91
[10:08:56.370] <TB0> INFO: Vcal RMS: 4.88 5.47 5.15 5.01 5.27 5.92 4.66 5.77 4.93 5.69 6.27 5.19 4.41 4.92 5.53 5.03
[10:08:56.370] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1361 seconds
[10:08:56.370] <TB0> INFO: Decoding statistics:
[10:08:56.370] <TB0> INFO: General information:
[10:08:56.370] <TB0> INFO: 16bit words read: 0
[10:08:56.370] <TB0> INFO: valid events total: 0
[10:08:56.370] <TB0> INFO: empty events: 0
[10:08:56.370] <TB0> INFO: valid events with pixels: 0
[10:08:56.370] <TB0> INFO: valid pixel hits: 0
[10:08:56.370] <TB0> INFO: Event errors: 0
[10:08:56.370] <TB0> INFO: start marker: 0
[10:08:56.370] <TB0> INFO: stop marker: 0
[10:08:56.370] <TB0> INFO: overflow: 0
[10:08:56.370] <TB0> INFO: invalid 5bit words: 0
[10:08:56.370] <TB0> INFO: invalid XOR eye diagram: 0
[10:08:56.370] <TB0> INFO: frame (failed synchr.): 0
[10:08:56.370] <TB0> INFO: idle data (no TBM trl): 0
[10:08:56.370] <TB0> INFO: no data (only TBM hdr): 0
[10:08:56.370] <TB0> INFO: TBM errors: 0
[10:08:56.370] <TB0> INFO: flawed TBM headers: 0
[10:08:56.370] <TB0> INFO: flawed TBM trailers: 0
[10:08:56.370] <TB0> INFO: event ID mismatches: 0
[10:08:56.370] <TB0> INFO: ROC errors: 0
[10:08:56.370] <TB0> INFO: missing ROC header(s): 0
[10:08:56.370] <TB0> INFO: misplaced readback start: 0
[10:08:56.370] <TB0> INFO: Pixel decoding errors: 0
[10:08:56.370] <TB0> INFO: pixel data incomplete: 0
[10:08:56.370] <TB0> INFO: pixel address: 0
[10:08:56.370] <TB0> INFO: pulse height fill bit: 0
[10:08:56.370] <TB0> INFO: buffer corruption: 0
[10:08:56.469] <TB0> INFO: ######################################################################
[10:08:56.469] <TB0> INFO: PixTestTrim::doTest()
[10:08:56.469] <TB0> INFO: ######################################################################
[10:08:56.470] <TB0> INFO: ----------------------------------------------------------------------
[10:08:56.470] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:08:56.470] <TB0> INFO: ----------------------------------------------------------------------
[10:08:56.535] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:08:56.536] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:08:56.548] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:08:56.548] <TB0> INFO: run 1 of 1
[10:08:56.791] <TB0> INFO: Expecting 5025280 events.
[10:09:28.253] <TB0> INFO: 818832 events read in total (30861ms).
[10:09:59.190] <TB0> INFO: 1635504 events read in total (61799ms).
[10:10:29.580] <TB0> INFO: 2449616 events read in total (92189ms).
[10:11:00.263] <TB0> INFO: 3260080 events read in total (122871ms).
[10:11:31.419] <TB0> INFO: 4067176 events read in total (154028ms).
[10:12:02.595] <TB0> INFO: 4871896 events read in total (185203ms).
[10:12:08.620] <TB0> INFO: 5025280 events read in total (191228ms).
[10:12:08.684] <TB0> INFO: Test took 192137ms.
[10:12:30.059] <TB0> INFO: ROC 0 VthrComp = 108
[10:12:30.059] <TB0> INFO: ROC 1 VthrComp = 113
[10:12:30.060] <TB0> INFO: ROC 2 VthrComp = 116
[10:12:30.062] <TB0> INFO: ROC 3 VthrComp = 108
[10:12:30.062] <TB0> INFO: ROC 4 VthrComp = 110
[10:12:30.062] <TB0> INFO: ROC 5 VthrComp = 130
[10:12:30.063] <TB0> INFO: ROC 6 VthrComp = 125
[10:12:30.063] <TB0> INFO: ROC 7 VthrComp = 119
[10:12:30.063] <TB0> INFO: ROC 8 VthrComp = 119
[10:12:30.063] <TB0> INFO: ROC 9 VthrComp = 102
[10:12:30.063] <TB0> INFO: ROC 10 VthrComp = 105
[10:12:30.063] <TB0> INFO: ROC 11 VthrComp = 112
[10:12:30.063] <TB0> INFO: ROC 12 VthrComp = 118
[10:12:30.063] <TB0> INFO: ROC 13 VthrComp = 121
[10:12:30.063] <TB0> INFO: ROC 14 VthrComp = 110
[10:12:30.063] <TB0> INFO: ROC 15 VthrComp = 111
[10:12:30.392] <TB0> INFO: Expecting 41600 events.
[10:12:34.120] <TB0> INFO: 41600 events read in total (3136ms).
[10:12:34.121] <TB0> INFO: Test took 4054ms.
[10:12:34.133] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:12:34.133] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:12:34.147] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:12:34.147] <TB0> INFO: run 1 of 1
[10:12:34.455] <TB0> INFO: Expecting 5025280 events.
[10:13:01.626] <TB0> INFO: 589416 events read in total (26579ms).
[10:13:28.266] <TB0> INFO: 1177864 events read in total (53219ms).
[10:13:54.743] <TB0> INFO: 1767776 events read in total (79696ms).
[10:14:21.470] <TB0> INFO: 2357416 events read in total (106423ms).
[10:14:47.721] <TB0> INFO: 2944880 events read in total (132674ms).
[10:15:14.228] <TB0> INFO: 3530624 events read in total (159181ms).
[10:15:40.460] <TB0> INFO: 4115248 events read in total (185413ms).
[10:16:06.729] <TB0> INFO: 4698960 events read in total (211682ms).
[10:16:21.340] <TB0> INFO: 5025280 events read in total (226293ms).
[10:16:21.488] <TB0> INFO: Test took 227341ms.
[10:16:49.918] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 59.3746 for pixel 18/78 mean/min/max = 47.4786/35.3942/59.563
[10:16:49.918] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.4252 for pixel 6/44 mean/min/max = 45.8105/31.9684/59.6526
[10:16:49.919] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.2123 for pixel 2/17 mean/min/max = 44.9679/31.7138/58.2219
[10:16:49.919] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 63.9252 for pixel 10/1 mean/min/max = 49.2523/34.4042/64.1004
[10:16:49.920] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.7377 for pixel 2/8 mean/min/max = 47.3853/33.8988/60.8718
[10:16:49.920] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 61.259 for pixel 13/11 mean/min/max = 46.3883/31.5039/61.2726
[10:16:49.921] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 58.1964 for pixel 48/3 mean/min/max = 45.1882/31.9879/58.3885
[10:16:49.921] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 60.9249 for pixel 26/29 mean/min/max = 45.7729/30.4751/61.0707
[10:16:49.922] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 58.6529 for pixel 17/3 mean/min/max = 44.9874/31.0416/58.9332
[10:16:49.922] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 64.0319 for pixel 0/36 mean/min/max = 48.1257/32.1776/64.0737
[10:16:49.923] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 66.9428 for pixel 9/71 mean/min/max = 50.3018/33.5236/67.08
[10:16:49.923] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 61.3457 for pixel 13/37 mean/min/max = 46.8833/32.2753/61.4914
[10:16:49.924] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 58.8097 for pixel 16/7 mean/min/max = 45.6044/31.92/59.2887
[10:16:49.924] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.1869 for pixel 20/2 mean/min/max = 45.4531/31.7019/59.2043
[10:16:49.924] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.3296 for pixel 0/70 mean/min/max = 47.1981/34.0033/60.3928
[10:16:49.925] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.4251 for pixel 21/1 mean/min/max = 47.7082/33.8789/61.5374
[10:16:49.927] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:16:50.017] <TB0> INFO: Expecting 411648 events.
[10:16:59.900] <TB0> INFO: 411648 events read in total (9291ms).
[10:16:59.908] <TB0> INFO: Expecting 411648 events.
[10:17:09.218] <TB0> INFO: 411648 events read in total (8907ms).
[10:17:09.229] <TB0> INFO: Expecting 411648 events.
[10:17:18.442] <TB0> INFO: 411648 events read in total (8810ms).
[10:17:18.455] <TB0> INFO: Expecting 411648 events.
[10:17:27.631] <TB0> INFO: 411648 events read in total (8773ms).
[10:17:27.648] <TB0> INFO: Expecting 411648 events.
[10:17:36.752] <TB0> INFO: 411648 events read in total (8701ms).
[10:17:36.771] <TB0> INFO: Expecting 411648 events.
[10:17:46.189] <TB0> INFO: 411648 events read in total (9015ms).
[10:17:46.220] <TB0> INFO: Expecting 411648 events.
[10:17:55.443] <TB0> INFO: 411648 events read in total (8820ms).
[10:17:55.470] <TB0> INFO: Expecting 411648 events.
[10:18:04.837] <TB0> INFO: 411648 events read in total (8964ms).
[10:18:04.867] <TB0> INFO: Expecting 411648 events.
[10:18:13.926] <TB0> INFO: 411648 events read in total (8655ms).
[10:18:13.956] <TB0> INFO: Expecting 411648 events.
[10:18:23.138] <TB0> INFO: 411648 events read in total (8779ms).
[10:18:23.190] <TB0> INFO: Expecting 411648 events.
[10:18:32.338] <TB0> INFO: 411648 events read in total (8745ms).
[10:18:32.377] <TB0> INFO: Expecting 411648 events.
[10:18:41.667] <TB0> INFO: 411648 events read in total (8887ms).
[10:18:41.829] <TB0> INFO: Expecting 411648 events.
[10:18:51.148] <TB0> INFO: 411648 events read in total (8916ms).
[10:18:51.202] <TB0> INFO: Expecting 411648 events.
[10:19:00.395] <TB0> INFO: 411648 events read in total (8790ms).
[10:19:00.541] <TB0> INFO: Expecting 411648 events.
[10:19:09.797] <TB0> INFO: 411648 events read in total (8853ms).
[10:19:09.964] <TB0> INFO: Expecting 411648 events.
[10:19:19.237] <TB0> INFO: 411648 events read in total (8870ms).
[10:19:19.366] <TB0> INFO: Test took 149439ms.
[10:19:20.210] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:19:20.223] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:19:20.223] <TB0> INFO: run 1 of 1
[10:19:20.507] <TB0> INFO: Expecting 5025280 events.
[10:19:47.390] <TB0> INFO: 587808 events read in total (26292ms).
[10:20:14.188] <TB0> INFO: 1174152 events read in total (53091ms).
[10:20:40.942] <TB0> INFO: 1760792 events read in total (79844ms).
[10:21:07.939] <TB0> INFO: 2346216 events read in total (106841ms).
[10:21:34.914] <TB0> INFO: 2931072 events read in total (133816ms).
[10:22:01.712] <TB0> INFO: 3515752 events read in total (160614ms).
[10:22:28.556] <TB0> INFO: 4100592 events read in total (187458ms).
[10:22:55.019] <TB0> INFO: 4682728 events read in total (213921ms).
[10:23:11.005] <TB0> INFO: 5025280 events read in total (229907ms).
[10:23:11.129] <TB0> INFO: Test took 230906ms.
[10:23:37.821] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.815226 .. 144.897109
[10:23:38.114] <TB0> INFO: Expecting 208000 events.
[10:23:48.639] <TB0> INFO: 208000 events read in total (9933ms).
[10:23:48.640] <TB0> INFO: Test took 10817ms.
[10:23:48.724] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 154 (-1/-1) hits flags = 528 (plus default)
[10:23:48.739] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:23:48.739] <TB0> INFO: run 1 of 1
[10:23:49.049] <TB0> INFO: Expecting 5158400 events.
[10:24:15.937] <TB0> INFO: 586296 events read in total (26296ms).
[10:24:42.176] <TB0> INFO: 1172792 events read in total (52535ms).
[10:25:08.731] <TB0> INFO: 1759064 events read in total (79090ms).
[10:25:35.437] <TB0> INFO: 2345296 events read in total (105796ms).
[10:26:01.311] <TB0> INFO: 2931152 events read in total (131671ms).
[10:26:27.506] <TB0> INFO: 3516472 events read in total (157866ms).
[10:26:53.682] <TB0> INFO: 4101680 events read in total (184041ms).
[10:27:20.943] <TB0> INFO: 4686624 events read in total (211302ms).
[10:27:41.911] <TB0> INFO: 5158400 events read in total (232270ms).
[10:27:42.026] <TB0> INFO: Test took 233288ms.
[10:28:10.050] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.868036 .. 49.829467
[10:28:10.296] <TB0> INFO: Expecting 208000 events.
[10:28:21.358] <TB0> INFO: 208000 events read in total (10471ms).
[10:28:21.359] <TB0> INFO: Test took 11307ms.
[10:28:21.409] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[10:28:21.423] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:28:21.423] <TB0> INFO: run 1 of 1
[10:28:21.722] <TB0> INFO: Expecting 1464320 events.
[10:28:50.471] <TB0> INFO: 647928 events read in total (28157ms).
[10:29:18.762] <TB0> INFO: 1295128 events read in total (56448ms).
[10:29:26.676] <TB0> INFO: 1464320 events read in total (64362ms).
[10:29:26.713] <TB0> INFO: Test took 65291ms.
[10:29:42.836] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 25.982437 .. 47.738812
[10:29:43.177] <TB0> INFO: Expecting 208000 events.
[10:29:54.149] <TB0> INFO: 208000 events read in total (10380ms).
[10:29:54.151] <TB0> INFO: Test took 11311ms.
[10:29:54.200] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[10:29:54.217] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:29:54.217] <TB0> INFO: run 1 of 1
[10:29:54.572] <TB0> INFO: Expecting 1431040 events.
[10:30:23.240] <TB0> INFO: 659400 events read in total (28076ms).
[10:30:50.928] <TB0> INFO: 1318080 events read in total (55764ms).
[10:30:56.473] <TB0> INFO: 1431040 events read in total (61309ms).
[10:30:56.516] <TB0> INFO: Test took 62299ms.
[10:31:12.729] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 22.851299 .. 46.999900
[10:31:13.072] <TB0> INFO: Expecting 208000 events.
[10:31:23.844] <TB0> INFO: 208000 events read in total (10181ms).
[10:31:23.845] <TB0> INFO: Test took 11109ms.
[10:31:23.895] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 56 (-1/-1) hits flags = 528 (plus default)
[10:31:23.908] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:31:23.908] <TB0> INFO: run 1 of 1
[10:31:24.186] <TB0> INFO: Expecting 1497600 events.
[10:31:53.497] <TB0> INFO: 674464 events read in total (28719ms).
[10:32:22.769] <TB0> INFO: 1349144 events read in total (57991ms).
[10:32:29.552] <TB0> INFO: 1497600 events read in total (64774ms).
[10:32:29.587] <TB0> INFO: Test took 65680ms.
[10:32:42.504] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:32:42.504] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:32:42.518] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:32:42.518] <TB0> INFO: run 1 of 1
[10:32:42.759] <TB0> INFO: Expecting 1364480 events.
[10:33:11.412] <TB0> INFO: 667328 events read in total (28061ms).
[10:33:40.187] <TB0> INFO: 1334128 events read in total (56836ms).
[10:33:41.881] <TB0> INFO: 1364480 events read in total (58530ms).
[10:33:41.910] <TB0> INFO: Test took 59391ms.
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C0.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C1.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C2.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C3.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C4.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C5.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C6.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C7.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C8.dat
[10:33:55.827] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C9.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C10.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C11.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C12.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C13.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C14.dat
[10:33:55.828] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C15.dat
[10:33:55.828] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C0.dat
[10:33:55.834] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C1.dat
[10:33:55.839] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C2.dat
[10:33:55.844] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C3.dat
[10:33:55.849] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C4.dat
[10:33:55.854] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C5.dat
[10:33:55.859] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C6.dat
[10:33:55.864] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C7.dat
[10:33:55.869] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C8.dat
[10:33:55.873] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C9.dat
[10:33:55.878] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C10.dat
[10:33:55.884] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C11.dat
[10:33:55.889] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C12.dat
[10:33:55.894] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C13.dat
[10:33:55.900] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C14.dat
[10:33:55.905] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//trimParameters35_C15.dat
[10:33:55.909] <TB0> INFO: PixTestTrim::trimTest() done
[10:33:55.909] <TB0> INFO: vtrim: 118 130 115 124 128 143 135 142 106 130 141 134 133 120 116 144
[10:33:55.909] <TB0> INFO: vthrcomp: 108 113 116 108 110 130 125 119 119 102 105 112 118 121 110 111
[10:33:55.909] <TB0> INFO: vcal mean: 34.97 34.94 34.97 35.03 34.96 35.02 34.97 34.93 34.94 34.97 35.10 34.98 34.91 34.97 34.97 34.97
[10:33:55.909] <TB0> INFO: vcal RMS: 0.88 1.04 0.94 1.02 0.92 1.28 0.98 1.10 0.96 1.04 1.17 1.08 1.05 0.97 0.91 0.96
[10:33:55.910] <TB0> INFO: bits mean: 8.53 9.59 9.59 8.42 8.90 9.86 9.83 10.00 9.75 9.06 8.72 9.22 9.77 9.67 8.06 9.02
[10:33:55.910] <TB0> INFO: bits RMS: 2.52 2.67 2.73 2.65 2.59 2.58 2.62 2.69 2.77 2.74 2.64 2.82 2.61 2.65 2.94 2.55
[10:33:55.918] <TB0> INFO: ----------------------------------------------------------------------
[10:33:55.918] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:33:55.918] <TB0> INFO: ----------------------------------------------------------------------
[10:33:55.921] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:33:55.933] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:33:55.933] <TB0> INFO: run 1 of 1
[10:33:56.245] <TB0> INFO: Expecting 4160000 events.
[10:34:28.991] <TB0> INFO: 736085 events read in total (32153ms).
[10:35:01.771] <TB0> INFO: 1468360 events read in total (64933ms).
[10:35:34.162] <TB0> INFO: 2195530 events read in total (97324ms).
[10:36:07.139] <TB0> INFO: 2917825 events read in total (130301ms).
[10:36:39.081] <TB0> INFO: 3638730 events read in total (162243ms).
[10:37:02.683] <TB0> INFO: 4160000 events read in total (185845ms).
[10:37:02.796] <TB0> INFO: Test took 186863ms.
[10:37:37.210] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[10:37:37.224] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:37:37.224] <TB0> INFO: run 1 of 1
[10:37:37.562] <TB0> INFO: Expecting 4264000 events.
[10:38:10.116] <TB0> INFO: 705925 events read in total (31963ms).
[10:38:41.616] <TB0> INFO: 1408785 events read in total (63463ms).
[10:39:13.812] <TB0> INFO: 2108210 events read in total (95659ms).
[10:39:45.503] <TB0> INFO: 2802720 events read in total (127350ms).
[10:40:17.387] <TB0> INFO: 3496610 events read in total (159235ms).
[10:40:48.764] <TB0> INFO: 4190550 events read in total (190611ms).
[10:40:52.493] <TB0> INFO: 4264000 events read in total (194340ms).
[10:40:52.591] <TB0> INFO: Test took 195367ms.
[10:41:25.739] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[10:41:25.753] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:41:25.753] <TB0> INFO: run 1 of 1
[10:41:26.051] <TB0> INFO: Expecting 3889600 events.
[10:41:59.046] <TB0> INFO: 729235 events read in total (32403ms).
[10:42:31.103] <TB0> INFO: 1454755 events read in total (64460ms).
[10:43:02.980] <TB0> INFO: 2174440 events read in total (96337ms).
[10:43:34.682] <TB0> INFO: 2890205 events read in total (128039ms).
[10:44:06.767] <TB0> INFO: 3605030 events read in total (160124ms).
[10:44:19.691] <TB0> INFO: 3889600 events read in total (173048ms).
[10:44:19.784] <TB0> INFO: Test took 174030ms.
[10:44:47.506] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 187 (-1/-1) hits flags = 528 (plus default)
[10:44:47.519] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:44:47.519] <TB0> INFO: run 1 of 1
[10:44:47.756] <TB0> INFO: Expecting 3910400 events.
[10:45:20.553] <TB0> INFO: 727870 events read in total (32205ms).
[10:45:52.583] <TB0> INFO: 1452175 events read in total (64235ms).
[10:46:24.099] <TB0> INFO: 2170500 events read in total (95751ms).
[10:46:55.654] <TB0> INFO: 2885570 events read in total (127306ms).
[10:47:27.586] <TB0> INFO: 3598975 events read in total (159238ms).
[10:47:42.116] <TB0> INFO: 3910400 events read in total (173768ms).
[10:47:42.209] <TB0> INFO: Test took 174690ms.
[10:48:14.352] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[10:48:14.365] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:48:14.365] <TB0> INFO: run 1 of 1
[10:48:14.613] <TB0> INFO: Expecting 3889600 events.
[10:48:47.320] <TB0> INFO: 729370 events read in total (32115ms).
[10:49:19.565] <TB0> INFO: 1455075 events read in total (64360ms).
[10:49:51.499] <TB0> INFO: 2174595 events read in total (96294ms).
[10:50:23.988] <TB0> INFO: 2890675 events read in total (128783ms).
[10:50:56.345] <TB0> INFO: 3605610 events read in total (161140ms).
[10:51:09.157] <TB0> INFO: 3889600 events read in total (173952ms).
[10:51:09.229] <TB0> INFO: Test took 174863ms.
[10:51:37.244] <TB0> INFO: PixTestTrim::trimBitTest() done
[10:51:37.246] <TB0> INFO: PixTestTrim::doTest() done, duration: 2560 seconds
[10:51:37.246] <TB0> INFO: Decoding statistics:
[10:51:37.246] <TB0> INFO: General information:
[10:51:37.246] <TB0> INFO: 16bit words read: 0
[10:51:37.246] <TB0> INFO: valid events total: 0
[10:51:37.246] <TB0> INFO: empty events: 0
[10:51:37.246] <TB0> INFO: valid events with pixels: 0
[10:51:37.246] <TB0> INFO: valid pixel hits: 0
[10:51:37.246] <TB0> INFO: Event errors: 0
[10:51:37.246] <TB0> INFO: start marker: 0
[10:51:37.246] <TB0> INFO: stop marker: 0
[10:51:37.247] <TB0> INFO: overflow: 0
[10:51:37.247] <TB0> INFO: invalid 5bit words: 0
[10:51:37.247] <TB0> INFO: invalid XOR eye diagram: 0
[10:51:37.247] <TB0> INFO: frame (failed synchr.): 0
[10:51:37.247] <TB0> INFO: idle data (no TBM trl): 0
[10:51:37.247] <TB0> INFO: no data (only TBM hdr): 0
[10:51:37.247] <TB0> INFO: TBM errors: 0
[10:51:37.247] <TB0> INFO: flawed TBM headers: 0
[10:51:37.247] <TB0> INFO: flawed TBM trailers: 0
[10:51:37.247] <TB0> INFO: event ID mismatches: 0
[10:51:37.247] <TB0> INFO: ROC errors: 0
[10:51:37.247] <TB0> INFO: missing ROC header(s): 0
[10:51:37.247] <TB0> INFO: misplaced readback start: 0
[10:51:37.247] <TB0> INFO: Pixel decoding errors: 0
[10:51:37.247] <TB0> INFO: pixel data incomplete: 0
[10:51:37.247] <TB0> INFO: pixel address: 0
[10:51:37.247] <TB0> INFO: pulse height fill bit: 0
[10:51:37.247] <TB0> INFO: buffer corruption: 0
[10:51:38.087] <TB0> INFO: ######################################################################
[10:51:38.087] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:51:38.087] <TB0> INFO: ######################################################################
[10:51:38.336] <TB0> INFO: Expecting 41600 events.
[10:51:41.861] <TB0> INFO: 41600 events read in total (2933ms).
[10:51:41.862] <TB0> INFO: Test took 3774ms.
[10:51:42.303] <TB0> INFO: Expecting 41600 events.
[10:51:46.015] <TB0> INFO: 41600 events read in total (3121ms).
[10:51:46.016] <TB0> INFO: Test took 3950ms.
[10:51:46.327] <TB0> INFO: Expecting 41600 events.
[10:51:49.877] <TB0> INFO: 41600 events read in total (2959ms).
[10:51:49.877] <TB0> INFO: Test took 3837ms.
[10:51:50.167] <TB0> INFO: Expecting 41600 events.
[10:51:53.859] <TB0> INFO: 41600 events read in total (3101ms).
[10:51:53.860] <TB0> INFO: Test took 3958ms.
[10:51:54.152] <TB0> INFO: Expecting 41600 events.
[10:51:57.748] <TB0> INFO: 41600 events read in total (3004ms).
[10:51:57.749] <TB0> INFO: Test took 3862ms.
[10:51:58.039] <TB0> INFO: Expecting 41600 events.
[10:52:01.753] <TB0> INFO: 41600 events read in total (3122ms).
[10:52:01.754] <TB0> INFO: Test took 3980ms.
[10:52:02.047] <TB0> INFO: Expecting 41600 events.
[10:52:05.725] <TB0> INFO: 41600 events read in total (3086ms).
[10:52:05.726] <TB0> INFO: Test took 3944ms.
[10:52:06.018] <TB0> INFO: Expecting 41600 events.
[10:52:09.655] <TB0> INFO: 41600 events read in total (3046ms).
[10:52:09.656] <TB0> INFO: Test took 3903ms.
[10:52:09.971] <TB0> INFO: Expecting 41600 events.
[10:52:13.684] <TB0> INFO: 41600 events read in total (3122ms).
[10:52:13.685] <TB0> INFO: Test took 4005ms.
[10:52:14.011] <TB0> INFO: Expecting 41600 events.
[10:52:17.562] <TB0> INFO: 41600 events read in total (2960ms).
[10:52:17.563] <TB0> INFO: Test took 3850ms.
[10:52:17.938] <TB0> INFO: Expecting 41600 events.
[10:52:21.743] <TB0> INFO: 41600 events read in total (3213ms).
[10:52:21.744] <TB0> INFO: Test took 4157ms.
[10:52:22.148] <TB0> INFO: Expecting 41600 events.
[10:52:25.822] <TB0> INFO: 41600 events read in total (3082ms).
[10:52:25.822] <TB0> INFO: Test took 4047ms.
[10:52:26.112] <TB0> INFO: Expecting 41600 events.
[10:52:29.709] <TB0> INFO: 41600 events read in total (3006ms).
[10:52:29.711] <TB0> INFO: Test took 3864ms.
[10:52:30.003] <TB0> INFO: Expecting 41600 events.
[10:52:33.538] <TB0> INFO: 41600 events read in total (2943ms).
[10:52:33.539] <TB0> INFO: Test took 3800ms.
[10:52:33.851] <TB0> INFO: Expecting 41600 events.
[10:52:37.352] <TB0> INFO: 41600 events read in total (2910ms).
[10:52:37.353] <TB0> INFO: Test took 3786ms.
[10:52:37.645] <TB0> INFO: Expecting 41600 events.
[10:52:41.437] <TB0> INFO: 41600 events read in total (3200ms).
[10:52:41.438] <TB0> INFO: Test took 4058ms.
[10:52:41.734] <TB0> INFO: Expecting 41600 events.
[10:52:45.507] <TB0> INFO: 41600 events read in total (3181ms).
[10:52:45.508] <TB0> INFO: Test took 4038ms.
[10:52:45.798] <TB0> INFO: Expecting 41600 events.
[10:52:49.464] <TB0> INFO: 41600 events read in total (3075ms).
[10:52:49.465] <TB0> INFO: Test took 3932ms.
[10:52:49.753] <TB0> INFO: Expecting 41600 events.
[10:52:53.260] <TB0> INFO: 41600 events read in total (2916ms).
[10:52:53.261] <TB0> INFO: Test took 3772ms.
[10:52:53.551] <TB0> INFO: Expecting 41600 events.
[10:52:57.108] <TB0> INFO: 41600 events read in total (2965ms).
[10:52:57.110] <TB0> INFO: Test took 3824ms.
[10:52:57.402] <TB0> INFO: Expecting 41600 events.
[10:53:00.903] <TB0> INFO: 41600 events read in total (2909ms).
[10:53:00.904] <TB0> INFO: Test took 3766ms.
[10:53:01.195] <TB0> INFO: Expecting 41600 events.
[10:53:04.897] <TB0> INFO: 41600 events read in total (3110ms).
[10:53:04.898] <TB0> INFO: Test took 3968ms.
[10:53:05.211] <TB0> INFO: Expecting 41600 events.
[10:53:09.181] <TB0> INFO: 41600 events read in total (3378ms).
[10:53:09.182] <TB0> INFO: Test took 4255ms.
[10:53:09.472] <TB0> INFO: Expecting 41600 events.
[10:53:13.185] <TB0> INFO: 41600 events read in total (3122ms).
[10:53:13.187] <TB0> INFO: Test took 3980ms.
[10:53:13.509] <TB0> INFO: Expecting 41600 events.
[10:53:17.281] <TB0> INFO: 41600 events read in total (3180ms).
[10:53:17.282] <TB0> INFO: Test took 4066ms.
[10:53:17.658] <TB0> INFO: Expecting 41600 events.
[10:53:21.279] <TB0> INFO: 41600 events read in total (3029ms).
[10:53:21.280] <TB0> INFO: Test took 3966ms.
[10:53:21.571] <TB0> INFO: Expecting 41600 events.
[10:53:25.229] <TB0> INFO: 41600 events read in total (3066ms).
[10:53:25.230] <TB0> INFO: Test took 3923ms.
[10:53:25.588] <TB0> INFO: Expecting 41600 events.
[10:53:29.273] <TB0> INFO: 41600 events read in total (3094ms).
[10:53:29.274] <TB0> INFO: Test took 4012ms.
[10:53:29.573] <TB0> INFO: Expecting 2560 events.
[10:53:30.462] <TB0> INFO: 2560 events read in total (297ms).
[10:53:30.463] <TB0> INFO: Test took 1164ms.
[10:53:30.770] <TB0> INFO: Expecting 2560 events.
[10:53:31.660] <TB0> INFO: 2560 events read in total (297ms).
[10:53:31.660] <TB0> INFO: Test took 1197ms.
[10:53:31.968] <TB0> INFO: Expecting 2560 events.
[10:53:32.856] <TB0> INFO: 2560 events read in total (297ms).
[10:53:32.857] <TB0> INFO: Test took 1196ms.
[10:53:33.164] <TB0> INFO: Expecting 2560 events.
[10:53:34.047] <TB0> INFO: 2560 events read in total (292ms).
[10:53:34.047] <TB0> INFO: Test took 1190ms.
[10:53:34.355] <TB0> INFO: Expecting 2560 events.
[10:53:35.238] <TB0> INFO: 2560 events read in total (292ms).
[10:53:35.238] <TB0> INFO: Test took 1190ms.
[10:53:35.546] <TB0> INFO: Expecting 2560 events.
[10:53:36.429] <TB0> INFO: 2560 events read in total (291ms).
[10:53:36.429] <TB0> INFO: Test took 1190ms.
[10:53:36.737] <TB0> INFO: Expecting 2560 events.
[10:53:37.615] <TB0> INFO: 2560 events read in total (287ms).
[10:53:37.616] <TB0> INFO: Test took 1186ms.
[10:53:37.925] <TB0> INFO: Expecting 2560 events.
[10:53:38.805] <TB0> INFO: 2560 events read in total (288ms).
[10:53:38.805] <TB0> INFO: Test took 1189ms.
[10:53:39.113] <TB0> INFO: Expecting 2560 events.
[10:53:39.995] <TB0> INFO: 2560 events read in total (290ms).
[10:53:39.996] <TB0> INFO: Test took 1191ms.
[10:53:40.304] <TB0> INFO: Expecting 2560 events.
[10:53:41.185] <TB0> INFO: 2560 events read in total (290ms).
[10:53:41.186] <TB0> INFO: Test took 1190ms.
[10:53:41.493] <TB0> INFO: Expecting 2560 events.
[10:53:42.374] <TB0> INFO: 2560 events read in total (289ms).
[10:53:42.375] <TB0> INFO: Test took 1189ms.
[10:53:42.682] <TB0> INFO: Expecting 2560 events.
[10:53:43.564] <TB0> INFO: 2560 events read in total (289ms).
[10:53:43.565] <TB0> INFO: Test took 1190ms.
[10:53:43.872] <TB0> INFO: Expecting 2560 events.
[10:53:44.757] <TB0> INFO: 2560 events read in total (293ms).
[10:53:44.757] <TB0> INFO: Test took 1192ms.
[10:53:45.065] <TB0> INFO: Expecting 2560 events.
[10:53:45.949] <TB0> INFO: 2560 events read in total (292ms).
[10:53:45.949] <TB0> INFO: Test took 1191ms.
[10:53:46.265] <TB0> INFO: Expecting 2560 events.
[10:53:47.151] <TB0> INFO: 2560 events read in total (294ms).
[10:53:47.151] <TB0> INFO: Test took 1202ms.
[10:53:47.460] <TB0> INFO: Expecting 2560 events.
[10:53:48.347] <TB0> INFO: 2560 events read in total (296ms).
[10:53:48.347] <TB0> INFO: Test took 1196ms.
[10:53:48.353] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:48.656] <TB0> INFO: Expecting 655360 events.
[10:54:03.444] <TB0> INFO: 655360 events read in total (14196ms).
[10:54:03.455] <TB0> INFO: Expecting 655360 events.
[10:54:18.028] <TB0> INFO: 655360 events read in total (14170ms).
[10:54:18.055] <TB0> INFO: Expecting 655360 events.
[10:54:32.584] <TB0> INFO: 655360 events read in total (14126ms).
[10:54:32.612] <TB0> INFO: Expecting 655360 events.
[10:54:47.065] <TB0> INFO: 655360 events read in total (14050ms).
[10:54:47.090] <TB0> INFO: Expecting 655360 events.
[10:55:01.848] <TB0> INFO: 655360 events read in total (14355ms).
[10:55:01.884] <TB0> INFO: Expecting 655360 events.
[10:55:16.567] <TB0> INFO: 655360 events read in total (14280ms).
[10:55:16.607] <TB0> INFO: Expecting 655360 events.
[10:55:31.242] <TB0> INFO: 655360 events read in total (14232ms).
[10:55:31.287] <TB0> INFO: Expecting 655360 events.
[10:55:45.862] <TB0> INFO: 655360 events read in total (14172ms).
[10:55:45.918] <TB0> INFO: Expecting 655360 events.
[10:56:00.350] <TB0> INFO: 655360 events read in total (14028ms).
[10:56:00.401] <TB0> INFO: Expecting 655360 events.
[10:56:14.934] <TB0> INFO: 655360 events read in total (14130ms).
[10:56:15.029] <TB0> INFO: Expecting 655360 events.
[10:56:29.411] <TB0> INFO: 655360 events read in total (13979ms).
[10:56:29.513] <TB0> INFO: Expecting 655360 events.
[10:56:43.793] <TB0> INFO: 655360 events read in total (13877ms).
[10:56:43.871] <TB0> INFO: Expecting 655360 events.
[10:56:58.391] <TB0> INFO: 655360 events read in total (14115ms).
[10:56:58.478] <TB0> INFO: Expecting 655360 events.
[10:57:13.183] <TB0> INFO: 655360 events read in total (14302ms).
[10:57:13.327] <TB0> INFO: Expecting 655360 events.
[10:57:27.665] <TB0> INFO: 655360 events read in total (13934ms).
[10:57:27.759] <TB0> INFO: Expecting 655360 events.
[10:57:42.178] <TB0> INFO: 655360 events read in total (14016ms).
[10:57:42.282] <TB0> INFO: Test took 233929ms.
[10:57:42.385] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:57:42.637] <TB0> INFO: Expecting 655360 events.
[10:57:57.196] <TB0> INFO: 655360 events read in total (13967ms).
[10:57:57.211] <TB0> INFO: Expecting 655360 events.
[10:58:11.123] <TB0> INFO: 655360 events read in total (13509ms).
[10:58:11.138] <TB0> INFO: Expecting 655360 events.
[10:58:25.389] <TB0> INFO: 655360 events read in total (13847ms).
[10:58:25.412] <TB0> INFO: Expecting 655360 events.
[10:58:39.893] <TB0> INFO: 655360 events read in total (14077ms).
[10:58:39.919] <TB0> INFO: Expecting 655360 events.
[10:58:54.293] <TB0> INFO: 655360 events read in total (13972ms).
[10:58:54.322] <TB0> INFO: Expecting 655360 events.
[10:59:08.827] <TB0> INFO: 655360 events read in total (14102ms).
[10:59:08.866] <TB0> INFO: Expecting 655360 events.
[10:59:23.459] <TB0> INFO: 655360 events read in total (14191ms).
[10:59:23.500] <TB0> INFO: Expecting 655360 events.
[10:59:38.135] <TB0> INFO: 655360 events read in total (14223ms).
[10:59:38.228] <TB0> INFO: Expecting 655360 events.
[10:59:52.805] <TB0> INFO: 655360 events read in total (14174ms).
[10:59:52.856] <TB0> INFO: Expecting 655360 events.
[11:00:07.372] <TB0> INFO: 655360 events read in total (14113ms).
[11:00:07.444] <TB0> INFO: Expecting 655360 events.
[11:00:21.852] <TB0> INFO: 655360 events read in total (14005ms).
[11:00:21.930] <TB0> INFO: Expecting 655360 events.
[11:00:36.182] <TB0> INFO: 655360 events read in total (13849ms).
[11:00:36.337] <TB0> INFO: Expecting 655360 events.
[11:00:50.964] <TB0> INFO: 655360 events read in total (14224ms).
[11:00:51.066] <TB0> INFO: Expecting 655360 events.
[11:01:05.623] <TB0> INFO: 655360 events read in total (14154ms).
[11:01:05.784] <TB0> INFO: Expecting 655360 events.
[11:01:20.302] <TB0> INFO: 655360 events read in total (14115ms).
[11:01:20.396] <TB0> INFO: Expecting 655360 events.
[11:01:34.726] <TB0> INFO: 655360 events read in total (13927ms).
[11:01:34.829] <TB0> INFO: Test took 232444ms.
[11:01:35.026] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.035] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.043] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.052] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.061] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.070] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.078] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.086] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.097] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:01:35.106] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:01:35.115] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:01:35.123] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.130] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.139] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:01:35.148] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:01:35.157] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:01:35.164] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.169] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.175] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.181] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:01:35.187] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:01:35.193] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:01:35.199] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:01:35.205] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:01:35.211] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[11:01:35.216] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.222] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.228] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.234] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:01:35.240] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:01:35.246] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:01:35.252] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:01:35.258] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:01:35.265] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[11:01:35.272] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[11:01:35.278] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[11:01:35.284] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[11:01:35.290] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[11:01:35.296] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.302] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.309] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.317] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.326] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.333] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:01:35.338] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:01:35.345] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:01:35.352] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:01:35.361] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:01:35.368] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:01:35.374] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:01:35.407] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C0.dat
[11:01:35.407] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C1.dat
[11:01:35.407] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C2.dat
[11:01:35.407] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C3.dat
[11:01:35.407] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C4.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C5.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C6.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C7.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C8.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C9.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C10.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C11.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C12.dat
[11:01:35.408] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C13.dat
[11:01:35.409] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C14.dat
[11:01:35.409] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//dacParameters35_C15.dat
[11:01:35.649] <TB0> INFO: Expecting 41600 events.
[11:01:38.803] <TB0> INFO: 41600 events read in total (2563ms).
[11:01:38.803] <TB0> INFO: Test took 3391ms.
[11:01:39.269] <TB0> INFO: Expecting 41600 events.
[11:01:42.311] <TB0> INFO: 41600 events read in total (2451ms).
[11:01:42.312] <TB0> INFO: Test took 3297ms.
[11:01:42.810] <TB0> INFO: Expecting 41600 events.
[11:01:45.948] <TB0> INFO: 41600 events read in total (2546ms).
[11:01:45.949] <TB0> INFO: Test took 3425ms.
[11:01:46.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:46.255] <TB0> INFO: Expecting 2560 events.
[11:01:47.139] <TB0> INFO: 2560 events read in total (293ms).
[11:01:47.139] <TB0> INFO: Test took 973ms.
[11:01:47.141] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:47.447] <TB0> INFO: Expecting 2560 events.
[11:01:48.340] <TB0> INFO: 2560 events read in total (301ms).
[11:01:48.341] <TB0> INFO: Test took 1200ms.
[11:01:48.343] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:48.648] <TB0> INFO: Expecting 2560 events.
[11:01:49.531] <TB0> INFO: 2560 events read in total (291ms).
[11:01:49.532] <TB0> INFO: Test took 1189ms.
[11:01:49.534] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:49.840] <TB0> INFO: Expecting 2560 events.
[11:01:50.728] <TB0> INFO: 2560 events read in total (296ms).
[11:01:50.728] <TB0> INFO: Test took 1195ms.
[11:01:50.730] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:51.036] <TB0> INFO: Expecting 2560 events.
[11:01:51.920] <TB0> INFO: 2560 events read in total (292ms).
[11:01:51.920] <TB0> INFO: Test took 1190ms.
[11:01:51.923] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:52.228] <TB0> INFO: Expecting 2560 events.
[11:01:53.114] <TB0> INFO: 2560 events read in total (294ms).
[11:01:53.114] <TB0> INFO: Test took 1192ms.
[11:01:53.116] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:53.423] <TB0> INFO: Expecting 2560 events.
[11:01:54.308] <TB0> INFO: 2560 events read in total (292ms).
[11:01:54.308] <TB0> INFO: Test took 1192ms.
[11:01:54.311] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:54.617] <TB0> INFO: Expecting 2560 events.
[11:01:55.500] <TB0> INFO: 2560 events read in total (292ms).
[11:01:55.500] <TB0> INFO: Test took 1189ms.
[11:01:55.503] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:55.809] <TB0> INFO: Expecting 2560 events.
[11:01:56.687] <TB0> INFO: 2560 events read in total (287ms).
[11:01:56.688] <TB0> INFO: Test took 1185ms.
[11:01:56.692] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:56.996] <TB0> INFO: Expecting 2560 events.
[11:01:57.875] <TB0> INFO: 2560 events read in total (287ms).
[11:01:57.876] <TB0> INFO: Test took 1185ms.
[11:01:57.878] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:58.184] <TB0> INFO: Expecting 2560 events.
[11:01:59.062] <TB0> INFO: 2560 events read in total (287ms).
[11:01:59.062] <TB0> INFO: Test took 1184ms.
[11:01:59.067] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:01:59.371] <TB0> INFO: Expecting 2560 events.
[11:02:00.255] <TB0> INFO: 2560 events read in total (293ms).
[11:02:00.256] <TB0> INFO: Test took 1189ms.
[11:02:00.258] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:00.564] <TB0> INFO: Expecting 2560 events.
[11:02:01.446] <TB0> INFO: 2560 events read in total (291ms).
[11:02:01.447] <TB0> INFO: Test took 1189ms.
[11:02:01.449] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:01.754] <TB0> INFO: Expecting 2560 events.
[11:02:02.637] <TB0> INFO: 2560 events read in total (291ms).
[11:02:02.637] <TB0> INFO: Test took 1188ms.
[11:02:02.641] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:02.946] <TB0> INFO: Expecting 2560 events.
[11:02:03.824] <TB0> INFO: 2560 events read in total (286ms).
[11:02:03.824] <TB0> INFO: Test took 1183ms.
[11:02:03.828] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:04.133] <TB0> INFO: Expecting 2560 events.
[11:02:05.015] <TB0> INFO: 2560 events read in total (291ms).
[11:02:05.015] <TB0> INFO: Test took 1187ms.
[11:02:05.018] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:05.324] <TB0> INFO: Expecting 2560 events.
[11:02:06.204] <TB0> INFO: 2560 events read in total (289ms).
[11:02:06.204] <TB0> INFO: Test took 1187ms.
[11:02:06.207] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:06.513] <TB0> INFO: Expecting 2560 events.
[11:02:07.392] <TB0> INFO: 2560 events read in total (288ms).
[11:02:07.393] <TB0> INFO: Test took 1186ms.
[11:02:07.394] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:07.704] <TB0> INFO: Expecting 2560 events.
[11:02:08.589] <TB0> INFO: 2560 events read in total (293ms).
[11:02:08.590] <TB0> INFO: Test took 1196ms.
[11:02:08.591] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:08.898] <TB0> INFO: Expecting 2560 events.
[11:02:09.777] <TB0> INFO: 2560 events read in total (287ms).
[11:02:09.778] <TB0> INFO: Test took 1187ms.
[11:02:09.781] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:10.086] <TB0> INFO: Expecting 2560 events.
[11:02:10.963] <TB0> INFO: 2560 events read in total (285ms).
[11:02:10.963] <TB0> INFO: Test took 1183ms.
[11:02:10.965] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:11.272] <TB0> INFO: Expecting 2560 events.
[11:02:12.156] <TB0> INFO: 2560 events read in total (292ms).
[11:02:12.156] <TB0> INFO: Test took 1191ms.
[11:02:12.159] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:12.464] <TB0> INFO: Expecting 2560 events.
[11:02:13.346] <TB0> INFO: 2560 events read in total (290ms).
[11:02:13.346] <TB0> INFO: Test took 1187ms.
[11:02:13.352] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:13.654] <TB0> INFO: Expecting 2560 events.
[11:02:14.541] <TB0> INFO: 2560 events read in total (295ms).
[11:02:14.541] <TB0> INFO: Test took 1190ms.
[11:02:14.543] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:14.850] <TB0> INFO: Expecting 2560 events.
[11:02:15.736] <TB0> INFO: 2560 events read in total (294ms).
[11:02:15.736] <TB0> INFO: Test took 1193ms.
[11:02:15.739] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:16.044] <TB0> INFO: Expecting 2560 events.
[11:02:16.931] <TB0> INFO: 2560 events read in total (295ms).
[11:02:16.932] <TB0> INFO: Test took 1193ms.
[11:02:16.938] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:17.241] <TB0> INFO: Expecting 2560 events.
[11:02:18.123] <TB0> INFO: 2560 events read in total (291ms).
[11:02:18.123] <TB0> INFO: Test took 1185ms.
[11:02:18.129] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:18.432] <TB0> INFO: Expecting 2560 events.
[11:02:19.319] <TB0> INFO: 2560 events read in total (296ms).
[11:02:19.320] <TB0> INFO: Test took 1191ms.
[11:02:19.323] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:19.628] <TB0> INFO: Expecting 2560 events.
[11:02:20.512] <TB0> INFO: 2560 events read in total (293ms).
[11:02:20.513] <TB0> INFO: Test took 1190ms.
[11:02:20.517] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:20.821] <TB0> INFO: Expecting 2560 events.
[11:02:21.704] <TB0> INFO: 2560 events read in total (291ms).
[11:02:21.704] <TB0> INFO: Test took 1187ms.
[11:02:21.706] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:22.012] <TB0> INFO: Expecting 2560 events.
[11:02:22.904] <TB0> INFO: 2560 events read in total (292ms).
[11:02:22.904] <TB0> INFO: Test took 1198ms.
[11:02:22.906] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:23.212] <TB0> INFO: Expecting 2560 events.
[11:02:24.098] <TB0> INFO: 2560 events read in total (294ms).
[11:02:24.099] <TB0> INFO: Test took 1193ms.
[11:02:24.560] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[11:02:24.560] <TB0> INFO: PH scale (per ROC): 53 70 49 52 60 40 57 43 58 48 47 47 61 70 48 49
[11:02:24.560] <TB0> INFO: PH offset (per ROC): 133 121 110 137 121 98 134 111 130 111 98 108 122 122 108 113
[11:02:24.569] <TB0> INFO: Decoding statistics:
[11:02:24.569] <TB0> INFO: General information:
[11:02:24.569] <TB0> INFO: 16bit words read: 127890
[11:02:24.569] <TB0> INFO: valid events total: 20480
[11:02:24.569] <TB0> INFO: empty events: 17975
[11:02:24.569] <TB0> INFO: valid events with pixels: 2505
[11:02:24.569] <TB0> INFO: valid pixel hits: 2505
[11:02:24.569] <TB0> INFO: Event errors: 0
[11:02:24.569] <TB0> INFO: start marker: 0
[11:02:24.569] <TB0> INFO: stop marker: 0
[11:02:24.569] <TB0> INFO: overflow: 0
[11:02:24.569] <TB0> INFO: invalid 5bit words: 0
[11:02:24.569] <TB0> INFO: invalid XOR eye diagram: 0
[11:02:24.569] <TB0> INFO: frame (failed synchr.): 0
[11:02:24.569] <TB0> INFO: idle data (no TBM trl): 0
[11:02:24.569] <TB0> INFO: no data (only TBM hdr): 0
[11:02:24.569] <TB0> INFO: TBM errors: 0
[11:02:24.569] <TB0> INFO: flawed TBM headers: 0
[11:02:24.569] <TB0> INFO: flawed TBM trailers: 0
[11:02:24.569] <TB0> INFO: event ID mismatches: 0
[11:02:24.569] <TB0> INFO: ROC errors: 0
[11:02:24.569] <TB0> INFO: missing ROC header(s): 0
[11:02:24.569] <TB0> INFO: misplaced readback start: 0
[11:02:24.569] <TB0> INFO: Pixel decoding errors: 0
[11:02:24.569] <TB0> INFO: pixel data incomplete: 0
[11:02:24.569] <TB0> INFO: pixel address: 0
[11:02:24.569] <TB0> INFO: pulse height fill bit: 0
[11:02:24.569] <TB0> INFO: buffer corruption: 0
[11:02:24.851] <TB0> INFO: ######################################################################
[11:02:24.851] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:02:24.851] <TB0> INFO: ######################################################################
[11:02:24.870] <TB0> INFO: scanning low vcal = 10
[11:02:25.243] <TB0> INFO: Expecting 41600 events.
[11:02:28.828] <TB0> INFO: 41600 events read in total (2993ms).
[11:02:28.828] <TB0> INFO: Test took 3958ms.
[11:02:28.831] <TB0> INFO: scanning low vcal = 20
[11:02:29.124] <TB0> INFO: Expecting 41600 events.
[11:02:32.674] <TB0> INFO: 41600 events read in total (2958ms).
[11:02:32.675] <TB0> INFO: Test took 3844ms.
[11:02:32.677] <TB0> INFO: scanning low vcal = 30
[11:02:32.975] <TB0> INFO: Expecting 41600 events.
[11:02:36.647] <TB0> INFO: 41600 events read in total (3080ms).
[11:02:36.648] <TB0> INFO: Test took 3971ms.
[11:02:36.653] <TB0> INFO: scanning low vcal = 40
[11:02:36.930] <TB0> INFO: Expecting 41600 events.
[11:02:40.900] <TB0> INFO: 41600 events read in total (3378ms).
[11:02:40.902] <TB0> INFO: Test took 4249ms.
[11:02:40.905] <TB0> INFO: scanning low vcal = 50
[11:02:41.198] <TB0> INFO: Expecting 41600 events.
[11:02:45.208] <TB0> INFO: 41600 events read in total (3419ms).
[11:02:45.209] <TB0> INFO: Test took 4304ms.
[11:02:45.212] <TB0> INFO: scanning low vcal = 60
[11:02:45.489] <TB0> INFO: Expecting 41600 events.
[11:02:49.435] <TB0> INFO: 41600 events read in total (3355ms).
[11:02:49.436] <TB0> INFO: Test took 4224ms.
[11:02:49.439] <TB0> INFO: scanning low vcal = 70
[11:02:49.716] <TB0> INFO: Expecting 41600 events.
[11:02:53.760] <TB0> INFO: 41600 events read in total (3453ms).
[11:02:53.761] <TB0> INFO: Test took 4322ms.
[11:02:53.764] <TB0> INFO: scanning low vcal = 80
[11:02:54.041] <TB0> INFO: Expecting 41600 events.
[11:02:58.189] <TB0> INFO: 41600 events read in total (3556ms).
[11:02:58.191] <TB0> INFO: Test took 4426ms.
[11:02:58.194] <TB0> INFO: scanning low vcal = 90
[11:02:58.472] <TB0> INFO: Expecting 41600 events.
[11:03:02.475] <TB0> INFO: 41600 events read in total (3400ms).
[11:03:02.476] <TB0> INFO: Test took 4282ms.
[11:03:02.480] <TB0> INFO: scanning low vcal = 100
[11:03:02.756] <TB0> INFO: Expecting 41600 events.
[11:03:06.719] <TB0> INFO: 41600 events read in total (3371ms).
[11:03:06.720] <TB0> INFO: Test took 4240ms.
[11:03:06.723] <TB0> INFO: scanning low vcal = 110
[11:03:06.000] <TB0> INFO: Expecting 41600 events.
[11:03:10.988] <TB0> INFO: 41600 events read in total (3396ms).
[11:03:10.988] <TB0> INFO: Test took 4265ms.
[11:03:10.991] <TB0> INFO: scanning low vcal = 120
[11:03:11.268] <TB0> INFO: Expecting 41600 events.
[11:03:15.207] <TB0> INFO: 41600 events read in total (3348ms).
[11:03:15.207] <TB0> INFO: Test took 4216ms.
[11:03:15.211] <TB0> INFO: scanning low vcal = 130
[11:03:15.487] <TB0> INFO: Expecting 41600 events.
[11:03:19.421] <TB0> INFO: 41600 events read in total (3342ms).
[11:03:19.422] <TB0> INFO: Test took 4210ms.
[11:03:19.425] <TB0> INFO: scanning low vcal = 140
[11:03:19.701] <TB0> INFO: Expecting 41600 events.
[11:03:23.710] <TB0> INFO: 41600 events read in total (3417ms).
[11:03:23.711] <TB0> INFO: Test took 4286ms.
[11:03:23.715] <TB0> INFO: scanning low vcal = 150
[11:03:23.991] <TB0> INFO: Expecting 41600 events.
[11:03:27.987] <TB0> INFO: 41600 events read in total (3404ms).
[11:03:27.988] <TB0> INFO: Test took 4273ms.
[11:03:27.992] <TB0> INFO: scanning low vcal = 160
[11:03:28.365] <TB0> INFO: Expecting 41600 events.
[11:03:32.294] <TB0> INFO: 41600 events read in total (3338ms).
[11:03:32.295] <TB0> INFO: Test took 4303ms.
[11:03:32.299] <TB0> INFO: scanning low vcal = 170
[11:03:32.575] <TB0> INFO: Expecting 41600 events.
[11:03:36.606] <TB0> INFO: 41600 events read in total (3439ms).
[11:03:36.607] <TB0> INFO: Test took 4308ms.
[11:03:36.614] <TB0> INFO: scanning low vcal = 180
[11:03:36.886] <TB0> INFO: Expecting 41600 events.
[11:03:40.890] <TB0> INFO: 41600 events read in total (3412ms).
[11:03:40.891] <TB0> INFO: Test took 4276ms.
[11:03:40.895] <TB0> INFO: scanning low vcal = 190
[11:03:41.171] <TB0> INFO: Expecting 41600 events.
[11:03:45.140] <TB0> INFO: 41600 events read in total (3378ms).
[11:03:45.141] <TB0> INFO: Test took 4246ms.
[11:03:45.144] <TB0> INFO: scanning low vcal = 200
[11:03:45.420] <TB0> INFO: Expecting 41600 events.
[11:03:49.412] <TB0> INFO: 41600 events read in total (3400ms).
[11:03:49.413] <TB0> INFO: Test took 4269ms.
[11:03:49.416] <TB0> INFO: scanning low vcal = 210
[11:03:49.693] <TB0> INFO: Expecting 41600 events.
[11:03:53.658] <TB0> INFO: 41600 events read in total (3374ms).
[11:03:53.659] <TB0> INFO: Test took 4243ms.
[11:03:53.664] <TB0> INFO: scanning low vcal = 220
[11:03:53.940] <TB0> INFO: Expecting 41600 events.
[11:03:57.934] <TB0> INFO: 41600 events read in total (3402ms).
[11:03:57.935] <TB0> INFO: Test took 4271ms.
[11:03:57.938] <TB0> INFO: scanning low vcal = 230
[11:03:58.215] <TB0> INFO: Expecting 41600 events.
[11:04:02.214] <TB0> INFO: 41600 events read in total (3408ms).
[11:04:02.215] <TB0> INFO: Test took 4277ms.
[11:04:02.217] <TB0> INFO: scanning low vcal = 240
[11:04:02.494] <TB0> INFO: Expecting 41600 events.
[11:04:06.435] <TB0> INFO: 41600 events read in total (3349ms).
[11:04:06.435] <TB0> INFO: Test took 4217ms.
[11:04:06.438] <TB0> INFO: scanning low vcal = 250
[11:04:06.715] <TB0> INFO: Expecting 41600 events.
[11:04:10.694] <TB0> INFO: 41600 events read in total (3387ms).
[11:04:10.695] <TB0> INFO: Test took 4256ms.
[11:04:10.699] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[11:04:10.975] <TB0> INFO: Expecting 41600 events.
[11:04:14.968] <TB0> INFO: 41600 events read in total (3401ms).
[11:04:14.969] <TB0> INFO: Test took 4270ms.
[11:04:14.972] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[11:04:15.249] <TB0> INFO: Expecting 41600 events.
[11:04:19.270] <TB0> INFO: 41600 events read in total (3430ms).
[11:04:19.272] <TB0> INFO: Test took 4300ms.
[11:04:19.275] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[11:04:19.565] <TB0> INFO: Expecting 41600 events.
[11:04:23.565] <TB0> INFO: 41600 events read in total (3408ms).
[11:04:23.566] <TB0> INFO: Test took 4290ms.
[11:04:23.569] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[11:04:23.845] <TB0> INFO: Expecting 41600 events.
[11:04:27.817] <TB0> INFO: 41600 events read in total (3380ms).
[11:04:27.818] <TB0> INFO: Test took 4248ms.
[11:04:27.821] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:04:28.097] <TB0> INFO: Expecting 41600 events.
[11:04:32.117] <TB0> INFO: 41600 events read in total (3428ms).
[11:04:32.118] <TB0> INFO: Test took 4297ms.
[11:04:32.693] <TB0> INFO: PixTestGainPedestal::measure() done
[11:05:07.707] <TB0> INFO: PixTestGainPedestal::fit() done
[11:05:07.707] <TB0> INFO: non-linearity mean: 0.982 0.985 0.943 0.980 0.980 0.999 0.980 0.934 0.982 0.961 0.946 0.921 0.982 0.985 0.956 0.978
[11:05:07.707] <TB0> INFO: non-linearity RMS: 0.013 0.003 0.052 0.007 0.003 0.174 0.005 0.110 0.003 0.053 0.044 0.091 0.004 0.004 0.056 0.004
[11:05:07.707] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:05:07.721] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:05:07.734] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:05:07.747] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:05:07.760] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:05:07.772] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:05:07.785] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:05:07.799] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:05:07.812] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:05:07.825] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:05:07.839] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:05:07.853] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:05:07.866] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:05:07.879] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:05:07.892] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:05:07.905] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1126_FullQualification_2016-11-09_09h34m_1478680490//000_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:05:07.918] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[11:05:07.918] <TB0> INFO: Decoding statistics:
[11:05:07.918] <TB0> INFO: General information:
[11:05:07.918] <TB0> INFO: 16bit words read: 3327930
[11:05:07.918] <TB0> INFO: valid events total: 332800
[11:05:07.918] <TB0> INFO: empty events: 0
[11:05:07.918] <TB0> INFO: valid events with pixels: 332800
[11:05:07.918] <TB0> INFO: valid pixel hits: 665565
[11:05:07.918] <TB0> INFO: Event errors: 0
[11:05:07.918] <TB0> INFO: start marker: 0
[11:05:07.918] <TB0> INFO: stop marker: 0
[11:05:07.918] <TB0> INFO: overflow: 0
[11:05:07.918] <TB0> INFO: invalid 5bit words: 0
[11:05:07.918] <TB0> INFO: invalid XOR eye diagram: 0
[11:05:07.918] <TB0> INFO: frame (failed synchr.): 0
[11:05:07.918] <TB0> INFO: idle data (no TBM trl): 0
[11:05:07.918] <TB0> INFO: no data (only TBM hdr): 0
[11:05:07.918] <TB0> INFO: TBM errors: 0
[11:05:07.918] <TB0> INFO: flawed TBM headers: 0
[11:05:07.918] <TB0> INFO: flawed TBM trailers: 0
[11:05:07.918] <TB0> INFO: event ID mismatches: 0
[11:05:07.918] <TB0> INFO: ROC errors: 0
[11:05:07.918] <TB0> INFO: missing ROC header(s): 0
[11:05:07.918] <TB0> INFO: misplaced readback start: 0
[11:05:07.918] <TB0> INFO: Pixel decoding errors: 0
[11:05:07.918] <TB0> INFO: pixel data incomplete: 0
[11:05:07.918] <TB0> INFO: pixel address: 0
[11:05:07.918] <TB0> INFO: pulse height fill bit: 0
[11:05:07.918] <TB0> INFO: buffer corruption: 0
[11:05:07.935] <TB0> INFO: Decoding statistics:
[11:05:07.935] <TB0> INFO: General information:
[11:05:07.935] <TB0> INFO: 16bit words read: 3457356
[11:05:07.935] <TB0> INFO: valid events total: 353536
[11:05:07.935] <TB0> INFO: empty events: 18231
[11:05:07.935] <TB0> INFO: valid events with pixels: 335305
[11:05:07.935] <TB0> INFO: valid pixel hits: 668070
[11:05:07.935] <TB0> INFO: Event errors: 0
[11:05:07.935] <TB0> INFO: start marker: 0
[11:05:07.935] <TB0> INFO: stop marker: 0
[11:05:07.935] <TB0> INFO: overflow: 0
[11:05:07.935] <TB0> INFO: invalid 5bit words: 0
[11:05:07.935] <TB0> INFO: invalid XOR eye diagram: 0
[11:05:07.935] <TB0> INFO: frame (failed synchr.): 0
[11:05:07.935] <TB0> INFO: idle data (no TBM trl): 0
[11:05:07.935] <TB0> INFO: no data (only TBM hdr): 0
[11:05:07.935] <TB0> INFO: TBM errors: 0
[11:05:07.935] <TB0> INFO: flawed TBM headers: 0
[11:05:07.935] <TB0> INFO: flawed TBM trailers: 0
[11:05:07.935] <TB0> INFO: event ID mismatches: 0
[11:05:07.935] <TB0> INFO: ROC errors: 0
[11:05:07.935] <TB0> INFO: missing ROC header(s): 0
[11:05:07.935] <TB0> INFO: misplaced readback start: 0
[11:05:07.935] <TB0> INFO: Pixel decoding errors: 0
[11:05:07.935] <TB0> INFO: pixel data incomplete: 0
[11:05:07.935] <TB0> INFO: pixel address: 0
[11:05:07.935] <TB0> INFO: pulse height fill bit: 0
[11:05:07.935] <TB0> INFO: buffer corruption: 0
[11:05:07.935] <TB0> INFO: enter test to run
[11:05:07.935] <TB0> INFO: test: exit no parameter change
[11:05:08.080] <TB0> QUIET: Connection to board 71 closed.
[11:05:08.082] <TB0> INFO: pXar: this is the end, my friend