[10:14:26.642] <TB3> INFO: *** Welcome to pxar ***
[10:14:26.642] <TB3> INFO: *** Today: 2016/11/03
[10:14:26.648] <TB3> INFO: *** Version: c8ba-dirty
[10:14:26.648] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C15.dat
[10:14:26.649] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1b.dat
[10:14:26.649] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//defaultMaskFile.dat
[10:14:26.649] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters_C15.dat
[10:14:26.703] <TB3> INFO: clk: 4
[10:14:26.703] <TB3> INFO: ctr: 4
[10:14:26.703] <TB3> INFO: sda: 19
[10:14:26.703] <TB3> INFO: tin: 9
[10:14:26.703] <TB3> INFO: level: 15
[10:14:26.703] <TB3> INFO: triggerdelay: 0
[10:14:26.703] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[10:14:26.703] <TB3> INFO: Log level: INFO
[10:14:26.711] <TB3> INFO: Found DTB DTB_WZ4I6J
[10:14:26.720] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[10:14:26.722] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[10:14:26.723] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[10:14:28.207] <TB3> INFO: DUT info:
[10:14:28.207] <TB3> INFO: The DUT currently contains the following objects:
[10:14:28.207] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[10:14:28.207] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:14:28.207] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:14:28.207] <TB3> INFO: TBM Core alpha (2): 7 registers set
[10:14:28.207] <TB3> INFO: TBM Core beta (3): 7 registers set
[10:14:28.207] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:14:28.207] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.207] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:14:28.608] <TB3> INFO: enter 'restricted' command line mode
[10:14:28.608] <TB3> INFO: enter test to run
[10:14:28.608] <TB3> INFO: test: pretest no parameter change
[10:14:28.608] <TB3> INFO: running: pretest
[10:14:29.203] <TB3> INFO: ######################################################################
[10:14:29.203] <TB3> INFO: PixTestPretest::doTest()
[10:14:29.203] <TB3> INFO: ######################################################################
[10:14:29.204] <TB3> INFO: ----------------------------------------------------------------------
[10:14:29.204] <TB3> INFO: PixTestPretest::programROC()
[10:14:29.204] <TB3> INFO: ----------------------------------------------------------------------
[10:14:47.217] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:14:47.217] <TB3> INFO: IA differences per ROC: 18.5 17.7 19.3 17.7 18.5 17.7 16.9 18.5 19.3 19.3 19.3 18.5 16.9 19.3 20.1 19.3
[10:14:47.253] <TB3> INFO: ----------------------------------------------------------------------
[10:14:47.253] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:14:47.253] <TB3> INFO: ----------------------------------------------------------------------
[10:15:08.499] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 393.9 mA = 24.6187 mA/ROC
[10:15:08.499] <TB3> INFO: i(loss) [mA/ROC]: 20.9 21.7 20.1 21.7 20.9 21.7 20.1 21.7 20.1 19.3 21.7 20.9 20.1 20.1 19.3 19.3
[10:15:08.528] <TB3> INFO: ----------------------------------------------------------------------
[10:15:08.528] <TB3> INFO: PixTestPretest::findTiming()
[10:15:08.528] <TB3> INFO: ----------------------------------------------------------------------
[10:15:08.528] <TB3> INFO: PixTestCmd::init()

[10:15:39.764] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:15:39.764] <TB3> INFO: (success/tries = 100/100), width = 3
[10:15:41.258] <TB3> INFO: ----------------------------------------------------------------------
[10:15:41.258] <TB3> INFO: PixTestPretest::findWorkingPixel()
[10:15:41.259] <TB3> INFO: ----------------------------------------------------------------------
[10:15:41.350] <TB3> INFO: Expecting 231680 events.
[10:15:51.006] <TB3> INFO: 231680 events read in total (9064ms).
[10:15:51.013] <TB3> INFO: Test took 9752ms.
[10:15:51.258] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:15:51.287] <TB3> INFO: ----------------------------------------------------------------------
[10:15:51.287] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[10:15:51.287] <TB3> INFO: ----------------------------------------------------------------------
[10:15:51.379] <TB3> INFO: Expecting 231680 events.
[10:16:01.100] <TB3> INFO: 231680 events read in total (9130ms).
[10:16:01.109] <TB3> INFO: Test took 9819ms.
[10:16:01.369] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[10:16:01.369] <TB3> INFO: CalDel: 99 86 102 92 98 85 93 110 92 97 109 106 87 98 95 88
[10:16:01.369] <TB3> INFO: VthrComp: 51 51 51 51 51 54 54 56 51 51 55 51 51 52 52 51
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C0.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C1.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C2.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C3.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C4.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C5.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C6.dat
[10:16:01.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C7.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C8.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C9.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C10.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C11.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C12.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C13.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C14.dat
[10:16:01.373] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C15.dat
[10:16:01.373] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0a.dat
[10:16:01.373] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0b.dat
[10:16:01.373] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1a.dat
[10:16:01.374] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1b.dat
[10:16:01.374] <TB3> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[10:16:01.468] <TB3> INFO: enter test to run
[10:16:01.468] <TB3> INFO: test: FullTest no parameter change
[10:16:01.468] <TB3> INFO: running: fulltest
[10:16:01.468] <TB3> INFO: ######################################################################
[10:16:01.468] <TB3> INFO: PixTestFullTest::doTest()
[10:16:01.468] <TB3> INFO: ######################################################################
[10:16:01.469] <TB3> INFO: ######################################################################
[10:16:01.469] <TB3> INFO: PixTestAlive::doTest()
[10:16:01.469] <TB3> INFO: ######################################################################
[10:16:01.470] <TB3> INFO: ----------------------------------------------------------------------
[10:16:01.470] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:16:01.470] <TB3> INFO: ----------------------------------------------------------------------
[10:16:01.748] <TB3> INFO: Expecting 41600 events.
[10:16:05.350] <TB3> INFO: 41600 events read in total (3010ms).
[10:16:05.351] <TB3> INFO: Test took 3879ms.
[10:16:05.580] <TB3> INFO: PixTestAlive::aliveTest() done
[10:16:05.580] <TB3> INFO: number of dead pixels (per ROC): 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[10:16:05.581] <TB3> INFO: ----------------------------------------------------------------------
[10:16:05.581] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:16:05.581] <TB3> INFO: ----------------------------------------------------------------------
[10:16:05.860] <TB3> INFO: Expecting 41600 events.
[10:16:08.784] <TB3> INFO: 41600 events read in total (2332ms).
[10:16:08.784] <TB3> INFO: Test took 3202ms.
[10:16:08.785] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:16:09.023] <TB3> INFO: PixTestAlive::maskTest() done
[10:16:09.023] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:16:09.025] <TB3> INFO: ----------------------------------------------------------------------
[10:16:09.025] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:16:09.025] <TB3> INFO: ----------------------------------------------------------------------
[10:16:09.302] <TB3> INFO: Expecting 41600 events.
[10:16:12.742] <TB3> INFO: 41600 events read in total (2849ms).
[10:16:12.742] <TB3> INFO: Test took 3716ms.
[10:16:12.974] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[10:16:12.974] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:16:12.974] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:16:12.975] <TB3> INFO: Decoding statistics:
[10:16:12.975] <TB3> INFO: General information:
[10:16:12.975] <TB3> INFO: 16bit words read: 0
[10:16:12.975] <TB3> INFO: valid events total: 0
[10:16:12.975] <TB3> INFO: empty events: 0
[10:16:12.975] <TB3> INFO: valid events with pixels: 0
[10:16:12.975] <TB3> INFO: valid pixel hits: 0
[10:16:12.975] <TB3> INFO: Event errors: 0
[10:16:12.975] <TB3> INFO: start marker: 0
[10:16:12.975] <TB3> INFO: stop marker: 0
[10:16:12.975] <TB3> INFO: overflow: 0
[10:16:12.975] <TB3> INFO: invalid 5bit words: 0
[10:16:12.975] <TB3> INFO: invalid XOR eye diagram: 0
[10:16:12.975] <TB3> INFO: frame (failed synchr.): 0
[10:16:12.975] <TB3> INFO: idle data (no TBM trl): 0
[10:16:12.975] <TB3> INFO: no data (only TBM hdr): 0
[10:16:12.975] <TB3> INFO: TBM errors: 0
[10:16:12.975] <TB3> INFO: flawed TBM headers: 0
[10:16:12.975] <TB3> INFO: flawed TBM trailers: 0
[10:16:12.975] <TB3> INFO: event ID mismatches: 0
[10:16:12.975] <TB3> INFO: ROC errors: 0
[10:16:12.975] <TB3> INFO: missing ROC header(s): 0
[10:16:12.975] <TB3> INFO: misplaced readback start: 0
[10:16:12.975] <TB3> INFO: Pixel decoding errors: 0
[10:16:12.975] <TB3> INFO: pixel data incomplete: 0
[10:16:12.975] <TB3> INFO: pixel address: 0
[10:16:12.975] <TB3> INFO: pulse height fill bit: 0
[10:16:12.975] <TB3> INFO: buffer corruption: 0
[10:16:12.982] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:16:12.982] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:16:12.982] <TB3> INFO: ######################################################################
[10:16:12.982] <TB3> INFO: PixTestReadback::doTest()
[10:16:12.982] <TB3> INFO: ######################################################################
[10:16:12.982] <TB3> INFO: ----------------------------------------------------------------------
[10:16:12.982] <TB3> INFO: PixTestReadback::CalibrateVd()
[10:16:12.982] <TB3> INFO: ----------------------------------------------------------------------
[10:16:22.941] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:16:22.942] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:16:22.943] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:16:22.943] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:16:22.971] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:16:22.971] <TB3> INFO: ----------------------------------------------------------------------
[10:16:22.971] <TB3> INFO: PixTestReadback::CalibrateVa()
[10:16:22.971] <TB3> INFO: ----------------------------------------------------------------------
[10:16:32.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:16:32.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:16:32.860] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:16:32.861] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:16:32.891] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:16:32.891] <TB3> INFO: ----------------------------------------------------------------------
[10:16:32.891] <TB3> INFO: PixTestReadback::readbackVbg()
[10:16:32.891] <TB3> INFO: ----------------------------------------------------------------------
[10:16:40.531] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:16:40.531] <TB3> INFO: ----------------------------------------------------------------------
[10:16:40.531] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[10:16:40.531] <TB3> INFO: ----------------------------------------------------------------------
[10:16:40.531] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 155.7calibrated Vbg = 1.16513 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.9calibrated Vbg = 1.16833 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.9calibrated Vbg = 1.15823 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 163.9calibrated Vbg = 1.15671 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.4calibrated Vbg = 1.15619 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 161.7calibrated Vbg = 1.1607 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159calibrated Vbg = 1.16585 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.3calibrated Vbg = 1.16952 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.2calibrated Vbg = 1.15881 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 165.6calibrated Vbg = 1.16452 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.2calibrated Vbg = 1.15142 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.5calibrated Vbg = 1.14938 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153calibrated Vbg = 1.1607 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.5calibrated Vbg = 1.16169 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153calibrated Vbg = 1.16382 :::*/*/*/*/
[10:16:40.531] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 168.1calibrated Vbg = 1.16033 :::*/*/*/*/
[10:16:40.533] <TB3> INFO: ----------------------------------------------------------------------
[10:16:40.533] <TB3> INFO: PixTestReadback::CalibrateIa()
[10:16:40.533] <TB3> INFO: ----------------------------------------------------------------------
[10:19:20.814] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:19:20.814] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:19:20.814] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:19:20.814] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:19:20.815] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:19:20.842] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:19:20.844] <TB3> INFO: PixTestReadback::doTest() done
[10:19:20.844] <TB3> INFO: Decoding statistics:
[10:19:20.844] <TB3> INFO: General information:
[10:19:20.844] <TB3> INFO: 16bit words read: 1536
[10:19:20.844] <TB3> INFO: valid events total: 256
[10:19:20.844] <TB3> INFO: empty events: 256
[10:19:20.844] <TB3> INFO: valid events with pixels: 0
[10:19:20.844] <TB3> INFO: valid pixel hits: 0
[10:19:20.844] <TB3> INFO: Event errors: 0
[10:19:20.844] <TB3> INFO: start marker: 0
[10:19:20.844] <TB3> INFO: stop marker: 0
[10:19:20.844] <TB3> INFO: overflow: 0
[10:19:20.844] <TB3> INFO: invalid 5bit words: 0
[10:19:20.844] <TB3> INFO: invalid XOR eye diagram: 0
[10:19:20.844] <TB3> INFO: frame (failed synchr.): 0
[10:19:20.844] <TB3> INFO: idle data (no TBM trl): 0
[10:19:20.844] <TB3> INFO: no data (only TBM hdr): 0
[10:19:20.844] <TB3> INFO: TBM errors: 0
[10:19:20.844] <TB3> INFO: flawed TBM headers: 0
[10:19:20.844] <TB3> INFO: flawed TBM trailers: 0
[10:19:20.844] <TB3> INFO: event ID mismatches: 0
[10:19:20.844] <TB3> INFO: ROC errors: 0
[10:19:20.844] <TB3> INFO: missing ROC header(s): 0
[10:19:20.844] <TB3> INFO: misplaced readback start: 0
[10:19:20.844] <TB3> INFO: Pixel decoding errors: 0
[10:19:20.844] <TB3> INFO: pixel data incomplete: 0
[10:19:20.844] <TB3> INFO: pixel address: 0
[10:19:20.844] <TB3> INFO: pulse height fill bit: 0
[10:19:20.844] <TB3> INFO: buffer corruption: 0
[10:19:20.887] <TB3> INFO: ######################################################################
[10:19:20.887] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:19:20.887] <TB3> INFO: ######################################################################
[10:19:20.891] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:19:20.903] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:19:20.903] <TB3> INFO: run 1 of 1
[10:19:21.170] <TB3> INFO: Expecting 3120000 events.
[10:19:51.500] <TB3> INFO: 662585 events read in total (29738ms).











[10:20:20.957] <TB3> INFO: 1318115 events read in total (59195ms).











[10:20:50.330] <TB3> INFO: 1970930 events read in total (88568ms).











[10:21:19.925] <TB3> INFO: 2624235 events read in total (118163ms).











[10:21:43.365] <TB3> INFO: 3120000 events read in total (141603ms).
[10:21:43.435] <TB3> INFO: Test took 142532ms.
[10:22:08.361] <TB3> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[10:22:08.361] <TB3> INFO: number of dead bumps (per ROC): 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0
[10:22:08.361] <TB3> INFO: separation cut (per ROC): 108 112 108 108 105 114 109 108 101 101 127 102 105 106 113 109
[10:22:08.361] <TB3> INFO: Decoding statistics:
[10:22:08.361] <TB3> INFO: General information:
[10:22:08.361] <TB3> INFO: 16bit words read: 0
[10:22:08.361] <TB3> INFO: valid events total: 0
[10:22:08.361] <TB3> INFO: empty events: 0
[10:22:08.361] <TB3> INFO: valid events with pixels: 0
[10:22:08.361] <TB3> INFO: valid pixel hits: 0
[10:22:08.361] <TB3> INFO: Event errors: 0
[10:22:08.361] <TB3> INFO: start marker: 0
[10:22:08.361] <TB3> INFO: stop marker: 0
[10:22:08.361] <TB3> INFO: overflow: 0
[10:22:08.361] <TB3> INFO: invalid 5bit words: 0
[10:22:08.361] <TB3> INFO: invalid XOR eye diagram: 0
[10:22:08.361] <TB3> INFO: frame (failed synchr.): 0
[10:22:08.361] <TB3> INFO: idle data (no TBM trl): 0
[10:22:08.361] <TB3> INFO: no data (only TBM hdr): 0
[10:22:08.361] <TB3> INFO: TBM errors: 0
[10:22:08.361] <TB3> INFO: flawed TBM headers: 0
[10:22:08.361] <TB3> INFO: flawed TBM trailers: 0
[10:22:08.361] <TB3> INFO: event ID mismatches: 0
[10:22:08.361] <TB3> INFO: ROC errors: 0
[10:22:08.361] <TB3> INFO: missing ROC header(s): 0
[10:22:08.361] <TB3> INFO: misplaced readback start: 0
[10:22:08.361] <TB3> INFO: Pixel decoding errors: 0
[10:22:08.361] <TB3> INFO: pixel data incomplete: 0
[10:22:08.361] <TB3> INFO: pixel address: 0
[10:22:08.361] <TB3> INFO: pulse height fill bit: 0
[10:22:08.361] <TB3> INFO: buffer corruption: 0
[10:22:08.398] <TB3> INFO: ######################################################################
[10:22:08.398] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:22:08.398] <TB3> INFO: ######################################################################
[10:22:08.398] <TB3> INFO: ----------------------------------------------------------------------
[10:22:08.398] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:22:08.398] <TB3> INFO: ----------------------------------------------------------------------
[10:22:08.398] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:22:08.409] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[10:22:08.409] <TB3> INFO: run 1 of 1
[10:22:08.647] <TB3> INFO: Expecting 36608000 events.
[10:22:31.758] <TB3> INFO: 673750 events read in total (22519ms).
[10:22:54.062] <TB3> INFO: 1333900 events read in total (44823ms).
[10:23:16.359] <TB3> INFO: 1994200 events read in total (67120ms).
[10:23:38.839] <TB3> INFO: 2653100 events read in total (89600ms).
[10:24:01.140] <TB3> INFO: 3309800 events read in total (111901ms).
[10:24:23.409] <TB3> INFO: 3968200 events read in total (134170ms).
[10:24:45.802] <TB3> INFO: 4626150 events read in total (156563ms).
[10:25:08.044] <TB3> INFO: 5284550 events read in total (178806ms).
[10:25:30.264] <TB3> INFO: 5941100 events read in total (201025ms).
[10:25:52.697] <TB3> INFO: 6601550 events read in total (223458ms).
[10:26:14.873] <TB3> INFO: 7258400 events read in total (245634ms).
[10:26:37.241] <TB3> INFO: 7916300 events read in total (268002ms).
[10:26:59.647] <TB3> INFO: 8570400 events read in total (290408ms).
[10:27:22.185] <TB3> INFO: 9228600 events read in total (312946ms).
[10:27:44.322] <TB3> INFO: 9884400 events read in total (335083ms).
[10:28:06.594] <TB3> INFO: 10540150 events read in total (357355ms).
[10:28:28.962] <TB3> INFO: 11193750 events read in total (379724ms).
[10:28:51.234] <TB3> INFO: 11851450 events read in total (401995ms).
[10:29:13.316] <TB3> INFO: 12505900 events read in total (424077ms).
[10:29:35.601] <TB3> INFO: 13161650 events read in total (446362ms).
[10:29:57.909] <TB3> INFO: 13814750 events read in total (468670ms).
[10:30:20.255] <TB3> INFO: 14467800 events read in total (491016ms).
[10:30:42.278] <TB3> INFO: 15120600 events read in total (513039ms).
[10:31:04.569] <TB3> INFO: 15773350 events read in total (535330ms).
[10:31:26.692] <TB3> INFO: 16426100 events read in total (557453ms).
[10:31:48.789] <TB3> INFO: 17077950 events read in total (579550ms).
[10:32:10.960] <TB3> INFO: 17731400 events read in total (601721ms).
[10:32:33.032] <TB3> INFO: 18381550 events read in total (623793ms).
[10:32:55.115] <TB3> INFO: 19033100 events read in total (645876ms).
[10:33:16.991] <TB3> INFO: 19683150 events read in total (667752ms).
[10:33:39.344] <TB3> INFO: 20334200 events read in total (690105ms).
[10:34:01.482] <TB3> INFO: 20984200 events read in total (712243ms).
[10:34:23.622] <TB3> INFO: 21635150 events read in total (734383ms).
[10:34:45.746] <TB3> INFO: 22284600 events read in total (756507ms).
[10:35:07.794] <TB3> INFO: 22934000 events read in total (778555ms).
[10:35:29.880] <TB3> INFO: 23583300 events read in total (800641ms).
[10:35:51.894] <TB3> INFO: 24233650 events read in total (822655ms).
[10:36:14.036] <TB3> INFO: 24883100 events read in total (844797ms).
[10:36:36.115] <TB3> INFO: 25532400 events read in total (866876ms).
[10:36:58.046] <TB3> INFO: 26179700 events read in total (888807ms).
[10:37:20.145] <TB3> INFO: 26826850 events read in total (910906ms).
[10:37:42.237] <TB3> INFO: 27475050 events read in total (932998ms).
[10:38:04.391] <TB3> INFO: 28122650 events read in total (955152ms).
[10:38:26.492] <TB3> INFO: 28772300 events read in total (977253ms).
[10:38:48.561] <TB3> INFO: 29418500 events read in total (999322ms).
[10:39:10.333] <TB3> INFO: 30064350 events read in total (1021094ms).
[10:39:32.342] <TB3> INFO: 30708700 events read in total (1043103ms).
[10:39:54.327] <TB3> INFO: 31353950 events read in total (1065088ms).
[10:40:16.203] <TB3> INFO: 32002000 events read in total (1086964ms).
[10:40:38.302] <TB3> INFO: 32647500 events read in total (1109063ms).
[10:41:00.120] <TB3> INFO: 33295950 events read in total (1130881ms).
[10:41:22.115] <TB3> INFO: 33943100 events read in total (1152876ms).
[10:41:44.267] <TB3> INFO: 34591300 events read in total (1175028ms).
[10:42:06.513] <TB3> INFO: 35238200 events read in total (1197274ms).
[10:42:28.704] <TB3> INFO: 35886300 events read in total (1219465ms).
[10:42:51.458] <TB3> INFO: 36543450 events read in total (1242219ms).
[10:42:54.071] <TB3> INFO: 36608000 events read in total (1244832ms).
[10:42:54.140] <TB3> INFO: Test took 1245731ms.
[10:42:54.606] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:42:56.686] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:42:58.900] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:00.684] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:02.273] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:04.138] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:06.088] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:07.912] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:09.482] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:11.061] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:12.604] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:14.048] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:15.801] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:17.391] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:18.925] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:20.391] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:43:22.387] <TB3> INFO: PixTestScurves::scurves() done
[10:43:22.387] <TB3> INFO: Vcal mean: 120.14 122.23 107.75 110.68 117.91 119.67 124.28 123.77 107.24 104.36 131.49 103.40 111.95 115.04 118.13 114.67
[10:43:22.387] <TB3> INFO: Vcal RMS: 5.48 6.22 5.51 4.80 5.80 6.08 6.32 6.98 5.23 5.47 6.70 5.15 4.98 5.12 5.89 5.51
[10:43:22.387] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1273 seconds
[10:43:22.388] <TB3> INFO: Decoding statistics:
[10:43:22.388] <TB3> INFO: General information:
[10:43:22.388] <TB3> INFO: 16bit words read: 0
[10:43:22.388] <TB3> INFO: valid events total: 0
[10:43:22.388] <TB3> INFO: empty events: 0
[10:43:22.388] <TB3> INFO: valid events with pixels: 0
[10:43:22.388] <TB3> INFO: valid pixel hits: 0
[10:43:22.388] <TB3> INFO: Event errors: 0
[10:43:22.388] <TB3> INFO: start marker: 0
[10:43:22.388] <TB3> INFO: stop marker: 0
[10:43:22.388] <TB3> INFO: overflow: 0
[10:43:22.388] <TB3> INFO: invalid 5bit words: 0
[10:43:22.388] <TB3> INFO: invalid XOR eye diagram: 0
[10:43:22.388] <TB3> INFO: frame (failed synchr.): 0
[10:43:22.388] <TB3> INFO: idle data (no TBM trl): 0
[10:43:22.388] <TB3> INFO: no data (only TBM hdr): 0
[10:43:22.388] <TB3> INFO: TBM errors: 0
[10:43:22.388] <TB3> INFO: flawed TBM headers: 0
[10:43:22.388] <TB3> INFO: flawed TBM trailers: 0
[10:43:22.388] <TB3> INFO: event ID mismatches: 0
[10:43:22.388] <TB3> INFO: ROC errors: 0
[10:43:22.388] <TB3> INFO: missing ROC header(s): 0
[10:43:22.388] <TB3> INFO: misplaced readback start: 0
[10:43:22.388] <TB3> INFO: Pixel decoding errors: 0
[10:43:22.388] <TB3> INFO: pixel data incomplete: 0
[10:43:22.388] <TB3> INFO: pixel address: 0
[10:43:22.388] <TB3> INFO: pulse height fill bit: 0
[10:43:22.388] <TB3> INFO: buffer corruption: 0
[10:43:22.451] <TB3> INFO: ######################################################################
[10:43:22.451] <TB3> INFO: PixTestTrim::doTest()
[10:43:22.451] <TB3> INFO: ######################################################################
[10:43:22.453] <TB3> INFO: ----------------------------------------------------------------------
[10:43:22.453] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:43:22.453] <TB3> INFO: ----------------------------------------------------------------------
[10:43:22.494] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:43:22.494] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:43:22.504] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:43:22.504] <TB3> INFO: run 1 of 1
[10:43:22.738] <TB3> INFO: Expecting 5025280 events.
[10:43:52.615] <TB3> INFO: 820088 events read in total (29284ms).
[10:44:21.894] <TB3> INFO: 1637040 events read in total (58564ms).
[10:44:50.867] <TB3> INFO: 2449792 events read in total (87536ms).
[10:45:19.839] <TB3> INFO: 3258992 events read in total (116508ms).
[10:45:48.925] <TB3> INFO: 4064600 events read in total (145595ms).
[10:46:18.769] <TB3> INFO: 4867944 events read in total (175438ms).
[10:46:24.661] <TB3> INFO: 5025280 events read in total (181330ms).
[10:46:24.704] <TB3> INFO: Test took 182200ms.
[10:46:41.960] <TB3> INFO: ROC 0 VthrComp = 131
[10:46:41.961] <TB3> INFO: ROC 1 VthrComp = 131
[10:46:41.961] <TB3> INFO: ROC 2 VthrComp = 116
[10:46:41.961] <TB3> INFO: ROC 3 VthrComp = 123
[10:46:41.961] <TB3> INFO: ROC 4 VthrComp = 121
[10:46:41.961] <TB3> INFO: ROC 5 VthrComp = 131
[10:46:41.961] <TB3> INFO: ROC 6 VthrComp = 131
[10:46:41.961] <TB3> INFO: ROC 7 VthrComp = 129
[10:46:41.962] <TB3> INFO: ROC 8 VthrComp = 117
[10:46:41.962] <TB3> INFO: ROC 9 VthrComp = 110
[10:46:41.962] <TB3> INFO: ROC 10 VthrComp = 134
[10:46:41.962] <TB3> INFO: ROC 11 VthrComp = 112
[10:46:41.962] <TB3> INFO: ROC 12 VthrComp = 121
[10:46:41.962] <TB3> INFO: ROC 13 VthrComp = 124
[10:46:41.963] <TB3> INFO: ROC 14 VthrComp = 130
[10:46:41.963] <TB3> INFO: ROC 15 VthrComp = 122
[10:46:42.238] <TB3> INFO: Expecting 41600 events.
[10:46:45.705] <TB3> INFO: 41600 events read in total (2876ms).
[10:46:45.706] <TB3> INFO: Test took 3741ms.
[10:46:45.715] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:46:45.715] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:46:45.727] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:46:45.728] <TB3> INFO: run 1 of 1
[10:46:46.005] <TB3> INFO: Expecting 5025280 events.
[10:47:11.868] <TB3> INFO: 590504 events read in total (25271ms).
[10:47:37.173] <TB3> INFO: 1179384 events read in total (50576ms).
[10:48:02.146] <TB3> INFO: 1768112 events read in total (75549ms).
[10:48:27.351] <TB3> INFO: 2356208 events read in total (100754ms).
[10:48:52.332] <TB3> INFO: 2942408 events read in total (125735ms).
[10:49:17.371] <TB3> INFO: 3527288 events read in total (150774ms).
[10:49:42.514] <TB3> INFO: 4110888 events read in total (175917ms).
[10:50:07.799] <TB3> INFO: 4694736 events read in total (201202ms).
[10:50:22.553] <TB3> INFO: 5025280 events read in total (215956ms).
[10:50:22.626] <TB3> INFO: Test took 216898ms.
[10:50:47.068] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 59.921 for pixel 0/37 mean/min/max = 46.1555/32.3808/59.9301
[10:50:47.068] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.5909 for pixel 0/33 mean/min/max = 46.9086/32.1105/61.7066
[10:50:47.069] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.8093 for pixel 0/72 mean/min/max = 45.3731/31.6163/59.13
[10:50:47.069] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.8265 for pixel 10/12 mean/min/max = 44.454/31.0619/57.8461
[10:50:47.070] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 61.5734 for pixel 22/78 mean/min/max = 46.6888/31.7659/61.6117
[10:50:47.070] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 61.7067 for pixel 39/4 mean/min/max = 46.6761/31.3752/61.977
[10:50:47.070] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 61.2201 for pixel 6/56 mean/min/max = 46.676/32.071/61.281
[10:50:47.071] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 63.7371 for pixel 51/2 mean/min/max = 47.3292/30.8383/63.8201
[10:50:47.071] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.3997 for pixel 1/28 mean/min/max = 44.8888/31.1498/58.6277
[10:50:47.071] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.2635 for pixel 19/4 mean/min/max = 47.9426/33.6063/62.2789
[10:50:47.072] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 68.5183 for pixel 0/40 mean/min/max = 51.4973/34.3947/68.5998
[10:50:47.072] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.982 for pixel 20/23 mean/min/max = 45.2558/32.4213/58.0903
[10:50:47.072] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.2308 for pixel 11/8 mean/min/max = 45.3803/31.3279/59.4327
[10:50:47.073] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 59.6246 for pixel 4/7 mean/min/max = 45.1906/30.7183/59.6628
[10:50:47.073] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.9103 for pixel 12/34 mean/min/max = 46.0053/31.9668/60.0439
[10:50:47.074] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.3033 for pixel 19/59 mean/min/max = 44.7897/30.9785/58.6009
[10:50:47.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:50:47.162] <TB3> INFO: Expecting 411648 events.
[10:50:56.399] <TB3> INFO: 411648 events read in total (8645ms).
[10:50:56.405] <TB3> INFO: Expecting 411648 events.
[10:51:05.470] <TB3> INFO: 411648 events read in total (8662ms).
[10:51:05.482] <TB3> INFO: Expecting 411648 events.
[10:51:14.484] <TB3> INFO: 411648 events read in total (8599ms).
[10:51:14.496] <TB3> INFO: Expecting 411648 events.
[10:51:23.582] <TB3> INFO: 411648 events read in total (8683ms).
[10:51:23.605] <TB3> INFO: Expecting 411648 events.
[10:51:32.685] <TB3> INFO: 411648 events read in total (8677ms).
[10:51:32.707] <TB3> INFO: Expecting 411648 events.
[10:51:41.765] <TB3> INFO: 411648 events read in total (8655ms).
[10:51:41.791] <TB3> INFO: Expecting 411648 events.
[10:51:50.776] <TB3> INFO: 411648 events read in total (8582ms).
[10:51:50.798] <TB3> INFO: Expecting 411648 events.
[10:51:59.856] <TB3> INFO: 411648 events read in total (8655ms).
[10:51:59.880] <TB3> INFO: Expecting 411648 events.
[10:52:08.893] <TB3> INFO: 411648 events read in total (8607ms).
[10:52:08.920] <TB3> INFO: Expecting 411648 events.
[10:52:18.023] <TB3> INFO: 411648 events read in total (8700ms).
[10:52:18.054] <TB3> INFO: Expecting 411648 events.
[10:52:27.102] <TB3> INFO: 411648 events read in total (8646ms).
[10:52:27.134] <TB3> INFO: Expecting 411648 events.
[10:52:36.138] <TB3> INFO: 411648 events read in total (8601ms).
[10:52:36.173] <TB3> INFO: Expecting 411648 events.
[10:52:45.253] <TB3> INFO: 411648 events read in total (8677ms).
[10:52:45.306] <TB3> INFO: Expecting 411648 events.
[10:52:54.424] <TB3> INFO: 411648 events read in total (8715ms).
[10:52:54.465] <TB3> INFO: Expecting 411648 events.
[10:53:03.564] <TB3> INFO: 411648 events read in total (8696ms).
[10:53:03.608] <TB3> INFO: Expecting 411648 events.
[10:53:12.723] <TB3> INFO: 411648 events read in total (8712ms).
[10:53:12.768] <TB3> INFO: Test took 145694ms.
[10:53:13.540] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:53:13.550] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:53:13.550] <TB3> INFO: run 1 of 1
[10:53:13.782] <TB3> INFO: Expecting 5025280 events.
[10:53:39.863] <TB3> INFO: 586224 events read in total (25490ms).
[10:54:05.097] <TB3> INFO: 1171624 events read in total (50724ms).
[10:54:30.300] <TB3> INFO: 1755688 events read in total (75927ms).
[10:54:55.840] <TB3> INFO: 2338432 events read in total (101467ms).
[10:55:21.279] <TB3> INFO: 2922008 events read in total (126907ms).
[10:55:46.355] <TB3> INFO: 3503496 events read in total (151982ms).
[10:56:11.391] <TB3> INFO: 4086288 events read in total (177018ms).
[10:56:36.695] <TB3> INFO: 4668168 events read in total (202322ms).
[10:56:53.197] <TB3> INFO: 5025280 events read in total (218824ms).
[10:56:53.291] <TB3> INFO: Test took 219742ms.
[10:57:17.464] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 2.892368 .. 147.144863
[10:57:17.730] <TB3> INFO: Expecting 208000 events.
[10:57:27.235] <TB3> INFO: 208000 events read in total (8913ms).
[10:57:27.236] <TB3> INFO: Test took 9771ms.
[10:57:27.290] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[10:57:27.300] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:57:27.300] <TB3> INFO: run 1 of 1
[10:57:27.578] <TB3> INFO: Expecting 5191680 events.
[10:57:53.346] <TB3> INFO: 582896 events read in total (25176ms).
[10:58:18.517] <TB3> INFO: 1165840 events read in total (50347ms).
[10:58:44.021] <TB3> INFO: 1748152 events read in total (75851ms).
[10:59:09.075] <TB3> INFO: 2330256 events read in total (100905ms).
[10:59:34.171] <TB3> INFO: 2912328 events read in total (126001ms).
[10:59:59.222] <TB3> INFO: 3492976 events read in total (151052ms).
[11:00:24.586] <TB3> INFO: 4074040 events read in total (176416ms).
[11:00:49.964] <TB3> INFO: 4654272 events read in total (201794ms).
[11:01:14.062] <TB3> INFO: 5191680 events read in total (225892ms).
[11:01:14.143] <TB3> INFO: Test took 226843ms.
[11:01:41.709] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.473847 .. 53.429737
[11:01:41.948] <TB3> INFO: Expecting 208000 events.
[11:01:51.678] <TB3> INFO: 208000 events read in total (9138ms).
[11:01:51.679] <TB3> INFO: Test took 9970ms.
[11:01:51.747] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 63 (-1/-1) hits flags = 528 (plus default)
[11:01:51.759] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:01:51.759] <TB3> INFO: run 1 of 1
[11:01:52.037] <TB3> INFO: Expecting 1564160 events.
[11:02:19.788] <TB3> INFO: 632368 events read in total (27159ms).
[11:02:47.175] <TB3> INFO: 1263648 events read in total (54546ms).
[11:03:00.088] <TB3> INFO: 1564160 events read in total (67459ms).
[11:03:00.118] <TB3> INFO: Test took 68360ms.
[11:03:13.132] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.771536 .. 46.603551
[11:03:13.369] <TB3> INFO: Expecting 208000 events.
[11:03:22.921] <TB3> INFO: 208000 events read in total (8961ms).
[11:03:22.922] <TB3> INFO: Test took 9788ms.
[11:03:22.968] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[11:03:22.978] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:03:22.978] <TB3> INFO: run 1 of 1
[11:03:23.256] <TB3> INFO: Expecting 1397760 events.
[11:03:51.634] <TB3> INFO: 663176 events read in total (27787ms).
[11:04:19.467] <TB3> INFO: 1324984 events read in total (55620ms).
[11:04:22.848] <TB3> INFO: 1397760 events read in total (59001ms).
[11:04:22.881] <TB3> INFO: Test took 59904ms.
[11:04:37.260] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.182304 .. 44.381501
[11:04:37.494] <TB3> INFO: Expecting 208000 events.
[11:04:47.217] <TB3> INFO: 208000 events read in total (9131ms).
[11:04:47.218] <TB3> INFO: Test took 9956ms.
[11:04:47.277] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 54 (-1/-1) hits flags = 528 (plus default)
[11:04:47.289] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:04:47.289] <TB3> INFO: run 1 of 1
[11:04:47.569] <TB3> INFO: Expecting 1397760 events.
[11:05:16.077] <TB3> INFO: 679168 events read in total (27916ms).
[11:05:43.888] <TB3> INFO: 1358288 events read in total (55727ms).
[11:05:45.955] <TB3> INFO: 1397760 events read in total (57794ms).
[11:05:45.984] <TB3> INFO: Test took 58695ms.
[11:05:57.568] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:05:57.568] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:05:57.581] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:05:57.581] <TB3> INFO: run 1 of 1
[11:05:57.813] <TB3> INFO: Expecting 1364480 events.
[11:06:25.536] <TB3> INFO: 667112 events read in total (27131ms).
[11:06:52.811] <TB3> INFO: 1333472 events read in total (54406ms).
[11:06:54.504] <TB3> INFO: 1364480 events read in total (56099ms).
[11:06:54.526] <TB3> INFO: Test took 56945ms.
[11:07:06.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C0.dat
[11:07:06.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C1.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C2.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C3.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C4.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C5.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C6.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C7.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C8.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C9.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C10.dat
[11:07:06.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C11.dat
[11:07:06.092] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C12.dat
[11:07:06.092] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C13.dat
[11:07:06.092] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C14.dat
[11:07:06.092] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C15.dat
[11:07:06.092] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C0.dat
[11:07:06.101] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C1.dat
[11:07:06.109] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C2.dat
[11:07:06.118] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C3.dat
[11:07:06.127] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C4.dat
[11:07:06.136] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C5.dat
[11:07:06.142] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C6.dat
[11:07:06.148] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C7.dat
[11:07:06.153] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C8.dat
[11:07:06.159] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C9.dat
[11:07:06.164] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C10.dat
[11:07:06.171] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C11.dat
[11:07:06.180] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C12.dat
[11:07:06.189] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C13.dat
[11:07:06.198] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C14.dat
[11:07:06.204] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C15.dat
[11:07:06.209] <TB3> INFO: PixTestTrim::trimTest() done
[11:07:06.209] <TB3> INFO: vtrim: 145 155 123 143 152 165 126 122 145 164 156 123 136 145 151 128
[11:07:06.209] <TB3> INFO: vthrcomp: 131 131 116 123 121 131 131 129 117 110 134 112 121 124 130 122
[11:07:06.209] <TB3> INFO: vcal mean: 34.96 34.98 34.95 34.94 34.99 34.97 34.99 34.97 34.97 34.99 35.11 34.95 34.93 34.92 34.93 34.96
[11:07:06.209] <TB3> INFO: vcal RMS: 1.03 1.05 0.97 1.07 1.12 1.14 1.21 1.17 1.06 1.06 1.22 0.99 1.05 1.21 1.06 1.14
[11:07:06.209] <TB3> INFO: bits mean: 9.63 9.67 9.42 10.34 10.12 10.00 9.10 9.07 10.15 9.70 8.32 9.79 9.96 10.42 10.14 10.18
[11:07:06.209] <TB3> INFO: bits RMS: 2.53 2.52 2.80 2.46 2.35 2.46 2.81 2.94 2.59 2.25 2.56 2.55 2.56 2.46 2.36 2.59
[11:07:06.217] <TB3> INFO: ----------------------------------------------------------------------
[11:07:06.217] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:07:06.217] <TB3> INFO: ----------------------------------------------------------------------
[11:07:06.219] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:07:06.228] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:07:06.228] <TB3> INFO: run 1 of 1
[11:07:06.504] <TB3> INFO: Expecting 4160000 events.
[11:07:37.746] <TB3> INFO: 737905 events read in total (30651ms).
[11:08:08.395] <TB3> INFO: 1469645 events read in total (61300ms).
[11:08:39.335] <TB3> INFO: 2195865 events read in total (92240ms).
[11:09:09.721] <TB3> INFO: 2918495 events read in total (122626ms).
[11:09:40.333] <TB3> INFO: 3636985 events read in total (153238ms).
[11:10:03.550] <TB3> INFO: 4160000 events read in total (176455ms).
[11:10:03.614] <TB3> INFO: Test took 177386ms.
[11:10:31.062] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[11:10:31.072] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:10:31.072] <TB3> INFO: run 1 of 1
[11:10:31.331] <TB3> INFO: Expecting 4368000 events.
[11:11:02.105] <TB3> INFO: 704705 events read in total (30182ms).
[11:11:31.975] <TB3> INFO: 1404985 events read in total (60052ms).
[11:12:01.763] <TB3> INFO: 2101100 events read in total (89840ms).
[11:12:31.656] <TB3> INFO: 2793915 events read in total (119733ms).
[11:13:01.607] <TB3> INFO: 3484575 events read in total (149684ms).
[11:13:31.663] <TB3> INFO: 4172760 events read in total (179740ms).
[11:13:40.939] <TB3> INFO: 4368000 events read in total (189016ms).
[11:13:40.001] <TB3> INFO: Test took 189929ms.
[11:14:07.978] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:14:07.988] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:14:07.988] <TB3> INFO: run 1 of 1
[11:14:08.220] <TB3> INFO: Expecting 4180800 events.
[11:14:39.309] <TB3> INFO: 715520 events read in total (30498ms).
[11:15:09.741] <TB3> INFO: 1425760 events read in total (60930ms).
[11:15:39.865] <TB3> INFO: 2131295 events read in total (91054ms).
[11:16:10.175] <TB3> INFO: 2833560 events read in total (121364ms).
[11:16:40.165] <TB3> INFO: 3532230 events read in total (151354ms).
[11:17:09.471] <TB3> INFO: 4180800 events read in total (180660ms).
[11:17:09.549] <TB3> INFO: Test took 181561ms.
[11:17:39.738] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[11:17:39.748] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:17:39.748] <TB3> INFO: run 1 of 1
[11:17:39.989] <TB3> INFO: Expecting 4201600 events.
[11:18:10.744] <TB3> INFO: 714420 events read in total (30163ms).
[11:18:40.649] <TB3> INFO: 1423745 events read in total (60068ms).
[11:19:10.621] <TB3> INFO: 2128000 events read in total (90040ms).
[11:19:40.521] <TB3> INFO: 2829355 events read in total (119940ms).
[11:20:10.403] <TB3> INFO: 3527075 events read in total (149822ms).
[11:20:39.856] <TB3> INFO: 4201600 events read in total (179275ms).
[11:20:39.912] <TB3> INFO: Test took 180164ms.
[11:21:09.023] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[11:21:09.034] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:21:09.034] <TB3> INFO: run 1 of 1
[11:21:09.268] <TB3> INFO: Expecting 4222400 events.
[11:21:40.294] <TB3> INFO: 713295 events read in total (30435ms).
[11:22:10.789] <TB3> INFO: 1421525 events read in total (60930ms).
[11:22:41.068] <TB3> INFO: 2124930 events read in total (91209ms).
[11:23:11.412] <TB3> INFO: 2825015 events read in total (121553ms).
[11:23:41.662] <TB3> INFO: 3522450 events read in total (151803ms).
[11:24:11.561] <TB3> INFO: 4220500 events read in total (181702ms).
[11:24:12.064] <TB3> INFO: 4222400 events read in total (182205ms).
[11:24:12.132] <TB3> INFO: Test took 183098ms.
[11:24:39.222] <TB3> INFO: PixTestTrim::trimBitTest() done
[11:24:39.223] <TB3> INFO: PixTestTrim::doTest() done, duration: 2476 seconds
[11:24:39.223] <TB3> INFO: Decoding statistics:
[11:24:39.223] <TB3> INFO: General information:
[11:24:39.223] <TB3> INFO: 16bit words read: 0
[11:24:39.223] <TB3> INFO: valid events total: 0
[11:24:39.223] <TB3> INFO: empty events: 0
[11:24:39.223] <TB3> INFO: valid events with pixels: 0
[11:24:39.223] <TB3> INFO: valid pixel hits: 0
[11:24:39.223] <TB3> INFO: Event errors: 0
[11:24:39.223] <TB3> INFO: start marker: 0
[11:24:39.223] <TB3> INFO: stop marker: 0
[11:24:39.223] <TB3> INFO: overflow: 0
[11:24:39.223] <TB3> INFO: invalid 5bit words: 0
[11:24:39.223] <TB3> INFO: invalid XOR eye diagram: 0
[11:24:39.223] <TB3> INFO: frame (failed synchr.): 0
[11:24:39.223] <TB3> INFO: idle data (no TBM trl): 0
[11:24:39.223] <TB3> INFO: no data (only TBM hdr): 0
[11:24:39.223] <TB3> INFO: TBM errors: 0
[11:24:39.223] <TB3> INFO: flawed TBM headers: 0
[11:24:39.223] <TB3> INFO: flawed TBM trailers: 0
[11:24:39.223] <TB3> INFO: event ID mismatches: 0
[11:24:39.223] <TB3> INFO: ROC errors: 0
[11:24:39.223] <TB3> INFO: missing ROC header(s): 0
[11:24:39.223] <TB3> INFO: misplaced readback start: 0
[11:24:39.223] <TB3> INFO: Pixel decoding errors: 0
[11:24:39.223] <TB3> INFO: pixel data incomplete: 0
[11:24:39.223] <TB3> INFO: pixel address: 0
[11:24:39.223] <TB3> INFO: pulse height fill bit: 0
[11:24:39.223] <TB3> INFO: buffer corruption: 0
[11:24:39.886] <TB3> INFO: ######################################################################
[11:24:39.886] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:24:39.886] <TB3> INFO: ######################################################################
[11:24:40.151] <TB3> INFO: Expecting 41600 events.
[11:24:43.686] <TB3> INFO: 41600 events read in total (2943ms).
[11:24:43.687] <TB3> INFO: Test took 3799ms.
[11:24:44.121] <TB3> INFO: Expecting 41600 events.
[11:24:47.737] <TB3> INFO: 41600 events read in total (3024ms).
[11:24:47.738] <TB3> INFO: Test took 3849ms.
[11:24:48.026] <TB3> INFO: Expecting 41600 events.
[11:24:51.688] <TB3> INFO: 41600 events read in total (3070ms).
[11:24:51.689] <TB3> INFO: Test took 3928ms.
[11:24:52.017] <TB3> INFO: Expecting 41600 events.
[11:24:55.491] <TB3> INFO: 41600 events read in total (2882ms).
[11:24:55.492] <TB3> INFO: Test took 3780ms.
[11:24:55.789] <TB3> INFO: Expecting 41600 events.
[11:24:59.339] <TB3> INFO: 41600 events read in total (2959ms).
[11:24:59.339] <TB3> INFO: Test took 3823ms.
[11:24:59.630] <TB3> INFO: Expecting 41600 events.
[11:25:03.232] <TB3> INFO: 41600 events read in total (3011ms).
[11:25:03.232] <TB3> INFO: Test took 3869ms.
[11:25:03.521] <TB3> INFO: Expecting 41600 events.
[11:25:07.084] <TB3> INFO: 41600 events read in total (2972ms).
[11:25:07.085] <TB3> INFO: Test took 3829ms.
[11:25:07.373] <TB3> INFO: Expecting 41600 events.
[11:25:10.943] <TB3> INFO: 41600 events read in total (2978ms).
[11:25:10.944] <TB3> INFO: Test took 3835ms.
[11:25:11.232] <TB3> INFO: Expecting 41600 events.
[11:25:14.737] <TB3> INFO: 41600 events read in total (2914ms).
[11:25:14.738] <TB3> INFO: Test took 3771ms.
[11:25:15.034] <TB3> INFO: Expecting 41600 events.
[11:25:18.635] <TB3> INFO: 41600 events read in total (3009ms).
[11:25:18.636] <TB3> INFO: Test took 3875ms.
[11:25:18.923] <TB3> INFO: Expecting 41600 events.
[11:25:22.491] <TB3> INFO: 41600 events read in total (2976ms).
[11:25:22.492] <TB3> INFO: Test took 3833ms.
[11:25:22.780] <TB3> INFO: Expecting 41600 events.
[11:25:26.432] <TB3> INFO: 41600 events read in total (3060ms).
[11:25:26.433] <TB3> INFO: Test took 3917ms.
[11:25:26.721] <TB3> INFO: Expecting 41600 events.
[11:25:30.253] <TB3> INFO: 41600 events read in total (2940ms).
[11:25:30.253] <TB3> INFO: Test took 3796ms.
[11:25:30.544] <TB3> INFO: Expecting 41600 events.
[11:25:34.053] <TB3> INFO: 41600 events read in total (2918ms).
[11:25:34.054] <TB3> INFO: Test took 3775ms.
[11:25:34.352] <TB3> INFO: Expecting 41600 events.
[11:25:37.838] <TB3> INFO: 41600 events read in total (2895ms).
[11:25:37.839] <TB3> INFO: Test took 3759ms.
[11:25:38.127] <TB3> INFO: Expecting 41600 events.
[11:25:41.639] <TB3> INFO: 41600 events read in total (2921ms).
[11:25:41.639] <TB3> INFO: Test took 3777ms.
[11:25:41.927] <TB3> INFO: Expecting 41600 events.
[11:25:45.511] <TB3> INFO: 41600 events read in total (2993ms).
[11:25:45.512] <TB3> INFO: Test took 3850ms.
[11:25:45.800] <TB3> INFO: Expecting 41600 events.
[11:25:49.340] <TB3> INFO: 41600 events read in total (2948ms).
[11:25:49.341] <TB3> INFO: Test took 3806ms.
[11:25:49.628] <TB3> INFO: Expecting 41600 events.
[11:25:53.115] <TB3> INFO: 41600 events read in total (2895ms).
[11:25:53.116] <TB3> INFO: Test took 3752ms.
[11:25:53.406] <TB3> INFO: Expecting 41600 events.
[11:25:56.937] <TB3> INFO: 41600 events read in total (2939ms).
[11:25:56.938] <TB3> INFO: Test took 3796ms.
[11:25:57.226] <TB3> INFO: Expecting 41600 events.
[11:26:00.708] <TB3> INFO: 41600 events read in total (2891ms).
[11:26:00.709] <TB3> INFO: Test took 3748ms.
[11:26:00.997] <TB3> INFO: Expecting 41600 events.
[11:26:04.532] <TB3> INFO: 41600 events read in total (2943ms).
[11:26:04.533] <TB3> INFO: Test took 3800ms.
[11:26:04.821] <TB3> INFO: Expecting 41600 events.
[11:26:08.290] <TB3> INFO: 41600 events read in total (2878ms).
[11:26:08.291] <TB3> INFO: Test took 3735ms.
[11:26:08.579] <TB3> INFO: Expecting 41600 events.
[11:26:12.008] <TB3> INFO: 41600 events read in total (2838ms).
[11:26:12.009] <TB3> INFO: Test took 3695ms.
[11:26:12.307] <TB3> INFO: Expecting 41600 events.
[11:26:15.930] <TB3> INFO: 41600 events read in total (3031ms).
[11:26:15.931] <TB3> INFO: Test took 3896ms.
[11:26:16.234] <TB3> INFO: Expecting 41600 events.
[11:26:19.756] <TB3> INFO: 41600 events read in total (2931ms).
[11:26:19.756] <TB3> INFO: Test took 3799ms.
[11:26:20.044] <TB3> INFO: Expecting 41600 events.
[11:26:23.506] <TB3> INFO: 41600 events read in total (2870ms).
[11:26:23.507] <TB3> INFO: Test took 3728ms.
[11:26:23.795] <TB3> INFO: Expecting 41600 events.
[11:26:27.238] <TB3> INFO: 41600 events read in total (2851ms).
[11:26:27.239] <TB3> INFO: Test took 3709ms.
[11:26:27.527] <TB3> INFO: Expecting 41600 events.
[11:26:31.179] <TB3> INFO: 41600 events read in total (3061ms).
[11:26:31.180] <TB3> INFO: Test took 3918ms.
[11:26:31.477] <TB3> INFO: Expecting 41600 events.
[11:26:34.959] <TB3> INFO: 41600 events read in total (2890ms).
[11:26:34.960] <TB3> INFO: Test took 3757ms.
[11:26:35.248] <TB3> INFO: Expecting 41600 events.
[11:26:38.813] <TB3> INFO: 41600 events read in total (2974ms).
[11:26:38.814] <TB3> INFO: Test took 3831ms.
[11:26:39.104] <TB3> INFO: Expecting 41600 events.
[11:26:42.601] <TB3> INFO: 41600 events read in total (2905ms).
[11:26:42.602] <TB3> INFO: Test took 3762ms.
[11:26:42.893] <TB3> INFO: Expecting 41600 events.
[11:26:46.416] <TB3> INFO: 41600 events read in total (2932ms).
[11:26:46.417] <TB3> INFO: Test took 3789ms.
[11:26:46.704] <TB3> INFO: Expecting 41600 events.
[11:26:50.202] <TB3> INFO: 41600 events read in total (2906ms).
[11:26:50.203] <TB3> INFO: Test took 3763ms.
[11:26:50.491] <TB3> INFO: Expecting 41600 events.
[11:26:54.133] <TB3> INFO: 41600 events read in total (3050ms).
[11:26:54.134] <TB3> INFO: Test took 3908ms.
[11:26:54.422] <TB3> INFO: Expecting 41600 events.
[11:26:57.880] <TB3> INFO: 41600 events read in total (2866ms).
[11:26:57.881] <TB3> INFO: Test took 3724ms.
[11:26:58.169] <TB3> INFO: Expecting 41600 events.
[11:27:01.714] <TB3> INFO: 41600 events read in total (2953ms).
[11:27:01.715] <TB3> INFO: Test took 3810ms.
[11:27:01.003] <TB3> INFO: Expecting 41600 events.
[11:27:05.513] <TB3> INFO: 41600 events read in total (2919ms).
[11:27:05.514] <TB3> INFO: Test took 3776ms.
[11:27:05.808] <TB3> INFO: Expecting 41600 events.
[11:27:09.312] <TB3> INFO: 41600 events read in total (2912ms).
[11:27:09.313] <TB3> INFO: Test took 3776ms.
[11:27:09.601] <TB3> INFO: Expecting 41600 events.
[11:27:13.141] <TB3> INFO: 41600 events read in total (2948ms).
[11:27:13.141] <TB3> INFO: Test took 3804ms.
[11:27:13.430] <TB3> INFO: Expecting 41600 events.
[11:27:16.865] <TB3> INFO: 41600 events read in total (2843ms).
[11:27:16.865] <TB3> INFO: Test took 3700ms.
[11:27:17.167] <TB3> INFO: Expecting 41600 events.
[11:27:20.604] <TB3> INFO: 41600 events read in total (2846ms).
[11:27:20.604] <TB3> INFO: Test took 3716ms.
[11:27:20.895] <TB3> INFO: Expecting 41600 events.
[11:27:24.348] <TB3> INFO: 41600 events read in total (2862ms).
[11:27:24.349] <TB3> INFO: Test took 3719ms.
[11:27:24.665] <TB3> INFO: Expecting 41600 events.
[11:27:28.194] <TB3> INFO: 41600 events read in total (2938ms).
[11:27:28.194] <TB3> INFO: Test took 3821ms.
[11:27:28.482] <TB3> INFO: Expecting 41600 events.
[11:27:32.023] <TB3> INFO: 41600 events read in total (2949ms).
[11:27:32.023] <TB3> INFO: Test took 3805ms.
[11:27:32.314] <TB3> INFO: Expecting 41600 events.
[11:27:35.857] <TB3> INFO: 41600 events read in total (2952ms).
[11:27:35.858] <TB3> INFO: Test took 3809ms.
[11:27:36.146] <TB3> INFO: Expecting 41600 events.
[11:27:39.709] <TB3> INFO: 41600 events read in total (2971ms).
[11:27:39.709] <TB3> INFO: Test took 3828ms.
[11:27:39.998] <TB3> INFO: Expecting 41600 events.
[11:27:43.523] <TB3> INFO: 41600 events read in total (2934ms).
[11:27:43.523] <TB3> INFO: Test took 3790ms.
[11:27:43.811] <TB3> INFO: Expecting 41600 events.
[11:27:47.342] <TB3> INFO: 41600 events read in total (2939ms).
[11:27:47.343] <TB3> INFO: Test took 3796ms.
[11:27:47.631] <TB3> INFO: Expecting 41600 events.
[11:27:51.103] <TB3> INFO: 41600 events read in total (2881ms).
[11:27:51.103] <TB3> INFO: Test took 3737ms.
[11:27:51.394] <TB3> INFO: Expecting 41600 events.
[11:27:54.838] <TB3> INFO: 41600 events read in total (2853ms).
[11:27:54.839] <TB3> INFO: Test took 3710ms.
[11:27:55.137] <TB3> INFO: Expecting 41600 events.
[11:27:58.610] <TB3> INFO: 41600 events read in total (2882ms).
[11:27:58.610] <TB3> INFO: Test took 3748ms.
[11:27:58.901] <TB3> INFO: Expecting 41600 events.
[11:28:02.438] <TB3> INFO: 41600 events read in total (2945ms).
[11:28:02.438] <TB3> INFO: Test took 3802ms.
[11:28:02.728] <TB3> INFO: Expecting 41600 events.
[11:28:06.264] <TB3> INFO: 41600 events read in total (2944ms).
[11:28:06.265] <TB3> INFO: Test took 3801ms.
[11:28:06.553] <TB3> INFO: Expecting 2560 events.
[11:28:07.437] <TB3> INFO: 2560 events read in total (292ms).
[11:28:07.438] <TB3> INFO: Test took 1162ms.
[11:28:07.745] <TB3> INFO: Expecting 2560 events.
[11:28:08.628] <TB3> INFO: 2560 events read in total (292ms).
[11:28:08.628] <TB3> INFO: Test took 1190ms.
[11:28:08.936] <TB3> INFO: Expecting 2560 events.
[11:28:09.819] <TB3> INFO: 2560 events read in total (292ms).
[11:28:09.820] <TB3> INFO: Test took 1191ms.
[11:28:10.128] <TB3> INFO: Expecting 2560 events.
[11:28:11.010] <TB3> INFO: 2560 events read in total (291ms).
[11:28:11.010] <TB3> INFO: Test took 1190ms.
[11:28:11.319] <TB3> INFO: Expecting 2560 events.
[11:28:12.196] <TB3> INFO: 2560 events read in total (286ms).
[11:28:12.197] <TB3> INFO: Test took 1186ms.
[11:28:12.504] <TB3> INFO: Expecting 2560 events.
[11:28:13.383] <TB3> INFO: 2560 events read in total (287ms).
[11:28:13.383] <TB3> INFO: Test took 1186ms.
[11:28:13.691] <TB3> INFO: Expecting 2560 events.
[11:28:14.572] <TB3> INFO: 2560 events read in total (289ms).
[11:28:14.572] <TB3> INFO: Test took 1189ms.
[11:28:14.880] <TB3> INFO: Expecting 2560 events.
[11:28:15.761] <TB3> INFO: 2560 events read in total (289ms).
[11:28:15.761] <TB3> INFO: Test took 1188ms.
[11:28:16.069] <TB3> INFO: Expecting 2560 events.
[11:28:16.945] <TB3> INFO: 2560 events read in total (284ms).
[11:28:16.945] <TB3> INFO: Test took 1183ms.
[11:28:17.254] <TB3> INFO: Expecting 2560 events.
[11:28:18.130] <TB3> INFO: 2560 events read in total (285ms).
[11:28:18.130] <TB3> INFO: Test took 1184ms.
[11:28:18.438] <TB3> INFO: Expecting 2560 events.
[11:28:19.316] <TB3> INFO: 2560 events read in total (286ms).
[11:28:19.317] <TB3> INFO: Test took 1187ms.
[11:28:19.625] <TB3> INFO: Expecting 2560 events.
[11:28:20.502] <TB3> INFO: 2560 events read in total (286ms).
[11:28:20.502] <TB3> INFO: Test took 1185ms.
[11:28:20.810] <TB3> INFO: Expecting 2560 events.
[11:28:21.693] <TB3> INFO: 2560 events read in total (291ms).
[11:28:21.693] <TB3> INFO: Test took 1190ms.
[11:28:21.001] <TB3> INFO: Expecting 2560 events.
[11:28:22.883] <TB3> INFO: 2560 events read in total (291ms).
[11:28:22.883] <TB3> INFO: Test took 1190ms.
[11:28:23.191] <TB3> INFO: Expecting 2560 events.
[11:28:24.076] <TB3> INFO: 2560 events read in total (294ms).
[11:28:24.076] <TB3> INFO: Test took 1192ms.
[11:28:24.384] <TB3> INFO: Expecting 2560 events.
[11:28:25.266] <TB3> INFO: 2560 events read in total (290ms).
[11:28:25.266] <TB3> INFO: Test took 1190ms.
[11:28:25.574] <TB3> INFO: Expecting 655360 events.
[11:28:45.738] <TB3> INFO: 531260 events read in total (19572ms).
[11:28:50.630] <TB3> INFO: 655360 events read in total (24464ms).
[11:28:50.643] <TB3> INFO: Test took 25374ms.
[11:28:50.666] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:28:50.931] <TB3> INFO: Expecting 655360 events.
[11:29:04.941] <TB3> INFO: 655360 events read in total (13418ms).
[11:29:04.954] <TB3> INFO: Expecting 655360 events.
[11:29:18.947] <TB3> INFO: 655360 events read in total (13590ms).
[11:29:18.961] <TB3> INFO: Expecting 655360 events.
[11:29:32.915] <TB3> INFO: 655360 events read in total (13549ms).
[11:29:32.943] <TB3> INFO: Expecting 655360 events.
[11:29:46.958] <TB3> INFO: 655360 events read in total (13612ms).
[11:29:46.980] <TB3> INFO: Expecting 655360 events.
[11:30:01.017] <TB3> INFO: 655360 events read in total (13634ms).
[11:30:01.045] <TB3> INFO: Expecting 655360 events.
[11:30:15.036] <TB3> INFO: 655360 events read in total (13588ms).
[11:30:15.068] <TB3> INFO: Expecting 655360 events.
[11:30:29.046] <TB3> INFO: 655360 events read in total (13575ms).
[11:30:29.096] <TB3> INFO: Expecting 655360 events.
[11:30:43.081] <TB3> INFO: 655360 events read in total (13582ms).
[11:30:43.124] <TB3> INFO: Expecting 655360 events.
[11:30:57.094] <TB3> INFO: 655360 events read in total (13567ms).
[11:30:57.196] <TB3> INFO: Expecting 655360 events.
[11:31:10.959] <TB3> INFO: 655360 events read in total (13360ms).
[11:31:11.007] <TB3> INFO: Expecting 655360 events.
[11:31:24.850] <TB3> INFO: 655360 events read in total (13440ms).
[11:31:24.934] <TB3> INFO: Expecting 655360 events.
[11:31:38.904] <TB3> INFO: 655360 events read in total (13567ms).
[11:31:38.961] <TB3> INFO: Expecting 655360 events.
[11:31:53.051] <TB3> INFO: 655360 events read in total (13687ms).
[11:31:53.136] <TB3> INFO: Expecting 655360 events.
[11:32:07.018] <TB3> INFO: 655360 events read in total (13479ms).
[11:32:07.096] <TB3> INFO: Expecting 655360 events.
[11:32:20.988] <TB3> INFO: 655360 events read in total (13489ms).
[11:32:21.072] <TB3> INFO: Expecting 655360 events.
[11:32:34.839] <TB3> INFO: 655360 events read in total (13364ms).
[11:32:34.960] <TB3> INFO: Test took 224294ms.
[11:32:35.119] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.124] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.128] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.133] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.138] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.142] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.147] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.152] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.156] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.161] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.166] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.171] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.176] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.181] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.186] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:32:35.191] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.196] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.203] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.209] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.214] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.220] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.225] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:32:35.230] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:32:35.235] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:32:35.240] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:32:35.245] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[11:32:35.249] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[11:32:35.254] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[11:32:35.260] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[11:32:35.265] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[11:32:35.271] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.276] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.281] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.287] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.293] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:35.300] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:35.305] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:32:35.311] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.316] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.321] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.326] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:35.359] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C0.dat
[11:32:35.359] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C1.dat
[11:32:35.359] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C2.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C3.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C4.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C5.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C6.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C7.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C8.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C9.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C10.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C11.dat
[11:32:35.360] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C12.dat
[11:32:35.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C13.dat
[11:32:35.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C14.dat
[11:32:35.361] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C15.dat
[11:32:35.630] <TB3> INFO: Expecting 41600 events.
[11:32:38.750] <TB3> INFO: 41600 events read in total (2528ms).
[11:32:38.750] <TB3> INFO: Test took 3387ms.
[11:32:39.198] <TB3> INFO: Expecting 41600 events.
[11:32:42.221] <TB3> INFO: 41600 events read in total (2432ms).
[11:32:42.222] <TB3> INFO: Test took 3261ms.
[11:32:42.670] <TB3> INFO: Expecting 41600 events.
[11:32:45.737] <TB3> INFO: 41600 events read in total (2475ms).
[11:32:45.737] <TB3> INFO: Test took 3302ms.
[11:32:45.951] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:46.039] <TB3> INFO: Expecting 2560 events.
[11:32:46.922] <TB3> INFO: 2560 events read in total (291ms).
[11:32:46.922] <TB3> INFO: Test took 971ms.
[11:32:46.924] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:47.230] <TB3> INFO: Expecting 2560 events.
[11:32:48.115] <TB3> INFO: 2560 events read in total (293ms).
[11:32:48.116] <TB3> INFO: Test took 1192ms.
[11:32:48.117] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:48.424] <TB3> INFO: Expecting 2560 events.
[11:32:49.310] <TB3> INFO: 2560 events read in total (294ms).
[11:32:49.310] <TB3> INFO: Test took 1193ms.
[11:32:49.312] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:49.618] <TB3> INFO: Expecting 2560 events.
[11:32:50.501] <TB3> INFO: 2560 events read in total (291ms).
[11:32:50.501] <TB3> INFO: Test took 1189ms.
[11:32:50.503] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:50.810] <TB3> INFO: Expecting 2560 events.
[11:32:51.691] <TB3> INFO: 2560 events read in total (290ms).
[11:32:51.692] <TB3> INFO: Test took 1189ms.
[11:32:51.693] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:51.000] <TB3> INFO: Expecting 2560 events.
[11:32:52.882] <TB3> INFO: 2560 events read in total (290ms).
[11:32:52.883] <TB3> INFO: Test took 1190ms.
[11:32:52.885] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:53.191] <TB3> INFO: Expecting 2560 events.
[11:32:54.073] <TB3> INFO: 2560 events read in total (291ms).
[11:32:54.074] <TB3> INFO: Test took 1190ms.
[11:32:54.075] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:54.382] <TB3> INFO: Expecting 2560 events.
[11:32:55.266] <TB3> INFO: 2560 events read in total (292ms).
[11:32:55.266] <TB3> INFO: Test took 1191ms.
[11:32:55.268] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:55.574] <TB3> INFO: Expecting 2560 events.
[11:32:56.455] <TB3> INFO: 2560 events read in total (289ms).
[11:32:56.455] <TB3> INFO: Test took 1187ms.
[11:32:56.457] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:56.763] <TB3> INFO: Expecting 2560 events.
[11:32:57.641] <TB3> INFO: 2560 events read in total (286ms).
[11:32:57.642] <TB3> INFO: Test took 1185ms.
[11:32:57.644] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:57.950] <TB3> INFO: Expecting 2560 events.
[11:32:58.831] <TB3> INFO: 2560 events read in total (290ms).
[11:32:58.831] <TB3> INFO: Test took 1187ms.
[11:32:58.833] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:59.139] <TB3> INFO: Expecting 2560 events.
[11:33:00.018] <TB3> INFO: 2560 events read in total (287ms).
[11:33:00.018] <TB3> INFO: Test took 1185ms.
[11:33:00.020] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:00.326] <TB3> INFO: Expecting 2560 events.
[11:33:01.203] <TB3> INFO: 2560 events read in total (285ms).
[11:33:01.203] <TB3> INFO: Test took 1184ms.
[11:33:01.205] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:01.511] <TB3> INFO: Expecting 2560 events.
[11:33:02.391] <TB3> INFO: 2560 events read in total (288ms).
[11:33:02.391] <TB3> INFO: Test took 1186ms.
[11:33:02.393] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:02.700] <TB3> INFO: Expecting 2560 events.
[11:33:03.580] <TB3> INFO: 2560 events read in total (290ms).
[11:33:03.581] <TB3> INFO: Test took 1188ms.
[11:33:03.583] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:03.889] <TB3> INFO: Expecting 2560 events.
[11:33:04.768] <TB3> INFO: 2560 events read in total (287ms).
[11:33:04.768] <TB3> INFO: Test took 1186ms.
[11:33:04.770] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:05.076] <TB3> INFO: Expecting 2560 events.
[11:33:05.955] <TB3> INFO: 2560 events read in total (287ms).
[11:33:05.955] <TB3> INFO: Test took 1185ms.
[11:33:05.957] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:06.263] <TB3> INFO: Expecting 2560 events.
[11:33:07.148] <TB3> INFO: 2560 events read in total (293ms).
[11:33:07.149] <TB3> INFO: Test took 1192ms.
[11:33:07.150] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:07.457] <TB3> INFO: Expecting 2560 events.
[11:33:08.336] <TB3> INFO: 2560 events read in total (287ms).
[11:33:08.336] <TB3> INFO: Test took 1186ms.
[11:33:08.338] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:08.645] <TB3> INFO: Expecting 2560 events.
[11:33:09.523] <TB3> INFO: 2560 events read in total (287ms).
[11:33:09.523] <TB3> INFO: Test took 1185ms.
[11:33:09.525] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:09.832] <TB3> INFO: Expecting 2560 events.
[11:33:10.709] <TB3> INFO: 2560 events read in total (286ms).
[11:33:10.710] <TB3> INFO: Test took 1185ms.
[11:33:10.712] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:11.018] <TB3> INFO: Expecting 2560 events.
[11:33:11.897] <TB3> INFO: 2560 events read in total (287ms).
[11:33:11.897] <TB3> INFO: Test took 1185ms.
[11:33:11.899] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:12.205] <TB3> INFO: Expecting 2560 events.
[11:33:13.083] <TB3> INFO: 2560 events read in total (286ms).
[11:33:13.084] <TB3> INFO: Test took 1185ms.
[11:33:13.086] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:13.392] <TB3> INFO: Expecting 2560 events.
[11:33:14.270] <TB3> INFO: 2560 events read in total (286ms).
[11:33:14.270] <TB3> INFO: Test took 1185ms.
[11:33:14.272] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:14.578] <TB3> INFO: Expecting 2560 events.
[11:33:15.462] <TB3> INFO: 2560 events read in total (292ms).
[11:33:15.462] <TB3> INFO: Test took 1190ms.
[11:33:15.464] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:15.770] <TB3> INFO: Expecting 2560 events.
[11:33:16.653] <TB3> INFO: 2560 events read in total (291ms).
[11:33:16.653] <TB3> INFO: Test took 1189ms.
[11:33:16.655] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:16.961] <TB3> INFO: Expecting 2560 events.
[11:33:17.843] <TB3> INFO: 2560 events read in total (291ms).
[11:33:17.843] <TB3> INFO: Test took 1188ms.
[11:33:17.845] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:18.152] <TB3> INFO: Expecting 2560 events.
[11:33:19.034] <TB3> INFO: 2560 events read in total (291ms).
[11:33:19.035] <TB3> INFO: Test took 1190ms.
[11:33:19.036] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:19.343] <TB3> INFO: Expecting 2560 events.
[11:33:20.225] <TB3> INFO: 2560 events read in total (290ms).
[11:33:20.225] <TB3> INFO: Test took 1189ms.
[11:33:20.227] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:20.534] <TB3> INFO: Expecting 2560 events.
[11:33:21.416] <TB3> INFO: 2560 events read in total (291ms).
[11:33:21.416] <TB3> INFO: Test took 1189ms.
[11:33:21.418] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:21.724] <TB3> INFO: Expecting 2560 events.
[11:33:22.607] <TB3> INFO: 2560 events read in total (291ms).
[11:33:22.608] <TB3> INFO: Test took 1190ms.
[11:33:22.610] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:33:22.916] <TB3> INFO: Expecting 2560 events.
[11:33:23.800] <TB3> INFO: 2560 events read in total (292ms).
[11:33:23.800] <TB3> INFO: Test took 1191ms.
[11:33:24.264] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[11:33:24.264] <TB3> INFO: PH scale (per ROC): 50 49 39 43 38 48 38 35 59 43 41 38 60 52 50 58
[11:33:24.264] <TB3> INFO: PH offset (per ROC): 130 140 147 109 106 132 89 97 134 112 114 102 127 133 140 128
[11:33:24.269] <TB3> INFO: Decoding statistics:
[11:33:24.269] <TB3> INFO: General information:
[11:33:24.269] <TB3> INFO: 16bit words read: 127882
[11:33:24.269] <TB3> INFO: valid events total: 20480
[11:33:24.269] <TB3> INFO: empty events: 17979
[11:33:24.269] <TB3> INFO: valid events with pixels: 2501
[11:33:24.269] <TB3> INFO: valid pixel hits: 2501
[11:33:24.269] <TB3> INFO: Event errors: 0
[11:33:24.269] <TB3> INFO: start marker: 0
[11:33:24.269] <TB3> INFO: stop marker: 0
[11:33:24.269] <TB3> INFO: overflow: 0
[11:33:24.269] <TB3> INFO: invalid 5bit words: 0
[11:33:24.269] <TB3> INFO: invalid XOR eye diagram: 0
[11:33:24.269] <TB3> INFO: frame (failed synchr.): 0
[11:33:24.269] <TB3> INFO: idle data (no TBM trl): 0
[11:33:24.269] <TB3> INFO: no data (only TBM hdr): 0
[11:33:24.269] <TB3> INFO: TBM errors: 0
[11:33:24.269] <TB3> INFO: flawed TBM headers: 0
[11:33:24.269] <TB3> INFO: flawed TBM trailers: 0
[11:33:24.269] <TB3> INFO: event ID mismatches: 0
[11:33:24.269] <TB3> INFO: ROC errors: 0
[11:33:24.269] <TB3> INFO: missing ROC header(s): 0
[11:33:24.269] <TB3> INFO: misplaced readback start: 0
[11:33:24.269] <TB3> INFO: Pixel decoding errors: 0
[11:33:24.269] <TB3> INFO: pixel data incomplete: 0
[11:33:24.269] <TB3> INFO: pixel address: 0
[11:33:24.269] <TB3> INFO: pulse height fill bit: 0
[11:33:24.269] <TB3> INFO: buffer corruption: 0
[11:33:24.533] <TB3> INFO: ######################################################################
[11:33:24.533] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:33:24.533] <TB3> INFO: ######################################################################
[11:33:24.544] <TB3> INFO: scanning low vcal = 10
[11:33:24.775] <TB3> INFO: Expecting 41600 events.
[11:33:28.316] <TB3> INFO: 41600 events read in total (2949ms).
[11:33:28.316] <TB3> INFO: Test took 3772ms.
[11:33:28.318] <TB3> INFO: scanning low vcal = 20
[11:33:28.618] <TB3> INFO: Expecting 41600 events.
[11:33:32.184] <TB3> INFO: 41600 events read in total (2975ms).
[11:33:32.184] <TB3> INFO: Test took 3866ms.
[11:33:32.185] <TB3> INFO: scanning low vcal = 30
[11:33:32.482] <TB3> INFO: Expecting 41600 events.
[11:33:36.093] <TB3> INFO: 41600 events read in total (3020ms).
[11:33:36.094] <TB3> INFO: Test took 3908ms.
[11:33:36.097] <TB3> INFO: scanning low vcal = 40
[11:33:36.374] <TB3> INFO: Expecting 41600 events.
[11:33:40.275] <TB3> INFO: 41600 events read in total (3310ms).
[11:33:40.276] <TB3> INFO: Test took 4179ms.
[11:33:40.279] <TB3> INFO: scanning low vcal = 50
[11:33:40.555] <TB3> INFO: Expecting 41600 events.
[11:33:44.513] <TB3> INFO: 41600 events read in total (3366ms).
[11:33:44.514] <TB3> INFO: Test took 4235ms.
[11:33:44.516] <TB3> INFO: scanning low vcal = 60
[11:33:44.793] <TB3> INFO: Expecting 41600 events.
[11:33:48.714] <TB3> INFO: 41600 events read in total (3329ms).
[11:33:48.715] <TB3> INFO: Test took 4198ms.
[11:33:48.719] <TB3> INFO: scanning low vcal = 70
[11:33:48.995] <TB3> INFO: Expecting 41600 events.
[11:33:52.948] <TB3> INFO: 41600 events read in total (3362ms).
[11:33:52.949] <TB3> INFO: Test took 4230ms.
[11:33:52.951] <TB3> INFO: scanning low vcal = 80
[11:33:53.228] <TB3> INFO: Expecting 41600 events.
[11:33:57.161] <TB3> INFO: 41600 events read in total (3341ms).
[11:33:57.161] <TB3> INFO: Test took 4210ms.
[11:33:57.164] <TB3> INFO: scanning low vcal = 90
[11:33:57.440] <TB3> INFO: Expecting 41600 events.
[11:34:01.343] <TB3> INFO: 41600 events read in total (3311ms).
[11:34:01.344] <TB3> INFO: Test took 4180ms.
[11:34:01.346] <TB3> INFO: scanning low vcal = 100
[11:34:01.623] <TB3> INFO: Expecting 41600 events.
[11:34:05.570] <TB3> INFO: 41600 events read in total (3355ms).
[11:34:05.570] <TB3> INFO: Test took 4223ms.
[11:34:05.573] <TB3> INFO: scanning low vcal = 110
[11:34:05.850] <TB3> INFO: Expecting 41600 events.
[11:34:09.768] <TB3> INFO: 41600 events read in total (3327ms).
[11:34:09.768] <TB3> INFO: Test took 4195ms.
[11:34:09.771] <TB3> INFO: scanning low vcal = 120
[11:34:10.048] <TB3> INFO: Expecting 41600 events.
[11:34:13.970] <TB3> INFO: 41600 events read in total (3331ms).
[11:34:13.971] <TB3> INFO: Test took 4200ms.
[11:34:13.973] <TB3> INFO: scanning low vcal = 130
[11:34:14.251] <TB3> INFO: Expecting 41600 events.
[11:34:18.204] <TB3> INFO: 41600 events read in total (3361ms).
[11:34:18.206] <TB3> INFO: Test took 4232ms.
[11:34:18.208] <TB3> INFO: scanning low vcal = 140
[11:34:18.485] <TB3> INFO: Expecting 41600 events.
[11:34:22.414] <TB3> INFO: 41600 events read in total (3337ms).
[11:34:22.415] <TB3> INFO: Test took 4207ms.
[11:34:22.418] <TB3> INFO: scanning low vcal = 150
[11:34:22.695] <TB3> INFO: Expecting 41600 events.
[11:34:26.642] <TB3> INFO: 41600 events read in total (3356ms).
[11:34:26.643] <TB3> INFO: Test took 4225ms.
[11:34:26.646] <TB3> INFO: scanning low vcal = 160
[11:34:26.922] <TB3> INFO: Expecting 41600 events.
[11:34:30.837] <TB3> INFO: 41600 events read in total (3323ms).
[11:34:30.838] <TB3> INFO: Test took 4192ms.
[11:34:30.840] <TB3> INFO: scanning low vcal = 170
[11:34:31.117] <TB3> INFO: Expecting 41600 events.
[11:34:35.052] <TB3> INFO: 41600 events read in total (3344ms).
[11:34:35.053] <TB3> INFO: Test took 4213ms.
[11:34:35.056] <TB3> INFO: scanning low vcal = 180
[11:34:35.332] <TB3> INFO: Expecting 41600 events.
[11:34:39.311] <TB3> INFO: 41600 events read in total (3387ms).
[11:34:39.312] <TB3> INFO: Test took 4256ms.
[11:34:39.314] <TB3> INFO: scanning low vcal = 190
[11:34:39.591] <TB3> INFO: Expecting 41600 events.
[11:34:43.552] <TB3> INFO: 41600 events read in total (3369ms).
[11:34:43.552] <TB3> INFO: Test took 4237ms.
[11:34:43.555] <TB3> INFO: scanning low vcal = 200
[11:34:43.832] <TB3> INFO: Expecting 41600 events.
[11:34:47.818] <TB3> INFO: 41600 events read in total (3395ms).
[11:34:47.819] <TB3> INFO: Test took 4264ms.
[11:34:47.821] <TB3> INFO: scanning low vcal = 210
[11:34:48.098] <TB3> INFO: Expecting 41600 events.
[11:34:52.050] <TB3> INFO: 41600 events read in total (3360ms).
[11:34:52.051] <TB3> INFO: Test took 4229ms.
[11:34:52.054] <TB3> INFO: scanning low vcal = 220
[11:34:52.330] <TB3> INFO: Expecting 41600 events.
[11:34:56.322] <TB3> INFO: 41600 events read in total (3400ms).
[11:34:56.323] <TB3> INFO: Test took 4269ms.
[11:34:56.326] <TB3> INFO: scanning low vcal = 230
[11:34:56.603] <TB3> INFO: Expecting 41600 events.
[11:35:00.545] <TB3> INFO: 41600 events read in total (3351ms).
[11:35:00.546] <TB3> INFO: Test took 4220ms.
[11:35:00.548] <TB3> INFO: scanning low vcal = 240
[11:35:00.825] <TB3> INFO: Expecting 41600 events.
[11:35:04.781] <TB3> INFO: 41600 events read in total (3364ms).
[11:35:04.782] <TB3> INFO: Test took 4233ms.
[11:35:04.785] <TB3> INFO: scanning low vcal = 250
[11:35:05.062] <TB3> INFO: Expecting 41600 events.
[11:35:08.000] <TB3> INFO: 41600 events read in total (3347ms).
[11:35:08.001] <TB3> INFO: Test took 4216ms.
[11:35:09.005] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:35:09.281] <TB3> INFO: Expecting 41600 events.
[11:35:13.242] <TB3> INFO: 41600 events read in total (3370ms).
[11:35:13.242] <TB3> INFO: Test took 4237ms.
[11:35:13.245] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:35:13.522] <TB3> INFO: Expecting 41600 events.
[11:35:17.463] <TB3> INFO: 41600 events read in total (3350ms).
[11:35:17.464] <TB3> INFO: Test took 4219ms.
[11:35:17.467] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:35:17.743] <TB3> INFO: Expecting 41600 events.
[11:35:21.681] <TB3> INFO: 41600 events read in total (3346ms).
[11:35:21.682] <TB3> INFO: Test took 4215ms.
[11:35:21.685] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:35:21.961] <TB3> INFO: Expecting 41600 events.
[11:35:25.931] <TB3> INFO: 41600 events read in total (3378ms).
[11:35:25.932] <TB3> INFO: Test took 4247ms.
[11:35:25.935] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:35:26.221] <TB3> INFO: Expecting 41600 events.
[11:35:30.212] <TB3> INFO: 41600 events read in total (3399ms).
[11:35:30.212] <TB3> INFO: Test took 4277ms.
[11:35:30.620] <TB3> INFO: PixTestGainPedestal::measure() done
[11:36:04.774] <TB3> INFO: PixTestGainPedestal::fit() done
[11:36:04.774] <TB3> INFO: non-linearity mean: 0.973 0.971 0.954 0.930 0.924 0.968 0.903 0.949 0.978 0.933 0.901 0.917 0.982 0.973 0.970 0.980
[11:36:04.774] <TB3> INFO: non-linearity RMS: 0.004 0.005 0.014 0.052 0.057 0.006 0.116 0.022 0.003 0.049 0.153 0.146 0.003 0.006 0.005 0.003
[11:36:04.774] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:36:04.787] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:36:04.801] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:36:04.814] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:36:04.827] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:36:04.841] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:36:04.854] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:36:04.868] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:36:04.884] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:36:04.906] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:36:04.928] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:36:04.950] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:36:04.972] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:36:04.994] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:36:05.016] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:36:05.037] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1124_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:36:05.058] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[11:36:05.058] <TB3> INFO: Decoding statistics:
[11:36:05.058] <TB3> INFO: General information:
[11:36:05.058] <TB3> INFO: 16bit words read: 3327926
[11:36:05.058] <TB3> INFO: valid events total: 332800
[11:36:05.058] <TB3> INFO: empty events: 0
[11:36:05.058] <TB3> INFO: valid events with pixels: 332800
[11:36:05.058] <TB3> INFO: valid pixel hits: 665563
[11:36:05.058] <TB3> INFO: Event errors: 0
[11:36:05.058] <TB3> INFO: start marker: 0
[11:36:05.058] <TB3> INFO: stop marker: 0
[11:36:05.058] <TB3> INFO: overflow: 0
[11:36:05.058] <TB3> INFO: invalid 5bit words: 0
[11:36:05.058] <TB3> INFO: invalid XOR eye diagram: 0
[11:36:05.058] <TB3> INFO: frame (failed synchr.): 0
[11:36:05.058] <TB3> INFO: idle data (no TBM trl): 0
[11:36:05.058] <TB3> INFO: no data (only TBM hdr): 0
[11:36:05.058] <TB3> INFO: TBM errors: 0
[11:36:05.058] <TB3> INFO: flawed TBM headers: 0
[11:36:05.058] <TB3> INFO: flawed TBM trailers: 0
[11:36:05.058] <TB3> INFO: event ID mismatches: 0
[11:36:05.058] <TB3> INFO: ROC errors: 0
[11:36:05.058] <TB3> INFO: missing ROC header(s): 0
[11:36:05.058] <TB3> INFO: misplaced readback start: 0
[11:36:05.058] <TB3> INFO: Pixel decoding errors: 0
[11:36:05.058] <TB3> INFO: pixel data incomplete: 0
[11:36:05.058] <TB3> INFO: pixel address: 0
[11:36:05.058] <TB3> INFO: pulse height fill bit: 0
[11:36:05.058] <TB3> INFO: buffer corruption: 0
[11:36:05.083] <TB3> INFO: Decoding statistics:
[11:36:05.083] <TB3> INFO: General information:
[11:36:05.083] <TB3> INFO: 16bit words read: 3457344
[11:36:05.083] <TB3> INFO: valid events total: 353536
[11:36:05.083] <TB3> INFO: empty events: 18235
[11:36:05.083] <TB3> INFO: valid events with pixels: 335301
[11:36:05.083] <TB3> INFO: valid pixel hits: 668064
[11:36:05.083] <TB3> INFO: Event errors: 0
[11:36:05.083] <TB3> INFO: start marker: 0
[11:36:05.083] <TB3> INFO: stop marker: 0
[11:36:05.083] <TB3> INFO: overflow: 0
[11:36:05.083] <TB3> INFO: invalid 5bit words: 0
[11:36:05.083] <TB3> INFO: invalid XOR eye diagram: 0
[11:36:05.083] <TB3> INFO: frame (failed synchr.): 0
[11:36:05.083] <TB3> INFO: idle data (no TBM trl): 0
[11:36:05.083] <TB3> INFO: no data (only TBM hdr): 0
[11:36:05.083] <TB3> INFO: TBM errors: 0
[11:36:05.083] <TB3> INFO: flawed TBM headers: 0
[11:36:05.083] <TB3> INFO: flawed TBM trailers: 0
[11:36:05.084] <TB3> INFO: event ID mismatches: 0
[11:36:05.084] <TB3> INFO: ROC errors: 0
[11:36:05.084] <TB3> INFO: missing ROC header(s): 0
[11:36:05.084] <TB3> INFO: misplaced readback start: 0
[11:36:05.084] <TB3> INFO: Pixel decoding errors: 0
[11:36:05.084] <TB3> INFO: pixel data incomplete: 0
[11:36:05.084] <TB3> INFO: pixel address: 0
[11:36:05.084] <TB3> INFO: pulse height fill bit: 0
[11:36:05.084] <TB3> INFO: buffer corruption: 0
[11:36:05.084] <TB3> INFO: enter test to run
[11:36:05.084] <TB3> INFO: test: exit no parameter change
[11:36:05.165] <TB3> QUIET: Connection to board 170 closed.
[11:36:05.166] <TB3> INFO: pXar: this is the end, my friend