[09:44:40.542] <TB3> INFO: *** Welcome to pxar ***
[09:44:40.542] <TB3> INFO: *** Today: 2016/11/15
[09:44:40.553] <TB3> INFO: *** Version: c8ba-dirty
[09:44:40.553] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C15.dat
[09:44:40.554] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C1b.dat
[09:44:40.554] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//defaultMaskFile.dat
[09:44:40.554] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters_C15.dat
[09:44:40.620] <TB3> INFO: clk: 4
[09:44:40.620] <TB3> INFO: ctr: 4
[09:44:40.620] <TB3> INFO: sda: 19
[09:44:40.620] <TB3> INFO: tin: 9
[09:44:40.620] <TB3> INFO: level: 15
[09:44:40.620] <TB3> INFO: triggerdelay: 0
[09:44:40.620] <TB3> QUIET: Instanciating API for pxar v2.7.6+77~g4811f5c
[09:44:40.620] <TB3> INFO: Log level: INFO
[09:44:40.630] <TB3> INFO: Found DTB DTB_WWVASW
[09:44:40.638] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[09:44:40.640] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[09:44:40.642] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[09:44:42.147] <TB3> INFO: DUT info:
[09:44:42.147] <TB3> INFO: The DUT currently contains the following objects:
[09:44:42.147] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[09:44:42.147] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:44:42.147] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:44:42.147] <TB3> INFO: TBM Core alpha (2): 7 registers set
[09:44:42.147] <TB3> INFO: TBM Core beta (3): 7 registers set
[09:44:42.147] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[09:44:42.147] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.148] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:44:42.550] <TB3> INFO: enter 'restricted' command line mode
[09:44:42.550] <TB3> INFO: enter test to run
[09:44:42.550] <TB3> INFO: test: pretest no parameter change
[09:44:42.550] <TB3> INFO: running: pretest
[09:44:42.558] <TB3> INFO: ######################################################################
[09:44:42.558] <TB3> INFO: PixTestPretest::doTest()
[09:44:42.558] <TB3> INFO: ######################################################################
[09:44:42.559] <TB3> INFO: ----------------------------------------------------------------------
[09:44:42.559] <TB3> INFO: PixTestPretest::programROC()
[09:44:42.559] <TB3> INFO: ----------------------------------------------------------------------
[09:45:00.574] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:45:00.574] <TB3> INFO: IA differences per ROC: 19.3 20.9 19.3 20.1 20.1 17.7 19.3 17.7 17.7 19.3 19.3 16.1 19.3 17.7 18.5 17.7
[09:45:00.641] <TB3> INFO: ----------------------------------------------------------------------
[09:45:00.642] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:45:00.642] <TB3> INFO: ----------------------------------------------------------------------
[09:45:21.939] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[09:45:21.939] <TB3> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 20.1 20.1 20.9 19.3 19.3 20.1 20.1 19.3 19.3 19.3 20.9 18.5 19.3
[09:45:21.972] <TB3> INFO: ----------------------------------------------------------------------
[09:45:21.972] <TB3> INFO: PixTestPretest::findTiming()
[09:45:21.972] <TB3> INFO: ----------------------------------------------------------------------
[09:45:21.972] <TB3> INFO: PixTestCmd::init()

[09:45:53.707] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:45:53.707] <TB3> INFO: (success/tries = 100/100), width = 3
[09:45:55.214] <TB3> INFO: ----------------------------------------------------------------------
[09:45:55.214] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:45:55.214] <TB3> INFO: ----------------------------------------------------------------------
[09:45:55.309] <TB3> INFO: Expecting 231680 events.
[09:46:05.239] <TB3> INFO: 231680 events read in total (9338ms).
[09:46:05.250] <TB3> INFO: Test took 10030ms.
[09:46:05.498] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:46:05.535] <TB3> INFO: ----------------------------------------------------------------------
[09:46:05.535] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:46:05.535] <TB3> INFO: ----------------------------------------------------------------------
[09:46:05.631] <TB3> INFO: Expecting 231680 events.
[09:46:15.571] <TB3> INFO: 231680 events read in total (9348ms).
[09:46:15.582] <TB3> INFO: Test took 10041ms.
[09:46:15.839] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:46:15.839] <TB3> INFO: CalDel: 98 96 101 82 85 93 102 102 94 111 124 112 79 76 95 77
[09:46:15.839] <TB3> INFO: VthrComp: 51 51 51 55 51 51 51 53 51 51 51 51 52 51 51 54
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C0.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C1.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C2.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C3.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C4.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C5.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C6.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C7.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C8.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C9.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C10.dat
[09:46:15.845] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C11.dat
[09:46:15.846] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C12.dat
[09:46:15.846] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C13.dat
[09:46:15.846] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C14.dat
[09:46:15.846] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters_C15.dat
[09:46:15.846] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C0a.dat
[09:46:15.846] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C0b.dat
[09:46:15.846] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C1a.dat
[09:46:15.846] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//tbmParameters_C1b.dat
[09:46:15.846] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[09:46:15.903] <TB3> INFO: enter test to run
[09:46:15.903] <TB3> INFO: test: FullTest no parameter change
[09:46:15.903] <TB3> INFO: running: fulltest
[09:46:15.903] <TB3> INFO: ######################################################################
[09:46:15.903] <TB3> INFO: PixTestFullTest::doTest()
[09:46:15.903] <TB3> INFO: ######################################################################
[09:46:15.905] <TB3> INFO: ######################################################################
[09:46:15.905] <TB3> INFO: PixTestAlive::doTest()
[09:46:15.905] <TB3> INFO: ######################################################################
[09:46:15.907] <TB3> INFO: ----------------------------------------------------------------------
[09:46:15.907] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:46:15.907] <TB3> INFO: ----------------------------------------------------------------------
[09:46:16.148] <TB3> INFO: Expecting 41600 events.
[09:46:19.731] <TB3> INFO: 41600 events read in total (2992ms).
[09:46:19.732] <TB3> INFO: Test took 3823ms.
[09:46:19.966] <TB3> INFO: PixTestAlive::aliveTest() done
[09:46:19.966] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:46:19.967] <TB3> INFO: ----------------------------------------------------------------------
[09:46:19.967] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:46:19.967] <TB3> INFO: ----------------------------------------------------------------------
[09:46:20.208] <TB3> INFO: Expecting 41600 events.
[09:46:23.225] <TB3> INFO: 41600 events read in total (2425ms).
[09:46:23.226] <TB3> INFO: Test took 3256ms.
[09:46:23.226] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:46:23.466] <TB3> INFO: PixTestAlive::maskTest() done
[09:46:23.466] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:46:23.468] <TB3> INFO: ----------------------------------------------------------------------
[09:46:23.468] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:46:23.468] <TB3> INFO: ----------------------------------------------------------------------
[09:46:23.711] <TB3> INFO: Expecting 41600 events.
[09:46:27.299] <TB3> INFO: 41600 events read in total (2996ms).
[09:46:27.299] <TB3> INFO: Test took 3829ms.
[09:46:27.536] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:46:27.536] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:46:27.536] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[09:46:27.536] <TB3> INFO: Decoding statistics:
[09:46:27.536] <TB3> INFO: General information:
[09:46:27.536] <TB3> INFO: 16bit words read: 0
[09:46:27.536] <TB3> INFO: valid events total: 0
[09:46:27.536] <TB3> INFO: empty events: 0
[09:46:27.537] <TB3> INFO: valid events with pixels: 0
[09:46:27.537] <TB3> INFO: valid pixel hits: 0
[09:46:27.537] <TB3> INFO: Event errors: 0
[09:46:27.537] <TB3> INFO: start marker: 0
[09:46:27.537] <TB3> INFO: stop marker: 0
[09:46:27.537] <TB3> INFO: overflow: 0
[09:46:27.537] <TB3> INFO: invalid 5bit words: 0
[09:46:27.537] <TB3> INFO: invalid XOR eye diagram: 0
[09:46:27.537] <TB3> INFO: frame (failed synchr.): 0
[09:46:27.537] <TB3> INFO: idle data (no TBM trl): 0
[09:46:27.537] <TB3> INFO: no data (only TBM hdr): 0
[09:46:27.537] <TB3> INFO: TBM errors: 0
[09:46:27.537] <TB3> INFO: flawed TBM headers: 0
[09:46:27.537] <TB3> INFO: flawed TBM trailers: 0
[09:46:27.537] <TB3> INFO: event ID mismatches: 0
[09:46:27.537] <TB3> INFO: ROC errors: 0
[09:46:27.537] <TB3> INFO: missing ROC header(s): 0
[09:46:27.537] <TB3> INFO: misplaced readback start: 0
[09:46:27.537] <TB3> INFO: Pixel decoding errors: 0
[09:46:27.537] <TB3> INFO: pixel data incomplete: 0
[09:46:27.537] <TB3> INFO: pixel address: 0
[09:46:27.537] <TB3> INFO: pulse height fill bit: 0
[09:46:27.537] <TB3> INFO: buffer corruption: 0
[09:46:27.543] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C15.dat
[09:46:27.543] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr_C15.dat

[09:46:27.543] <TB3> INFO: ######################################################################
[09:46:27.543] <TB3> INFO: PixTestReadback::doTest()
[09:46:27.543] <TB3> INFO: ######################################################################
[09:46:27.543] <TB3> INFO: ----------------------------------------------------------------------
[09:46:27.543] <TB3> INFO: PixTestReadback::CalibrateVd()
[09:46:27.543] <TB3> INFO: ----------------------------------------------------------------------
[09:46:37.526] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C0.dat
[09:46:37.526] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C1.dat
[09:46:37.526] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C2.dat
[09:46:37.526] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C3.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C4.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C5.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C6.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C7.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C8.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C9.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C10.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C11.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C12.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C13.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C14.dat
[09:46:37.527] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C15.dat
[09:46:37.558] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:46:37.558] <TB3> INFO: ----------------------------------------------------------------------
[09:46:37.558] <TB3> INFO: PixTestReadback::CalibrateVa()
[09:46:37.558] <TB3> INFO: ----------------------------------------------------------------------
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C0.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C1.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C2.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C3.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C4.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C5.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C6.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C7.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C8.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C9.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C10.dat
[09:46:47.507] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C11.dat
[09:46:47.508] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C12.dat
[09:46:47.508] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C13.dat
[09:46:47.508] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C14.dat
[09:46:47.508] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C15.dat
[09:46:47.549] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:46:47.549] <TB3> INFO: ----------------------------------------------------------------------
[09:46:47.549] <TB3> INFO: PixTestReadback::readbackVbg()
[09:46:47.549] <TB3> INFO: ----------------------------------------------------------------------
[09:46:55.224] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:46:55.224] <TB3> INFO: ----------------------------------------------------------------------
[09:46:55.224] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[09:46:55.224] <TB3> INFO: ----------------------------------------------------------------------
[09:46:55.224] <TB3> INFO: Vbg will be calibrated using Vd calibration
[09:46:55.224] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.9calibrated Vbg = 1.21863 :::*/*/*/*/
[09:46:55.224] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.3calibrated Vbg = 1.21135 :::*/*/*/*/
[09:46:55.224] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.8calibrated Vbg = 1.20866 :::*/*/*/*/
[09:46:55.224] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.8calibrated Vbg = 1.20628 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 155.7calibrated Vbg = 1.20912 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.9calibrated Vbg = 1.21392 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 163.3calibrated Vbg = 1.21993 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.2calibrated Vbg = 1.21784 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.4calibrated Vbg = 1.21218 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.6calibrated Vbg = 1.20409 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.4calibrated Vbg = 1.21028 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.6calibrated Vbg = 1.20244 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 150.5calibrated Vbg = 1.19996 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.2calibrated Vbg = 1.20329 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.1calibrated Vbg = 1.2072 :::*/*/*/*/
[09:46:55.225] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.9calibrated Vbg = 1.20623 :::*/*/*/*/
[09:46:55.228] <TB3> INFO: ----------------------------------------------------------------------
[09:46:55.228] <TB3> INFO: PixTestReadback::CalibrateIa()
[09:46:55.228] <TB3> INFO: ----------------------------------------------------------------------
[09:49:36.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C0.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C1.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C2.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C3.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C4.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C5.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C6.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C7.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C8.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C9.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C10.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C11.dat
[09:49:36.070] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C12.dat
[09:49:36.071] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C13.dat
[09:49:36.071] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C14.dat
[09:49:36.071] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//readbackCal_C15.dat
[09:49:36.098] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:49:36.099] <TB3> INFO: PixTestReadback::doTest() done
[09:49:36.099] <TB3> INFO: Decoding statistics:
[09:49:36.100] <TB3> INFO: General information:
[09:49:36.100] <TB3> INFO: 16bit words read: 1536
[09:49:36.100] <TB3> INFO: valid events total: 256
[09:49:36.100] <TB3> INFO: empty events: 256
[09:49:36.100] <TB3> INFO: valid events with pixels: 0
[09:49:36.100] <TB3> INFO: valid pixel hits: 0
[09:49:36.100] <TB3> INFO: Event errors: 0
[09:49:36.100] <TB3> INFO: start marker: 0
[09:49:36.100] <TB3> INFO: stop marker: 0
[09:49:36.100] <TB3> INFO: overflow: 0
[09:49:36.100] <TB3> INFO: invalid 5bit words: 0
[09:49:36.100] <TB3> INFO: invalid XOR eye diagram: 0
[09:49:36.100] <TB3> INFO: frame (failed synchr.): 0
[09:49:36.100] <TB3> INFO: idle data (no TBM trl): 0
[09:49:36.100] <TB3> INFO: no data (only TBM hdr): 0
[09:49:36.100] <TB3> INFO: TBM errors: 0
[09:49:36.100] <TB3> INFO: flawed TBM headers: 0
[09:49:36.100] <TB3> INFO: flawed TBM trailers: 0
[09:49:36.100] <TB3> INFO: event ID mismatches: 0
[09:49:36.100] <TB3> INFO: ROC errors: 0
[09:49:36.100] <TB3> INFO: missing ROC header(s): 0
[09:49:36.100] <TB3> INFO: misplaced readback start: 0
[09:49:36.100] <TB3> INFO: Pixel decoding errors: 0
[09:49:36.100] <TB3> INFO: pixel data incomplete: 0
[09:49:36.100] <TB3> INFO: pixel address: 0
[09:49:36.100] <TB3> INFO: pulse height fill bit: 0
[09:49:36.100] <TB3> INFO: buffer corruption: 0
[09:49:36.148] <TB3> INFO: ######################################################################
[09:49:36.148] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:49:36.148] <TB3> INFO: ######################################################################
[09:49:36.150] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:49:36.192] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:49:36.192] <TB3> INFO: run 1 of 1
[09:49:36.441] <TB3> INFO: Expecting 3120000 events.
[09:50:08.338] <TB3> INFO: 673885 events read in total (31306ms).











[09:50:39.197] <TB3> INFO: 1341420 events read in total (62165ms).




















[09:51:10.247] <TB3> INFO: 2008130 events read in total (93215ms).











[09:51:40.699] <TB3> INFO: 2674735 events read in total (123667ms).











[09:52:02.169] <TB3> INFO: 3120000 events read in total (145137ms).
[09:52:02.292] <TB3> INFO: Test took 146101ms.
[09:52:27.072] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 170 seconds
[09:52:27.072] <TB3> INFO: number of dead bumps (per ROC): 0 0 2 0 0 0 1 0 0 0 0 0 1 0 0 0
[09:52:27.073] <TB3> INFO: separation cut (per ROC): 102 126 110 125 104 107 111 112 102 104 103 110 106 120 105 111
[09:52:27.073] <TB3> INFO: Decoding statistics:
[09:52:27.073] <TB3> INFO: General information:
[09:52:27.073] <TB3> INFO: 16bit words read: 0
[09:52:27.073] <TB3> INFO: valid events total: 0
[09:52:27.073] <TB3> INFO: empty events: 0
[09:52:27.073] <TB3> INFO: valid events with pixels: 0
[09:52:27.073] <TB3> INFO: valid pixel hits: 0
[09:52:27.073] <TB3> INFO: Event errors: 0
[09:52:27.073] <TB3> INFO: start marker: 0
[09:52:27.073] <TB3> INFO: stop marker: 0
[09:52:27.073] <TB3> INFO: overflow: 0
[09:52:27.073] <TB3> INFO: invalid 5bit words: 0
[09:52:27.073] <TB3> INFO: invalid XOR eye diagram: 0
[09:52:27.073] <TB3> INFO: frame (failed synchr.): 0
[09:52:27.073] <TB3> INFO: idle data (no TBM trl): 0
[09:52:27.073] <TB3> INFO: no data (only TBM hdr): 0
[09:52:27.073] <TB3> INFO: TBM errors: 0
[09:52:27.073] <TB3> INFO: flawed TBM headers: 0
[09:52:27.073] <TB3> INFO: flawed TBM trailers: 0
[09:52:27.073] <TB3> INFO: event ID mismatches: 0
[09:52:27.073] <TB3> INFO: ROC errors: 0
[09:52:27.073] <TB3> INFO: missing ROC header(s): 0
[09:52:27.073] <TB3> INFO: misplaced readback start: 0
[09:52:27.073] <TB3> INFO: Pixel decoding errors: 0
[09:52:27.073] <TB3> INFO: pixel data incomplete: 0
[09:52:27.073] <TB3> INFO: pixel address: 0
[09:52:27.073] <TB3> INFO: pulse height fill bit: 0
[09:52:27.073] <TB3> INFO: buffer corruption: 0
[09:52:27.110] <TB3> INFO: ######################################################################
[09:52:27.110] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:52:27.110] <TB3> INFO: ######################################################################
[09:52:27.110] <TB3> INFO: ----------------------------------------------------------------------
[09:52:27.110] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:52:27.110] <TB3> INFO: ----------------------------------------------------------------------
[09:52:27.111] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[09:52:27.125] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[09:52:27.125] <TB3> INFO: run 1 of 1
[09:52:27.361] <TB3> INFO: Expecting 36608000 events.
[09:52:51.925] <TB3> INFO: 704200 events read in total (23972ms).
[09:53:15.768] <TB3> INFO: 1389200 events read in total (47815ms).
[09:53:39.737] <TB3> INFO: 2079500 events read in total (71784ms).
[09:54:03.447] <TB3> INFO: 2766650 events read in total (95494ms).
[09:54:27.194] <TB3> INFO: 3452400 events read in total (119241ms).
[09:54:50.610] <TB3> INFO: 4134200 events read in total (142657ms).
[09:55:14.045] <TB3> INFO: 4818150 events read in total (166092ms).
[09:55:37.769] <TB3> INFO: 5499900 events read in total (189817ms).
[09:56:01.697] <TB3> INFO: 6184800 events read in total (213744ms).
[09:56:25.466] <TB3> INFO: 6869500 events read in total (237513ms).
[09:56:49.224] <TB3> INFO: 7552200 events read in total (261271ms).
[09:57:12.982] <TB3> INFO: 8235350 events read in total (285029ms).
[09:57:36.704] <TB3> INFO: 8918750 events read in total (308751ms).
[09:58:00.548] <TB3> INFO: 9601050 events read in total (332595ms).
[09:58:24.264] <TB3> INFO: 10284700 events read in total (356311ms).
[09:58:47.894] <TB3> INFO: 10965000 events read in total (379941ms).
[09:59:11.695] <TB3> INFO: 11648000 events read in total (403742ms).
[09:59:35.501] <TB3> INFO: 12329150 events read in total (427548ms).
[09:59:59.393] <TB3> INFO: 13011250 events read in total (451440ms).
[10:00:23.052] <TB3> INFO: 13690450 events read in total (475099ms).
[10:00:46.554] <TB3> INFO: 14368400 events read in total (498601ms).
[10:01:10.130] <TB3> INFO: 15046000 events read in total (522177ms).
[10:01:33.956] <TB3> INFO: 15724100 events read in total (546003ms).
[10:01:57.513] <TB3> INFO: 16400500 events read in total (569560ms).
[10:02:20.983] <TB3> INFO: 17075350 events read in total (593030ms).
[10:02:44.756] <TB3> INFO: 17752300 events read in total (616803ms).
[10:03:08.061] <TB3> INFO: 18425500 events read in total (640108ms).
[10:03:31.660] <TB3> INFO: 19098600 events read in total (663707ms).
[10:03:55.115] <TB3> INFO: 19769050 events read in total (687162ms).
[10:04:18.255] <TB3> INFO: 20440650 events read in total (710302ms).
[10:04:41.572] <TB3> INFO: 21110350 events read in total (733619ms).
[10:05:04.939] <TB3> INFO: 21781000 events read in total (756986ms).
[10:05:27.983] <TB3> INFO: 22450350 events read in total (780030ms).
[10:05:51.442] <TB3> INFO: 23118650 events read in total (803489ms).
[10:06:14.746] <TB3> INFO: 23786600 events read in total (826793ms).
[10:06:37.994] <TB3> INFO: 24454500 events read in total (850041ms).
[10:07:01.246] <TB3> INFO: 25123250 events read in total (873294ms).
[10:07:24.612] <TB3> INFO: 25791650 events read in total (896659ms).
[10:07:47.766] <TB3> INFO: 26459500 events read in total (919813ms).
[10:08:11.153] <TB3> INFO: 27126900 events read in total (943201ms).
[10:08:34.302] <TB3> INFO: 27792400 events read in total (966349ms).
[10:08:57.380] <TB3> INFO: 28458600 events read in total (989427ms).
[10:09:20.800] <TB3> INFO: 29125650 events read in total (1012847ms).
[10:09:44.086] <TB3> INFO: 29790000 events read in total (1036133ms).
[10:10:07.389] <TB3> INFO: 30453100 events read in total (1059436ms).
[10:10:30.475] <TB3> INFO: 31114000 events read in total (1082522ms).
[10:10:53.794] <TB3> INFO: 31776750 events read in total (1105841ms).
[10:11:17.041] <TB3> INFO: 32439450 events read in total (1129088ms).
[10:11:40.119] <TB3> INFO: 33103800 events read in total (1152166ms).
[10:12:03.485] <TB3> INFO: 33767500 events read in total (1175532ms).
[10:12:27.037] <TB3> INFO: 34433200 events read in total (1199084ms).
[10:12:50.114] <TB3> INFO: 35095650 events read in total (1222161ms).
[10:13:13.583] <TB3> INFO: 35762900 events read in total (1245630ms).
[10:13:36.737] <TB3> INFO: 36440150 events read in total (1268784ms).
[10:13:42.717] <TB3> INFO: 36608000 events read in total (1274764ms).
[10:13:42.797] <TB3> INFO: Test took 1275673ms.
[10:13:43.107] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:44.532] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:46.175] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:48.114] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:50.131] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:51.993] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:53.539] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:55.171] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:56.634] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:58.106] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:13:59.572] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:01.048] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:02.555] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:04.097] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:05.544] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:07.016] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:14:08.533] <TB3> INFO: PixTestScurves::scurves() done
[10:14:08.533] <TB3> INFO: Vcal mean: 116.59 139.56 121.76 129.16 116.62 123.43 128.97 134.23 123.36 124.02 118.41 118.37 122.85 129.98 117.29 126.37
[10:14:08.534] <TB3> INFO: Vcal RMS: 5.03 6.07 7.54 6.64 5.14 5.96 5.45 6.89 5.76 5.38 7.43 8.08 6.04 5.82 5.86 6.27
[10:14:08.534] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1301 seconds
[10:14:08.534] <TB3> INFO: Decoding statistics:
[10:14:08.534] <TB3> INFO: General information:
[10:14:08.534] <TB3> INFO: 16bit words read: 0
[10:14:08.534] <TB3> INFO: valid events total: 0
[10:14:08.534] <TB3> INFO: empty events: 0
[10:14:08.534] <TB3> INFO: valid events with pixels: 0
[10:14:08.534] <TB3> INFO: valid pixel hits: 0
[10:14:08.534] <TB3> INFO: Event errors: 0
[10:14:08.534] <TB3> INFO: start marker: 0
[10:14:08.534] <TB3> INFO: stop marker: 0
[10:14:08.534] <TB3> INFO: overflow: 0
[10:14:08.534] <TB3> INFO: invalid 5bit words: 0
[10:14:08.534] <TB3> INFO: invalid XOR eye diagram: 0
[10:14:08.534] <TB3> INFO: frame (failed synchr.): 0
[10:14:08.534] <TB3> INFO: idle data (no TBM trl): 0
[10:14:08.534] <TB3> INFO: no data (only TBM hdr): 0
[10:14:08.534] <TB3> INFO: TBM errors: 0
[10:14:08.534] <TB3> INFO: flawed TBM headers: 0
[10:14:08.534] <TB3> INFO: flawed TBM trailers: 0
[10:14:08.534] <TB3> INFO: event ID mismatches: 0
[10:14:08.534] <TB3> INFO: ROC errors: 0
[10:14:08.534] <TB3> INFO: missing ROC header(s): 0
[10:14:08.534] <TB3> INFO: misplaced readback start: 0
[10:14:08.534] <TB3> INFO: Pixel decoding errors: 0
[10:14:08.534] <TB3> INFO: pixel data incomplete: 0
[10:14:08.534] <TB3> INFO: pixel address: 0
[10:14:08.534] <TB3> INFO: pulse height fill bit: 0
[10:14:08.534] <TB3> INFO: buffer corruption: 0
[10:14:08.602] <TB3> INFO: ######################################################################
[10:14:08.602] <TB3> INFO: PixTestTrim::doTest()
[10:14:08.602] <TB3> INFO: ######################################################################
[10:14:08.603] <TB3> INFO: ----------------------------------------------------------------------
[10:14:08.603] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:14:08.603] <TB3> INFO: ----------------------------------------------------------------------
[10:14:08.643] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:14:08.643] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:14:08.656] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:14:08.656] <TB3> INFO: run 1 of 1
[10:14:08.901] <TB3> INFO: Expecting 5025280 events.
[10:14:40.510] <TB3> INFO: 834544 events read in total (31000ms).
[10:15:11.119] <TB3> INFO: 1667248 events read in total (61610ms).
[10:15:42.054] <TB3> INFO: 2496888 events read in total (92545ms).
[10:16:12.784] <TB3> INFO: 3323640 events read in total (123274ms).
[10:16:43.608] <TB3> INFO: 4146376 events read in total (154099ms).
[10:17:14.535] <TB3> INFO: 4968288 events read in total (185025ms).
[10:17:16.964] <TB3> INFO: 5025280 events read in total (187454ms).
[10:17:17.021] <TB3> INFO: Test took 188365ms.
[10:17:32.324] <TB3> INFO: ROC 0 VthrComp = 110
[10:17:32.325] <TB3> INFO: ROC 1 VthrComp = 136
[10:17:32.325] <TB3> INFO: ROC 2 VthrComp = 116
[10:17:32.325] <TB3> INFO: ROC 3 VthrComp = 130
[10:17:32.325] <TB3> INFO: ROC 4 VthrComp = 114
[10:17:32.325] <TB3> INFO: ROC 5 VthrComp = 122
[10:17:32.325] <TB3> INFO: ROC 6 VthrComp = 125
[10:17:32.325] <TB3> INFO: ROC 7 VthrComp = 127
[10:17:32.325] <TB3> INFO: ROC 8 VthrComp = 113
[10:17:32.325] <TB3> INFO: ROC 9 VthrComp = 119
[10:17:32.325] <TB3> INFO: ROC 10 VthrComp = 109
[10:17:32.326] <TB3> INFO: ROC 11 VthrComp = 109
[10:17:32.326] <TB3> INFO: ROC 12 VthrComp = 117
[10:17:32.326] <TB3> INFO: ROC 13 VthrComp = 132
[10:17:32.326] <TB3> INFO: ROC 14 VthrComp = 114
[10:17:32.326] <TB3> INFO: ROC 15 VthrComp = 127
[10:17:32.564] <TB3> INFO: Expecting 41600 events.
[10:17:36.097] <TB3> INFO: 41600 events read in total (2941ms).
[10:17:36.098] <TB3> INFO: Test took 3771ms.
[10:17:36.107] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:17:36.107] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:17:36.118] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:17:36.118] <TB3> INFO: run 1 of 1
[10:17:36.396] <TB3> INFO: Expecting 5025280 events.
[10:18:03.156] <TB3> INFO: 592320 events read in total (26168ms).
[10:18:29.456] <TB3> INFO: 1184088 events read in total (52468ms).
[10:18:56.072] <TB3> INFO: 1776424 events read in total (79084ms).
[10:19:22.315] <TB3> INFO: 2367416 events read in total (105327ms).
[10:19:49.148] <TB3> INFO: 2956392 events read in total (132160ms).
[10:20:15.240] <TB3> INFO: 3543848 events read in total (158252ms).
[10:20:42.010] <TB3> INFO: 4130704 events read in total (185022ms).
[10:21:08.504] <TB3> INFO: 4717200 events read in total (211516ms).
[10:21:22.570] <TB3> INFO: 5025280 events read in total (225582ms).
[10:21:22.647] <TB3> INFO: Test took 226529ms.
[10:21:46.411] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 66.5148 for pixel 2/9 mean/min/max = 50.6399/34.6196/66.6602
[10:21:46.411] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 67.7764 for pixel 4/68 mean/min/max = 51.5238/35.1428/67.9049
[10:21:46.412] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 65.985 for pixel 15/1 mean/min/max = 48.2468/30.3223/66.1714
[10:21:46.412] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 64.7723 for pixel 0/4 mean/min/max = 49.1801/33.4903/64.8698
[10:21:46.413] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 61.1277 for pixel 16/61 mean/min/max = 47.2917/33.4076/61.1758
[10:21:46.413] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 64.242 for pixel 17/6 mean/min/max = 48.4054/32.5362/64.2747
[10:21:46.414] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 63.2523 for pixel 3/5 mean/min/max = 47.8383/32.391/63.2855
[10:21:46.415] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 68.2133 for pixel 51/2 mean/min/max = 50.2856/31.5256/69.0457
[10:21:46.415] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 65.5018 for pixel 20/22 mean/min/max = 49.1573/32.6252/65.6894
[10:21:46.416] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.6833 for pixel 6/1 mean/min/max = 47.1154/31.438/62.7929
[10:21:46.416] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 73.6055 for pixel 12/7 mean/min/max = 52.549/31.4771/73.6209
[10:21:46.417] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 71.9321 for pixel 11/6 mean/min/max = 51.8111/31.5545/72.0676
[10:21:46.417] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 62.349 for pixel 9/52 mean/min/max = 47.8112/33.2169/62.4054
[10:21:46.417] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.0176 for pixel 1/22 mean/min/max = 45.1666/32.2342/58.099
[10:21:46.418] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 63.35 for pixel 1/5 mean/min/max = 47.7725/32.1906/63.3543
[10:21:46.418] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.4025 for pixel 3/79 mean/min/max = 46.5409/31.2911/61.7907
[10:21:46.419] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:46.513] <TB3> INFO: Expecting 411648 events.
[10:21:55.968] <TB3> INFO: 411648 events read in total (8863ms).
[10:21:55.978] <TB3> INFO: Expecting 411648 events.
[10:22:05.298] <TB3> INFO: 411648 events read in total (8917ms).
[10:22:05.308] <TB3> INFO: Expecting 411648 events.
[10:22:14.601] <TB3> INFO: 411648 events read in total (8889ms).
[10:22:14.615] <TB3> INFO: Expecting 411648 events.
[10:22:23.874] <TB3> INFO: 411648 events read in total (8856ms).
[10:22:23.889] <TB3> INFO: Expecting 411648 events.
[10:22:33.200] <TB3> INFO: 411648 events read in total (8907ms).
[10:22:33.218] <TB3> INFO: Expecting 411648 events.
[10:22:42.552] <TB3> INFO: 411648 events read in total (8930ms).
[10:22:42.574] <TB3> INFO: Expecting 411648 events.
[10:22:51.900] <TB3> INFO: 411648 events read in total (8923ms).
[10:22:51.926] <TB3> INFO: Expecting 411648 events.
[10:23:01.230] <TB3> INFO: 411648 events read in total (8900ms).
[10:23:01.257] <TB3> INFO: Expecting 411648 events.
[10:23:10.601] <TB3> INFO: 411648 events read in total (8942ms).
[10:23:10.631] <TB3> INFO: Expecting 411648 events.
[10:23:19.868] <TB3> INFO: 411648 events read in total (8834ms).
[10:23:19.900] <TB3> INFO: Expecting 411648 events.
[10:23:29.090] <TB3> INFO: 411648 events read in total (8787ms).
[10:23:29.181] <TB3> INFO: Expecting 411648 events.
[10:23:38.441] <TB3> INFO: 411648 events read in total (8857ms).
[10:23:38.492] <TB3> INFO: Expecting 411648 events.
[10:23:47.728] <TB3> INFO: 411648 events read in total (8833ms).
[10:23:47.779] <TB3> INFO: Expecting 411648 events.
[10:23:57.035] <TB3> INFO: 411648 events read in total (8853ms).
[10:23:57.081] <TB3> INFO: Expecting 411648 events.
[10:24:06.328] <TB3> INFO: 411648 events read in total (8844ms).
[10:24:06.386] <TB3> INFO: Expecting 411648 events.
[10:24:15.727] <TB3> INFO: 411648 events read in total (8938ms).
[10:24:15.782] <TB3> INFO: Test took 149363ms.
[10:24:16.514] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:24:16.527] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:24:16.527] <TB3> INFO: run 1 of 1
[10:24:16.765] <TB3> INFO: Expecting 5025280 events.
[10:24:43.819] <TB3> INFO: 592112 events read in total (26462ms).
[10:25:10.277] <TB3> INFO: 1184992 events read in total (52920ms).
[10:25:37.065] <TB3> INFO: 1775744 events read in total (79708ms).
[10:26:03.860] <TB3> INFO: 2367976 events read in total (106503ms).
[10:26:30.701] <TB3> INFO: 2963360 events read in total (133344ms).
[10:26:57.766] <TB3> INFO: 3560768 events read in total (160409ms).
[10:27:24.692] <TB3> INFO: 4156488 events read in total (187335ms).
[10:27:52.050] <TB3> INFO: 4749328 events read in total (214693ms).
[10:28:05.070] <TB3> INFO: 5025280 events read in total (227713ms).
[10:28:05.220] <TB3> INFO: Test took 228694ms.
[10:28:27.324] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 11.795260 .. 146.720000
[10:28:27.563] <TB3> INFO: Expecting 208000 events.
[10:28:37.603] <TB3> INFO: 208000 events read in total (9448ms).
[10:28:37.604] <TB3> INFO: Test took 10278ms.
[10:28:37.663] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[10:28:37.676] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:28:37.676] <TB3> INFO: run 1 of 1
[10:28:37.921] <TB3> INFO: Expecting 5191680 events.
[10:29:04.815] <TB3> INFO: 585240 events read in total (26302ms).
[10:29:31.124] <TB3> INFO: 1170480 events read in total (52612ms).
[10:29:57.604] <TB3> INFO: 1754720 events read in total (79091ms).
[10:30:24.075] <TB3> INFO: 2339472 events read in total (105562ms).
[10:30:50.526] <TB3> INFO: 2924352 events read in total (132013ms).
[10:31:16.680] <TB3> INFO: 3508352 events read in total (158167ms).
[10:31:42.940] <TB3> INFO: 4092944 events read in total (184427ms).
[10:32:09.545] <TB3> INFO: 4677008 events read in total (211032ms).
[10:32:33.459] <TB3> INFO: 5191680 events read in total (234946ms).
[10:32:33.602] <TB3> INFO: Test took 235927ms.
[10:33:01.520] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.500000 .. 46.499745
[10:33:01.784] <TB3> INFO: Expecting 208000 events.
[10:33:11.770] <TB3> INFO: 208000 events read in total (9395ms).
[10:33:11.772] <TB3> INFO: Test took 10249ms.
[10:33:11.827] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[10:33:11.841] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:33:11.841] <TB3> INFO: run 1 of 1
[10:33:12.084] <TB3> INFO: Expecting 1364480 events.
[10:33:41.129] <TB3> INFO: 658072 events read in total (28451ms).
[10:34:09.083] <TB3> INFO: 1316064 events read in total (56405ms).
[10:34:11.673] <TB3> INFO: 1364480 events read in total (58995ms).
[10:34:11.713] <TB3> INFO: Test took 59873ms.
[10:34:24.246] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 22.756420 .. 48.167384
[10:34:24.488] <TB3> INFO: Expecting 208000 events.
[10:34:34.586] <TB3> INFO: 208000 events read in total (9506ms).
[10:34:34.587] <TB3> INFO: Test took 10337ms.
[10:34:34.642] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 12 .. 58 (-1/-1) hits flags = 528 (plus default)
[10:34:34.657] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:34:34.657] <TB3> INFO: run 1 of 1
[10:34:34.909] <TB3> INFO: Expecting 1564160 events.
[10:35:03.736] <TB3> INFO: 667072 events read in total (28235ms).
[10:35:32.555] <TB3> INFO: 1334048 events read in total (57054ms).
[10:35:42.586] <TB3> INFO: 1564160 events read in total (67085ms).
[10:35:42.626] <TB3> INFO: Test took 67970ms.
[10:35:55.997] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 22.071258 .. 48.700452
[10:35:56.239] <TB3> INFO: Expecting 208000 events.
[10:36:06.192] <TB3> INFO: 208000 events read in total (9362ms).
[10:36:06.193] <TB3> INFO: Test took 10193ms.
[10:36:06.258] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 58 (-1/-1) hits flags = 528 (plus default)
[10:36:06.272] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:36:06.272] <TB3> INFO: run 1 of 1
[10:36:06.534] <TB3> INFO: Expecting 1564160 events.
[10:36:34.716] <TB3> INFO: 666832 events read in total (27591ms).
[10:37:02.898] <TB3> INFO: 1333912 events read in total (55774ms).
[10:37:13.146] <TB3> INFO: 1564160 events read in total (66021ms).
[10:37:13.190] <TB3> INFO: Test took 66918ms.
[10:37:28.206] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:37:28.206] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:37:28.220] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:37:28.220] <TB3> INFO: run 1 of 1
[10:37:28.459] <TB3> INFO: Expecting 1364480 events.
[10:37:58.005] <TB3> INFO: 668280 events read in total (28954ms).
[10:38:25.996] <TB3> INFO: 1336176 events read in total (56946ms).
[10:38:27.685] <TB3> INFO: 1364480 events read in total (58635ms).
[10:38:27.731] <TB3> INFO: Test took 59511ms.
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C0.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C1.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C2.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C3.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C4.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C5.dat
[10:38:40.043] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C6.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C7.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C8.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C9.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C10.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C11.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C12.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C13.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C14.dat
[10:38:40.044] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C15.dat
[10:38:40.044] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C0.dat
[10:38:40.049] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C1.dat
[10:38:40.054] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C2.dat
[10:38:40.059] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C3.dat
[10:38:40.063] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C4.dat
[10:38:40.068] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C5.dat
[10:38:40.074] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C6.dat
[10:38:40.078] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C7.dat
[10:38:40.083] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C8.dat
[10:38:40.088] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C9.dat
[10:38:40.092] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C10.dat
[10:38:40.097] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C11.dat
[10:38:40.101] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C12.dat
[10:38:40.106] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C13.dat
[10:38:40.111] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C14.dat
[10:38:40.115] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//trimParameters35_C15.dat
[10:38:40.120] <TB3> INFO: PixTestTrim::trimTest() done
[10:38:40.120] <TB3> INFO: vtrim: 146 166 137 134 121 143 126 162 143 121 162 147 120 125 133 140
[10:38:40.120] <TB3> INFO: vthrcomp: 110 136 116 130 114 122 125 127 113 119 109 109 117 132 114 127
[10:38:40.120] <TB3> INFO: vcal mean: 35.09 35.05 34.96 34.95 34.99 34.99 34.94 35.06 35.01 34.94 35.04 35.00 34.99 34.95 34.97 34.94
[10:38:40.120] <TB3> INFO: vcal RMS: 1.32 1.20 1.09 1.00 1.11 1.13 1.04 1.41 1.17 1.23 1.29 1.25 1.16 1.03 1.11 1.21
[10:38:40.120] <TB3> INFO: bits mean: 9.22 8.64 9.25 8.35 9.03 9.54 9.36 9.54 9.12 9.63 9.14 8.80 9.33 9.75 9.77 9.69
[10:38:40.120] <TB3> INFO: bits RMS: 2.35 2.38 2.78 2.78 2.69 2.49 2.63 2.53 2.66 2.69 2.56 2.59 2.54 2.65 2.47 2.68
[10:38:40.128] <TB3> INFO: ----------------------------------------------------------------------
[10:38:40.128] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:38:40.128] <TB3> INFO: ----------------------------------------------------------------------
[10:38:40.130] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:38:40.142] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:38:40.142] <TB3> INFO: run 1 of 1
[10:38:40.407] <TB3> INFO: Expecting 4160000 events.
[10:39:13.640] <TB3> INFO: 774660 events read in total (32641ms).
[10:39:46.307] <TB3> INFO: 1543375 events read in total (65308ms).
[10:40:19.074] <TB3> INFO: 2305780 events read in total (98075ms).
[10:40:51.945] <TB3> INFO: 3060070 events read in total (130946ms).
[10:41:24.984] <TB3> INFO: 3808695 events read in total (163985ms).
[10:41:40.254] <TB3> INFO: 4160000 events read in total (179255ms).
[10:41:40.311] <TB3> INFO: Test took 180168ms.
[10:42:05.195] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 228 (-1/-1) hits flags = 528 (plus default)
[10:42:05.209] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:42:05.209] <TB3> INFO: run 1 of 1
[10:42:05.446] <TB3> INFO: Expecting 4763200 events.
[10:42:37.376] <TB3> INFO: 710920 events read in total (31338ms).
[10:43:08.703] <TB3> INFO: 1418355 events read in total (62665ms).
[10:43:40.190] <TB3> INFO: 2123870 events read in total (94152ms).
[10:44:11.840] <TB3> INFO: 2823720 events read in total (125802ms).
[10:44:42.923] <TB3> INFO: 3519450 events read in total (156885ms).
[10:45:14.661] <TB3> INFO: 4211140 events read in total (188623ms).
[10:45:39.037] <TB3> INFO: 4763200 events read in total (212999ms).
[10:45:39.131] <TB3> INFO: Test took 213922ms.
[10:46:07.288] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[10:46:07.302] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:46:07.302] <TB3> INFO: run 1 of 1
[10:46:07.538] <TB3> INFO: Expecting 4305600 events.
[10:46:40.251] <TB3> INFO: 737330 events read in total (32121ms).
[10:47:12.381] <TB3> INFO: 1470480 events read in total (64251ms).
[10:47:44.448] <TB3> INFO: 2199845 events read in total (96318ms).
[10:48:15.823] <TB3> INFO: 2921590 events read in total (127693ms).
[10:48:47.598] <TB3> INFO: 3638280 events read in total (159468ms).
[10:49:16.757] <TB3> INFO: 4305600 events read in total (188627ms).
[10:49:16.848] <TB3> INFO: Test took 189547ms.
[10:49:45.382] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[10:49:45.395] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:49:45.395] <TB3> INFO: run 1 of 1
[10:49:45.638] <TB3> INFO: Expecting 4243200 events.
[10:50:18.997] <TB3> INFO: 741840 events read in total (32767ms).
[10:50:51.269] <TB3> INFO: 1478980 events read in total (65039ms).
[10:51:23.697] <TB3> INFO: 2211585 events read in total (97467ms).
[10:51:55.476] <TB3> INFO: 2936485 events read in total (129246ms).
[10:52:26.996] <TB3> INFO: 3656715 events read in total (160766ms).
[10:52:52.992] <TB3> INFO: 4243200 events read in total (186762ms).
[10:52:53.077] <TB3> INFO: Test took 187682ms.
[10:53:21.695] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[10:53:21.710] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:53:21.710] <TB3> INFO: run 1 of 1
[10:53:21.947] <TB3> INFO: Expecting 4305600 events.
[10:53:54.676] <TB3> INFO: 737695 events read in total (32137ms).
[10:54:26.407] <TB3> INFO: 1470700 events read in total (63868ms).
[10:54:58.517] <TB3> INFO: 2200120 events read in total (95978ms).
[10:55:30.274] <TB3> INFO: 2921830 events read in total (127735ms).
[10:56:01.896] <TB3> INFO: 3638950 events read in total (159357ms).
[10:56:31.180] <TB3> INFO: 4305600 events read in total (188641ms).
[10:56:31.247] <TB3> INFO: Test took 189537ms.
[10:56:55.329] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:56:55.330] <TB3> INFO: PixTestTrim::doTest() done, duration: 2566 seconds
[10:56:55.330] <TB3> INFO: Decoding statistics:
[10:56:55.330] <TB3> INFO: General information:
[10:56:55.330] <TB3> INFO: 16bit words read: 0
[10:56:55.330] <TB3> INFO: valid events total: 0
[10:56:55.330] <TB3> INFO: empty events: 0
[10:56:55.330] <TB3> INFO: valid events with pixels: 0
[10:56:55.330] <TB3> INFO: valid pixel hits: 0
[10:56:55.330] <TB3> INFO: Event errors: 0
[10:56:55.330] <TB3> INFO: start marker: 0
[10:56:55.330] <TB3> INFO: stop marker: 0
[10:56:55.330] <TB3> INFO: overflow: 0
[10:56:55.330] <TB3> INFO: invalid 5bit words: 0
[10:56:55.330] <TB3> INFO: invalid XOR eye diagram: 0
[10:56:55.330] <TB3> INFO: frame (failed synchr.): 0
[10:56:55.330] <TB3> INFO: idle data (no TBM trl): 0
[10:56:55.331] <TB3> INFO: no data (only TBM hdr): 0
[10:56:55.331] <TB3> INFO: TBM errors: 0
[10:56:55.331] <TB3> INFO: flawed TBM headers: 0
[10:56:55.331] <TB3> INFO: flawed TBM trailers: 0
[10:56:55.331] <TB3> INFO: event ID mismatches: 0
[10:56:55.331] <TB3> INFO: ROC errors: 0
[10:56:55.331] <TB3> INFO: missing ROC header(s): 0
[10:56:55.331] <TB3> INFO: misplaced readback start: 0
[10:56:55.331] <TB3> INFO: Pixel decoding errors: 0
[10:56:55.331] <TB3> INFO: pixel data incomplete: 0
[10:56:55.331] <TB3> INFO: pixel address: 0
[10:56:55.331] <TB3> INFO: pulse height fill bit: 0
[10:56:55.331] <TB3> INFO: buffer corruption: 0
[10:56:55.943] <TB3> INFO: ######################################################################
[10:56:55.943] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:56:55.943] <TB3> INFO: ######################################################################
[10:56:56.180] <TB3> INFO: Expecting 41600 events.
[10:56:59.747] <TB3> INFO: 41600 events read in total (2976ms).
[10:56:59.747] <TB3> INFO: Test took 3803ms.
[10:57:00.187] <TB3> INFO: Expecting 41600 events.
[10:57:03.789] <TB3> INFO: 41600 events read in total (3010ms).
[10:57:03.790] <TB3> INFO: Test took 3840ms.
[10:57:04.078] <TB3> INFO: Expecting 41600 events.
[10:57:07.662] <TB3> INFO: 41600 events read in total (2992ms).
[10:57:07.663] <TB3> INFO: Test took 3862ms.
[10:57:07.951] <TB3> INFO: Expecting 41600 events.
[10:57:11.536] <TB3> INFO: 41600 events read in total (2993ms).
[10:57:11.537] <TB3> INFO: Test took 3863ms.
[10:57:11.824] <TB3> INFO: Expecting 41600 events.
[10:57:15.429] <TB3> INFO: 41600 events read in total (3013ms).
[10:57:15.430] <TB3> INFO: Test took 3884ms.
[10:57:15.720] <TB3> INFO: Expecting 41600 events.
[10:57:19.215] <TB3> INFO: 41600 events read in total (2904ms).
[10:57:19.215] <TB3> INFO: Test took 3774ms.
[10:57:19.503] <TB3> INFO: Expecting 41600 events.
[10:57:23.032] <TB3> INFO: 41600 events read in total (2937ms).
[10:57:23.033] <TB3> INFO: Test took 3808ms.
[10:57:23.321] <TB3> INFO: Expecting 41600 events.
[10:57:26.844] <TB3> INFO: 41600 events read in total (2930ms).
[10:57:26.845] <TB3> INFO: Test took 3802ms.
[10:57:27.135] <TB3> INFO: Expecting 41600 events.
[10:57:30.655] <TB3> INFO: 41600 events read in total (2929ms).
[10:57:30.656] <TB3> INFO: Test took 3799ms.
[10:57:30.943] <TB3> INFO: Expecting 41600 events.
[10:57:34.501] <TB3> INFO: 41600 events read in total (2966ms).
[10:57:34.502] <TB3> INFO: Test took 3837ms.
[10:57:34.790] <TB3> INFO: Expecting 41600 events.
[10:57:38.378] <TB3> INFO: 41600 events read in total (2996ms).
[10:57:38.378] <TB3> INFO: Test took 3866ms.
[10:57:38.666] <TB3> INFO: Expecting 41600 events.
[10:57:42.198] <TB3> INFO: 41600 events read in total (2940ms).
[10:57:42.199] <TB3> INFO: Test took 3811ms.
[10:57:42.490] <TB3> INFO: Expecting 41600 events.
[10:57:46.029] <TB3> INFO: 41600 events read in total (2947ms).
[10:57:46.030] <TB3> INFO: Test took 3818ms.
[10:57:46.318] <TB3> INFO: Expecting 41600 events.
[10:57:49.946] <TB3> INFO: 41600 events read in total (3036ms).
[10:57:49.947] <TB3> INFO: Test took 3908ms.
[10:57:50.235] <TB3> INFO: Expecting 41600 events.
[10:57:53.813] <TB3> INFO: 41600 events read in total (2987ms).
[10:57:53.815] <TB3> INFO: Test took 3859ms.
[10:57:54.103] <TB3> INFO: Expecting 41600 events.
[10:57:57.663] <TB3> INFO: 41600 events read in total (2968ms).
[10:57:57.664] <TB3> INFO: Test took 3839ms.
[10:57:57.954] <TB3> INFO: Expecting 41600 events.
[10:58:01.506] <TB3> INFO: 41600 events read in total (2960ms).
[10:58:01.507] <TB3> INFO: Test took 3832ms.
[10:58:01.797] <TB3> INFO: Expecting 41600 events.
[10:58:05.351] <TB3> INFO: 41600 events read in total (2962ms).
[10:58:05.352] <TB3> INFO: Test took 3833ms.
[10:58:05.640] <TB3> INFO: Expecting 41600 events.
[10:58:09.211] <TB3> INFO: 41600 events read in total (2980ms).
[10:58:09.211] <TB3> INFO: Test took 3849ms.
[10:58:09.499] <TB3> INFO: Expecting 41600 events.
[10:58:13.082] <TB3> INFO: 41600 events read in total (2991ms).
[10:58:13.083] <TB3> INFO: Test took 3862ms.
[10:58:13.370] <TB3> INFO: Expecting 41600 events.
[10:58:16.915] <TB3> INFO: 41600 events read in total (2953ms).
[10:58:16.916] <TB3> INFO: Test took 3824ms.
[10:58:17.205] <TB3> INFO: Expecting 41600 events.
[10:58:20.749] <TB3> INFO: 41600 events read in total (2952ms).
[10:58:20.750] <TB3> INFO: Test took 3824ms.
[10:58:21.037] <TB3> INFO: Expecting 41600 events.
[10:58:24.656] <TB3> INFO: 41600 events read in total (3027ms).
[10:58:24.657] <TB3> INFO: Test took 3897ms.
[10:58:24.669] <TB3> INFO: Max pixel from chip 0 is [4 ,43] phvalue 78
[10:58:24.670] <TB3> INFO: Max pixel from chip 1 is [4 ,57] phvalue 235
[10:58:24.670] <TB3> INFO: Max pixel from chip 2 is [9 ,20] phvalue 221
[10:58:24.670] <TB3> INFO: Max pixel from chip 3 is [5 ,18] phvalue 146
[10:58:24.670] <TB3> INFO: Max pixel from chip 4 is [4 ,6] phvalue 141
[10:58:24.670] <TB3> INFO: Max pixel from chip 5 is [16 ,22] phvalue 116
[10:58:24.670] <TB3> INFO: Max pixel from chip 6 is [3 ,8] phvalue 166
[10:58:24.670] <TB3> INFO: Max pixel from chip 7 is [6 ,27] phvalue 219
[10:58:24.670] <TB3> INFO: Max pixel from chip 8 is [14 ,33] phvalue 107
[10:58:24.670] <TB3> INFO: Max pixel from chip 9 is [7 ,7] phvalue 129
[10:58:24.671] <TB3> INFO: Max pixel from chip 10 is [14 ,7] phvalue 96
[10:58:24.671] <TB3> INFO: Max pixel from chip 11 is [4 ,39] phvalue 172
[10:58:24.671] <TB3> INFO: Max pixel from chip 12 is [12 ,15] phvalue 50
[10:58:24.671] <TB3> INFO: Max pixel from chip 13 is [32 ,28] phvalue 112
[10:58:24.671] <TB3> INFO: Max pixel from chip 14 is [3 ,42] phvalue 165
[10:58:24.671] <TB3> INFO: Max pixel from chip 15 is [9 ,47] phvalue 171
[10:58:24.951] <TB3> INFO: Expecting 41600 events.
[10:58:28.467] <TB3> INFO: 41600 events read in total (2925ms).
[10:58:28.468] <TB3> INFO: Test took 3782ms.
[10:58:28.478] <TB3> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[10:58:28.478] <TB3> INFO: Min pixel from chip 1 is [3 ,5] phvalue 255
[10:58:28.478] <TB3> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[10:58:28.478] <TB3> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Min pixel from chip 8 is [5 ,22] phvalue 246
[10:58:28.479] <TB3> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[10:58:28.479] <TB3> INFO: Search for minph pixel failed in the fiducial region for chip 10, looking at the edges
[10:58:28.479] <TB3> INFO: min ph pixel determination failed on roc 10, setting pixel 0,0
[10:58:28.480] <TB3> INFO: Min pixel from chip 11 is [3 ,5] phvalue 255
[10:58:28.480] <TB3> INFO: Min pixel from chip 12 is [33 ,58] phvalue 251
[10:58:28.480] <TB3> INFO: Min pixel from chip 13 is [11 ,47] phvalue 250
[10:58:28.480] <TB3> INFO: Min pixel from chip 14 is [3 ,5] phvalue 255
[10:58:28.480] <TB3> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[10:58:28.758] <TB3> INFO: Expecting 2560 events.
[10:58:29.645] <TB3> INFO: 2560 events read in total (295ms).
[10:58:29.646] <TB3> INFO: Test took 1164ms.
[10:58:29.954] <TB3> INFO: Expecting 2560 events.
[10:58:30.841] <TB3> INFO: 2560 events read in total (295ms).
[10:58:30.842] <TB3> INFO: Test took 1196ms.
[10:58:31.149] <TB3> INFO: Expecting 2560 events.
[10:58:32.036] <TB3> INFO: 2560 events read in total (295ms).
[10:58:32.036] <TB3> INFO: Test took 1193ms.
[10:58:32.344] <TB3> INFO: Expecting 2560 events.
[10:58:33.227] <TB3> INFO: 2560 events read in total (291ms).
[10:58:33.227] <TB3> INFO: Test took 1191ms.
[10:58:33.535] <TB3> INFO: Expecting 2560 events.
[10:58:34.417] <TB3> INFO: 2560 events read in total (290ms).
[10:58:34.418] <TB3> INFO: Test took 1190ms.
[10:58:34.725] <TB3> INFO: Expecting 2560 events.
[10:58:35.605] <TB3> INFO: 2560 events read in total (288ms).
[10:58:35.605] <TB3> INFO: Test took 1187ms.
[10:58:35.913] <TB3> INFO: Expecting 2560 events.
[10:58:36.791] <TB3> INFO: 2560 events read in total (287ms).
[10:58:36.792] <TB3> INFO: Test took 1187ms.
[10:58:37.100] <TB3> INFO: Expecting 2560 events.
[10:58:37.985] <TB3> INFO: 2560 events read in total (294ms).
[10:58:37.985] <TB3> INFO: Test took 1193ms.
[10:58:38.293] <TB3> INFO: Expecting 2560 events.
[10:58:39.172] <TB3> INFO: 2560 events read in total (287ms).
[10:58:39.172] <TB3> INFO: Test took 1186ms.
[10:58:39.480] <TB3> INFO: Expecting 2560 events.
[10:58:40.361] <TB3> INFO: 2560 events read in total (289ms).
[10:58:40.361] <TB3> INFO: Test took 1188ms.
[10:58:40.677] <TB3> INFO: Expecting 2560 events.
[10:58:41.561] <TB3> INFO: 2560 events read in total (293ms).
[10:58:41.561] <TB3> INFO: Test took 1199ms.
[10:58:41.872] <TB3> INFO: Expecting 2560 events.
[10:58:42.752] <TB3> INFO: 2560 events read in total (289ms).
[10:58:42.752] <TB3> INFO: Test took 1190ms.
[10:58:43.060] <TB3> INFO: Expecting 2560 events.
[10:58:43.944] <TB3> INFO: 2560 events read in total (292ms).
[10:58:43.944] <TB3> INFO: Test took 1191ms.
[10:58:44.252] <TB3> INFO: Expecting 2560 events.
[10:58:45.137] <TB3> INFO: 2560 events read in total (294ms).
[10:58:45.137] <TB3> INFO: Test took 1193ms.
[10:58:45.445] <TB3> INFO: Expecting 2560 events.
[10:58:46.330] <TB3> INFO: 2560 events read in total (293ms).
[10:58:46.330] <TB3> INFO: Test took 1192ms.
[10:58:46.638] <TB3> INFO: Expecting 2560 events.
[10:58:47.524] <TB3> INFO: 2560 events read in total (294ms).
[10:58:47.524] <TB3> INFO: Test took 1194ms.
[10:58:47.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:58:47.832] <TB3> INFO: Expecting 655360 events.
[10:59:02.584] <TB3> INFO: 655360 events read in total (14160ms).
[10:59:02.595] <TB3> INFO: Expecting 655360 events.
[10:59:17.250] <TB3> INFO: 655360 events read in total (14252ms).
[10:59:17.267] <TB3> INFO: Expecting 655360 events.
[10:59:32.032] <TB3> INFO: 655360 events read in total (14362ms).
[10:59:32.053] <TB3> INFO: Expecting 655360 events.
[10:59:46.637] <TB3> INFO: 655360 events read in total (14181ms).
[10:59:46.662] <TB3> INFO: Expecting 655360 events.
[11:00:01.232] <TB3> INFO: 655360 events read in total (14167ms).
[11:00:01.262] <TB3> INFO: Expecting 655360 events.
[11:00:15.937] <TB3> INFO: 655360 events read in total (14272ms).
[11:00:15.971] <TB3> INFO: Expecting 655360 events.
[11:00:30.537] <TB3> INFO: 655360 events read in total (14162ms).
[11:00:30.575] <TB3> INFO: Expecting 655360 events.
[11:00:45.131] <TB3> INFO: 655360 events read in total (14153ms).
[11:00:45.187] <TB3> INFO: Expecting 655360 events.
[11:00:59.880] <TB3> INFO: 655360 events read in total (14289ms).
[11:00:59.926] <TB3> INFO: Expecting 655360 events.
[11:01:14.705] <TB3> INFO: 655360 events read in total (14376ms).
[11:01:14.755] <TB3> INFO: Expecting 655360 events.
[11:01:29.347] <TB3> INFO: 655360 events read in total (14188ms).
[11:01:29.404] <TB3> INFO: Expecting 655360 events.
[11:01:43.919] <TB3> INFO: 655360 events read in total (14112ms).
[11:01:43.996] <TB3> INFO: Expecting 655360 events.
[11:01:58.504] <TB3> INFO: 655360 events read in total (14105ms).
[11:01:58.584] <TB3> INFO: Expecting 655360 events.
[11:02:13.172] <TB3> INFO: 655360 events read in total (14185ms).
[11:02:13.246] <TB3> INFO: Expecting 655360 events.
[11:02:27.934] <TB3> INFO: 655360 events read in total (14285ms).
[11:02:28.021] <TB3> INFO: Expecting 655360 events.
[11:02:42.554] <TB3> INFO: 655360 events read in total (14130ms).
[11:02:42.689] <TB3> INFO: Test took 235162ms.
[11:02:42.804] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:43.060] <TB3> INFO: Expecting 655360 events.
[11:02:57.852] <TB3> INFO: 655360 events read in total (14201ms).
[11:02:57.866] <TB3> INFO: Expecting 655360 events.
[11:03:12.477] <TB3> INFO: 655360 events read in total (14208ms).
[11:03:12.494] <TB3> INFO: Expecting 655360 events.
[11:03:27.078] <TB3> INFO: 655360 events read in total (14181ms).
[11:03:27.100] <TB3> INFO: Expecting 655360 events.
[11:03:41.564] <TB3> INFO: 655360 events read in total (14061ms).
[11:03:41.588] <TB3> INFO: Expecting 655360 events.
[11:03:56.003] <TB3> INFO: 655360 events read in total (14011ms).
[11:03:56.033] <TB3> INFO: Expecting 655360 events.
[11:04:10.633] <TB3> INFO: 655360 events read in total (14197ms).
[11:04:10.680] <TB3> INFO: Expecting 655360 events.
[11:04:25.164] <TB3> INFO: 655360 events read in total (14081ms).
[11:04:25.202] <TB3> INFO: Expecting 655360 events.
[11:04:39.701] <TB3> INFO: 655360 events read in total (14096ms).
[11:04:39.745] <TB3> INFO: Expecting 655360 events.
[11:04:54.143] <TB3> INFO: 655360 events read in total (13994ms).
[11:04:54.189] <TB3> INFO: Expecting 655360 events.
[11:05:08.554] <TB3> INFO: 655360 events read in total (13961ms).
[11:05:08.605] <TB3> INFO: Expecting 655360 events.
[11:05:22.748] <TB3> INFO: 655360 events read in total (13740ms).
[11:05:22.803] <TB3> INFO: Expecting 655360 events.
[11:05:37.033] <TB3> INFO: 655360 events read in total (13827ms).
[11:05:37.110] <TB3> INFO: Expecting 655360 events.
[11:05:51.782] <TB3> INFO: 655360 events read in total (14269ms).
[11:05:51.859] <TB3> INFO: Expecting 655360 events.
[11:06:06.239] <TB3> INFO: 655360 events read in total (13977ms).
[11:06:06.312] <TB3> INFO: Expecting 655360 events.
[11:06:20.825] <TB3> INFO: 655360 events read in total (14110ms).
[11:06:20.923] <TB3> INFO: Expecting 655360 events.
[11:06:34.889] <TB3> INFO: 655360 events read in total (13563ms).
[11:06:34.991] <TB3> INFO: Test took 232187ms.
[11:06:35.159] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.166] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.172] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.178] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:06:35.184] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:06:35.190] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.195] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.202] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.208] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.214] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:06:35.220] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:06:35.226] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.232] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.239] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.244] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:06:35.251] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:06:35.257] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:06:35.263] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:06:35.269] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.275] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.281] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.287] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.293] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.299] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.305] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.311] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.317] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.322] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.328] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.334] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.340] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.347] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:06:35.352] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.358] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:06:35.364] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:06:35.370] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:06:35.375] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.382] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.387] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.393] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:06:35.427] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C0.dat
[11:06:35.427] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C1.dat
[11:06:35.427] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C2.dat
[11:06:35.427] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C3.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C4.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C5.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C6.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C7.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C8.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C9.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C10.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C11.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C12.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C13.dat
[11:06:35.428] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C14.dat
[11:06:35.429] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//dacParameters35_C15.dat
[11:06:35.670] <TB3> INFO: Expecting 41600 events.
[11:06:38.770] <TB3> INFO: 41600 events read in total (2509ms).
[11:06:38.771] <TB3> INFO: Test took 3339ms.
[11:06:39.218] <TB3> INFO: Expecting 41600 events.
[11:06:42.289] <TB3> INFO: 41600 events read in total (2479ms).
[11:06:42.290] <TB3> INFO: Test took 3308ms.
[11:06:42.740] <TB3> INFO: Expecting 41600 events.
[11:06:45.878] <TB3> INFO: 41600 events read in total (2547ms).
[11:06:45.879] <TB3> INFO: Test took 3377ms.
[11:06:46.103] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:46.191] <TB3> INFO: Expecting 2560 events.
[11:06:47.076] <TB3> INFO: 2560 events read in total (293ms).
[11:06:47.077] <TB3> INFO: Test took 974ms.
[11:06:47.078] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:47.391] <TB3> INFO: Expecting 2560 events.
[11:06:48.274] <TB3> INFO: 2560 events read in total (291ms).
[11:06:48.275] <TB3> INFO: Test took 1197ms.
[11:06:48.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:48.583] <TB3> INFO: Expecting 2560 events.
[11:06:49.466] <TB3> INFO: 2560 events read in total (292ms).
[11:06:49.467] <TB3> INFO: Test took 1190ms.
[11:06:49.469] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:49.775] <TB3> INFO: Expecting 2560 events.
[11:06:50.660] <TB3> INFO: 2560 events read in total (291ms).
[11:06:50.660] <TB3> INFO: Test took 1191ms.
[11:06:50.665] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:50.969] <TB3> INFO: Expecting 2560 events.
[11:06:51.856] <TB3> INFO: 2560 events read in total (295ms).
[11:06:51.857] <TB3> INFO: Test took 1192ms.
[11:06:51.859] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:52.164] <TB3> INFO: Expecting 2560 events.
[11:06:53.049] <TB3> INFO: 2560 events read in total (293ms).
[11:06:53.049] <TB3> INFO: Test took 1190ms.
[11:06:53.052] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:53.357] <TB3> INFO: Expecting 2560 events.
[11:06:54.244] <TB3> INFO: 2560 events read in total (296ms).
[11:06:54.244] <TB3> INFO: Test took 1192ms.
[11:06:54.246] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:54.553] <TB3> INFO: Expecting 2560 events.
[11:06:55.437] <TB3> INFO: 2560 events read in total (293ms).
[11:06:55.438] <TB3> INFO: Test took 1192ms.
[11:06:55.440] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:55.746] <TB3> INFO: Expecting 2560 events.
[11:06:56.631] <TB3> INFO: 2560 events read in total (293ms).
[11:06:56.631] <TB3> INFO: Test took 1191ms.
[11:06:56.635] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:56.939] <TB3> INFO: Expecting 2560 events.
[11:06:57.831] <TB3> INFO: 2560 events read in total (300ms).
[11:06:57.832] <TB3> INFO: Test took 1197ms.
[11:06:57.834] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:58.140] <TB3> INFO: Expecting 2560 events.
[11:06:59.026] <TB3> INFO: 2560 events read in total (294ms).
[11:06:59.027] <TB3> INFO: Test took 1193ms.
[11:06:59.029] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:59.335] <TB3> INFO: Expecting 2560 events.
[11:07:00.219] <TB3> INFO: 2560 events read in total (292ms).
[11:07:00.220] <TB3> INFO: Test took 1191ms.
[11:07:00.222] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:00.527] <TB3> INFO: Expecting 2560 events.
[11:07:01.405] <TB3> INFO: 2560 events read in total (286ms).
[11:07:01.405] <TB3> INFO: Test took 1183ms.
[11:07:01.408] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:01.714] <TB3> INFO: Expecting 2560 events.
[11:07:02.595] <TB3> INFO: 2560 events read in total (289ms).
[11:07:02.595] <TB3> INFO: Test took 1187ms.
[11:07:02.600] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:02.904] <TB3> INFO: Expecting 2560 events.
[11:07:03.784] <TB3> INFO: 2560 events read in total (289ms).
[11:07:03.784] <TB3> INFO: Test took 1184ms.
[11:07:03.787] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:04.092] <TB3> INFO: Expecting 2560 events.
[11:07:04.978] <TB3> INFO: 2560 events read in total (294ms).
[11:07:04.978] <TB3> INFO: Test took 1191ms.
[11:07:04.981] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:05.287] <TB3> INFO: Expecting 2560 events.
[11:07:06.169] <TB3> INFO: 2560 events read in total (290ms).
[11:07:06.170] <TB3> INFO: Test took 1189ms.
[11:07:06.174] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:06.478] <TB3> INFO: Expecting 2560 events.
[11:07:07.370] <TB3> INFO: 2560 events read in total (300ms).
[11:07:07.371] <TB3> INFO: Test took 1198ms.
[11:07:07.373] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:07.679] <TB3> INFO: Expecting 2560 events.
[11:07:08.557] <TB3> INFO: 2560 events read in total (287ms).
[11:07:08.557] <TB3> INFO: Test took 1184ms.
[11:07:08.559] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:08.866] <TB3> INFO: Expecting 2560 events.
[11:07:09.748] <TB3> INFO: 2560 events read in total (290ms).
[11:07:09.748] <TB3> INFO: Test took 1189ms.
[11:07:09.752] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:10.056] <TB3> INFO: Expecting 2560 events.
[11:07:10.937] <TB3> INFO: 2560 events read in total (289ms).
[11:07:10.938] <TB3> INFO: Test took 1186ms.
[11:07:10.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:11.245] <TB3> INFO: Expecting 2560 events.
[11:07:12.135] <TB3> INFO: 2560 events read in total (298ms).
[11:07:12.136] <TB3> INFO: Test took 1196ms.
[11:07:12.139] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:12.445] <TB3> INFO: Expecting 2560 events.
[11:07:13.325] <TB3> INFO: 2560 events read in total (289ms).
[11:07:13.325] <TB3> INFO: Test took 1187ms.
[11:07:13.327] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:13.633] <TB3> INFO: Expecting 2560 events.
[11:07:14.516] <TB3> INFO: 2560 events read in total (292ms).
[11:07:14.516] <TB3> INFO: Test took 1189ms.
[11:07:14.520] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:14.824] <TB3> INFO: Expecting 2560 events.
[11:07:15.711] <TB3> INFO: 2560 events read in total (295ms).
[11:07:15.711] <TB3> INFO: Test took 1191ms.
[11:07:15.714] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:16.019] <TB3> INFO: Expecting 2560 events.
[11:07:16.905] <TB3> INFO: 2560 events read in total (294ms).
[11:07:16.906] <TB3> INFO: Test took 1193ms.
[11:07:16.909] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:17.214] <TB3> INFO: Expecting 2560 events.
[11:07:18.104] <TB3> INFO: 2560 events read in total (298ms).
[11:07:18.104] <TB3> INFO: Test took 1196ms.
[11:07:18.106] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:18.412] <TB3> INFO: Expecting 2560 events.
[11:07:19.297] <TB3> INFO: 2560 events read in total (293ms).
[11:07:19.297] <TB3> INFO: Test took 1191ms.
[11:07:19.300] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:19.605] <TB3> INFO: Expecting 2560 events.
[11:07:20.501] <TB3> INFO: 2560 events read in total (304ms).
[11:07:20.501] <TB3> INFO: Test took 1201ms.
[11:07:20.504] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:20.809] <TB3> INFO: Expecting 2560 events.
[11:07:21.698] <TB3> INFO: 2560 events read in total (298ms).
[11:07:21.698] <TB3> INFO: Test took 1194ms.
[11:07:21.700] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:22.006] <TB3> INFO: Expecting 2560 events.
[11:07:22.896] <TB3> INFO: 2560 events read in total (298ms).
[11:07:22.896] <TB3> INFO: Test took 1196ms.
[11:07:22.899] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:07:23.205] <TB3> INFO: Expecting 2560 events.
[11:07:24.094] <TB3> INFO: 2560 events read in total (297ms).
[11:07:24.095] <TB3> INFO: Test took 1196ms.
[11:07:24.569] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 628 seconds
[11:07:24.569] <TB3> INFO: PH scale (per ROC): 40 47 48 48 46 33 44 46 50 45 37 37 49 57 38 42
[11:07:24.569] <TB3> INFO: PH offset (per ROC): 112 78 80 99 98 100 92 81 118 102 109 88 130 116 89 89
[11:07:24.577] <TB3> INFO: Decoding statistics:
[11:07:24.577] <TB3> INFO: General information:
[11:07:24.577] <TB3> INFO: 16bit words read: 127862
[11:07:24.577] <TB3> INFO: valid events total: 20480
[11:07:24.577] <TB3> INFO: empty events: 17989
[11:07:24.577] <TB3> INFO: valid events with pixels: 2491
[11:07:24.577] <TB3> INFO: valid pixel hits: 2491
[11:07:24.577] <TB3> INFO: Event errors: 0
[11:07:24.577] <TB3> INFO: start marker: 0
[11:07:24.577] <TB3> INFO: stop marker: 0
[11:07:24.577] <TB3> INFO: overflow: 0
[11:07:24.577] <TB3> INFO: invalid 5bit words: 0
[11:07:24.577] <TB3> INFO: invalid XOR eye diagram: 0
[11:07:24.577] <TB3> INFO: frame (failed synchr.): 0
[11:07:24.577] <TB3> INFO: idle data (no TBM trl): 0
[11:07:24.577] <TB3> INFO: no data (only TBM hdr): 0
[11:07:24.577] <TB3> INFO: TBM errors: 0
[11:07:24.577] <TB3> INFO: flawed TBM headers: 0
[11:07:24.577] <TB3> INFO: flawed TBM trailers: 0
[11:07:24.577] <TB3> INFO: event ID mismatches: 0
[11:07:24.577] <TB3> INFO: ROC errors: 0
[11:07:24.577] <TB3> INFO: missing ROC header(s): 0
[11:07:24.577] <TB3> INFO: misplaced readback start: 0
[11:07:24.577] <TB3> INFO: Pixel decoding errors: 0
[11:07:24.577] <TB3> INFO: pixel data incomplete: 0
[11:07:24.577] <TB3> INFO: pixel address: 0
[11:07:24.577] <TB3> INFO: pulse height fill bit: 0
[11:07:24.577] <TB3> INFO: buffer corruption: 0
[11:07:24.739] <TB3> INFO: ######################################################################
[11:07:24.739] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:07:24.739] <TB3> INFO: ######################################################################
[11:07:24.755] <TB3> INFO: scanning low vcal = 10
[11:07:25.054] <TB3> INFO: Expecting 41600 events.
[11:07:28.660] <TB3> INFO: 41600 events read in total (3014ms).
[11:07:28.660] <TB3> INFO: Test took 3905ms.
[11:07:28.663] <TB3> INFO: scanning low vcal = 20
[11:07:28.957] <TB3> INFO: Expecting 41600 events.
[11:07:32.549] <TB3> INFO: 41600 events read in total (3001ms).
[11:07:32.550] <TB3> INFO: Test took 3887ms.
[11:07:32.552] <TB3> INFO: scanning low vcal = 30
[11:07:32.850] <TB3> INFO: Expecting 41600 events.
[11:07:36.522] <TB3> INFO: 41600 events read in total (3081ms).
[11:07:36.523] <TB3> INFO: Test took 3971ms.
[11:07:36.526] <TB3> INFO: scanning low vcal = 40
[11:07:36.803] <TB3> INFO: Expecting 41600 events.
[11:07:40.826] <TB3> INFO: 41600 events read in total (3432ms).
[11:07:40.827] <TB3> INFO: Test took 4301ms.
[11:07:40.830] <TB3> INFO: scanning low vcal = 50
[11:07:41.107] <TB3> INFO: Expecting 41600 events.
[11:07:45.111] <TB3> INFO: 41600 events read in total (3412ms).
[11:07:45.112] <TB3> INFO: Test took 4282ms.
[11:07:45.115] <TB3> INFO: scanning low vcal = 60
[11:07:45.391] <TB3> INFO: Expecting 41600 events.
[11:07:49.456] <TB3> INFO: 41600 events read in total (3473ms).
[11:07:49.457] <TB3> INFO: Test took 4342ms.
[11:07:49.460] <TB3> INFO: scanning low vcal = 70
[11:07:49.761] <TB3> INFO: Expecting 41600 events.
[11:07:53.799] <TB3> INFO: 41600 events read in total (3446ms).
[11:07:53.800] <TB3> INFO: Test took 4340ms.
[11:07:53.803] <TB3> INFO: scanning low vcal = 80
[11:07:54.104] <TB3> INFO: Expecting 41600 events.
[11:07:58.110] <TB3> INFO: 41600 events read in total (3415ms).
[11:07:58.111] <TB3> INFO: Test took 4308ms.
[11:07:58.114] <TB3> INFO: scanning low vcal = 90
[11:07:58.391] <TB3> INFO: Expecting 41600 events.
[11:08:02.416] <TB3> INFO: 41600 events read in total (3434ms).
[11:08:02.417] <TB3> INFO: Test took 4303ms.
[11:08:02.420] <TB3> INFO: scanning low vcal = 100
[11:08:02.696] <TB3> INFO: Expecting 41600 events.
[11:08:06.687] <TB3> INFO: 41600 events read in total (3399ms).
[11:08:06.688] <TB3> INFO: Test took 4268ms.
[11:08:06.691] <TB3> INFO: scanning low vcal = 110
[11:08:06.968] <TB3> INFO: Expecting 41600 events.
[11:08:11.023] <TB3> INFO: 41600 events read in total (3463ms).
[11:08:11.024] <TB3> INFO: Test took 4333ms.
[11:08:11.027] <TB3> INFO: scanning low vcal = 120
[11:08:11.304] <TB3> INFO: Expecting 41600 events.
[11:08:15.316] <TB3> INFO: 41600 events read in total (3421ms).
[11:08:15.317] <TB3> INFO: Test took 4290ms.
[11:08:15.320] <TB3> INFO: scanning low vcal = 130
[11:08:15.618] <TB3> INFO: Expecting 41600 events.
[11:08:19.598] <TB3> INFO: 41600 events read in total (3388ms).
[11:08:19.599] <TB3> INFO: Test took 4278ms.
[11:08:19.602] <TB3> INFO: scanning low vcal = 140
[11:08:19.878] <TB3> INFO: Expecting 41600 events.
[11:08:23.954] <TB3> INFO: 41600 events read in total (3484ms).
[11:08:23.955] <TB3> INFO: Test took 4352ms.
[11:08:23.958] <TB3> INFO: scanning low vcal = 150
[11:08:24.235] <TB3> INFO: Expecting 41600 events.
[11:08:28.227] <TB3> INFO: 41600 events read in total (3400ms).
[11:08:28.228] <TB3> INFO: Test took 4270ms.
[11:08:28.231] <TB3> INFO: scanning low vcal = 160
[11:08:28.508] <TB3> INFO: Expecting 41600 events.
[11:08:32.544] <TB3> INFO: 41600 events read in total (3445ms).
[11:08:32.545] <TB3> INFO: Test took 4314ms.
[11:08:32.548] <TB3> INFO: scanning low vcal = 170
[11:08:32.825] <TB3> INFO: Expecting 41600 events.
[11:08:36.797] <TB3> INFO: 41600 events read in total (3380ms).
[11:08:36.798] <TB3> INFO: Test took 4250ms.
[11:08:36.804] <TB3> INFO: scanning low vcal = 180
[11:08:37.077] <TB3> INFO: Expecting 41600 events.
[11:08:41.082] <TB3> INFO: 41600 events read in total (3413ms).
[11:08:41.082] <TB3> INFO: Test took 4277ms.
[11:08:41.086] <TB3> INFO: scanning low vcal = 190
[11:08:41.363] <TB3> INFO: Expecting 41600 events.
[11:08:45.407] <TB3> INFO: 41600 events read in total (3453ms).
[11:08:45.408] <TB3> INFO: Test took 4322ms.
[11:08:45.412] <TB3> INFO: scanning low vcal = 200
[11:08:45.708] <TB3> INFO: Expecting 41600 events.
[11:08:49.699] <TB3> INFO: 41600 events read in total (3399ms).
[11:08:49.700] <TB3> INFO: Test took 4288ms.
[11:08:49.704] <TB3> INFO: scanning low vcal = 210
[11:08:49.980] <TB3> INFO: Expecting 41600 events.
[11:08:54.018] <TB3> INFO: 41600 events read in total (3446ms).
[11:08:54.018] <TB3> INFO: Test took 4314ms.
[11:08:54.021] <TB3> INFO: scanning low vcal = 220
[11:08:54.298] <TB3> INFO: Expecting 41600 events.
[11:08:58.319] <TB3> INFO: 41600 events read in total (3429ms).
[11:08:58.320] <TB3> INFO: Test took 4298ms.
[11:08:58.323] <TB3> INFO: scanning low vcal = 230
[11:08:58.600] <TB3> INFO: Expecting 41600 events.
[11:09:02.576] <TB3> INFO: 41600 events read in total (3384ms).
[11:09:02.576] <TB3> INFO: Test took 4253ms.
[11:09:02.580] <TB3> INFO: scanning low vcal = 240
[11:09:02.856] <TB3> INFO: Expecting 41600 events.
[11:09:06.920] <TB3> INFO: 41600 events read in total (3472ms).
[11:09:06.921] <TB3> INFO: Test took 4341ms.
[11:09:06.924] <TB3> INFO: scanning low vcal = 250
[11:09:07.216] <TB3> INFO: Expecting 41600 events.
[11:09:11.193] <TB3> INFO: 41600 events read in total (3384ms).
[11:09:11.194] <TB3> INFO: Test took 4270ms.
[11:09:11.198] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:09:11.474] <TB3> INFO: Expecting 41600 events.
[11:09:15.540] <TB3> INFO: 41600 events read in total (3474ms).
[11:09:15.541] <TB3> INFO: Test took 4343ms.
[11:09:15.544] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:09:15.821] <TB3> INFO: Expecting 41600 events.
[11:09:19.808] <TB3> INFO: 41600 events read in total (3395ms).
[11:09:19.808] <TB3> INFO: Test took 4264ms.
[11:09:19.812] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:09:20.088] <TB3> INFO: Expecting 41600 events.
[11:09:24.133] <TB3> INFO: 41600 events read in total (3453ms).
[11:09:24.134] <TB3> INFO: Test took 4322ms.
[11:09:24.138] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:09:24.413] <TB3> INFO: Expecting 41600 events.
[11:09:28.411] <TB3> INFO: 41600 events read in total (3406ms).
[11:09:28.412] <TB3> INFO: Test took 4274ms.
[11:09:28.415] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:09:28.706] <TB3> INFO: Expecting 41600 events.
[11:09:32.785] <TB3> INFO: 41600 events read in total (3488ms).
[11:09:32.786] <TB3> INFO: Test took 4371ms.
[11:09:33.194] <TB3> INFO: PixTestGainPedestal::measure() done
[11:10:06.086] <TB3> INFO: PixTestGainPedestal::fit() done
[11:10:06.086] <TB3> INFO: non-linearity mean: 0.932 0.948 0.972 0.963 0.942 0.961 0.949 0.962 0.985 0.953 0.924 0.929 0.985 0.985 0.942 0.923
[11:10:06.086] <TB3> INFO: non-linearity RMS: 0.120 0.072 0.010 0.048 0.083 0.167 0.052 0.040 0.003 0.056 0.084 0.111 0.003 0.003 0.148 0.126
[11:10:06.086] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[11:10:06.100] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[11:10:06.113] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[11:10:06.126] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[11:10:06.139] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[11:10:06.152] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[11:10:06.166] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[11:10:06.178] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[11:10:06.191] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[11:10:06.204] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[11:10:06.217] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[11:10:06.231] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[11:10:06.244] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[11:10:06.257] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[11:10:06.270] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[11:10:06.283] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-14_16h15m_1479136518//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[11:10:06.296] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[11:10:06.296] <TB3> INFO: Decoding statistics:
[11:10:06.296] <TB3> INFO: General information:
[11:10:06.296] <TB3> INFO: 16bit words read: 3285178
[11:10:06.296] <TB3> INFO: valid events total: 332800
[11:10:06.296] <TB3> INFO: empty events: 719
[11:10:06.296] <TB3> INFO: valid events with pixels: 332081
[11:10:06.296] <TB3> INFO: valid pixel hits: 644189
[11:10:06.296] <TB3> INFO: Event errors: 0
[11:10:06.296] <TB3> INFO: start marker: 0
[11:10:06.296] <TB3> INFO: stop marker: 0
[11:10:06.296] <TB3> INFO: overflow: 0
[11:10:06.296] <TB3> INFO: invalid 5bit words: 0
[11:10:06.296] <TB3> INFO: invalid XOR eye diagram: 0
[11:10:06.296] <TB3> INFO: frame (failed synchr.): 0
[11:10:06.296] <TB3> INFO: idle data (no TBM trl): 0
[11:10:06.296] <TB3> INFO: no data (only TBM hdr): 0
[11:10:06.296] <TB3> INFO: TBM errors: 0
[11:10:06.296] <TB3> INFO: flawed TBM headers: 0
[11:10:06.296] <TB3> INFO: flawed TBM trailers: 0
[11:10:06.296] <TB3> INFO: event ID mismatches: 0
[11:10:06.296] <TB3> INFO: ROC errors: 0
[11:10:06.296] <TB3> INFO: missing ROC header(s): 0
[11:10:06.296] <TB3> INFO: misplaced readback start: 0
[11:10:06.296] <TB3> INFO: Pixel decoding errors: 0
[11:10:06.296] <TB3> INFO: pixel data incomplete: 0
[11:10:06.296] <TB3> INFO: pixel address: 0
[11:10:06.296] <TB3> INFO: pulse height fill bit: 0
[11:10:06.296] <TB3> INFO: buffer corruption: 0
[11:10:06.311] <TB3> INFO: Decoding statistics:
[11:10:06.311] <TB3> INFO: General information:
[11:10:06.311] <TB3> INFO: 16bit words read: 3414576
[11:10:06.311] <TB3> INFO: valid events total: 353536
[11:10:06.311] <TB3> INFO: empty events: 18964
[11:10:06.311] <TB3> INFO: valid events with pixels: 334572
[11:10:06.311] <TB3> INFO: valid pixel hits: 646680
[11:10:06.311] <TB3> INFO: Event errors: 0
[11:10:06.311] <TB3> INFO: start marker: 0
[11:10:06.311] <TB3> INFO: stop marker: 0
[11:10:06.311] <TB3> INFO: overflow: 0
[11:10:06.311] <TB3> INFO: invalid 5bit words: 0
[11:10:06.311] <TB3> INFO: invalid XOR eye diagram: 0
[11:10:06.311] <TB3> INFO: frame (failed synchr.): 0
[11:10:06.311] <TB3> INFO: idle data (no TBM trl): 0
[11:10:06.311] <TB3> INFO: no data (only TBM hdr): 0
[11:10:06.311] <TB3> INFO: TBM errors: 0
[11:10:06.311] <TB3> INFO: flawed TBM headers: 0
[11:10:06.311] <TB3> INFO: flawed TBM trailers: 0
[11:10:06.311] <TB3> INFO: event ID mismatches: 0
[11:10:06.311] <TB3> INFO: ROC errors: 0
[11:10:06.311] <TB3> INFO: missing ROC header(s): 0
[11:10:06.311] <TB3> INFO: misplaced readback start: 0
[11:10:06.311] <TB3> INFO: Pixel decoding errors: 0
[11:10:06.311] <TB3> INFO: pixel data incomplete: 0
[11:10:06.311] <TB3> INFO: pixel address: 0
[11:10:06.311] <TB3> INFO: pulse height fill bit: 0
[11:10:06.311] <TB3> INFO: buffer corruption: 0
[11:10:06.311] <TB3> INFO: enter test to run
[11:10:06.311] <TB3> INFO: test: exit no parameter change
[11:10:06.436] <TB3> QUIET: Connection to board 126 closed.
[11:10:06.437] <TB3> INFO: pXar: this is the end, my friend