[10:13:56.656] <TB0> INFO: *** Welcome to pxar ***
[10:13:56.656] <TB0> INFO: *** Today: 2016/11/03
[10:13:56.662] <TB0> INFO: *** Version: c8ba-dirty
[10:13:56.662] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C15.dat
[10:13:56.663] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1b.dat
[10:13:56.663] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//defaultMaskFile.dat
[10:13:56.663] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters_C15.dat
[10:13:56.715] <TB0> INFO: clk: 4
[10:13:56.715] <TB0> INFO: ctr: 4
[10:13:56.715] <TB0> INFO: sda: 19
[10:13:56.715] <TB0> INFO: tin: 9
[10:13:56.715] <TB0> INFO: level: 15
[10:13:56.715] <TB0> INFO: triggerdelay: 0
[10:13:56.715] <TB0> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[10:13:56.715] <TB0> INFO: Log level: INFO
[10:13:56.724] <TB0> INFO: Found DTB DTB_WS6AYH
[10:13:56.732] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[10:13:56.734] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
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[10:13:56.735] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[10:13:58.219] <TB0> INFO: DUT info:
[10:13:58.219] <TB0> INFO: The DUT currently contains the following objects:
[10:13:58.219] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[10:13:58.219] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:13:58.219] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:13:58.219] <TB0> INFO: TBM Core alpha (2): 7 registers set
[10:13:58.219] <TB0> INFO: TBM Core beta (3): 7 registers set
[10:13:58.219] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:13:58.219] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.219] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:13:58.620] <TB0> INFO: enter 'restricted' command line mode
[10:13:58.620] <TB0> INFO: enter test to run
[10:13:58.620] <TB0> INFO: test: pretest no parameter change
[10:13:58.620] <TB0> INFO: running: pretest
[10:13:59.156] <TB0> INFO: ######################################################################
[10:13:59.156] <TB0> INFO: PixTestPretest::doTest()
[10:13:59.156] <TB0> INFO: ######################################################################
[10:13:59.157] <TB0> INFO: ----------------------------------------------------------------------
[10:13:59.157] <TB0> INFO: PixTestPretest::programROC()
[10:13:59.157] <TB0> INFO: ----------------------------------------------------------------------
[10:14:17.171] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:14:17.171] <TB0> INFO: IA differences per ROC: 19.3 21.7 19.3 20.9 20.1 17.7 20.1 17.7 17.7 19.3 20.1 16.1 20.1 17.7 18.5 17.7
[10:14:17.205] <TB0> INFO: ----------------------------------------------------------------------
[10:14:17.205] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:14:17.205] <TB0> INFO: ----------------------------------------------------------------------
[10:14:38.443] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[10:14:38.443] <TB0> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 20.1 20.1 19.3 20.1 19.3 20.9 20.1 19.3 18.5 20.1 19.3 20.1 19.3
[10:14:38.472] <TB0> INFO: ----------------------------------------------------------------------
[10:14:38.472] <TB0> INFO: PixTestPretest::findTiming()
[10:14:38.472] <TB0> INFO: ----------------------------------------------------------------------
[10:14:38.472] <TB0> INFO: PixTestCmd::init()

[10:15:09.370] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:15:09.370] <TB0> INFO: (success/tries = 100/100), width = 3
[10:15:10.869] <TB0> INFO: ----------------------------------------------------------------------
[10:15:10.869] <TB0> INFO: PixTestPretest::findWorkingPixel()
[10:15:10.869] <TB0> INFO: ----------------------------------------------------------------------
[10:15:10.960] <TB0> INFO: Expecting 231680 events.
[10:15:20.664] <TB0> INFO: 231680 events read in total (9112ms).
[10:15:20.671] <TB0> INFO: Test took 9801ms.
[10:15:20.917] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:15:20.947] <TB0> INFO: ----------------------------------------------------------------------
[10:15:20.947] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[10:15:20.947] <TB0> INFO: ----------------------------------------------------------------------
[10:15:21.040] <TB0> INFO: Expecting 231680 events.
[10:15:30.720] <TB0> INFO: 231680 events read in total (9089ms).
[10:15:30.729] <TB0> INFO: Test took 9779ms.
[10:15:30.990] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[10:15:30.991] <TB0> INFO: CalDel: 108 108 111 91 93 103 111 112 103 122 138 123 87 84 104 84
[10:15:30.991] <TB0> INFO: VthrComp: 51 51 51 54 51 51 51 53 51 51 51 51 51 51 51 53
[10:15:30.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C0.dat
[10:15:30.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C1.dat
[10:15:30.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C2.dat
[10:15:30.993] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C3.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C4.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C5.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C6.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C7.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C8.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C9.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C10.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C11.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C12.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C13.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C14.dat
[10:15:30.994] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters_C15.dat
[10:15:30.994] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0a.dat
[10:15:30.995] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C0b.dat
[10:15:30.995] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1a.dat
[10:15:30.995] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//tbmParameters_C1b.dat
[10:15:30.995] <TB0> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[10:15:31.089] <TB0> INFO: enter test to run
[10:15:31.089] <TB0> INFO: test: FullTest no parameter change
[10:15:31.089] <TB0> INFO: running: fulltest
[10:15:31.089] <TB0> INFO: ######################################################################
[10:15:31.089] <TB0> INFO: PixTestFullTest::doTest()
[10:15:31.089] <TB0> INFO: ######################################################################
[10:15:31.090] <TB0> INFO: ######################################################################
[10:15:31.090] <TB0> INFO: PixTestAlive::doTest()
[10:15:31.090] <TB0> INFO: ######################################################################
[10:15:31.091] <TB0> INFO: ----------------------------------------------------------------------
[10:15:31.091] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:15:31.091] <TB0> INFO: ----------------------------------------------------------------------
[10:15:31.324] <TB0> INFO: Expecting 41600 events.
[10:15:34.860] <TB0> INFO: 41600 events read in total (2944ms).
[10:15:34.861] <TB0> INFO: Test took 3769ms.
[10:15:35.089] <TB0> INFO: PixTestAlive::aliveTest() done
[10:15:35.089] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:15:35.090] <TB0> INFO: ----------------------------------------------------------------------
[10:15:35.090] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:15:35.090] <TB0> INFO: ----------------------------------------------------------------------
[10:15:35.326] <TB0> INFO: Expecting 41600 events.
[10:15:38.347] <TB0> INFO: 41600 events read in total (2430ms).
[10:15:38.347] <TB0> INFO: Test took 3255ms.
[10:15:38.348] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:15:38.587] <TB0> INFO: PixTestAlive::maskTest() done
[10:15:38.587] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:15:38.588] <TB0> INFO: ----------------------------------------------------------------------
[10:15:38.588] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:15:38.588] <TB0> INFO: ----------------------------------------------------------------------
[10:15:38.825] <TB0> INFO: Expecting 41600 events.
[10:15:42.523] <TB0> INFO: 41600 events read in total (3106ms).
[10:15:42.524] <TB0> INFO: Test took 3934ms.
[10:15:42.752] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[10:15:42.753] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:15:42.753] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:15:42.753] <TB0> INFO: Decoding statistics:
[10:15:42.753] <TB0> INFO: General information:
[10:15:42.753] <TB0> INFO: 16bit words read: 0
[10:15:42.753] <TB0> INFO: valid events total: 0
[10:15:42.753] <TB0> INFO: empty events: 0
[10:15:42.753] <TB0> INFO: valid events with pixels: 0
[10:15:42.753] <TB0> INFO: valid pixel hits: 0
[10:15:42.753] <TB0> INFO: Event errors: 0
[10:15:42.753] <TB0> INFO: start marker: 0
[10:15:42.753] <TB0> INFO: stop marker: 0
[10:15:42.753] <TB0> INFO: overflow: 0
[10:15:42.753] <TB0> INFO: invalid 5bit words: 0
[10:15:42.753] <TB0> INFO: invalid XOR eye diagram: 0
[10:15:42.753] <TB0> INFO: frame (failed synchr.): 0
[10:15:42.753] <TB0> INFO: idle data (no TBM trl): 0
[10:15:42.753] <TB0> INFO: no data (only TBM hdr): 0
[10:15:42.753] <TB0> INFO: TBM errors: 0
[10:15:42.753] <TB0> INFO: flawed TBM headers: 0
[10:15:42.753] <TB0> INFO: flawed TBM trailers: 0
[10:15:42.753] <TB0> INFO: event ID mismatches: 0
[10:15:42.753] <TB0> INFO: ROC errors: 0
[10:15:42.753] <TB0> INFO: missing ROC header(s): 0
[10:15:42.753] <TB0> INFO: misplaced readback start: 0
[10:15:42.753] <TB0> INFO: Pixel decoding errors: 0
[10:15:42.753] <TB0> INFO: pixel data incomplete: 0
[10:15:42.753] <TB0> INFO: pixel address: 0
[10:15:42.753] <TB0> INFO: pulse height fill bit: 0
[10:15:42.753] <TB0> INFO: buffer corruption: 0
[10:15:42.762] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:15:42.763] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:15:42.763] <TB0> INFO: ######################################################################
[10:15:42.763] <TB0> INFO: PixTestReadback::doTest()
[10:15:42.763] <TB0> INFO: ######################################################################
[10:15:42.763] <TB0> INFO: ----------------------------------------------------------------------
[10:15:42.763] <TB0> INFO: PixTestReadback::CalibrateVd()
[10:15:42.763] <TB0> INFO: ----------------------------------------------------------------------
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:15:52.725] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:15:52.726] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:15:52.753] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:15:52.753] <TB0> INFO: ----------------------------------------------------------------------
[10:15:52.753] <TB0> INFO: PixTestReadback::CalibrateVa()
[10:15:52.753] <TB0> INFO: ----------------------------------------------------------------------
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:16:02.639] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:16:02.640] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:16:02.640] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:16:02.640] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:16:02.666] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:16:02.667] <TB0> INFO: ----------------------------------------------------------------------
[10:16:02.667] <TB0> INFO: PixTestReadback::readbackVbg()
[10:16:02.667] <TB0> INFO: ----------------------------------------------------------------------
[10:16:10.305] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:16:10.305] <TB0> INFO: ----------------------------------------------------------------------
[10:16:10.305] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[10:16:10.305] <TB0> INFO: ----------------------------------------------------------------------
[10:16:10.305] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.8calibrated Vbg = 1.17697 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 153calibrated Vbg = 1.17214 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.5calibrated Vbg = 1.17234 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153calibrated Vbg = 1.16497 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 155.3calibrated Vbg = 1.17223 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.1calibrated Vbg = 1.17948 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162.9calibrated Vbg = 1.17657 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.6calibrated Vbg = 1.17816 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.5calibrated Vbg = 1.17591 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 146.4calibrated Vbg = 1.16724 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.5calibrated Vbg = 1.17194 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157calibrated Vbg = 1.16452 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 149.7calibrated Vbg = 1.16727 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.8calibrated Vbg = 1.16613 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159calibrated Vbg = 1.16994 :::*/*/*/*/
[10:16:10.305] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.7calibrated Vbg = 1.16787 :::*/*/*/*/
[10:16:10.307] <TB0> INFO: ----------------------------------------------------------------------
[10:16:10.307] <TB0> INFO: PixTestReadback::CalibrateIa()
[10:16:10.307] <TB0> INFO: ----------------------------------------------------------------------
[10:18:50.608] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C0.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C1.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C2.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C3.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C4.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C5.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C6.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C7.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C8.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C9.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C10.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C11.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C12.dat
[10:18:50.609] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C13.dat
[10:18:50.610] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C14.dat
[10:18:50.610] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//readbackCal_C15.dat
[10:18:50.636] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:18:50.637] <TB0> INFO: PixTestReadback::doTest() done
[10:18:50.637] <TB0> INFO: Decoding statistics:
[10:18:50.637] <TB0> INFO: General information:
[10:18:50.637] <TB0> INFO: 16bit words read: 1536
[10:18:50.637] <TB0> INFO: valid events total: 256
[10:18:50.637] <TB0> INFO: empty events: 256
[10:18:50.637] <TB0> INFO: valid events with pixels: 0
[10:18:50.637] <TB0> INFO: valid pixel hits: 0
[10:18:50.637] <TB0> INFO: Event errors: 0
[10:18:50.637] <TB0> INFO: start marker: 0
[10:18:50.637] <TB0> INFO: stop marker: 0
[10:18:50.637] <TB0> INFO: overflow: 0
[10:18:50.637] <TB0> INFO: invalid 5bit words: 0
[10:18:50.637] <TB0> INFO: invalid XOR eye diagram: 0
[10:18:50.637] <TB0> INFO: frame (failed synchr.): 0
[10:18:50.637] <TB0> INFO: idle data (no TBM trl): 0
[10:18:50.637] <TB0> INFO: no data (only TBM hdr): 0
[10:18:50.637] <TB0> INFO: TBM errors: 0
[10:18:50.637] <TB0> INFO: flawed TBM headers: 0
[10:18:50.637] <TB0> INFO: flawed TBM trailers: 0
[10:18:50.637] <TB0> INFO: event ID mismatches: 0
[10:18:50.637] <TB0> INFO: ROC errors: 0
[10:18:50.638] <TB0> INFO: missing ROC header(s): 0
[10:18:50.638] <TB0> INFO: misplaced readback start: 0
[10:18:50.638] <TB0> INFO: Pixel decoding errors: 0
[10:18:50.638] <TB0> INFO: pixel data incomplete: 0
[10:18:50.638] <TB0> INFO: pixel address: 0
[10:18:50.638] <TB0> INFO: pulse height fill bit: 0
[10:18:50.638] <TB0> INFO: buffer corruption: 0
[10:18:50.672] <TB0> INFO: ######################################################################
[10:18:50.672] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:18:50.672] <TB0> INFO: ######################################################################
[10:18:50.674] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:18:50.686] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:18:50.686] <TB0> INFO: run 1 of 1
[10:18:50.918] <TB0> INFO: Expecting 3120000 events.
[10:19:21.278] <TB0> INFO: 665140 events read in total (29768ms).











[10:19:50.822] <TB0> INFO: 1324945 events read in total (59312ms).











[10:20:20.589] <TB0> INFO: 1985720 events read in total (89079ms).











[10:20:50.535] <TB0> INFO: 2644505 events read in total (119025ms).











[10:21:12.061] <TB0> INFO: 3120000 events read in total (140551ms).
[10:21:12.132] <TB0> INFO: Test took 141447ms.
[10:21:38.540] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 167 seconds
[10:21:38.540] <TB0> INFO: number of dead bumps (per ROC): 0 0 2 0 0 0 2 0 0 0 0 0 1 0 0 0
[10:21:38.540] <TB0> INFO: separation cut (per ROC): 101 118 112 119 99 99 109 109 98 103 96 99 108 108 106 110
[10:21:38.540] <TB0> INFO: Decoding statistics:
[10:21:38.540] <TB0> INFO: General information:
[10:21:38.540] <TB0> INFO: 16bit words read: 0
[10:21:38.540] <TB0> INFO: valid events total: 0
[10:21:38.540] <TB0> INFO: empty events: 0
[10:21:38.540] <TB0> INFO: valid events with pixels: 0
[10:21:38.540] <TB0> INFO: valid pixel hits: 0
[10:21:38.540] <TB0> INFO: Event errors: 0
[10:21:38.540] <TB0> INFO: start marker: 0
[10:21:38.540] <TB0> INFO: stop marker: 0
[10:21:38.540] <TB0> INFO: overflow: 0
[10:21:38.540] <TB0> INFO: invalid 5bit words: 0
[10:21:38.540] <TB0> INFO: invalid XOR eye diagram: 0
[10:21:38.540] <TB0> INFO: frame (failed synchr.): 0
[10:21:38.540] <TB0> INFO: idle data (no TBM trl): 0
[10:21:38.540] <TB0> INFO: no data (only TBM hdr): 0
[10:21:38.540] <TB0> INFO: TBM errors: 0
[10:21:38.540] <TB0> INFO: flawed TBM headers: 0
[10:21:38.540] <TB0> INFO: flawed TBM trailers: 0
[10:21:38.540] <TB0> INFO: event ID mismatches: 0
[10:21:38.540] <TB0> INFO: ROC errors: 0
[10:21:38.540] <TB0> INFO: missing ROC header(s): 0
[10:21:38.540] <TB0> INFO: misplaced readback start: 0
[10:21:38.540] <TB0> INFO: Pixel decoding errors: 0
[10:21:38.540] <TB0> INFO: pixel data incomplete: 0
[10:21:38.540] <TB0> INFO: pixel address: 0
[10:21:38.540] <TB0> INFO: pulse height fill bit: 0
[10:21:38.541] <TB0> INFO: buffer corruption: 0
[10:21:38.579] <TB0> INFO: ######################################################################
[10:21:38.579] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:21:38.579] <TB0> INFO: ######################################################################
[10:21:38.580] <TB0> INFO: ----------------------------------------------------------------------
[10:21:38.580] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:21:38.580] <TB0> INFO: ----------------------------------------------------------------------
[10:21:38.580] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:21:38.591] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[10:21:38.591] <TB0> INFO: run 1 of 1
[10:21:38.836] <TB0> INFO: Expecting 36608000 events.
[10:22:01.923] <TB0> INFO: 673750 events read in total (22496ms).
[10:22:24.555] <TB0> INFO: 1331950 events read in total (45128ms).
[10:22:47.222] <TB0> INFO: 1994400 events read in total (67795ms).
[10:23:10.133] <TB0> INFO: 2654700 events read in total (90706ms).
[10:23:32.885] <TB0> INFO: 3314200 events read in total (113458ms).
[10:23:55.767] <TB0> INFO: 3971250 events read in total (136340ms).
[10:24:18.441] <TB0> INFO: 4627750 events read in total (159014ms).
[10:24:41.156] <TB0> INFO: 5285700 events read in total (181729ms).
[10:25:03.793] <TB0> INFO: 5943650 events read in total (204366ms).
[10:25:26.646] <TB0> INFO: 6601550 events read in total (227219ms).
[10:25:49.354] <TB0> INFO: 7258950 events read in total (249927ms).
[10:26:12.086] <TB0> INFO: 7916850 events read in total (272659ms).
[10:26:35.006] <TB0> INFO: 8574400 events read in total (295579ms).
[10:26:57.377] <TB0> INFO: 9230800 events read in total (317950ms).
[10:27:20.067] <TB0> INFO: 9888050 events read in total (340640ms).
[10:27:42.872] <TB0> INFO: 10544300 events read in total (363445ms).
[10:28:05.497] <TB0> INFO: 11199350 events read in total (386070ms).
[10:28:28.018] <TB0> INFO: 11858250 events read in total (408591ms).
[10:28:50.931] <TB0> INFO: 12515650 events read in total (431504ms).
[10:29:13.498] <TB0> INFO: 13172750 events read in total (454071ms).
[10:29:36.029] <TB0> INFO: 13829500 events read in total (476602ms).
[10:29:58.684] <TB0> INFO: 14484050 events read in total (499257ms).
[10:30:21.044] <TB0> INFO: 15137200 events read in total (521617ms).
[10:30:43.665] <TB0> INFO: 15791700 events read in total (544238ms).
[10:31:06.074] <TB0> INFO: 16444950 events read in total (566647ms).
[10:31:28.618] <TB0> INFO: 17097050 events read in total (589191ms).
[10:31:51.354] <TB0> INFO: 17751550 events read in total (611927ms).
[10:32:13.883] <TB0> INFO: 18402900 events read in total (634456ms).
[10:32:36.110] <TB0> INFO: 19053200 events read in total (656683ms).
[10:32:58.470] <TB0> INFO: 19701350 events read in total (679043ms).
[10:33:20.821] <TB0> INFO: 20351950 events read in total (701394ms).
[10:33:43.183] <TB0> INFO: 21001650 events read in total (723756ms).
[10:34:05.466] <TB0> INFO: 21650350 events read in total (746040ms).
[10:34:27.849] <TB0> INFO: 22298500 events read in total (768422ms).
[10:34:50.169] <TB0> INFO: 22945600 events read in total (790742ms).
[10:35:12.379] <TB0> INFO: 23592150 events read in total (812952ms).
[10:35:34.539] <TB0> INFO: 24239400 events read in total (835112ms).
[10:35:56.728] <TB0> INFO: 24885700 events read in total (857301ms).
[10:36:18.951] <TB0> INFO: 25532650 events read in total (879524ms).
[10:36:41.143] <TB0> INFO: 26178500 events read in total (901716ms).
[10:37:03.234] <TB0> INFO: 26822350 events read in total (923807ms).
[10:37:25.443] <TB0> INFO: 27469050 events read in total (946016ms).
[10:37:47.712] <TB0> INFO: 28111850 events read in total (968285ms).
[10:38:10.263] <TB0> INFO: 28758250 events read in total (990836ms).
[10:38:32.542] <TB0> INFO: 29402950 events read in total (1013115ms).
[10:38:54.807] <TB0> INFO: 30045850 events read in total (1035380ms).
[10:39:17.328] <TB0> INFO: 30685800 events read in total (1057901ms).
[10:39:39.370] <TB0> INFO: 31327400 events read in total (1079943ms).
[10:40:01.471] <TB0> INFO: 31969700 events read in total (1102044ms).
[10:40:23.452] <TB0> INFO: 32611600 events read in total (1124025ms).
[10:40:45.729] <TB0> INFO: 33254900 events read in total (1146302ms).
[10:41:07.800] <TB0> INFO: 33897750 events read in total (1168373ms).
[10:41:29.867] <TB0> INFO: 34542150 events read in total (1190440ms).
[10:41:51.979] <TB0> INFO: 35181850 events read in total (1212552ms).
[10:42:14.320] <TB0> INFO: 35830000 events read in total (1234893ms).
[10:42:36.738] <TB0> INFO: 36484000 events read in total (1257311ms).
[10:42:41.389] <TB0> INFO: 36608000 events read in total (1261962ms).
[10:42:41.444] <TB0> INFO: Test took 1262853ms.
[10:42:41.878] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:43.867] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:45.587] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:47.524] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:49.552] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:51.352] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:53.019] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:54.778] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:56.538] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:42:58.476] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:00.488] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:02.461] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:04.092] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:05.622] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:07.485] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:09.340] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:43:10.976] <TB0> INFO: PixTestScurves::scurves() done
[10:43:10.976] <TB0> INFO: Vcal mean: 109.30 127.44 112.24 119.67 103.86 110.58 118.04 124.92 115.08 113.04 107.07 105.37 116.17 113.00 110.77 116.32
[10:43:10.976] <TB0> INFO: Vcal RMS: 4.66 6.33 7.16 6.34 4.93 5.13 5.37 6.91 5.43 4.88 7.11 7.42 5.42 4.78 5.17 5.87
[10:43:10.977] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1292 seconds
[10:43:10.977] <TB0> INFO: Decoding statistics:
[10:43:10.977] <TB0> INFO: General information:
[10:43:10.977] <TB0> INFO: 16bit words read: 0
[10:43:10.977] <TB0> INFO: valid events total: 0
[10:43:10.977] <TB0> INFO: empty events: 0
[10:43:10.977] <TB0> INFO: valid events with pixels: 0
[10:43:10.977] <TB0> INFO: valid pixel hits: 0
[10:43:10.977] <TB0> INFO: Event errors: 0
[10:43:10.977] <TB0> INFO: start marker: 0
[10:43:10.977] <TB0> INFO: stop marker: 0
[10:43:10.977] <TB0> INFO: overflow: 0
[10:43:10.977] <TB0> INFO: invalid 5bit words: 0
[10:43:10.977] <TB0> INFO: invalid XOR eye diagram: 0
[10:43:10.977] <TB0> INFO: frame (failed synchr.): 0
[10:43:10.977] <TB0> INFO: idle data (no TBM trl): 0
[10:43:10.977] <TB0> INFO: no data (only TBM hdr): 0
[10:43:10.977] <TB0> INFO: TBM errors: 0
[10:43:10.977] <TB0> INFO: flawed TBM headers: 0
[10:43:10.977] <TB0> INFO: flawed TBM trailers: 0
[10:43:10.977] <TB0> INFO: event ID mismatches: 0
[10:43:10.977] <TB0> INFO: ROC errors: 0
[10:43:10.977] <TB0> INFO: missing ROC header(s): 0
[10:43:10.977] <TB0> INFO: misplaced readback start: 0
[10:43:10.977] <TB0> INFO: Pixel decoding errors: 0
[10:43:10.977] <TB0> INFO: pixel data incomplete: 0
[10:43:10.977] <TB0> INFO: pixel address: 0
[10:43:10.977] <TB0> INFO: pulse height fill bit: 0
[10:43:10.977] <TB0> INFO: buffer corruption: 0
[10:43:11.061] <TB0> INFO: ######################################################################
[10:43:11.061] <TB0> INFO: PixTestTrim::doTest()
[10:43:11.061] <TB0> INFO: ######################################################################
[10:43:11.062] <TB0> INFO: ----------------------------------------------------------------------
[10:43:11.062] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:43:11.062] <TB0> INFO: ----------------------------------------------------------------------
[10:43:11.102] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:43:11.102] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:43:11.110] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:43:11.110] <TB0> INFO: run 1 of 1
[10:43:11.352] <TB0> INFO: Expecting 5025280 events.
[10:43:41.831] <TB0> INFO: 824800 events read in total (29885ms).
[10:44:11.828] <TB0> INFO: 1647368 events read in total (59882ms).
[10:44:41.833] <TB0> INFO: 2467040 events read in total (89887ms).
[10:45:11.506] <TB0> INFO: 3284672 events read in total (119560ms).
[10:45:41.125] <TB0> INFO: 4098752 events read in total (149180ms).
[10:46:10.936] <TB0> INFO: 4910640 events read in total (178990ms).
[10:46:15.610] <TB0> INFO: 5025280 events read in total (183664ms).
[10:46:15.654] <TB0> INFO: Test took 184545ms.
[10:46:33.579] <TB0> INFO: ROC 0 VthrComp = 111
[10:46:33.579] <TB0> INFO: ROC 1 VthrComp = 131
[10:46:33.579] <TB0> INFO: ROC 2 VthrComp = 113
[10:46:33.579] <TB0> INFO: ROC 3 VthrComp = 129
[10:46:33.579] <TB0> INFO: ROC 4 VthrComp = 106
[10:46:33.580] <TB0> INFO: ROC 5 VthrComp = 111
[10:46:33.580] <TB0> INFO: ROC 6 VthrComp = 122
[10:46:33.580] <TB0> INFO: ROC 7 VthrComp = 123
[10:46:33.580] <TB0> INFO: ROC 8 VthrComp = 111
[10:46:33.580] <TB0> INFO: ROC 9 VthrComp = 112
[10:46:33.580] <TB0> INFO: ROC 10 VthrComp = 102
[10:46:33.580] <TB0> INFO: ROC 11 VthrComp = 101
[10:46:33.580] <TB0> INFO: ROC 12 VthrComp = 118
[10:46:33.581] <TB0> INFO: ROC 13 VthrComp = 117
[10:46:33.581] <TB0> INFO: ROC 14 VthrComp = 116
[10:46:33.581] <TB0> INFO: ROC 15 VthrComp = 120
[10:46:33.820] <TB0> INFO: Expecting 41600 events.
[10:46:37.255] <TB0> INFO: 41600 events read in total (2844ms).
[10:46:37.255] <TB0> INFO: Test took 3673ms.
[10:46:37.264] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:46:37.264] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:46:37.273] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:46:37.273] <TB0> INFO: run 1 of 1
[10:46:37.551] <TB0> INFO: Expecting 5025280 events.
[10:47:03.414] <TB0> INFO: 591024 events read in total (25272ms).
[10:47:28.691] <TB0> INFO: 1180736 events read in total (50549ms).
[10:47:54.020] <TB0> INFO: 1771056 events read in total (75878ms).
[10:48:19.334] <TB0> INFO: 2360120 events read in total (101192ms).
[10:48:44.697] <TB0> INFO: 2947632 events read in total (126555ms).
[10:49:10.350] <TB0> INFO: 3534040 events read in total (152208ms).
[10:49:36.035] <TB0> INFO: 4120080 events read in total (177893ms).
[10:50:01.235] <TB0> INFO: 4706024 events read in total (203093ms).
[10:50:15.525] <TB0> INFO: 5025280 events read in total (217383ms).
[10:50:15.595] <TB0> INFO: Test took 218323ms.
[10:50:42.574] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 63.625 for pixel 21/7 mean/min/max = 48.4118/33.1814/63.6422
[10:50:42.574] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 65.1209 for pixel 15/76 mean/min/max = 49.3803/33.5104/65.2502
[10:50:42.574] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 65.0874 for pixel 39/1 mean/min/max = 47.7435/30.2036/65.2835
[10:50:42.575] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 60.6468 for pixel 17/26 mean/min/max = 45.8413/30.4955/61.1872
[10:50:42.575] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.3513 for pixel 17/10 mean/min/max = 48.0261/34.574/61.4783
[10:50:42.576] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 64.379 for pixel 4/23 mean/min/max = 48.9687/33.4637/64.4738
[10:50:42.576] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.014 for pixel 19/4 mean/min/max = 45.7867/30.4964/61.077
[10:50:42.576] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 67.999 for pixel 0/14 mean/min/max = 49.6623/31.2532/68.0714
[10:50:42.577] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 65.4617 for pixel 36/1 mean/min/max = 49.4461/33.2569/65.6352
[10:50:42.577] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.0364 for pixel 51/14 mean/min/max = 47.1231/31.5491/62.6971
[10:50:42.577] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 71.5 for pixel 12/7 mean/min/max = 51.2849/30.8168/71.7529
[10:50:42.578] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 69.195 for pixel 1/10 mean/min/max = 49.7587/30.2782/69.2393
[10:50:42.578] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.3494 for pixel 0/3 mean/min/max = 46.1127/31.8531/60.3722
[10:50:42.578] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.9524 for pixel 13/68 mean/min/max = 45.2668/32.3546/58.1789
[10:50:42.579] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.1876 for pixel 5/3 mean/min/max = 46.4486/31.6992/61.1981
[10:50:42.579] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.5196 for pixel 1/24 mean/min/max = 46.5026/31.4624/61.5428
[10:50:42.579] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:50:42.668] <TB0> INFO: Expecting 411648 events.
[10:50:51.998] <TB0> INFO: 411648 events read in total (8738ms).
[10:50:52.005] <TB0> INFO: Expecting 411648 events.
[10:51:01.209] <TB0> INFO: 411648 events read in total (8801ms).
[10:51:01.219] <TB0> INFO: Expecting 411648 events.
[10:51:10.333] <TB0> INFO: 411648 events read in total (8711ms).
[10:51:10.349] <TB0> INFO: Expecting 411648 events.
[10:51:19.487] <TB0> INFO: 411648 events read in total (8735ms).
[10:51:19.503] <TB0> INFO: Expecting 411648 events.
[10:51:28.684] <TB0> INFO: 411648 events read in total (8778ms).
[10:51:28.701] <TB0> INFO: Expecting 411648 events.
[10:51:37.893] <TB0> INFO: 411648 events read in total (8789ms).
[10:51:37.913] <TB0> INFO: Expecting 411648 events.
[10:51:47.076] <TB0> INFO: 411648 events read in total (8760ms).
[10:51:47.099] <TB0> INFO: Expecting 411648 events.
[10:51:56.274] <TB0> INFO: 411648 events read in total (8772ms).
[10:51:56.313] <TB0> INFO: Expecting 411648 events.
[10:52:05.456] <TB0> INFO: 411648 events read in total (8740ms).
[10:52:05.485] <TB0> INFO: Expecting 411648 events.
[10:52:14.657] <TB0> INFO: 411648 events read in total (8769ms).
[10:52:14.690] <TB0> INFO: Expecting 411648 events.
[10:52:23.854] <TB0> INFO: 411648 events read in total (8757ms).
[10:52:23.890] <TB0> INFO: Expecting 411648 events.
[10:52:33.003] <TB0> INFO: 411648 events read in total (8710ms).
[10:52:33.041] <TB0> INFO: Expecting 411648 events.
[10:52:42.186] <TB0> INFO: 411648 events read in total (8742ms).
[10:52:42.225] <TB0> INFO: Expecting 411648 events.
[10:52:51.417] <TB0> INFO: 411648 events read in total (8788ms).
[10:52:51.461] <TB0> INFO: Expecting 411648 events.
[10:53:00.646] <TB0> INFO: 411648 events read in total (8782ms).
[10:53:00.694] <TB0> INFO: Expecting 411648 events.
[10:53:09.827] <TB0> INFO: 411648 events read in total (8730ms).
[10:53:09.890] <TB0> INFO: Test took 147311ms.
[10:53:10.630] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:53:10.640] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:53:10.640] <TB0> INFO: run 1 of 1
[10:53:10.896] <TB0> INFO: Expecting 5025280 events.
[10:53:36.834] <TB0> INFO: 590040 events read in total (25347ms).
[10:54:02.088] <TB0> INFO: 1181000 events read in total (50601ms).
[10:54:27.887] <TB0> INFO: 1769224 events read in total (76400ms).
[10:54:53.845] <TB0> INFO: 2358648 events read in total (102358ms).
[10:55:19.664] <TB0> INFO: 2951112 events read in total (128177ms).
[10:55:45.585] <TB0> INFO: 3543824 events read in total (154098ms).
[10:56:11.429] <TB0> INFO: 4136000 events read in total (179942ms).
[10:56:37.269] <TB0> INFO: 4726080 events read in total (205782ms).
[10:56:50.751] <TB0> INFO: 5025280 events read in total (219264ms).
[10:56:50.857] <TB0> INFO: Test took 220218ms.
[10:57:14.438] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 1.059904 .. 147.810790
[10:57:14.685] <TB0> INFO: Expecting 208000 events.
[10:57:24.182] <TB0> INFO: 208000 events read in total (8905ms).
[10:57:24.184] <TB0> INFO: Test took 9745ms.
[10:57:24.234] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[10:57:24.242] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:57:24.242] <TB0> INFO: run 1 of 1
[10:57:24.520] <TB0> INFO: Expecting 5224960 events.
[10:57:50.983] <TB0> INFO: 583832 events read in total (25871ms).
[10:58:16.152] <TB0> INFO: 1167720 events read in total (51040ms).
[10:58:41.785] <TB0> INFO: 1751584 events read in total (76673ms).
[10:59:07.363] <TB0> INFO: 2335608 events read in total (102251ms).
[10:59:33.008] <TB0> INFO: 2919312 events read in total (127896ms).
[10:59:58.397] <TB0> INFO: 3501648 events read in total (153285ms).
[11:00:24.149] <TB0> INFO: 4084608 events read in total (179038ms).
[11:00:49.998] <TB0> INFO: 4667256 events read in total (204886ms).
[11:01:15.148] <TB0> INFO: 5224960 events read in total (230036ms).
[11:01:15.251] <TB0> INFO: Test took 231009ms.
[11:01:42.589] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.694442 .. 45.195759
[11:01:42.822] <TB0> INFO: Expecting 208000 events.
[11:01:52.587] <TB0> INFO: 208000 events read in total (9173ms).
[11:01:52.588] <TB0> INFO: Test took 9998ms.
[11:01:52.634] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:01:52.644] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:01:52.644] <TB0> INFO: run 1 of 1
[11:01:52.922] <TB0> INFO: Expecting 1331200 events.
[11:02:20.794] <TB0> INFO: 663464 events read in total (27281ms).
[11:02:49.137] <TB0> INFO: 1325792 events read in total (55625ms).
[11:02:49.816] <TB0> INFO: 1331200 events read in total (56304ms).
[11:02:49.841] <TB0> INFO: Test took 57197ms.
[11:03:02.792] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.702467 .. 47.707072
[11:03:03.029] <TB0> INFO: Expecting 208000 events.
[11:03:13.031] <TB0> INFO: 208000 events read in total (9410ms).
[11:03:13.032] <TB0> INFO: Test took 10239ms.
[11:03:13.078] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:03:13.088] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:03:13.088] <TB0> INFO: run 1 of 1
[11:03:13.366] <TB0> INFO: Expecting 1364480 events.
[11:03:41.107] <TB0> INFO: 651776 events read in total (27149ms).
[11:04:08.658] <TB0> INFO: 1302736 events read in total (54700ms).
[11:04:11.696] <TB0> INFO: 1364480 events read in total (57739ms).
[11:04:11.720] <TB0> INFO: Test took 58631ms.
[11:04:25.699] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 25.955464 .. 45.468916
[11:04:25.944] <TB0> INFO: Expecting 208000 events.
[11:04:35.640] <TB0> INFO: 208000 events read in total (9104ms).
[11:04:35.641] <TB0> INFO: Test took 9941ms.
[11:04:35.689] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:04:35.700] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:04:35.700] <TB0> INFO: run 1 of 1
[11:04:35.978] <TB0> INFO: Expecting 1364480 events.
[11:05:04.360] <TB0> INFO: 667424 events read in total (27791ms).
[11:05:32.282] <TB0> INFO: 1334672 events read in total (55713ms).
[11:05:33.944] <TB0> INFO: 1364480 events read in total (57376ms).
[11:05:33.975] <TB0> INFO: Test took 58276ms.
[11:05:47.992] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:05:47.992] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:05:47.002] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:05:47.002] <TB0> INFO: run 1 of 1
[11:05:48.234] <TB0> INFO: Expecting 1364480 events.
[11:06:16.172] <TB0> INFO: 667656 events read in total (27347ms).
[11:06:44.087] <TB0> INFO: 1334440 events read in total (55262ms).
[11:06:45.799] <TB0> INFO: 1364480 events read in total (56974ms).
[11:06:45.827] <TB0> INFO: Test took 57825ms.
[11:06:58.767] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C0.dat
[11:06:58.767] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C1.dat
[11:06:58.767] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C2.dat
[11:06:58.767] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C3.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C4.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C5.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C6.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C7.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C8.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C9.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C10.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C11.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C12.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C13.dat
[11:06:58.768] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C14.dat
[11:06:58.769] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C15.dat
[11:06:58.769] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C0.dat
[11:06:58.777] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C1.dat
[11:06:58.785] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C2.dat
[11:06:58.794] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C3.dat
[11:06:58.802] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C4.dat
[11:06:58.810] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C5.dat
[11:06:58.819] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C6.dat
[11:06:58.827] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C7.dat
[11:06:58.835] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C8.dat
[11:06:58.844] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C9.dat
[11:06:58.852] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C10.dat
[11:06:58.861] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C11.dat
[11:06:58.869] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C12.dat
[11:06:58.877] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C13.dat
[11:06:58.886] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C14.dat
[11:06:58.894] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//trimParameters35_C15.dat
[11:06:58.902] <TB0> INFO: PixTestTrim::trimTest() done
[11:06:58.902] <TB0> INFO: vtrim: 166 179 148 145 138 148 127 163 157 126 168 150 121 131 137 140
[11:06:58.902] <TB0> INFO: vthrcomp: 111 131 113 129 106 111 122 123 111 112 102 101 118 117 116 120
[11:06:58.902] <TB0> INFO: vcal mean: 35.05 35.08 34.93 34.93 34.99 35.08 34.96 35.36 35.04 35.05 34.98 35.07 35.03 34.95 34.99 34.96
[11:06:58.902] <TB0> INFO: vcal RMS: 1.16 1.21 1.06 1.08 1.03 1.16 1.04 1.51 1.09 1.17 1.18 1.17 1.04 0.99 1.02 1.11
[11:06:58.902] <TB0> INFO: bits mean: 10.01 9.54 9.40 10.07 9.04 9.55 10.04 9.55 9.05 9.80 9.42 9.44 9.56 9.93 9.75 9.36
[11:06:58.902] <TB0> INFO: bits RMS: 2.21 2.33 2.71 2.61 2.42 2.33 2.63 2.61 2.54 2.57 2.53 2.57 2.67 2.51 2.55 2.78
[11:06:58.910] <TB0> INFO: ----------------------------------------------------------------------
[11:06:58.911] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:06:58.911] <TB0> INFO: ----------------------------------------------------------------------
[11:06:58.913] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:06:58.925] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:06:58.925] <TB0> INFO: run 1 of 1
[11:06:59.244] <TB0> INFO: Expecting 4160000 events.
[11:07:30.875] <TB0> INFO: 739765 events read in total (31039ms).
[11:08:01.804] <TB0> INFO: 1474940 events read in total (61968ms).
[11:08:32.978] <TB0> INFO: 2206370 events read in total (93142ms).
[11:09:04.136] <TB0> INFO: 2932215 events read in total (124300ms).
[11:09:35.010] <TB0> INFO: 3653235 events read in total (155174ms).
[11:09:56.816] <TB0> INFO: 4160000 events read in total (176980ms).
[11:09:56.921] <TB0> INFO: Test took 177996ms.
[11:10:23.902] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[11:10:23.914] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:10:23.914] <TB0> INFO: run 1 of 1
[11:10:24.197] <TB0> INFO: Expecting 4243200 events.
[11:10:55.278] <TB0> INFO: 711545 events read in total (30490ms).
[11:11:25.894] <TB0> INFO: 1419105 events read in total (61106ms).
[11:11:56.494] <TB0> INFO: 2124340 events read in total (91706ms).
[11:12:26.586] <TB0> INFO: 2822710 events read in total (121798ms).
[11:12:56.740] <TB0> INFO: 3517760 events read in total (151952ms).
[11:13:27.567] <TB0> INFO: 4211820 events read in total (182779ms).
[11:13:29.322] <TB0> INFO: 4243200 events read in total (184534ms).
[11:13:29.400] <TB0> INFO: Test took 185486ms.
[11:13:59.238] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[11:13:59.248] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:13:59.248] <TB0> INFO: run 1 of 1
[11:13:59.481] <TB0> INFO: Expecting 3993600 events.
[11:14:31.101] <TB0> INFO: 726705 events read in total (31028ms).
[11:15:02.021] <TB0> INFO: 1449495 events read in total (61948ms).
[11:15:32.760] <TB0> INFO: 2168155 events read in total (92687ms).
[11:16:03.203] <TB0> INFO: 2879845 events read in total (123130ms).
[11:16:33.846] <TB0> INFO: 3586800 events read in total (153773ms).
[11:16:51.563] <TB0> INFO: 3993600 events read in total (171490ms).
[11:16:51.639] <TB0> INFO: Test took 172391ms.
[11:17:20.949] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 192 (-1/-1) hits flags = 528 (plus default)
[11:17:20.959] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:17:20.959] <TB0> INFO: run 1 of 1
[11:17:21.191] <TB0> INFO: Expecting 4014400 events.
[11:17:52.700] <TB0> INFO: 725485 events read in total (30917ms).
[11:18:23.244] <TB0> INFO: 1447015 events read in total (61461ms).
[11:18:53.685] <TB0> INFO: 2164415 events read in total (91902ms).
[11:19:24.118] <TB0> INFO: 2875250 events read in total (122335ms).
[11:19:54.516] <TB0> INFO: 3581055 events read in total (152733ms).
[11:20:13.178] <TB0> INFO: 4014400 events read in total (171395ms).
[11:20:13.228] <TB0> INFO: Test took 172268ms.
[11:20:39.353] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 192 (-1/-1) hits flags = 528 (plus default)
[11:20:39.364] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:20:39.364] <TB0> INFO: run 1 of 1
[11:20:39.598] <TB0> INFO: Expecting 4014400 events.
[11:21:11.478] <TB0> INFO: 725560 events read in total (31288ms).
[11:21:42.370] <TB0> INFO: 1446930 events read in total (62180ms).
[11:22:13.089] <TB0> INFO: 2164400 events read in total (92899ms).
[11:22:43.976] <TB0> INFO: 2875500 events read in total (123786ms).
[11:23:14.968] <TB0> INFO: 3581825 events read in total (154778ms).
[11:23:33.811] <TB0> INFO: 4014400 events read in total (173621ms).
[11:23:33.896] <TB0> INFO: Test took 174532ms.
[11:24:00.028] <TB0> INFO: PixTestTrim::trimBitTest() done
[11:24:00.029] <TB0> INFO: PixTestTrim::doTest() done, duration: 2448 seconds
[11:24:00.029] <TB0> INFO: Decoding statistics:
[11:24:00.029] <TB0> INFO: General information:
[11:24:00.029] <TB0> INFO: 16bit words read: 0
[11:24:00.029] <TB0> INFO: valid events total: 0
[11:24:00.029] <TB0> INFO: empty events: 0
[11:24:00.029] <TB0> INFO: valid events with pixels: 0
[11:24:00.029] <TB0> INFO: valid pixel hits: 0
[11:24:00.029] <TB0> INFO: Event errors: 0
[11:24:00.029] <TB0> INFO: start marker: 0
[11:24:00.029] <TB0> INFO: stop marker: 0
[11:24:00.029] <TB0> INFO: overflow: 0
[11:24:00.029] <TB0> INFO: invalid 5bit words: 0
[11:24:00.029] <TB0> INFO: invalid XOR eye diagram: 0
[11:24:00.029] <TB0> INFO: frame (failed synchr.): 0
[11:24:00.029] <TB0> INFO: idle data (no TBM trl): 0
[11:24:00.029] <TB0> INFO: no data (only TBM hdr): 0
[11:24:00.029] <TB0> INFO: TBM errors: 0
[11:24:00.029] <TB0> INFO: flawed TBM headers: 0
[11:24:00.029] <TB0> INFO: flawed TBM trailers: 0
[11:24:00.029] <TB0> INFO: event ID mismatches: 0
[11:24:00.029] <TB0> INFO: ROC errors: 0
[11:24:00.029] <TB0> INFO: missing ROC header(s): 0
[11:24:00.029] <TB0> INFO: misplaced readback start: 0
[11:24:00.029] <TB0> INFO: Pixel decoding errors: 0
[11:24:00.029] <TB0> INFO: pixel data incomplete: 0
[11:24:00.029] <TB0> INFO: pixel address: 0
[11:24:00.029] <TB0> INFO: pulse height fill bit: 0
[11:24:00.029] <TB0> INFO: buffer corruption: 0
[11:24:00.755] <TB0> INFO: ######################################################################
[11:24:00.755] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:24:00.755] <TB0> INFO: ######################################################################
[11:24:01.016] <TB0> INFO: Expecting 41600 events.
[11:24:04.512] <TB0> INFO: 41600 events read in total (2904ms).
[11:24:04.512] <TB0> INFO: Test took 3756ms.
[11:24:04.964] <TB0> INFO: Expecting 41600 events.
[11:24:08.522] <TB0> INFO: 41600 events read in total (2966ms).
[11:24:08.523] <TB0> INFO: Test took 3809ms.
[11:24:08.825] <TB0> INFO: Expecting 41600 events.
[11:24:12.285] <TB0> INFO: 41600 events read in total (2869ms).
[11:24:12.287] <TB0> INFO: Test took 3741ms.
[11:24:12.581] <TB0> INFO: Expecting 41600 events.
[11:24:16.231] <TB0> INFO: 41600 events read in total (3057ms).
[11:24:16.232] <TB0> INFO: Test took 3921ms.
[11:24:16.520] <TB0> INFO: Expecting 41600 events.
[11:24:20.076] <TB0> INFO: 41600 events read in total (2965ms).
[11:24:20.077] <TB0> INFO: Test took 3822ms.
[11:24:20.371] <TB0> INFO: Expecting 41600 events.
[11:24:23.868] <TB0> INFO: 41600 events read in total (2905ms).
[11:24:23.869] <TB0> INFO: Test took 3766ms.
[11:24:24.157] <TB0> INFO: Expecting 41600 events.
[11:24:27.833] <TB0> INFO: 41600 events read in total (3084ms).
[11:24:27.834] <TB0> INFO: Test took 3941ms.
[11:24:28.135] <TB0> INFO: Expecting 41600 events.
[11:24:31.610] <TB0> INFO: 41600 events read in total (2883ms).
[11:24:31.611] <TB0> INFO: Test took 3752ms.
[11:24:31.924] <TB0> INFO: Expecting 41600 events.
[11:24:35.598] <TB0> INFO: 41600 events read in total (3082ms).
[11:24:35.599] <TB0> INFO: Test took 3964ms.
[11:24:35.889] <TB0> INFO: Expecting 41600 events.
[11:24:39.523] <TB0> INFO: 41600 events read in total (3042ms).
[11:24:39.524] <TB0> INFO: Test took 3900ms.
[11:24:39.839] <TB0> INFO: Expecting 41600 events.
[11:24:43.434] <TB0> INFO: 41600 events read in total (3004ms).
[11:24:43.435] <TB0> INFO: Test took 3887ms.
[11:24:43.723] <TB0> INFO: Expecting 41600 events.
[11:24:47.361] <TB0> INFO: 41600 events read in total (3046ms).
[11:24:47.361] <TB0> INFO: Test took 3903ms.
[11:24:47.650] <TB0> INFO: Expecting 41600 events.
[11:24:51.356] <TB0> INFO: 41600 events read in total (3113ms).
[11:24:51.356] <TB0> INFO: Test took 3971ms.
[11:24:51.646] <TB0> INFO: Expecting 41600 events.
[11:24:55.226] <TB0> INFO: 41600 events read in total (2989ms).
[11:24:55.227] <TB0> INFO: Test took 3846ms.
[11:24:55.517] <TB0> INFO: Expecting 41600 events.
[11:24:59.019] <TB0> INFO: 41600 events read in total (2910ms).
[11:24:59.020] <TB0> INFO: Test took 3767ms.
[11:24:59.310] <TB0> INFO: Expecting 41600 events.
[11:25:02.891] <TB0> INFO: 41600 events read in total (2989ms).
[11:25:02.893] <TB0> INFO: Test took 3848ms.
[11:25:03.184] <TB0> INFO: Expecting 41600 events.
[11:25:06.697] <TB0> INFO: 41600 events read in total (2922ms).
[11:25:06.698] <TB0> INFO: Test took 3779ms.
[11:25:06.986] <TB0> INFO: Expecting 41600 events.
[11:25:10.511] <TB0> INFO: 41600 events read in total (2933ms).
[11:25:10.512] <TB0> INFO: Test took 3791ms.
[11:25:10.801] <TB0> INFO: Expecting 41600 events.
[11:25:14.246] <TB0> INFO: 41600 events read in total (2854ms).
[11:25:14.247] <TB0> INFO: Test took 3711ms.
[11:25:14.536] <TB0> INFO: Expecting 41600 events.
[11:25:18.120] <TB0> INFO: 41600 events read in total (2993ms).
[11:25:18.121] <TB0> INFO: Test took 3850ms.
[11:25:18.444] <TB0> INFO: Expecting 41600 events.
[11:25:21.993] <TB0> INFO: 41600 events read in total (2957ms).
[11:25:21.994] <TB0> INFO: Test took 3847ms.
[11:25:22.284] <TB0> INFO: Expecting 41600 events.
[11:25:25.787] <TB0> INFO: 41600 events read in total (2911ms).
[11:25:25.787] <TB0> INFO: Test took 3767ms.
[11:25:26.098] <TB0> INFO: Expecting 41600 events.
[11:25:29.672] <TB0> INFO: 41600 events read in total (2982ms).
[11:25:29.673] <TB0> INFO: Test took 3862ms.
[11:25:29.965] <TB0> INFO: Expecting 41600 events.
[11:25:33.510] <TB0> INFO: 41600 events read in total (2953ms).
[11:25:33.511] <TB0> INFO: Test took 3814ms.
[11:25:33.810] <TB0> INFO: Expecting 41600 events.
[11:25:37.371] <TB0> INFO: 41600 events read in total (2970ms).
[11:25:37.372] <TB0> INFO: Test took 3837ms.
[11:25:37.672] <TB0> INFO: Expecting 41600 events.
[11:25:41.194] <TB0> INFO: 41600 events read in total (2930ms).
[11:25:41.194] <TB0> INFO: Test took 3794ms.
[11:25:41.485] <TB0> INFO: Expecting 41600 events.
[11:25:44.975] <TB0> INFO: 41600 events read in total (2899ms).
[11:25:44.976] <TB0> INFO: Test took 3756ms.
[11:25:45.263] <TB0> INFO: Expecting 41600 events.
[11:25:48.765] <TB0> INFO: 41600 events read in total (2910ms).
[11:25:48.766] <TB0> INFO: Test took 3767ms.
[11:25:49.054] <TB0> INFO: Expecting 41600 events.
[11:25:52.602] <TB0> INFO: 41600 events read in total (2956ms).
[11:25:52.603] <TB0> INFO: Test took 3813ms.
[11:25:52.891] <TB0> INFO: Expecting 41600 events.
[11:25:56.428] <TB0> INFO: 41600 events read in total (2946ms).
[11:25:56.428] <TB0> INFO: Test took 3802ms.
[11:25:56.716] <TB0> INFO: Expecting 41600 events.
[11:26:00.276] <TB0> INFO: 41600 events read in total (2968ms).
[11:26:00.277] <TB0> INFO: Test took 3825ms.
[11:26:00.565] <TB0> INFO: Expecting 41600 events.
[11:26:04.042] <TB0> INFO: 41600 events read in total (2886ms).
[11:26:04.042] <TB0> INFO: Test took 3742ms.
[11:26:04.331] <TB0> INFO: Expecting 41600 events.
[11:26:07.817] <TB0> INFO: 41600 events read in total (2895ms).
[11:26:07.818] <TB0> INFO: Test took 3752ms.
[11:26:08.106] <TB0> INFO: Expecting 41600 events.
[11:26:11.645] <TB0> INFO: 41600 events read in total (2946ms).
[11:26:11.646] <TB0> INFO: Test took 3805ms.
[11:26:11.934] <TB0> INFO: Expecting 41600 events.
[11:26:15.426] <TB0> INFO: 41600 events read in total (2900ms).
[11:26:15.427] <TB0> INFO: Test took 3757ms.
[11:26:15.716] <TB0> INFO: Expecting 41600 events.
[11:26:19.169] <TB0> INFO: 41600 events read in total (2861ms).
[11:26:19.170] <TB0> INFO: Test took 3719ms.
[11:26:19.502] <TB0> INFO: Expecting 41600 events.
[11:26:22.948] <TB0> INFO: 41600 events read in total (2855ms).
[11:26:22.948] <TB0> INFO: Test took 3750ms.
[11:26:23.237] <TB0> INFO: Expecting 41600 events.
[11:26:26.868] <TB0> INFO: 41600 events read in total (3039ms).
[11:26:26.869] <TB0> INFO: Test took 3896ms.
[11:26:27.159] <TB0> INFO: Expecting 41600 events.
[11:26:30.767] <TB0> INFO: 41600 events read in total (3016ms).
[11:26:30.768] <TB0> INFO: Test took 3873ms.
[11:26:31.056] <TB0> INFO: Expecting 41600 events.
[11:26:34.648] <TB0> INFO: 41600 events read in total (3000ms).
[11:26:34.649] <TB0> INFO: Test took 3857ms.
[11:26:34.938] <TB0> INFO: Expecting 41600 events.
[11:26:38.437] <TB0> INFO: 41600 events read in total (2907ms).
[11:26:38.438] <TB0> INFO: Test took 3765ms.
[11:26:38.733] <TB0> INFO: Expecting 41600 events.
[11:26:42.205] <TB0> INFO: 41600 events read in total (2880ms).
[11:26:42.206] <TB0> INFO: Test took 3744ms.
[11:26:42.494] <TB0> INFO: Expecting 41600 events.
[11:26:45.968] <TB0> INFO: 41600 events read in total (2882ms).
[11:26:45.968] <TB0> INFO: Test took 3739ms.
[11:26:46.259] <TB0> INFO: Expecting 41600 events.
[11:26:49.712] <TB0> INFO: 41600 events read in total (2861ms).
[11:26:49.712] <TB0> INFO: Test took 3717ms.
[11:26:49.000] <TB0> INFO: Expecting 41600 events.
[11:26:53.610] <TB0> INFO: 41600 events read in total (3018ms).
[11:26:53.610] <TB0> INFO: Test took 3874ms.
[11:26:53.898] <TB0> INFO: Expecting 41600 events.
[11:26:57.521] <TB0> INFO: 41600 events read in total (3031ms).
[11:26:57.522] <TB0> INFO: Test took 3888ms.
[11:26:57.810] <TB0> INFO: Expecting 41600 events.
[11:27:01.340] <TB0> INFO: 41600 events read in total (2938ms).
[11:27:01.340] <TB0> INFO: Test took 3794ms.
[11:27:01.629] <TB0> INFO: Expecting 41600 events.
[11:27:05.071] <TB0> INFO: 41600 events read in total (2851ms).
[11:27:05.072] <TB0> INFO: Test took 3708ms.
[11:27:05.361] <TB0> INFO: Expecting 41600 events.
[11:27:08.919] <TB0> INFO: 41600 events read in total (2966ms).
[11:27:08.920] <TB0> INFO: Test took 3823ms.
[11:27:09.211] <TB0> INFO: Expecting 41600 events.
[11:27:12.703] <TB0> INFO: 41600 events read in total (2900ms).
[11:27:12.704] <TB0> INFO: Test took 3757ms.
[11:27:12.992] <TB0> INFO: Expecting 41600 events.
[11:27:16.611] <TB0> INFO: 41600 events read in total (3027ms).
[11:27:16.612] <TB0> INFO: Test took 3885ms.
[11:27:16.900] <TB0> INFO: Expecting 41600 events.
[11:27:20.412] <TB0> INFO: 41600 events read in total (2920ms).
[11:27:20.412] <TB0> INFO: Test took 3776ms.
[11:27:20.711] <TB0> INFO: Expecting 41600 events.
[11:27:24.355] <TB0> INFO: 41600 events read in total (3052ms).
[11:27:24.356] <TB0> INFO: Test took 3920ms.
[11:27:24.671] <TB0> INFO: Expecting 41600 events.
[11:27:28.183] <TB0> INFO: 41600 events read in total (2920ms).
[11:27:28.184] <TB0> INFO: Test took 3802ms.
[11:27:28.474] <TB0> INFO: Expecting 2560 events.
[11:27:29.358] <TB0> INFO: 2560 events read in total (293ms).
[11:27:29.358] <TB0> INFO: Test took 1161ms.
[11:27:29.666] <TB0> INFO: Expecting 2560 events.
[11:27:30.552] <TB0> INFO: 2560 events read in total (295ms).
[11:27:30.552] <TB0> INFO: Test took 1194ms.
[11:27:30.860] <TB0> INFO: Expecting 2560 events.
[11:27:31.743] <TB0> INFO: 2560 events read in total (291ms).
[11:27:31.743] <TB0> INFO: Test took 1190ms.
[11:27:32.051] <TB0> INFO: Expecting 2560 events.
[11:27:32.934] <TB0> INFO: 2560 events read in total (292ms).
[11:27:32.934] <TB0> INFO: Test took 1191ms.
[11:27:33.242] <TB0> INFO: Expecting 2560 events.
[11:27:34.123] <TB0> INFO: 2560 events read in total (289ms).
[11:27:34.123] <TB0> INFO: Test took 1189ms.
[11:27:34.431] <TB0> INFO: Expecting 2560 events.
[11:27:35.308] <TB0> INFO: 2560 events read in total (286ms).
[11:27:35.308] <TB0> INFO: Test took 1185ms.
[11:27:35.616] <TB0> INFO: Expecting 2560 events.
[11:27:36.497] <TB0> INFO: 2560 events read in total (290ms).
[11:27:36.497] <TB0> INFO: Test took 1188ms.
[11:27:36.805] <TB0> INFO: Expecting 2560 events.
[11:27:37.684] <TB0> INFO: 2560 events read in total (287ms).
[11:27:37.684] <TB0> INFO: Test took 1187ms.
[11:27:37.992] <TB0> INFO: Expecting 2560 events.
[11:27:38.870] <TB0> INFO: 2560 events read in total (287ms).
[11:27:38.870] <TB0> INFO: Test took 1184ms.
[11:27:39.178] <TB0> INFO: Expecting 2560 events.
[11:27:40.057] <TB0> INFO: 2560 events read in total (287ms).
[11:27:40.058] <TB0> INFO: Test took 1187ms.
[11:27:40.366] <TB0> INFO: Expecting 2560 events.
[11:27:41.244] <TB0> INFO: 2560 events read in total (287ms).
[11:27:41.244] <TB0> INFO: Test took 1186ms.
[11:27:41.552] <TB0> INFO: Expecting 2560 events.
[11:27:42.430] <TB0> INFO: 2560 events read in total (287ms).
[11:27:42.430] <TB0> INFO: Test took 1186ms.
[11:27:42.738] <TB0> INFO: Expecting 2560 events.
[11:27:43.621] <TB0> INFO: 2560 events read in total (292ms).
[11:27:43.622] <TB0> INFO: Test took 1192ms.
[11:27:43.929] <TB0> INFO: Expecting 2560 events.
[11:27:44.813] <TB0> INFO: 2560 events read in total (292ms).
[11:27:44.813] <TB0> INFO: Test took 1191ms.
[11:27:45.121] <TB0> INFO: Expecting 2560 events.
[11:27:46.004] <TB0> INFO: 2560 events read in total (292ms).
[11:27:46.004] <TB0> INFO: Test took 1191ms.
[11:27:46.312] <TB0> INFO: Expecting 2560 events.
[11:27:47.198] <TB0> INFO: 2560 events read in total (295ms).
[11:27:47.198] <TB0> INFO: Test took 1194ms.
[11:27:47.507] <TB0> INFO: Expecting 655360 events.
[11:28:08.059] <TB0> INFO: 531260 events read in total (19961ms).
[11:28:13.059] <TB0> INFO: 655360 events read in total (24961ms).
[11:28:13.076] <TB0> INFO: Test took 25875ms.
[11:28:13.101] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:28:13.365] <TB0> INFO: Expecting 655360 events.
[11:28:27.858] <TB0> INFO: 655360 events read in total (13901ms).
[11:28:27.872] <TB0> INFO: Expecting 655360 events.
[11:28:41.912] <TB0> INFO: 655360 events read in total (13637ms).
[11:28:41.928] <TB0> INFO: Expecting 655360 events.
[11:28:56.146] <TB0> INFO: 655360 events read in total (13815ms).
[11:28:56.174] <TB0> INFO: Expecting 655360 events.
[11:29:10.365] <TB0> INFO: 655360 events read in total (13788ms).
[11:29:10.397] <TB0> INFO: Expecting 655360 events.
[11:29:24.499] <TB0> INFO: 655360 events read in total (13699ms).
[11:29:24.527] <TB0> INFO: Expecting 655360 events.
[11:29:38.596] <TB0> INFO: 655360 events read in total (13666ms).
[11:29:38.640] <TB0> INFO: Expecting 655360 events.
[11:29:52.898] <TB0> INFO: 655360 events read in total (13855ms).
[11:29:52.942] <TB0> INFO: Expecting 655360 events.
[11:30:07.094] <TB0> INFO: 655360 events read in total (13749ms).
[11:30:07.151] <TB0> INFO: Expecting 655360 events.
[11:30:21.314] <TB0> INFO: 655360 events read in total (13760ms).
[11:30:21.374] <TB0> INFO: Expecting 655360 events.
[11:30:35.669] <TB0> INFO: 655360 events read in total (13892ms).
[11:30:35.757] <TB0> INFO: Expecting 655360 events.
[11:30:49.796] <TB0> INFO: 655360 events read in total (13636ms).
[11:30:49.852] <TB0> INFO: Expecting 655360 events.
[11:31:04.165] <TB0> INFO: 655360 events read in total (13910ms).
[11:31:04.252] <TB0> INFO: Expecting 655360 events.
[11:31:18.396] <TB0> INFO: 655360 events read in total (13741ms).
[11:31:18.503] <TB0> INFO: Expecting 655360 events.
[11:31:32.713] <TB0> INFO: 655360 events read in total (13807ms).
[11:31:32.793] <TB0> INFO: Expecting 655360 events.
[11:31:47.073] <TB0> INFO: 655360 events read in total (13877ms).
[11:31:47.166] <TB0> INFO: Expecting 655360 events.
[11:32:01.362] <TB0> INFO: 655360 events read in total (13793ms).
[11:32:01.485] <TB0> INFO: Test took 228384ms.
[11:32:01.643] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.648] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.652] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.657] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:01.661] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:01.666] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.671] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.675] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:01.680] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:01.685] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:32:01.690] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:32:01.695] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:32:01.700] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:32:01.704] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[11:32:01.709] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[11:32:01.714] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[11:32:01.719] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[11:32:01.726] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[11:32:01.732] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[11:32:01.737] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.742] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.748] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.753] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.760] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.765] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.770] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.775] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.780] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:01.786] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.794] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.800] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:32:01.807] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:32:01.814] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:32:01.821] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:32:01.828] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:32:01.834] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C0.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C1.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C2.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C3.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C4.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C5.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C6.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C7.dat
[11:32:01.868] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C8.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C9.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C10.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C11.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C12.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C13.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C14.dat
[11:32:01.869] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//dacParameters35_C15.dat
[11:32:02.104] <TB0> INFO: Expecting 41600 events.
[11:32:05.182] <TB0> INFO: 41600 events read in total (2487ms).
[11:32:05.183] <TB0> INFO: Test took 3311ms.
[11:32:05.629] <TB0> INFO: Expecting 41600 events.
[11:32:08.672] <TB0> INFO: 41600 events read in total (2452ms).
[11:32:08.672] <TB0> INFO: Test took 3279ms.
[11:32:09.143] <TB0> INFO: Expecting 41600 events.
[11:32:12.269] <TB0> INFO: 41600 events read in total (2535ms).
[11:32:12.270] <TB0> INFO: Test took 3387ms.
[11:32:12.483] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:12.572] <TB0> INFO: Expecting 2560 events.
[11:32:13.454] <TB0> INFO: 2560 events read in total (290ms).
[11:32:13.455] <TB0> INFO: Test took 972ms.
[11:32:13.457] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:13.763] <TB0> INFO: Expecting 2560 events.
[11:32:14.645] <TB0> INFO: 2560 events read in total (290ms).
[11:32:14.645] <TB0> INFO: Test took 1189ms.
[11:32:14.647] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:14.953] <TB0> INFO: Expecting 2560 events.
[11:32:15.837] <TB0> INFO: 2560 events read in total (292ms).
[11:32:15.838] <TB0> INFO: Test took 1191ms.
[11:32:15.839] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:16.145] <TB0> INFO: Expecting 2560 events.
[11:32:17.028] <TB0> INFO: 2560 events read in total (291ms).
[11:32:17.028] <TB0> INFO: Test took 1189ms.
[11:32:17.030] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:17.337] <TB0> INFO: Expecting 2560 events.
[11:32:18.218] <TB0> INFO: 2560 events read in total (290ms).
[11:32:18.219] <TB0> INFO: Test took 1189ms.
[11:32:18.220] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:18.527] <TB0> INFO: Expecting 2560 events.
[11:32:19.409] <TB0> INFO: 2560 events read in total (290ms).
[11:32:19.409] <TB0> INFO: Test took 1189ms.
[11:32:19.410] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:19.717] <TB0> INFO: Expecting 2560 events.
[11:32:20.603] <TB0> INFO: 2560 events read in total (294ms).
[11:32:20.603] <TB0> INFO: Test took 1193ms.
[11:32:20.605] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:20.912] <TB0> INFO: Expecting 2560 events.
[11:32:21.795] <TB0> INFO: 2560 events read in total (292ms).
[11:32:21.796] <TB0> INFO: Test took 1191ms.
[11:32:21.798] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:22.104] <TB0> INFO: Expecting 2560 events.
[11:32:22.985] <TB0> INFO: 2560 events read in total (289ms).
[11:32:22.985] <TB0> INFO: Test took 1188ms.
[11:32:22.987] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:23.294] <TB0> INFO: Expecting 2560 events.
[11:32:24.176] <TB0> INFO: 2560 events read in total (290ms).
[11:32:24.176] <TB0> INFO: Test took 1189ms.
[11:32:24.178] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:24.484] <TB0> INFO: Expecting 2560 events.
[11:32:25.363] <TB0> INFO: 2560 events read in total (287ms).
[11:32:25.363] <TB0> INFO: Test took 1185ms.
[11:32:25.365] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:25.672] <TB0> INFO: Expecting 2560 events.
[11:32:26.549] <TB0> INFO: 2560 events read in total (286ms).
[11:32:26.549] <TB0> INFO: Test took 1184ms.
[11:32:26.551] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:26.858] <TB0> INFO: Expecting 2560 events.
[11:32:27.736] <TB0> INFO: 2560 events read in total (287ms).
[11:32:27.736] <TB0> INFO: Test took 1185ms.
[11:32:27.738] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:28.045] <TB0> INFO: Expecting 2560 events.
[11:32:28.926] <TB0> INFO: 2560 events read in total (290ms).
[11:32:28.926] <TB0> INFO: Test took 1188ms.
[11:32:28.928] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:29.234] <TB0> INFO: Expecting 2560 events.
[11:32:30.115] <TB0> INFO: 2560 events read in total (289ms).
[11:32:30.115] <TB0> INFO: Test took 1187ms.
[11:32:30.117] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:30.424] <TB0> INFO: Expecting 2560 events.
[11:32:31.305] <TB0> INFO: 2560 events read in total (290ms).
[11:32:31.305] <TB0> INFO: Test took 1188ms.
[11:32:31.307] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:31.613] <TB0> INFO: Expecting 2560 events.
[11:32:32.490] <TB0> INFO: 2560 events read in total (285ms).
[11:32:32.490] <TB0> INFO: Test took 1183ms.
[11:32:32.492] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:32.799] <TB0> INFO: Expecting 2560 events.
[11:32:33.676] <TB0> INFO: 2560 events read in total (286ms).
[11:32:33.677] <TB0> INFO: Test took 1185ms.
[11:32:33.679] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:33.985] <TB0> INFO: Expecting 2560 events.
[11:32:34.865] <TB0> INFO: 2560 events read in total (288ms).
[11:32:34.865] <TB0> INFO: Test took 1186ms.
[11:32:34.867] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:35.173] <TB0> INFO: Expecting 2560 events.
[11:32:36.051] <TB0> INFO: 2560 events read in total (286ms).
[11:32:36.051] <TB0> INFO: Test took 1184ms.
[11:32:36.053] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:36.360] <TB0> INFO: Expecting 2560 events.
[11:32:37.239] <TB0> INFO: 2560 events read in total (287ms).
[11:32:37.239] <TB0> INFO: Test took 1186ms.
[11:32:37.241] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:37.547] <TB0> INFO: Expecting 2560 events.
[11:32:38.425] <TB0> INFO: 2560 events read in total (286ms).
[11:32:38.425] <TB0> INFO: Test took 1184ms.
[11:32:38.427] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:38.733] <TB0> INFO: Expecting 2560 events.
[11:32:39.612] <TB0> INFO: 2560 events read in total (287ms).
[11:32:39.613] <TB0> INFO: Test took 1186ms.
[11:32:39.615] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:39.921] <TB0> INFO: Expecting 2560 events.
[11:32:40.803] <TB0> INFO: 2560 events read in total (291ms).
[11:32:40.804] <TB0> INFO: Test took 1189ms.
[11:32:40.806] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:41.112] <TB0> INFO: Expecting 2560 events.
[11:32:41.994] <TB0> INFO: 2560 events read in total (290ms).
[11:32:41.994] <TB0> INFO: Test took 1189ms.
[11:32:41.996] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:42.303] <TB0> INFO: Expecting 2560 events.
[11:32:43.188] <TB0> INFO: 2560 events read in total (293ms).
[11:32:43.188] <TB0> INFO: Test took 1192ms.
[11:32:43.190] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:43.497] <TB0> INFO: Expecting 2560 events.
[11:32:44.379] <TB0> INFO: 2560 events read in total (291ms).
[11:32:44.380] <TB0> INFO: Test took 1190ms.
[11:32:44.382] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:44.688] <TB0> INFO: Expecting 2560 events.
[11:32:45.570] <TB0> INFO: 2560 events read in total (290ms).
[11:32:45.571] <TB0> INFO: Test took 1189ms.
[11:32:45.572] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:45.879] <TB0> INFO: Expecting 2560 events.
[11:32:46.765] <TB0> INFO: 2560 events read in total (295ms).
[11:32:46.765] <TB0> INFO: Test took 1193ms.
[11:32:46.767] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:47.074] <TB0> INFO: Expecting 2560 events.
[11:32:47.958] <TB0> INFO: 2560 events read in total (293ms).
[11:32:47.958] <TB0> INFO: Test took 1191ms.
[11:32:47.960] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:48.267] <TB0> INFO: Expecting 2560 events.
[11:32:49.153] <TB0> INFO: 2560 events read in total (295ms).
[11:32:49.153] <TB0> INFO: Test took 1193ms.
[11:32:49.155] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:32:49.461] <TB0> INFO: Expecting 2560 events.
[11:32:50.347] <TB0> INFO: 2560 events read in total (295ms).
[11:32:50.347] <TB0> INFO: Test took 1192ms.
[11:32:50.812] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 530 seconds
[11:32:50.812] <TB0> INFO: PH scale (per ROC): 50 43 43 42 46 56 41 39 57 41 36 35 50 52 44 41
[11:32:50.812] <TB0> INFO: PH offset (per ROC): 132 86 95 113 112 124 105 95 126 114 119 99 140 131 97 99
[11:32:50.817] <TB0> INFO: Decoding statistics:
[11:32:50.817] <TB0> INFO: General information:
[11:32:50.817] <TB0> INFO: 16bit words read: 127892
[11:32:50.817] <TB0> INFO: valid events total: 20480
[11:32:50.817] <TB0> INFO: empty events: 17974
[11:32:50.817] <TB0> INFO: valid events with pixels: 2506
[11:32:50.817] <TB0> INFO: valid pixel hits: 2506
[11:32:50.817] <TB0> INFO: Event errors: 0
[11:32:50.817] <TB0> INFO: start marker: 0
[11:32:50.817] <TB0> INFO: stop marker: 0
[11:32:50.817] <TB0> INFO: overflow: 0
[11:32:50.817] <TB0> INFO: invalid 5bit words: 0
[11:32:50.817] <TB0> INFO: invalid XOR eye diagram: 0
[11:32:50.817] <TB0> INFO: frame (failed synchr.): 0
[11:32:50.817] <TB0> INFO: idle data (no TBM trl): 0
[11:32:50.817] <TB0> INFO: no data (only TBM hdr): 0
[11:32:50.817] <TB0> INFO: TBM errors: 0
[11:32:50.817] <TB0> INFO: flawed TBM headers: 0
[11:32:50.817] <TB0> INFO: flawed TBM trailers: 0
[11:32:50.817] <TB0> INFO: event ID mismatches: 0
[11:32:50.817] <TB0> INFO: ROC errors: 0
[11:32:50.817] <TB0> INFO: missing ROC header(s): 0
[11:32:50.817] <TB0> INFO: misplaced readback start: 0
[11:32:50.817] <TB0> INFO: Pixel decoding errors: 0
[11:32:50.817] <TB0> INFO: pixel data incomplete: 0
[11:32:50.817] <TB0> INFO: pixel address: 0
[11:32:50.817] <TB0> INFO: pulse height fill bit: 0
[11:32:50.817] <TB0> INFO: buffer corruption: 0
[11:32:51.080] <TB0> INFO: ######################################################################
[11:32:51.080] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:32:51.080] <TB0> INFO: ######################################################################
[11:32:51.092] <TB0> INFO: scanning low vcal = 10
[11:32:51.324] <TB0> INFO: Expecting 41600 events.
[11:32:54.912] <TB0> INFO: 41600 events read in total (2997ms).
[11:32:54.912] <TB0> INFO: Test took 3820ms.
[11:32:54.913] <TB0> INFO: scanning low vcal = 20
[11:32:55.213] <TB0> INFO: Expecting 41600 events.
[11:32:58.771] <TB0> INFO: 41600 events read in total (2966ms).
[11:32:58.771] <TB0> INFO: Test took 3858ms.
[11:32:58.772] <TB0> INFO: scanning low vcal = 30
[11:32:59.072] <TB0> INFO: Expecting 41600 events.
[11:33:02.689] <TB0> INFO: 41600 events read in total (3025ms).
[11:33:02.689] <TB0> INFO: Test took 3917ms.
[11:33:02.692] <TB0> INFO: scanning low vcal = 40
[11:33:02.971] <TB0> INFO: Expecting 41600 events.
[11:33:06.935] <TB0> INFO: 41600 events read in total (3373ms).
[11:33:06.936] <TB0> INFO: Test took 4244ms.
[11:33:06.939] <TB0> INFO: scanning low vcal = 50
[11:33:07.216] <TB0> INFO: Expecting 41600 events.
[11:33:11.147] <TB0> INFO: 41600 events read in total (3339ms).
[11:33:11.148] <TB0> INFO: Test took 4209ms.
[11:33:11.151] <TB0> INFO: scanning low vcal = 60
[11:33:11.427] <TB0> INFO: Expecting 41600 events.
[11:33:15.380] <TB0> INFO: 41600 events read in total (3361ms).
[11:33:15.381] <TB0> INFO: Test took 4230ms.
[11:33:15.383] <TB0> INFO: scanning low vcal = 70
[11:33:15.660] <TB0> INFO: Expecting 41600 events.
[11:33:19.589] <TB0> INFO: 41600 events read in total (3337ms).
[11:33:19.589] <TB0> INFO: Test took 4205ms.
[11:33:19.592] <TB0> INFO: scanning low vcal = 80
[11:33:19.868] <TB0> INFO: Expecting 41600 events.
[11:33:23.833] <TB0> INFO: 41600 events read in total (3373ms).
[11:33:23.833] <TB0> INFO: Test took 4241ms.
[11:33:23.836] <TB0> INFO: scanning low vcal = 90
[11:33:24.113] <TB0> INFO: Expecting 41600 events.
[11:33:28.059] <TB0> INFO: 41600 events read in total (3355ms).
[11:33:28.060] <TB0> INFO: Test took 4224ms.
[11:33:28.062] <TB0> INFO: scanning low vcal = 100
[11:33:28.339] <TB0> INFO: Expecting 41600 events.
[11:33:32.255] <TB0> INFO: 41600 events read in total (3325ms).
[11:33:32.256] <TB0> INFO: Test took 4193ms.
[11:33:32.258] <TB0> INFO: scanning low vcal = 110
[11:33:32.535] <TB0> INFO: Expecting 41600 events.
[11:33:36.474] <TB0> INFO: 41600 events read in total (3347ms).
[11:33:36.475] <TB0> INFO: Test took 4217ms.
[11:33:36.478] <TB0> INFO: scanning low vcal = 120
[11:33:36.755] <TB0> INFO: Expecting 41600 events.
[11:33:40.704] <TB0> INFO: 41600 events read in total (3358ms).
[11:33:40.705] <TB0> INFO: Test took 4227ms.
[11:33:40.707] <TB0> INFO: scanning low vcal = 130
[11:33:40.984] <TB0> INFO: Expecting 41600 events.
[11:33:44.947] <TB0> INFO: 41600 events read in total (3372ms).
[11:33:44.948] <TB0> INFO: Test took 4240ms.
[11:33:44.951] <TB0> INFO: scanning low vcal = 140
[11:33:45.227] <TB0> INFO: Expecting 41600 events.
[11:33:49.153] <TB0> INFO: 41600 events read in total (3334ms).
[11:33:49.154] <TB0> INFO: Test took 4203ms.
[11:33:49.157] <TB0> INFO: scanning low vcal = 150
[11:33:49.433] <TB0> INFO: Expecting 41600 events.
[11:33:53.388] <TB0> INFO: 41600 events read in total (3363ms).
[11:33:53.388] <TB0> INFO: Test took 4231ms.
[11:33:53.391] <TB0> INFO: scanning low vcal = 160
[11:33:53.668] <TB0> INFO: Expecting 41600 events.
[11:33:57.629] <TB0> INFO: 41600 events read in total (3370ms).
[11:33:57.630] <TB0> INFO: Test took 4239ms.
[11:33:57.633] <TB0> INFO: scanning low vcal = 170
[11:33:57.910] <TB0> INFO: Expecting 41600 events.
[11:34:01.860] <TB0> INFO: 41600 events read in total (3359ms).
[11:34:01.861] <TB0> INFO: Test took 4228ms.
[11:34:01.864] <TB0> INFO: scanning low vcal = 180
[11:34:02.140] <TB0> INFO: Expecting 41600 events.
[11:34:06.096] <TB0> INFO: 41600 events read in total (3364ms).
[11:34:06.097] <TB0> INFO: Test took 4233ms.
[11:34:06.100] <TB0> INFO: scanning low vcal = 190
[11:34:06.376] <TB0> INFO: Expecting 41600 events.
[11:34:10.321] <TB0> INFO: 41600 events read in total (3353ms).
[11:34:10.322] <TB0> INFO: Test took 4222ms.
[11:34:10.324] <TB0> INFO: scanning low vcal = 200
[11:34:10.601] <TB0> INFO: Expecting 41600 events.
[11:34:14.590] <TB0> INFO: 41600 events read in total (3398ms).
[11:34:14.590] <TB0> INFO: Test took 4266ms.
[11:34:14.593] <TB0> INFO: scanning low vcal = 210
[11:34:14.869] <TB0> INFO: Expecting 41600 events.
[11:34:18.829] <TB0> INFO: 41600 events read in total (3368ms).
[11:34:18.830] <TB0> INFO: Test took 4237ms.
[11:34:18.833] <TB0> INFO: scanning low vcal = 220
[11:34:19.110] <TB0> INFO: Expecting 41600 events.
[11:34:23.098] <TB0> INFO: 41600 events read in total (3396ms).
[11:34:23.099] <TB0> INFO: Test took 4265ms.
[11:34:23.102] <TB0> INFO: scanning low vcal = 230
[11:34:23.378] <TB0> INFO: Expecting 41600 events.
[11:34:27.327] <TB0> INFO: 41600 events read in total (3357ms).
[11:34:27.328] <TB0> INFO: Test took 4226ms.
[11:34:27.330] <TB0> INFO: scanning low vcal = 240
[11:34:27.607] <TB0> INFO: Expecting 41600 events.
[11:34:31.580] <TB0> INFO: 41600 events read in total (3381ms).
[11:34:31.580] <TB0> INFO: Test took 4250ms.
[11:34:31.582] <TB0> INFO: scanning low vcal = 250
[11:34:31.859] <TB0> INFO: Expecting 41600 events.
[11:34:35.811] <TB0> INFO: 41600 events read in total (3360ms).
[11:34:35.811] <TB0> INFO: Test took 4228ms.
[11:34:35.815] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[11:34:36.091] <TB0> INFO: Expecting 41600 events.
[11:34:40.053] <TB0> INFO: 41600 events read in total (3370ms).
[11:34:40.054] <TB0> INFO: Test took 4239ms.
[11:34:40.057] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[11:34:40.333] <TB0> INFO: Expecting 41600 events.
[11:34:44.264] <TB0> INFO: 41600 events read in total (3339ms).
[11:34:44.264] <TB0> INFO: Test took 4207ms.
[11:34:44.267] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[11:34:44.544] <TB0> INFO: Expecting 41600 events.
[11:34:48.503] <TB0> INFO: 41600 events read in total (3368ms).
[11:34:48.504] <TB0> INFO: Test took 4237ms.
[11:34:48.506] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[11:34:48.783] <TB0> INFO: Expecting 41600 events.
[11:34:52.735] <TB0> INFO: 41600 events read in total (3360ms).
[11:34:52.736] <TB0> INFO: Test took 4229ms.
[11:34:52.738] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:34:53.015] <TB0> INFO: Expecting 41600 events.
[11:34:56.991] <TB0> INFO: 41600 events read in total (3385ms).
[11:34:56.991] <TB0> INFO: Test took 4253ms.
[11:34:57.399] <TB0> INFO: PixTestGainPedestal::measure() done
[11:35:27.893] <TB0> INFO: PixTestGainPedestal::fit() done
[11:35:27.893] <TB0> INFO: non-linearity mean: 0.970 0.920 0.946 0.932 0.934 0.982 0.932 0.940 0.984 0.933 0.900 0.909 0.977 0.979 0.929 0.909
[11:35:27.893] <TB0> INFO: non-linearity RMS: 0.006 0.084 0.020 0.065 0.060 0.003 0.054 0.056 0.003 0.067 0.092 0.121 0.005 0.004 0.134 0.114
[11:35:27.893] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:35:27.913] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:35:27.933] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:35:27.953] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:35:27.973] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:35:27.993] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:35:28.013] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:35:28.033] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:35:28.053] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:35:28.073] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:35:28.093] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:35:28.111] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:35:28.124] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:35:28.138] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:35:28.151] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:35:28.165] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1121_FullQualification_2016-11-03_09h16m_1478161005//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:35:28.179] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 157 seconds
[11:35:28.179] <TB0> INFO: Decoding statistics:
[11:35:28.179] <TB0> INFO: General information:
[11:35:28.179] <TB0> INFO: 16bit words read: 3327914
[11:35:28.179] <TB0> INFO: valid events total: 332800
[11:35:28.179] <TB0> INFO: empty events: 0
[11:35:28.179] <TB0> INFO: valid events with pixels: 332800
[11:35:28.179] <TB0> INFO: valid pixel hits: 665557
[11:35:28.179] <TB0> INFO: Event errors: 0
[11:35:28.179] <TB0> INFO: start marker: 0
[11:35:28.179] <TB0> INFO: stop marker: 0
[11:35:28.179] <TB0> INFO: overflow: 0
[11:35:28.179] <TB0> INFO: invalid 5bit words: 0
[11:35:28.179] <TB0> INFO: invalid XOR eye diagram: 0
[11:35:28.179] <TB0> INFO: frame (failed synchr.): 0
[11:35:28.179] <TB0> INFO: idle data (no TBM trl): 0
[11:35:28.179] <TB0> INFO: no data (only TBM hdr): 0
[11:35:28.179] <TB0> INFO: TBM errors: 0
[11:35:28.179] <TB0> INFO: flawed TBM headers: 0
[11:35:28.179] <TB0> INFO: flawed TBM trailers: 0
[11:35:28.179] <TB0> INFO: event ID mismatches: 0
[11:35:28.179] <TB0> INFO: ROC errors: 0
[11:35:28.179] <TB0> INFO: missing ROC header(s): 0
[11:35:28.179] <TB0> INFO: misplaced readback start: 0
[11:35:28.179] <TB0> INFO: Pixel decoding errors: 0
[11:35:28.179] <TB0> INFO: pixel data incomplete: 0
[11:35:28.179] <TB0> INFO: pixel address: 0
[11:35:28.179] <TB0> INFO: pulse height fill bit: 0
[11:35:28.179] <TB0> INFO: buffer corruption: 0
[11:35:28.195] <TB0> INFO: Decoding statistics:
[11:35:28.195] <TB0> INFO: General information:
[11:35:28.195] <TB0> INFO: 16bit words read: 3457342
[11:35:28.195] <TB0> INFO: valid events total: 353536
[11:35:28.195] <TB0> INFO: empty events: 18230
[11:35:28.195] <TB0> INFO: valid events with pixels: 335306
[11:35:28.195] <TB0> INFO: valid pixel hits: 668063
[11:35:28.195] <TB0> INFO: Event errors: 0
[11:35:28.195] <TB0> INFO: start marker: 0
[11:35:28.195] <TB0> INFO: stop marker: 0
[11:35:28.195] <TB0> INFO: overflow: 0
[11:35:28.195] <TB0> INFO: invalid 5bit words: 0
[11:35:28.195] <TB0> INFO: invalid XOR eye diagram: 0
[11:35:28.195] <TB0> INFO: frame (failed synchr.): 0
[11:35:28.195] <TB0> INFO: idle data (no TBM trl): 0
[11:35:28.195] <TB0> INFO: no data (only TBM hdr): 0
[11:35:28.195] <TB0> INFO: TBM errors: 0
[11:35:28.195] <TB0> INFO: flawed TBM headers: 0
[11:35:28.195] <TB0> INFO: flawed TBM trailers: 0
[11:35:28.195] <TB0> INFO: event ID mismatches: 0
[11:35:28.195] <TB0> INFO: ROC errors: 0
[11:35:28.195] <TB0> INFO: missing ROC header(s): 0
[11:35:28.195] <TB0> INFO: misplaced readback start: 0
[11:35:28.195] <TB0> INFO: Pixel decoding errors: 0
[11:35:28.195] <TB0> INFO: pixel data incomplete: 0
[11:35:28.195] <TB0> INFO: pixel address: 0
[11:35:28.195] <TB0> INFO: pulse height fill bit: 0
[11:35:28.195] <TB0> INFO: buffer corruption: 0
[11:35:28.195] <TB0> INFO: enter test to run
[11:35:28.195] <TB0> INFO: test: exit no parameter change
[11:35:28.248] <TB0> QUIET: Connection to board 73 closed.
[11:35:28.248] <TB0> INFO: pXar: this is the end, my friend