[09:55:38.791] <TB3> INFO: *** Welcome to pxar ***
[09:55:38.791] <TB3> INFO: *** Today: 2016/11/03
[09:55:38.797] <TB3> INFO: *** Version: c8ba-dirty
[09:55:38.797] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C15.dat
[09:55:38.798] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C1b.dat
[09:55:38.798] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//defaultMaskFile.dat
[09:55:38.798] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters_C15.dat
[09:55:38.860] <TB3> INFO: clk: 4
[09:55:38.860] <TB3> INFO: ctr: 4
[09:55:38.860] <TB3> INFO: sda: 19
[09:55:38.860] <TB3> INFO: tin: 9
[09:55:38.860] <TB3> INFO: level: 15
[09:55:38.860] <TB3> INFO: triggerdelay: 0
[09:55:38.861] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[09:55:38.861] <TB3> INFO: Log level: INFO
[09:55:38.869] <TB3> INFO: Found DTB DTB_WWVASW
[09:55:38.877] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[09:55:38.879] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[09:55:38.881] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[09:55:40.373] <TB3> INFO: DUT info:
[09:55:40.373] <TB3> INFO: The DUT currently contains the following objects:
[09:55:40.373] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[09:55:40.373] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:55:40.373] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:55:40.373] <TB3> INFO: TBM Core alpha (2): 7 registers set
[09:55:40.373] <TB3> INFO: TBM Core beta (3): 7 registers set
[09:55:40.373] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[09:55:40.373] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.373] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:55:40.774] <TB3> INFO: enter 'restricted' command line mode
[09:55:40.774] <TB3> INFO: enter test to run
[09:55:40.774] <TB3> INFO: test: pretest no parameter change
[09:55:40.774] <TB3> INFO: running: pretest
[09:55:40.780] <TB3> INFO: ######################################################################
[09:55:40.780] <TB3> INFO: PixTestPretest::doTest()
[09:55:40.780] <TB3> INFO: ######################################################################
[09:55:40.781] <TB3> INFO: ----------------------------------------------------------------------
[09:55:40.781] <TB3> INFO: PixTestPretest::programROC()
[09:55:40.781] <TB3> INFO: ----------------------------------------------------------------------
[09:55:58.794] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:55:58.795] <TB3> INFO: IA differences per ROC: 16.9 20.1 16.9 16.9 20.1 20.1 20.9 20.9 19.3 19.3 20.9 20.9 18.5 16.9 19.3 20.9
[09:55:58.851] <TB3> INFO: ----------------------------------------------------------------------
[09:55:58.851] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:55:58.851] <TB3> INFO: ----------------------------------------------------------------------
[09:56:20.105] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 390.7 mA = 24.4187 mA/ROC
[09:56:20.105] <TB3> INFO: i(loss) [mA/ROC]: 20.9 20.1 20.1 20.1 20.1 21.7 19.3 20.1 20.9 19.3 20.1 20.1 19.3 19.3 23.3 19.3
[09:56:20.135] <TB3> INFO: ----------------------------------------------------------------------
[09:56:20.135] <TB3> INFO: PixTestPretest::findTiming()
[09:56:20.135] <TB3> INFO: ----------------------------------------------------------------------
[09:56:20.135] <TB3> INFO: PixTestCmd::init()

[09:56:51.552] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[09:56:51.552] <TB3> INFO: (success/tries = 100/100), width = 4
[09:56:53.053] <TB3> INFO: ----------------------------------------------------------------------
[09:56:53.053] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:56:53.053] <TB3> INFO: ----------------------------------------------------------------------
[09:56:53.145] <TB3> INFO: Expecting 231680 events.
[09:57:02.887] <TB3> INFO: 231680 events read in total (9150ms).
[09:57:02.903] <TB3> INFO: Test took 9847ms.
[09:57:03.141] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:57:03.170] <TB3> INFO: ----------------------------------------------------------------------
[09:57:03.170] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:57:03.170] <TB3> INFO: ----------------------------------------------------------------------
[09:57:03.262] <TB3> INFO: Expecting 231680 events.
[09:57:12.939] <TB3> INFO: 231680 events read in total (9086ms).
[09:57:12.950] <TB3> INFO: Test took 9776ms.
[09:57:13.204] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:57:13.204] <TB3> INFO: CalDel: 93 108 91 82 111 99 82 94 94 102 81 101 96 84 92 100
[09:57:13.204] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:57:13.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C0.dat
[09:57:13.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C1.dat
[09:57:13.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C2.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C3.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C4.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C5.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C6.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C7.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C8.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C9.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C10.dat
[09:57:13.208] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C11.dat
[09:57:13.209] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C12.dat
[09:57:13.209] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C13.dat
[09:57:13.209] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C14.dat
[09:57:13.209] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters_C15.dat
[09:57:13.209] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C0a.dat
[09:57:13.209] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C0b.dat
[09:57:13.209] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C1a.dat
[09:57:13.209] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//tbmParameters_C1b.dat
[09:57:13.209] <TB3> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[09:57:13.266] <TB3> INFO: enter test to run
[09:57:13.266] <TB3> INFO: test: FullTest no parameter change
[09:57:13.266] <TB3> INFO: running: fulltest
[09:57:13.266] <TB3> INFO: ######################################################################
[09:57:13.266] <TB3> INFO: PixTestFullTest::doTest()
[09:57:13.266] <TB3> INFO: ######################################################################
[09:57:13.267] <TB3> INFO: ######################################################################
[09:57:13.267] <TB3> INFO: PixTestAlive::doTest()
[09:57:13.267] <TB3> INFO: ######################################################################
[09:57:13.268] <TB3> INFO: ----------------------------------------------------------------------
[09:57:13.268] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:57:13.268] <TB3> INFO: ----------------------------------------------------------------------
[09:57:13.509] <TB3> INFO: Expecting 41600 events.
[09:57:17.119] <TB3> INFO: 41600 events read in total (3018ms).
[09:57:17.120] <TB3> INFO: Test took 3850ms.
[09:57:17.347] <TB3> INFO: PixTestAlive::aliveTest() done
[09:57:17.347] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 1
[09:57:17.348] <TB3> INFO: ----------------------------------------------------------------------
[09:57:17.349] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:57:17.349] <TB3> INFO: ----------------------------------------------------------------------
[09:57:17.595] <TB3> INFO: Expecting 41600 events.
[09:57:20.543] <TB3> INFO: 41600 events read in total (2357ms).
[09:57:20.544] <TB3> INFO: Test took 3194ms.
[09:57:20.544] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:57:20.784] <TB3> INFO: PixTestAlive::maskTest() done
[09:57:20.784] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:57:20.785] <TB3> INFO: ----------------------------------------------------------------------
[09:57:20.785] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:57:20.785] <TB3> INFO: ----------------------------------------------------------------------
[09:57:21.027] <TB3> INFO: Expecting 41600 events.
[09:57:24.468] <TB3> INFO: 41600 events read in total (2850ms).
[09:57:24.468] <TB3> INFO: Test took 3681ms.
[09:57:24.701] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:57:24.701] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:57:24.701] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[09:57:24.701] <TB3> INFO: Decoding statistics:
[09:57:24.701] <TB3> INFO: General information:
[09:57:24.701] <TB3> INFO: 16bit words read: 0
[09:57:24.701] <TB3> INFO: valid events total: 0
[09:57:24.701] <TB3> INFO: empty events: 0
[09:57:24.701] <TB3> INFO: valid events with pixels: 0
[09:57:24.701] <TB3> INFO: valid pixel hits: 0
[09:57:24.701] <TB3> INFO: Event errors: 0
[09:57:24.701] <TB3> INFO: start marker: 0
[09:57:24.701] <TB3> INFO: stop marker: 0
[09:57:24.702] <TB3> INFO: overflow: 0
[09:57:24.702] <TB3> INFO: invalid 5bit words: 0
[09:57:24.702] <TB3> INFO: invalid XOR eye diagram: 0
[09:57:24.702] <TB3> INFO: frame (failed synchr.): 0
[09:57:24.702] <TB3> INFO: idle data (no TBM trl): 0
[09:57:24.702] <TB3> INFO: no data (only TBM hdr): 0
[09:57:24.702] <TB3> INFO: TBM errors: 0
[09:57:24.702] <TB3> INFO: flawed TBM headers: 0
[09:57:24.702] <TB3> INFO: flawed TBM trailers: 0
[09:57:24.702] <TB3> INFO: event ID mismatches: 0
[09:57:24.702] <TB3> INFO: ROC errors: 0
[09:57:24.702] <TB3> INFO: missing ROC header(s): 0
[09:57:24.702] <TB3> INFO: misplaced readback start: 0
[09:57:24.702] <TB3> INFO: Pixel decoding errors: 0
[09:57:24.702] <TB3> INFO: pixel data incomplete: 0
[09:57:24.702] <TB3> INFO: pixel address: 0
[09:57:24.702] <TB3> INFO: pulse height fill bit: 0
[09:57:24.702] <TB3> INFO: buffer corruption: 0
[09:57:24.708] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C15.dat
[09:57:24.708] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[09:57:24.708] <TB3> INFO: ######################################################################
[09:57:24.708] <TB3> INFO: PixTestReadback::doTest()
[09:57:24.708] <TB3> INFO: ######################################################################
[09:57:24.708] <TB3> INFO: ----------------------------------------------------------------------
[09:57:24.708] <TB3> INFO: PixTestReadback::CalibrateVd()
[09:57:24.708] <TB3> INFO: ----------------------------------------------------------------------
[09:57:34.630] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C0.dat
[09:57:34.630] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C1.dat
[09:57:34.630] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C2.dat
[09:57:34.630] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C3.dat
[09:57:34.630] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C4.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C5.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C6.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C7.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C8.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C9.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C10.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C11.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C12.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C13.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C14.dat
[09:57:34.631] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C15.dat
[09:57:34.660] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:57:34.660] <TB3> INFO: ----------------------------------------------------------------------
[09:57:34.660] <TB3> INFO: PixTestReadback::CalibrateVa()
[09:57:34.660] <TB3> INFO: ----------------------------------------------------------------------
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C0.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C1.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C2.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C3.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C4.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C5.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C6.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C7.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C8.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C9.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C10.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C11.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C12.dat
[09:57:44.553] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C13.dat
[09:57:44.554] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C14.dat
[09:57:44.554] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C15.dat
[09:57:44.582] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:57:44.582] <TB3> INFO: ----------------------------------------------------------------------
[09:57:44.582] <TB3> INFO: PixTestReadback::readbackVbg()
[09:57:44.582] <TB3> INFO: ----------------------------------------------------------------------
[09:57:52.226] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[09:57:52.227] <TB3> INFO: ----------------------------------------------------------------------
[09:57:52.227] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[09:57:52.227] <TB3> INFO: ----------------------------------------------------------------------
[09:57:52.227] <TB3> INFO: Vbg will be calibrated using Vd calibration
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.6calibrated Vbg = 1.20122 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.1calibrated Vbg = 1.20056 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 148.9calibrated Vbg = 1.1927 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.3calibrated Vbg = 1.18644 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.4calibrated Vbg = 1.1952 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 151.2calibrated Vbg = 1.20334 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 162calibrated Vbg = 1.19635 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.1calibrated Vbg = 1.19705 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 163.5calibrated Vbg = 1.19856 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 157.1calibrated Vbg = 1.19706 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.6calibrated Vbg = 1.18412 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154calibrated Vbg = 1.18984 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 147.4calibrated Vbg = 1.18997 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.8calibrated Vbg = 1.18895 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 164.1calibrated Vbg = 1.19881 :::*/*/*/*/
[09:57:52.227] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 162calibrated Vbg = 1.19919 :::*/*/*/*/
[09:57:52.229] <TB3> INFO: ----------------------------------------------------------------------
[09:57:52.229] <TB3> INFO: PixTestReadback::CalibrateIa()
[09:57:52.229] <TB3> INFO: ----------------------------------------------------------------------
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C0.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C1.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C2.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C3.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C4.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C5.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C6.dat
[10:00:32.625] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C7.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C8.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C9.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C10.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C11.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C12.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C13.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C14.dat
[10:00:32.626] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//readbackCal_C15.dat
[10:00:32.653] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:00:32.654] <TB3> INFO: PixTestReadback::doTest() done
[10:00:32.654] <TB3> INFO: Decoding statistics:
[10:00:32.654] <TB3> INFO: General information:
[10:00:32.654] <TB3> INFO: 16bit words read: 1536
[10:00:32.654] <TB3> INFO: valid events total: 256
[10:00:32.654] <TB3> INFO: empty events: 256
[10:00:32.654] <TB3> INFO: valid events with pixels: 0
[10:00:32.654] <TB3> INFO: valid pixel hits: 0
[10:00:32.654] <TB3> INFO: Event errors: 0
[10:00:32.654] <TB3> INFO: start marker: 0
[10:00:32.654] <TB3> INFO: stop marker: 0
[10:00:32.654] <TB3> INFO: overflow: 0
[10:00:32.654] <TB3> INFO: invalid 5bit words: 0
[10:00:32.654] <TB3> INFO: invalid XOR eye diagram: 0
[10:00:32.654] <TB3> INFO: frame (failed synchr.): 0
[10:00:32.654] <TB3> INFO: idle data (no TBM trl): 0
[10:00:32.654] <TB3> INFO: no data (only TBM hdr): 0
[10:00:32.654] <TB3> INFO: TBM errors: 0
[10:00:32.654] <TB3> INFO: flawed TBM headers: 0
[10:00:32.654] <TB3> INFO: flawed TBM trailers: 0
[10:00:32.654] <TB3> INFO: event ID mismatches: 0
[10:00:32.654] <TB3> INFO: ROC errors: 0
[10:00:32.654] <TB3> INFO: missing ROC header(s): 0
[10:00:32.654] <TB3> INFO: misplaced readback start: 0
[10:00:32.654] <TB3> INFO: Pixel decoding errors: 0
[10:00:32.654] <TB3> INFO: pixel data incomplete: 0
[10:00:32.654] <TB3> INFO: pixel address: 0
[10:00:32.654] <TB3> INFO: pulse height fill bit: 0
[10:00:32.655] <TB3> INFO: buffer corruption: 0
[10:00:32.710] <TB3> INFO: ######################################################################
[10:00:32.710] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:00:32.710] <TB3> INFO: ######################################################################
[10:00:32.713] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:00:32.762] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:00:32.762] <TB3> INFO: run 1 of 1
[10:00:33.059] <TB3> INFO: Expecting 3120000 events.
[10:01:04.194] <TB3> INFO: 661050 events read in total (30544ms).











[10:01:34.753] <TB3> INFO: 1318975 events read in total (61104ms).











[10:02:05.010] <TB3> INFO: 1973845 events read in total (91360ms).











[10:02:35.739] <TB3> INFO: 2628710 events read in total (122089ms).











[10:02:59.404] <TB3> INFO: 3120000 events read in total (145754ms).
[10:02:59.494] <TB3> INFO: Test took 146718ms.
[10:03:26.249] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 173 seconds
[10:03:26.249] <TB3> INFO: number of dead bumps (per ROC): 1 0 2 0 1 0 0 1 2 1 0 0 1 6 1 29
[10:03:26.249] <TB3> INFO: separation cut (per ROC): 104 99 106 101 101 113 110 109 104 121 121 108 88 106 123 96
[10:03:26.249] <TB3> INFO: Decoding statistics:
[10:03:26.249] <TB3> INFO: General information:
[10:03:26.249] <TB3> INFO: 16bit words read: 0
[10:03:26.249] <TB3> INFO: valid events total: 0
[10:03:26.249] <TB3> INFO: empty events: 0
[10:03:26.249] <TB3> INFO: valid events with pixels: 0
[10:03:26.249] <TB3> INFO: valid pixel hits: 0
[10:03:26.249] <TB3> INFO: Event errors: 0
[10:03:26.249] <TB3> INFO: start marker: 0
[10:03:26.249] <TB3> INFO: stop marker: 0
[10:03:26.249] <TB3> INFO: overflow: 0
[10:03:26.249] <TB3> INFO: invalid 5bit words: 0
[10:03:26.249] <TB3> INFO: invalid XOR eye diagram: 0
[10:03:26.249] <TB3> INFO: frame (failed synchr.): 0
[10:03:26.249] <TB3> INFO: idle data (no TBM trl): 0
[10:03:26.249] <TB3> INFO: no data (only TBM hdr): 0
[10:03:26.249] <TB3> INFO: TBM errors: 0
[10:03:26.249] <TB3> INFO: flawed TBM headers: 0
[10:03:26.249] <TB3> INFO: flawed TBM trailers: 0
[10:03:26.249] <TB3> INFO: event ID mismatches: 0
[10:03:26.249] <TB3> INFO: ROC errors: 0
[10:03:26.249] <TB3> INFO: missing ROC header(s): 0
[10:03:26.249] <TB3> INFO: misplaced readback start: 0
[10:03:26.249] <TB3> INFO: Pixel decoding errors: 0
[10:03:26.249] <TB3> INFO: pixel data incomplete: 0
[10:03:26.249] <TB3> INFO: pixel address: 0
[10:03:26.249] <TB3> INFO: pulse height fill bit: 0
[10:03:26.249] <TB3> INFO: buffer corruption: 0
[10:03:26.292] <TB3> INFO: ######################################################################
[10:03:26.292] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:03:26.292] <TB3> INFO: ######################################################################
[10:03:26.292] <TB3> INFO: ----------------------------------------------------------------------
[10:03:26.292] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:03:26.293] <TB3> INFO: ----------------------------------------------------------------------
[10:03:26.293] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:03:26.307] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[10:03:26.307] <TB3> INFO: run 1 of 1
[10:03:26.577] <TB3> INFO: Expecting 36608000 events.
[10:03:50.781] <TB3> INFO: 670400 events read in total (23613ms).
[10:04:14.042] <TB3> INFO: 1329200 events read in total (46874ms).
[10:04:37.232] <TB3> INFO: 1985900 events read in total (70064ms).
[10:05:00.402] <TB3> INFO: 2643100 events read in total (93234ms).
[10:05:23.922] <TB3> INFO: 3298550 events read in total (116754ms).
[10:05:47.346] <TB3> INFO: 3955700 events read in total (140178ms).
[10:06:10.388] <TB3> INFO: 4610850 events read in total (163220ms).
[10:06:33.671] <TB3> INFO: 5268400 events read in total (186503ms).
[10:06:56.815] <TB3> INFO: 5923600 events read in total (209647ms).
[10:07:20.396] <TB3> INFO: 6579400 events read in total (233228ms).
[10:07:43.715] <TB3> INFO: 7233550 events read in total (256547ms).
[10:08:06.742] <TB3> INFO: 7888750 events read in total (279574ms).
[10:08:30.833] <TB3> INFO: 8542450 events read in total (303665ms).
[10:08:54.040] <TB3> INFO: 9197850 events read in total (326872ms).
[10:09:17.749] <TB3> INFO: 9853500 events read in total (350581ms).
[10:09:40.907] <TB3> INFO: 10507850 events read in total (373739ms).
[10:10:04.290] <TB3> INFO: 11163450 events read in total (397122ms).
[10:10:27.673] <TB3> INFO: 11816050 events read in total (420505ms).
[10:10:51.093] <TB3> INFO: 12467400 events read in total (443925ms).
[10:11:14.562] <TB3> INFO: 13121150 events read in total (467394ms).
[10:11:38.299] <TB3> INFO: 13774750 events read in total (491131ms).
[10:12:01.528] <TB3> INFO: 14427500 events read in total (514360ms).
[10:12:25.297] <TB3> INFO: 15078600 events read in total (538129ms).
[10:12:49.187] <TB3> INFO: 15731150 events read in total (562019ms).
[10:13:12.508] <TB3> INFO: 16382700 events read in total (585340ms).
[10:13:36.199] <TB3> INFO: 17034200 events read in total (609031ms).
[10:13:59.572] <TB3> INFO: 17686350 events read in total (632404ms).
[10:14:23.653] <TB3> INFO: 18338100 events read in total (656485ms).
[10:14:47.259] <TB3> INFO: 18987450 events read in total (680091ms).
[10:15:11.035] <TB3> INFO: 19636350 events read in total (703867ms).
[10:15:34.515] <TB3> INFO: 20285700 events read in total (727347ms).
[10:15:57.993] <TB3> INFO: 20935200 events read in total (750825ms).
[10:16:21.169] <TB3> INFO: 21583550 events read in total (774002ms).
[10:16:45.125] <TB3> INFO: 22231250 events read in total (797957ms).
[10:17:09.026] <TB3> INFO: 22878700 events read in total (821858ms).
[10:17:32.592] <TB3> INFO: 23526350 events read in total (845424ms).
[10:17:55.863] <TB3> INFO: 24175700 events read in total (868695ms).
[10:18:19.306] <TB3> INFO: 24823200 events read in total (892138ms).
[10:18:42.682] <TB3> INFO: 25472500 events read in total (915514ms).
[10:19:06.232] <TB3> INFO: 26117800 events read in total (939064ms).
[10:19:29.625] <TB3> INFO: 26764750 events read in total (962457ms).
[10:19:53.145] <TB3> INFO: 27412750 events read in total (985977ms).
[10:20:16.627] <TB3> INFO: 28061250 events read in total (1009459ms).
[10:20:39.842] <TB3> INFO: 28709650 events read in total (1032674ms).
[10:21:03.472] <TB3> INFO: 29356350 events read in total (1056304ms).
[10:21:27.184] <TB3> INFO: 30003200 events read in total (1080016ms).
[10:21:50.625] <TB3> INFO: 30648750 events read in total (1103457ms).
[10:22:13.840] <TB3> INFO: 31294300 events read in total (1126672ms).
[10:22:37.688] <TB3> INFO: 31939250 events read in total (1150520ms).
[10:23:01.163] <TB3> INFO: 32583750 events read in total (1173995ms).
[10:23:24.890] <TB3> INFO: 33231650 events read in total (1197722ms).
[10:23:48.297] <TB3> INFO: 33879050 events read in total (1221129ms).
[10:24:11.643] <TB3> INFO: 34527800 events read in total (1244475ms).
[10:24:35.281] <TB3> INFO: 35174800 events read in total (1268113ms).
[10:24:59.688] <TB3> INFO: 35824350 events read in total (1292520ms).
[10:25:24.943] <TB3> INFO: 36482700 events read in total (1317775ms).
[10:25:29.694] <TB3> INFO: 36608000 events read in total (1322526ms).
[10:25:29.820] <TB3> INFO: Test took 1323513ms.
[10:25:30.387] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:32.919] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:35.119] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:37.096] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:39.012] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:40.876] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:42.725] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:44.837] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:47.116] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:49.352] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:51.297] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:53.428] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:55.503] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:57.373] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:25:59.378] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:26:00.850] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[10:26:02.428] <TB3> INFO: PixTestScurves::scurves() done
[10:26:02.428] <TB3> INFO: Vcal mean: 110.53 99.91 107.69 110.71 110.53 122.07 117.21 115.15 107.07 108.02 121.40 111.95 111.96 108.94 119.90 107.07
[10:26:02.428] <TB3> INFO: Vcal RMS: 5.43 4.86 4.90 5.38 5.51 6.79 5.24 5.85 5.69 5.49 6.31 5.48 4.78 4.85 5.45 5.67
[10:26:02.428] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1356 seconds
[10:26:02.428] <TB3> INFO: Decoding statistics:
[10:26:02.428] <TB3> INFO: General information:
[10:26:02.428] <TB3> INFO: 16bit words read: 0
[10:26:02.428] <TB3> INFO: valid events total: 0
[10:26:02.428] <TB3> INFO: empty events: 0
[10:26:02.428] <TB3> INFO: valid events with pixels: 0
[10:26:02.428] <TB3> INFO: valid pixel hits: 0
[10:26:02.428] <TB3> INFO: Event errors: 0
[10:26:02.428] <TB3> INFO: start marker: 0
[10:26:02.428] <TB3> INFO: stop marker: 0
[10:26:02.429] <TB3> INFO: overflow: 0
[10:26:02.429] <TB3> INFO: invalid 5bit words: 0
[10:26:02.429] <TB3> INFO: invalid XOR eye diagram: 0
[10:26:02.429] <TB3> INFO: frame (failed synchr.): 0
[10:26:02.429] <TB3> INFO: idle data (no TBM trl): 0
[10:26:02.429] <TB3> INFO: no data (only TBM hdr): 0
[10:26:02.429] <TB3> INFO: TBM errors: 0
[10:26:02.429] <TB3> INFO: flawed TBM headers: 0
[10:26:02.429] <TB3> INFO: flawed TBM trailers: 0
[10:26:02.429] <TB3> INFO: event ID mismatches: 0
[10:26:02.429] <TB3> INFO: ROC errors: 0
[10:26:02.429] <TB3> INFO: missing ROC header(s): 0
[10:26:02.429] <TB3> INFO: misplaced readback start: 0
[10:26:02.429] <TB3> INFO: Pixel decoding errors: 0
[10:26:02.429] <TB3> INFO: pixel data incomplete: 0
[10:26:02.429] <TB3> INFO: pixel address: 0
[10:26:02.429] <TB3> INFO: pulse height fill bit: 0
[10:26:02.429] <TB3> INFO: buffer corruption: 0
[10:26:02.517] <TB3> INFO: ######################################################################
[10:26:02.517] <TB3> INFO: PixTestTrim::doTest()
[10:26:02.517] <TB3> INFO: ######################################################################
[10:26:02.518] <TB3> INFO: ----------------------------------------------------------------------
[10:26:02.518] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:26:02.518] <TB3> INFO: ----------------------------------------------------------------------
[10:26:02.561] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:26:02.561] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:26:02.576] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:26:02.576] <TB3> INFO: run 1 of 1
[10:26:02.813] <TB3> INFO: Expecting 5025280 events.
[10:26:34.106] <TB3> INFO: 816848 events read in total (30687ms).
[10:27:04.003] <TB3> INFO: 1629928 events read in total (61584ms).
[10:27:35.659] <TB3> INFO: 2440376 events read in total (92240ms).
[10:28:06.230] <TB3> INFO: 3248824 events read in total (122811ms).
[10:28:37.327] <TB3> INFO: 4055136 events read in total (153908ms).
[10:29:09.394] <TB3> INFO: 4860824 events read in total (185975ms).
[10:29:15.868] <TB3> INFO: 5025280 events read in total (192449ms).
[10:29:15.935] <TB3> INFO: Test took 193358ms.
[10:29:37.004] <TB3> INFO: ROC 0 VthrComp = 116
[10:29:37.004] <TB3> INFO: ROC 1 VthrComp = 106
[10:29:37.004] <TB3> INFO: ROC 2 VthrComp = 114
[10:29:37.004] <TB3> INFO: ROC 3 VthrComp = 113
[10:29:37.004] <TB3> INFO: ROC 4 VthrComp = 109
[10:29:37.005] <TB3> INFO: ROC 5 VthrComp = 126
[10:29:37.005] <TB3> INFO: ROC 6 VthrComp = 129
[10:29:37.005] <TB3> INFO: ROC 7 VthrComp = 119
[10:29:37.005] <TB3> INFO: ROC 8 VthrComp = 113
[10:29:37.005] <TB3> INFO: ROC 9 VthrComp = 109
[10:29:37.005] <TB3> INFO: ROC 10 VthrComp = 133
[10:29:37.006] <TB3> INFO: ROC 11 VthrComp = 118
[10:29:37.006] <TB3> INFO: ROC 12 VthrComp = 112
[10:29:37.006] <TB3> INFO: ROC 13 VthrComp = 116
[10:29:37.007] <TB3> INFO: ROC 14 VthrComp = 132
[10:29:37.007] <TB3> INFO: ROC 15 VthrComp = 115
[10:29:37.248] <TB3> INFO: Expecting 41600 events.
[10:29:40.765] <TB3> INFO: 41600 events read in total (2925ms).
[10:29:40.766] <TB3> INFO: Test took 3757ms.
[10:29:40.777] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:29:40.777] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:29:40.790] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:29:40.790] <TB3> INFO: run 1 of 1
[10:29:41.097] <TB3> INFO: Expecting 5025280 events.
[10:30:08.179] <TB3> INFO: 591224 events read in total (26490ms).
[10:30:34.444] <TB3> INFO: 1180880 events read in total (52755ms).
[10:31:01.225] <TB3> INFO: 1770704 events read in total (79536ms).
[10:31:27.801] <TB3> INFO: 2359568 events read in total (106112ms).
[10:31:54.743] <TB3> INFO: 2946016 events read in total (133054ms).
[10:32:20.894] <TB3> INFO: 3531152 events read in total (159205ms).
[10:32:47.023] <TB3> INFO: 4115608 events read in total (185334ms).
[10:33:14.373] <TB3> INFO: 4699000 events read in total (212684ms).
[10:33:29.742] <TB3> INFO: 5025280 events read in total (228053ms).
[10:33:29.844] <TB3> INFO: Test took 229055ms.
[10:33:58.126] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.6768 for pixel 3/1 mean/min/max = 46.114/31.4174/60.8106
[10:33:58.126] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.9533 for pixel 50/3 mean/min/max = 46.158/34.2413/58.0746
[10:33:58.127] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.7607 for pixel 4/71 mean/min/max = 45.7458/32.5592/58.9324
[10:33:58.128] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.1337 for pixel 14/11 mean/min/max = 46.07/32.9591/59.181
[10:33:58.128] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 64.1516 for pixel 5/77 mean/min/max = 48.8979/33.5125/64.2833
[10:33:58.129] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 62.5639 for pixel 0/41 mean/min/max = 47.3626/32.0627/62.6626
[10:33:58.130] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.9441 for pixel 21/1 mean/min/max = 44.9478/31.8872/58.0085
[10:33:58.130] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.6298 for pixel 15/73 mean/min/max = 45.7193/30.7823/60.6563
[10:33:58.131] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.0584 for pixel 4/13 mean/min/max = 46.002/31.9041/60.0998
[10:33:58.131] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 64.2569 for pixel 22/13 mean/min/max = 48.6522/32.8496/64.4549
[10:33:58.132] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 58.0387 for pixel 51/6 mean/min/max = 45.5497/32.9993/58.1001
[10:33:58.132] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.9466 for pixel 2/68 mean/min/max = 45.4692/30.9161/60.0222
[10:33:58.133] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.4541 for pixel 18/77 mean/min/max = 46.4564/33.4198/59.493
[10:33:58.133] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.2204 for pixel 22/51 mean/min/max = 45.2551/32.0267/58.4835
[10:33:58.133] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.4352 for pixel 2/6 mean/min/max = 48.0861/36.7216/59.4507
[10:33:58.134] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6598 for pixel 2/77 mean/min/max = 45.4062/31.3895/59.423
[10:33:58.134] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:33:58.223] <TB3> INFO: Expecting 411648 events.
[10:34:07.652] <TB3> INFO: 411648 events read in total (8837ms).
[10:34:07.660] <TB3> INFO: Expecting 411648 events.
[10:34:16.878] <TB3> INFO: 411648 events read in total (8815ms).
[10:34:16.890] <TB3> INFO: Expecting 411648 events.
[10:34:26.026] <TB3> INFO: 411648 events read in total (8734ms).
[10:34:26.042] <TB3> INFO: Expecting 411648 events.
[10:34:35.186] <TB3> INFO: 411648 events read in total (8741ms).
[10:34:35.203] <TB3> INFO: Expecting 411648 events.
[10:34:44.429] <TB3> INFO: 411648 events read in total (8823ms).
[10:34:44.448] <TB3> INFO: Expecting 411648 events.
[10:34:53.816] <TB3> INFO: 411648 events read in total (8965ms).
[10:34:53.838] <TB3> INFO: Expecting 411648 events.
[10:35:02.988] <TB3> INFO: 411648 events read in total (8747ms).
[10:35:03.021] <TB3> INFO: Expecting 411648 events.
[10:35:12.308] <TB3> INFO: 411648 events read in total (8884ms).
[10:35:12.335] <TB3> INFO: Expecting 411648 events.
[10:35:21.502] <TB3> INFO: 411648 events read in total (8764ms).
[10:35:21.533] <TB3> INFO: Expecting 411648 events.
[10:35:30.849] <TB3> INFO: 411648 events read in total (8913ms).
[10:35:30.903] <TB3> INFO: Expecting 411648 events.
[10:35:40.035] <TB3> INFO: 411648 events read in total (8728ms).
[10:35:40.129] <TB3> INFO: Expecting 411648 events.
[10:35:49.364] <TB3> INFO: 411648 events read in total (8831ms).
[10:35:49.415] <TB3> INFO: Expecting 411648 events.
[10:35:58.656] <TB3> INFO: 411648 events read in total (8838ms).
[10:35:58.710] <TB3> INFO: Expecting 411648 events.
[10:36:07.979] <TB3> INFO: 411648 events read in total (8866ms).
[10:36:08.044] <TB3> INFO: Expecting 411648 events.
[10:36:17.397] <TB3> INFO: 411648 events read in total (8950ms).
[10:36:17.462] <TB3> INFO: Expecting 411648 events.
[10:36:26.662] <TB3> INFO: 411648 events read in total (8796ms).
[10:36:26.730] <TB3> INFO: Test took 148596ms.
[10:36:27.619] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:36:27.633] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:36:27.633] <TB3> INFO: run 1 of 1
[10:36:27.886] <TB3> INFO: Expecting 5025280 events.
[10:36:54.896] <TB3> INFO: 586440 events read in total (26417ms).
[10:37:21.447] <TB3> INFO: 1171912 events read in total (52969ms).
[10:37:48.138] <TB3> INFO: 1756448 events read in total (79660ms).
[10:38:14.657] <TB3> INFO: 2341296 events read in total (106178ms).
[10:38:41.714] <TB3> INFO: 2923632 events read in total (133235ms).
[10:39:08.689] <TB3> INFO: 3507272 events read in total (160210ms).
[10:39:35.729] <TB3> INFO: 4091272 events read in total (187250ms).
[10:40:03.546] <TB3> INFO: 4675280 events read in total (215067ms).
[10:40:21.241] <TB3> INFO: 5025280 events read in total (232762ms).
[10:40:21.403] <TB3> INFO: Test took 233772ms.
[10:40:47.840] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.625251 .. 142.116461
[10:40:48.147] <TB3> INFO: Expecting 208000 events.
[10:40:58.178] <TB3> INFO: 208000 events read in total (9439ms).
[10:40:58.179] <TB3> INFO: Test took 10337ms.
[10:40:58.227] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 152 (-1/-1) hits flags = 528 (plus default)
[10:40:58.240] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:40:58.240] <TB3> INFO: run 1 of 1
[10:40:58.518] <TB3> INFO: Expecting 5058560 events.
[10:41:25.322] <TB3> INFO: 585560 events read in total (26212ms).
[10:41:51.975] <TB3> INFO: 1171104 events read in total (52865ms).
[10:42:18.970] <TB3> INFO: 1756624 events read in total (79860ms).
[10:42:46.196] <TB3> INFO: 2342512 events read in total (107087ms).
[10:43:12.941] <TB3> INFO: 2927960 events read in total (133831ms).
[10:43:39.880] <TB3> INFO: 3513056 events read in total (160770ms).
[10:44:07.099] <TB3> INFO: 4097208 events read in total (187989ms).
[10:44:34.244] <TB3> INFO: 4681048 events read in total (215134ms).
[10:44:52.100] <TB3> INFO: 5058560 events read in total (232990ms).
[10:44:52.197] <TB3> INFO: Test took 233957ms.
[10:45:18.048] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.679486 .. 46.218631
[10:45:18.292] <TB3> INFO: Expecting 208000 events.
[10:45:28.985] <TB3> INFO: 208000 events read in total (10101ms).
[10:45:28.987] <TB3> INFO: Test took 10937ms.
[10:45:29.045] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[10:45:29.058] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:45:29.058] <TB3> INFO: run 1 of 1
[10:45:29.400] <TB3> INFO: Expecting 1331200 events.
[10:45:58.509] <TB3> INFO: 653856 events read in total (28517ms).
[10:46:27.464] <TB3> INFO: 1305392 events read in total (57472ms).
[10:46:28.991] <TB3> INFO: 1331200 events read in total (58999ms).
[10:46:29.022] <TB3> INFO: Test took 59965ms.
[10:46:43.815] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.022511 .. 47.421021
[10:46:44.052] <TB3> INFO: Expecting 208000 events.
[10:46:54.493] <TB3> INFO: 208000 events read in total (9849ms).
[10:46:54.495] <TB3> INFO: Test took 10679ms.
[10:46:54.574] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[10:46:54.591] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:46:54.591] <TB3> INFO: run 1 of 1
[10:46:54.869] <TB3> INFO: Expecting 1431040 events.
[10:47:24.279] <TB3> INFO: 659256 events read in total (28817ms).
[10:47:53.010] <TB3> INFO: 1319200 events read in total (57548ms).
[10:47:58.105] <TB3> INFO: 1431040 events read in total (62643ms).
[10:47:58.137] <TB3> INFO: Test took 63546ms.
[10:48:12.631] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.424188 .. 44.790997
[10:48:12.869] <TB3> INFO: Expecting 208000 events.
[10:48:23.250] <TB3> INFO: 208000 events read in total (9789ms).
[10:48:23.250] <TB3> INFO: Test took 10618ms.
[10:48:23.298] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 54 (-1/-1) hits flags = 528 (plus default)
[10:48:23.313] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:48:23.313] <TB3> INFO: run 1 of 1
[10:48:23.592] <TB3> INFO: Expecting 1364480 events.
[10:48:53.715] <TB3> INFO: 677888 events read in total (29531ms).
[10:49:23.614] <TB3> INFO: 1353400 events read in total (59430ms).
[10:49:24.519] <TB3> INFO: 1364480 events read in total (60336ms).
[10:49:24.547] <TB3> INFO: Test took 61235ms.
[10:49:38.999] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:49:38.999] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:49:39.014] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[10:49:39.015] <TB3> INFO: run 1 of 1
[10:49:39.304] <TB3> INFO: Expecting 1364480 events.
[10:50:09.337] <TB3> INFO: 666696 events read in total (29441ms).
[10:50:38.518] <TB3> INFO: 1332208 events read in total (58622ms).
[10:50:40.364] <TB3> INFO: 1364480 events read in total (60469ms).
[10:50:40.402] <TB3> INFO: Test took 61388ms.
[10:50:54.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C0.dat
[10:50:54.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C1.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C2.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C3.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C4.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C5.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C6.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C7.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C8.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C9.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C10.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C11.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C12.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C13.dat
[10:50:54.678] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C14.dat
[10:50:54.679] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C15.dat
[10:50:54.679] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C0.dat
[10:50:54.685] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C1.dat
[10:50:54.691] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C2.dat
[10:50:54.698] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C3.dat
[10:50:54.704] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C4.dat
[10:50:54.710] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C5.dat
[10:50:54.716] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C6.dat
[10:50:54.722] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C7.dat
[10:50:54.728] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C8.dat
[10:50:54.735] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C9.dat
[10:50:54.742] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C10.dat
[10:50:54.748] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C11.dat
[10:50:54.754] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C12.dat
[10:50:54.760] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C13.dat
[10:50:54.766] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C14.dat
[10:50:54.772] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//trimParameters35_C15.dat
[10:50:54.779] <TB3> INFO: PixTestTrim::trimTest() done
[10:50:54.779] <TB3> INFO: vtrim: 139 132 125 121 143 138 126 136 136 144 118 132 124 124 154 126
[10:50:54.779] <TB3> INFO: vthrcomp: 116 106 114 113 109 126 129 119 113 109 133 118 112 116 132 115
[10:50:54.779] <TB3> INFO: vcal mean: 34.80 34.86 34.76 34.82 34.94 34.86 34.85 34.81 34.83 34.80 34.86 34.76 34.85 34.75 34.88 34.80
[10:50:54.779] <TB3> INFO: vcal RMS: 1.04 0.88 1.02 1.13 1.26 0.98 1.00 1.06 1.11 0.96 1.07 1.03 1.14 0.99 0.91 1.09
[10:50:54.779] <TB3> INFO: bits mean: 9.35 9.17 9.45 9.41 9.29 8.50 9.78 9.75 9.39 8.81 8.86 9.59 9.36 9.86 7.95 9.51
[10:50:54.779] <TB3> INFO: bits RMS: 2.82 2.49 2.63 2.60 2.43 3.01 2.64 2.73 2.68 2.67 2.83 2.77 2.57 2.56 2.42 2.77
[10:50:54.788] <TB3> INFO: ----------------------------------------------------------------------
[10:50:54.788] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[10:50:54.788] <TB3> INFO: ----------------------------------------------------------------------
[10:50:54.790] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:50:54.803] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:50:54.803] <TB3> INFO: run 1 of 1
[10:50:55.072] <TB3> INFO: Expecting 4160000 events.
[10:51:27.913] <TB3> INFO: 736155 events read in total (32249ms).
[10:51:59.365] <TB3> INFO: 1467930 events read in total (63701ms).
[10:52:30.975] <TB3> INFO: 2196785 events read in total (95311ms).
[10:53:02.486] <TB3> INFO: 2920945 events read in total (126822ms).
[10:53:34.712] <TB3> INFO: 3641345 events read in total (159048ms).
[10:53:58.628] <TB3> INFO: 4160000 events read in total (182964ms).
[10:53:58.706] <TB3> INFO: Test took 183903ms.
[10:54:29.832] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[10:54:29.846] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:54:29.846] <TB3> INFO: run 1 of 1
[10:54:30.086] <TB3> INFO: Expecting 4035200 events.
[10:55:01.770] <TB3> INFO: 722595 events read in total (31092ms).
[10:55:33.451] <TB3> INFO: 1440210 events read in total (62773ms).
[10:56:04.718] <TB3> INFO: 2153260 events read in total (94040ms).
[10:56:35.779] <TB3> INFO: 2862390 events read in total (125101ms).
[10:57:07.390] <TB3> INFO: 3568940 events read in total (156712ms).
[10:57:28.484] <TB3> INFO: 4035200 events read in total (177806ms).
[10:57:28.567] <TB3> INFO: Test took 178722ms.
[10:58:02.630] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[10:58:02.645] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:58:02.645] <TB3> INFO: run 1 of 1
[10:58:02.919] <TB3> INFO: Expecting 3764800 events.
[10:58:35.724] <TB3> INFO: 744325 events read in total (32214ms).
[10:59:07.774] <TB3> INFO: 1483085 events read in total (64264ms).
[10:59:39.382] <TB3> INFO: 2215030 events read in total (95872ms).
[11:00:10.982] <TB3> INFO: 2942280 events read in total (127472ms).
[11:00:43.586] <TB3> INFO: 3667565 events read in total (160076ms).
[11:00:48.233] <TB3> INFO: 3764800 events read in total (164723ms).
[11:00:48.309] <TB3> INFO: Test took 165665ms.
[11:01:20.153] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[11:01:20.167] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:01:20.167] <TB3> INFO: run 1 of 1
[11:01:20.493] <TB3> INFO: Expecting 3806400 events.
[11:01:53.167] <TB3> INFO: 738920 events read in total (32082ms).
[11:02:25.232] <TB3> INFO: 1471975 events read in total (64147ms).
[11:02:57.018] <TB3> INFO: 2199590 events read in total (95933ms).
[11:03:28.984] <TB3> INFO: 2923275 events read in total (127899ms).
[11:04:01.142] <TB3> INFO: 3645170 events read in total (160057ms).
[11:04:08.663] <TB3> INFO: 3806400 events read in total (167578ms).
[11:04:08.748] <TB3> INFO: Test took 168580ms.
[11:04:39.104] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 180 (-1/-1) hits flags = 528 (plus default)
[11:04:39.117] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:04:39.117] <TB3> INFO: run 1 of 1
[11:04:39.447] <TB3> INFO: Expecting 3764800 events.
[11:05:12.037] <TB3> INFO: 742020 events read in total (31995ms).
[11:05:44.071] <TB3> INFO: 1478420 events read in total (64029ms).
[11:06:15.673] <TB3> INFO: 2208850 events read in total (95631ms).
[11:06:47.232] <TB3> INFO: 2935515 events read in total (127190ms).
[11:07:19.106] <TB3> INFO: 3661040 events read in total (159064ms).
[11:07:24.132] <TB3> INFO: 3764800 events read in total (164090ms).
[11:07:24.253] <TB3> INFO: Test took 165131ms.
[11:07:55.164] <TB3> INFO: PixTestTrim::trimBitTest() done
[11:07:55.169] <TB3> INFO: PixTestTrim::doTest() done, duration: 2512 seconds
[11:07:55.169] <TB3> INFO: Decoding statistics:
[11:07:55.169] <TB3> INFO: General information:
[11:07:55.169] <TB3> INFO: 16bit words read: 0
[11:07:55.169] <TB3> INFO: valid events total: 0
[11:07:55.169] <TB3> INFO: empty events: 0
[11:07:55.169] <TB3> INFO: valid events with pixels: 0
[11:07:55.169] <TB3> INFO: valid pixel hits: 0
[11:07:55.169] <TB3> INFO: Event errors: 0
[11:07:55.169] <TB3> INFO: start marker: 0
[11:07:55.169] <TB3> INFO: stop marker: 0
[11:07:55.169] <TB3> INFO: overflow: 0
[11:07:55.169] <TB3> INFO: invalid 5bit words: 0
[11:07:55.169] <TB3> INFO: invalid XOR eye diagram: 0
[11:07:55.169] <TB3> INFO: frame (failed synchr.): 0
[11:07:55.169] <TB3> INFO: idle data (no TBM trl): 0
[11:07:55.169] <TB3> INFO: no data (only TBM hdr): 0
[11:07:55.169] <TB3> INFO: TBM errors: 0
[11:07:55.169] <TB3> INFO: flawed TBM headers: 0
[11:07:55.169] <TB3> INFO: flawed TBM trailers: 0
[11:07:55.169] <TB3> INFO: event ID mismatches: 0
[11:07:55.169] <TB3> INFO: ROC errors: 0
[11:07:55.169] <TB3> INFO: missing ROC header(s): 0
[11:07:55.169] <TB3> INFO: misplaced readback start: 0
[11:07:55.169] <TB3> INFO: Pixel decoding errors: 0
[11:07:55.169] <TB3> INFO: pixel data incomplete: 0
[11:07:55.169] <TB3> INFO: pixel address: 0
[11:07:55.169] <TB3> INFO: pulse height fill bit: 0
[11:07:55.169] <TB3> INFO: buffer corruption: 0
[11:07:55.986] <TB3> INFO: ######################################################################
[11:07:55.991] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:07:55.995] <TB3> INFO: ######################################################################
[11:07:56.264] <TB3> INFO: Expecting 41600 events.
[11:07:59.859] <TB3> INFO: 41600 events read in total (3003ms).
[11:07:59.861] <TB3> INFO: Test took 3862ms.
[11:08:00.318] <TB3> INFO: Expecting 41600 events.
[11:08:03.946] <TB3> INFO: 41600 events read in total (3037ms).
[11:08:03.947] <TB3> INFO: Test took 3877ms.
[11:08:04.236] <TB3> INFO: Expecting 41600 events.
[11:08:07.771] <TB3> INFO: 41600 events read in total (2943ms).
[11:08:07.773] <TB3> INFO: Test took 3801ms.
[11:08:08.084] <TB3> INFO: Expecting 41600 events.
[11:08:11.786] <TB3> INFO: 41600 events read in total (3110ms).
[11:08:11.788] <TB3> INFO: Test took 3990ms.
[11:08:12.087] <TB3> INFO: Expecting 41600 events.
[11:08:15.628] <TB3> INFO: 41600 events read in total (2949ms).
[11:08:15.629] <TB3> INFO: Test took 3816ms.
[11:08:15.993] <TB3> INFO: Expecting 41600 events.
[11:08:19.914] <TB3> INFO: 41600 events read in total (3329ms).
[11:08:19.916] <TB3> INFO: Test took 4261ms.
[11:08:20.208] <TB3> INFO: Expecting 41600 events.
[11:08:24.005] <TB3> INFO: 41600 events read in total (3205ms).
[11:08:24.006] <TB3> INFO: Test took 4062ms.
[11:08:24.295] <TB3> INFO: Expecting 41600 events.
[11:08:27.828] <TB3> INFO: 41600 events read in total (2941ms).
[11:08:27.831] <TB3> INFO: Test took 3800ms.
[11:08:28.193] <TB3> INFO: Expecting 41600 events.
[11:08:31.710] <TB3> INFO: 41600 events read in total (2925ms).
[11:08:31.712] <TB3> INFO: Test took 3854ms.
[11:08:31.002] <TB3> INFO: Expecting 41600 events.
[11:08:35.559] <TB3> INFO: 41600 events read in total (2965ms).
[11:08:35.559] <TB3> INFO: Test took 3823ms.
[11:08:35.848] <TB3> INFO: Expecting 41600 events.
[11:08:39.329] <TB3> INFO: 41600 events read in total (2889ms).
[11:08:39.330] <TB3> INFO: Test took 3747ms.
[11:08:39.624] <TB3> INFO: Expecting 41600 events.
[11:08:43.173] <TB3> INFO: 41600 events read in total (2958ms).
[11:08:43.174] <TB3> INFO: Test took 3820ms.
[11:08:43.463] <TB3> INFO: Expecting 41600 events.
[11:08:46.968] <TB3> INFO: 41600 events read in total (2913ms).
[11:08:46.969] <TB3> INFO: Test took 3771ms.
[11:08:47.259] <TB3> INFO: Expecting 41600 events.
[11:08:50.735] <TB3> INFO: 41600 events read in total (2885ms).
[11:08:50.736] <TB3> INFO: Test took 3742ms.
[11:08:51.026] <TB3> INFO: Expecting 41600 events.
[11:08:54.508] <TB3> INFO: 41600 events read in total (2891ms).
[11:08:54.509] <TB3> INFO: Test took 3748ms.
[11:08:54.801] <TB3> INFO: Expecting 41600 events.
[11:08:58.276] <TB3> INFO: 41600 events read in total (2884ms).
[11:08:58.277] <TB3> INFO: Test took 3741ms.
[11:08:58.566] <TB3> INFO: Expecting 41600 events.
[11:09:02.187] <TB3> INFO: 41600 events read in total (3029ms).
[11:09:02.188] <TB3> INFO: Test took 3886ms.
[11:09:02.515] <TB3> INFO: Expecting 41600 events.
[11:09:06.032] <TB3> INFO: 41600 events read in total (2926ms).
[11:09:06.033] <TB3> INFO: Test took 3820ms.
[11:09:06.325] <TB3> INFO: Expecting 41600 events.
[11:09:09.808] <TB3> INFO: 41600 events read in total (2892ms).
[11:09:09.809] <TB3> INFO: Test took 3749ms.
[11:09:10.099] <TB3> INFO: Expecting 41600 events.
[11:09:13.620] <TB3> INFO: 41600 events read in total (2929ms).
[11:09:13.621] <TB3> INFO: Test took 3787ms.
[11:09:13.911] <TB3> INFO: Expecting 41600 events.
[11:09:17.402] <TB3> INFO: 41600 events read in total (2899ms).
[11:09:17.403] <TB3> INFO: Test took 3757ms.
[11:09:17.692] <TB3> INFO: Expecting 41600 events.
[11:09:21.291] <TB3> INFO: 41600 events read in total (3007ms).
[11:09:21.292] <TB3> INFO: Test took 3865ms.
[11:09:21.601] <TB3> INFO: Expecting 41600 events.
[11:09:25.076] <TB3> INFO: 41600 events read in total (2884ms).
[11:09:25.077] <TB3> INFO: Test took 3761ms.
[11:09:25.369] <TB3> INFO: Expecting 41600 events.
[11:09:28.851] <TB3> INFO: 41600 events read in total (2891ms).
[11:09:28.852] <TB3> INFO: Test took 3748ms.
[11:09:29.142] <TB3> INFO: Expecting 41600 events.
[11:09:32.806] <TB3> INFO: 41600 events read in total (3073ms).
[11:09:32.807] <TB3> INFO: Test took 3930ms.
[11:09:33.097] <TB3> INFO: Expecting 41600 events.
[11:09:36.659] <TB3> INFO: 41600 events read in total (2970ms).
[11:09:36.660] <TB3> INFO: Test took 3828ms.
[11:09:36.950] <TB3> INFO: Expecting 41600 events.
[11:09:40.450] <TB3> INFO: 41600 events read in total (2908ms).
[11:09:40.451] <TB3> INFO: Test took 3766ms.
[11:09:40.742] <TB3> INFO: Expecting 41600 events.
[11:09:44.250] <TB3> INFO: 41600 events read in total (2916ms).
[11:09:44.250] <TB3> INFO: Test took 3772ms.
[11:09:44.540] <TB3> INFO: Expecting 41600 events.
[11:09:48.082] <TB3> INFO: 41600 events read in total (2951ms).
[11:09:48.083] <TB3> INFO: Test took 3808ms.
[11:09:48.374] <TB3> INFO: Expecting 41600 events.
[11:09:51.886] <TB3> INFO: 41600 events read in total (2920ms).
[11:09:51.887] <TB3> INFO: Test took 3777ms.
[11:09:52.177] <TB3> INFO: Expecting 2560 events.
[11:09:53.067] <TB3> INFO: 2560 events read in total (298ms).
[11:09:53.067] <TB3> INFO: Test took 1166ms.
[11:09:53.375] <TB3> INFO: Expecting 2560 events.
[11:09:54.261] <TB3> INFO: 2560 events read in total (295ms).
[11:09:54.261] <TB3> INFO: Test took 1193ms.
[11:09:54.569] <TB3> INFO: Expecting 2560 events.
[11:09:55.452] <TB3> INFO: 2560 events read in total (291ms).
[11:09:55.453] <TB3> INFO: Test took 1192ms.
[11:09:55.761] <TB3> INFO: Expecting 2560 events.
[11:09:56.648] <TB3> INFO: 2560 events read in total (296ms).
[11:09:56.649] <TB3> INFO: Test took 1196ms.
[11:09:56.956] <TB3> INFO: Expecting 2560 events.
[11:09:57.836] <TB3> INFO: 2560 events read in total (288ms).
[11:09:57.836] <TB3> INFO: Test took 1185ms.
[11:09:58.144] <TB3> INFO: Expecting 2560 events.
[11:09:59.027] <TB3> INFO: 2560 events read in total (292ms).
[11:09:59.027] <TB3> INFO: Test took 1191ms.
[11:09:59.335] <TB3> INFO: Expecting 2560 events.
[11:10:00.214] <TB3> INFO: 2560 events read in total (287ms).
[11:10:00.214] <TB3> INFO: Test took 1186ms.
[11:10:00.522] <TB3> INFO: Expecting 2560 events.
[11:10:01.405] <TB3> INFO: 2560 events read in total (291ms).
[11:10:01.405] <TB3> INFO: Test took 1190ms.
[11:10:01.712] <TB3> INFO: Expecting 2560 events.
[11:10:02.597] <TB3> INFO: 2560 events read in total (292ms).
[11:10:02.597] <TB3> INFO: Test took 1190ms.
[11:10:02.905] <TB3> INFO: Expecting 2560 events.
[11:10:03.784] <TB3> INFO: 2560 events read in total (288ms).
[11:10:03.784] <TB3> INFO: Test took 1185ms.
[11:10:04.092] <TB3> INFO: Expecting 2560 events.
[11:10:04.979] <TB3> INFO: 2560 events read in total (296ms).
[11:10:04.979] <TB3> INFO: Test took 1195ms.
[11:10:05.288] <TB3> INFO: Expecting 2560 events.
[11:10:06.169] <TB3> INFO: 2560 events read in total (288ms).
[11:10:06.170] <TB3> INFO: Test took 1190ms.
[11:10:06.477] <TB3> INFO: Expecting 2560 events.
[11:10:07.369] <TB3> INFO: 2560 events read in total (300ms).
[11:10:07.369] <TB3> INFO: Test took 1199ms.
[11:10:07.677] <TB3> INFO: Expecting 2560 events.
[11:10:08.561] <TB3> INFO: 2560 events read in total (293ms).
[11:10:08.562] <TB3> INFO: Test took 1192ms.
[11:10:08.869] <TB3> INFO: Expecting 2560 events.
[11:10:09.756] <TB3> INFO: 2560 events read in total (295ms).
[11:10:09.756] <TB3> INFO: Test took 1194ms.
[11:10:10.064] <TB3> INFO: Expecting 2560 events.
[11:10:10.949] <TB3> INFO: 2560 events read in total (293ms).
[11:10:10.949] <TB3> INFO: Test took 1192ms.
[11:10:10.955] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:11.257] <TB3> INFO: Expecting 655360 events.
[11:10:25.770] <TB3> INFO: 655360 events read in total (13921ms).
[11:10:25.788] <TB3> INFO: Expecting 655360 events.
[11:10:40.255] <TB3> INFO: 655360 events read in total (14063ms).
[11:10:40.275] <TB3> INFO: Expecting 655360 events.
[11:10:54.642] <TB3> INFO: 655360 events read in total (13964ms).
[11:10:54.667] <TB3> INFO: Expecting 655360 events.
[11:11:08.953] <TB3> INFO: 655360 events read in total (13883ms).
[11:11:08.983] <TB3> INFO: Expecting 655360 events.
[11:11:23.449] <TB3> INFO: 655360 events read in total (14063ms).
[11:11:23.484] <TB3> INFO: Expecting 655360 events.
[11:11:37.814] <TB3> INFO: 655360 events read in total (13927ms).
[11:11:37.863] <TB3> INFO: Expecting 655360 events.
[11:11:52.265] <TB3> INFO: 655360 events read in total (13999ms).
[11:11:52.310] <TB3> INFO: Expecting 655360 events.
[11:12:06.656] <TB3> INFO: 655360 events read in total (13943ms).
[11:12:06.704] <TB3> INFO: Expecting 655360 events.
[11:12:20.823] <TB3> INFO: 655360 events read in total (13716ms).
[11:12:20.877] <TB3> INFO: Expecting 655360 events.
[11:12:35.341] <TB3> INFO: 655360 events read in total (14058ms).
[11:12:35.442] <TB3> INFO: Expecting 655360 events.
[11:12:49.770] <TB3> INFO: 655360 events read in total (13925ms).
[11:12:49.863] <TB3> INFO: Expecting 655360 events.
[11:13:04.107] <TB3> INFO: 655360 events read in total (13840ms).
[11:13:04.239] <TB3> INFO: Expecting 655360 events.
[11:13:18.621] <TB3> INFO: 655360 events read in total (13979ms).
[11:13:18.751] <TB3> INFO: Expecting 655360 events.
[11:13:33.156] <TB3> INFO: 655360 events read in total (14002ms).
[11:13:33.253] <TB3> INFO: Expecting 655360 events.
[11:13:47.520] <TB3> INFO: 655360 events read in total (13864ms).
[11:13:47.643] <TB3> INFO: Expecting 655360 events.
[11:14:01.884] <TB3> INFO: 655360 events read in total (13838ms).
[11:14:01.999] <TB3> INFO: Test took 231044ms.
[11:14:02.115] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:14:02.359] <TB3> INFO: Expecting 655360 events.
[11:14:16.767] <TB3> INFO: 655360 events read in total (13816ms).
[11:14:16.784] <TB3> INFO: Expecting 655360 events.
[11:14:31.199] <TB3> INFO: 655360 events read in total (14012ms).
[11:14:31.223] <TB3> INFO: Expecting 655360 events.
[11:14:45.760] <TB3> INFO: 655360 events read in total (14134ms).
[11:14:45.788] <TB3> INFO: Expecting 655360 events.
[11:15:00.208] <TB3> INFO: 655360 events read in total (14017ms).
[11:15:00.252] <TB3> INFO: Expecting 655360 events.
[11:15:14.259] <TB3> INFO: 655360 events read in total (13604ms).
[11:15:14.304] <TB3> INFO: Expecting 655360 events.
[11:15:28.563] <TB3> INFO: 655360 events read in total (13855ms).
[11:15:28.604] <TB3> INFO: Expecting 655360 events.
[11:15:42.798] <TB3> INFO: 655360 events read in total (13791ms).
[11:15:42.842] <TB3> INFO: Expecting 655360 events.
[11:15:57.076] <TB3> INFO: 655360 events read in total (13831ms).
[11:15:57.128] <TB3> INFO: Expecting 655360 events.
[11:16:11.295] <TB3> INFO: 655360 events read in total (13764ms).
[11:16:11.353] <TB3> INFO: Expecting 655360 events.
[11:16:25.612] <TB3> INFO: 655360 events read in total (13856ms).
[11:16:25.696] <TB3> INFO: Expecting 655360 events.
[11:16:39.865] <TB3> INFO: 655360 events read in total (13766ms).
[11:16:39.982] <TB3> INFO: Expecting 655360 events.
[11:16:54.210] <TB3> INFO: 655360 events read in total (13825ms).
[11:16:54.292] <TB3> INFO: Expecting 655360 events.
[11:17:08.379] <TB3> INFO: 655360 events read in total (13684ms).
[11:17:08.465] <TB3> INFO: Expecting 655360 events.
[11:17:22.779] <TB3> INFO: 655360 events read in total (13911ms).
[11:17:22.878] <TB3> INFO: Expecting 655360 events.
[11:17:37.168] <TB3> INFO: 655360 events read in total (13887ms).
[11:17:37.268] <TB3> INFO: Expecting 655360 events.
[11:17:51.728] <TB3> INFO: 655360 events read in total (14057ms).
[11:17:51.842] <TB3> INFO: Test took 229727ms.
[11:17:52.158] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.172] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.186] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.193] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.199] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.206] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:17:52.212] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:17:52.219] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:17:52.225] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:17:52.230] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:17:52.236] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:17:52.242] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[11:17:52.248] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[11:17:52.254] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[11:17:52.259] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[11:17:52.265] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[11:17:52.271] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[11:17:52.276] <TB3> INFO: safety margin for low PH: adding 13, margin is now 33
[11:17:52.282] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.288] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.293] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:17:52.299] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:17:52.305] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[11:17:52.310] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[11:17:52.316] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[11:17:52.322] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[11:17:52.327] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.333] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.339] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.346] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.355] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.363] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.371] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.379] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[11:17:52.387] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[11:17:52.396] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.405] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[11:17:52.441] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C0.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C1.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C2.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C3.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C4.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C5.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C6.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C7.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C8.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C9.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C10.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C11.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C12.dat
[11:17:52.442] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C13.dat
[11:17:52.443] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C14.dat
[11:17:52.443] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//dacParameters35_C15.dat
[11:17:52.685] <TB3> INFO: Expecting 41600 events.
[11:17:55.820] <TB3> INFO: 41600 events read in total (2543ms).
[11:17:55.821] <TB3> INFO: Test took 3376ms.
[11:17:56.273] <TB3> INFO: Expecting 41600 events.
[11:17:59.355] <TB3> INFO: 41600 events read in total (2490ms).
[11:17:59.356] <TB3> INFO: Test took 3324ms.
[11:17:59.945] <TB3> INFO: Expecting 41600 events.
[11:18:03.141] <TB3> INFO: 41600 events read in total (2604ms).
[11:18:03.142] <TB3> INFO: Test took 3575ms.
[11:18:03.370] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:03.459] <TB3> INFO: Expecting 2560 events.
[11:18:04.344] <TB3> INFO: 2560 events read in total (291ms).
[11:18:04.344] <TB3> INFO: Test took 974ms.
[11:18:04.346] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:04.652] <TB3> INFO: Expecting 2560 events.
[11:18:05.537] <TB3> INFO: 2560 events read in total (293ms).
[11:18:05.538] <TB3> INFO: Test took 1192ms.
[11:18:05.540] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:05.846] <TB3> INFO: Expecting 2560 events.
[11:18:06.730] <TB3> INFO: 2560 events read in total (292ms).
[11:18:06.730] <TB3> INFO: Test took 1190ms.
[11:18:06.732] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:07.038] <TB3> INFO: Expecting 2560 events.
[11:18:07.922] <TB3> INFO: 2560 events read in total (292ms).
[11:18:07.922] <TB3> INFO: Test took 1190ms.
[11:18:07.924] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:08.230] <TB3> INFO: Expecting 2560 events.
[11:18:09.117] <TB3> INFO: 2560 events read in total (295ms).
[11:18:09.117] <TB3> INFO: Test took 1193ms.
[11:18:09.119] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:09.430] <TB3> INFO: Expecting 2560 events.
[11:18:10.319] <TB3> INFO: 2560 events read in total (298ms).
[11:18:10.319] <TB3> INFO: Test took 1200ms.
[11:18:10.322] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:10.627] <TB3> INFO: Expecting 2560 events.
[11:18:11.519] <TB3> INFO: 2560 events read in total (300ms).
[11:18:11.519] <TB3> INFO: Test took 1197ms.
[11:18:11.523] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:11.827] <TB3> INFO: Expecting 2560 events.
[11:18:12.711] <TB3> INFO: 2560 events read in total (292ms).
[11:18:12.711] <TB3> INFO: Test took 1189ms.
[11:18:12.713] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:13.020] <TB3> INFO: Expecting 2560 events.
[11:18:13.899] <TB3> INFO: 2560 events read in total (287ms).
[11:18:13.899] <TB3> INFO: Test took 1186ms.
[11:18:13.905] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:14.207] <TB3> INFO: Expecting 2560 events.
[11:18:15.088] <TB3> INFO: 2560 events read in total (289ms).
[11:18:15.089] <TB3> INFO: Test took 1184ms.
[11:18:15.091] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:15.397] <TB3> INFO: Expecting 2560 events.
[11:18:16.279] <TB3> INFO: 2560 events read in total (291ms).
[11:18:16.279] <TB3> INFO: Test took 1188ms.
[11:18:16.281] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:16.588] <TB3> INFO: Expecting 2560 events.
[11:18:17.466] <TB3> INFO: 2560 events read in total (287ms).
[11:18:17.466] <TB3> INFO: Test took 1185ms.
[11:18:17.470] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:17.775] <TB3> INFO: Expecting 2560 events.
[11:18:18.653] <TB3> INFO: 2560 events read in total (286ms).
[11:18:18.654] <TB3> INFO: Test took 1184ms.
[11:18:18.656] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:18.961] <TB3> INFO: Expecting 2560 events.
[11:18:19.842] <TB3> INFO: 2560 events read in total (289ms).
[11:18:19.842] <TB3> INFO: Test took 1186ms.
[11:18:19.844] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:20.151] <TB3> INFO: Expecting 2560 events.
[11:18:21.034] <TB3> INFO: 2560 events read in total (292ms).
[11:18:21.035] <TB3> INFO: Test took 1191ms.
[11:18:21.037] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:21.344] <TB3> INFO: Expecting 2560 events.
[11:18:22.224] <TB3> INFO: 2560 events read in total (289ms).
[11:18:22.224] <TB3> INFO: Test took 1187ms.
[11:18:22.227] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:22.533] <TB3> INFO: Expecting 2560 events.
[11:18:23.413] <TB3> INFO: 2560 events read in total (288ms).
[11:18:23.413] <TB3> INFO: Test took 1186ms.
[11:18:23.415] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:23.721] <TB3> INFO: Expecting 2560 events.
[11:18:24.600] <TB3> INFO: 2560 events read in total (287ms).
[11:18:24.601] <TB3> INFO: Test took 1186ms.
[11:18:24.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:24.909] <TB3> INFO: Expecting 2560 events.
[11:18:25.796] <TB3> INFO: 2560 events read in total (295ms).
[11:18:25.796] <TB3> INFO: Test took 1194ms.
[11:18:25.799] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:26.105] <TB3> INFO: Expecting 2560 events.
[11:18:26.987] <TB3> INFO: 2560 events read in total (290ms).
[11:18:26.987] <TB3> INFO: Test took 1189ms.
[11:18:26.989] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:27.296] <TB3> INFO: Expecting 2560 events.
[11:18:28.179] <TB3> INFO: 2560 events read in total (292ms).
[11:18:28.179] <TB3> INFO: Test took 1190ms.
[11:18:28.181] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:28.487] <TB3> INFO: Expecting 2560 events.
[11:18:29.365] <TB3> INFO: 2560 events read in total (286ms).
[11:18:29.365] <TB3> INFO: Test took 1184ms.
[11:18:29.367] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:29.674] <TB3> INFO: Expecting 2560 events.
[11:18:30.556] <TB3> INFO: 2560 events read in total (290ms).
[11:18:30.556] <TB3> INFO: Test took 1189ms.
[11:18:30.559] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:30.865] <TB3> INFO: Expecting 2560 events.
[11:18:31.756] <TB3> INFO: 2560 events read in total (300ms).
[11:18:31.756] <TB3> INFO: Test took 1197ms.
[11:18:31.760] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:32.065] <TB3> INFO: Expecting 2560 events.
[11:18:32.949] <TB3> INFO: 2560 events read in total (292ms).
[11:18:32.949] <TB3> INFO: Test took 1189ms.
[11:18:32.952] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:33.258] <TB3> INFO: Expecting 2560 events.
[11:18:34.144] <TB3> INFO: 2560 events read in total (295ms).
[11:18:34.144] <TB3> INFO: Test took 1192ms.
[11:18:34.147] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:34.453] <TB3> INFO: Expecting 2560 events.
[11:18:35.336] <TB3> INFO: 2560 events read in total (291ms).
[11:18:35.336] <TB3> INFO: Test took 1190ms.
[11:18:35.340] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:35.645] <TB3> INFO: Expecting 2560 events.
[11:18:36.531] <TB3> INFO: 2560 events read in total (294ms).
[11:18:36.531] <TB3> INFO: Test took 1192ms.
[11:18:36.534] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:36.839] <TB3> INFO: Expecting 2560 events.
[11:18:37.723] <TB3> INFO: 2560 events read in total (292ms).
[11:18:37.723] <TB3> INFO: Test took 1189ms.
[11:18:37.725] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:38.032] <TB3> INFO: Expecting 2560 events.
[11:18:38.915] <TB3> INFO: 2560 events read in total (291ms).
[11:18:38.916] <TB3> INFO: Test took 1191ms.
[11:18:38.918] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:39.224] <TB3> INFO: Expecting 2560 events.
[11:18:40.108] <TB3> INFO: 2560 events read in total (292ms).
[11:18:40.108] <TB3> INFO: Test took 1191ms.
[11:18:40.110] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:18:40.417] <TB3> INFO: Expecting 2560 events.
[11:18:41.301] <TB3> INFO: 2560 events read in total (293ms).
[11:18:41.301] <TB3> INFO: Test took 1191ms.
[11:18:41.766] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 645 seconds
[11:18:41.766] <TB3> INFO: PH scale (per ROC): 60 61 45 60 50 44 48 42 53 43 47 62 52 49 60 60
[11:18:41.766] <TB3> INFO: PH offset (per ROC): 115 131 96 140 112 107 109 98 112 100 97 118 127 111 131 125
[11:18:41.774] <TB3> INFO: Decoding statistics:
[11:18:41.774] <TB3> INFO: General information:
[11:18:41.774] <TB3> INFO: 16bit words read: 127882
[11:18:41.774] <TB3> INFO: valid events total: 20480
[11:18:41.774] <TB3> INFO: empty events: 17979
[11:18:41.774] <TB3> INFO: valid events with pixels: 2501
[11:18:41.774] <TB3> INFO: valid pixel hits: 2501
[11:18:41.774] <TB3> INFO: Event errors: 0
[11:18:41.774] <TB3> INFO: start marker: 0
[11:18:41.774] <TB3> INFO: stop marker: 0
[11:18:41.774] <TB3> INFO: overflow: 0
[11:18:41.774] <TB3> INFO: invalid 5bit words: 0
[11:18:41.774] <TB3> INFO: invalid XOR eye diagram: 0
[11:18:41.774] <TB3> INFO: frame (failed synchr.): 0
[11:18:41.774] <TB3> INFO: idle data (no TBM trl): 0
[11:18:41.774] <TB3> INFO: no data (only TBM hdr): 0
[11:18:41.774] <TB3> INFO: TBM errors: 0
[11:18:41.774] <TB3> INFO: flawed TBM headers: 0
[11:18:41.774] <TB3> INFO: flawed TBM trailers: 0
[11:18:41.774] <TB3> INFO: event ID mismatches: 0
[11:18:41.774] <TB3> INFO: ROC errors: 0
[11:18:41.774] <TB3> INFO: missing ROC header(s): 0
[11:18:41.774] <TB3> INFO: misplaced readback start: 0
[11:18:41.774] <TB3> INFO: Pixel decoding errors: 0
[11:18:41.774] <TB3> INFO: pixel data incomplete: 0
[11:18:41.774] <TB3> INFO: pixel address: 0
[11:18:41.774] <TB3> INFO: pulse height fill bit: 0
[11:18:41.774] <TB3> INFO: buffer corruption: 0
[11:18:42.054] <TB3> INFO: ######################################################################
[11:18:42.054] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:18:42.054] <TB3> INFO: ######################################################################
[11:18:42.069] <TB3> INFO: scanning low vcal = 10
[11:18:42.310] <TB3> INFO: Expecting 41600 events.
[11:18:45.869] <TB3> INFO: 41600 events read in total (2967ms).
[11:18:45.869] <TB3> INFO: Test took 3800ms.
[11:18:45.873] <TB3> INFO: scanning low vcal = 20
[11:18:46.237] <TB3> INFO: Expecting 41600 events.
[11:18:49.855] <TB3> INFO: 41600 events read in total (3026ms).
[11:18:49.856] <TB3> INFO: Test took 3981ms.
[11:18:49.859] <TB3> INFO: scanning low vcal = 30
[11:18:50.156] <TB3> INFO: Expecting 41600 events.
[11:18:53.787] <TB3> INFO: 41600 events read in total (3040ms).
[11:18:53.788] <TB3> INFO: Test took 3929ms.
[11:18:53.790] <TB3> INFO: scanning low vcal = 40
[11:18:54.067] <TB3> INFO: Expecting 41600 events.
[11:18:58.020] <TB3> INFO: 41600 events read in total (3361ms).
[11:18:58.022] <TB3> INFO: Test took 4231ms.
[11:18:58.027] <TB3> INFO: scanning low vcal = 50
[11:18:58.332] <TB3> INFO: Expecting 41600 events.
[11:19:02.284] <TB3> INFO: 41600 events read in total (3361ms).
[11:19:02.285] <TB3> INFO: Test took 4258ms.
[11:19:02.289] <TB3> INFO: scanning low vcal = 60
[11:19:02.565] <TB3> INFO: Expecting 41600 events.
[11:19:06.516] <TB3> INFO: 41600 events read in total (3359ms).
[11:19:06.517] <TB3> INFO: Test took 4228ms.
[11:19:06.520] <TB3> INFO: scanning low vcal = 70
[11:19:06.796] <TB3> INFO: Expecting 41600 events.
[11:19:10.796] <TB3> INFO: 41600 events read in total (3408ms).
[11:19:10.798] <TB3> INFO: Test took 4278ms.
[11:19:10.801] <TB3> INFO: scanning low vcal = 80
[11:19:11.078] <TB3> INFO: Expecting 41600 events.
[11:19:15.067] <TB3> INFO: 41600 events read in total (3398ms).
[11:19:15.068] <TB3> INFO: Test took 4267ms.
[11:19:15.072] <TB3> INFO: scanning low vcal = 90
[11:19:15.348] <TB3> INFO: Expecting 41600 events.
[11:19:19.345] <TB3> INFO: 41600 events read in total (3405ms).
[11:19:19.346] <TB3> INFO: Test took 4273ms.
[11:19:19.350] <TB3> INFO: scanning low vcal = 100
[11:19:19.628] <TB3> INFO: Expecting 41600 events.
[11:19:23.653] <TB3> INFO: 41600 events read in total (3434ms).
[11:19:23.654] <TB3> INFO: Test took 4304ms.
[11:19:23.658] <TB3> INFO: scanning low vcal = 110
[11:19:23.951] <TB3> INFO: Expecting 41600 events.
[11:19:27.917] <TB3> INFO: 41600 events read in total (3367ms).
[11:19:27.918] <TB3> INFO: Test took 4260ms.
[11:19:27.921] <TB3> INFO: scanning low vcal = 120
[11:19:28.200] <TB3> INFO: Expecting 41600 events.
[11:19:32.274] <TB3> INFO: 41600 events read in total (3482ms).
[11:19:32.275] <TB3> INFO: Test took 4354ms.
[11:19:32.279] <TB3> INFO: scanning low vcal = 130
[11:19:32.608] <TB3> INFO: Expecting 41600 events.
[11:19:36.737] <TB3> INFO: 41600 events read in total (3537ms).
[11:19:36.738] <TB3> INFO: Test took 4459ms.
[11:19:36.741] <TB3> INFO: scanning low vcal = 140
[11:19:37.018] <TB3> INFO: Expecting 41600 events.
[11:19:40.989] <TB3> INFO: 41600 events read in total (3374ms).
[11:19:40.990] <TB3> INFO: Test took 4249ms.
[11:19:40.993] <TB3> INFO: scanning low vcal = 150
[11:19:41.270] <TB3> INFO: Expecting 41600 events.
[11:19:45.271] <TB3> INFO: 41600 events read in total (3410ms).
[11:19:45.272] <TB3> INFO: Test took 4279ms.
[11:19:45.276] <TB3> INFO: scanning low vcal = 160
[11:19:45.647] <TB3> INFO: Expecting 41600 events.
[11:19:49.675] <TB3> INFO: 41600 events read in total (3436ms).
[11:19:49.676] <TB3> INFO: Test took 4399ms.
[11:19:49.679] <TB3> INFO: scanning low vcal = 170
[11:19:49.956] <TB3> INFO: Expecting 41600 events.
[11:19:53.985] <TB3> INFO: 41600 events read in total (3438ms).
[11:19:53.986] <TB3> INFO: Test took 4307ms.
[11:19:53.992] <TB3> INFO: scanning low vcal = 180
[11:19:54.317] <TB3> INFO: Expecting 41600 events.
[11:19:58.370] <TB3> INFO: 41600 events read in total (3457ms).
[11:19:58.371] <TB3> INFO: Test took 4379ms.
[11:19:58.375] <TB3> INFO: scanning low vcal = 190
[11:19:58.651] <TB3> INFO: Expecting 41600 events.
[11:20:02.649] <TB3> INFO: 41600 events read in total (3402ms).
[11:20:02.649] <TB3> INFO: Test took 4274ms.
[11:20:02.654] <TB3> INFO: scanning low vcal = 200
[11:20:02.950] <TB3> INFO: Expecting 41600 events.
[11:20:06.898] <TB3> INFO: 41600 events read in total (3357ms).
[11:20:06.899] <TB3> INFO: Test took 4245ms.
[11:20:06.902] <TB3> INFO: scanning low vcal = 210
[11:20:07.179] <TB3> INFO: Expecting 41600 events.
[11:20:11.167] <TB3> INFO: 41600 events read in total (3397ms).
[11:20:11.168] <TB3> INFO: Test took 4266ms.
[11:20:11.171] <TB3> INFO: scanning low vcal = 220
[11:20:11.448] <TB3> INFO: Expecting 41600 events.
[11:20:15.404] <TB3> INFO: 41600 events read in total (3365ms).
[11:20:15.405] <TB3> INFO: Test took 4234ms.
[11:20:15.409] <TB3> INFO: scanning low vcal = 230
[11:20:15.687] <TB3> INFO: Expecting 41600 events.
[11:20:19.658] <TB3> INFO: 41600 events read in total (3380ms).
[11:20:19.659] <TB3> INFO: Test took 4250ms.
[11:20:19.662] <TB3> INFO: scanning low vcal = 240
[11:20:19.938] <TB3> INFO: Expecting 41600 events.
[11:20:23.922] <TB3> INFO: 41600 events read in total (3392ms).
[11:20:23.923] <TB3> INFO: Test took 4261ms.
[11:20:23.926] <TB3> INFO: scanning low vcal = 250
[11:20:24.203] <TB3> INFO: Expecting 41600 events.
[11:20:28.126] <TB3> INFO: 41600 events read in total (3331ms).
[11:20:28.127] <TB3> INFO: Test took 4201ms.
[11:20:28.132] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:20:28.407] <TB3> INFO: Expecting 41600 events.
[11:20:32.375] <TB3> INFO: 41600 events read in total (3377ms).
[11:20:32.376] <TB3> INFO: Test took 4244ms.
[11:20:32.379] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:20:32.655] <TB3> INFO: Expecting 41600 events.
[11:20:36.700] <TB3> INFO: 41600 events read in total (3453ms).
[11:20:36.701] <TB3> INFO: Test took 4322ms.
[11:20:36.705] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:20:36.981] <TB3> INFO: Expecting 41600 events.
[11:20:40.936] <TB3> INFO: 41600 events read in total (3363ms).
[11:20:40.937] <TB3> INFO: Test took 4231ms.
[11:20:40.941] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:20:41.217] <TB3> INFO: Expecting 41600 events.
[11:20:45.205] <TB3> INFO: 41600 events read in total (3397ms).
[11:20:45.206] <TB3> INFO: Test took 4265ms.
[11:20:45.210] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:20:45.486] <TB3> INFO: Expecting 41600 events.
[11:20:49.460] <TB3> INFO: 41600 events read in total (3383ms).
[11:20:49.461] <TB3> INFO: Test took 4251ms.
[11:20:50.112] <TB3> INFO: PixTestGainPedestal::measure() done
[11:21:27.821] <TB3> INFO: PixTestGainPedestal::fit() done
[11:21:27.821] <TB3> INFO: non-linearity mean: 0.986 0.983 0.946 0.981 0.969 0.946 0.923 0.914 0.941 0.938 0.918 0.981 0.981 0.927 0.976 0.981
[11:21:27.821] <TB3> INFO: non-linearity RMS: 0.003 0.004 0.172 0.004 0.011 0.033 0.101 0.133 0.060 0.188 0.093 0.004 0.004 0.090 0.009 0.004
[11:21:27.821] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:21:27.836] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:21:27.849] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:21:27.864] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:21:27.878] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:21:27.891] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:21:27.905] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:21:27.918] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:21:27.931] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:21:27.944] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:21:27.957] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:21:27.971] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:21:27.984] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:21:27.997] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:21:28.010] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:21:28.023] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1120_FullQualification_2016-11-03_09h01m_1478160071//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:21:28.036] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[11:21:28.036] <TB3> INFO: Decoding statistics:
[11:21:28.036] <TB3> INFO: General information:
[11:21:28.036] <TB3> INFO: 16bit words read: 3327824
[11:21:28.036] <TB3> INFO: valid events total: 332800
[11:21:28.036] <TB3> INFO: empty events: 0
[11:21:28.036] <TB3> INFO: valid events with pixels: 332800
[11:21:28.036] <TB3> INFO: valid pixel hits: 665512
[11:21:28.036] <TB3> INFO: Event errors: 0
[11:21:28.036] <TB3> INFO: start marker: 0
[11:21:28.036] <TB3> INFO: stop marker: 0
[11:21:28.036] <TB3> INFO: overflow: 0
[11:21:28.036] <TB3> INFO: invalid 5bit words: 0
[11:21:28.036] <TB3> INFO: invalid XOR eye diagram: 0
[11:21:28.036] <TB3> INFO: frame (failed synchr.): 0
[11:21:28.036] <TB3> INFO: idle data (no TBM trl): 0
[11:21:28.036] <TB3> INFO: no data (only TBM hdr): 0
[11:21:28.036] <TB3> INFO: TBM errors: 0
[11:21:28.036] <TB3> INFO: flawed TBM headers: 0
[11:21:28.036] <TB3> INFO: flawed TBM trailers: 0
[11:21:28.036] <TB3> INFO: event ID mismatches: 0
[11:21:28.036] <TB3> INFO: ROC errors: 0
[11:21:28.036] <TB3> INFO: missing ROC header(s): 0
[11:21:28.036] <TB3> INFO: misplaced readback start: 0
[11:21:28.036] <TB3> INFO: Pixel decoding errors: 0
[11:21:28.036] <TB3> INFO: pixel data incomplete: 0
[11:21:28.036] <TB3> INFO: pixel address: 0
[11:21:28.036] <TB3> INFO: pulse height fill bit: 0
[11:21:28.036] <TB3> INFO: buffer corruption: 0
[11:21:28.054] <TB3> INFO: Decoding statistics:
[11:21:28.054] <TB3> INFO: General information:
[11:21:28.054] <TB3> INFO: 16bit words read: 3457242
[11:21:28.054] <TB3> INFO: valid events total: 353536
[11:21:28.054] <TB3> INFO: empty events: 18235
[11:21:28.054] <TB3> INFO: valid events with pixels: 335301
[11:21:28.054] <TB3> INFO: valid pixel hits: 668013
[11:21:28.054] <TB3> INFO: Event errors: 0
[11:21:28.054] <TB3> INFO: start marker: 0
[11:21:28.054] <TB3> INFO: stop marker: 0
[11:21:28.054] <TB3> INFO: overflow: 0
[11:21:28.054] <TB3> INFO: invalid 5bit words: 0
[11:21:28.054] <TB3> INFO: invalid XOR eye diagram: 0
[11:21:28.054] <TB3> INFO: frame (failed synchr.): 0
[11:21:28.054] <TB3> INFO: idle data (no TBM trl): 0
[11:21:28.055] <TB3> INFO: no data (only TBM hdr): 0
[11:21:28.055] <TB3> INFO: TBM errors: 0
[11:21:28.055] <TB3> INFO: flawed TBM headers: 0
[11:21:28.055] <TB3> INFO: flawed TBM trailers: 0
[11:21:28.055] <TB3> INFO: event ID mismatches: 0
[11:21:28.055] <TB3> INFO: ROC errors: 0
[11:21:28.055] <TB3> INFO: missing ROC header(s): 0
[11:21:28.055] <TB3> INFO: misplaced readback start: 0
[11:21:28.055] <TB3> INFO: Pixel decoding errors: 0
[11:21:28.055] <TB3> INFO: pixel data incomplete: 0
[11:21:28.055] <TB3> INFO: pixel address: 0
[11:21:28.055] <TB3> INFO: pulse height fill bit: 0
[11:21:28.055] <TB3> INFO: buffer corruption: 0
[11:21:28.055] <TB3> INFO: enter test to run
[11:21:28.055] <TB3> INFO: test: exit no parameter change
[11:21:28.186] <TB3> QUIET: Connection to board 126 closed.
[11:21:28.187] <TB3> INFO: pXar: this is the end, my friend