[11:46:00.030] <TB3> INFO: *** Welcome to pxar ***
[11:46:00.030] <TB3> INFO: *** Today: 2016/11/14
[11:46:00.038] <TB3> INFO: *** Version: c8ba-dirty
[11:46:00.038] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C15.dat
[11:46:00.038] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1b.dat
[11:46:00.038] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//defaultMaskFile.dat
[11:46:00.038] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters_C15.dat
[11:46:00.102] <TB3> INFO: clk: 4
[11:46:00.102] <TB3> INFO: ctr: 4
[11:46:00.102] <TB3> INFO: sda: 19
[11:46:00.102] <TB3> INFO: tin: 9
[11:46:00.102] <TB3> INFO: level: 15
[11:46:00.102] <TB3> INFO: triggerdelay: 0
[11:46:00.102] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[11:46:00.102] <TB3> INFO: Log level: INFO
[11:46:00.110] <TB3> INFO: Found DTB DTB_WWVASW
[11:46:00.119] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[11:46:00.121] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:46:00.123] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[11:46:01.620] <TB3> INFO: DUT info:
[11:46:01.620] <TB3> INFO: The DUT currently contains the following objects:
[11:46:01.620] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[11:46:01.620] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:46:01.620] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:46:01.620] <TB3> INFO: TBM Core alpha (2): 7 registers set
[11:46:01.620] <TB3> INFO: TBM Core beta (3): 7 registers set
[11:46:01.620] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:46:01.620] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.620] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.621] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.621] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.621] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:01.621] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:46:02.022] <TB3> INFO: enter 'restricted' command line mode
[11:46:02.022] <TB3> INFO: enter test to run
[11:46:02.022] <TB3> INFO: test: pretest no parameter change
[11:46:02.022] <TB3> INFO: running: pretest
[11:46:02.029] <TB3> INFO: ######################################################################
[11:46:02.029] <TB3> INFO: PixTestPretest::doTest()
[11:46:02.029] <TB3> INFO: ######################################################################
[11:46:02.030] <TB3> INFO: ----------------------------------------------------------------------
[11:46:02.031] <TB3> INFO: PixTestPretest::programROC()
[11:46:02.031] <TB3> INFO: ----------------------------------------------------------------------
[11:46:20.045] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:46:20.045] <TB3> INFO: IA differences per ROC: 20.1 18.5 18.5 20.9 18.5 17.7 20.9 19.3 20.9 20.1 15.3 18.5 17.7 20.1 18.5 17.7
[11:46:20.111] <TB3> INFO: ----------------------------------------------------------------------
[11:46:20.111] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:46:20.111] <TB3> INFO: ----------------------------------------------------------------------
[11:46:29.838] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 395.5 mA = 24.7188 mA/ROC
[11:46:29.838] <TB3> INFO: i(loss) [mA/ROC]: 20.1 23.3 18.5 20.9 20.9 21.7 20.9 19.3 20.9 19.3 20.1 18.5 19.3 19.3 19.3 18.5
[11:46:29.875] <TB3> INFO: ----------------------------------------------------------------------
[11:46:29.875] <TB3> INFO: PixTestPretest::findTiming()
[11:46:29.875] <TB3> INFO: ----------------------------------------------------------------------
[11:46:29.875] <TB3> INFO: PixTestCmd::init()

[11:47:02.299] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:47:02.299] <TB3> INFO: (success/tries = 100/100), width = 4
[11:47:03.797] <TB3> INFO: ----------------------------------------------------------------------
[11:47:03.797] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:47:03.797] <TB3> INFO: ----------------------------------------------------------------------
[11:47:03.890] <TB3> INFO: Expecting 231680 events.
[11:47:13.746] <TB3> INFO: 231680 events read in total (9265ms).
[11:47:13.752] <TB3> INFO: Test took 9952ms.
[11:47:13.000] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:47:14.035] <TB3> INFO: ----------------------------------------------------------------------
[11:47:14.035] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:47:14.035] <TB3> INFO: ----------------------------------------------------------------------
[11:47:14.131] <TB3> INFO: Expecting 231680 events.
[11:47:24.122] <TB3> INFO: 231680 events read in total (9399ms).
[11:47:24.132] <TB3> INFO: Test took 10092ms.
[11:47:24.397] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:47:24.397] <TB3> INFO: CalDel: 68 92 86 79 78 87 77 80 100 97 88 94 81 91 90 78
[11:47:24.397] <TB3> INFO: VthrComp: 53 56 51 52 51 51 51 53 51 51 51 51 51 51 51 53
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C0.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C1.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C2.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C3.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C4.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C5.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C6.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C7.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C8.dat
[11:47:24.400] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C9.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C10.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C11.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C12.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C13.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C14.dat
[11:47:24.401] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters_C15.dat
[11:47:24.401] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0a.dat
[11:47:24.401] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C0b.dat
[11:47:24.401] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1a.dat
[11:47:24.401] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//tbmParameters_C1b.dat
[11:47:24.401] <TB3> INFO: PixTestPretest::doTest() done, duration: 82 seconds
[11:47:24.468] <TB3> INFO: enter test to run
[11:47:24.468] <TB3> INFO: test: FullTest no parameter change
[11:47:24.468] <TB3> INFO: running: fulltest
[11:47:24.468] <TB3> INFO: ######################################################################
[11:47:24.469] <TB3> INFO: PixTestFullTest::doTest()
[11:47:24.469] <TB3> INFO: ######################################################################
[11:47:24.470] <TB3> INFO: ######################################################################
[11:47:24.470] <TB3> INFO: PixTestAlive::doTest()
[11:47:24.470] <TB3> INFO: ######################################################################
[11:47:24.471] <TB3> INFO: ----------------------------------------------------------------------
[11:47:24.471] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:24.471] <TB3> INFO: ----------------------------------------------------------------------
[11:47:24.708] <TB3> INFO: Expecting 41600 events.
[11:47:28.263] <TB3> INFO: 41600 events read in total (2963ms).
[11:47:28.263] <TB3> INFO: Test took 3791ms.
[11:47:28.496] <TB3> INFO: PixTestAlive::aliveTest() done
[11:47:28.496] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[11:47:28.498] <TB3> INFO: ----------------------------------------------------------------------
[11:47:28.498] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:28.498] <TB3> INFO: ----------------------------------------------------------------------
[11:47:28.740] <TB3> INFO: Expecting 41600 events.
[11:47:31.846] <TB3> INFO: 41600 events read in total (2515ms).
[11:47:31.846] <TB3> INFO: Test took 3347ms.
[11:47:31.846] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:47:32.086] <TB3> INFO: PixTestAlive::maskTest() done
[11:47:32.086] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:47:32.088] <TB3> INFO: ----------------------------------------------------------------------
[11:47:32.088] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:47:32.088] <TB3> INFO: ----------------------------------------------------------------------
[11:47:32.333] <TB3> INFO: Expecting 41600 events.
[11:47:35.867] <TB3> INFO: 41600 events read in total (2942ms).
[11:47:35.868] <TB3> INFO: Test took 3778ms.
[11:47:36.103] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[11:47:36.103] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:47:36.103] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:47:36.103] <TB3> INFO: Decoding statistics:
[11:47:36.103] <TB3> INFO: General information:
[11:47:36.103] <TB3> INFO: 16bit words read: 0
[11:47:36.103] <TB3> INFO: valid events total: 0
[11:47:36.103] <TB3> INFO: empty events: 0
[11:47:36.103] <TB3> INFO: valid events with pixels: 0
[11:47:36.103] <TB3> INFO: valid pixel hits: 0
[11:47:36.103] <TB3> INFO: Event errors: 0
[11:47:36.103] <TB3> INFO: start marker: 0
[11:47:36.103] <TB3> INFO: stop marker: 0
[11:47:36.103] <TB3> INFO: overflow: 0
[11:47:36.103] <TB3> INFO: invalid 5bit words: 0
[11:47:36.103] <TB3> INFO: invalid XOR eye diagram: 0
[11:47:36.103] <TB3> INFO: frame (failed synchr.): 0
[11:47:36.104] <TB3> INFO: idle data (no TBM trl): 0
[11:47:36.104] <TB3> INFO: no data (only TBM hdr): 0
[11:47:36.104] <TB3> INFO: TBM errors: 0
[11:47:36.104] <TB3> INFO: flawed TBM headers: 0
[11:47:36.104] <TB3> INFO: flawed TBM trailers: 0
[11:47:36.104] <TB3> INFO: event ID mismatches: 0
[11:47:36.104] <TB3> INFO: ROC errors: 0
[11:47:36.104] <TB3> INFO: missing ROC header(s): 0
[11:47:36.104] <TB3> INFO: misplaced readback start: 0
[11:47:36.104] <TB3> INFO: Pixel decoding errors: 0
[11:47:36.104] <TB3> INFO: pixel data incomplete: 0
[11:47:36.104] <TB3> INFO: pixel address: 0
[11:47:36.104] <TB3> INFO: pulse height fill bit: 0
[11:47:36.104] <TB3> INFO: buffer corruption: 0
[11:47:36.114] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:36.115] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr_C15.dat

[11:47:36.115] <TB3> INFO: ######################################################################
[11:47:36.115] <TB3> INFO: PixTestReadback::doTest()
[11:47:36.115] <TB3> INFO: ######################################################################
[11:47:36.115] <TB3> INFO: ----------------------------------------------------------------------
[11:47:36.115] <TB3> INFO: PixTestReadback::CalibrateVd()
[11:47:36.115] <TB3> INFO: ----------------------------------------------------------------------
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:47:46.087] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:47:46.088] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:46.120] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:47:46.120] <TB3> INFO: ----------------------------------------------------------------------
[11:47:46.120] <TB3> INFO: PixTestReadback::CalibrateVa()
[11:47:46.120] <TB3> INFO: ----------------------------------------------------------------------
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:47:56.059] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:47:56.060] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:47:56.060] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:47:56.060] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:47:56.060] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:47:56.089] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:47:56.089] <TB3> INFO: ----------------------------------------------------------------------
[11:47:56.089] <TB3> INFO: PixTestReadback::readbackVbg()
[11:47:56.089] <TB3> INFO: ----------------------------------------------------------------------
[11:48:03.760] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:48:03.760] <TB3> INFO: ----------------------------------------------------------------------
[11:48:03.760] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[11:48:03.760] <TB3> INFO: ----------------------------------------------------------------------
[11:48:03.760] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:48:03.760] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 163.4calibrated Vbg = 1.21654 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.5calibrated Vbg = 1.20699 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158.1calibrated Vbg = 1.20239 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.6calibrated Vbg = 1.19881 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151.2calibrated Vbg = 1.20783 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.9calibrated Vbg = 1.2155 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 160calibrated Vbg = 1.21193 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 161.8calibrated Vbg = 1.2104 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 162.3calibrated Vbg = 1.20755 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 145.6calibrated Vbg = 1.20351 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158calibrated Vbg = 1.20749 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.6calibrated Vbg = 1.20071 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.1calibrated Vbg = 1.19894 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 164calibrated Vbg = 1.20443 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.4calibrated Vbg = 1.20635 :::*/*/*/*/
[11:48:03.761] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.9calibrated Vbg = 1.21132 :::*/*/*/*/
[11:48:03.764] <TB3> INFO: ----------------------------------------------------------------------
[11:48:03.764] <TB3> INFO: PixTestReadback::CalibrateIa()
[11:48:03.764] <TB3> INFO: ----------------------------------------------------------------------
[11:50:44.572] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C0.dat
[11:50:44.572] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C1.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C2.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C3.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C4.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C5.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C6.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C7.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C8.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C9.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C10.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C11.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C12.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C13.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C14.dat
[11:50:44.573] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//readbackCal_C15.dat
[11:50:44.603] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:50:44.605] <TB3> INFO: PixTestReadback::doTest() done
[11:50:44.606] <TB3> INFO: Decoding statistics:
[11:50:44.606] <TB3> INFO: General information:
[11:50:44.606] <TB3> INFO: 16bit words read: 1536
[11:50:44.606] <TB3> INFO: valid events total: 256
[11:50:44.606] <TB3> INFO: empty events: 256
[11:50:44.606] <TB3> INFO: valid events with pixels: 0
[11:50:44.606] <TB3> INFO: valid pixel hits: 0
[11:50:44.606] <TB3> INFO: Event errors: 0
[11:50:44.606] <TB3> INFO: start marker: 0
[11:50:44.606] <TB3> INFO: stop marker: 0
[11:50:44.606] <TB3> INFO: overflow: 0
[11:50:44.606] <TB3> INFO: invalid 5bit words: 0
[11:50:44.606] <TB3> INFO: invalid XOR eye diagram: 0
[11:50:44.606] <TB3> INFO: frame (failed synchr.): 0
[11:50:44.606] <TB3> INFO: idle data (no TBM trl): 0
[11:50:44.606] <TB3> INFO: no data (only TBM hdr): 0
[11:50:44.606] <TB3> INFO: TBM errors: 0
[11:50:44.606] <TB3> INFO: flawed TBM headers: 0
[11:50:44.606] <TB3> INFO: flawed TBM trailers: 0
[11:50:44.606] <TB3> INFO: event ID mismatches: 0
[11:50:44.606] <TB3> INFO: ROC errors: 0
[11:50:44.606] <TB3> INFO: missing ROC header(s): 0
[11:50:44.606] <TB3> INFO: misplaced readback start: 0
[11:50:44.606] <TB3> INFO: Pixel decoding errors: 0
[11:50:44.606] <TB3> INFO: pixel data incomplete: 0
[11:50:44.606] <TB3> INFO: pixel address: 0
[11:50:44.606] <TB3> INFO: pulse height fill bit: 0
[11:50:44.606] <TB3> INFO: buffer corruption: 0
[11:50:44.658] <TB3> INFO: ######################################################################
[11:50:44.658] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:50:44.658] <TB3> INFO: ######################################################################
[11:50:44.660] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:50:44.705] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:50:44.705] <TB3> INFO: run 1 of 1
[11:50:44.942] <TB3> INFO: Expecting 3120000 events.
[11:51:16.321] <TB3> INFO: 688475 events read in total (30787ms).











[11:51:47.034] <TB3> INFO: 1374450 events read in total (61500ms).











[11:52:17.743] <TB3> INFO: 2056335 events read in total (92209ms).











[11:52:48.420] <TB3> INFO: 2738150 events read in total (122886ms).











[11:53:05.794] <TB3> INFO: 3120000 events read in total (140260ms).
[11:53:05.871] <TB3> INFO: Test took 141167ms.
[11:53:31.461] <TB3> INFO: PixTestBBMap::doTest() done with 4 decoding errors: , duration: 166 seconds
[11:53:31.461] <TB3> INFO: number of dead bumps (per ROC): 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:53:31.461] <TB3> INFO: separation cut (per ROC): 130 151 105 140 124 126 129 140 126 108 105 120 113 113 118 118
[11:53:31.462] <TB3> INFO: Decoding statistics:
[11:53:31.462] <TB3> INFO: General information:
[11:53:31.462] <TB3> INFO: 16bit words read: 0
[11:53:31.462] <TB3> INFO: valid events total: 0
[11:53:31.462] <TB3> INFO: empty events: 0
[11:53:31.462] <TB3> INFO: valid events with pixels: 0
[11:53:31.462] <TB3> INFO: valid pixel hits: 0
[11:53:31.462] <TB3> INFO: Event errors: 0
[11:53:31.462] <TB3> INFO: start marker: 0
[11:53:31.462] <TB3> INFO: stop marker: 0
[11:53:31.462] <TB3> INFO: overflow: 0
[11:53:31.462] <TB3> INFO: invalid 5bit words: 0
[11:53:31.462] <TB3> INFO: invalid XOR eye diagram: 0
[11:53:31.462] <TB3> INFO: frame (failed synchr.): 0
[11:53:31.462] <TB3> INFO: idle data (no TBM trl): 0
[11:53:31.462] <TB3> INFO: no data (only TBM hdr): 0
[11:53:31.462] <TB3> INFO: TBM errors: 0
[11:53:31.462] <TB3> INFO: flawed TBM headers: 0
[11:53:31.462] <TB3> INFO: flawed TBM trailers: 0
[11:53:31.462] <TB3> INFO: event ID mismatches: 0
[11:53:31.462] <TB3> INFO: ROC errors: 0
[11:53:31.462] <TB3> INFO: missing ROC header(s): 0
[11:53:31.462] <TB3> INFO: misplaced readback start: 0
[11:53:31.462] <TB3> INFO: Pixel decoding errors: 0
[11:53:31.462] <TB3> INFO: pixel data incomplete: 0
[11:53:31.462] <TB3> INFO: pixel address: 0
[11:53:31.462] <TB3> INFO: pulse height fill bit: 0
[11:53:31.462] <TB3> INFO: buffer corruption: 0
[11:53:31.510] <TB3> INFO: ######################################################################
[11:53:31.510] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:53:31.510] <TB3> INFO: ######################################################################
[11:53:31.510] <TB3> INFO: ----------------------------------------------------------------------
[11:53:31.510] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:53:31.510] <TB3> INFO: ----------------------------------------------------------------------
[11:53:31.511] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:53:31.523] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:53:31.524] <TB3> INFO: run 1 of 1
[11:53:31.810] <TB3> INFO: Expecting 36608000 events.
[11:53:55.586] <TB3> INFO: 699800 events read in total (23184ms).
[11:54:18.363] <TB3> INFO: 1378950 events read in total (45961ms).
[11:54:41.251] <TB3> INFO: 2064750 events read in total (68849ms).
[11:55:03.903] <TB3> INFO: 2743950 events read in total (91501ms).
[11:55:27.320] <TB3> INFO: 3429450 events read in total (114918ms).
[11:55:50.216] <TB3> INFO: 4110550 events read in total (137814ms).
[11:56:13.116] <TB3> INFO: 4794200 events read in total (160715ms).
[11:56:36.268] <TB3> INFO: 5478550 events read in total (183866ms).
[11:56:59.431] <TB3> INFO: 6160800 events read in total (207029ms).
[11:57:22.678] <TB3> INFO: 6841200 events read in total (230276ms).
[11:57:45.858] <TB3> INFO: 7522200 events read in total (253456ms).
[11:58:08.770] <TB3> INFO: 8205150 events read in total (276368ms).
[11:58:31.697] <TB3> INFO: 8887000 events read in total (299295ms).
[11:58:54.802] <TB3> INFO: 9565600 events read in total (322400ms).
[11:59:17.825] <TB3> INFO: 10247700 events read in total (345424ms).
[11:59:40.835] <TB3> INFO: 10928500 events read in total (368433ms).
[12:00:03.894] <TB3> INFO: 11606950 events read in total (391492ms).
[12:00:27.146] <TB3> INFO: 12286300 events read in total (414744ms).
[12:00:50.273] <TB3> INFO: 12964900 events read in total (437871ms).
[12:01:13.212] <TB3> INFO: 13643950 events read in total (460810ms).
[12:01:36.093] <TB3> INFO: 14319250 events read in total (483691ms).
[12:01:59.298] <TB3> INFO: 14998300 events read in total (506896ms).
[12:02:22.325] <TB3> INFO: 15675100 events read in total (529923ms).
[12:02:45.000] <TB3> INFO: 16353900 events read in total (553598ms).
[12:03:09.060] <TB3> INFO: 17029100 events read in total (576658ms).
[12:03:32.252] <TB3> INFO: 17706500 events read in total (599850ms).
[12:03:55.307] <TB3> INFO: 18380050 events read in total (622905ms).
[12:04:18.483] <TB3> INFO: 19054350 events read in total (646081ms).
[12:04:41.571] <TB3> INFO: 19726200 events read in total (669169ms).
[12:05:04.827] <TB3> INFO: 20400250 events read in total (692425ms).
[12:05:27.808] <TB3> INFO: 21070350 events read in total (715406ms).
[12:05:50.904] <TB3> INFO: 21744450 events read in total (738502ms).
[12:06:14.038] <TB3> INFO: 22418100 events read in total (761636ms).
[12:06:37.170] <TB3> INFO: 23090000 events read in total (784768ms).
[12:07:00.255] <TB3> INFO: 23760250 events read in total (807853ms).
[12:07:23.603] <TB3> INFO: 24432600 events read in total (831201ms).
[12:07:46.727] <TB3> INFO: 25103400 events read in total (854325ms).
[12:08:09.750] <TB3> INFO: 25774750 events read in total (877348ms).
[12:08:33.040] <TB3> INFO: 26445350 events read in total (900638ms).
[12:08:56.018] <TB3> INFO: 27117850 events read in total (923616ms).
[12:09:18.663] <TB3> INFO: 27789100 events read in total (946261ms).
[12:09:41.606] <TB3> INFO: 28459000 events read in total (969204ms).
[12:10:04.636] <TB3> INFO: 29133450 events read in total (992234ms).
[12:10:27.892] <TB3> INFO: 29803750 events read in total (1015490ms).
[12:10:50.749] <TB3> INFO: 30473100 events read in total (1038347ms).
[12:11:13.480] <TB3> INFO: 31141000 events read in total (1061078ms).
[12:11:36.435] <TB3> INFO: 31811050 events read in total (1084033ms).
[12:11:59.380] <TB3> INFO: 32479800 events read in total (1106978ms).
[12:12:22.209] <TB3> INFO: 33152750 events read in total (1129807ms).
[12:12:45.374] <TB3> INFO: 33824900 events read in total (1152972ms).
[12:13:08.442] <TB3> INFO: 34499750 events read in total (1176040ms).
[12:13:31.313] <TB3> INFO: 35167500 events read in total (1198911ms).
[12:13:54.275] <TB3> INFO: 35841300 events read in total (1221873ms).
[12:14:17.804] <TB3> INFO: 36526750 events read in total (1245402ms).
[12:14:20.844] <TB3> INFO: 36608000 events read in total (1248442ms).
[12:14:21.019] <TB3> INFO: Test took 1249495ms.
[12:14:21.329] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:22.768] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:24.238] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:25.731] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:27.237] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:28.690] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:30.227] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:32.172] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:33.976] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:36.092] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:38.092] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:40.075] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:42.115] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:43.939] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:45.687] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:47.190] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:14:49.037] <TB3> INFO: PixTestScurves::scurves() done
[12:14:49.037] <TB3> INFO: Vcal mean: 135.68 146.47 111.74 133.38 118.92 126.05 136.48 136.34 134.45 121.41 117.39 131.87 123.17 113.70 125.54 125.23
[12:14:49.037] <TB3> INFO: Vcal RMS: 6.08 6.31 5.53 6.00 5.91 6.01 6.22 6.12 6.42 5.87 6.07 5.90 6.53 5.39 6.09 6.26
[12:14:49.037] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1277 seconds
[12:14:49.037] <TB3> INFO: Decoding statistics:
[12:14:49.037] <TB3> INFO: General information:
[12:14:49.037] <TB3> INFO: 16bit words read: 0
[12:14:49.037] <TB3> INFO: valid events total: 0
[12:14:49.037] <TB3> INFO: empty events: 0
[12:14:49.037] <TB3> INFO: valid events with pixels: 0
[12:14:49.037] <TB3> INFO: valid pixel hits: 0
[12:14:49.037] <TB3> INFO: Event errors: 0
[12:14:49.037] <TB3> INFO: start marker: 0
[12:14:49.037] <TB3> INFO: stop marker: 0
[12:14:49.037] <TB3> INFO: overflow: 0
[12:14:49.037] <TB3> INFO: invalid 5bit words: 0
[12:14:49.037] <TB3> INFO: invalid XOR eye diagram: 0
[12:14:49.037] <TB3> INFO: frame (failed synchr.): 0
[12:14:49.037] <TB3> INFO: idle data (no TBM trl): 0
[12:14:49.037] <TB3> INFO: no data (only TBM hdr): 0
[12:14:49.037] <TB3> INFO: TBM errors: 0
[12:14:49.037] <TB3> INFO: flawed TBM headers: 0
[12:14:49.037] <TB3> INFO: flawed TBM trailers: 0
[12:14:49.037] <TB3> INFO: event ID mismatches: 0
[12:14:49.037] <TB3> INFO: ROC errors: 0
[12:14:49.037] <TB3> INFO: missing ROC header(s): 0
[12:14:49.038] <TB3> INFO: misplaced readback start: 0
[12:14:49.038] <TB3> INFO: Pixel decoding errors: 0
[12:14:49.038] <TB3> INFO: pixel data incomplete: 0
[12:14:49.038] <TB3> INFO: pixel address: 0
[12:14:49.038] <TB3> INFO: pulse height fill bit: 0
[12:14:49.038] <TB3> INFO: buffer corruption: 0
[12:14:49.124] <TB3> INFO: ######################################################################
[12:14:49.124] <TB3> INFO: PixTestTrim::doTest()
[12:14:49.124] <TB3> INFO: ######################################################################
[12:14:49.126] <TB3> INFO: ----------------------------------------------------------------------
[12:14:49.128] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:14:49.128] <TB3> INFO: ----------------------------------------------------------------------
[12:14:49.198] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:14:49.198] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:14:49.212] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:14:49.212] <TB3> INFO: run 1 of 1
[12:14:49.531] <TB3> INFO: Expecting 5025280 events.
[12:15:20.669] <TB3> INFO: 829488 events read in total (30538ms).
[12:15:50.734] <TB3> INFO: 1656360 events read in total (60603ms).
[12:16:20.954] <TB3> INFO: 2479608 events read in total (90824ms).
[12:16:50.838] <TB3> INFO: 3298184 events read in total (120707ms).
[12:17:20.574] <TB3> INFO: 4114600 events read in total (150443ms).
[12:17:51.149] <TB3> INFO: 4929392 events read in total (181018ms).
[12:17:55.261] <TB3> INFO: 5025280 events read in total (185130ms).
[12:17:55.324] <TB3> INFO: Test took 186112ms.
[12:18:11.608] <TB3> INFO: ROC 0 VthrComp = 133
[12:18:11.608] <TB3> INFO: ROC 1 VthrComp = 147
[12:18:11.608] <TB3> INFO: ROC 2 VthrComp = 112
[12:18:11.609] <TB3> INFO: ROC 3 VthrComp = 140
[12:18:11.609] <TB3> INFO: ROC 4 VthrComp = 128
[12:18:11.609] <TB3> INFO: ROC 5 VthrComp = 132
[12:18:11.610] <TB3> INFO: ROC 6 VthrComp = 131
[12:18:11.610] <TB3> INFO: ROC 7 VthrComp = 140
[12:18:11.610] <TB3> INFO: ROC 8 VthrComp = 132
[12:18:11.611] <TB3> INFO: ROC 9 VthrComp = 123
[12:18:11.611] <TB3> INFO: ROC 10 VthrComp = 119
[12:18:11.611] <TB3> INFO: ROC 11 VthrComp = 128
[12:18:11.611] <TB3> INFO: ROC 12 VthrComp = 125
[12:18:11.611] <TB3> INFO: ROC 13 VthrComp = 123
[12:18:11.611] <TB3> INFO: ROC 14 VthrComp = 126
[12:18:11.611] <TB3> INFO: ROC 15 VthrComp = 125
[12:18:11.937] <TB3> INFO: Expecting 41600 events.
[12:18:15.397] <TB3> INFO: 41600 events read in total (2868ms).
[12:18:15.398] <TB3> INFO: Test took 3785ms.
[12:18:15.408] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:18:15.408] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:18:15.420] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:18:15.420] <TB3> INFO: run 1 of 1
[12:18:15.698] <TB3> INFO: Expecting 5025280 events.
[12:18:41.929] <TB3> INFO: 590800 events read in total (25639ms).
[12:19:08.083] <TB3> INFO: 1179840 events read in total (51793ms).
[12:19:33.831] <TB3> INFO: 1769016 events read in total (77541ms).
[12:19:59.778] <TB3> INFO: 2357424 events read in total (103488ms).
[12:20:25.766] <TB3> INFO: 2943648 events read in total (129476ms).
[12:20:51.652] <TB3> INFO: 3528528 events read in total (155362ms).
[12:21:18.081] <TB3> INFO: 4112432 events read in total (181791ms).
[12:21:43.906] <TB3> INFO: 4696064 events read in total (207616ms).
[12:21:58.781] <TB3> INFO: 5025280 events read in total (222491ms).
[12:21:58.933] <TB3> INFO: Test took 223513ms.
[12:22:24.410] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 66.6137 for pixel 2/21 mean/min/max = 51.1467/35.6574/66.6359
[12:22:24.411] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 72.7445 for pixel 0/15 mean/min/max = 56.2621/39.7618/72.7624
[12:22:24.411] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.9094 for pixel 4/72 mean/min/max = 46.3883/32.814/59.9625
[12:22:24.412] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 62.7564 for pixel 10/41 mean/min/max = 50.1217/37.3649/62.8785
[12:22:24.412] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 56.4846 for pixel 0/57 mean/min/max = 44.1513/31.7459/56.5566
[12:22:24.413] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.8624 for pixel 0/25 mean/min/max = 45.5203/32.1159/58.9247
[12:22:24.413] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 68.2984 for pixel 0/8 mean/min/max = 52.7191/37.0475/68.3906
[12:22:24.414] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 66.6827 for pixel 0/48 mean/min/max = 51.8963/37.0529/66.7396
[12:22:24.414] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 63.2553 for pixel 12/79 mean/min/max = 48.6957/34.0712/63.3202
[12:22:24.415] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.5718 for pixel 11/9 mean/min/max = 46.973/33.3365/60.6095
[12:22:24.415] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.2869 for pixel 17/74 mean/min/max = 45.6044/31.7679/59.4408
[12:22:24.416] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 60.5376 for pixel 11/43 mean/min/max = 46.2607/31.718/60.8033
[12:22:24.416] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.2859 for pixel 47/63 mean/min/max = 46.2467/33.1314/59.3621
[12:22:24.417] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.8963 for pixel 0/77 mean/min/max = 45.1664/32.3346/57.9981
[12:22:24.417] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 62.5468 for pixel 0/8 mean/min/max = 46.449/30.3391/62.5588
[12:22:24.417] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.2647 for pixel 4/78 mean/min/max = 46.974/32.3869/61.561
[12:22:24.418] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:22:24.506] <TB3> INFO: Expecting 411648 events.
[12:22:33.898] <TB3> INFO: 411648 events read in total (8800ms).
[12:22:33.907] <TB3> INFO: Expecting 411648 events.
[12:22:43.217] <TB3> INFO: 411648 events read in total (8907ms).
[12:22:43.229] <TB3> INFO: Expecting 411648 events.
[12:22:52.573] <TB3> INFO: 411648 events read in total (8941ms).
[12:22:52.587] <TB3> INFO: Expecting 411648 events.
[12:23:01.969] <TB3> INFO: 411648 events read in total (8979ms).
[12:23:01.994] <TB3> INFO: Expecting 411648 events.
[12:23:11.362] <TB3> INFO: 411648 events read in total (8965ms).
[12:23:11.387] <TB3> INFO: Expecting 411648 events.
[12:23:20.710] <TB3> INFO: 411648 events read in total (8920ms).
[12:23:20.732] <TB3> INFO: Expecting 411648 events.
[12:23:30.054] <TB3> INFO: 411648 events read in total (8918ms).
[12:23:30.086] <TB3> INFO: Expecting 411648 events.
[12:23:39.402] <TB3> INFO: 411648 events read in total (8912ms).
[12:23:39.432] <TB3> INFO: Expecting 411648 events.
[12:23:48.784] <TB3> INFO: 411648 events read in total (8949ms).
[12:23:48.815] <TB3> INFO: Expecting 411648 events.
[12:23:58.218] <TB3> INFO: 411648 events read in total (9000ms).
[12:23:58.262] <TB3> INFO: Expecting 411648 events.
[12:24:07.643] <TB3> INFO: 411648 events read in total (8978ms).
[12:24:07.688] <TB3> INFO: Expecting 411648 events.
[12:24:16.953] <TB3> INFO: 411648 events read in total (8861ms).
[12:24:17.005] <TB3> INFO: Expecting 411648 events.
[12:24:26.394] <TB3> INFO: 411648 events read in total (8986ms).
[12:24:26.449] <TB3> INFO: Expecting 411648 events.
[12:24:35.671] <TB3> INFO: 411648 events read in total (8819ms).
[12:24:35.782] <TB3> INFO: Expecting 411648 events.
[12:24:45.069] <TB3> INFO: 411648 events read in total (8884ms).
[12:24:45.166] <TB3> INFO: Expecting 411648 events.
[12:24:54.478] <TB3> INFO: 411648 events read in total (8909ms).
[12:24:54.567] <TB3> INFO: Test took 150149ms.
[12:24:55.350] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:24:55.363] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:24:55.363] <TB3> INFO: run 1 of 1
[12:24:55.601] <TB3> INFO: Expecting 5025280 events.
[12:25:22.698] <TB3> INFO: 584976 events read in total (26506ms).
[12:25:49.556] <TB3> INFO: 1169184 events read in total (53364ms).
[12:26:16.363] <TB3> INFO: 1752376 events read in total (80171ms).
[12:26:43.586] <TB3> INFO: 2336632 events read in total (107394ms).
[12:27:10.480] <TB3> INFO: 2920488 events read in total (134288ms).
[12:27:37.581] <TB3> INFO: 3504160 events read in total (161389ms).
[12:28:04.455] <TB3> INFO: 4085816 events read in total (188263ms).
[12:28:31.560] <TB3> INFO: 4668088 events read in total (215368ms).
[12:28:48.520] <TB3> INFO: 5025280 events read in total (232328ms).
[12:28:48.704] <TB3> INFO: Test took 233343ms.
[12:29:13.949] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 9.265323 .. 147.621418
[12:29:14.274] <TB3> INFO: Expecting 208000 events.
[12:29:24.928] <TB3> INFO: 208000 events read in total (10062ms).
[12:29:24.929] <TB3> INFO: Test took 10979ms.
[12:29:24.991] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 9 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:29:25.007] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:29:25.007] <TB3> INFO: run 1 of 1
[12:29:25.297] <TB3> INFO: Expecting 4958720 events.
[12:29:52.165] <TB3> INFO: 573024 events read in total (26274ms).
[12:30:18.197] <TB3> INFO: 1145760 events read in total (52307ms).
[12:30:44.795] <TB3> INFO: 1718328 events read in total (78905ms).
[12:31:10.942] <TB3> INFO: 2290944 events read in total (105051ms).
[12:31:36.789] <TB3> INFO: 2864200 events read in total (130898ms).
[12:32:49.893] <TB3> INFO: 3436760 events read in total (204002ms).
[12:33:16.393] <TB3> INFO: 4008880 events read in total (230502ms).
[12:33:42.106] <TB3> INFO: 4580744 events read in total (256215ms).
[12:33:59.268] <TB3> INFO: 4958720 events read in total (273377ms).
[12:33:59.408] <TB3> INFO: Test took 274401ms.
[12:34:23.802] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.683785 .. 46.713234
[12:34:24.134] <TB3> INFO: Expecting 208000 events.
[12:34:34.268] <TB3> INFO: 208000 events read in total (9543ms).
[12:34:34.270] <TB3> INFO: Test took 10466ms.
[12:34:34.350] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:34:34.364] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:34:34.364] <TB3> INFO: run 1 of 1
[12:34:34.721] <TB3> INFO: Expecting 1331200 events.
[12:35:03.181] <TB3> INFO: 654544 events read in total (27868ms).
[12:35:31.274] <TB3> INFO: 1307112 events read in total (55962ms).
[12:35:32.721] <TB3> INFO: 1331200 events read in total (57409ms).
[12:35:32.752] <TB3> INFO: Test took 58389ms.
[12:35:48.077] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.197865 .. 47.837576
[12:35:48.348] <TB3> INFO: Expecting 208000 events.
[12:35:58.222] <TB3> INFO: 208000 events read in total (9283ms).
[12:35:58.223] <TB3> INFO: Test took 10143ms.
[12:35:58.273] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:35:58.287] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:35:58.287] <TB3> INFO: run 1 of 1
[12:35:58.565] <TB3> INFO: Expecting 1431040 events.
[12:36:26.829] <TB3> INFO: 659888 events read in total (27673ms).
[12:36:54.909] <TB3> INFO: 1319496 events read in total (55753ms).
[12:36:59.977] <TB3> INFO: 1431040 events read in total (60821ms).
[12:37:00.012] <TB3> INFO: Test took 61725ms.
[12:37:15.551] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.353584 .. 46.234991
[12:37:15.791] <TB3> INFO: Expecting 208000 events.
[12:37:25.740] <TB3> INFO: 208000 events read in total (9357ms).
[12:37:25.742] <TB3> INFO: Test took 10190ms.
[12:37:25.822] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:37:25.836] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:37:25.836] <TB3> INFO: run 1 of 1
[12:37:26.160] <TB3> INFO: Expecting 1397760 events.
[12:37:54.381] <TB3> INFO: 664760 events read in total (27629ms).
[12:38:21.735] <TB3> INFO: 1328488 events read in total (54984ms).
[12:38:25.030] <TB3> INFO: 1397760 events read in total (58278ms).
[12:38:25.059] <TB3> INFO: Test took 59224ms.
[12:38:40.598] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:38:40.598] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:38:40.611] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:38:40.611] <TB3> INFO: run 1 of 1
[12:38:40.847] <TB3> INFO: Expecting 1364480 events.
[12:39:09.425] <TB3> INFO: 668984 events read in total (27986ms).
[12:39:37.620] <TB3> INFO: 1336752 events read in total (56181ms).
[12:39:39.284] <TB3> INFO: 1364480 events read in total (57846ms).
[12:39:39.321] <TB3> INFO: Test took 58711ms.
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C0.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C1.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C2.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C3.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C4.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C5.dat
[12:39:54.573] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C6.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C7.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C8.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C9.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C10.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C11.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C12.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C13.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C14.dat
[12:39:54.574] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C15.dat
[12:39:54.574] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C0.dat
[12:39:54.584] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C1.dat
[12:39:54.589] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C2.dat
[12:39:54.593] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C3.dat
[12:39:54.598] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C4.dat
[12:39:54.603] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C5.dat
[12:39:54.608] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C6.dat
[12:39:54.612] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C7.dat
[12:39:54.617] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C8.dat
[12:39:54.622] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C9.dat
[12:39:54.627] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C10.dat
[12:39:54.631] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C11.dat
[12:39:54.636] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C12.dat
[12:39:54.641] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C13.dat
[12:39:54.646] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C14.dat
[12:39:54.650] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//trimParameters35_C15.dat
[12:39:54.655] <TB3> INFO: PixTestTrim::trimTest() done
[12:39:54.655] <TB3> INFO: vtrim: 165 190 123 166 123 125 150 155 154 127 126 121 130 122 121 123
[12:39:54.655] <TB3> INFO: vthrcomp: 133 147 112 140 128 132 131 140 132 123 119 128 125 123 126 125
[12:39:54.655] <TB3> INFO: vcal mean: 35.32 35.05 35.17 35.07 35.03 35.07 35.15 35.33 35.14 35.19 35.25 35.51 35.07 34.99 35.56 35.37
[12:39:54.655] <TB3> INFO: vcal RMS: 1.37 1.14 1.14 1.01 1.13 1.01 1.14 1.39 1.11 1.23 1.37 1.67 1.13 0.92 1.83 1.40
[12:39:54.655] <TB3> INFO: bits mean: 8.44 6.48 9.40 7.98 9.98 9.20 7.47 7.87 8.68 9.24 9.84 9.67 9.79 8.85 9.98 9.43
[12:39:54.655] <TB3> INFO: bits RMS: 2.45 2.31 2.67 2.21 2.62 2.86 2.42 2.42 2.61 2.66 2.64 2.81 2.43 2.98 2.81 2.74
[12:39:54.663] <TB3> INFO: ----------------------------------------------------------------------
[12:39:54.663] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:39:54.663] <TB3> INFO: ----------------------------------------------------------------------
[12:39:54.665] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:39:54.678] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:39:54.678] <TB3> INFO: run 1 of 1
[12:39:54.955] <TB3> INFO: Expecting 4160000 events.
[12:40:27.643] <TB3> INFO: 772985 events read in total (32096ms).
[12:41:00.052] <TB3> INFO: 1540380 events read in total (64505ms).
[12:41:32.060] <TB3> INFO: 2300875 events read in total (96513ms).
[12:42:04.251] <TB3> INFO: 3057755 events read in total (128704ms).
[12:42:36.479] <TB3> INFO: 3811855 events read in total (160932ms).
[12:42:51.661] <TB3> INFO: 4160000 events read in total (176114ms).
[12:42:51.745] <TB3> INFO: Test took 177066ms.
[12:43:15.605] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[12:43:15.618] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:43:15.618] <TB3> INFO: run 1 of 1
[12:43:15.855] <TB3> INFO: Expecting 4492800 events.
[12:43:47.183] <TB3> INFO: 725500 events read in total (30736ms).
[12:44:18.644] <TB3> INFO: 1446905 events read in total (62197ms).
[12:44:49.583] <TB3> INFO: 2164720 events read in total (93136ms).
[12:45:20.520] <TB3> INFO: 2878755 events read in total (124073ms).
[12:45:51.684] <TB3> INFO: 3590515 events read in total (155237ms).
[12:46:22.718] <TB3> INFO: 4301775 events read in total (186271ms).
[12:46:31.366] <TB3> INFO: 4492800 events read in total (194919ms).
[12:46:31.501] <TB3> INFO: Test took 195882ms.
[12:47:03.641] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[12:47:03.654] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:47:03.654] <TB3> INFO: run 1 of 1
[12:47:03.981] <TB3> INFO: Expecting 4534400 events.
[12:47:35.947] <TB3> INFO: 722700 events read in total (31375ms).
[12:48:07.629] <TB3> INFO: 1442890 events read in total (63057ms).
[12:48:39.234] <TB3> INFO: 2159240 events read in total (94662ms).
[12:49:10.291] <TB3> INFO: 2871155 events read in total (125719ms).
[12:49:41.153] <TB3> INFO: 3581795 events read in total (156581ms).
[12:50:12.222] <TB3> INFO: 4291545 events read in total (187650ms).
[12:50:23.035] <TB3> INFO: 4534400 events read in total (198463ms).
[12:50:23.159] <TB3> INFO: Test took 199504ms.
[12:50:54.048] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[12:50:54.061] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:50:54.061] <TB3> INFO: run 1 of 1
[12:50:54.297] <TB3> INFO: Expecting 4472000 events.
[12:51:26.397] <TB3> INFO: 726580 events read in total (31508ms).
[12:51:57.724] <TB3> INFO: 1450365 events read in total (62835ms).
[12:52:29.557] <TB3> INFO: 2170350 events read in total (94668ms).
[12:53:00.741] <TB3> INFO: 2885200 events read in total (125852ms).
[12:53:32.015] <TB3> INFO: 3599005 events read in total (157126ms).
[12:54:03.304] <TB3> INFO: 4312105 events read in total (188415ms).
[12:54:10.462] <TB3> INFO: 4472000 events read in total (195573ms).
[12:54:10.548] <TB3> INFO: Test took 196487ms.
[12:54:37.931] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[12:54:37.944] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:54:37.944] <TB3> INFO: run 1 of 1
[12:54:38.182] <TB3> INFO: Expecting 4472000 events.
[12:55:10.409] <TB3> INFO: 726640 events read in total (31635ms).
[12:55:42.009] <TB3> INFO: 1450265 events read in total (63235ms).
[12:56:13.791] <TB3> INFO: 2169815 events read in total (95017ms).
[12:56:45.140] <TB3> INFO: 2885135 events read in total (126366ms).
[12:57:16.536] <TB3> INFO: 3599030 events read in total (157762ms).
[12:57:48.019] <TB3> INFO: 4311590 events read in total (189245ms).
[12:57:55.647] <TB3> INFO: 4472000 events read in total (196873ms).
[12:57:55.807] <TB3> INFO: Test took 197863ms.
[12:58:24.075] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:58:24.076] <TB3> INFO: PixTestTrim::doTest() done, duration: 2614 seconds
[12:58:24.076] <TB3> INFO: Decoding statistics:
[12:58:24.076] <TB3> INFO: General information:
[12:58:24.076] <TB3> INFO: 16bit words read: 0
[12:58:24.076] <TB3> INFO: valid events total: 0
[12:58:24.076] <TB3> INFO: empty events: 0
[12:58:24.076] <TB3> INFO: valid events with pixels: 0
[12:58:24.076] <TB3> INFO: valid pixel hits: 0
[12:58:24.076] <TB3> INFO: Event errors: 0
[12:58:24.076] <TB3> INFO: start marker: 0
[12:58:24.076] <TB3> INFO: stop marker: 0
[12:58:24.076] <TB3> INFO: overflow: 0
[12:58:24.076] <TB3> INFO: invalid 5bit words: 0
[12:58:24.076] <TB3> INFO: invalid XOR eye diagram: 0
[12:58:24.076] <TB3> INFO: frame (failed synchr.): 0
[12:58:24.076] <TB3> INFO: idle data (no TBM trl): 0
[12:58:24.076] <TB3> INFO: no data (only TBM hdr): 0
[12:58:24.076] <TB3> INFO: TBM errors: 0
[12:58:24.076] <TB3> INFO: flawed TBM headers: 0
[12:58:24.076] <TB3> INFO: flawed TBM trailers: 0
[12:58:24.076] <TB3> INFO: event ID mismatches: 0
[12:58:24.076] <TB3> INFO: ROC errors: 0
[12:58:24.076] <TB3> INFO: missing ROC header(s): 0
[12:58:24.076] <TB3> INFO: misplaced readback start: 0
[12:58:24.076] <TB3> INFO: Pixel decoding errors: 0
[12:58:24.076] <TB3> INFO: pixel data incomplete: 0
[12:58:24.076] <TB3> INFO: pixel address: 0
[12:58:24.076] <TB3> INFO: pulse height fill bit: 0
[12:58:24.076] <TB3> INFO: buffer corruption: 0
[12:58:24.673] <TB3> INFO: ######################################################################
[12:58:24.673] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:58:24.673] <TB3> INFO: ######################################################################
[12:58:24.913] <TB3> INFO: Expecting 41600 events.
[12:58:28.527] <TB3> INFO: 41600 events read in total (3022ms).
[12:58:28.528] <TB3> INFO: Test took 3854ms.
[12:58:28.967] <TB3> INFO: Expecting 41600 events.
[12:58:32.486] <TB3> INFO: 41600 events read in total (2927ms).
[12:58:32.487] <TB3> INFO: Test took 3756ms.
[12:58:32.497] <TB3> INFO: Max pixel from chip 0 is [6 ,10] phvalue 181
[12:58:32.497] <TB3> INFO: Max pixel from chip 1 is [14 ,6] phvalue 186
[12:58:32.497] <TB3> INFO: Max pixel from chip 2 is [6 ,14] phvalue 113
[12:58:32.498] <TB3> INFO: Max pixel from chip 3 is [18 ,8] phvalue 94
[12:58:32.498] <TB3> INFO: Max pixel from chip 4 is [7 ,32] phvalue 130
[12:58:32.498] <TB3> INFO: Max pixel from chip 5 is [23 ,43] phvalue 129
[12:58:32.498] <TB3> INFO: Max pixel from chip 6 is [8 ,8] phvalue 156
[12:58:32.498] <TB3> INFO: Max pixel from chip 7 is [4 ,9] phvalue 56
[12:58:32.499] <TB3> INFO: Max pixel from chip 8 is [4 ,24] phvalue 105
[12:58:32.499] <TB3> INFO: Max pixel from chip 9 is [21 ,8] phvalue 109
[12:58:32.499] <TB3> INFO: Max pixel from chip 10 is [5 ,6] phvalue 74
[12:58:32.499] <TB3> INFO: Max pixel from chip 11 is [13 ,5] phvalue 156
[12:58:32.499] <TB3> INFO: Max pixel from chip 12 is [12 ,22] phvalue 147
[12:58:32.499] <TB3> INFO: Max pixel from chip 13 is [12 ,9] phvalue 62
[12:58:32.500] <TB3> INFO: Max pixel from chip 14 is [6 ,13] phvalue 137
[12:58:32.500] <TB3> INFO: Max pixel from chip 15 is [5 ,72] phvalue 112
[12:58:32.782] <TB3> INFO: Expecting 41600 events.
[12:58:36.271] <TB3> INFO: 41600 events read in total (2897ms).
[12:58:36.272] <TB3> INFO: Test took 3758ms.
[12:58:36.285] <TB3> INFO: Min pixel from chip 0 is [3 ,5] phvalue 255
[12:58:36.285] <TB3> INFO: Min pixel from chip 1 is [3 ,5] phvalue 255
[12:58:36.285] <TB3> INFO: Min pixel from chip 2 is [3 ,5] phvalue 255
[12:58:36.285] <TB3> INFO: Min pixel from chip 3 is [3 ,5] phvalue 255
[12:58:36.285] <TB3> INFO: Min pixel from chip 4 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 5 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 6 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 7 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 8 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 9 is [3 ,5] phvalue 255
[12:58:36.286] <TB3> INFO: Min pixel from chip 10 is [20 ,22] phvalue 252
[12:58:36.287] <TB3> INFO: Min pixel from chip 11 is [3 ,5] phvalue 255
[12:58:36.287] <TB3> INFO: Min pixel from chip 12 is [3 ,5] phvalue 255
[12:58:36.287] <TB3> INFO: Min pixel from chip 13 is [11 ,30] phvalue 249
[12:58:36.287] <TB3> INFO: Min pixel from chip 14 is [3 ,5] phvalue 255
[12:58:36.287] <TB3> INFO: Min pixel from chip 15 is [3 ,5] phvalue 255
[12:58:36.566] <TB3> INFO: Expecting 2560 events.
[12:58:37.450] <TB3> INFO: 2560 events read in total (293ms).
[12:58:37.450] <TB3> INFO: Test took 1161ms.
[12:58:37.758] <TB3> INFO: Expecting 2560 events.
[12:58:38.647] <TB3> INFO: 2560 events read in total (297ms).
[12:58:38.647] <TB3> INFO: Test took 1196ms.
[12:58:38.955] <TB3> INFO: Expecting 2560 events.
[12:58:39.841] <TB3> INFO: 2560 events read in total (294ms).
[12:58:39.841] <TB3> INFO: Test took 1193ms.
[12:58:40.149] <TB3> INFO: Expecting 2560 events.
[12:58:41.034] <TB3> INFO: 2560 events read in total (294ms).
[12:58:41.034] <TB3> INFO: Test took 1192ms.
[12:58:41.342] <TB3> INFO: Expecting 2560 events.
[12:58:42.223] <TB3> INFO: 2560 events read in total (289ms).
[12:58:42.223] <TB3> INFO: Test took 1188ms.
[12:58:42.530] <TB3> INFO: Expecting 2560 events.
[12:58:43.416] <TB3> INFO: 2560 events read in total (294ms).
[12:58:43.416] <TB3> INFO: Test took 1192ms.
[12:58:43.725] <TB3> INFO: Expecting 2560 events.
[12:58:44.604] <TB3> INFO: 2560 events read in total (288ms).
[12:58:44.605] <TB3> INFO: Test took 1188ms.
[12:58:44.912] <TB3> INFO: Expecting 2560 events.
[12:58:45.795] <TB3> INFO: 2560 events read in total (291ms).
[12:58:45.795] <TB3> INFO: Test took 1190ms.
[12:58:46.103] <TB3> INFO: Expecting 2560 events.
[12:58:46.984] <TB3> INFO: 2560 events read in total (290ms).
[12:58:46.984] <TB3> INFO: Test took 1189ms.
[12:58:47.289] <TB3> INFO: Expecting 2560 events.
[12:58:48.172] <TB3> INFO: 2560 events read in total (291ms).
[12:58:48.172] <TB3> INFO: Test took 1187ms.
[12:58:48.480] <TB3> INFO: Expecting 2560 events.
[12:58:49.362] <TB3> INFO: 2560 events read in total (291ms).
[12:58:49.363] <TB3> INFO: Test took 1190ms.
[12:58:49.671] <TB3> INFO: Expecting 2560 events.
[12:58:50.552] <TB3> INFO: 2560 events read in total (289ms).
[12:58:50.552] <TB3> INFO: Test took 1189ms.
[12:58:50.859] <TB3> INFO: Expecting 2560 events.
[12:58:51.745] <TB3> INFO: 2560 events read in total (294ms).
[12:58:51.745] <TB3> INFO: Test took 1192ms.
[12:58:52.053] <TB3> INFO: Expecting 2560 events.
[12:58:52.940] <TB3> INFO: 2560 events read in total (295ms).
[12:58:52.940] <TB3> INFO: Test took 1194ms.
[12:58:53.247] <TB3> INFO: Expecting 2560 events.
[12:58:54.140] <TB3> INFO: 2560 events read in total (301ms).
[12:58:54.140] <TB3> INFO: Test took 1199ms.
[12:58:54.447] <TB3> INFO: Expecting 2560 events.
[12:58:55.337] <TB3> INFO: 2560 events read in total (298ms).
[12:58:55.338] <TB3> INFO: Test took 1196ms.
[12:58:55.342] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:58:55.646] <TB3> INFO: Expecting 655360 events.
[12:59:10.464] <TB3> INFO: 655360 events read in total (14226ms).
[12:59:10.479] <TB3> INFO: Expecting 655360 events.
[12:59:24.937] <TB3> INFO: 655360 events read in total (14054ms).
[12:59:24.955] <TB3> INFO: Expecting 655360 events.
[12:59:39.193] <TB3> INFO: 655360 events read in total (13835ms).
[12:59:39.218] <TB3> INFO: Expecting 655360 events.
[12:59:53.778] <TB3> INFO: 655360 events read in total (14157ms).
[12:59:53.806] <TB3> INFO: Expecting 655360 events.
[13:00:08.438] <TB3> INFO: 655360 events read in total (14229ms).
[13:00:08.480] <TB3> INFO: Expecting 655360 events.
[13:00:23.241] <TB3> INFO: 655360 events read in total (14358ms).
[13:00:23.281] <TB3> INFO: Expecting 655360 events.
[13:00:37.899] <TB3> INFO: 655360 events read in total (14214ms).
[13:00:37.978] <TB3> INFO: Expecting 655360 events.
[13:00:52.472] <TB3> INFO: 655360 events read in total (14091ms).
[13:00:52.519] <TB3> INFO: Expecting 655360 events.
[13:01:07.142] <TB3> INFO: 655360 events read in total (14220ms).
[13:01:07.202] <TB3> INFO: Expecting 655360 events.
[13:01:21.874] <TB3> INFO: 655360 events read in total (14269ms).
[13:01:21.929] <TB3> INFO: Expecting 655360 events.
[13:01:36.615] <TB3> INFO: 655360 events read in total (14282ms).
[13:01:36.682] <TB3> INFO: Expecting 655360 events.
[13:01:51.222] <TB3> INFO: 655360 events read in total (14137ms).
[13:01:51.331] <TB3> INFO: Expecting 655360 events.
[13:02:06.122] <TB3> INFO: 655360 events read in total (14388ms).
[13:02:06.211] <TB3> INFO: Expecting 655360 events.
[13:02:20.651] <TB3> INFO: 655360 events read in total (14037ms).
[13:02:20.758] <TB3> INFO: Expecting 655360 events.
[13:02:35.221] <TB3> INFO: 655360 events read in total (14060ms).
[13:02:35.315] <TB3> INFO: Expecting 655360 events.
[13:02:49.797] <TB3> INFO: 655360 events read in total (14079ms).
[13:02:49.918] <TB3> INFO: Test took 234576ms.
[13:02:50.020] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:50.274] <TB3> INFO: Expecting 655360 events.
[13:03:04.714] <TB3> INFO: 655360 events read in total (13849ms).
[13:03:04.727] <TB3> INFO: Expecting 655360 events.
[13:03:19.135] <TB3> INFO: 655360 events read in total (14005ms).
[13:03:19.156] <TB3> INFO: Expecting 655360 events.
[13:03:33.631] <TB3> INFO: 655360 events read in total (14072ms).
[13:03:33.658] <TB3> INFO: Expecting 655360 events.
[13:03:47.992] <TB3> INFO: 655360 events read in total (13931ms).
[13:03:48.018] <TB3> INFO: Expecting 655360 events.
[13:04:02.575] <TB3> INFO: 655360 events read in total (14154ms).
[13:04:02.605] <TB3> INFO: Expecting 655360 events.
[13:04:17.222] <TB3> INFO: 655360 events read in total (14214ms).
[13:04:17.258] <TB3> INFO: Expecting 655360 events.
[13:04:31.388] <TB3> INFO: 655360 events read in total (13727ms).
[13:04:31.459] <TB3> INFO: Expecting 655360 events.
[13:04:45.693] <TB3> INFO: 655360 events read in total (13830ms).
[13:04:45.755] <TB3> INFO: Expecting 655360 events.
[13:05:00.113] <TB3> INFO: 655360 events read in total (13955ms).
[13:05:00.182] <TB3> INFO: Expecting 655360 events.
[13:05:14.680] <TB3> INFO: 655360 events read in total (14095ms).
[13:05:14.783] <TB3> INFO: Expecting 655360 events.
[13:05:29.201] <TB3> INFO: 655360 events read in total (14015ms).
[13:05:29.311] <TB3> INFO: Expecting 655360 events.
[13:05:43.693] <TB3> INFO: 655360 events read in total (13978ms).
[13:05:43.791] <TB3> INFO: Expecting 655360 events.
[13:05:58.062] <TB3> INFO: 655360 events read in total (13868ms).
[13:05:58.185] <TB3> INFO: Expecting 655360 events.
[13:06:12.445] <TB3> INFO: 655360 events read in total (13857ms).
[13:06:12.609] <TB3> INFO: Expecting 655360 events.
[13:06:26.922] <TB3> INFO: 655360 events read in total (13910ms).
[13:06:27.051] <TB3> INFO: Expecting 655360 events.
[13:06:41.532] <TB3> INFO: 655360 events read in total (14075ms).
[13:06:41.641] <TB3> INFO: Test took 231622ms.
[13:06:41.813] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.818] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:41.824] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:41.830] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:41.835] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.841] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.847] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:41.852] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.858] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:41.864] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:41.869] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:41.875] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:06:41.881] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:06:41.887] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:06:41.892] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:06:41.898] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[13:06:41.904] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[13:06:41.910] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[13:06:41.916] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.922] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.928] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.934] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.939] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:41.945] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:41.951] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:41.957] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:06:41.963] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:06:41.969] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:06:41.974] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:06:41.980] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:41.986] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:41.992] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:41.999] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.007] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.017] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.025] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.034] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.043] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.052] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:06:42.058] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:06:42.066] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:06:42.072] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:06:42.078] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:06:42.113] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C0.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C1.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C2.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C3.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C4.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C5.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C6.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C7.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C8.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C9.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C10.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C11.dat
[13:06:42.114] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C12.dat
[13:06:42.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C13.dat
[13:06:42.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C14.dat
[13:06:42.115] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//dacParameters35_C15.dat
[13:06:42.356] <TB3> INFO: Expecting 41600 events.
[13:06:45.534] <TB3> INFO: 41600 events read in total (2586ms).
[13:06:45.534] <TB3> INFO: Test took 3416ms.
[13:06:45.984] <TB3> INFO: Expecting 41600 events.
[13:06:49.024] <TB3> INFO: 41600 events read in total (2449ms).
[13:06:49.025] <TB3> INFO: Test took 3278ms.
[13:06:49.477] <TB3> INFO: Expecting 41600 events.
[13:06:52.614] <TB3> INFO: 41600 events read in total (2545ms).
[13:06:52.615] <TB3> INFO: Test took 3377ms.
[13:06:52.830] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:52.920] <TB3> INFO: Expecting 2560 events.
[13:06:53.816] <TB3> INFO: 2560 events read in total (300ms).
[13:06:53.816] <TB3> INFO: Test took 986ms.
[13:06:53.819] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:54.124] <TB3> INFO: Expecting 2560 events.
[13:06:55.017] <TB3> INFO: 2560 events read in total (301ms).
[13:06:55.017] <TB3> INFO: Test took 1198ms.
[13:06:55.021] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:55.326] <TB3> INFO: Expecting 2560 events.
[13:06:56.212] <TB3> INFO: 2560 events read in total (294ms).
[13:06:56.212] <TB3> INFO: Test took 1191ms.
[13:06:56.216] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:56.520] <TB3> INFO: Expecting 2560 events.
[13:06:57.414] <TB3> INFO: 2560 events read in total (302ms).
[13:06:57.415] <TB3> INFO: Test took 1199ms.
[13:06:57.417] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:57.723] <TB3> INFO: Expecting 2560 events.
[13:06:58.614] <TB3> INFO: 2560 events read in total (299ms).
[13:06:58.614] <TB3> INFO: Test took 1197ms.
[13:06:58.617] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:06:58.922] <TB3> INFO: Expecting 2560 events.
[13:06:59.815] <TB3> INFO: 2560 events read in total (302ms).
[13:06:59.816] <TB3> INFO: Test took 1200ms.
[13:06:59.819] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:00.124] <TB3> INFO: Expecting 2560 events.
[13:07:01.015] <TB3> INFO: 2560 events read in total (300ms).
[13:07:01.015] <TB3> INFO: Test took 1196ms.
[13:07:01.018] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:01.323] <TB3> INFO: Expecting 2560 events.
[13:07:02.208] <TB3> INFO: 2560 events read in total (293ms).
[13:07:02.208] <TB3> INFO: Test took 1190ms.
[13:07:02.212] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:02.516] <TB3> INFO: Expecting 2560 events.
[13:07:03.398] <TB3> INFO: 2560 events read in total (290ms).
[13:07:03.398] <TB3> INFO: Test took 1186ms.
[13:07:03.402] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:03.706] <TB3> INFO: Expecting 2560 events.
[13:07:04.588] <TB3> INFO: 2560 events read in total (290ms).
[13:07:04.588] <TB3> INFO: Test took 1186ms.
[13:07:04.590] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:04.897] <TB3> INFO: Expecting 2560 events.
[13:07:05.785] <TB3> INFO: 2560 events read in total (296ms).
[13:07:05.785] <TB3> INFO: Test took 1195ms.
[13:07:05.788] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:06.094] <TB3> INFO: Expecting 2560 events.
[13:07:06.975] <TB3> INFO: 2560 events read in total (289ms).
[13:07:06.976] <TB3> INFO: Test took 1188ms.
[13:07:06.979] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:07.285] <TB3> INFO: Expecting 2560 events.
[13:07:08.172] <TB3> INFO: 2560 events read in total (296ms).
[13:07:08.172] <TB3> INFO: Test took 1193ms.
[13:07:08.175] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:08.481] <TB3> INFO: Expecting 2560 events.
[13:07:09.361] <TB3> INFO: 2560 events read in total (288ms).
[13:07:09.361] <TB3> INFO: Test took 1186ms.
[13:07:09.364] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:09.670] <TB3> INFO: Expecting 2560 events.
[13:07:10.561] <TB3> INFO: 2560 events read in total (299ms).
[13:07:10.561] <TB3> INFO: Test took 1198ms.
[13:07:10.564] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:10.870] <TB3> INFO: Expecting 2560 events.
[13:07:11.757] <TB3> INFO: 2560 events read in total (295ms).
[13:07:11.757] <TB3> INFO: Test took 1193ms.
[13:07:11.760] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:12.066] <TB3> INFO: Expecting 2560 events.
[13:07:12.954] <TB3> INFO: 2560 events read in total (296ms).
[13:07:12.954] <TB3> INFO: Test took 1195ms.
[13:07:12.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:13.263] <TB3> INFO: Expecting 2560 events.
[13:07:14.153] <TB3> INFO: 2560 events read in total (298ms).
[13:07:14.153] <TB3> INFO: Test took 1195ms.
[13:07:14.157] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:14.460] <TB3> INFO: Expecting 2560 events.
[13:07:15.351] <TB3> INFO: 2560 events read in total (299ms).
[13:07:15.352] <TB3> INFO: Test took 1196ms.
[13:07:15.356] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:15.659] <TB3> INFO: Expecting 2560 events.
[13:07:16.548] <TB3> INFO: 2560 events read in total (297ms).
[13:07:16.548] <TB3> INFO: Test took 1192ms.
[13:07:16.550] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:16.856] <TB3> INFO: Expecting 2560 events.
[13:07:17.739] <TB3> INFO: 2560 events read in total (291ms).
[13:07:17.739] <TB3> INFO: Test took 1189ms.
[13:07:17.741] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:18.048] <TB3> INFO: Expecting 2560 events.
[13:07:18.936] <TB3> INFO: 2560 events read in total (296ms).
[13:07:18.936] <TB3> INFO: Test took 1195ms.
[13:07:18.940] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:19.243] <TB3> INFO: Expecting 2560 events.
[13:07:20.128] <TB3> INFO: 2560 events read in total (293ms).
[13:07:20.128] <TB3> INFO: Test took 1188ms.
[13:07:20.131] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:20.437] <TB3> INFO: Expecting 2560 events.
[13:07:21.322] <TB3> INFO: 2560 events read in total (293ms).
[13:07:21.322] <TB3> INFO: Test took 1191ms.
[13:07:21.325] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:21.630] <TB3> INFO: Expecting 2560 events.
[13:07:22.517] <TB3> INFO: 2560 events read in total (295ms).
[13:07:22.518] <TB3> INFO: Test took 1193ms.
[13:07:22.520] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:22.826] <TB3> INFO: Expecting 2560 events.
[13:07:23.718] <TB3> INFO: 2560 events read in total (300ms).
[13:07:23.719] <TB3> INFO: Test took 1199ms.
[13:07:23.723] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:24.027] <TB3> INFO: Expecting 2560 events.
[13:07:24.918] <TB3> INFO: 2560 events read in total (299ms).
[13:07:24.918] <TB3> INFO: Test took 1196ms.
[13:07:24.922] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:25.227] <TB3> INFO: Expecting 2560 events.
[13:07:26.115] <TB3> INFO: 2560 events read in total (297ms).
[13:07:26.116] <TB3> INFO: Test took 1194ms.
[13:07:26.118] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:26.425] <TB3> INFO: Expecting 2560 events.
[13:07:27.321] <TB3> INFO: 2560 events read in total (304ms).
[13:07:27.322] <TB3> INFO: Test took 1204ms.
[13:07:27.325] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:27.631] <TB3> INFO: Expecting 2560 events.
[13:07:28.523] <TB3> INFO: 2560 events read in total (300ms).
[13:07:28.523] <TB3> INFO: Test took 1199ms.
[13:07:28.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:28.830] <TB3> INFO: Expecting 2560 events.
[13:07:29.718] <TB3> INFO: 2560 events read in total (296ms).
[13:07:29.719] <TB3> INFO: Test took 1192ms.
[13:07:29.726] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:30.027] <TB3> INFO: Expecting 2560 events.
[13:07:30.921] <TB3> INFO: 2560 events read in total (302ms).
[13:07:30.921] <TB3> INFO: Test took 1195ms.
[13:07:31.388] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 546 seconds
[13:07:31.388] <TB3> INFO: PH scale (per ROC): 46 49 49 50 51 35 49 48 54 45 54 36 44 58 48 48
[13:07:31.388] <TB3> INFO: PH offset (per ROC): 91 89 109 112 103 97 99 118 114 107 125 91 96 127 102 110
[13:07:31.395] <TB3> INFO: Decoding statistics:
[13:07:31.396] <TB3> INFO: General information:
[13:07:31.396] <TB3> INFO: 16bit words read: 127832
[13:07:31.396] <TB3> INFO: valid events total: 20480
[13:07:31.396] <TB3> INFO: empty events: 18004
[13:07:31.396] <TB3> INFO: valid events with pixels: 2476
[13:07:31.396] <TB3> INFO: valid pixel hits: 2476
[13:07:31.396] <TB3> INFO: Event errors: 0
[13:07:31.396] <TB3> INFO: start marker: 0
[13:07:31.396] <TB3> INFO: stop marker: 0
[13:07:31.396] <TB3> INFO: overflow: 0
[13:07:31.396] <TB3> INFO: invalid 5bit words: 0
[13:07:31.396] <TB3> INFO: invalid XOR eye diagram: 0
[13:07:31.396] <TB3> INFO: frame (failed synchr.): 0
[13:07:31.396] <TB3> INFO: idle data (no TBM trl): 0
[13:07:31.396] <TB3> INFO: no data (only TBM hdr): 0
[13:07:31.396] <TB3> INFO: TBM errors: 0
[13:07:31.396] <TB3> INFO: flawed TBM headers: 0
[13:07:31.396] <TB3> INFO: flawed TBM trailers: 0
[13:07:31.396] <TB3> INFO: event ID mismatches: 0
[13:07:31.396] <TB3> INFO: ROC errors: 0
[13:07:31.396] <TB3> INFO: missing ROC header(s): 0
[13:07:31.396] <TB3> INFO: misplaced readback start: 0
[13:07:31.396] <TB3> INFO: Pixel decoding errors: 0
[13:07:31.396] <TB3> INFO: pixel data incomplete: 0
[13:07:31.396] <TB3> INFO: pixel address: 0
[13:07:31.396] <TB3> INFO: pulse height fill bit: 0
[13:07:31.396] <TB3> INFO: buffer corruption: 0
[13:07:31.553] <TB3> INFO: ######################################################################
[13:07:31.553] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:07:31.553] <TB3> INFO: ######################################################################
[13:07:31.569] <TB3> INFO: scanning low vcal = 10
[13:07:31.850] <TB3> INFO: Expecting 41600 events.
[13:07:35.449] <TB3> INFO: 41600 events read in total (3007ms).
[13:07:35.450] <TB3> INFO: Test took 3880ms.
[13:07:35.453] <TB3> INFO: scanning low vcal = 20
[13:07:35.744] <TB3> INFO: Expecting 41600 events.
[13:07:39.357] <TB3> INFO: 41600 events read in total (3021ms).
[13:07:39.357] <TB3> INFO: Test took 3904ms.
[13:07:39.358] <TB3> INFO: scanning low vcal = 30
[13:07:39.654] <TB3> INFO: Expecting 41600 events.
[13:07:43.335] <TB3> INFO: 41600 events read in total (3089ms).
[13:07:43.336] <TB3> INFO: Test took 3977ms.
[13:07:43.338] <TB3> INFO: scanning low vcal = 40
[13:07:43.615] <TB3> INFO: Expecting 41600 events.
[13:07:47.546] <TB3> INFO: 41600 events read in total (3339ms).
[13:07:47.548] <TB3> INFO: Test took 4210ms.
[13:07:47.552] <TB3> INFO: scanning low vcal = 50
[13:07:47.828] <TB3> INFO: Expecting 41600 events.
[13:07:51.810] <TB3> INFO: 41600 events read in total (3390ms).
[13:07:51.812] <TB3> INFO: Test took 4260ms.
[13:07:51.816] <TB3> INFO: scanning low vcal = 60
[13:07:52.092] <TB3> INFO: Expecting 41600 events.
[13:07:56.145] <TB3> INFO: 41600 events read in total (3461ms).
[13:07:56.146] <TB3> INFO: Test took 4330ms.
[13:07:56.149] <TB3> INFO: scanning low vcal = 70
[13:07:56.434] <TB3> INFO: Expecting 41600 events.
[13:08:00.449] <TB3> INFO: 41600 events read in total (3424ms).
[13:08:00.450] <TB3> INFO: Test took 4301ms.
[13:08:00.454] <TB3> INFO: scanning low vcal = 80
[13:08:00.731] <TB3> INFO: Expecting 41600 events.
[13:08:04.704] <TB3> INFO: 41600 events read in total (3381ms).
[13:08:04.706] <TB3> INFO: Test took 4252ms.
[13:08:04.710] <TB3> INFO: scanning low vcal = 90
[13:08:04.986] <TB3> INFO: Expecting 41600 events.
[13:08:08.986] <TB3> INFO: 41600 events read in total (3409ms).
[13:08:08.988] <TB3> INFO: Test took 4277ms.
[13:08:08.992] <TB3> INFO: scanning low vcal = 100
[13:08:09.268] <TB3> INFO: Expecting 41600 events.
[13:08:13.275] <TB3> INFO: 41600 events read in total (3415ms).
[13:08:13.276] <TB3> INFO: Test took 4284ms.
[13:08:13.279] <TB3> INFO: scanning low vcal = 110
[13:08:13.557] <TB3> INFO: Expecting 41600 events.
[13:08:17.507] <TB3> INFO: 41600 events read in total (3359ms).
[13:08:17.508] <TB3> INFO: Test took 4229ms.
[13:08:17.511] <TB3> INFO: scanning low vcal = 120
[13:08:17.788] <TB3> INFO: Expecting 41600 events.
[13:08:21.762] <TB3> INFO: 41600 events read in total (3382ms).
[13:08:21.764] <TB3> INFO: Test took 4253ms.
[13:08:21.769] <TB3> INFO: scanning low vcal = 130
[13:08:22.045] <TB3> INFO: Expecting 41600 events.
[13:08:26.018] <TB3> INFO: 41600 events read in total (3381ms).
[13:08:26.019] <TB3> INFO: Test took 4250ms.
[13:08:26.022] <TB3> INFO: scanning low vcal = 140
[13:08:26.299] <TB3> INFO: Expecting 41600 events.
[13:08:30.320] <TB3> INFO: 41600 events read in total (3429ms).
[13:08:30.321] <TB3> INFO: Test took 4299ms.
[13:08:30.324] <TB3> INFO: scanning low vcal = 150
[13:08:30.602] <TB3> INFO: Expecting 41600 events.
[13:08:34.626] <TB3> INFO: 41600 events read in total (3433ms).
[13:08:34.627] <TB3> INFO: Test took 4303ms.
[13:08:34.630] <TB3> INFO: scanning low vcal = 160
[13:08:34.907] <TB3> INFO: Expecting 41600 events.
[13:08:38.904] <TB3> INFO: 41600 events read in total (3406ms).
[13:08:38.905] <TB3> INFO: Test took 4275ms.
[13:08:38.908] <TB3> INFO: scanning low vcal = 170
[13:08:39.185] <TB3> INFO: Expecting 41600 events.
[13:08:43.220] <TB3> INFO: 41600 events read in total (3443ms).
[13:08:43.221] <TB3> INFO: Test took 4313ms.
[13:08:43.226] <TB3> INFO: scanning low vcal = 180
[13:08:43.501] <TB3> INFO: Expecting 41600 events.
[13:08:47.504] <TB3> INFO: 41600 events read in total (3411ms).
[13:08:47.505] <TB3> INFO: Test took 4279ms.
[13:08:47.508] <TB3> INFO: scanning low vcal = 190
[13:08:47.786] <TB3> INFO: Expecting 41600 events.
[13:08:51.792] <TB3> INFO: 41600 events read in total (3415ms).
[13:08:51.794] <TB3> INFO: Test took 4285ms.
[13:08:51.797] <TB3> INFO: scanning low vcal = 200
[13:08:52.074] <TB3> INFO: Expecting 41600 events.
[13:08:56.085] <TB3> INFO: 41600 events read in total (3419ms).
[13:08:56.086] <TB3> INFO: Test took 4289ms.
[13:08:56.089] <TB3> INFO: scanning low vcal = 210
[13:08:56.366] <TB3> INFO: Expecting 41600 events.
[13:09:00.438] <TB3> INFO: 41600 events read in total (3480ms).
[13:09:00.439] <TB3> INFO: Test took 4350ms.
[13:09:00.442] <TB3> INFO: scanning low vcal = 220
[13:09:00.720] <TB3> INFO: Expecting 41600 events.
[13:09:04.715] <TB3> INFO: 41600 events read in total (3404ms).
[13:09:04.716] <TB3> INFO: Test took 4274ms.
[13:09:04.719] <TB3> INFO: scanning low vcal = 230
[13:09:04.996] <TB3> INFO: Expecting 41600 events.
[13:09:08.992] <TB3> INFO: 41600 events read in total (3404ms).
[13:09:08.993] <TB3> INFO: Test took 4274ms.
[13:09:08.996] <TB3> INFO: scanning low vcal = 240
[13:09:09.273] <TB3> INFO: Expecting 41600 events.
[13:09:13.339] <TB3> INFO: 41600 events read in total (3474ms).
[13:09:13.340] <TB3> INFO: Test took 4344ms.
[13:09:13.343] <TB3> INFO: scanning low vcal = 250
[13:09:13.620] <TB3> INFO: Expecting 41600 events.
[13:09:17.640] <TB3> INFO: 41600 events read in total (3428ms).
[13:09:17.641] <TB3> INFO: Test took 4298ms.
[13:09:17.646] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:09:17.922] <TB3> INFO: Expecting 41600 events.
[13:09:21.997] <TB3> INFO: 41600 events read in total (3482ms).
[13:09:21.998] <TB3> INFO: Test took 4352ms.
[13:09:21.001] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:09:22.279] <TB3> INFO: Expecting 41600 events.
[13:09:26.215] <TB3> INFO: 41600 events read in total (3344ms).
[13:09:26.216] <TB3> INFO: Test took 4214ms.
[13:09:26.221] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:09:26.496] <TB3> INFO: Expecting 41600 events.
[13:09:30.445] <TB3> INFO: 41600 events read in total (3357ms).
[13:09:30.446] <TB3> INFO: Test took 4225ms.
[13:09:30.450] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:09:30.726] <TB3> INFO: Expecting 41600 events.
[13:09:34.658] <TB3> INFO: 41600 events read in total (3341ms).
[13:09:34.659] <TB3> INFO: Test took 4209ms.
[13:09:34.662] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:09:34.938] <TB3> INFO: Expecting 41600 events.
[13:09:38.891] <TB3> INFO: 41600 events read in total (3361ms).
[13:09:38.892] <TB3> INFO: Test took 4230ms.
[13:09:39.353] <TB3> INFO: PixTestGainPedestal::measure() done
[13:10:14.667] <TB3> INFO: PixTestGainPedestal::fit() done
[13:10:14.667] <TB3> INFO: non-linearity mean: 0.951 0.935 0.958 0.952 0.931 0.935 0.970 0.934 0.980 0.946 0.982 0.932 0.917 0.981 0.960 0.975
[13:10:14.667] <TB3> INFO: non-linearity RMS: 0.058 0.063 0.040 0.040 0.065 0.144 0.015 0.056 0.005 0.071 0.004 0.216 0.115 0.004 0.059 0.010
[13:10:14.667] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C0.dat
[13:10:14.688] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C1.dat
[13:10:14.706] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C2.dat
[13:10:14.719] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C3.dat
[13:10:14.733] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C4.dat
[13:10:14.746] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C5.dat
[13:10:14.759] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C6.dat
[13:10:14.772] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C7.dat
[13:10:14.784] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C8.dat
[13:10:14.797] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C9.dat
[13:10:14.810] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C10.dat
[13:10:14.823] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C11.dat
[13:10:14.835] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C12.dat
[13:10:14.848] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C13.dat
[13:10:14.861] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C14.dat
[13:10:14.873] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1118_FullQualification_2016-11-14_09h59m_1479113999//002_Fulltest_p17//phCalibrationFitErr35_C15.dat
[13:10:14.886] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[13:10:14.886] <TB3> INFO: Decoding statistics:
[13:10:14.886] <TB3> INFO: General information:
[13:10:14.886] <TB3> INFO: 16bit words read: 3271892
[13:10:14.886] <TB3> INFO: valid events total: 332800
[13:10:14.886] <TB3> INFO: empty events: 3141
[13:10:14.886] <TB3> INFO: valid events with pixels: 329659
[13:10:14.886] <TB3> INFO: valid pixel hits: 637546
[13:10:14.886] <TB3> INFO: Event errors: 0
[13:10:14.886] <TB3> INFO: start marker: 0
[13:10:14.886] <TB3> INFO: stop marker: 0
[13:10:14.886] <TB3> INFO: overflow: 0
[13:10:14.886] <TB3> INFO: invalid 5bit words: 0
[13:10:14.886] <TB3> INFO: invalid XOR eye diagram: 0
[13:10:14.886] <TB3> INFO: frame (failed synchr.): 0
[13:10:14.886] <TB3> INFO: idle data (no TBM trl): 0
[13:10:14.886] <TB3> INFO: no data (only TBM hdr): 0
[13:10:14.886] <TB3> INFO: TBM errors: 0
[13:10:14.886] <TB3> INFO: flawed TBM headers: 0
[13:10:14.886] <TB3> INFO: flawed TBM trailers: 0
[13:10:14.886] <TB3> INFO: event ID mismatches: 0
[13:10:14.886] <TB3> INFO: ROC errors: 0
[13:10:14.886] <TB3> INFO: missing ROC header(s): 0
[13:10:14.886] <TB3> INFO: misplaced readback start: 0
[13:10:14.886] <TB3> INFO: Pixel decoding errors: 0
[13:10:14.886] <TB3> INFO: pixel data incomplete: 0
[13:10:14.886] <TB3> INFO: pixel address: 0
[13:10:14.886] <TB3> INFO: pulse height fill bit: 0
[13:10:14.886] <TB3> INFO: buffer corruption: 0
[13:10:14.901] <TB3> INFO: Decoding statistics:
[13:10:14.901] <TB3> INFO: General information:
[13:10:14.901] <TB3> INFO: 16bit words read: 3401260
[13:10:14.901] <TB3> INFO: valid events total: 353536
[13:10:14.901] <TB3> INFO: empty events: 21401
[13:10:14.901] <TB3> INFO: valid events with pixels: 332135
[13:10:14.901] <TB3> INFO: valid pixel hits: 640022
[13:10:14.901] <TB3> INFO: Event errors: 0
[13:10:14.901] <TB3> INFO: start marker: 0
[13:10:14.901] <TB3> INFO: stop marker: 0
[13:10:14.901] <TB3> INFO: overflow: 0
[13:10:14.901] <TB3> INFO: invalid 5bit words: 0
[13:10:14.901] <TB3> INFO: invalid XOR eye diagram: 0
[13:10:14.901] <TB3> INFO: frame (failed synchr.): 0
[13:10:14.901] <TB3> INFO: idle data (no TBM trl): 0
[13:10:14.901] <TB3> INFO: no data (only TBM hdr): 0
[13:10:14.901] <TB3> INFO: TBM errors: 0
[13:10:14.901] <TB3> INFO: flawed TBM headers: 0
[13:10:14.901] <TB3> INFO: flawed TBM trailers: 0
[13:10:14.901] <TB3> INFO: event ID mismatches: 0
[13:10:14.901] <TB3> INFO: ROC errors: 0
[13:10:14.901] <TB3> INFO: missing ROC header(s): 0
[13:10:14.901] <TB3> INFO: misplaced readback start: 0
[13:10:14.901] <TB3> INFO: Pixel decoding errors: 0
[13:10:14.901] <TB3> INFO: pixel data incomplete: 0
[13:10:14.901] <TB3> INFO: pixel address: 0
[13:10:14.901] <TB3> INFO: pulse height fill bit: 0
[13:10:14.901] <TB3> INFO: buffer corruption: 0
[13:10:14.901] <TB3> INFO: enter test to run
[13:10:14.901] <TB3> INFO: test: exit no parameter change
[13:10:15.010] <TB3> QUIET: Connection to board 126 closed.
[13:10:15.011] <TB3> INFO: pXar: this is the end, my friend