[20:07:53.095] <TB0> INFO: *** Welcome to pxar ***
[20:07:53.095] <TB0> INFO: *** Today: 2016/11/04
[20:07:53.102] <TB0> INFO: *** Version: c8ba-dirty
[20:07:53.102] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C15.dat
[20:07:53.102] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[20:07:53.102] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//defaultMaskFile.dat
[20:07:53.102] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters_C15.dat
[20:07:53.161] <TB0> INFO: clk: 4
[20:07:53.161] <TB0> INFO: ctr: 4
[20:07:53.161] <TB0> INFO: sda: 19
[20:07:53.161] <TB0> INFO: tin: 9
[20:07:53.161] <TB0> INFO: level: 15
[20:07:53.161] <TB0> INFO: triggerdelay: 0
[20:07:53.161] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[20:07:53.161] <TB0> INFO: Log level: INFO
[20:07:53.169] <TB0> INFO: Found DTB DTB_WRQ4OZ
[20:07:53.180] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[20:07:53.182] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[20:07:53.184] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[20:07:54.673] <TB0> INFO: DUT info:
[20:07:54.673] <TB0> INFO: The DUT currently contains the following objects:
[20:07:54.673] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[20:07:54.673] <TB0> INFO: TBM Core alpha (0): 7 registers set
[20:07:54.673] <TB0> INFO: TBM Core beta (1): 7 registers set
[20:07:54.673] <TB0> INFO: TBM Core alpha (2): 7 registers set
[20:07:54.674] <TB0> INFO: TBM Core beta (3): 7 registers set
[20:07:54.674] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[20:07:54.674] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:54.674] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[20:07:55.075] <TB0> INFO: enter 'restricted' command line mode
[20:07:55.075] <TB0> INFO: enter test to run
[20:07:55.075] <TB0> INFO: test: pretest no parameter change
[20:07:55.075] <TB0> INFO: running: pretest
[20:07:55.080] <TB0> INFO: ######################################################################
[20:07:55.080] <TB0> INFO: PixTestPretest::doTest()
[20:07:55.080] <TB0> INFO: ######################################################################
[20:07:55.081] <TB0> INFO: ----------------------------------------------------------------------
[20:07:55.081] <TB0> INFO: PixTestPretest::programROC()
[20:07:55.081] <TB0> INFO: ----------------------------------------------------------------------
[20:08:13.095] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[20:08:13.095] <TB0> INFO: IA differences per ROC: 20.9 17.7 18.5 20.1 17.7 18.5 20.1 19.3 19.3 18.5 17.7 17.7 18.5 19.3 20.1 17.7
[20:08:13.181] <TB0> INFO: ----------------------------------------------------------------------
[20:08:13.181] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[20:08:13.181] <TB0> INFO: ----------------------------------------------------------------------
[20:08:21.268] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 376.2 mA = 23.5125 mA/ROC
[20:08:21.268] <TB0> INFO: i(loss) [mA/ROC]: 19.3 18.5 18.5 19.3 18.5 18.5 18.5 18.5 18.5 18.5 19.3 18.5 18.5 18.5 19.3 18.5
[20:08:21.297] <TB0> INFO: ----------------------------------------------------------------------
[20:08:21.297] <TB0> INFO: PixTestPretest::findTiming()
[20:08:21.297] <TB0> INFO: ----------------------------------------------------------------------
[20:08:21.297] <TB0> INFO: PixTestCmd::init()

[20:08:53.932] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[20:08:53.932] <TB0> INFO: (success/tries = 100/100), width = 4
[20:08:55.440] <TB0> INFO: ----------------------------------------------------------------------
[20:08:55.440] <TB0> INFO: PixTestPretest::findWorkingPixel()
[20:08:55.440] <TB0> INFO: ----------------------------------------------------------------------
[20:08:55.535] <TB0> INFO: Expecting 231680 events.
[20:09:05.459] <TB0> INFO: 231680 events read in total (9332ms).
[20:09:05.467] <TB0> INFO: Test took 10022ms.
[20:09:05.718] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[20:09:05.758] <TB0> INFO: ----------------------------------------------------------------------
[20:09:05.758] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[20:09:05.758] <TB0> INFO: ----------------------------------------------------------------------
[20:09:05.853] <TB0> INFO: Expecting 231680 events.
[20:09:15.884] <TB0> INFO: 231680 events read in total (9438ms).
[20:09:15.898] <TB0> INFO: Test took 10134ms.
[20:09:16.165] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[20:09:16.165] <TB0> INFO: CalDel: 80 74 86 108 71 67 93 83 81 84 111 101 92 94 92 81
[20:09:16.165] <TB0> INFO: VthrComp: 51 51 51 51 51 53 51 51 51 54 51 51 51 51 51 53
[20:09:16.169] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C0.dat
[20:09:16.169] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C1.dat
[20:09:16.169] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C2.dat
[20:09:16.169] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C3.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C4.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C5.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C6.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C7.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C8.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C9.dat
[20:09:16.170] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C10.dat
[20:09:16.171] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C11.dat
[20:09:16.171] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C12.dat
[20:09:16.171] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C13.dat
[20:09:16.171] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C14.dat
[20:09:16.171] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters_C15.dat
[20:09:16.171] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[20:09:16.171] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[20:09:16.171] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[20:09:16.171] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[20:09:16.171] <TB0> INFO: PixTestPretest::doTest() done, duration: 81 seconds
[20:09:16.224] <TB0> INFO: enter test to run
[20:09:16.224] <TB0> INFO: test: fulltest no parameter change
[20:09:16.224] <TB0> INFO: running: fulltest
[20:09:16.224] <TB0> INFO: ######################################################################
[20:09:16.224] <TB0> INFO: PixTestFullTest::doTest()
[20:09:16.224] <TB0> INFO: ######################################################################
[20:09:16.226] <TB0> INFO: ######################################################################
[20:09:16.226] <TB0> INFO: PixTestAlive::doTest()
[20:09:16.226] <TB0> INFO: ######################################################################
[20:09:16.229] <TB0> INFO: ----------------------------------------------------------------------
[20:09:16.229] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:16.229] <TB0> INFO: ----------------------------------------------------------------------
[20:09:16.472] <TB0> INFO: Expecting 41600 events.
[20:09:20.027] <TB0> INFO: 41600 events read in total (2963ms).
[20:09:20.028] <TB0> INFO: Test took 3798ms.
[20:09:20.262] <TB0> INFO: PixTestAlive::aliveTest() done
[20:09:20.262] <TB0> INFO: number of dead pixels (per ROC): 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:09:20.263] <TB0> INFO: ----------------------------------------------------------------------
[20:09:20.263] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:20.263] <TB0> INFO: ----------------------------------------------------------------------
[20:09:20.507] <TB0> INFO: Expecting 41600 events.
[20:09:23.567] <TB0> INFO: 41600 events read in total (2468ms).
[20:09:23.568] <TB0> INFO: Test took 3302ms.
[20:09:23.568] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[20:09:23.808] <TB0> INFO: PixTestAlive::maskTest() done
[20:09:23.808] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:09:23.810] <TB0> INFO: ----------------------------------------------------------------------
[20:09:23.810] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[20:09:23.810] <TB0> INFO: ----------------------------------------------------------------------
[20:09:24.053] <TB0> INFO: Expecting 41600 events.
[20:09:27.542] <TB0> INFO: 41600 events read in total (2897ms).
[20:09:27.543] <TB0> INFO: Test took 3731ms.
[20:09:27.774] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[20:09:27.774] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[20:09:27.774] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[20:09:27.774] <TB0> INFO: Decoding statistics:
[20:09:27.774] <TB0> INFO: General information:
[20:09:27.774] <TB0> INFO: 16bit words read: 0
[20:09:27.774] <TB0> INFO: valid events total: 0
[20:09:27.774] <TB0> INFO: empty events: 0
[20:09:27.774] <TB0> INFO: valid events with pixels: 0
[20:09:27.774] <TB0> INFO: valid pixel hits: 0
[20:09:27.774] <TB0> INFO: Event errors: 0
[20:09:27.774] <TB0> INFO: start marker: 0
[20:09:27.774] <TB0> INFO: stop marker: 0
[20:09:27.774] <TB0> INFO: overflow: 0
[20:09:27.774] <TB0> INFO: invalid 5bit words: 0
[20:09:27.774] <TB0> INFO: invalid XOR eye diagram: 0
[20:09:27.774] <TB0> INFO: frame (failed synchr.): 0
[20:09:27.774] <TB0> INFO: idle data (no TBM trl): 0
[20:09:27.774] <TB0> INFO: no data (only TBM hdr): 0
[20:09:27.774] <TB0> INFO: TBM errors: 0
[20:09:27.774] <TB0> INFO: flawed TBM headers: 0
[20:09:27.774] <TB0> INFO: flawed TBM trailers: 0
[20:09:27.774] <TB0> INFO: event ID mismatches: 0
[20:09:27.774] <TB0> INFO: ROC errors: 0
[20:09:27.774] <TB0> INFO: missing ROC header(s): 0
[20:09:27.774] <TB0> INFO: misplaced readback start: 0
[20:09:27.774] <TB0> INFO: Pixel decoding errors: 0
[20:09:27.774] <TB0> INFO: pixel data incomplete: 0
[20:09:27.774] <TB0> INFO: pixel address: 0
[20:09:27.774] <TB0> INFO: pulse height fill bit: 0
[20:09:27.774] <TB0> INFO: buffer corruption: 0
[20:09:27.779] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:09:27.779] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[20:09:27.779] <TB0> INFO: ######################################################################
[20:09:27.779] <TB0> INFO: PixTestReadback::doTest()
[20:09:27.779] <TB0> INFO: ######################################################################
[20:09:27.779] <TB0> INFO: ----------------------------------------------------------------------
[20:09:27.779] <TB0> INFO: PixTestReadback::CalibrateVd()
[20:09:27.779] <TB0> INFO: ----------------------------------------------------------------------
[20:09:37.747] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:09:37.747] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:09:37.748] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:09:37.778] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[20:09:37.778] <TB0> INFO: ----------------------------------------------------------------------
[20:09:37.778] <TB0> INFO: PixTestReadback::CalibrateVa()
[20:09:37.778] <TB0> INFO: ----------------------------------------------------------------------
[20:09:47.698] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:09:47.699] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:09:47.726] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[20:09:47.726] <TB0> INFO: ----------------------------------------------------------------------
[20:09:47.726] <TB0> INFO: PixTestReadback::readbackVbg()
[20:09:47.726] <TB0> INFO: ----------------------------------------------------------------------
[20:09:55.386] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[20:09:55.386] <TB0> INFO: ----------------------------------------------------------------------
[20:09:55.386] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[20:09:55.386] <TB0> INFO: ----------------------------------------------------------------------
[20:09:55.386] <TB0> INFO: Vbg will be calibrated using Vd calibration
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.8calibrated Vbg = 1.1863 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 150.5calibrated Vbg = 1.17715 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152calibrated Vbg = 1.17611 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.8calibrated Vbg = 1.18178 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.9calibrated Vbg = 1.182 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.1calibrated Vbg = 1.17715 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.2calibrated Vbg = 1.18463 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 150.7calibrated Vbg = 1.18634 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.7calibrated Vbg = 1.18085 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 161.5calibrated Vbg = 1.18217 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.9calibrated Vbg = 1.1737 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.5calibrated Vbg = 1.165 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.1calibrated Vbg = 1.18286 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.4calibrated Vbg = 1.18073 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 152.8calibrated Vbg = 1.18067 :::*/*/*/*/
[20:09:55.386] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 159.8calibrated Vbg = 1.17763 :::*/*/*/*/
[20:09:55.389] <TB0> INFO: ----------------------------------------------------------------------
[20:09:55.389] <TB0> INFO: PixTestReadback::CalibrateIa()
[20:09:55.389] <TB0> INFO: ----------------------------------------------------------------------
[20:12:36.217] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C0.dat
[20:12:36.217] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C1.dat
[20:12:36.217] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C2.dat
[20:12:36.217] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C3.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C4.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C5.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C6.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C7.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C8.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C9.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C10.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C11.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C12.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C13.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C14.dat
[20:12:36.218] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//readbackCal_C15.dat
[20:12:36.248] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[20:12:36.249] <TB0> INFO: PixTestReadback::doTest() done
[20:12:36.249] <TB0> INFO: Decoding statistics:
[20:12:36.249] <TB0> INFO: General information:
[20:12:36.249] <TB0> INFO: 16bit words read: 1536
[20:12:36.249] <TB0> INFO: valid events total: 256
[20:12:36.249] <TB0> INFO: empty events: 256
[20:12:36.249] <TB0> INFO: valid events with pixels: 0
[20:12:36.249] <TB0> INFO: valid pixel hits: 0
[20:12:36.249] <TB0> INFO: Event errors: 0
[20:12:36.249] <TB0> INFO: start marker: 0
[20:12:36.249] <TB0> INFO: stop marker: 0
[20:12:36.249] <TB0> INFO: overflow: 0
[20:12:36.249] <TB0> INFO: invalid 5bit words: 0
[20:12:36.249] <TB0> INFO: invalid XOR eye diagram: 0
[20:12:36.249] <TB0> INFO: frame (failed synchr.): 0
[20:12:36.249] <TB0> INFO: idle data (no TBM trl): 0
[20:12:36.249] <TB0> INFO: no data (only TBM hdr): 0
[20:12:36.249] <TB0> INFO: TBM errors: 0
[20:12:36.249] <TB0> INFO: flawed TBM headers: 0
[20:12:36.249] <TB0> INFO: flawed TBM trailers: 0
[20:12:36.249] <TB0> INFO: event ID mismatches: 0
[20:12:36.249] <TB0> INFO: ROC errors: 0
[20:12:36.249] <TB0> INFO: missing ROC header(s): 0
[20:12:36.249] <TB0> INFO: misplaced readback start: 0
[20:12:36.249] <TB0> INFO: Pixel decoding errors: 0
[20:12:36.249] <TB0> INFO: pixel data incomplete: 0
[20:12:36.250] <TB0> INFO: pixel address: 0
[20:12:36.250] <TB0> INFO: pulse height fill bit: 0
[20:12:36.250] <TB0> INFO: buffer corruption: 0
[20:12:36.305] <TB0> INFO: ######################################################################
[20:12:36.305] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[20:12:36.305] <TB0> INFO: ######################################################################
[20:12:36.307] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[20:12:36.325] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:12:36.325] <TB0> INFO: run 1 of 1
[20:12:36.608] <TB0> INFO: Expecting 3120000 events.
[20:13:08.369] <TB0> INFO: 684075 events read in total (31169ms).











[20:13:38.736] <TB0> INFO: 1362465 events read in total (61536ms).











[20:14:09.144] <TB0> INFO: 2036085 events read in total (91944ms).











[20:14:39.545] <TB0> INFO: 2709115 events read in total (122345ms).











[20:14:58.109] <TB0> INFO: 3120000 events read in total (140909ms).
[20:14:58.174] <TB0> INFO: Test took 141849ms.
[20:15:24.437] <TB0> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 168 seconds
[20:15:24.437] <TB0> INFO: number of dead bumps (per ROC): 0 1 2 0 0 0 0 0 0 0 0 0 0 0 1 0
[20:15:24.437] <TB0> INFO: separation cut (per ROC): 109 103 109 110 107 123 105 110 109 130 117 118 115 105 120 108
[20:15:24.437] <TB0> INFO: Decoding statistics:
[20:15:24.437] <TB0> INFO: General information:
[20:15:24.437] <TB0> INFO: 16bit words read: 0
[20:15:24.437] <TB0> INFO: valid events total: 0
[20:15:24.437] <TB0> INFO: empty events: 0
[20:15:24.437] <TB0> INFO: valid events with pixels: 0
[20:15:24.437] <TB0> INFO: valid pixel hits: 0
[20:15:24.437] <TB0> INFO: Event errors: 0
[20:15:24.437] <TB0> INFO: start marker: 0
[20:15:24.437] <TB0> INFO: stop marker: 0
[20:15:24.437] <TB0> INFO: overflow: 0
[20:15:24.438] <TB0> INFO: invalid 5bit words: 0
[20:15:24.438] <TB0> INFO: invalid XOR eye diagram: 0
[20:15:24.438] <TB0> INFO: frame (failed synchr.): 0
[20:15:24.438] <TB0> INFO: idle data (no TBM trl): 0
[20:15:24.438] <TB0> INFO: no data (only TBM hdr): 0
[20:15:24.438] <TB0> INFO: TBM errors: 0
[20:15:24.438] <TB0> INFO: flawed TBM headers: 0
[20:15:24.438] <TB0> INFO: flawed TBM trailers: 0
[20:15:24.438] <TB0> INFO: event ID mismatches: 0
[20:15:24.438] <TB0> INFO: ROC errors: 0
[20:15:24.438] <TB0> INFO: missing ROC header(s): 0
[20:15:24.438] <TB0> INFO: misplaced readback start: 0
[20:15:24.438] <TB0> INFO: Pixel decoding errors: 0
[20:15:24.438] <TB0> INFO: pixel data incomplete: 0
[20:15:24.438] <TB0> INFO: pixel address: 0
[20:15:24.438] <TB0> INFO: pulse height fill bit: 0
[20:15:24.438] <TB0> INFO: buffer corruption: 0
[20:15:24.476] <TB0> INFO: ######################################################################
[20:15:24.476] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:15:24.476] <TB0> INFO: ######################################################################
[20:15:24.476] <TB0> INFO: ----------------------------------------------------------------------
[20:15:24.476] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[20:15:24.476] <TB0> INFO: ----------------------------------------------------------------------
[20:15:24.476] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[20:15:24.491] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[20:15:24.491] <TB0> INFO: run 1 of 1
[20:15:24.821] <TB0> INFO: Expecting 36608000 events.
[20:15:49.376] <TB0> INFO: 701200 events read in total (23963ms).
[20:16:12.517] <TB0> INFO: 1386500 events read in total (47104ms).
[20:16:35.606] <TB0> INFO: 2070850 events read in total (70194ms).
[20:16:58.372] <TB0> INFO: 2753550 events read in total (92959ms).
[20:17:21.394] <TB0> INFO: 3434550 events read in total (115981ms).
[20:17:44.480] <TB0> INFO: 4115550 events read in total (139067ms).
[20:18:07.816] <TB0> INFO: 4795900 events read in total (162403ms).
[20:18:30.672] <TB0> INFO: 5478700 events read in total (185259ms).
[20:18:54.062] <TB0> INFO: 6159650 events read in total (208649ms).
[20:19:17.163] <TB0> INFO: 6843050 events read in total (231750ms).
[20:19:40.375] <TB0> INFO: 7524250 events read in total (254962ms).
[20:20:03.393] <TB0> INFO: 8205450 events read in total (277980ms).
[20:20:26.370] <TB0> INFO: 8886650 events read in total (300957ms).
[20:20:49.515] <TB0> INFO: 9569200 events read in total (324102ms).
[20:21:12.712] <TB0> INFO: 10248500 events read in total (347299ms).
[20:21:35.811] <TB0> INFO: 10928050 events read in total (370398ms).
[20:21:59.168] <TB0> INFO: 11607900 events read in total (393756ms).
[20:22:22.202] <TB0> INFO: 12288250 events read in total (416789ms).
[20:22:45.078] <TB0> INFO: 12968500 events read in total (439665ms).
[20:23:08.343] <TB0> INFO: 13646700 events read in total (462930ms).
[20:23:31.547] <TB0> INFO: 14326450 events read in total (486134ms).
[20:23:54.707] <TB0> INFO: 15008450 events read in total (509294ms).
[20:24:18.208] <TB0> INFO: 15688350 events read in total (532795ms).
[20:24:41.562] <TB0> INFO: 16366150 events read in total (556149ms).
[20:25:04.772] <TB0> INFO: 17045750 events read in total (579359ms).
[20:25:27.961] <TB0> INFO: 17723050 events read in total (602548ms).
[20:25:50.973] <TB0> INFO: 18400650 events read in total (625560ms).
[20:26:14.036] <TB0> INFO: 19076050 events read in total (648623ms).
[20:26:36.883] <TB0> INFO: 19751500 events read in total (671470ms).
[20:26:59.971] <TB0> INFO: 20424600 events read in total (694558ms).
[20:27:23.156] <TB0> INFO: 21099300 events read in total (717743ms).
[20:27:46.290] <TB0> INFO: 21773450 events read in total (740877ms).
[20:28:09.013] <TB0> INFO: 22447400 events read in total (763600ms).
[20:28:32.378] <TB0> INFO: 23122950 events read in total (786965ms).
[20:28:55.247] <TB0> INFO: 23796150 events read in total (809834ms).
[20:29:18.268] <TB0> INFO: 24470400 events read in total (832855ms).
[20:29:41.492] <TB0> INFO: 25143650 events read in total (856079ms).
[20:30:04.877] <TB0> INFO: 25816900 events read in total (879464ms).
[20:30:28.188] <TB0> INFO: 26491550 events read in total (902775ms).
[20:30:51.331] <TB0> INFO: 27163900 events read in total (925918ms).
[20:31:14.187] <TB0> INFO: 27834900 events read in total (948774ms).
[20:31:37.468] <TB0> INFO: 28508200 events read in total (972055ms).
[20:32:00.478] <TB0> INFO: 29178350 events read in total (995065ms).
[20:32:23.796] <TB0> INFO: 29848050 events read in total (1018383ms).
[20:32:46.622] <TB0> INFO: 30518900 events read in total (1041209ms).
[20:33:09.460] <TB0> INFO: 31189200 events read in total (1064047ms).
[20:33:32.485] <TB0> INFO: 31860350 events read in total (1087072ms).
[20:33:55.800] <TB0> INFO: 32531350 events read in total (1110387ms).
[20:34:18.994] <TB0> INFO: 33203750 events read in total (1133581ms).
[20:34:42.264] <TB0> INFO: 33877100 events read in total (1156851ms).
[20:35:05.137] <TB0> INFO: 34547750 events read in total (1179724ms).
[20:35:28.324] <TB0> INFO: 35220250 events read in total (1202911ms).
[20:35:51.200] <TB0> INFO: 35891250 events read in total (1225787ms).
[20:36:14.227] <TB0> INFO: 36574600 events read in total (1248814ms).
[20:36:15.675] <TB0> INFO: 36608000 events read in total (1250262ms).
[20:36:15.816] <TB0> INFO: Test took 1251325ms.
[20:36:16.245] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:17.701] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:19.177] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:20.631] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:22.099] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:23.570] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:25.045] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:26.552] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:28.051] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:29.516] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:30.969] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:32.411] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:33.883] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:35.388] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:36.948] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:38.408] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[20:36:39.959] <TB0> INFO: PixTestScurves::scurves() done
[20:36:39.959] <TB0> INFO: Vcal mean: 125.59 112.42 125.90 117.41 116.77 132.79 117.31 122.05 118.90 136.49 128.13 124.85 124.10 116.15 129.05 120.50
[20:36:39.959] <TB0> INFO: Vcal RMS: 5.34 4.88 7.04 8.17 6.41 6.37 5.28 5.67 5.30 7.21 6.01 6.02 6.16 5.29 6.94 6.31
[20:36:39.959] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1275 seconds
[20:36:39.959] <TB0> INFO: Decoding statistics:
[20:36:39.959] <TB0> INFO: General information:
[20:36:39.959] <TB0> INFO: 16bit words read: 0
[20:36:39.959] <TB0> INFO: valid events total: 0
[20:36:39.959] <TB0> INFO: empty events: 0
[20:36:39.959] <TB0> INFO: valid events with pixels: 0
[20:36:39.959] <TB0> INFO: valid pixel hits: 0
[20:36:39.959] <TB0> INFO: Event errors: 0
[20:36:39.959] <TB0> INFO: start marker: 0
[20:36:39.959] <TB0> INFO: stop marker: 0
[20:36:39.959] <TB0> INFO: overflow: 0
[20:36:39.959] <TB0> INFO: invalid 5bit words: 0
[20:36:39.959] <TB0> INFO: invalid XOR eye diagram: 0
[20:36:39.959] <TB0> INFO: frame (failed synchr.): 0
[20:36:39.959] <TB0> INFO: idle data (no TBM trl): 0
[20:36:39.959] <TB0> INFO: no data (only TBM hdr): 0
[20:36:39.959] <TB0> INFO: TBM errors: 0
[20:36:39.959] <TB0> INFO: flawed TBM headers: 0
[20:36:39.959] <TB0> INFO: flawed TBM trailers: 0
[20:36:39.959] <TB0> INFO: event ID mismatches: 0
[20:36:39.959] <TB0> INFO: ROC errors: 0
[20:36:39.959] <TB0> INFO: missing ROC header(s): 0
[20:36:39.959] <TB0> INFO: misplaced readback start: 0
[20:36:39.959] <TB0> INFO: Pixel decoding errors: 0
[20:36:39.959] <TB0> INFO: pixel data incomplete: 0
[20:36:39.959] <TB0> INFO: pixel address: 0
[20:36:39.959] <TB0> INFO: pulse height fill bit: 0
[20:36:39.959] <TB0> INFO: buffer corruption: 0
[20:36:40.036] <TB0> INFO: ######################################################################
[20:36:40.036] <TB0> INFO: PixTestTrim::doTest()
[20:36:40.036] <TB0> INFO: ######################################################################
[20:36:40.037] <TB0> INFO: ----------------------------------------------------------------------
[20:36:40.037] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[20:36:40.037] <TB0> INFO: ----------------------------------------------------------------------
[20:36:40.082] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:36:40.082] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:36:40.095] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:36:40.095] <TB0> INFO: run 1 of 1
[20:36:40.335] <TB0> INFO: Expecting 5025280 events.
[20:37:11.997] <TB0> INFO: 832144 events read in total (31064ms).
[20:37:42.464] <TB0> INFO: 1661264 events read in total (61531ms).
[20:38:12.879] <TB0> INFO: 2488408 events read in total (91946ms).
[20:38:43.133] <TB0> INFO: 3310456 events read in total (122200ms).
[20:39:13.315] <TB0> INFO: 4128936 events read in total (152382ms).
[20:39:43.625] <TB0> INFO: 4945136 events read in total (182692ms).
[20:39:46.857] <TB0> INFO: 5025280 events read in total (185924ms).
[20:39:46.911] <TB0> INFO: Test took 186816ms.
[20:40:02.560] <TB0> INFO: ROC 0 VthrComp = 131
[20:40:02.560] <TB0> INFO: ROC 1 VthrComp = 113
[20:40:02.560] <TB0> INFO: ROC 2 VthrComp = 124
[20:40:02.560] <TB0> INFO: ROC 3 VthrComp = 111
[20:40:02.561] <TB0> INFO: ROC 4 VthrComp = 114
[20:40:02.562] <TB0> INFO: ROC 5 VthrComp = 132
[20:40:02.562] <TB0> INFO: ROC 6 VthrComp = 119
[20:40:02.562] <TB0> INFO: ROC 7 VthrComp = 126
[20:40:02.562] <TB0> INFO: ROC 8 VthrComp = 120
[20:40:02.562] <TB0> INFO: ROC 9 VthrComp = 131
[20:40:02.562] <TB0> INFO: ROC 10 VthrComp = 124
[20:40:02.562] <TB0> INFO: ROC 11 VthrComp = 118
[20:40:02.562] <TB0> INFO: ROC 12 VthrComp = 121
[20:40:02.562] <TB0> INFO: ROC 13 VthrComp = 110
[20:40:02.562] <TB0> INFO: ROC 14 VthrComp = 125
[20:40:02.562] <TB0> INFO: ROC 15 VthrComp = 118
[20:40:02.806] <TB0> INFO: Expecting 41600 events.
[20:40:06.385] <TB0> INFO: 41600 events read in total (2987ms).
[20:40:06.386] <TB0> INFO: Test took 3822ms.
[20:40:06.398] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:40:06.398] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:40:06.412] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:40:06.412] <TB0> INFO: run 1 of 1
[20:40:06.694] <TB0> INFO: Expecting 5025280 events.
[20:40:33.867] <TB0> INFO: 590856 events read in total (26581ms).
[20:40:59.825] <TB0> INFO: 1180072 events read in total (52539ms).
[20:41:25.786] <TB0> INFO: 1769936 events read in total (78500ms).
[20:41:51.520] <TB0> INFO: 2358752 events read in total (104234ms).
[20:42:17.510] <TB0> INFO: 2945760 events read in total (130224ms).
[20:42:43.425] <TB0> INFO: 3531512 events read in total (156139ms).
[20:43:09.321] <TB0> INFO: 4115808 events read in total (182035ms).
[20:43:35.133] <TB0> INFO: 4699360 events read in total (207847ms).
[20:43:49.825] <TB0> INFO: 5025280 events read in total (222539ms).
[20:43:49.900] <TB0> INFO: Test took 223488ms.
[20:44:15.284] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.3071 for pixel 8/75 mean/min/max = 45.8743/31.3772/60.3714
[20:44:15.285] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.3924 for pixel 20/12 mean/min/max = 45.6222/32.8428/58.4017
[20:44:15.285] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.3058 for pixel 0/70 mean/min/max = 47.6304/32.8055/62.4553
[20:44:15.286] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 72.4513 for pixel 6/4 mean/min/max = 51.6318/30.7416/72.5221
[20:44:15.286] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 63.2362 for pixel 3/5 mean/min/max = 47.6348/31.9894/63.2803
[20:44:15.286] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 62.7658 for pixel 16/6 mean/min/max = 47.9519/32.9273/62.9766
[20:44:15.287] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 57.1789 for pixel 32/77 mean/min/max = 45.0032/32.7867/57.2197
[20:44:15.287] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.9542 for pixel 7/50 mean/min/max = 45.5062/32.0451/58.9672
[20:44:15.288] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 58.4653 for pixel 14/79 mean/min/max = 46.3008/34.0011/58.6004
[20:44:15.288] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 67.2738 for pixel 22/57 mean/min/max = 49.8022/32.0977/67.5068
[20:44:15.289] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.41 for pixel 10/8 mean/min/max = 46.4658/32.4224/60.5092
[20:44:15.289] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 60.4971 for pixel 4/50 mean/min/max = 46.3056/32.033/60.5783
[20:44:15.289] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 63.1234 for pixel 17/62 mean/min/max = 48.2414/32.682/63.8008
[20:44:15.290] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 63.3522 for pixel 6/0 mean/min/max = 49.2907/35.1081/63.4734
[20:44:15.290] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 64.7784 for pixel 5/79 mean/min/max = 47.7839/30.7152/64.8526
[20:44:15.290] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.2686 for pixel 2/55 mean/min/max = 46.8579/32.2773/61.4384
[20:44:15.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:44:15.379] <TB0> INFO: Expecting 411648 events.
[20:44:24.942] <TB0> INFO: 411648 events read in total (8971ms).
[20:44:24.950] <TB0> INFO: Expecting 411648 events.
[20:44:34.259] <TB0> INFO: 411648 events read in total (8906ms).
[20:44:34.269] <TB0> INFO: Expecting 411648 events.
[20:44:43.671] <TB0> INFO: 411648 events read in total (8999ms).
[20:44:43.684] <TB0> INFO: Expecting 411648 events.
[20:44:52.906] <TB0> INFO: 411648 events read in total (8819ms).
[20:44:52.925] <TB0> INFO: Expecting 411648 events.
[20:45:02.236] <TB0> INFO: 411648 events read in total (8909ms).
[20:45:02.256] <TB0> INFO: Expecting 411648 events.
[20:45:11.604] <TB0> INFO: 411648 events read in total (8945ms).
[20:45:11.625] <TB0> INFO: Expecting 411648 events.
[20:45:20.920] <TB0> INFO: 411648 events read in total (8892ms).
[20:45:20.943] <TB0> INFO: Expecting 411648 events.
[20:45:30.316] <TB0> INFO: 411648 events read in total (8970ms).
[20:45:30.343] <TB0> INFO: Expecting 411648 events.
[20:45:39.643] <TB0> INFO: 411648 events read in total (8897ms).
[20:45:39.672] <TB0> INFO: Expecting 411648 events.
[20:45:48.990] <TB0> INFO: 411648 events read in total (8915ms).
[20:45:49.040] <TB0> INFO: Expecting 411648 events.
[20:45:58.340] <TB0> INFO: 411648 events read in total (8897ms).
[20:45:58.386] <TB0> INFO: Expecting 411648 events.
[20:46:07.745] <TB0> INFO: 411648 events read in total (8956ms).
[20:46:07.791] <TB0> INFO: Expecting 411648 events.
[20:46:17.069] <TB0> INFO: 411648 events read in total (8875ms).
[20:46:17.112] <TB0> INFO: Expecting 411648 events.
[20:46:26.565] <TB0> INFO: 411648 events read in total (9050ms).
[20:46:26.632] <TB0> INFO: Expecting 411648 events.
[20:46:35.980] <TB0> INFO: 411648 events read in total (8945ms).
[20:46:36.040] <TB0> INFO: Expecting 411648 events.
[20:46:45.565] <TB0> INFO: 411648 events read in total (9122ms).
[20:46:45.623] <TB0> INFO: Test took 150332ms.
[20:46:46.265] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:46:46.279] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:46:46.279] <TB0> INFO: run 1 of 1
[20:46:46.558] <TB0> INFO: Expecting 5025280 events.
[20:47:13.355] <TB0> INFO: 590200 events read in total (26205ms).
[20:47:39.938] <TB0> INFO: 1177760 events read in total (52788ms).
[20:48:05.957] <TB0> INFO: 1766072 events read in total (78807ms).
[20:48:32.340] <TB0> INFO: 2353296 events read in total (105190ms).
[20:48:58.614] <TB0> INFO: 2940184 events read in total (131465ms).
[20:49:25.325] <TB0> INFO: 3529056 events read in total (158175ms).
[20:49:51.237] <TB0> INFO: 4116832 events read in total (184087ms).
[20:50:17.723] <TB0> INFO: 4708808 events read in total (210574ms).
[20:50:31.751] <TB0> INFO: 5025280 events read in total (224601ms).
[20:50:31.907] <TB0> INFO: Test took 225629ms.
[20:50:56.576] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 11.726773 .. 147.796529
[20:50:56.816] <TB0> INFO: Expecting 208000 events.
[20:51:06.799] <TB0> INFO: 208000 events read in total (9392ms).
[20:51:06.801] <TB0> INFO: Test took 10224ms.
[20:51:06.852] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[20:51:06.866] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:51:06.866] <TB0> INFO: run 1 of 1
[20:51:07.196] <TB0> INFO: Expecting 5224960 events.
[20:51:34.429] <TB0> INFO: 584328 events read in total (26642ms).
[20:52:00.564] <TB0> INFO: 1168008 events read in total (52779ms).
[20:52:27.173] <TB0> INFO: 1751568 events read in total (79386ms).
[20:52:53.794] <TB0> INFO: 2335248 events read in total (106007ms).
[20:53:19.970] <TB0> INFO: 2918816 events read in total (132183ms).
[20:53:46.099] <TB0> INFO: 3501768 events read in total (158312ms).
[20:54:11.963] <TB0> INFO: 4085096 events read in total (184176ms).
[20:54:37.553] <TB0> INFO: 4667968 events read in total (209766ms).
[20:55:02.659] <TB0> INFO: 5224960 events read in total (234873ms).
[20:55:02.826] <TB0> INFO: Test took 235961ms.
[20:55:27.355] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.880635 .. 50.383695
[20:55:27.593] <TB0> INFO: Expecting 208000 events.
[20:55:37.640] <TB0> INFO: 208000 events read in total (9455ms).
[20:55:37.641] <TB0> INFO: Test took 10285ms.
[20:55:37.720] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 60 (-1/-1) hits flags = 528 (plus default)
[20:55:37.735] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:55:37.735] <TB0> INFO: run 1 of 1
[20:55:38.060] <TB0> INFO: Expecting 1497600 events.
[20:56:06.857] <TB0> INFO: 648352 events read in total (28205ms).
[20:56:34.390] <TB0> INFO: 1294936 events read in total (55738ms).
[20:56:43.225] <TB0> INFO: 1497600 events read in total (64573ms).
[20:56:43.262] <TB0> INFO: Test took 65528ms.
[20:56:57.621] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 28.648203 .. 55.883474
[20:56:57.874] <TB0> INFO: Expecting 208000 events.
[20:57:07.796] <TB0> INFO: 208000 events read in total (9330ms).
[20:57:07.798] <TB0> INFO: Test took 10176ms.
[20:57:07.858] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 65 (-1/-1) hits flags = 528 (plus default)
[20:57:07.872] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:57:07.872] <TB0> INFO: run 1 of 1
[20:57:08.150] <TB0> INFO: Expecting 1597440 events.
[20:57:35.725] <TB0> INFO: 626160 events read in total (26983ms).
[20:58:02.721] <TB0> INFO: 1251704 events read in total (53979ms).
[20:58:17.766] <TB0> INFO: 1597440 events read in total (69024ms).
[20:58:17.804] <TB0> INFO: Test took 69932ms.
[20:58:33.362] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.537593 .. 52.478933
[20:58:33.688] <TB0> INFO: Expecting 208000 events.
[20:58:43.429] <TB0> INFO: 208000 events read in total (9149ms).
[20:58:43.430] <TB0> INFO: Test took 10066ms.
[20:58:43.502] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 62 (-1/-1) hits flags = 528 (plus default)
[20:58:43.520] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:58:43.520] <TB0> INFO: run 1 of 1
[20:58:43.846] <TB0> INFO: Expecting 1564160 events.
[20:59:11.431] <TB0> INFO: 639992 events read in total (26993ms).
[20:59:38.775] <TB0> INFO: 1279936 events read in total (54337ms).
[20:59:51.048] <TB0> INFO: 1564160 events read in total (66610ms).
[20:59:51.098] <TB0> INFO: Test took 67579ms.
[21:00:06.980] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[21:00:06.980] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[21:00:06.994] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:00:06.994] <TB0> INFO: run 1 of 1
[21:00:07.245] <TB0> INFO: Expecting 1364480 events.
[21:00:35.919] <TB0> INFO: 668528 events read in total (28083ms).
[21:01:03.738] <TB0> INFO: 1336792 events read in total (55902ms).
[21:01:05.375] <TB0> INFO: 1364480 events read in total (57539ms).
[21:01:05.405] <TB0> INFO: Test took 58412ms.
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C0.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C1.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C2.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C3.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C4.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C5.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C6.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C7.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C8.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C9.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C10.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C11.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C12.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C13.dat
[21:01:20.108] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C14.dat
[21:01:20.109] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C15.dat
[21:01:20.109] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C0.dat
[21:01:20.113] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C1.dat
[21:01:20.119] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C2.dat
[21:01:20.124] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C3.dat
[21:01:20.129] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C4.dat
[21:01:20.134] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C5.dat
[21:01:20.138] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C6.dat
[21:01:20.143] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C7.dat
[21:01:20.149] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C8.dat
[21:01:20.156] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C9.dat
[21:01:20.163] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C10.dat
[21:01:20.170] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C11.dat
[21:01:20.177] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C12.dat
[21:01:20.184] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C13.dat
[21:01:20.191] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C14.dat
[21:01:20.198] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters35_C15.dat
[21:01:20.205] <TB0> INFO: PixTestTrim::trimTest() done
[21:01:20.205] <TB0> INFO: vtrim: 125 117 116 151 128 139 122 128 102 150 115 110 122 131 127 120
[21:01:20.205] <TB0> INFO: vthrcomp: 131 113 124 111 114 132 119 126 120 131 124 118 121 110 125 118
[21:01:20.205] <TB0> INFO: vcal mean: 35.09 35.09 35.23 35.22 35.15 35.26 35.01 35.04 34.97 37.14 35.46 35.22 35.77 35.30 35.55 35.39
[21:01:20.205] <TB0> INFO: vcal RMS: 1.23 1.08 1.31 1.28 1.23 1.38 1.12 1.10 0.98 2.96 1.57 1.40 1.91 1.52 1.82 1.43
[21:01:20.205] <TB0> INFO: bits mean: 9.48 9.43 8.52 8.76 9.08 9.36 9.88 9.50 8.51 10.09 9.84 9.71 9.31 8.96 9.60 9.66
[21:01:20.205] <TB0> INFO: bits RMS: 2.88 2.72 2.90 2.84 2.78 2.64 2.51 2.77 2.85 2.61 2.60 2.65 2.76 2.50 2.84 2.65
[21:01:20.213] <TB0> INFO: ----------------------------------------------------------------------
[21:01:20.213] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:01:20.213] <TB0> INFO: ----------------------------------------------------------------------
[21:01:20.216] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:01:20.229] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:01:20.230] <TB0> INFO: run 1 of 1
[21:01:20.563] <TB0> INFO: Expecting 4160000 events.
[21:01:54.203] <TB0> INFO: 771525 events read in total (33049ms).
[21:02:26.882] <TB0> INFO: 1538315 events read in total (65728ms).
[21:02:59.617] <TB0> INFO: 2301200 events read in total (98463ms).
[21:03:32.136] <TB0> INFO: 3060795 events read in total (130982ms).
[21:04:04.506] <TB0> INFO: 3815885 events read in total (163352ms).
[21:04:19.420] <TB0> INFO: 4160000 events read in total (178266ms).
[21:04:19.498] <TB0> INFO: Test took 179268ms.
[21:04:50.394] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[21:04:50.407] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:04:50.407] <TB0> INFO: run 1 of 1
[21:04:50.662] <TB0> INFO: Expecting 4368000 events.
[21:05:22.975] <TB0> INFO: 731815 events read in total (31722ms).
[21:05:54.781] <TB0> INFO: 1459880 events read in total (63528ms).
[21:06:26.719] <TB0> INFO: 2186165 events read in total (95466ms).
[21:06:58.703] <TB0> INFO: 2907335 events read in total (127450ms).
[21:07:30.557] <TB0> INFO: 3625550 events read in total (159304ms).
[21:08:02.284] <TB0> INFO: 4344730 events read in total (191031ms).
[21:08:03.674] <TB0> INFO: 4368000 events read in total (192421ms).
[21:08:03.756] <TB0> INFO: Test took 193349ms.
[21:08:32.417] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[21:08:32.430] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:08:32.430] <TB0> INFO: run 1 of 1
[21:08:32.715] <TB0> INFO: Expecting 4326400 events.
[21:09:04.943] <TB0> INFO: 734585 events read in total (31636ms).
[21:09:36.927] <TB0> INFO: 1465495 events read in total (63620ms).
[21:10:08.839] <TB0> INFO: 2194335 events read in total (95532ms).
[21:10:40.642] <TB0> INFO: 2918080 events read in total (127335ms).
[21:11:12.467] <TB0> INFO: 3638820 events read in total (159160ms).
[21:11:42.574] <TB0> INFO: 4326400 events read in total (189267ms).
[21:11:42.712] <TB0> INFO: Test took 190281ms.
[21:12:12.914] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[21:12:12.927] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:12:12.927] <TB0> INFO: run 1 of 1
[21:12:13.172] <TB0> INFO: Expecting 4305600 events.
[21:12:45.374] <TB0> INFO: 736485 events read in total (31610ms).
[21:13:17.358] <TB0> INFO: 1468800 events read in total (63594ms).
[21:13:48.003] <TB0> INFO: 2198695 events read in total (95239ms).
[21:14:20.477] <TB0> INFO: 2924105 events read in total (126713ms).
[21:14:51.688] <TB0> INFO: 3646240 events read in total (157924ms).
[21:15:20.095] <TB0> INFO: 4305600 events read in total (186331ms).
[21:15:20.255] <TB0> INFO: Test took 187329ms.
[21:15:47.888] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[21:15:47.901] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:15:47.901] <TB0> INFO: run 1 of 1
[21:15:48.136] <TB0> INFO: Expecting 4305600 events.
[21:16:20.315] <TB0> INFO: 736290 events read in total (31587ms).
[21:16:51.358] <TB0> INFO: 1468370 events read in total (62630ms).
[21:17:22.864] <TB0> INFO: 2198585 events read in total (94136ms).
[21:17:54.460] <TB0> INFO: 2923955 events read in total (125732ms).
[21:18:25.812] <TB0> INFO: 3646485 events read in total (157084ms).
[21:18:54.242] <TB0> INFO: 4305600 events read in total (185514ms).
[21:18:54.415] <TB0> INFO: Test took 186514ms.
[21:19:22.353] <TB0> INFO: PixTestTrim::trimBitTest() done
[21:19:22.354] <TB0> INFO: PixTestTrim::doTest() done, duration: 2562 seconds
[21:19:22.354] <TB0> INFO: Decoding statistics:
[21:19:22.354] <TB0> INFO: General information:
[21:19:22.354] <TB0> INFO: 16bit words read: 0
[21:19:22.354] <TB0> INFO: valid events total: 0
[21:19:22.354] <TB0> INFO: empty events: 0
[21:19:22.354] <TB0> INFO: valid events with pixels: 0
[21:19:22.354] <TB0> INFO: valid pixel hits: 0
[21:19:22.354] <TB0> INFO: Event errors: 0
[21:19:22.354] <TB0> INFO: start marker: 0
[21:19:22.355] <TB0> INFO: stop marker: 0
[21:19:22.355] <TB0> INFO: overflow: 0
[21:19:22.355] <TB0> INFO: invalid 5bit words: 0
[21:19:22.355] <TB0> INFO: invalid XOR eye diagram: 0
[21:19:22.355] <TB0> INFO: frame (failed synchr.): 0
[21:19:22.355] <TB0> INFO: idle data (no TBM trl): 0
[21:19:22.355] <TB0> INFO: no data (only TBM hdr): 0
[21:19:22.355] <TB0> INFO: TBM errors: 0
[21:19:22.355] <TB0> INFO: flawed TBM headers: 0
[21:19:22.355] <TB0> INFO: flawed TBM trailers: 0
[21:19:22.355] <TB0> INFO: event ID mismatches: 0
[21:19:22.355] <TB0> INFO: ROC errors: 0
[21:19:22.355] <TB0> INFO: missing ROC header(s): 0
[21:19:22.355] <TB0> INFO: misplaced readback start: 0
[21:19:22.355] <TB0> INFO: Pixel decoding errors: 0
[21:19:22.355] <TB0> INFO: pixel data incomplete: 0
[21:19:22.355] <TB0> INFO: pixel address: 0
[21:19:22.355] <TB0> INFO: pulse height fill bit: 0
[21:19:22.355] <TB0> INFO: buffer corruption: 0
[21:19:22.961] <TB0> INFO: ######################################################################
[21:19:22.961] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[21:19:22.961] <TB0> INFO: ######################################################################
[21:19:23.288] <TB0> INFO: Expecting 41600 events.
[21:19:26.786] <TB0> INFO: 41600 events read in total (2907ms).
[21:19:26.787] <TB0> INFO: Test took 3825ms.
[21:19:27.268] <TB0> INFO: Expecting 41600 events.
[21:19:30.788] <TB0> INFO: 41600 events read in total (2929ms).
[21:19:30.789] <TB0> INFO: Test took 3795ms.
[21:19:31.081] <TB0> INFO: Expecting 41600 events.
[21:19:34.617] <TB0> INFO: 41600 events read in total (2944ms).
[21:19:34.618] <TB0> INFO: Test took 3802ms.
[21:19:34.916] <TB0> INFO: Expecting 41600 events.
[21:19:38.400] <TB0> INFO: 41600 events read in total (2892ms).
[21:19:38.401] <TB0> INFO: Test took 3754ms.
[21:19:38.690] <TB0> INFO: Expecting 41600 events.
[21:19:42.416] <TB0> INFO: 41600 events read in total (3134ms).
[21:19:42.417] <TB0> INFO: Test took 3992ms.
[21:19:42.709] <TB0> INFO: Expecting 41600 events.
[21:19:46.289] <TB0> INFO: 41600 events read in total (2989ms).
[21:19:46.290] <TB0> INFO: Test took 3846ms.
[21:19:46.590] <TB0> INFO: Expecting 41600 events.
[21:19:50.215] <TB0> INFO: 41600 events read in total (3033ms).
[21:19:50.216] <TB0> INFO: Test took 3898ms.
[21:19:50.522] <TB0> INFO: Expecting 41600 events.
[21:19:54.031] <TB0> INFO: 41600 events read in total (2917ms).
[21:19:54.032] <TB0> INFO: Test took 3792ms.
[21:19:54.325] <TB0> INFO: Expecting 41600 events.
[21:19:57.848] <TB0> INFO: 41600 events read in total (2931ms).
[21:19:57.849] <TB0> INFO: Test took 3790ms.
[21:19:58.144] <TB0> INFO: Expecting 41600 events.
[21:20:01.627] <TB0> INFO: 41600 events read in total (2891ms).
[21:20:01.627] <TB0> INFO: Test took 3749ms.
[21:20:01.932] <TB0> INFO: Expecting 41600 events.
[21:20:05.504] <TB0> INFO: 41600 events read in total (2980ms).
[21:20:05.505] <TB0> INFO: Test took 3854ms.
[21:20:05.795] <TB0> INFO: Expecting 41600 events.
[21:20:09.392] <TB0> INFO: 41600 events read in total (3005ms).
[21:20:09.393] <TB0> INFO: Test took 3862ms.
[21:20:09.685] <TB0> INFO: Expecting 41600 events.
[21:20:13.231] <TB0> INFO: 41600 events read in total (2954ms).
[21:20:13.233] <TB0> INFO: Test took 3813ms.
[21:20:13.524] <TB0> INFO: Expecting 41600 events.
[21:20:17.048] <TB0> INFO: 41600 events read in total (2932ms).
[21:20:17.049] <TB0> INFO: Test took 3790ms.
[21:20:17.341] <TB0> INFO: Expecting 41600 events.
[21:20:20.851] <TB0> INFO: 41600 events read in total (2919ms).
[21:20:20.852] <TB0> INFO: Test took 3777ms.
[21:20:21.141] <TB0> INFO: Expecting 41600 events.
[21:20:24.692] <TB0> INFO: 41600 events read in total (2960ms).
[21:20:24.693] <TB0> INFO: Test took 3817ms.
[21:20:24.982] <TB0> INFO: Expecting 41600 events.
[21:20:28.463] <TB0> INFO: 41600 events read in total (2889ms).
[21:20:28.464] <TB0> INFO: Test took 3747ms.
[21:20:28.769] <TB0> INFO: Expecting 41600 events.
[21:20:32.283] <TB0> INFO: 41600 events read in total (2922ms).
[21:20:32.284] <TB0> INFO: Test took 3796ms.
[21:20:32.573] <TB0> INFO: Expecting 41600 events.
[21:20:36.084] <TB0> INFO: 41600 events read in total (2920ms).
[21:20:36.085] <TB0> INFO: Test took 3777ms.
[21:20:36.374] <TB0> INFO: Expecting 41600 events.
[21:20:39.919] <TB0> INFO: 41600 events read in total (2954ms).
[21:20:39.920] <TB0> INFO: Test took 3811ms.
[21:20:40.209] <TB0> INFO: Expecting 41600 events.
[21:20:43.718] <TB0> INFO: 41600 events read in total (2917ms).
[21:20:43.719] <TB0> INFO: Test took 3774ms.
[21:20:44.008] <TB0> INFO: Expecting 41600 events.
[21:20:47.557] <TB0> INFO: 41600 events read in total (2957ms).
[21:20:47.557] <TB0> INFO: Test took 3814ms.
[21:20:47.847] <TB0> INFO: Expecting 41600 events.
[21:20:51.364] <TB0> INFO: 41600 events read in total (2926ms).
[21:20:51.365] <TB0> INFO: Test took 3783ms.
[21:20:51.654] <TB0> INFO: Expecting 41600 events.
[21:20:55.136] <TB0> INFO: 41600 events read in total (2890ms).
[21:20:55.137] <TB0> INFO: Test took 3748ms.
[21:20:55.427] <TB0> INFO: Expecting 41600 events.
[21:20:58.956] <TB0> INFO: 41600 events read in total (2937ms).
[21:20:58.957] <TB0> INFO: Test took 3796ms.
[21:20:59.246] <TB0> INFO: Expecting 41600 events.
[21:21:02.780] <TB0> INFO: 41600 events read in total (2942ms).
[21:21:02.781] <TB0> INFO: Test took 3800ms.
[21:21:03.084] <TB0> INFO: Expecting 41600 events.
[21:21:06.616] <TB0> INFO: 41600 events read in total (2940ms).
[21:21:06.617] <TB0> INFO: Test took 3812ms.
[21:21:06.906] <TB0> INFO: Expecting 41600 events.
[21:21:10.431] <TB0> INFO: 41600 events read in total (2933ms).
[21:21:10.432] <TB0> INFO: Test took 3791ms.
[21:21:10.723] <TB0> INFO: Expecting 41600 events.
[21:21:14.229] <TB0> INFO: 41600 events read in total (2915ms).
[21:21:14.230] <TB0> INFO: Test took 3772ms.
[21:21:14.520] <TB0> INFO: Expecting 2560 events.
[21:21:15.412] <TB0> INFO: 2560 events read in total (300ms).
[21:21:15.412] <TB0> INFO: Test took 1169ms.
[21:21:15.720] <TB0> INFO: Expecting 2560 events.
[21:21:16.611] <TB0> INFO: 2560 events read in total (299ms).
[21:21:16.612] <TB0> INFO: Test took 1199ms.
[21:21:16.919] <TB0> INFO: Expecting 2560 events.
[21:21:17.813] <TB0> INFO: 2560 events read in total (302ms).
[21:21:17.813] <TB0> INFO: Test took 1201ms.
[21:21:18.119] <TB0> INFO: Expecting 2560 events.
[21:21:19.012] <TB0> INFO: 2560 events read in total (301ms).
[21:21:19.012] <TB0> INFO: Test took 1198ms.
[21:21:19.319] <TB0> INFO: Expecting 2560 events.
[21:21:20.213] <TB0> INFO: 2560 events read in total (302ms).
[21:21:20.214] <TB0> INFO: Test took 1201ms.
[21:21:20.520] <TB0> INFO: Expecting 2560 events.
[21:21:21.403] <TB0> INFO: 2560 events read in total (291ms).
[21:21:21.403] <TB0> INFO: Test took 1189ms.
[21:21:21.712] <TB0> INFO: Expecting 2560 events.
[21:21:22.593] <TB0> INFO: 2560 events read in total (289ms).
[21:21:22.593] <TB0> INFO: Test took 1189ms.
[21:21:22.901] <TB0> INFO: Expecting 2560 events.
[21:21:23.790] <TB0> INFO: 2560 events read in total (297ms).
[21:21:23.790] <TB0> INFO: Test took 1196ms.
[21:21:24.097] <TB0> INFO: Expecting 2560 events.
[21:21:24.978] <TB0> INFO: 2560 events read in total (289ms).
[21:21:24.979] <TB0> INFO: Test took 1188ms.
[21:21:25.285] <TB0> INFO: Expecting 2560 events.
[21:21:26.169] <TB0> INFO: 2560 events read in total (293ms).
[21:21:26.170] <TB0> INFO: Test took 1191ms.
[21:21:26.479] <TB0> INFO: Expecting 2560 events.
[21:21:27.360] <TB0> INFO: 2560 events read in total (289ms).
[21:21:27.360] <TB0> INFO: Test took 1190ms.
[21:21:27.668] <TB0> INFO: Expecting 2560 events.
[21:21:28.548] <TB0> INFO: 2560 events read in total (288ms).
[21:21:28.548] <TB0> INFO: Test took 1187ms.
[21:21:28.856] <TB0> INFO: Expecting 2560 events.
[21:21:29.739] <TB0> INFO: 2560 events read in total (292ms).
[21:21:29.739] <TB0> INFO: Test took 1190ms.
[21:21:30.047] <TB0> INFO: Expecting 2560 events.
[21:21:30.940] <TB0> INFO: 2560 events read in total (301ms).
[21:21:30.941] <TB0> INFO: Test took 1201ms.
[21:21:31.249] <TB0> INFO: Expecting 2560 events.
[21:21:32.139] <TB0> INFO: 2560 events read in total (298ms).
[21:21:32.139] <TB0> INFO: Test took 1198ms.
[21:21:32.448] <TB0> INFO: Expecting 2560 events.
[21:21:33.336] <TB0> INFO: 2560 events read in total (296ms).
[21:21:33.336] <TB0> INFO: Test took 1196ms.
[21:21:33.341] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:21:33.645] <TB0> INFO: Expecting 655360 events.
[21:21:48.535] <TB0> INFO: 655360 events read in total (14298ms).
[21:21:48.550] <TB0> INFO: Expecting 655360 events.
[21:22:03.215] <TB0> INFO: 655360 events read in total (14262ms).
[21:22:03.236] <TB0> INFO: Expecting 655360 events.
[21:22:18.010] <TB0> INFO: 655360 events read in total (14371ms).
[21:22:18.034] <TB0> INFO: Expecting 655360 events.
[21:22:32.695] <TB0> INFO: 655360 events read in total (14258ms).
[21:22:32.730] <TB0> INFO: Expecting 655360 events.
[21:22:47.296] <TB0> INFO: 655360 events read in total (14163ms).
[21:22:47.339] <TB0> INFO: Expecting 655360 events.
[21:23:02.065] <TB0> INFO: 655360 events read in total (14323ms).
[21:23:02.105] <TB0> INFO: Expecting 655360 events.
[21:23:16.854] <TB0> INFO: 655360 events read in total (14346ms).
[21:23:16.902] <TB0> INFO: Expecting 655360 events.
[21:23:31.665] <TB0> INFO: 655360 events read in total (14360ms).
[21:23:31.738] <TB0> INFO: Expecting 655360 events.
[21:23:46.467] <TB0> INFO: 655360 events read in total (14326ms).
[21:23:46.532] <TB0> INFO: Expecting 655360 events.
[21:24:01.041] <TB0> INFO: 655360 events read in total (14106ms).
[21:24:01.174] <TB0> INFO: Expecting 655360 events.
[21:24:15.728] <TB0> INFO: 655360 events read in total (14151ms).
[21:24:15.904] <TB0> INFO: Expecting 655360 events.
[21:24:30.529] <TB0> INFO: 655360 events read in total (14222ms).
[21:24:30.671] <TB0> INFO: Expecting 655360 events.
[21:24:45.562] <TB0> INFO: 655360 events read in total (14488ms).
[21:24:45.657] <TB0> INFO: Expecting 655360 events.
[21:25:00.195] <TB0> INFO: 655360 events read in total (14135ms).
[21:25:00.288] <TB0> INFO: Expecting 655360 events.
[21:25:14.807] <TB0> INFO: 655360 events read in total (14116ms).
[21:25:14.959] <TB0> INFO: Expecting 655360 events.
[21:25:29.579] <TB0> INFO: 655360 events read in total (14217ms).
[21:25:29.682] <TB0> INFO: Test took 236342ms.
[21:25:29.777] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:25:30.034] <TB0> INFO: Expecting 655360 events.
[21:25:44.563] <TB0> INFO: 655360 events read in total (13938ms).
[21:25:44.577] <TB0> INFO: Expecting 655360 events.
[21:25:58.992] <TB0> INFO: 655360 events read in total (14012ms).
[21:25:59.012] <TB0> INFO: Expecting 655360 events.
[21:26:13.519] <TB0> INFO: 655360 events read in total (14104ms).
[21:26:13.546] <TB0> INFO: Expecting 655360 events.
[21:26:28.156] <TB0> INFO: 655360 events read in total (14207ms).
[21:26:28.185] <TB0> INFO: Expecting 655360 events.
[21:26:42.215] <TB0> INFO: 655360 events read in total (13627ms).
[21:26:42.249] <TB0> INFO: Expecting 655360 events.
[21:26:56.665] <TB0> INFO: 655360 events read in total (14013ms).
[21:26:56.711] <TB0> INFO: Expecting 655360 events.
[21:27:11.149] <TB0> INFO: 655360 events read in total (14035ms).
[21:27:11.198] <TB0> INFO: Expecting 655360 events.
[21:27:25.685] <TB0> INFO: 655360 events read in total (14084ms).
[21:27:25.834] <TB0> INFO: Expecting 655360 events.
[21:27:40.232] <TB0> INFO: 655360 events read in total (13995ms).
[21:27:40.282] <TB0> INFO: Expecting 655360 events.
[21:27:54.510] <TB0> INFO: 655360 events read in total (13824ms).
[21:27:54.571] <TB0> INFO: Expecting 655360 events.
[21:28:08.885] <TB0> INFO: 655360 events read in total (13911ms).
[21:28:08.942] <TB0> INFO: Expecting 655360 events.
[21:28:23.131] <TB0> INFO: 655360 events read in total (13786ms).
[21:28:23.267] <TB0> INFO: Expecting 655360 events.
[21:28:37.300] <TB0> INFO: 655360 events read in total (13630ms).
[21:28:37.365] <TB0> INFO: Expecting 655360 events.
[21:28:51.757] <TB0> INFO: 655360 events read in total (13989ms).
[21:28:51.838] <TB0> INFO: Expecting 655360 events.
[21:29:05.931] <TB0> INFO: 655360 events read in total (13690ms).
[21:29:06.079] <TB0> INFO: Expecting 655360 events.
[21:29:20.558] <TB0> INFO: 655360 events read in total (14076ms).
[21:29:20.715] <TB0> INFO: Test took 230938ms.
[21:29:20.884] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.890] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.896] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.901] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.907] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:20.912] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:20.918] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[21:29:20.924] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[21:29:20.929] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[21:29:20.935] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[21:29:20.941] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.946] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.952] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.957] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.963] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:20.969] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:20.974] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[21:29:20.980] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[21:29:20.986] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[21:29:20.991] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:20.997] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:20.002] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:21.008] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[21:29:21.013] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[21:29:21.019] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[21:29:21.024] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.030] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.036] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:21.042] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:21.047] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[21:29:21.053] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[21:29:21.058] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.064] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:21.069] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.075] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:21.080] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:21.086] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[21:29:21.091] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[21:29:21.097] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.103] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[21:29:21.109] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[21:29:21.114] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.120] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C0.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C1.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C2.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C3.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C4.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C5.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C6.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C7.dat
[21:29:21.154] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C8.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C9.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C10.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C11.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C12.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C13.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C14.dat
[21:29:21.155] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters35_C15.dat
[21:29:21.401] <TB0> INFO: Expecting 41600 events.
[21:29:24.616] <TB0> INFO: 41600 events read in total (2624ms).
[21:29:24.617] <TB0> INFO: Test took 3459ms.
[21:29:25.075] <TB0> INFO: Expecting 41600 events.
[21:29:28.109] <TB0> INFO: 41600 events read in total (2442ms).
[21:29:28.110] <TB0> INFO: Test took 3279ms.
[21:29:28.562] <TB0> INFO: Expecting 41600 events.
[21:29:31.683] <TB0> INFO: 41600 events read in total (2529ms).
[21:29:31.684] <TB0> INFO: Test took 3361ms.
[21:29:31.900] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:31.988] <TB0> INFO: Expecting 2560 events.
[21:29:32.872] <TB0> INFO: 2560 events read in total (292ms).
[21:29:32.872] <TB0> INFO: Test took 972ms.
[21:29:32.875] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:33.181] <TB0> INFO: Expecting 2560 events.
[21:29:34.069] <TB0> INFO: 2560 events read in total (296ms).
[21:29:34.071] <TB0> INFO: Test took 1196ms.
[21:29:34.074] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:34.377] <TB0> INFO: Expecting 2560 events.
[21:29:35.273] <TB0> INFO: 2560 events read in total (304ms).
[21:29:35.274] <TB0> INFO: Test took 1200ms.
[21:29:35.276] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:35.581] <TB0> INFO: Expecting 2560 events.
[21:29:36.475] <TB0> INFO: 2560 events read in total (302ms).
[21:29:36.476] <TB0> INFO: Test took 1200ms.
[21:29:36.479] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:36.784] <TB0> INFO: Expecting 2560 events.
[21:29:37.683] <TB0> INFO: 2560 events read in total (307ms).
[21:29:37.684] <TB0> INFO: Test took 1205ms.
[21:29:37.686] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:37.991] <TB0> INFO: Expecting 2560 events.
[21:29:38.885] <TB0> INFO: 2560 events read in total (302ms).
[21:29:38.885] <TB0> INFO: Test took 1199ms.
[21:29:38.888] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:39.194] <TB0> INFO: Expecting 2560 events.
[21:29:40.081] <TB0> INFO: 2560 events read in total (296ms).
[21:29:40.081] <TB0> INFO: Test took 1193ms.
[21:29:40.084] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:40.389] <TB0> INFO: Expecting 2560 events.
[21:29:41.278] <TB0> INFO: 2560 events read in total (297ms).
[21:29:41.278] <TB0> INFO: Test took 1194ms.
[21:29:41.281] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:41.587] <TB0> INFO: Expecting 2560 events.
[21:29:42.474] <TB0> INFO: 2560 events read in total (296ms).
[21:29:42.475] <TB0> INFO: Test took 1194ms.
[21:29:42.478] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:42.782] <TB0> INFO: Expecting 2560 events.
[21:29:43.665] <TB0> INFO: 2560 events read in total (291ms).
[21:29:43.665] <TB0> INFO: Test took 1188ms.
[21:29:43.668] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:43.974] <TB0> INFO: Expecting 2560 events.
[21:29:44.856] <TB0> INFO: 2560 events read in total (290ms).
[21:29:44.857] <TB0> INFO: Test took 1189ms.
[21:29:44.860] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:45.165] <TB0> INFO: Expecting 2560 events.
[21:29:46.048] <TB0> INFO: 2560 events read in total (291ms).
[21:29:46.048] <TB0> INFO: Test took 1188ms.
[21:29:46.052] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:46.357] <TB0> INFO: Expecting 2560 events.
[21:29:47.239] <TB0> INFO: 2560 events read in total (290ms).
[21:29:47.239] <TB0> INFO: Test took 1187ms.
[21:29:47.242] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:47.548] <TB0> INFO: Expecting 2560 events.
[21:29:48.435] <TB0> INFO: 2560 events read in total (296ms).
[21:29:48.435] <TB0> INFO: Test took 1193ms.
[21:29:48.438] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:48.744] <TB0> INFO: Expecting 2560 events.
[21:29:49.625] <TB0> INFO: 2560 events read in total (290ms).
[21:29:49.625] <TB0> INFO: Test took 1187ms.
[21:29:49.627] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:49.934] <TB0> INFO: Expecting 2560 events.
[21:29:50.824] <TB0> INFO: 2560 events read in total (298ms).
[21:29:50.824] <TB0> INFO: Test took 1197ms.
[21:29:50.828] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:51.132] <TB0> INFO: Expecting 2560 events.
[21:29:52.022] <TB0> INFO: 2560 events read in total (298ms).
[21:29:52.022] <TB0> INFO: Test took 1194ms.
[21:29:52.027] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:52.331] <TB0> INFO: Expecting 2560 events.
[21:29:53.220] <TB0> INFO: 2560 events read in total (297ms).
[21:29:53.221] <TB0> INFO: Test took 1194ms.
[21:29:53.224] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:53.529] <TB0> INFO: Expecting 2560 events.
[21:29:54.418] <TB0> INFO: 2560 events read in total (297ms).
[21:29:54.418] <TB0> INFO: Test took 1194ms.
[21:29:54.421] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:54.725] <TB0> INFO: Expecting 2560 events.
[21:29:55.608] <TB0> INFO: 2560 events read in total (291ms).
[21:29:55.608] <TB0> INFO: Test took 1188ms.
[21:29:55.610] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:55.917] <TB0> INFO: Expecting 2560 events.
[21:29:56.803] <TB0> INFO: 2560 events read in total (294ms).
[21:29:56.803] <TB0> INFO: Test took 1193ms.
[21:29:56.808] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:57.112] <TB0> INFO: Expecting 2560 events.
[21:29:57.993] <TB0> INFO: 2560 events read in total (289ms).
[21:29:57.996] <TB0> INFO: Test took 1188ms.
[21:29:57.998] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:58.302] <TB0> INFO: Expecting 2560 events.
[21:29:59.188] <TB0> INFO: 2560 events read in total (294ms).
[21:29:59.189] <TB0> INFO: Test took 1191ms.
[21:29:59.194] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:29:59.496] <TB0> INFO: Expecting 2560 events.
[21:30:00.379] <TB0> INFO: 2560 events read in total (291ms).
[21:30:00.379] <TB0> INFO: Test took 1185ms.
[21:30:00.383] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:00.687] <TB0> INFO: Expecting 2560 events.
[21:30:01.576] <TB0> INFO: 2560 events read in total (297ms).
[21:30:01.577] <TB0> INFO: Test took 1195ms.
[21:30:01.581] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:01.885] <TB0> INFO: Expecting 2560 events.
[21:30:02.776] <TB0> INFO: 2560 events read in total (299ms).
[21:30:02.776] <TB0> INFO: Test took 1195ms.
[21:30:02.779] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:03.084] <TB0> INFO: Expecting 2560 events.
[21:30:03.974] <TB0> INFO: 2560 events read in total (298ms).
[21:30:03.974] <TB0> INFO: Test took 1195ms.
[21:30:03.978] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:04.281] <TB0> INFO: Expecting 2560 events.
[21:30:05.170] <TB0> INFO: 2560 events read in total (296ms).
[21:30:05.170] <TB0> INFO: Test took 1193ms.
[21:30:05.172] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:05.479] <TB0> INFO: Expecting 2560 events.
[21:30:06.364] <TB0> INFO: 2560 events read in total (294ms).
[21:30:06.364] <TB0> INFO: Test took 1192ms.
[21:30:06.366] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:06.673] <TB0> INFO: Expecting 2560 events.
[21:30:07.559] <TB0> INFO: 2560 events read in total (295ms).
[21:30:07.559] <TB0> INFO: Test took 1193ms.
[21:30:07.561] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:07.869] <TB0> INFO: Expecting 2560 events.
[21:30:08.755] <TB0> INFO: 2560 events read in total (295ms).
[21:30:08.755] <TB0> INFO: Test took 1194ms.
[21:30:08.757] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:30:09.064] <TB0> INFO: Expecting 2560 events.
[21:30:09.958] <TB0> INFO: 2560 events read in total (300ms).
[21:30:09.958] <TB0> INFO: Test took 1201ms.
[21:30:10.435] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 647 seconds
[21:30:10.435] <TB0> INFO: PH scale (per ROC): 54 53 44 35 51 33 33 34 48 47 46 21 30 47 36 54
[21:30:10.435] <TB0> INFO: PH offset (per ROC): 123 123 112 94 120 108 84 106 125 107 126 88 106 127 103 102
[21:30:10.443] <TB0> INFO: Decoding statistics:
[21:30:10.443] <TB0> INFO: General information:
[21:30:10.443] <TB0> INFO: 16bit words read: 127860
[21:30:10.443] <TB0> INFO: valid events total: 20480
[21:30:10.443] <TB0> INFO: empty events: 17990
[21:30:10.443] <TB0> INFO: valid events with pixels: 2490
[21:30:10.443] <TB0> INFO: valid pixel hits: 2490
[21:30:10.443] <TB0> INFO: Event errors: 0
[21:30:10.443] <TB0> INFO: start marker: 0
[21:30:10.443] <TB0> INFO: stop marker: 0
[21:30:10.443] <TB0> INFO: overflow: 0
[21:30:10.443] <TB0> INFO: invalid 5bit words: 0
[21:30:10.443] <TB0> INFO: invalid XOR eye diagram: 0
[21:30:10.443] <TB0> INFO: frame (failed synchr.): 0
[21:30:10.443] <TB0> INFO: idle data (no TBM trl): 0
[21:30:10.443] <TB0> INFO: no data (only TBM hdr): 0
[21:30:10.443] <TB0> INFO: TBM errors: 0
[21:30:10.443] <TB0> INFO: flawed TBM headers: 0
[21:30:10.443] <TB0> INFO: flawed TBM trailers: 0
[21:30:10.443] <TB0> INFO: event ID mismatches: 0
[21:30:10.443] <TB0> INFO: ROC errors: 0
[21:30:10.443] <TB0> INFO: missing ROC header(s): 0
[21:30:10.443] <TB0> INFO: misplaced readback start: 0
[21:30:10.443] <TB0> INFO: Pixel decoding errors: 0
[21:30:10.443] <TB0> INFO: pixel data incomplete: 0
[21:30:10.443] <TB0> INFO: pixel address: 0
[21:30:10.443] <TB0> INFO: pulse height fill bit: 0
[21:30:10.443] <TB0> INFO: buffer corruption: 0
[21:30:10.619] <TB0> INFO: ######################################################################
[21:30:10.619] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[21:30:10.619] <TB0> INFO: ######################################################################
[21:30:10.635] <TB0> INFO: scanning low vcal = 10
[21:30:10.898] <TB0> INFO: Expecting 41600 events.
[21:30:14.518] <TB0> INFO: 41600 events read in total (3028ms).
[21:30:14.518] <TB0> INFO: Test took 3883ms.
[21:30:14.521] <TB0> INFO: scanning low vcal = 20
[21:30:14.815] <TB0> INFO: Expecting 41600 events.
[21:30:18.395] <TB0> INFO: 41600 events read in total (2987ms).
[21:30:18.396] <TB0> INFO: Test took 3875ms.
[21:30:18.398] <TB0> INFO: scanning low vcal = 30
[21:30:18.691] <TB0> INFO: Expecting 41600 events.
[21:30:22.378] <TB0> INFO: 41600 events read in total (3095ms).
[21:30:22.378] <TB0> INFO: Test took 3980ms.
[21:30:22.381] <TB0> INFO: scanning low vcal = 40
[21:30:22.660] <TB0> INFO: Expecting 41600 events.
[21:30:26.659] <TB0> INFO: 41600 events read in total (3407ms).
[21:30:26.660] <TB0> INFO: Test took 4279ms.
[21:30:26.663] <TB0> INFO: scanning low vcal = 50
[21:30:26.940] <TB0> INFO: Expecting 41600 events.
[21:30:30.959] <TB0> INFO: 41600 events read in total (3427ms).
[21:30:30.960] <TB0> INFO: Test took 4296ms.
[21:30:30.963] <TB0> INFO: scanning low vcal = 60
[21:30:31.245] <TB0> INFO: Expecting 41600 events.
[21:30:35.276] <TB0> INFO: 41600 events read in total (3439ms).
[21:30:35.277] <TB0> INFO: Test took 4313ms.
[21:30:35.280] <TB0> INFO: scanning low vcal = 70
[21:30:35.557] <TB0> INFO: Expecting 41600 events.
[21:30:39.583] <TB0> INFO: 41600 events read in total (3435ms).
[21:30:39.584] <TB0> INFO: Test took 4304ms.
[21:30:39.587] <TB0> INFO: scanning low vcal = 80
[21:30:39.864] <TB0> INFO: Expecting 41600 events.
[21:30:43.858] <TB0> INFO: 41600 events read in total (3402ms).
[21:30:43.858] <TB0> INFO: Test took 4271ms.
[21:30:43.861] <TB0> INFO: scanning low vcal = 90
[21:30:44.138] <TB0> INFO: Expecting 41600 events.
[21:30:48.116] <TB0> INFO: 41600 events read in total (3386ms).
[21:30:48.116] <TB0> INFO: Test took 4255ms.
[21:30:48.121] <TB0> INFO: scanning low vcal = 100
[21:30:48.398] <TB0> INFO: Expecting 41600 events.
[21:30:52.424] <TB0> INFO: 41600 events read in total (3434ms).
[21:30:52.425] <TB0> INFO: Test took 4304ms.
[21:30:52.428] <TB0> INFO: scanning low vcal = 110
[21:30:52.705] <TB0> INFO: Expecting 41600 events.
[21:30:56.702] <TB0> INFO: 41600 events read in total (3406ms).
[21:30:56.703] <TB0> INFO: Test took 4275ms.
[21:30:56.706] <TB0> INFO: scanning low vcal = 120
[21:30:56.983] <TB0> INFO: Expecting 41600 events.
[21:31:00.974] <TB0> INFO: 41600 events read in total (3399ms).
[21:31:00.975] <TB0> INFO: Test took 4268ms.
[21:31:00.978] <TB0> INFO: scanning low vcal = 130
[21:31:01.255] <TB0> INFO: Expecting 41600 events.
[21:31:05.223] <TB0> INFO: 41600 events read in total (3377ms).
[21:31:05.224] <TB0> INFO: Test took 4246ms.
[21:31:05.227] <TB0> INFO: scanning low vcal = 140
[21:31:05.504] <TB0> INFO: Expecting 41600 events.
[21:31:09.519] <TB0> INFO: 41600 events read in total (3423ms).
[21:31:09.520] <TB0> INFO: Test took 4293ms.
[21:31:09.524] <TB0> INFO: scanning low vcal = 150
[21:31:09.800] <TB0> INFO: Expecting 41600 events.
[21:31:13.829] <TB0> INFO: 41600 events read in total (3437ms).
[21:31:13.830] <TB0> INFO: Test took 4306ms.
[21:31:13.833] <TB0> INFO: scanning low vcal = 160
[21:31:14.110] <TB0> INFO: Expecting 41600 events.
[21:31:18.124] <TB0> INFO: 41600 events read in total (3422ms).
[21:31:18.125] <TB0> INFO: Test took 4291ms.
[21:31:18.128] <TB0> INFO: scanning low vcal = 170
[21:31:18.405] <TB0> INFO: Expecting 41600 events.
[21:31:22.425] <TB0> INFO: 41600 events read in total (3428ms).
[21:31:22.426] <TB0> INFO: Test took 4298ms.
[21:31:22.431] <TB0> INFO: scanning low vcal = 180
[21:31:22.705] <TB0> INFO: Expecting 41600 events.
[21:31:26.723] <TB0> INFO: 41600 events read in total (3426ms).
[21:31:26.724] <TB0> INFO: Test took 4293ms.
[21:31:26.727] <TB0> INFO: scanning low vcal = 190
[21:31:27.005] <TB0> INFO: Expecting 41600 events.
[21:31:30.976] <TB0> INFO: 41600 events read in total (3380ms).
[21:31:30.977] <TB0> INFO: Test took 4249ms.
[21:31:30.980] <TB0> INFO: scanning low vcal = 200
[21:31:31.257] <TB0> INFO: Expecting 41600 events.
[21:31:35.277] <TB0> INFO: 41600 events read in total (3429ms).
[21:31:35.278] <TB0> INFO: Test took 4298ms.
[21:31:35.281] <TB0> INFO: scanning low vcal = 210
[21:31:35.558] <TB0> INFO: Expecting 41600 events.
[21:31:39.533] <TB0> INFO: 41600 events read in total (3383ms).
[21:31:39.534] <TB0> INFO: Test took 4253ms.
[21:31:39.537] <TB0> INFO: scanning low vcal = 220
[21:31:39.814] <TB0> INFO: Expecting 41600 events.
[21:31:43.806] <TB0> INFO: 41600 events read in total (3400ms).
[21:31:43.807] <TB0> INFO: Test took 4270ms.
[21:31:43.810] <TB0> INFO: scanning low vcal = 230
[21:31:44.086] <TB0> INFO: Expecting 41600 events.
[21:31:48.095] <TB0> INFO: 41600 events read in total (3417ms).
[21:31:48.095] <TB0> INFO: Test took 4285ms.
[21:31:48.098] <TB0> INFO: scanning low vcal = 240
[21:31:48.375] <TB0> INFO: Expecting 41600 events.
[21:31:52.379] <TB0> INFO: 41600 events read in total (3412ms).
[21:31:52.381] <TB0> INFO: Test took 4283ms.
[21:31:52.384] <TB0> INFO: scanning low vcal = 250
[21:31:52.660] <TB0> INFO: Expecting 41600 events.
[21:31:56.633] <TB0> INFO: 41600 events read in total (3381ms).
[21:31:56.634] <TB0> INFO: Test took 4250ms.
[21:31:56.638] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[21:31:56.914] <TB0> INFO: Expecting 41600 events.
[21:32:00.876] <TB0> INFO: 41600 events read in total (3370ms).
[21:32:00.877] <TB0> INFO: Test took 4239ms.
[21:32:00.880] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[21:32:01.157] <TB0> INFO: Expecting 41600 events.
[21:32:05.170] <TB0> INFO: 41600 events read in total (3422ms).
[21:32:05.171] <TB0> INFO: Test took 4291ms.
[21:32:05.174] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[21:32:05.451] <TB0> INFO: Expecting 41600 events.
[21:32:09.388] <TB0> INFO: 41600 events read in total (3346ms).
[21:32:09.389] <TB0> INFO: Test took 4215ms.
[21:32:09.392] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[21:32:09.682] <TB0> INFO: Expecting 41600 events.
[21:32:13.612] <TB0> INFO: 41600 events read in total (3338ms).
[21:32:13.613] <TB0> INFO: Test took 4221ms.
[21:32:13.616] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[21:32:13.893] <TB0> INFO: Expecting 41600 events.
[21:32:17.822] <TB0> INFO: 41600 events read in total (3338ms).
[21:32:17.823] <TB0> INFO: Test took 4207ms.
[21:32:18.513] <TB0> INFO: PixTestGainPedestal::measure() done
[21:32:56.408] <TB0> INFO: PixTestGainPedestal::fit() done
[21:32:56.408] <TB0> INFO: non-linearity mean: 0.984 0.982 0.962 0.916 0.986 0.933 0.921 0.914 0.978 0.975 0.971 1.059 0.948 0.982 0.941 0.977
[21:32:56.408] <TB0> INFO: non-linearity RMS: 0.003 0.004 0.023 0.138 0.003 0.170 0.112 0.158 0.004 0.012 0.014 0.128 0.162 0.004 0.150 0.024
[21:32:56.408] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[21:32:56.423] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[21:32:56.435] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[21:32:56.448] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[21:32:56.462] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[21:32:56.475] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[21:32:56.488] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[21:32:56.501] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[21:32:56.514] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[21:32:56.527] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[21:32:56.540] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[21:32:56.552] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[21:32:56.565] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[21:32:56.578] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[21:32:56.590] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[21:32:56.603] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[21:32:56.616] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[21:32:56.616] <TB0> INFO: Decoding statistics:
[21:32:56.616] <TB0> INFO: General information:
[21:32:56.616] <TB0> INFO: 16bit words read: 3268754
[21:32:56.616] <TB0> INFO: valid events total: 332800
[21:32:56.616] <TB0> INFO: empty events: 2156
[21:32:56.616] <TB0> INFO: valid events with pixels: 330644
[21:32:56.616] <TB0> INFO: valid pixel hits: 635977
[21:32:56.616] <TB0> INFO: Event errors: 0
[21:32:56.616] <TB0> INFO: start marker: 0
[21:32:56.616] <TB0> INFO: stop marker: 0
[21:32:56.616] <TB0> INFO: overflow: 0
[21:32:56.616] <TB0> INFO: invalid 5bit words: 0
[21:32:56.616] <TB0> INFO: invalid XOR eye diagram: 0
[21:32:56.616] <TB0> INFO: frame (failed synchr.): 0
[21:32:56.616] <TB0> INFO: idle data (no TBM trl): 0
[21:32:56.616] <TB0> INFO: no data (only TBM hdr): 0
[21:32:56.616] <TB0> INFO: TBM errors: 0
[21:32:56.616] <TB0> INFO: flawed TBM headers: 0
[21:32:56.616] <TB0> INFO: flawed TBM trailers: 0
[21:32:56.616] <TB0> INFO: event ID mismatches: 0
[21:32:56.616] <TB0> INFO: ROC errors: 0
[21:32:56.616] <TB0> INFO: missing ROC header(s): 0
[21:32:56.616] <TB0> INFO: misplaced readback start: 0
[21:32:56.616] <TB0> INFO: Pixel decoding errors: 0
[21:32:56.616] <TB0> INFO: pixel data incomplete: 0
[21:32:56.616] <TB0> INFO: pixel address: 0
[21:32:56.616] <TB0> INFO: pulse height fill bit: 0
[21:32:56.616] <TB0> INFO: buffer corruption: 0
[21:32:56.634] <TB0> INFO: Decoding statistics:
[21:32:56.634] <TB0> INFO: General information:
[21:32:56.634] <TB0> INFO: 16bit words read: 3398150
[21:32:56.634] <TB0> INFO: valid events total: 353536
[21:32:56.634] <TB0> INFO: empty events: 20402
[21:32:56.634] <TB0> INFO: valid events with pixels: 333134
[21:32:56.634] <TB0> INFO: valid pixel hits: 638467
[21:32:56.634] <TB0> INFO: Event errors: 0
[21:32:56.634] <TB0> INFO: start marker: 0
[21:32:56.634] <TB0> INFO: stop marker: 0
[21:32:56.634] <TB0> INFO: overflow: 0
[21:32:56.634] <TB0> INFO: invalid 5bit words: 0
[21:32:56.634] <TB0> INFO: invalid XOR eye diagram: 0
[21:32:56.634] <TB0> INFO: frame (failed synchr.): 0
[21:32:56.634] <TB0> INFO: idle data (no TBM trl): 0
[21:32:56.634] <TB0> INFO: no data (only TBM hdr): 0
[21:32:56.634] <TB0> INFO: TBM errors: 0
[21:32:56.634] <TB0> INFO: flawed TBM headers: 0
[21:32:56.634] <TB0> INFO: flawed TBM trailers: 0
[21:32:56.634] <TB0> INFO: event ID mismatches: 0
[21:32:56.634] <TB0> INFO: ROC errors: 0
[21:32:56.634] <TB0> INFO: missing ROC header(s): 0
[21:32:56.634] <TB0> INFO: misplaced readback start: 0
[21:32:56.634] <TB0> INFO: Pixel decoding errors: 0
[21:32:56.634] <TB0> INFO: pixel data incomplete: 0
[21:32:56.634] <TB0> INFO: pixel address: 0
[21:32:56.634] <TB0> INFO: pulse height fill bit: 0
[21:32:56.634] <TB0> INFO: buffer corruption: 0
[21:32:56.634] <TB0> INFO: enter test to run
[21:32:56.634] <TB0> INFO: test: trim80 no parameter change
[21:32:56.634] <TB0> INFO: running: trim80
[21:32:56.635] <TB0> INFO: ######################################################################
[21:32:56.635] <TB0> INFO: PixTestTrim80::doTest()
[21:32:56.635] <TB0> INFO: ######################################################################
[21:32:56.636] <TB0> INFO: ----------------------------------------------------------------------
[21:32:56.637] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[21:32:56.637] <TB0> INFO: ----------------------------------------------------------------------
[21:32:56.679] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:32:56.679] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:32:56.692] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:32:56.692] <TB0> INFO: run 1 of 1
[21:32:56.929] <TB0> INFO: Expecting 5025280 events.
[21:33:24.623] <TB0> INFO: 682896 events read in total (27102ms).
[21:33:52.759] <TB0> INFO: 1362216 events read in total (55238ms).
[21:34:20.900] <TB0> INFO: 2039856 events read in total (83379ms).
[21:34:48.966] <TB0> INFO: 2715576 events read in total (111445ms).
[21:35:16.653] <TB0> INFO: 3390968 events read in total (139132ms).
[21:35:43.401] <TB0> INFO: 4064432 events read in total (165880ms).
[21:36:11.310] <TB0> INFO: 4736592 events read in total (193789ms).
[21:36:23.406] <TB0> INFO: 5025280 events read in total (205885ms).
[21:36:23.519] <TB0> INFO: Test took 206827ms.
[21:36:45.295] <TB0> INFO: ROC 0 VthrComp = 77
[21:36:45.295] <TB0> INFO: ROC 1 VthrComp = 68
[21:36:45.295] <TB0> INFO: ROC 2 VthrComp = 76
[21:36:45.295] <TB0> INFO: ROC 3 VthrComp = 67
[21:36:45.295] <TB0> INFO: ROC 4 VthrComp = 70
[21:36:45.295] <TB0> INFO: ROC 5 VthrComp = 84
[21:36:45.295] <TB0> INFO: ROC 6 VthrComp = 72
[21:36:45.296] <TB0> INFO: ROC 7 VthrComp = 74
[21:36:45.296] <TB0> INFO: ROC 8 VthrComp = 73
[21:36:45.296] <TB0> INFO: ROC 9 VthrComp = 85
[21:36:45.296] <TB0> INFO: ROC 10 VthrComp = 77
[21:36:45.296] <TB0> INFO: ROC 11 VthrComp = 74
[21:36:45.296] <TB0> INFO: ROC 12 VthrComp = 75
[21:36:45.296] <TB0> INFO: ROC 13 VthrComp = 70
[21:36:45.296] <TB0> INFO: ROC 14 VthrComp = 78
[21:36:45.296] <TB0> INFO: ROC 15 VthrComp = 74
[21:36:45.579] <TB0> INFO: Expecting 41600 events.
[21:36:49.135] <TB0> INFO: 41600 events read in total (2965ms).
[21:36:49.136] <TB0> INFO: Test took 3839ms.
[21:36:49.145] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:36:49.145] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:36:49.156] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:36:49.156] <TB0> INFO: run 1 of 1
[21:36:49.434] <TB0> INFO: Expecting 5025280 events.
[21:37:17.301] <TB0> INFO: 690696 events read in total (27275ms).
[21:37:45.466] <TB0> INFO: 1376928 events read in total (55440ms).
[21:38:13.527] <TB0> INFO: 2060216 events read in total (83501ms).
[21:38:41.383] <TB0> INFO: 2741632 events read in total (111357ms).
[21:39:09.611] <TB0> INFO: 3416808 events read in total (139585ms).
[21:39:37.249] <TB0> INFO: 4090232 events read in total (167223ms).
[21:40:04.231] <TB0> INFO: 4762176 events read in total (194205ms).
[21:40:15.281] <TB0> INFO: 5025280 events read in total (205255ms).
[21:40:15.370] <TB0> INFO: Test took 206214ms.
[21:40:37.323] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 109.379 for pixel 0/0 mean/min/max = 93.8015/78.1937/109.409
[21:40:37.324] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 106.964 for pixel 0/19 mean/min/max = 90.5846/74.0884/107.081
[21:40:37.324] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 111 for pixel 14/9 mean/min/max = 94.3176/77.576/111.059
[21:40:37.325] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 119.271 for pixel 2/9 mean/min/max = 95.8497/72.3829/119.317
[21:40:37.325] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 110.494 for pixel 0/50 mean/min/max = 92.3125/74.0533/110.572
[21:40:37.326] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 108.455 for pixel 14/8 mean/min/max = 91.3645/74.2445/108.484
[21:40:37.327] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 106.269 for pixel 37/72 mean/min/max = 91.7777/76.9481/106.607
[21:40:37.327] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 110.429 for pixel 0/77 mean/min/max = 94.3342/77.9531/110.715
[21:40:37.330] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 107.369 for pixel 0/10 mean/min/max = 92.7605/78.0124/107.509
[21:40:37.331] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 112.655 for pixel 0/2 mean/min/max = 93.6316/73.5885/113.675
[21:40:37.331] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 110.538 for pixel 12/20 mean/min/max = 94.4783/78.3747/110.582
[21:40:37.332] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 110.727 for pixel 0/61 mean/min/max = 94.2706/77.6137/110.928
[21:40:37.332] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 111.012 for pixel 0/18 mean/min/max = 94.6849/78.0208/111.349
[21:40:37.333] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 105.642 for pixel 19/79 mean/min/max = 89.9634/74.239/105.688
[21:40:37.334] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 113.693 for pixel 4/79 mean/min/max = 95.2541/76.802/113.706
[21:40:37.334] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 111.288 for pixel 0/78 mean/min/max = 94.2929/77.0557/111.53
[21:40:37.335] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:40:37.423] <TB0> INFO: Expecting 411648 events.
[21:40:46.893] <TB0> INFO: 411648 events read in total (8878ms).
[21:40:46.901] <TB0> INFO: Expecting 411648 events.
[21:40:56.155] <TB0> INFO: 411648 events read in total (8851ms).
[21:40:56.166] <TB0> INFO: Expecting 411648 events.
[21:41:05.407] <TB0> INFO: 411648 events read in total (8838ms).
[21:41:05.422] <TB0> INFO: Expecting 411648 events.
[21:41:14.609] <TB0> INFO: 411648 events read in total (8785ms).
[21:41:14.626] <TB0> INFO: Expecting 411648 events.
[21:41:24.105] <TB0> INFO: 411648 events read in total (9076ms).
[21:41:24.129] <TB0> INFO: Expecting 411648 events.
[21:41:33.392] <TB0> INFO: 411648 events read in total (8860ms).
[21:41:33.416] <TB0> INFO: Expecting 411648 events.
[21:41:42.645] <TB0> INFO: 411648 events read in total (8826ms).
[21:41:42.677] <TB0> INFO: Expecting 411648 events.
[21:41:52.104] <TB0> INFO: 411648 events read in total (9024ms).
[21:41:52.131] <TB0> INFO: Expecting 411648 events.
[21:42:01.389] <TB0> INFO: 411648 events read in total (8855ms).
[21:42:01.443] <TB0> INFO: Expecting 411648 events.
[21:42:10.724] <TB0> INFO: 411648 events read in total (8879ms).
[21:42:10.781] <TB0> INFO: Expecting 411648 events.
[21:42:20.272] <TB0> INFO: 411648 events read in total (9088ms).
[21:42:20.332] <TB0> INFO: Expecting 411648 events.
[21:42:29.591] <TB0> INFO: 411648 events read in total (8856ms).
[21:42:29.657] <TB0> INFO: Expecting 411648 events.
[21:42:38.879] <TB0> INFO: 411648 events read in total (8819ms).
[21:42:38.934] <TB0> INFO: Expecting 411648 events.
[21:42:48.423] <TB0> INFO: 411648 events read in total (9086ms).
[21:42:48.483] <TB0> INFO: Expecting 411648 events.
[21:42:57.701] <TB0> INFO: 411648 events read in total (8815ms).
[21:42:57.762] <TB0> INFO: Expecting 411648 events.
[21:43:07.024] <TB0> INFO: 411648 events read in total (8859ms).
[21:43:07.090] <TB0> INFO: Test took 149756ms.
[21:43:08.652] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:43:08.664] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:43:08.664] <TB0> INFO: run 1 of 1
[21:43:08.902] <TB0> INFO: Expecting 5025280 events.
[21:43:36.908] <TB0> INFO: 671288 events read in total (27414ms).
[21:44:04.191] <TB0> INFO: 1337880 events read in total (54697ms).
[21:44:31.844] <TB0> INFO: 2001944 events read in total (82350ms).
[21:44:59.188] <TB0> INFO: 2664272 events read in total (109694ms).
[21:45:26.558] <TB0> INFO: 3321392 events read in total (137064ms).
[21:45:53.820] <TB0> INFO: 3976784 events read in total (164326ms).
[21:46:20.757] <TB0> INFO: 4628888 events read in total (191263ms).
[21:46:38.319] <TB0> INFO: 5025280 events read in total (208825ms).
[21:46:38.388] <TB0> INFO: Test took 209724ms.
[21:47:00.249] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 52.463168 .. 117.485052
[21:47:00.487] <TB0> INFO: Expecting 208000 events.
[21:47:10.021] <TB0> INFO: 208000 events read in total (8942ms).
[21:47:10.022] <TB0> INFO: Test took 9772ms.
[21:47:10.091] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 127 (-1/-1) hits flags = 528 (plus default)
[21:47:10.105] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:47:10.105] <TB0> INFO: run 1 of 1
[21:47:10.383] <TB0> INFO: Expecting 2862080 events.
[21:47:38.344] <TB0> INFO: 654296 events read in total (27369ms).
[21:48:05.186] <TB0> INFO: 1308288 events read in total (54211ms).
[21:48:32.045] <TB0> INFO: 1956976 events read in total (81070ms).
[21:48:59.056] <TB0> INFO: 2601136 events read in total (108081ms).
[21:49:10.088] <TB0> INFO: 2862080 events read in total (119113ms).
[21:49:10.139] <TB0> INFO: Test took 120034ms.
[21:49:29.464] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 63.471663 .. 107.438714
[21:49:29.704] <TB0> INFO: Expecting 208000 events.
[21:49:39.476] <TB0> INFO: 208000 events read in total (9180ms).
[21:49:39.477] <TB0> INFO: Test took 10012ms.
[21:49:39.524] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 53 .. 117 (-1/-1) hits flags = 528 (plus default)
[21:49:39.537] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:49:39.537] <TB0> INFO: run 1 of 1
[21:49:39.815] <TB0> INFO: Expecting 2163200 events.
[21:50:07.624] <TB0> INFO: 642456 events read in total (27217ms).
[21:50:34.642] <TB0> INFO: 1285736 events read in total (54235ms).
[21:51:01.689] <TB0> INFO: 1927624 events read in total (81282ms).
[21:51:11.764] <TB0> INFO: 2163200 events read in total (91357ms).
[21:51:11.802] <TB0> INFO: Test took 92265ms.
[21:51:31.407] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 67.770851 .. 101.047104
[21:51:31.646] <TB0> INFO: Expecting 208000 events.
[21:51:41.458] <TB0> INFO: 208000 events read in total (9220ms).
[21:51:41.459] <TB0> INFO: Test took 10051ms.
[21:51:41.509] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 57 .. 111 (-1/-1) hits flags = 528 (plus default)
[21:51:41.527] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:51:41.527] <TB0> INFO: run 1 of 1
[21:51:41.805] <TB0> INFO: Expecting 1830400 events.
[21:52:09.294] <TB0> INFO: 645152 events read in total (26897ms).
[21:52:36.488] <TB0> INFO: 1289688 events read in total (54091ms).
[21:52:58.933] <TB0> INFO: 1830400 events read in total (76536ms).
[21:52:58.967] <TB0> INFO: Test took 77441ms.
[21:53:15.002] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 71.624119 .. 101.047104
[21:53:16.240] <TB0> INFO: Expecting 208000 events.
[21:53:25.779] <TB0> INFO: 208000 events read in total (8948ms).
[21:53:25.780] <TB0> INFO: Test took 9777ms.
[21:53:25.849] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 61 .. 111 (-1/-1) hits flags = 528 (plus default)
[21:53:25.863] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:53:25.863] <TB0> INFO: run 1 of 1
[21:53:26.141] <TB0> INFO: Expecting 1697280 events.
[21:53:53.544] <TB0> INFO: 631680 events read in total (26811ms).
[21:54:20.886] <TB0> INFO: 1263328 events read in total (54153ms).
[21:54:39.158] <TB0> INFO: 1697280 events read in total (72425ms).
[21:54:39.197] <TB0> INFO: Test took 73335ms.
[21:54:56.175] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[21:54:56.176] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[21:54:56.189] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[21:54:56.189] <TB0> INFO: run 1 of 1
[21:54:56.425] <TB0> INFO: Expecting 1364480 events.
[21:55:24.899] <TB0> INFO: 668848 events read in total (27882ms).
[21:55:52.992] <TB0> INFO: 1337000 events read in total (55975ms).
[21:55:54.536] <TB0> INFO: 1364480 events read in total (57519ms).
[21:55:54.561] <TB0> INFO: Test took 58372ms.
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C0.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C1.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C2.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C3.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C4.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C5.dat
[21:56:10.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C6.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C7.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C8.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C9.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C10.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C11.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C12.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C13.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C14.dat
[21:56:10.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//dacParameters80_C15.dat
[21:56:10.501] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C0.dat
[21:56:10.508] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C1.dat
[21:56:10.513] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C2.dat
[21:56:10.518] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C3.dat
[21:56:10.523] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C4.dat
[21:56:10.528] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C5.dat
[21:56:10.532] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C6.dat
[21:56:10.538] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C7.dat
[21:56:10.542] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C8.dat
[21:56:10.547] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C9.dat
[21:56:10.552] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C10.dat
[21:56:10.557] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C11.dat
[21:56:10.562] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C12.dat
[21:56:10.567] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C13.dat
[21:56:10.572] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C14.dat
[21:56:10.577] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1116_FullQualification_2016-11-04_17h17m_1478276226//003_FulltestTrim80_p17//trimParameters80_C15.dat
[21:56:10.582] <TB0> INFO: PixTestTrim80::trimTest() done
[21:56:10.582] <TB0> INFO: vtrim: 99 87 109 123 101 116 87 103 86 112 99 91 98 84 106 95
[21:56:10.582] <TB0> INFO: vthrcomp: 77 68 76 67 70 84 72 74 73 85 77 74 75 70 78 74
[21:56:10.582] <TB0> INFO: vcal mean: 79.99 79.95 79.91 79.93 79.96 79.93 80.01 79.98 79.93 79.94 79.99 79.96 80.00 79.99 79.95 79.95
[21:56:10.582] <TB0> INFO: vcal RMS: 0.71 0.69 1.92 0.88 0.80 0.79 0.73 0.70 0.68 0.79 0.74 0.73 0.76 0.75 0.75 0.74
[21:56:10.582] <TB0> INFO: bits mean: 9.02 10.12 9.57 9.99 9.92 10.78 9.44 8.95 9.35 10.05 9.55 9.30 9.13 10.27 9.10 9.28
[21:56:10.582] <TB0> INFO: bits RMS: 2.37 2.47 2.20 2.51 2.53 2.13 2.33 2.37 2.30 2.45 2.11 2.29 2.36 2.49 2.46 2.42
[21:56:10.589] <TB0> INFO: ----------------------------------------------------------------------
[21:56:10.589] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:56:10.589] <TB0> INFO: ----------------------------------------------------------------------
[21:56:10.591] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:56:10.605] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:56:10.605] <TB0> INFO: run 1 of 1
[21:56:10.887] <TB0> INFO: Expecting 4160000 events.
[21:56:43.793] <TB0> INFO: 771960 events read in total (32315ms).
[21:57:16.278] <TB0> INFO: 1538585 events read in total (64800ms).
[21:57:49.248] <TB0> INFO: 2301580 events read in total (97770ms).
[21:58:20.894] <TB0> INFO: 3060730 events read in total (129416ms).
[21:58:52.884] <TB0> INFO: 3815235 events read in total (161406ms).
[21:59:08.006] <TB0> INFO: 4160000 events read in total (176528ms).
[21:59:08.073] <TB0> INFO: Test took 177469ms.
[21:59:30.746] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[21:59:30.760] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:59:30.760] <TB0> INFO: run 1 of 1
[21:59:30.998] <TB0> INFO: Expecting 4430400 events.
[22:00:03.066] <TB0> INFO: 728060 events read in total (31476ms).
[22:00:34.519] <TB0> INFO: 1452315 events read in total (62929ms).
[22:01:05.925] <TB0> INFO: 2174190 events read in total (94335ms).
[22:01:36.980] <TB0> INFO: 2892325 events read in total (125390ms).
[22:02:08.144] <TB0> INFO: 3607040 events read in total (156555ms).
[22:02:39.013] <TB0> INFO: 4321485 events read in total (187423ms).
[22:02:43.959] <TB0> INFO: 4430400 events read in total (192369ms).
[22:02:44.043] <TB0> INFO: Test took 193284ms.
[22:03:10.016] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[22:03:10.031] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[22:03:10.031] <TB0> INFO: run 1 of 1
[22:03:10.321] <TB0> INFO: Expecting 4555200 events.
[22:03:42.124] <TB0> INFO: 721180 events read in total (31212ms).
[22:04:13.050] <TB0> INFO: 1438705 events read in total (62138ms).
[22:04:44.074] <TB0> INFO: 2154840 events read in total (93162ms).
[22:05:14.672] <TB0> INFO: 2866375 events read in total (123760ms).
[22:05:45.604] <TB0> INFO: 3575930 events read in total (154692ms).
[22:06:16.882] <TB0> INFO: 4283690 events read in total (185970ms).
[22:06:28.946] <TB0> INFO: 4555200 events read in total (198034ms).
[22:06:29.042] <TB0> INFO: Test took 199011ms.
[22:06:55.370] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[22:06:55.383] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[22:06:55.383] <TB0> INFO: run 1 of 1
[22:06:55.626] <TB0> INFO: Expecting 4305600 events.
[22:07:27.977] <TB0> INFO: 736605 events read in total (31759ms).
[22:07:59.948] <TB0> INFO: 1468835 events read in total (63730ms).
[22:08:31.200] <TB0> INFO: 2199315 events read in total (94982ms).
[22:09:02.564] <TB0> INFO: 2924950 events read in total (126346ms).
[22:09:33.562] <TB0> INFO: 3647185 events read in total (157344ms).
[22:10:01.828] <TB0> INFO: 4305600 events read in total (185610ms).
[22:10:01.932] <TB0> INFO: Test took 186549ms.
[22:10:29.170] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[22:10:29.184] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[22:10:29.184] <TB0> INFO: run 1 of 1
[22:10:29.423] <TB0> INFO: Expecting 4284800 events.
[22:11:01.593] <TB0> INFO: 737780 events read in total (31579ms).
[22:11:33.212] <TB0> INFO: 1471315 events read in total (63198ms).
[22:12:04.150] <TB0> INFO: 2202890 events read in total (94136ms).
[22:12:36.445] <TB0> INFO: 2929520 events read in total (126431ms).
[22:13:08.244] <TB0> INFO: 3652870 events read in total (158230ms).
[22:13:37.277] <TB0> INFO: 4284800 events read in total (187263ms).
[22:13:37.369] <TB0> INFO: Test took 188185ms.
[22:14:01.914] <TB0> INFO: PixTestTrim80::trimBitTest() done
[22:14:01.915] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2465 seconds
[22:14:02.725] <TB0> INFO: enter test to run
[22:14:02.725] <TB0> INFO: test: exit no parameter change
[22:14:02.954] <TB0> QUIET: Connection to board 71 closed.
[22:14:02.956] <TB0> INFO: pXar: this is the end, my friend