[16:27:19.918] <TB3> INFO: *** Welcome to pxar ***
[16:27:19.918] <TB3> INFO: *** Today: 2016/11/02
[16:27:19.923] <TB3> INFO: *** Version: c8ba-dirty
[16:27:19.923] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C15.dat
[16:27:19.924] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1b.dat
[16:27:19.924] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//defaultMaskFile.dat
[16:27:19.924] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters_C15.dat
[16:27:19.980] <TB3> INFO: clk: 4
[16:27:19.980] <TB3> INFO: ctr: 4
[16:27:19.980] <TB3> INFO: sda: 19
[16:27:19.980] <TB3> INFO: tin: 9
[16:27:19.980] <TB3> INFO: level: 15
[16:27:19.980] <TB3> INFO: triggerdelay: 0
[16:27:19.980] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[16:27:19.980] <TB3> INFO: Log level: INFO
[16:27:19.988] <TB3> INFO: Found DTB DTB_WZ4I6J
[16:27:19.997] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[16:27:19.999] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[16:27:19.000] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[16:27:21.489] <TB3> INFO: DUT info:
[16:27:21.489] <TB3> INFO: The DUT currently contains the following objects:
[16:27:21.489] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[16:27:21.489] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:27:21.489] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:27:21.489] <TB3> INFO: TBM Core alpha (2): 7 registers set
[16:27:21.489] <TB3> INFO: TBM Core beta (3): 7 registers set
[16:27:21.489] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:27:21.489] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.489] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:27:21.890] <TB3> INFO: enter 'restricted' command line mode
[16:27:21.890] <TB3> INFO: enter test to run
[16:27:21.890] <TB3> INFO: test: pretest no parameter change
[16:27:21.890] <TB3> INFO: running: pretest
[16:27:22.493] <TB3> INFO: ######################################################################
[16:27:22.493] <TB3> INFO: PixTestPretest::doTest()
[16:27:22.493] <TB3> INFO: ######################################################################
[16:27:22.494] <TB3> INFO: ----------------------------------------------------------------------
[16:27:22.494] <TB3> INFO: PixTestPretest::programROC()
[16:27:22.494] <TB3> INFO: ----------------------------------------------------------------------
[16:27:40.507] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:27:40.507] <TB3> INFO: IA differences per ROC: 18.5 20.1 19.3 18.5 22.5 18.5 20.1 22.5 18.5 16.9 20.9 20.9 20.9 20.1 16.9 20.9
[16:27:40.544] <TB3> INFO: ----------------------------------------------------------------------
[16:27:40.544] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:27:40.544] <TB3> INFO: ----------------------------------------------------------------------
[16:27:47.124] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[16:27:47.124] <TB3> INFO: i(loss) [mA/ROC]: 19.3 18.4 19.3 19.3 19.3 18.4 19.3 18.4 19.3 19.3 18.4 18.4 18.4 18.4 18.4 18.4
[16:27:47.154] <TB3> INFO: ----------------------------------------------------------------------
[16:27:47.154] <TB3> INFO: PixTestPretest::findTiming()
[16:27:47.154] <TB3> INFO: ----------------------------------------------------------------------
[16:27:47.154] <TB3> INFO: PixTestCmd::init()

[16:28:17.178] <TB3> INFO: TBM phases: 160MHz: 4, 400MHz: 2, TBM delays: ROC(0/1):3, header/trailer: 1, token: 0
[16:28:17.178] <TB3> INFO: (success/tries = 100/100), width = 4
[16:28:18.679] <TB3> INFO: ----------------------------------------------------------------------
[16:28:18.679] <TB3> INFO: PixTestPretest::findWorkingPixel()
[16:28:18.679] <TB3> INFO: ----------------------------------------------------------------------
[16:28:18.770] <TB3> INFO: Expecting 231680 events.
[16:28:28.447] <TB3> INFO: 231680 events read in total (9085ms).
[16:28:28.458] <TB3> INFO: Test took 9777ms.
[16:28:28.706] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:28:28.736] <TB3> INFO: ----------------------------------------------------------------------
[16:28:28.736] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[16:28:28.736] <TB3> INFO: ----------------------------------------------------------------------
[16:28:28.828] <TB3> INFO: Expecting 231680 events.
[16:28:38.451] <TB3> INFO: 231680 events read in total (9031ms).
[16:28:38.457] <TB3> INFO: Test took 9717ms.
[16:28:38.717] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[16:28:38.717] <TB3> INFO: CalDel: 91 95 94 83 110 97 110 111 101 100 112 83 86 90 114 109
[16:28:38.717] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C0.dat
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C1.dat
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C2.dat
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C3.dat
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C4.dat
[16:28:38.719] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C5.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C6.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C7.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C8.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C9.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C10.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C11.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C12.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C13.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C14.dat
[16:28:38.720] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters_C15.dat
[16:28:38.720] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0a.dat
[16:28:38.720] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C0b.dat
[16:28:38.720] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1a.dat
[16:28:38.721] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//tbmParameters_C1b.dat
[16:28:38.721] <TB3> INFO: PixTestPretest::doTest() done, duration: 76 seconds
[16:28:38.817] <TB3> INFO: enter test to run
[16:28:38.817] <TB3> INFO: test: FullTest no parameter change
[16:28:38.817] <TB3> INFO: running: fulltest
[16:28:38.817] <TB3> INFO: ######################################################################
[16:28:38.817] <TB3> INFO: PixTestFullTest::doTest()
[16:28:38.817] <TB3> INFO: ######################################################################
[16:28:38.819] <TB3> INFO: ######################################################################
[16:28:38.819] <TB3> INFO: PixTestAlive::doTest()
[16:28:38.819] <TB3> INFO: ######################################################################
[16:28:38.820] <TB3> INFO: ----------------------------------------------------------------------
[16:28:38.820] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:38.820] <TB3> INFO: ----------------------------------------------------------------------
[16:28:39.052] <TB3> INFO: Expecting 41600 events.
[16:28:42.542] <TB3> INFO: 41600 events read in total (2898ms).
[16:28:42.543] <TB3> INFO: Test took 3722ms.
[16:28:42.770] <TB3> INFO: PixTestAlive::aliveTest() done
[16:28:42.770] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:42.771] <TB3> INFO: ----------------------------------------------------------------------
[16:28:42.771] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:42.771] <TB3> INFO: ----------------------------------------------------------------------
[16:28:43.008] <TB3> INFO: Expecting 41600 events.
[16:28:45.955] <TB3> INFO: 41600 events read in total (2356ms).
[16:28:45.955] <TB3> INFO: Test took 3183ms.
[16:28:45.956] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:28:46.192] <TB3> INFO: PixTestAlive::maskTest() done
[16:28:46.192] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:46.194] <TB3> INFO: ----------------------------------------------------------------------
[16:28:46.194] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:28:46.194] <TB3> INFO: ----------------------------------------------------------------------
[16:28:46.430] <TB3> INFO: Expecting 41600 events.
[16:28:49.895] <TB3> INFO: 41600 events read in total (2874ms).
[16:28:49.896] <TB3> INFO: Test took 3701ms.
[16:28:50.122] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[16:28:50.122] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:50.122] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:28:50.122] <TB3> INFO: Decoding statistics:
[16:28:50.122] <TB3> INFO: General information:
[16:28:50.122] <TB3> INFO: 16bit words read: 0
[16:28:50.122] <TB3> INFO: valid events total: 0
[16:28:50.122] <TB3> INFO: empty events: 0
[16:28:50.122] <TB3> INFO: valid events with pixels: 0
[16:28:50.122] <TB3> INFO: valid pixel hits: 0
[16:28:50.122] <TB3> INFO: Event errors: 0
[16:28:50.122] <TB3> INFO: start marker: 0
[16:28:50.122] <TB3> INFO: stop marker: 0
[16:28:50.122] <TB3> INFO: overflow: 0
[16:28:50.122] <TB3> INFO: invalid 5bit words: 0
[16:28:50.123] <TB3> INFO: invalid XOR eye diagram: 0
[16:28:50.123] <TB3> INFO: frame (failed synchr.): 0
[16:28:50.123] <TB3> INFO: idle data (no TBM trl): 0
[16:28:50.123] <TB3> INFO: no data (only TBM hdr): 0
[16:28:50.123] <TB3> INFO: TBM errors: 0
[16:28:50.123] <TB3> INFO: flawed TBM headers: 0
[16:28:50.123] <TB3> INFO: flawed TBM trailers: 0
[16:28:50.123] <TB3> INFO: event ID mismatches: 0
[16:28:50.123] <TB3> INFO: ROC errors: 0
[16:28:50.123] <TB3> INFO: missing ROC header(s): 0
[16:28:50.123] <TB3> INFO: misplaced readback start: 0
[16:28:50.123] <TB3> INFO: Pixel decoding errors: 0
[16:28:50.123] <TB3> INFO: pixel data incomplete: 0
[16:28:50.123] <TB3> INFO: pixel address: 0
[16:28:50.123] <TB3> INFO: pulse height fill bit: 0
[16:28:50.123] <TB3> INFO: buffer corruption: 0
[16:28:50.129] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:28:50.130] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:28:50.130] <TB3> INFO: ######################################################################
[16:28:50.130] <TB3> INFO: PixTestReadback::doTest()
[16:28:50.130] <TB3> INFO: ######################################################################
[16:28:50.130] <TB3> INFO: ----------------------------------------------------------------------
[16:28:50.130] <TB3> INFO: PixTestReadback::CalibrateVd()
[16:28:50.130] <TB3> INFO: ----------------------------------------------------------------------
[16:29:00.084] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:29:00.084] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:29:00.085] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:29:00.112] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:29:00.112] <TB3> INFO: ----------------------------------------------------------------------
[16:29:00.112] <TB3> INFO: PixTestReadback::CalibrateVa()
[16:29:00.112] <TB3> INFO: ----------------------------------------------------------------------
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:29:09.000] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:29:09.001] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:29:09.001] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:29:09.001] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:29:09.001] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:29:10.028] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:29:10.028] <TB3> INFO: ----------------------------------------------------------------------
[16:29:10.028] <TB3> INFO: PixTestReadback::readbackVbg()
[16:29:10.028] <TB3> INFO: ----------------------------------------------------------------------
[16:29:17.668] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:29:17.668] <TB3> INFO: ----------------------------------------------------------------------
[16:29:17.668] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[16:29:17.668] <TB3> INFO: ----------------------------------------------------------------------
[16:29:17.668] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.9calibrated Vbg = 1.15965 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 167.7calibrated Vbg = 1.15213 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.1calibrated Vbg = 1.15976 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.2calibrated Vbg = 1.14749 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.9calibrated Vbg = 1.16051 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.4calibrated Vbg = 1.16019 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 143.2calibrated Vbg = 1.15288 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.6calibrated Vbg = 1.16523 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153calibrated Vbg = 1.15701 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.8calibrated Vbg = 1.15432 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.7calibrated Vbg = 1.14924 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153calibrated Vbg = 1.14572 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.4calibrated Vbg = 1.15946 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159.9calibrated Vbg = 1.1608 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.4calibrated Vbg = 1.15443 :::*/*/*/*/
[16:29:17.668] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.1calibrated Vbg = 1.15802 :::*/*/*/*/
[16:29:17.670] <TB3> INFO: ----------------------------------------------------------------------
[16:29:17.670] <TB3> INFO: PixTestReadback::CalibrateIa()
[16:29:17.670] <TB3> INFO: ----------------------------------------------------------------------
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C0.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C1.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C2.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C3.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C4.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C5.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C6.dat
[16:31:57.955] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C7.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C8.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C9.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C10.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C11.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C12.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C13.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C14.dat
[16:31:57.956] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//readbackCal_C15.dat
[16:31:57.983] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:31:57.985] <TB3> INFO: PixTestReadback::doTest() done
[16:31:57.985] <TB3> INFO: Decoding statistics:
[16:31:57.985] <TB3> INFO: General information:
[16:31:57.985] <TB3> INFO: 16bit words read: 1536
[16:31:57.985] <TB3> INFO: valid events total: 256
[16:31:57.985] <TB3> INFO: empty events: 256
[16:31:57.985] <TB3> INFO: valid events with pixels: 0
[16:31:57.985] <TB3> INFO: valid pixel hits: 0
[16:31:57.985] <TB3> INFO: Event errors: 0
[16:31:57.985] <TB3> INFO: start marker: 0
[16:31:57.985] <TB3> INFO: stop marker: 0
[16:31:57.985] <TB3> INFO: overflow: 0
[16:31:57.985] <TB3> INFO: invalid 5bit words: 0
[16:31:57.985] <TB3> INFO: invalid XOR eye diagram: 0
[16:31:57.985] <TB3> INFO: frame (failed synchr.): 0
[16:31:57.985] <TB3> INFO: idle data (no TBM trl): 0
[16:31:57.985] <TB3> INFO: no data (only TBM hdr): 0
[16:31:57.985] <TB3> INFO: TBM errors: 0
[16:31:57.985] <TB3> INFO: flawed TBM headers: 0
[16:31:57.985] <TB3> INFO: flawed TBM trailers: 0
[16:31:57.985] <TB3> INFO: event ID mismatches: 0
[16:31:57.985] <TB3> INFO: ROC errors: 0
[16:31:57.985] <TB3> INFO: missing ROC header(s): 0
[16:31:57.985] <TB3> INFO: misplaced readback start: 0
[16:31:57.985] <TB3> INFO: Pixel decoding errors: 0
[16:31:57.985] <TB3> INFO: pixel data incomplete: 0
[16:31:57.985] <TB3> INFO: pixel address: 0
[16:31:57.985] <TB3> INFO: pulse height fill bit: 0
[16:31:57.985] <TB3> INFO: buffer corruption: 0
[16:31:58.020] <TB3> INFO: ######################################################################
[16:31:58.020] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:31:58.020] <TB3> INFO: ######################################################################
[16:31:58.022] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:31:58.033] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:31:58.033] <TB3> INFO: run 1 of 1
[16:31:58.265] <TB3> INFO: Expecting 3120000 events.
[16:32:28.646] <TB3> INFO: 669985 events read in total (29790ms).











[16:32:58.406] <TB3> INFO: 1336300 events read in total (59550ms).
[16:33:27.589] <TB3> INFO: 2000350 events read in total (88733ms).











[16:33:57.408] <TB3> INFO: 2664900 events read in total (118552ms).











[16:34:17.918] <TB3> INFO: 3120000 events read in total (139063ms).
[16:34:17.974] <TB3> INFO: Test took 139942ms.
[16:34:42.839] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 164 seconds
[16:34:42.839] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0
[16:34:42.839] <TB3> INFO: separation cut (per ROC): 103 126 98 106 104 113 104 109 108 102 118 114 104 103 105 108
[16:34:42.839] <TB3> INFO: Decoding statistics:
[16:34:42.839] <TB3> INFO: General information:
[16:34:42.839] <TB3> INFO: 16bit words read: 0
[16:34:42.839] <TB3> INFO: valid events total: 0
[16:34:42.839] <TB3> INFO: empty events: 0
[16:34:42.839] <TB3> INFO: valid events with pixels: 0
[16:34:42.839] <TB3> INFO: valid pixel hits: 0
[16:34:42.839] <TB3> INFO: Event errors: 0
[16:34:42.839] <TB3> INFO: start marker: 0
[16:34:42.839] <TB3> INFO: stop marker: 0
[16:34:42.839] <TB3> INFO: overflow: 0
[16:34:42.839] <TB3> INFO: invalid 5bit words: 0
[16:34:42.839] <TB3> INFO: invalid XOR eye diagram: 0
[16:34:42.839] <TB3> INFO: frame (failed synchr.): 0
[16:34:42.839] <TB3> INFO: idle data (no TBM trl): 0
[16:34:42.839] <TB3> INFO: no data (only TBM hdr): 0
[16:34:42.839] <TB3> INFO: TBM errors: 0
[16:34:42.839] <TB3> INFO: flawed TBM headers: 0
[16:34:42.839] <TB3> INFO: flawed TBM trailers: 0
[16:34:42.839] <TB3> INFO: event ID mismatches: 0
[16:34:42.839] <TB3> INFO: ROC errors: 0
[16:34:42.839] <TB3> INFO: missing ROC header(s): 0
[16:34:42.839] <TB3> INFO: misplaced readback start: 0
[16:34:42.839] <TB3> INFO: Pixel decoding errors: 0
[16:34:42.839] <TB3> INFO: pixel data incomplete: 0
[16:34:42.839] <TB3> INFO: pixel address: 0
[16:34:42.839] <TB3> INFO: pulse height fill bit: 0
[16:34:42.839] <TB3> INFO: buffer corruption: 0
[16:34:42.874] <TB3> INFO: ######################################################################
[16:34:42.874] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:34:42.874] <TB3> INFO: ######################################################################
[16:34:42.874] <TB3> INFO: ----------------------------------------------------------------------
[16:34:42.874] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:34:42.874] <TB3> INFO: ----------------------------------------------------------------------
[16:34:42.874] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:34:42.884] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[16:34:42.884] <TB3> INFO: run 1 of 1
[16:34:43.116] <TB3> INFO: Expecting 36608000 events.
[16:35:06.220] <TB3> INFO: 668650 events read in total (22513ms).
[16:35:28.494] <TB3> INFO: 1328350 events read in total (44787ms).
[16:35:50.806] <TB3> INFO: 1988600 events read in total (67099ms).
[16:36:13.054] <TB3> INFO: 2646500 events read in total (89347ms).
[16:36:35.672] <TB3> INFO: 3304050 events read in total (111965ms).
[16:36:57.959] <TB3> INFO: 3959800 events read in total (134253ms).
[16:37:20.233] <TB3> INFO: 4618200 events read in total (156527ms).
[16:37:42.553] <TB3> INFO: 5275250 events read in total (178846ms).
[16:38:04.833] <TB3> INFO: 5932100 events read in total (201127ms).
[16:38:27.012] <TB3> INFO: 6588600 events read in total (223305ms).
[16:38:49.179] <TB3> INFO: 7245000 events read in total (245472ms).
[16:39:11.596] <TB3> INFO: 7901250 events read in total (267889ms).
[16:39:33.793] <TB3> INFO: 8557850 events read in total (290086ms).
[16:39:56.039] <TB3> INFO: 9214950 events read in total (312332ms).
[16:40:18.639] <TB3> INFO: 9870750 events read in total (334932ms).
[16:40:41.080] <TB3> INFO: 10527850 events read in total (357373ms).
[16:41:03.704] <TB3> INFO: 11183850 events read in total (379997ms).
[16:41:25.976] <TB3> INFO: 11838100 events read in total (402269ms).
[16:41:48.703] <TB3> INFO: 12493450 events read in total (424996ms).
[16:42:11.045] <TB3> INFO: 13147050 events read in total (447338ms).
[16:42:33.500] <TB3> INFO: 13803200 events read in total (469793ms).
[16:42:56.105] <TB3> INFO: 14456450 events read in total (492398ms).
[16:43:18.358] <TB3> INFO: 15109650 events read in total (514651ms).
[16:43:40.901] <TB3> INFO: 15764450 events read in total (537194ms).
[16:44:03.303] <TB3> INFO: 16418450 events read in total (559596ms).
[16:44:25.798] <TB3> INFO: 17073050 events read in total (582091ms).
[16:44:48.096] <TB3> INFO: 17727950 events read in total (604389ms).
[16:45:10.431] <TB3> INFO: 18380800 events read in total (626724ms).
[16:45:32.886] <TB3> INFO: 19032500 events read in total (649179ms).
[16:45:55.285] <TB3> INFO: 19683600 events read in total (671578ms).
[16:46:17.544] <TB3> INFO: 20333750 events read in total (693837ms).
[16:46:39.879] <TB3> INFO: 20983250 events read in total (716172ms).
[16:47:02.329] <TB3> INFO: 21631950 events read in total (738622ms).
[16:47:24.692] <TB3> INFO: 22280700 events read in total (760985ms).
[16:47:46.832] <TB3> INFO: 22929600 events read in total (783125ms).
[16:48:09.329] <TB3> INFO: 23579200 events read in total (805622ms).
[16:48:31.559] <TB3> INFO: 24227100 events read in total (827852ms).
[16:48:53.725] <TB3> INFO: 24875700 events read in total (850018ms).
[16:49:16.041] <TB3> INFO: 25525300 events read in total (872334ms).
[16:49:38.369] <TB3> INFO: 26174800 events read in total (894662ms).
[16:50:00.634] <TB3> INFO: 26822150 events read in total (916927ms).
[16:50:22.915] <TB3> INFO: 27470250 events read in total (939208ms).
[16:50:45.076] <TB3> INFO: 28115450 events read in total (961369ms).
[16:51:07.314] <TB3> INFO: 28762200 events read in total (983607ms).
[16:51:29.582] <TB3> INFO: 29407900 events read in total (1005875ms).
[16:51:51.939] <TB3> INFO: 30053450 events read in total (1028232ms).
[16:52:14.111] <TB3> INFO: 30699650 events read in total (1050404ms).
[16:52:36.489] <TB3> INFO: 31344550 events read in total (1072782ms).
[16:52:58.771] <TB3> INFO: 31989600 events read in total (1095064ms).
[16:53:20.790] <TB3> INFO: 32635200 events read in total (1117083ms).
[16:53:43.113] <TB3> INFO: 33280450 events read in total (1139406ms).
[16:54:05.201] <TB3> INFO: 33928350 events read in total (1161494ms).
[16:54:27.440] <TB3> INFO: 34576250 events read in total (1183733ms).
[16:54:49.486] <TB3> INFO: 35222400 events read in total (1205779ms).
[16:55:11.440] <TB3> INFO: 35867150 events read in total (1227733ms).
[16:55:33.687] <TB3> INFO: 36523200 events read in total (1249980ms).
[16:55:36.903] <TB3> INFO: 36608000 events read in total (1253196ms).
[16:55:36.960] <TB3> INFO: Test took 1254076ms.
[16:55:37.449] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:39.554] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:41.513] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:43.341] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:45.341] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:47.381] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:49.401] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:51.521] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:53.590] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:55.600] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:57.244] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:55:58.816] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:56:00.621] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:56:02.583] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:56:04.749] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:56:06.943] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[16:56:08.790] <TB3> INFO: PixTestScurves::scurves() done
[16:56:08.790] <TB3> INFO: Vcal mean: 109.87 127.33 99.34 112.16 103.49 119.17 102.92 117.76 110.47 103.16 117.35 114.77 111.68 104.49 112.69 120.97
[16:56:08.790] <TB3> INFO: Vcal RMS: 5.27 7.19 5.49 5.35 4.91 5.75 5.05 5.36 4.64 5.21 5.95 5.10 4.96 5.07 5.24 6.23
[16:56:08.790] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1285 seconds
[16:56:08.790] <TB3> INFO: Decoding statistics:
[16:56:08.790] <TB3> INFO: General information:
[16:56:08.790] <TB3> INFO: 16bit words read: 0
[16:56:08.790] <TB3> INFO: valid events total: 0
[16:56:08.790] <TB3> INFO: empty events: 0
[16:56:08.790] <TB3> INFO: valid events with pixels: 0
[16:56:08.790] <TB3> INFO: valid pixel hits: 0
[16:56:08.790] <TB3> INFO: Event errors: 0
[16:56:08.790] <TB3> INFO: start marker: 0
[16:56:08.790] <TB3> INFO: stop marker: 0
[16:56:08.790] <TB3> INFO: overflow: 0
[16:56:08.790] <TB3> INFO: invalid 5bit words: 0
[16:56:08.790] <TB3> INFO: invalid XOR eye diagram: 0
[16:56:08.790] <TB3> INFO: frame (failed synchr.): 0
[16:56:08.790] <TB3> INFO: idle data (no TBM trl): 0
[16:56:08.790] <TB3> INFO: no data (only TBM hdr): 0
[16:56:08.790] <TB3> INFO: TBM errors: 0
[16:56:08.790] <TB3> INFO: flawed TBM headers: 0
[16:56:08.790] <TB3> INFO: flawed TBM trailers: 0
[16:56:08.790] <TB3> INFO: event ID mismatches: 0
[16:56:08.790] <TB3> INFO: ROC errors: 0
[16:56:08.790] <TB3> INFO: missing ROC header(s): 0
[16:56:08.790] <TB3> INFO: misplaced readback start: 0
[16:56:08.790] <TB3> INFO: Pixel decoding errors: 0
[16:56:08.790] <TB3> INFO: pixel data incomplete: 0
[16:56:08.790] <TB3> INFO: pixel address: 0
[16:56:08.790] <TB3> INFO: pulse height fill bit: 0
[16:56:08.790] <TB3> INFO: buffer corruption: 0
[16:56:08.858] <TB3> INFO: ######################################################################
[16:56:08.858] <TB3> INFO: PixTestTrim::doTest()
[16:56:08.858] <TB3> INFO: ######################################################################
[16:56:08.859] <TB3> INFO: ----------------------------------------------------------------------
[16:56:08.859] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:56:08.859] <TB3> INFO: ----------------------------------------------------------------------
[16:56:08.899] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:56:08.899] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:56:08.909] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:56:08.909] <TB3> INFO: run 1 of 1
[16:56:09.146] <TB3> INFO: Expecting 5025280 events.
[16:56:39.374] <TB3> INFO: 819664 events read in total (29634ms).
[16:57:09.357] <TB3> INFO: 1635936 events read in total (59617ms).
[16:57:39.310] <TB3> INFO: 2449512 events read in total (89570ms).
[16:58:09.081] <TB3> INFO: 3259224 events read in total (119341ms).
[16:58:38.884] <TB3> INFO: 4064760 events read in total (149144ms).
[16:59:08.372] <TB3> INFO: 4868096 events read in total (178632ms).
[16:59:14.658] <TB3> INFO: 5025280 events read in total (184918ms).
[16:59:14.702] <TB3> INFO: Test took 185793ms.
[16:59:35.618] <TB3> INFO: ROC 0 VthrComp = 114
[16:59:35.618] <TB3> INFO: ROC 1 VthrComp = 132
[16:59:35.618] <TB3> INFO: ROC 2 VthrComp = 106
[16:59:35.618] <TB3> INFO: ROC 3 VthrComp = 119
[16:59:35.619] <TB3> INFO: ROC 4 VthrComp = 112
[16:59:35.619] <TB3> INFO: ROC 5 VthrComp = 122
[16:59:35.619] <TB3> INFO: ROC 6 VthrComp = 110
[16:59:35.619] <TB3> INFO: ROC 7 VthrComp = 126
[16:59:35.619] <TB3> INFO: ROC 8 VthrComp = 118
[16:59:35.619] <TB3> INFO: ROC 9 VthrComp = 106
[16:59:35.619] <TB3> INFO: ROC 10 VthrComp = 120
[16:59:35.619] <TB3> INFO: ROC 11 VthrComp = 122
[16:59:35.619] <TB3> INFO: ROC 12 VthrComp = 115
[16:59:35.620] <TB3> INFO: ROC 13 VthrComp = 109
[16:59:35.620] <TB3> INFO: ROC 14 VthrComp = 111
[16:59:35.620] <TB3> INFO: ROC 15 VthrComp = 123
[16:59:35.855] <TB3> INFO: Expecting 41600 events.
[16:59:39.310] <TB3> INFO: 41600 events read in total (2863ms).
[16:59:39.311] <TB3> INFO: Test took 3690ms.
[16:59:39.320] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:59:39.320] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:59:39.329] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[16:59:39.329] <TB3> INFO: run 1 of 1
[16:59:39.606] <TB3> INFO: Expecting 5025280 events.
[17:00:05.742] <TB3> INFO: 589256 events read in total (25544ms).
[17:00:31.357] <TB3> INFO: 1177832 events read in total (51159ms).
[17:00:56.799] <TB3> INFO: 1766736 events read in total (76601ms).
[17:01:22.283] <TB3> INFO: 2355320 events read in total (102085ms).
[17:01:47.388] <TB3> INFO: 2941912 events read in total (127190ms).
[17:02:12.745] <TB3> INFO: 3528024 events read in total (152547ms).
[17:02:37.981] <TB3> INFO: 4112496 events read in total (177783ms).
[17:03:03.592] <TB3> INFO: 4695768 events read in total (203394ms).
[17:03:17.934] <TB3> INFO: 5025280 events read in total (217736ms).
[17:03:17.996] <TB3> INFO: Test took 218667ms.
[17:03:45.087] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.1963 for pixel 5/62 mean/min/max = 46.02/31.792/60.2481
[17:03:45.087] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 62.0911 for pixel 12/9 mean/min/max = 46.501/30.4751/62.5268
[17:03:45.088] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.7861 for pixel 24/9 mean/min/max = 47.3192/34.8407/59.7977
[17:03:45.088] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 58.7071 for pixel 8/72 mean/min/max = 45.1383/31.1515/59.1252
[17:03:45.088] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 56.5396 for pixel 47/46 mean/min/max = 44.4758/32.3724/56.5792
[17:03:45.088] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.8616 for pixel 6/14 mean/min/max = 46.2654/31.6523/60.8786
[17:03:45.089] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.8506 for pixel 28/7 mean/min/max = 46.1734/34.4453/57.9016
[17:03:45.089] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.0985 for pixel 11/9 mean/min/max = 44.9625/31.627/58.298
[17:03:45.089] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.1962 for pixel 17/13 mean/min/max = 45.1331/31.9895/58.2767
[17:03:45.090] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.1305 for pixel 20/42 mean/min/max = 47.6009/34.0461/61.1556
[17:03:45.090] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 61.049 for pixel 4/78 mean/min/max = 46.574/32.0368/61.1111
[17:03:45.090] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.0911 for pixel 15/24 mean/min/max = 44.9027/31.5466/58.2587
[17:03:45.090] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.6738 for pixel 6/1 mean/min/max = 45.911/32.1277/59.6944
[17:03:45.091] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 59.2213 for pixel 43/9 mean/min/max = 47.0289/34.8023/59.2556
[17:03:45.091] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 62.3596 for pixel 27/33 mean/min/max = 48.2411/34.0967/62.3854
[17:03:45.091] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.7575 for pixel 12/30 mean/min/max = 45.857/30.8533/60.8608
[17:03:45.092] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:03:45.180] <TB3> INFO: Expecting 411648 events.
[17:03:54.399] <TB3> INFO: 411648 events read in total (8628ms).
[17:03:54.407] <TB3> INFO: Expecting 411648 events.
[17:04:03.502] <TB3> INFO: 411648 events read in total (8692ms).
[17:04:03.512] <TB3> INFO: Expecting 411648 events.
[17:04:12.589] <TB3> INFO: 411648 events read in total (8674ms).
[17:04:12.603] <TB3> INFO: Expecting 411648 events.
[17:04:21.747] <TB3> INFO: 411648 events read in total (8741ms).
[17:04:21.763] <TB3> INFO: Expecting 411648 events.
[17:04:30.958] <TB3> INFO: 411648 events read in total (8792ms).
[17:04:30.977] <TB3> INFO: Expecting 411648 events.
[17:04:40.005] <TB3> INFO: 411648 events read in total (8624ms).
[17:04:40.033] <TB3> INFO: Expecting 411648 events.
[17:04:49.103] <TB3> INFO: 411648 events read in total (8667ms).
[17:04:49.125] <TB3> INFO: Expecting 411648 events.
[17:04:58.153] <TB3> INFO: 411648 events read in total (8625ms).
[17:04:58.178] <TB3> INFO: Expecting 411648 events.
[17:05:07.182] <TB3> INFO: 411648 events read in total (8601ms).
[17:05:07.210] <TB3> INFO: Expecting 411648 events.
[17:05:16.289] <TB3> INFO: 411648 events read in total (8676ms).
[17:05:16.332] <TB3> INFO: Expecting 411648 events.
[17:05:25.349] <TB3> INFO: 411648 events read in total (8614ms).
[17:05:25.389] <TB3> INFO: Expecting 411648 events.
[17:05:34.457] <TB3> INFO: 411648 events read in total (8665ms).
[17:05:34.504] <TB3> INFO: Expecting 411648 events.
[17:05:43.522] <TB3> INFO: 411648 events read in total (8615ms).
[17:05:43.572] <TB3> INFO: Expecting 411648 events.
[17:05:52.674] <TB3> INFO: 411648 events read in total (8699ms).
[17:05:52.714] <TB3> INFO: Expecting 411648 events.
[17:06:01.702] <TB3> INFO: 411648 events read in total (8585ms).
[17:06:01.759] <TB3> INFO: Expecting 411648 events.
[17:06:10.798] <TB3> INFO: 411648 events read in total (8636ms).
[17:06:10.861] <TB3> INFO: Test took 145769ms.
[17:06:11.718] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:06:11.728] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:06:11.728] <TB3> INFO: run 1 of 1
[17:06:11.991] <TB3> INFO: Expecting 5025280 events.
[17:06:38.080] <TB3> INFO: 587680 events read in total (25497ms).
[17:07:03.379] <TB3> INFO: 1173208 events read in total (50796ms).
[17:07:29.078] <TB3> INFO: 1758712 events read in total (76495ms).
[17:07:54.451] <TB3> INFO: 2343016 events read in total (101868ms).
[17:08:20.049] <TB3> INFO: 2927248 events read in total (127466ms).
[17:08:45.432] <TB3> INFO: 3512096 events read in total (152849ms).
[17:09:10.464] <TB3> INFO: 4095024 events read in total (177881ms).
[17:09:35.904] <TB3> INFO: 4679592 events read in total (203321ms).
[17:09:51.264] <TB3> INFO: 5025280 events read in total (218681ms).
[17:09:51.380] <TB3> INFO: Test took 219653ms.
[17:10:16.804] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 5.500000 .. 144.310020
[17:10:17.048] <TB3> INFO: Expecting 208000 events.
[17:10:26.592] <TB3> INFO: 208000 events read in total (8952ms).
[17:10:26.592] <TB3> INFO: Test took 9787ms.
[17:10:26.638] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 5 .. 154 (-1/-1) hits flags = 528 (plus default)
[17:10:26.649] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:10:26.649] <TB3> INFO: run 1 of 1
[17:10:26.927] <TB3> INFO: Expecting 4992000 events.
[17:10:52.758] <TB3> INFO: 580016 events read in total (25240ms).
[17:11:17.989] <TB3> INFO: 1159064 events read in total (50471ms).
[17:11:43.408] <TB3> INFO: 1739136 events read in total (75890ms).
[17:12:08.933] <TB3> INFO: 2319096 events read in total (101416ms).
[17:12:34.055] <TB3> INFO: 2898552 events read in total (126537ms).
[17:12:59.304] <TB3> INFO: 3477432 events read in total (151786ms).
[17:13:24.338] <TB3> INFO: 4056048 events read in total (176820ms).
[17:13:50.112] <TB3> INFO: 4633816 events read in total (202594ms).
[17:14:05.441] <TB3> INFO: 4992000 events read in total (217923ms).
[17:14:05.553] <TB3> INFO: Test took 218905ms.
[17:14:33.409] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 28.298712 .. 43.929829
[17:14:33.680] <TB3> INFO: Expecting 208000 events.
[17:14:43.316] <TB3> INFO: 208000 events read in total (9045ms).
[17:14:43.316] <TB3> INFO: Test took 9905ms.
[17:14:43.362] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 53 (-1/-1) hits flags = 528 (plus default)
[17:14:43.372] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:14:43.372] <TB3> INFO: run 1 of 1
[17:14:43.650] <TB3> INFO: Expecting 1198080 events.
[17:15:11.565] <TB3> INFO: 662576 events read in total (27323ms).
[17:15:33.578] <TB3> INFO: 1198080 events read in total (49336ms).
[17:15:33.606] <TB3> INFO: Test took 50234ms.
[17:15:48.014] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.896427 .. 47.343645
[17:15:48.281] <TB3> INFO: Expecting 208000 events.
[17:15:57.869] <TB3> INFO: 208000 events read in total (8996ms).
[17:15:57.870] <TB3> INFO: Test took 9855ms.
[17:15:57.921] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:15:57.931] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:15:57.931] <TB3> INFO: run 1 of 1
[17:15:58.209] <TB3> INFO: Expecting 1397760 events.
[17:16:25.513] <TB3> INFO: 655848 events read in total (26712ms).
[17:16:52.324] <TB3> INFO: 1310632 events read in total (53523ms).
[17:16:56.536] <TB3> INFO: 1397760 events read in total (57735ms).
[17:16:56.561] <TB3> INFO: Test took 58631ms.
[17:17:10.723] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.365891 .. 47.692846
[17:17:10.976] <TB3> INFO: Expecting 208000 events.
[17:17:20.714] <TB3> INFO: 208000 events read in total (9146ms).
[17:17:20.715] <TB3> INFO: Test took 9991ms.
[17:17:20.762] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:17:20.772] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:17:20.772] <TB3> INFO: run 1 of 1
[17:17:21.050] <TB3> INFO: Expecting 1431040 events.
[17:17:48.666] <TB3> INFO: 659336 events read in total (27024ms).
[17:18:15.962] <TB3> INFO: 1318528 events read in total (54320ms).
[17:18:21.014] <TB3> INFO: 1431040 events read in total (59372ms).
[17:18:21.038] <TB3> INFO: Test took 60266ms.
[17:18:35.847] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:18:35.847] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:18:35.857] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:18:35.857] <TB3> INFO: run 1 of 1
[17:18:36.090] <TB3> INFO: Expecting 1364480 events.
[17:19:04.624] <TB3> INFO: 667632 events read in total (27942ms).
[17:19:31.712] <TB3> INFO: 1334232 events read in total (55031ms).
[17:19:33.411] <TB3> INFO: 1364480 events read in total (56729ms).
[17:19:33.432] <TB3> INFO: Test took 57576ms.
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C0.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C1.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C2.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C3.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C4.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C5.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C6.dat
[17:19:47.093] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C7.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C8.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C9.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C10.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C11.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C12.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C13.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C14.dat
[17:19:47.094] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C15.dat
[17:19:47.094] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C0.dat
[17:19:47.102] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C1.dat
[17:19:47.108] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C2.dat
[17:19:47.113] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C3.dat
[17:19:47.119] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C4.dat
[17:19:47.124] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C5.dat
[17:19:47.129] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C6.dat
[17:19:47.135] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C7.dat
[17:19:47.140] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C8.dat
[17:19:47.146] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C9.dat
[17:19:47.151] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C10.dat
[17:19:47.157] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C11.dat
[17:19:47.162] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C12.dat
[17:19:47.168] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C13.dat
[17:19:47.173] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C14.dat
[17:19:47.179] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//trimParameters35_C15.dat
[17:19:47.184] <TB3> INFO: PixTestTrim::trimTest() done
[17:19:47.184] <TB3> INFO: vtrim: 139 175 133 151 152 137 132 124 125 165 139 119 136 134 136 147
[17:19:47.184] <TB3> INFO: vthrcomp: 114 132 106 119 112 122 110 126 118 106 120 122 115 109 111 123
[17:19:47.184] <TB3> INFO: vcal mean: 34.89 35.01 34.98 34.94 34.96 34.95 35.01 34.95 34.98 35.04 34.94 34.97 34.95 35.03 35.14 35.14
[17:19:47.184] <TB3> INFO: vcal RMS: 1.08 1.24 0.93 1.10 0.95 1.15 0.96 1.07 1.03 1.06 1.04 1.06 1.08 0.99 1.21 1.37
[17:19:47.184] <TB3> INFO: bits mean: 9.96 10.34 8.88 10.24 10.22 9.76 9.29 9.64 10.31 9.78 9.47 10.28 9.77 9.53 9.16 10.39
[17:19:47.184] <TB3> INFO: bits RMS: 2.46 2.44 2.46 2.46 2.35 2.59 2.43 2.71 2.35 2.21 2.63 2.43 2.56 2.23 2.51 2.44
[17:19:47.191] <TB3> INFO: ----------------------------------------------------------------------
[17:19:47.191] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:19:47.191] <TB3> INFO: ----------------------------------------------------------------------
[17:19:47.194] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:19:47.204] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:19:47.204] <TB3> INFO: run 1 of 1
[17:19:47.444] <TB3> INFO: Expecting 4160000 events.
[17:20:19.136] <TB3> INFO: 739840 events read in total (31101ms).
[17:20:50.058] <TB3> INFO: 1474445 events read in total (62023ms).
[17:21:20.988] <TB3> INFO: 2204940 events read in total (92953ms).
[17:21:51.622] <TB3> INFO: 2929795 events read in total (123587ms).
[17:22:22.279] <TB3> INFO: 3650965 events read in total (154244ms).
[17:22:43.869] <TB3> INFO: 4160000 events read in total (175834ms).
[17:22:43.922] <TB3> INFO: Test took 176718ms.
[17:23:14.059] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[17:23:14.071] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:23:14.072] <TB3> INFO: run 1 of 1
[17:23:14.305] <TB3> INFO: Expecting 4243200 events.
[17:23:45.345] <TB3> INFO: 711640 events read in total (30448ms).
[17:24:15.376] <TB3> INFO: 1419405 events read in total (60479ms).
[17:24:45.930] <TB3> INFO: 2124320 events read in total (91033ms).
[17:25:15.913] <TB3> INFO: 2823890 events read in total (121016ms).
[17:25:45.969] <TB3> INFO: 3521070 events read in total (151072ms).
[17:26:16.578] <TB3> INFO: 4218010 events read in total (181681ms).
[17:26:18.038] <TB3> INFO: 4243200 events read in total (183141ms).
[17:26:18.092] <TB3> INFO: Test took 184020ms.
[17:26:49.698] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[17:26:49.709] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:26:49.709] <TB3> INFO: run 1 of 1
[17:26:49.998] <TB3> INFO: Expecting 3889600 events.
[17:27:21.895] <TB3> INFO: 734115 events read in total (31306ms).
[17:27:52.873] <TB3> INFO: 1463885 events read in total (62284ms).
[17:28:23.870] <TB3> INFO: 2189045 events read in total (93281ms).
[17:28:54.500] <TB3> INFO: 2908720 events read in total (123911ms).
[17:29:25.336] <TB3> INFO: 3625070 events read in total (154747ms).
[17:29:37.055] <TB3> INFO: 3889600 events read in total (166466ms).
[17:29:37.123] <TB3> INFO: Test took 167414ms.
[17:30:05.931] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[17:30:05.942] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:30:05.942] <TB3> INFO: run 1 of 1
[17:30:06.174] <TB3> INFO: Expecting 3889600 events.
[17:30:37.738] <TB3> INFO: 734495 events read in total (30972ms).
[17:31:08.993] <TB3> INFO: 1464605 events read in total (62227ms).
[17:31:39.895] <TB3> INFO: 2190180 events read in total (93129ms).
[17:32:10.763] <TB3> INFO: 2910100 events read in total (123997ms).
[17:32:41.451] <TB3> INFO: 3626650 events read in total (154685ms).
[17:32:52.969] <TB3> INFO: 3889600 events read in total (166203ms).
[17:32:53.031] <TB3> INFO: Test took 167090ms.
[17:33:20.853] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[17:33:20.863] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:33:20.863] <TB3> INFO: run 1 of 1
[17:33:21.102] <TB3> INFO: Expecting 3889600 events.
[17:33:52.975] <TB3> INFO: 734210 events read in total (31282ms).
[17:34:23.913] <TB3> INFO: 1464595 events read in total (62220ms).
[17:34:55.039] <TB3> INFO: 2190440 events read in total (93346ms).
[17:35:26.018] <TB3> INFO: 2910500 events read in total (124325ms).
[17:35:56.804] <TB3> INFO: 3627305 events read in total (155111ms).
[17:36:08.209] <TB3> INFO: 3889600 events read in total (166516ms).
[17:36:08.259] <TB3> INFO: Test took 167395ms.
[17:36:36.165] <TB3> INFO: PixTestTrim::trimBitTest() done
[17:36:36.166] <TB3> INFO: PixTestTrim::doTest() done, duration: 2427 seconds
[17:36:36.166] <TB3> INFO: Decoding statistics:
[17:36:36.166] <TB3> INFO: General information:
[17:36:36.166] <TB3> INFO: 16bit words read: 0
[17:36:36.166] <TB3> INFO: valid events total: 0
[17:36:36.166] <TB3> INFO: empty events: 0
[17:36:36.166] <TB3> INFO: valid events with pixels: 0
[17:36:36.166] <TB3> INFO: valid pixel hits: 0
[17:36:36.166] <TB3> INFO: Event errors: 0
[17:36:36.166] <TB3> INFO: start marker: 0
[17:36:36.166] <TB3> INFO: stop marker: 0
[17:36:36.166] <TB3> INFO: overflow: 0
[17:36:36.166] <TB3> INFO: invalid 5bit words: 0
[17:36:36.166] <TB3> INFO: invalid XOR eye diagram: 0
[17:36:36.166] <TB3> INFO: frame (failed synchr.): 0
[17:36:36.166] <TB3> INFO: idle data (no TBM trl): 0
[17:36:36.166] <TB3> INFO: no data (only TBM hdr): 0
[17:36:36.167] <TB3> INFO: TBM errors: 0
[17:36:36.167] <TB3> INFO: flawed TBM headers: 0
[17:36:36.167] <TB3> INFO: flawed TBM trailers: 0
[17:36:36.167] <TB3> INFO: event ID mismatches: 0
[17:36:36.167] <TB3> INFO: ROC errors: 0
[17:36:36.167] <TB3> INFO: missing ROC header(s): 0
[17:36:36.167] <TB3> INFO: misplaced readback start: 0
[17:36:36.167] <TB3> INFO: Pixel decoding errors: 0
[17:36:36.167] <TB3> INFO: pixel data incomplete: 0
[17:36:36.167] <TB3> INFO: pixel address: 0
[17:36:36.167] <TB3> INFO: pulse height fill bit: 0
[17:36:36.167] <TB3> INFO: buffer corruption: 0
[17:36:36.961] <TB3> INFO: ######################################################################
[17:36:36.961] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:36:36.961] <TB3> INFO: ######################################################################
[17:36:37.238] <TB3> INFO: Expecting 41600 events.
[17:36:40.692] <TB3> INFO: 41600 events read in total (2862ms).
[17:36:40.693] <TB3> INFO: Test took 3731ms.
[17:36:41.129] <TB3> INFO: Expecting 41600 events.
[17:36:44.624] <TB3> INFO: 41600 events read in total (2904ms).
[17:36:44.624] <TB3> INFO: Test took 3729ms.
[17:36:44.913] <TB3> INFO: Expecting 41600 events.
[17:36:48.459] <TB3> INFO: 41600 events read in total (2955ms).
[17:36:48.459] <TB3> INFO: Test took 3811ms.
[17:36:48.747] <TB3> INFO: Expecting 41600 events.
[17:36:52.361] <TB3> INFO: 41600 events read in total (3022ms).
[17:36:52.362] <TB3> INFO: Test took 3879ms.
[17:36:52.664] <TB3> INFO: Expecting 41600 events.
[17:36:56.128] <TB3> INFO: 41600 events read in total (2872ms).
[17:36:56.129] <TB3> INFO: Test took 3744ms.
[17:36:56.420] <TB3> INFO: Expecting 41600 events.
[17:36:59.894] <TB3> INFO: 41600 events read in total (2883ms).
[17:36:59.895] <TB3> INFO: Test took 3740ms.
[17:37:00.184] <TB3> INFO: Expecting 41600 events.
[17:37:03.666] <TB3> INFO: 41600 events read in total (2891ms).
[17:37:03.667] <TB3> INFO: Test took 3748ms.
[17:37:03.958] <TB3> INFO: Expecting 41600 events.
[17:37:07.573] <TB3> INFO: 41600 events read in total (3024ms).
[17:37:07.573] <TB3> INFO: Test took 3880ms.
[17:37:07.864] <TB3> INFO: Expecting 41600 events.
[17:37:11.344] <TB3> INFO: 41600 events read in total (2889ms).
[17:37:11.344] <TB3> INFO: Test took 3745ms.
[17:37:11.634] <TB3> INFO: Expecting 41600 events.
[17:37:15.064] <TB3> INFO: 41600 events read in total (2838ms).
[17:37:15.065] <TB3> INFO: Test took 3695ms.
[17:37:15.353] <TB3> INFO: Expecting 41600 events.
[17:37:18.869] <TB3> INFO: 41600 events read in total (2925ms).
[17:37:18.869] <TB3> INFO: Test took 3781ms.
[17:37:19.157] <TB3> INFO: Expecting 41600 events.
[17:37:22.611] <TB3> INFO: 41600 events read in total (2863ms).
[17:37:22.612] <TB3> INFO: Test took 3719ms.
[17:37:22.900] <TB3> INFO: Expecting 41600 events.
[17:37:26.408] <TB3> INFO: 41600 events read in total (2916ms).
[17:37:26.408] <TB3> INFO: Test took 3773ms.
[17:37:26.697] <TB3> INFO: Expecting 41600 events.
[17:37:30.218] <TB3> INFO: 41600 events read in total (2930ms).
[17:37:30.218] <TB3> INFO: Test took 3786ms.
[17:37:30.519] <TB3> INFO: Expecting 41600 events.
[17:37:33.000] <TB3> INFO: 41600 events read in total (2890ms).
[17:37:33.000] <TB3> INFO: Test took 3756ms.
[17:37:34.288] <TB3> INFO: Expecting 41600 events.
[17:37:37.842] <TB3> INFO: 41600 events read in total (2962ms).
[17:37:37.842] <TB3> INFO: Test took 3819ms.
[17:37:38.131] <TB3> INFO: Expecting 41600 events.
[17:37:41.647] <TB3> INFO: 41600 events read in total (2925ms).
[17:37:41.647] <TB3> INFO: Test took 3781ms.
[17:37:41.935] <TB3> INFO: Expecting 41600 events.
[17:37:45.396] <TB3> INFO: 41600 events read in total (2869ms).
[17:37:45.397] <TB3> INFO: Test took 3726ms.
[17:37:45.689] <TB3> INFO: Expecting 41600 events.
[17:37:49.215] <TB3> INFO: 41600 events read in total (2934ms).
[17:37:49.216] <TB3> INFO: Test took 3791ms.
[17:37:49.504] <TB3> INFO: Expecting 41600 events.
[17:37:53.003] <TB3> INFO: 41600 events read in total (2908ms).
[17:37:53.004] <TB3> INFO: Test took 3765ms.
[17:37:53.292] <TB3> INFO: Expecting 41600 events.
[17:37:56.767] <TB3> INFO: 41600 events read in total (2883ms).
[17:37:56.767] <TB3> INFO: Test took 3739ms.
[17:37:57.067] <TB3> INFO: Expecting 41600 events.
[17:38:00.553] <TB3> INFO: 41600 events read in total (2894ms).
[17:38:00.554] <TB3> INFO: Test took 3761ms.
[17:38:00.856] <TB3> INFO: Expecting 41600 events.
[17:38:04.331] <TB3> INFO: 41600 events read in total (2883ms).
[17:38:04.331] <TB3> INFO: Test took 3751ms.
[17:38:04.619] <TB3> INFO: Expecting 41600 events.
[17:38:08.132] <TB3> INFO: 41600 events read in total (2921ms).
[17:38:08.133] <TB3> INFO: Test took 3778ms.
[17:38:08.421] <TB3> INFO: Expecting 41600 events.
[17:38:11.957] <TB3> INFO: 41600 events read in total (2944ms).
[17:38:11.958] <TB3> INFO: Test took 3802ms.
[17:38:12.246] <TB3> INFO: Expecting 41600 events.
[17:38:15.680] <TB3> INFO: 41600 events read in total (2842ms).
[17:38:15.680] <TB3> INFO: Test took 3699ms.
[17:38:15.968] <TB3> INFO: Expecting 41600 events.
[17:38:19.472] <TB3> INFO: 41600 events read in total (2912ms).
[17:38:19.473] <TB3> INFO: Test took 3769ms.
[17:38:19.761] <TB3> INFO: Expecting 41600 events.
[17:38:23.250] <TB3> INFO: 41600 events read in total (2898ms).
[17:38:23.250] <TB3> INFO: Test took 3754ms.
[17:38:23.538] <TB3> INFO: Expecting 41600 events.
[17:38:27.141] <TB3> INFO: 41600 events read in total (3011ms).
[17:38:27.142] <TB3> INFO: Test took 3869ms.
[17:38:27.430] <TB3> INFO: Expecting 41600 events.
[17:38:30.001] <TB3> INFO: 41600 events read in total (2980ms).
[17:38:30.002] <TB3> INFO: Test took 3837ms.
[17:38:31.292] <TB3> INFO: Expecting 41600 events.
[17:38:34.727] <TB3> INFO: 41600 events read in total (2844ms).
[17:38:34.727] <TB3> INFO: Test took 3700ms.
[17:38:35.016] <TB3> INFO: Expecting 2560 events.
[17:38:35.899] <TB3> INFO: 2560 events read in total (292ms).
[17:38:35.899] <TB3> INFO: Test took 1160ms.
[17:38:36.207] <TB3> INFO: Expecting 2560 events.
[17:38:37.091] <TB3> INFO: 2560 events read in total (292ms).
[17:38:37.091] <TB3> INFO: Test took 1191ms.
[17:38:37.399] <TB3> INFO: Expecting 2560 events.
[17:38:38.282] <TB3> INFO: 2560 events read in total (292ms).
[17:38:38.283] <TB3> INFO: Test took 1192ms.
[17:38:38.590] <TB3> INFO: Expecting 2560 events.
[17:38:39.473] <TB3> INFO: 2560 events read in total (291ms).
[17:38:39.474] <TB3> INFO: Test took 1191ms.
[17:38:39.781] <TB3> INFO: Expecting 2560 events.
[17:38:40.660] <TB3> INFO: 2560 events read in total (287ms).
[17:38:40.660] <TB3> INFO: Test took 1186ms.
[17:38:40.968] <TB3> INFO: Expecting 2560 events.
[17:38:41.846] <TB3> INFO: 2560 events read in total (287ms).
[17:38:41.846] <TB3> INFO: Test took 1186ms.
[17:38:42.154] <TB3> INFO: Expecting 2560 events.
[17:38:43.032] <TB3> INFO: 2560 events read in total (286ms).
[17:38:43.032] <TB3> INFO: Test took 1185ms.
[17:38:43.340] <TB3> INFO: Expecting 2560 events.
[17:38:44.223] <TB3> INFO: 2560 events read in total (291ms).
[17:38:44.223] <TB3> INFO: Test took 1190ms.
[17:38:44.531] <TB3> INFO: Expecting 2560 events.
[17:38:45.408] <TB3> INFO: 2560 events read in total (286ms).
[17:38:45.408] <TB3> INFO: Test took 1184ms.
[17:38:45.716] <TB3> INFO: Expecting 2560 events.
[17:38:46.595] <TB3> INFO: 2560 events read in total (287ms).
[17:38:46.595] <TB3> INFO: Test took 1186ms.
[17:38:46.903] <TB3> INFO: Expecting 2560 events.
[17:38:47.783] <TB3> INFO: 2560 events read in total (289ms).
[17:38:47.783] <TB3> INFO: Test took 1187ms.
[17:38:48.091] <TB3> INFO: Expecting 2560 events.
[17:38:48.970] <TB3> INFO: 2560 events read in total (287ms).
[17:38:48.971] <TB3> INFO: Test took 1187ms.
[17:38:49.278] <TB3> INFO: Expecting 2560 events.
[17:38:50.165] <TB3> INFO: 2560 events read in total (295ms).
[17:38:50.165] <TB3> INFO: Test took 1194ms.
[17:38:50.472] <TB3> INFO: Expecting 2560 events.
[17:38:51.355] <TB3> INFO: 2560 events read in total (291ms).
[17:38:51.356] <TB3> INFO: Test took 1191ms.
[17:38:51.663] <TB3> INFO: Expecting 2560 events.
[17:38:52.547] <TB3> INFO: 2560 events read in total (292ms).
[17:38:52.547] <TB3> INFO: Test took 1191ms.
[17:38:52.855] <TB3> INFO: Expecting 2560 events.
[17:38:53.738] <TB3> INFO: 2560 events read in total (291ms).
[17:38:53.738] <TB3> INFO: Test took 1190ms.
[17:38:53.741] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:38:54.047] <TB3> INFO: Expecting 655360 events.
[17:39:08.299] <TB3> INFO: 655360 events read in total (13661ms).
[17:39:08.310] <TB3> INFO: Expecting 655360 events.
[17:39:22.478] <TB3> INFO: 655360 events read in total (13766ms).
[17:39:22.493] <TB3> INFO: Expecting 655360 events.
[17:39:36.542] <TB3> INFO: 655360 events read in total (13645ms).
[17:39:36.567] <TB3> INFO: Expecting 655360 events.
[17:39:50.607] <TB3> INFO: 655360 events read in total (13637ms).
[17:39:50.639] <TB3> INFO: Expecting 655360 events.
[17:40:04.705] <TB3> INFO: 655360 events read in total (13663ms).
[17:40:04.732] <TB3> INFO: Expecting 655360 events.
[17:40:18.910] <TB3> INFO: 655360 events read in total (13775ms).
[17:40:18.939] <TB3> INFO: Expecting 655360 events.
[17:40:32.956] <TB3> INFO: 655360 events read in total (13614ms).
[17:40:32.991] <TB3> INFO: Expecting 655360 events.
[17:40:47.092] <TB3> INFO: 655360 events read in total (13698ms).
[17:40:47.131] <TB3> INFO: Expecting 655360 events.
[17:41:01.197] <TB3> INFO: 655360 events read in total (13663ms).
[17:41:01.242] <TB3> INFO: Expecting 655360 events.
[17:41:15.309] <TB3> INFO: 655360 events read in total (13665ms).
[17:41:15.362] <TB3> INFO: Expecting 655360 events.
[17:41:29.455] <TB3> INFO: 655360 events read in total (13690ms).
[17:41:29.508] <TB3> INFO: Expecting 655360 events.
[17:41:43.517] <TB3> INFO: 655360 events read in total (13606ms).
[17:41:43.574] <TB3> INFO: Expecting 655360 events.
[17:41:57.653] <TB3> INFO: 655360 events read in total (13676ms).
[17:41:57.714] <TB3> INFO: Expecting 655360 events.
[17:42:11.937] <TB3> INFO: 655360 events read in total (13821ms).
[17:42:12.004] <TB3> INFO: Expecting 655360 events.
[17:42:26.178] <TB3> INFO: 655360 events read in total (13771ms).
[17:42:26.274] <TB3> INFO: Expecting 655360 events.
[17:42:40.432] <TB3> INFO: 655360 events read in total (13755ms).
[17:42:40.533] <TB3> INFO: Test took 226792ms.
[17:42:40.628] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:42:40.893] <TB3> INFO: Expecting 655360 events.
[17:42:55.136] <TB3> INFO: 655360 events read in total (13651ms).
[17:42:55.147] <TB3> INFO: Expecting 655360 events.
[17:43:09.096] <TB3> INFO: 655360 events read in total (13546ms).
[17:43:09.110] <TB3> INFO: Expecting 655360 events.
[17:43:23.089] <TB3> INFO: 655360 events read in total (13576ms).
[17:43:23.114] <TB3> INFO: Expecting 655360 events.
[17:43:37.185] <TB3> INFO: 655360 events read in total (13668ms).
[17:43:37.208] <TB3> INFO: Expecting 655360 events.
[17:43:51.237] <TB3> INFO: 655360 events read in total (13626ms).
[17:43:51.263] <TB3> INFO: Expecting 655360 events.
[17:44:05.227] <TB3> INFO: 655360 events read in total (13561ms).
[17:44:05.268] <TB3> INFO: Expecting 655360 events.
[17:44:19.308] <TB3> INFO: 655360 events read in total (13637ms).
[17:44:19.355] <TB3> INFO: Expecting 655360 events.
[17:44:33.165] <TB3> INFO: 655360 events read in total (13407ms).
[17:44:33.217] <TB3> INFO: Expecting 655360 events.
[17:44:47.210] <TB3> INFO: 655360 events read in total (13590ms).
[17:44:47.254] <TB3> INFO: Expecting 655360 events.
[17:45:01.117] <TB3> INFO: 655360 events read in total (13460ms).
[17:45:01.165] <TB3> INFO: Expecting 655360 events.
[17:45:15.121] <TB3> INFO: 655360 events read in total (13553ms).
[17:45:15.173] <TB3> INFO: Expecting 655360 events.
[17:45:29.302] <TB3> INFO: 655360 events read in total (13726ms).
[17:45:29.379] <TB3> INFO: Expecting 655360 events.
[17:45:43.567] <TB3> INFO: 655360 events read in total (13785ms).
[17:45:43.628] <TB3> INFO: Expecting 655360 events.
[17:45:57.821] <TB3> INFO: 655360 events read in total (13790ms).
[17:45:57.913] <TB3> INFO: Expecting 655360 events.
[17:46:11.697] <TB3> INFO: 655360 events read in total (13381ms).
[17:46:11.790] <TB3> INFO: Expecting 655360 events.
[17:46:25.618] <TB3> INFO: 655360 events read in total (13425ms).
[17:46:25.690] <TB3> INFO: Test took 225062ms.
[17:46:25.844] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.848] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.853] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:25.858] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.862] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.867] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:25.872] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.876] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.881] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.886] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.892] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.898] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.904] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:25.910] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.917] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.923] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.929] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:25.935] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:46:25.941] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:46:25.948] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[17:46:25.954] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[17:46:25.960] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[17:46:25.966] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[17:46:25.972] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[17:46:25.979] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[17:46:25.985] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.991] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:25.997] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:46:26.004] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C0.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C1.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C2.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C3.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C4.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C5.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C6.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C7.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C8.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C9.dat
[17:46:26.039] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C10.dat
[17:46:26.040] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C11.dat
[17:46:26.040] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C12.dat
[17:46:26.040] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C13.dat
[17:46:26.040] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C14.dat
[17:46:26.040] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//dacParameters35_C15.dat
[17:46:26.274] <TB3> INFO: Expecting 41600 events.
[17:46:29.356] <TB3> INFO: 41600 events read in total (2490ms).
[17:46:29.356] <TB3> INFO: Test took 3314ms.
[17:46:29.842] <TB3> INFO: Expecting 41600 events.
[17:46:32.856] <TB3> INFO: 41600 events read in total (2423ms).
[17:46:32.857] <TB3> INFO: Test took 3290ms.
[17:46:33.300] <TB3> INFO: Expecting 41600 events.
[17:46:36.390] <TB3> INFO: 41600 events read in total (2498ms).
[17:46:36.390] <TB3> INFO: Test took 3322ms.
[17:46:36.605] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:36.693] <TB3> INFO: Expecting 2560 events.
[17:46:37.580] <TB3> INFO: 2560 events read in total (295ms).
[17:46:37.581] <TB3> INFO: Test took 976ms.
[17:46:37.584] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:37.889] <TB3> INFO: Expecting 2560 events.
[17:46:38.773] <TB3> INFO: 2560 events read in total (292ms).
[17:46:38.773] <TB3> INFO: Test took 1190ms.
[17:46:38.775] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:39.082] <TB3> INFO: Expecting 2560 events.
[17:46:39.966] <TB3> INFO: 2560 events read in total (293ms).
[17:46:39.966] <TB3> INFO: Test took 1191ms.
[17:46:39.968] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:40.274] <TB3> INFO: Expecting 2560 events.
[17:46:41.162] <TB3> INFO: 2560 events read in total (296ms).
[17:46:41.162] <TB3> INFO: Test took 1194ms.
[17:46:41.164] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:41.470] <TB3> INFO: Expecting 2560 events.
[17:46:42.354] <TB3> INFO: 2560 events read in total (292ms).
[17:46:42.355] <TB3> INFO: Test took 1191ms.
[17:46:42.356] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:42.663] <TB3> INFO: Expecting 2560 events.
[17:46:43.547] <TB3> INFO: 2560 events read in total (293ms).
[17:46:43.547] <TB3> INFO: Test took 1191ms.
[17:46:43.549] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:43.856] <TB3> INFO: Expecting 2560 events.
[17:46:44.740] <TB3> INFO: 2560 events read in total (293ms).
[17:46:44.740] <TB3> INFO: Test took 1191ms.
[17:46:44.742] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:45.048] <TB3> INFO: Expecting 2560 events.
[17:46:45.933] <TB3> INFO: 2560 events read in total (293ms).
[17:46:45.933] <TB3> INFO: Test took 1191ms.
[17:46:45.935] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:46.241] <TB3> INFO: Expecting 2560 events.
[17:46:47.120] <TB3> INFO: 2560 events read in total (288ms).
[17:46:47.121] <TB3> INFO: Test took 1187ms.
[17:46:47.123] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:47.429] <TB3> INFO: Expecting 2560 events.
[17:46:48.312] <TB3> INFO: 2560 events read in total (291ms).
[17:46:48.312] <TB3> INFO: Test took 1189ms.
[17:46:48.313] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:48.620] <TB3> INFO: Expecting 2560 events.
[17:46:49.502] <TB3> INFO: 2560 events read in total (290ms).
[17:46:49.502] <TB3> INFO: Test took 1189ms.
[17:46:49.504] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:49.810] <TB3> INFO: Expecting 2560 events.
[17:46:50.693] <TB3> INFO: 2560 events read in total (291ms).
[17:46:50.693] <TB3> INFO: Test took 1189ms.
[17:46:50.695] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:50.002] <TB3> INFO: Expecting 2560 events.
[17:46:51.881] <TB3> INFO: 2560 events read in total (288ms).
[17:46:51.881] <TB3> INFO: Test took 1186ms.
[17:46:51.883] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:52.190] <TB3> INFO: Expecting 2560 events.
[17:46:53.075] <TB3> INFO: 2560 events read in total (293ms).
[17:46:53.075] <TB3> INFO: Test took 1192ms.
[17:46:53.077] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:53.383] <TB3> INFO: Expecting 2560 events.
[17:46:54.263] <TB3> INFO: 2560 events read in total (288ms).
[17:46:54.263] <TB3> INFO: Test took 1186ms.
[17:46:54.265] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:54.571] <TB3> INFO: Expecting 2560 events.
[17:46:55.451] <TB3> INFO: 2560 events read in total (288ms).
[17:46:55.451] <TB3> INFO: Test took 1186ms.
[17:46:55.453] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:55.760] <TB3> INFO: Expecting 2560 events.
[17:46:56.642] <TB3> INFO: 2560 events read in total (291ms).
[17:46:56.642] <TB3> INFO: Test took 1189ms.
[17:46:56.644] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:56.950] <TB3> INFO: Expecting 2560 events.
[17:46:57.830] <TB3> INFO: 2560 events read in total (288ms).
[17:46:57.830] <TB3> INFO: Test took 1186ms.
[17:46:57.832] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:58.138] <TB3> INFO: Expecting 2560 events.
[17:46:59.020] <TB3> INFO: 2560 events read in total (290ms).
[17:46:59.020] <TB3> INFO: Test took 1189ms.
[17:46:59.022] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:46:59.329] <TB3> INFO: Expecting 2560 events.
[17:47:00.209] <TB3> INFO: 2560 events read in total (289ms).
[17:47:00.209] <TB3> INFO: Test took 1187ms.
[17:47:00.211] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:00.517] <TB3> INFO: Expecting 2560 events.
[17:47:01.396] <TB3> INFO: 2560 events read in total (287ms).
[17:47:01.397] <TB3> INFO: Test took 1186ms.
[17:47:01.398] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:01.705] <TB3> INFO: Expecting 2560 events.
[17:47:02.584] <TB3> INFO: 2560 events read in total (287ms).
[17:47:02.584] <TB3> INFO: Test took 1186ms.
[17:47:02.586] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:02.893] <TB3> INFO: Expecting 2560 events.
[17:47:03.772] <TB3> INFO: 2560 events read in total (288ms).
[17:47:03.773] <TB3> INFO: Test took 1187ms.
[17:47:03.774] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:04.081] <TB3> INFO: Expecting 2560 events.
[17:47:04.960] <TB3> INFO: 2560 events read in total (287ms).
[17:47:04.960] <TB3> INFO: Test took 1186ms.
[17:47:04.962] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:05.269] <TB3> INFO: Expecting 2560 events.
[17:47:06.152] <TB3> INFO: 2560 events read in total (292ms).
[17:47:06.152] <TB3> INFO: Test took 1190ms.
[17:47:06.153] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:06.460] <TB3> INFO: Expecting 2560 events.
[17:47:07.344] <TB3> INFO: 2560 events read in total (292ms).
[17:47:07.344] <TB3> INFO: Test took 1191ms.
[17:47:07.346] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:07.653] <TB3> INFO: Expecting 2560 events.
[17:47:08.537] <TB3> INFO: 2560 events read in total (293ms).
[17:47:08.537] <TB3> INFO: Test took 1191ms.
[17:47:08.539] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:08.846] <TB3> INFO: Expecting 2560 events.
[17:47:09.729] <TB3> INFO: 2560 events read in total (292ms).
[17:47:09.729] <TB3> INFO: Test took 1190ms.
[17:47:09.731] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:10.038] <TB3> INFO: Expecting 2560 events.
[17:47:10.922] <TB3> INFO: 2560 events read in total (293ms).
[17:47:10.922] <TB3> INFO: Test took 1191ms.
[17:47:10.924] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:11.230] <TB3> INFO: Expecting 2560 events.
[17:47:12.114] <TB3> INFO: 2560 events read in total (292ms).
[17:47:12.114] <TB3> INFO: Test took 1190ms.
[17:47:12.117] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:12.422] <TB3> INFO: Expecting 2560 events.
[17:47:13.305] <TB3> INFO: 2560 events read in total (291ms).
[17:47:13.305] <TB3> INFO: Test took 1189ms.
[17:47:13.307] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:47:13.614] <TB3> INFO: Expecting 2560 events.
[17:47:14.500] <TB3> INFO: 2560 events read in total (294ms).
[17:47:14.500] <TB3> INFO: Test took 1193ms.
[17:47:14.963] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 638 seconds
[17:47:14.963] <TB3> INFO: PH scale (per ROC): 54 42 32 63 61 56 61 55 57 59 52 61 48 58 49 38
[17:47:14.963] <TB3> INFO: PH offset (per ROC): 109 115 94 126 124 131 131 113 123 131 130 128 112 124 108 107
[17:47:14.969] <TB3> INFO: Decoding statistics:
[17:47:14.969] <TB3> INFO: General information:
[17:47:14.969] <TB3> INFO: 16bit words read: 127882
[17:47:14.969] <TB3> INFO: valid events total: 20480
[17:47:14.969] <TB3> INFO: empty events: 17979
[17:47:14.969] <TB3> INFO: valid events with pixels: 2501
[17:47:14.969] <TB3> INFO: valid pixel hits: 2501
[17:47:14.969] <TB3> INFO: Event errors: 0
[17:47:14.969] <TB3> INFO: start marker: 0
[17:47:14.969] <TB3> INFO: stop marker: 0
[17:47:14.969] <TB3> INFO: overflow: 0
[17:47:14.969] <TB3> INFO: invalid 5bit words: 0
[17:47:14.969] <TB3> INFO: invalid XOR eye diagram: 0
[17:47:14.969] <TB3> INFO: frame (failed synchr.): 0
[17:47:14.969] <TB3> INFO: idle data (no TBM trl): 0
[17:47:14.969] <TB3> INFO: no data (only TBM hdr): 0
[17:47:14.969] <TB3> INFO: TBM errors: 0
[17:47:14.969] <TB3> INFO: flawed TBM headers: 0
[17:47:14.969] <TB3> INFO: flawed TBM trailers: 0
[17:47:14.969] <TB3> INFO: event ID mismatches: 0
[17:47:14.969] <TB3> INFO: ROC errors: 0
[17:47:14.969] <TB3> INFO: missing ROC header(s): 0
[17:47:14.969] <TB3> INFO: misplaced readback start: 0
[17:47:14.969] <TB3> INFO: Pixel decoding errors: 0
[17:47:14.969] <TB3> INFO: pixel data incomplete: 0
[17:47:14.969] <TB3> INFO: pixel address: 0
[17:47:14.969] <TB3> INFO: pulse height fill bit: 0
[17:47:14.969] <TB3> INFO: buffer corruption: 0
[17:47:15.265] <TB3> INFO: ######################################################################
[17:47:15.265] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:47:15.265] <TB3> INFO: ######################################################################
[17:47:15.277] <TB3> INFO: scanning low vcal = 10
[17:47:15.509] <TB3> INFO: Expecting 41600 events.
[17:47:19.057] <TB3> INFO: 41600 events read in total (2957ms).
[17:47:19.058] <TB3> INFO: Test took 3781ms.
[17:47:19.059] <TB3> INFO: scanning low vcal = 20
[17:47:19.358] <TB3> INFO: Expecting 41600 events.
[17:47:22.949] <TB3> INFO: 41600 events read in total (2999ms).
[17:47:22.949] <TB3> INFO: Test took 3890ms.
[17:47:22.951] <TB3> INFO: scanning low vcal = 30
[17:47:23.248] <TB3> INFO: Expecting 41600 events.
[17:47:26.884] <TB3> INFO: 41600 events read in total (3044ms).
[17:47:26.884] <TB3> INFO: Test took 3934ms.
[17:47:26.887] <TB3> INFO: scanning low vcal = 40
[17:47:27.164] <TB3> INFO: Expecting 41600 events.
[17:47:31.109] <TB3> INFO: 41600 events read in total (3354ms).
[17:47:31.110] <TB3> INFO: Test took 4223ms.
[17:47:31.113] <TB3> INFO: scanning low vcal = 50
[17:47:31.389] <TB3> INFO: Expecting 41600 events.
[17:47:35.336] <TB3> INFO: 41600 events read in total (3355ms).
[17:47:35.337] <TB3> INFO: Test took 4224ms.
[17:47:35.340] <TB3> INFO: scanning low vcal = 60
[17:47:35.616] <TB3> INFO: Expecting 41600 events.
[17:47:39.559] <TB3> INFO: 41600 events read in total (3351ms).
[17:47:39.560] <TB3> INFO: Test took 4220ms.
[17:47:39.563] <TB3> INFO: scanning low vcal = 70
[17:47:39.839] <TB3> INFO: Expecting 41600 events.
[17:47:43.774] <TB3> INFO: 41600 events read in total (3343ms).
[17:47:43.774] <TB3> INFO: Test took 4211ms.
[17:47:43.777] <TB3> INFO: scanning low vcal = 80
[17:47:44.054] <TB3> INFO: Expecting 41600 events.
[17:47:47.995] <TB3> INFO: 41600 events read in total (3350ms).
[17:47:47.995] <TB3> INFO: Test took 4218ms.
[17:47:47.998] <TB3> INFO: scanning low vcal = 90
[17:47:48.275] <TB3> INFO: Expecting 41600 events.
[17:47:52.212] <TB3> INFO: 41600 events read in total (3346ms).
[17:47:52.213] <TB3> INFO: Test took 4215ms.
[17:47:52.216] <TB3> INFO: scanning low vcal = 100
[17:47:52.498] <TB3> INFO: Expecting 41600 events.
[17:47:56.482] <TB3> INFO: 41600 events read in total (3392ms).
[17:47:56.483] <TB3> INFO: Test took 4267ms.
[17:47:56.486] <TB3> INFO: scanning low vcal = 110
[17:47:56.763] <TB3> INFO: Expecting 41600 events.
[17:48:00.786] <TB3> INFO: 41600 events read in total (3432ms).
[17:48:00.787] <TB3> INFO: Test took 4301ms.
[17:48:00.789] <TB3> INFO: scanning low vcal = 120
[17:48:01.082] <TB3> INFO: Expecting 41600 events.
[17:48:05.089] <TB3> INFO: 41600 events read in total (3415ms).
[17:48:05.089] <TB3> INFO: Test took 4300ms.
[17:48:05.092] <TB3> INFO: scanning low vcal = 130
[17:48:05.369] <TB3> INFO: Expecting 41600 events.
[17:48:09.385] <TB3> INFO: 41600 events read in total (3425ms).
[17:48:09.386] <TB3> INFO: Test took 4294ms.
[17:48:09.389] <TB3> INFO: scanning low vcal = 140
[17:48:09.683] <TB3> INFO: Expecting 41600 events.
[17:48:13.633] <TB3> INFO: 41600 events read in total (3359ms).
[17:48:13.634] <TB3> INFO: Test took 4245ms.
[17:48:13.637] <TB3> INFO: scanning low vcal = 150
[17:48:13.913] <TB3> INFO: Expecting 41600 events.
[17:48:17.963] <TB3> INFO: 41600 events read in total (3458ms).
[17:48:17.964] <TB3> INFO: Test took 4327ms.
[17:48:17.967] <TB3> INFO: scanning low vcal = 160
[17:48:18.243] <TB3> INFO: Expecting 41600 events.
[17:48:22.247] <TB3> INFO: 41600 events read in total (3412ms).
[17:48:22.248] <TB3> INFO: Test took 4281ms.
[17:48:22.250] <TB3> INFO: scanning low vcal = 170
[17:48:22.527] <TB3> INFO: Expecting 41600 events.
[17:48:26.500] <TB3> INFO: 41600 events read in total (3381ms).
[17:48:26.501] <TB3> INFO: Test took 4251ms.
[17:48:26.503] <TB3> INFO: scanning low vcal = 180
[17:48:26.780] <TB3> INFO: Expecting 41600 events.
[17:48:30.760] <TB3> INFO: 41600 events read in total (3389ms).
[17:48:30.761] <TB3> INFO: Test took 4258ms.
[17:48:30.764] <TB3> INFO: scanning low vcal = 190
[17:48:31.040] <TB3> INFO: Expecting 41600 events.
[17:48:35.067] <TB3> INFO: 41600 events read in total (3435ms).
[17:48:35.067] <TB3> INFO: Test took 4303ms.
[17:48:35.070] <TB3> INFO: scanning low vcal = 200
[17:48:35.364] <TB3> INFO: Expecting 41600 events.
[17:48:39.386] <TB3> INFO: 41600 events read in total (3431ms).
[17:48:39.386] <TB3> INFO: Test took 4316ms.
[17:48:39.389] <TB3> INFO: scanning low vcal = 210
[17:48:39.682] <TB3> INFO: Expecting 41600 events.
[17:48:43.734] <TB3> INFO: 41600 events read in total (3460ms).
[17:48:43.735] <TB3> INFO: Test took 4346ms.
[17:48:43.737] <TB3> INFO: scanning low vcal = 220
[17:48:44.014] <TB3> INFO: Expecting 41600 events.
[17:48:48.062] <TB3> INFO: 41600 events read in total (3456ms).
[17:48:48.062] <TB3> INFO: Test took 4324ms.
[17:48:48.065] <TB3> INFO: scanning low vcal = 230
[17:48:48.341] <TB3> INFO: Expecting 41600 events.
[17:48:52.349] <TB3> INFO: 41600 events read in total (3416ms).
[17:48:52.350] <TB3> INFO: Test took 4285ms.
[17:48:52.352] <TB3> INFO: scanning low vcal = 240
[17:48:52.644] <TB3> INFO: Expecting 41600 events.
[17:48:56.642] <TB3> INFO: 41600 events read in total (3406ms).
[17:48:56.642] <TB3> INFO: Test took 4289ms.
[17:48:56.645] <TB3> INFO: scanning low vcal = 250
[17:48:56.922] <TB3> INFO: Expecting 41600 events.
[17:49:00.941] <TB3> INFO: 41600 events read in total (3428ms).
[17:49:00.942] <TB3> INFO: Test took 4297ms.
[17:49:00.946] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[17:49:01.221] <TB3> INFO: Expecting 41600 events.
[17:49:05.242] <TB3> INFO: 41600 events read in total (3429ms).
[17:49:05.243] <TB3> INFO: Test took 4297ms.
[17:49:05.245] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[17:49:05.522] <TB3> INFO: Expecting 41600 events.
[17:49:09.523] <TB3> INFO: 41600 events read in total (3410ms).
[17:49:09.524] <TB3> INFO: Test took 4279ms.
[17:49:09.526] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[17:49:09.805] <TB3> INFO: Expecting 41600 events.
[17:49:13.817] <TB3> INFO: 41600 events read in total (3421ms).
[17:49:13.818] <TB3> INFO: Test took 4292ms.
[17:49:13.820] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[17:49:14.097] <TB3> INFO: Expecting 41600 events.
[17:49:18.095] <TB3> INFO: 41600 events read in total (3406ms).
[17:49:18.096] <TB3> INFO: Test took 4275ms.
[17:49:18.098] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:49:18.375] <TB3> INFO: Expecting 41600 events.
[17:49:22.368] <TB3> INFO: 41600 events read in total (3401ms).
[17:49:22.368] <TB3> INFO: Test took 4269ms.
[17:49:22.787] <TB3> INFO: PixTestGainPedestal::measure() done
[17:49:55.533] <TB3> INFO: PixTestGainPedestal::fit() done
[17:49:55.534] <TB3> INFO: non-linearity mean: 0.966 0.927 1.058 0.985 0.977 0.979 0.983 0.974 0.979 0.985 0.974 0.980 0.949 0.978 0.947 0.953
[17:49:55.534] <TB3> INFO: non-linearity RMS: 0.022 0.089 0.161 0.004 0.004 0.005 0.004 0.008 0.003 0.004 0.005 0.004 0.110 0.004 0.045 0.168
[17:49:55.534] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:49:55.547] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:49:55.561] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:49:55.575] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:49:55.589] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:49:55.602] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:49:55.616] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:49:55.629] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:49:55.643] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:49:55.657] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:49:55.670] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:49:55.684] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:49:55.698] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:49:55.711] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:49:55.725] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:49:55.739] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:49:55.752] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[17:49:55.753] <TB3> INFO: Decoding statistics:
[17:49:55.753] <TB3> INFO: General information:
[17:49:55.753] <TB3> INFO: 16bit words read: 3327838
[17:49:55.753] <TB3> INFO: valid events total: 332800
[17:49:55.753] <TB3> INFO: empty events: 0
[17:49:55.753] <TB3> INFO: valid events with pixels: 332800
[17:49:55.753] <TB3> INFO: valid pixel hits: 665519
[17:49:55.753] <TB3> INFO: Event errors: 0
[17:49:55.753] <TB3> INFO: start marker: 0
[17:49:55.753] <TB3> INFO: stop marker: 0
[17:49:55.753] <TB3> INFO: overflow: 0
[17:49:55.753] <TB3> INFO: invalid 5bit words: 0
[17:49:55.753] <TB3> INFO: invalid XOR eye diagram: 0
[17:49:55.753] <TB3> INFO: frame (failed synchr.): 0
[17:49:55.753] <TB3> INFO: idle data (no TBM trl): 0
[17:49:55.753] <TB3> INFO: no data (only TBM hdr): 0
[17:49:55.753] <TB3> INFO: TBM errors: 0
[17:49:55.753] <TB3> INFO: flawed TBM headers: 0
[17:49:55.753] <TB3> INFO: flawed TBM trailers: 0
[17:49:55.753] <TB3> INFO: event ID mismatches: 0
[17:49:55.753] <TB3> INFO: ROC errors: 0
[17:49:55.753] <TB3> INFO: missing ROC header(s): 0
[17:49:55.753] <TB3> INFO: misplaced readback start: 0
[17:49:55.753] <TB3> INFO: Pixel decoding errors: 0
[17:49:55.753] <TB3> INFO: pixel data incomplete: 0
[17:49:55.753] <TB3> INFO: pixel address: 0
[17:49:55.753] <TB3> INFO: pulse height fill bit: 0
[17:49:55.753] <TB3> INFO: buffer corruption: 0
[17:49:55.767] <TB3> INFO: Decoding statistics:
[17:49:55.767] <TB3> INFO: General information:
[17:49:55.767] <TB3> INFO: 16bit words read: 3457256
[17:49:55.767] <TB3> INFO: valid events total: 353536
[17:49:55.767] <TB3> INFO: empty events: 18235
[17:49:55.767] <TB3> INFO: valid events with pixels: 335301
[17:49:55.767] <TB3> INFO: valid pixel hits: 668020
[17:49:55.767] <TB3> INFO: Event errors: 0
[17:49:55.767] <TB3> INFO: start marker: 0
[17:49:55.767] <TB3> INFO: stop marker: 0
[17:49:55.767] <TB3> INFO: overflow: 0
[17:49:55.767] <TB3> INFO: invalid 5bit words: 0
[17:49:55.767] <TB3> INFO: invalid XOR eye diagram: 0
[17:49:55.767] <TB3> INFO: frame (failed synchr.): 0
[17:49:55.767] <TB3> INFO: idle data (no TBM trl): 0
[17:49:55.767] <TB3> INFO: no data (only TBM hdr): 0
[17:49:55.767] <TB3> INFO: TBM errors: 0
[17:49:55.767] <TB3> INFO: flawed TBM headers: 0
[17:49:55.767] <TB3> INFO: flawed TBM trailers: 0
[17:49:55.767] <TB3> INFO: event ID mismatches: 0
[17:49:55.767] <TB3> INFO: ROC errors: 0
[17:49:55.767] <TB3> INFO: missing ROC header(s): 0
[17:49:55.767] <TB3> INFO: misplaced readback start: 0
[17:49:55.767] <TB3> INFO: Pixel decoding errors: 0
[17:49:55.767] <TB3> INFO: pixel data incomplete: 0
[17:49:55.767] <TB3> INFO: pixel address: 0
[17:49:55.767] <TB3> INFO: pulse height fill bit: 0
[17:49:55.767] <TB3> INFO: buffer corruption: 0
[17:49:55.768] <TB3> INFO: enter test to run
[17:49:55.768] <TB3> INFO: test: exit no parameter change
[17:49:55.810] <TB3> QUIET: Connection to board 170 closed.
[17:49:55.811] <TB3> INFO: pXar: this is the end, my friend