[18:08:09.812] <TB3> INFO: *** Welcome to pxar ***
[18:08:09.813] <TB3> INFO: *** Today: 2016/11/02
[18:08:09.820] <TB3> INFO: *** Version: c8ba-dirty
[18:08:09.820] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:08:09.821] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:08:09.821] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//defaultMaskFile.dat
[18:08:09.821] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters_C15.dat
[18:08:09.877] <TB3> INFO: clk: 4
[18:08:09.877] <TB3> INFO: ctr: 4
[18:08:09.877] <TB3> INFO: sda: 19
[18:08:09.877] <TB3> INFO: tin: 9
[18:08:09.877] <TB3> INFO: level: 15
[18:08:09.877] <TB3> INFO: triggerdelay: 0
[18:08:09.877] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[18:08:09.877] <TB3> INFO: Log level: INFO
[18:08:09.885] <TB3> INFO: Found DTB DTB_WZ4I6J
[18:08:09.894] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[18:08:09.896] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[18:08:09.897] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[18:08:11.386] <TB3> INFO: DUT info:
[18:08:11.386] <TB3> INFO: The DUT currently contains the following objects:
[18:08:11.386] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[18:08:11.386] <TB3> INFO: TBM Core alpha (0): 7 registers set
[18:08:11.386] <TB3> INFO: TBM Core beta (1): 7 registers set
[18:08:11.386] <TB3> INFO: TBM Core alpha (2): 7 registers set
[18:08:11.386] <TB3> INFO: TBM Core beta (3): 7 registers set
[18:08:11.386] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[18:08:11.386] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.386] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.387] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.387] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.387] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.387] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:11.787] <TB3> INFO: enter 'restricted' command line mode
[18:08:11.787] <TB3> INFO: enter test to run
[18:08:11.787] <TB3> INFO: test: pretest no parameter change
[18:08:11.787] <TB3> INFO: running: pretest
[18:08:12.333] <TB3> INFO: ######################################################################
[18:08:12.333] <TB3> INFO: PixTestPretest::doTest()
[18:08:12.333] <TB3> INFO: ######################################################################
[18:08:12.334] <TB3> INFO: ----------------------------------------------------------------------
[18:08:12.334] <TB3> INFO: PixTestPretest::programROC()
[18:08:12.334] <TB3> INFO: ----------------------------------------------------------------------
[18:08:30.347] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:08:30.347] <TB3> INFO: IA differences per ROC: 18.5 19.3 19.3 18.5 21.7 18.5 19.3 21.7 17.7 16.9 20.1 20.1 20.1 19.3 16.9 20.1
[18:08:30.383] <TB3> INFO: ----------------------------------------------------------------------
[18:08:30.383] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:08:30.383] <TB3> INFO: ----------------------------------------------------------------------
[18:08:37.766] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[18:08:37.766] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 20.1 19.3 19.3 19.3 19.3 18.5 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[18:08:37.795] <TB3> INFO: ----------------------------------------------------------------------
[18:08:37.795] <TB3> INFO: PixTestPretest::findTiming()
[18:08:37.795] <TB3> INFO: ----------------------------------------------------------------------
[18:08:37.795] <TB3> INFO: PixTestCmd::init()

[18:09:08.800] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 7, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[18:09:08.800] <TB3> INFO: (success/tries = 100/100), width = 4
[18:09:10.308] <TB3> INFO: ----------------------------------------------------------------------
[18:09:10.308] <TB3> INFO: PixTestPretest::findWorkingPixel()
[18:09:10.308] <TB3> INFO: ----------------------------------------------------------------------
[18:09:10.399] <TB3> INFO: Expecting 231680 events.
[18:09:20.028] <TB3> INFO: 231680 events read in total (9037ms).
[18:09:20.037] <TB3> INFO: Test took 9727ms.
[18:09:20.282] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:09:20.311] <TB3> INFO: ----------------------------------------------------------------------
[18:09:20.311] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[18:09:20.311] <TB3> INFO: ----------------------------------------------------------------------
[18:09:20.403] <TB3> INFO: Expecting 231680 events.
[18:09:30.101] <TB3> INFO: 231680 events read in total (9107ms).
[18:09:30.108] <TB3> INFO: Test took 9794ms.
[18:09:30.366] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[18:09:30.366] <TB3> INFO: CalDel: 80 84 82 75 98 84 97 99 91 89 100 76 77 81 101 98
[18:09:30.366] <TB3> INFO: VthrComp: 51 52 51 52 51 51 51 51 51 51 51 52 51 51 51 52
[18:09:30.368] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C0.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C1.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C2.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C3.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C4.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C5.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C6.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C7.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C8.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C9.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C10.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C11.dat
[18:09:30.369] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C12.dat
[18:09:30.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C13.dat
[18:09:30.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C14.dat
[18:09:30.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:09:30.370] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[18:09:30.370] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[18:09:30.370] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[18:09:30.370] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:09:30.370] <TB3> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[18:09:30.467] <TB3> INFO: enter test to run
[18:09:30.467] <TB3> INFO: test: fulltest no parameter change
[18:09:30.467] <TB3> INFO: running: fulltest
[18:09:30.467] <TB3> INFO: ######################################################################
[18:09:30.467] <TB3> INFO: PixTestFullTest::doTest()
[18:09:30.467] <TB3> INFO: ######################################################################
[18:09:30.468] <TB3> INFO: ######################################################################
[18:09:30.468] <TB3> INFO: PixTestAlive::doTest()
[18:09:30.468] <TB3> INFO: ######################################################################
[18:09:30.469] <TB3> INFO: ----------------------------------------------------------------------
[18:09:30.469] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:30.469] <TB3> INFO: ----------------------------------------------------------------------
[18:09:30.702] <TB3> INFO: Expecting 41600 events.
[18:09:34.124] <TB3> INFO: 41600 events read in total (2830ms).
[18:09:34.125] <TB3> INFO: Test took 3654ms.
[18:09:34.350] <TB3> INFO: PixTestAlive::aliveTest() done
[18:09:34.350] <TB3> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:09:34.352] <TB3> INFO: ----------------------------------------------------------------------
[18:09:34.352] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:34.352] <TB3> INFO: ----------------------------------------------------------------------
[18:09:34.587] <TB3> INFO: Expecting 41600 events.
[18:09:37.515] <TB3> INFO: 41600 events read in total (2336ms).
[18:09:37.516] <TB3> INFO: Test took 3163ms.
[18:09:37.516] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:09:37.754] <TB3> INFO: PixTestAlive::maskTest() done
[18:09:37.754] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:09:37.756] <TB3> INFO: ----------------------------------------------------------------------
[18:09:37.756] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:37.756] <TB3> INFO: ----------------------------------------------------------------------
[18:09:37.988] <TB3> INFO: Expecting 41600 events.
[18:09:41.509] <TB3> INFO: 41600 events read in total (2930ms).
[18:09:41.509] <TB3> INFO: Test took 3752ms.
[18:09:41.736] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[18:09:41.736] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:09:41.736] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[18:09:41.737] <TB3> INFO: Decoding statistics:
[18:09:41.737] <TB3> INFO: General information:
[18:09:41.737] <TB3> INFO: 16bit words read: 0
[18:09:41.737] <TB3> INFO: valid events total: 0
[18:09:41.737] <TB3> INFO: empty events: 0
[18:09:41.737] <TB3> INFO: valid events with pixels: 0
[18:09:41.737] <TB3> INFO: valid pixel hits: 0
[18:09:41.737] <TB3> INFO: Event errors: 0
[18:09:41.737] <TB3> INFO: start marker: 0
[18:09:41.737] <TB3> INFO: stop marker: 0
[18:09:41.737] <TB3> INFO: overflow: 0
[18:09:41.737] <TB3> INFO: invalid 5bit words: 0
[18:09:41.737] <TB3> INFO: invalid XOR eye diagram: 0
[18:09:41.737] <TB3> INFO: frame (failed synchr.): 0
[18:09:41.737] <TB3> INFO: idle data (no TBM trl): 0
[18:09:41.737] <TB3> INFO: no data (only TBM hdr): 0
[18:09:41.737] <TB3> INFO: TBM errors: 0
[18:09:41.737] <TB3> INFO: flawed TBM headers: 0
[18:09:41.737] <TB3> INFO: flawed TBM trailers: 0
[18:09:41.737] <TB3> INFO: event ID mismatches: 0
[18:09:41.737] <TB3> INFO: ROC errors: 0
[18:09:41.737] <TB3> INFO: missing ROC header(s): 0
[18:09:41.737] <TB3> INFO: misplaced readback start: 0
[18:09:41.737] <TB3> INFO: Pixel decoding errors: 0
[18:09:41.737] <TB3> INFO: pixel data incomplete: 0
[18:09:41.737] <TB3> INFO: pixel address: 0
[18:09:41.737] <TB3> INFO: pulse height fill bit: 0
[18:09:41.737] <TB3> INFO: buffer corruption: 0
[18:09:41.746] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:09:41.747] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[18:09:41.747] <TB3> INFO: ######################################################################
[18:09:41.747] <TB3> INFO: PixTestReadback::doTest()
[18:09:41.747] <TB3> INFO: ######################################################################
[18:09:41.747] <TB3> INFO: ----------------------------------------------------------------------
[18:09:41.747] <TB3> INFO: PixTestReadback::CalibrateVd()
[18:09:41.747] <TB3> INFO: ----------------------------------------------------------------------
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:09:51.700] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:09:51.701] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:09:51.729] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[18:09:51.729] <TB3> INFO: ----------------------------------------------------------------------
[18:09:51.729] <TB3> INFO: PixTestReadback::CalibrateVa()
[18:09:51.729] <TB3> INFO: ----------------------------------------------------------------------
[18:10:01.616] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:10:01.616] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:10:01.616] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:10:01.617] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:10:01.645] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[18:10:01.645] <TB3> INFO: ----------------------------------------------------------------------
[18:10:01.645] <TB3> INFO: PixTestReadback::readbackVbg()
[18:10:01.645] <TB3> INFO: ----------------------------------------------------------------------
[18:10:09.283] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[18:10:09.283] <TB3> INFO: ----------------------------------------------------------------------
[18:10:09.283] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[18:10:09.283] <TB3> INFO: ----------------------------------------------------------------------
[18:10:09.283] <TB3> INFO: Vbg will be calibrated using Vd calibration
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158calibrated Vbg = 1.17826 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 167.5calibrated Vbg = 1.17465 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 152.6calibrated Vbg = 1.17883 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.9calibrated Vbg = 1.16855 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.6calibrated Vbg = 1.17467 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.9calibrated Vbg = 1.17893 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 145.4calibrated Vbg = 1.17514 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158calibrated Vbg = 1.18591 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.2calibrated Vbg = 1.17464 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.9calibrated Vbg = 1.16752 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157.3calibrated Vbg = 1.16869 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.6calibrated Vbg = 1.15628 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.2calibrated Vbg = 1.17442 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159.9calibrated Vbg = 1.17621 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.9calibrated Vbg = 1.1763 :::*/*/*/*/
[18:10:09.283] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.7calibrated Vbg = 1.1773 :::*/*/*/*/
[18:10:09.285] <TB3> INFO: ----------------------------------------------------------------------
[18:10:09.285] <TB3> INFO: PixTestReadback::CalibrateIa()
[18:10:09.285] <TB3> INFO: ----------------------------------------------------------------------
[18:12:49.579] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:12:49.579] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:12:49.580] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:12:49.608] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[18:12:49.610] <TB3> INFO: PixTestReadback::doTest() done
[18:12:49.610] <TB3> INFO: Decoding statistics:
[18:12:49.610] <TB3> INFO: General information:
[18:12:49.610] <TB3> INFO: 16bit words read: 1536
[18:12:49.610] <TB3> INFO: valid events total: 256
[18:12:49.610] <TB3> INFO: empty events: 256
[18:12:49.610] <TB3> INFO: valid events with pixels: 0
[18:12:49.610] <TB3> INFO: valid pixel hits: 0
[18:12:49.610] <TB3> INFO: Event errors: 0
[18:12:49.610] <TB3> INFO: start marker: 0
[18:12:49.610] <TB3> INFO: stop marker: 0
[18:12:49.610] <TB3> INFO: overflow: 0
[18:12:49.610] <TB3> INFO: invalid 5bit words: 0
[18:12:49.610] <TB3> INFO: invalid XOR eye diagram: 0
[18:12:49.610] <TB3> INFO: frame (failed synchr.): 0
[18:12:49.610] <TB3> INFO: idle data (no TBM trl): 0
[18:12:49.610] <TB3> INFO: no data (only TBM hdr): 0
[18:12:49.610] <TB3> INFO: TBM errors: 0
[18:12:49.610] <TB3> INFO: flawed TBM headers: 0
[18:12:49.610] <TB3> INFO: flawed TBM trailers: 0
[18:12:49.610] <TB3> INFO: event ID mismatches: 0
[18:12:49.610] <TB3> INFO: ROC errors: 0
[18:12:49.610] <TB3> INFO: missing ROC header(s): 0
[18:12:49.610] <TB3> INFO: misplaced readback start: 0
[18:12:49.610] <TB3> INFO: Pixel decoding errors: 0
[18:12:49.610] <TB3> INFO: pixel data incomplete: 0
[18:12:49.610] <TB3> INFO: pixel address: 0
[18:12:49.610] <TB3> INFO: pulse height fill bit: 0
[18:12:49.610] <TB3> INFO: buffer corruption: 0
[18:12:49.657] <TB3> INFO: ######################################################################
[18:12:49.657] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[18:12:49.657] <TB3> INFO: ######################################################################
[18:12:49.660] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[18:12:49.674] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:12:49.674] <TB3> INFO: run 1 of 1
[18:12:49.915] <TB3> INFO: Expecting 3120000 events.
[18:13:20.490] <TB3> INFO: 685335 events read in total (29984ms).











[18:13:50.578] <TB3> INFO: 1367100 events read in total (60073ms).











[18:14:20.690] <TB3> INFO: 2046475 events read in total (90184ms).











[18:14:50.565] <TB3> INFO: 2724355 events read in total (120059ms).











[18:15:08.406] <TB3> INFO: 3120000 events read in total (137900ms).
[18:15:08.479] <TB3> INFO: Test took 138806ms.
[18:15:34.438] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 164 seconds
[18:15:34.438] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
[18:15:34.438] <TB3> INFO: separation cut (per ROC): 101 133 102 115 112 124 103 124 117 104 128 130 109 109 113 120
[18:15:34.439] <TB3> INFO: Decoding statistics:
[18:15:34.439] <TB3> INFO: General information:
[18:15:34.439] <TB3> INFO: 16bit words read: 0
[18:15:34.439] <TB3> INFO: valid events total: 0
[18:15:34.439] <TB3> INFO: empty events: 0
[18:15:34.439] <TB3> INFO: valid events with pixels: 0
[18:15:34.439] <TB3> INFO: valid pixel hits: 0
[18:15:34.439] <TB3> INFO: Event errors: 0
[18:15:34.439] <TB3> INFO: start marker: 0
[18:15:34.439] <TB3> INFO: stop marker: 0
[18:15:34.439] <TB3> INFO: overflow: 0
[18:15:34.439] <TB3> INFO: invalid 5bit words: 0
[18:15:34.439] <TB3> INFO: invalid XOR eye diagram: 0
[18:15:34.439] <TB3> INFO: frame (failed synchr.): 0
[18:15:34.439] <TB3> INFO: idle data (no TBM trl): 0
[18:15:34.439] <TB3> INFO: no data (only TBM hdr): 0
[18:15:34.439] <TB3> INFO: TBM errors: 0
[18:15:34.439] <TB3> INFO: flawed TBM headers: 0
[18:15:34.439] <TB3> INFO: flawed TBM trailers: 0
[18:15:34.439] <TB3> INFO: event ID mismatches: 0
[18:15:34.439] <TB3> INFO: ROC errors: 0
[18:15:34.439] <TB3> INFO: missing ROC header(s): 0
[18:15:34.439] <TB3> INFO: misplaced readback start: 0
[18:15:34.439] <TB3> INFO: Pixel decoding errors: 0
[18:15:34.439] <TB3> INFO: pixel data incomplete: 0
[18:15:34.439] <TB3> INFO: pixel address: 0
[18:15:34.439] <TB3> INFO: pulse height fill bit: 0
[18:15:34.439] <TB3> INFO: buffer corruption: 0
[18:15:34.475] <TB3> INFO: ######################################################################
[18:15:34.475] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:15:34.475] <TB3> INFO: ######################################################################
[18:15:34.475] <TB3> INFO: ----------------------------------------------------------------------
[18:15:34.475] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:15:34.475] <TB3> INFO: ----------------------------------------------------------------------
[18:15:34.475] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[18:15:34.485] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[18:15:34.485] <TB3> INFO: run 1 of 1
[18:15:34.719] <TB3> INFO: Expecting 36608000 events.
[18:15:58.101] <TB3> INFO: 697900 events read in total (22790ms).
[18:16:20.951] <TB3> INFO: 1379550 events read in total (45640ms).
[18:16:43.645] <TB3> INFO: 2064200 events read in total (68334ms).
[18:17:06.254] <TB3> INFO: 2744650 events read in total (90943ms).
[18:17:28.982] <TB3> INFO: 3426450 events read in total (113671ms).
[18:17:51.718] <TB3> INFO: 4106800 events read in total (136407ms).
[18:18:14.395] <TB3> INFO: 4788600 events read in total (159084ms).
[18:18:36.870] <TB3> INFO: 5470000 events read in total (181559ms).
[18:18:59.625] <TB3> INFO: 6150450 events read in total (204314ms).
[18:19:22.105] <TB3> INFO: 6830900 events read in total (226794ms).
[18:19:44.557] <TB3> INFO: 7510150 events read in total (249246ms).
[18:20:06.712] <TB3> INFO: 8189000 events read in total (271401ms).
[18:20:29.285] <TB3> INFO: 8868150 events read in total (293974ms).
[18:20:51.784] <TB3> INFO: 9548900 events read in total (316473ms).
[18:21:14.209] <TB3> INFO: 10228050 events read in total (338898ms).
[18:21:37.026] <TB3> INFO: 10909250 events read in total (361715ms).
[18:21:59.593] <TB3> INFO: 11587900 events read in total (384282ms).
[18:22:22.472] <TB3> INFO: 12266900 events read in total (407161ms).
[18:22:45.091] <TB3> INFO: 12944650 events read in total (429780ms).
[18:23:07.855] <TB3> INFO: 13622700 events read in total (452544ms).
[18:23:30.493] <TB3> INFO: 14300050 events read in total (475182ms).
[18:23:53.260] <TB3> INFO: 14977950 events read in total (497949ms).
[18:24:15.977] <TB3> INFO: 15654400 events read in total (520666ms).
[18:24:38.613] <TB3> INFO: 16331700 events read in total (543302ms).
[18:25:01.089] <TB3> INFO: 17008700 events read in total (565778ms).
[18:25:23.857] <TB3> INFO: 17684600 events read in total (588546ms).
[18:25:46.550] <TB3> INFO: 18359000 events read in total (611239ms).
[18:26:09.552] <TB3> INFO: 19033300 events read in total (634241ms).
[18:26:32.222] <TB3> INFO: 19705900 events read in total (656911ms).
[18:26:54.963] <TB3> INFO: 20378850 events read in total (679652ms).
[18:27:17.666] <TB3> INFO: 21051050 events read in total (702355ms).
[18:27:40.209] <TB3> INFO: 21723800 events read in total (724898ms).
[18:28:02.714] <TB3> INFO: 22395050 events read in total (747404ms).
[18:28:25.179] <TB3> INFO: 23066100 events read in total (769868ms).
[18:28:47.738] <TB3> INFO: 23737950 events read in total (792427ms).
[18:29:10.162] <TB3> INFO: 24408500 events read in total (814851ms).
[18:29:32.888] <TB3> INFO: 25079450 events read in total (837577ms).
[18:29:55.544] <TB3> INFO: 25752200 events read in total (860233ms).
[18:30:18.175] <TB3> INFO: 26423950 events read in total (882865ms).
[18:30:41.004] <TB3> INFO: 27094550 events read in total (905693ms).
[18:31:03.619] <TB3> INFO: 27764850 events read in total (928308ms).
[18:31:26.321] <TB3> INFO: 28434100 events read in total (951010ms).
[18:31:48.859] <TB3> INFO: 29101850 events read in total (973548ms).
[18:32:11.481] <TB3> INFO: 29770650 events read in total (996170ms).
[18:32:34.121] <TB3> INFO: 30439650 events read in total (1018810ms).
[18:32:56.825] <TB3> INFO: 31106950 events read in total (1041514ms).
[18:33:19.084] <TB3> INFO: 31775400 events read in total (1063773ms).
[18:33:41.613] <TB3> INFO: 32442750 events read in total (1086302ms).
[18:34:04.203] <TB3> INFO: 33111450 events read in total (1108892ms).
[18:34:26.963] <TB3> INFO: 33780700 events read in total (1131652ms).
[18:34:49.355] <TB3> INFO: 34451200 events read in total (1154044ms).
[18:35:11.750] <TB3> INFO: 35120200 events read in total (1176439ms).
[18:35:34.049] <TB3> INFO: 35789000 events read in total (1198738ms).
[18:35:56.599] <TB3> INFO: 36470150 events read in total (1221288ms).
[18:36:01.605] <TB3> INFO: 36608000 events read in total (1226294ms).
[18:36:01.658] <TB3> INFO: Test took 1227174ms.
[18:36:01.000] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:03.772] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:05.768] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:07.753] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:09.629] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:11.472] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:13.164] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:15.068] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:17.055] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:19.016] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:21.086] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:22.769] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:24.493] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:26.258] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:28.237] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:30.279] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:36:32.125] <TB3> INFO: PixTestScurves::scurves() done
[18:36:32.125] <TB3> INFO: Vcal mean: 118.97 138.28 110.10 126.96 115.79 131.97 113.67 133.93 121.43 115.05 131.00 129.01 125.37 120.01 125.44 133.13
[18:36:32.125] <TB3> INFO: Vcal RMS: 6.15 6.73 5.33 6.34 5.01 5.99 4.82 5.71 5.62 5.26 6.38 5.56 5.88 5.65 6.68 6.34
[18:36:32.125] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1257 seconds
[18:36:32.125] <TB3> INFO: Decoding statistics:
[18:36:32.125] <TB3> INFO: General information:
[18:36:32.125] <TB3> INFO: 16bit words read: 0
[18:36:32.125] <TB3> INFO: valid events total: 0
[18:36:32.125] <TB3> INFO: empty events: 0
[18:36:32.125] <TB3> INFO: valid events with pixels: 0
[18:36:32.125] <TB3> INFO: valid pixel hits: 0
[18:36:32.125] <TB3> INFO: Event errors: 0
[18:36:32.125] <TB3> INFO: start marker: 0
[18:36:32.125] <TB3> INFO: stop marker: 0
[18:36:32.125] <TB3> INFO: overflow: 0
[18:36:32.125] <TB3> INFO: invalid 5bit words: 0
[18:36:32.125] <TB3> INFO: invalid XOR eye diagram: 0
[18:36:32.125] <TB3> INFO: frame (failed synchr.): 0
[18:36:32.125] <TB3> INFO: idle data (no TBM trl): 0
[18:36:32.125] <TB3> INFO: no data (only TBM hdr): 0
[18:36:32.125] <TB3> INFO: TBM errors: 0
[18:36:32.125] <TB3> INFO: flawed TBM headers: 0
[18:36:32.125] <TB3> INFO: flawed TBM trailers: 0
[18:36:32.125] <TB3> INFO: event ID mismatches: 0
[18:36:32.125] <TB3> INFO: ROC errors: 0
[18:36:32.125] <TB3> INFO: missing ROC header(s): 0
[18:36:32.125] <TB3> INFO: misplaced readback start: 0
[18:36:32.125] <TB3> INFO: Pixel decoding errors: 0
[18:36:32.125] <TB3> INFO: pixel data incomplete: 0
[18:36:32.125] <TB3> INFO: pixel address: 0
[18:36:32.125] <TB3> INFO: pulse height fill bit: 0
[18:36:32.125] <TB3> INFO: buffer corruption: 0
[18:36:32.209] <TB3> INFO: ######################################################################
[18:36:32.209] <TB3> INFO: PixTestTrim::doTest()
[18:36:32.209] <TB3> INFO: ######################################################################
[18:36:32.210] <TB3> INFO: ----------------------------------------------------------------------
[18:36:32.210] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:36:32.210] <TB3> INFO: ----------------------------------------------------------------------
[18:36:32.267] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:36:32.267] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:36:32.278] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:36:32.278] <TB3> INFO: run 1 of 1
[18:36:32.551] <TB3> INFO: Expecting 5025280 events.
[18:37:02.982] <TB3> INFO: 831712 events read in total (29835ms).
[18:37:32.801] <TB3> INFO: 1661104 events read in total (59654ms).
[18:38:02.797] <TB3> INFO: 2488712 events read in total (89650ms).
[18:38:32.399] <TB3> INFO: 3313048 events read in total (119252ms).
[18:39:02.104] <TB3> INFO: 4133888 events read in total (148957ms).
[18:39:31.575] <TB3> INFO: 4953448 events read in total (178428ms).
[18:39:34.596] <TB3> INFO: 5025280 events read in total (181449ms).
[18:39:34.650] <TB3> INFO: Test took 182372ms.
[18:39:52.111] <TB3> INFO: ROC 0 VthrComp = 118
[18:39:52.111] <TB3> INFO: ROC 1 VthrComp = 133
[18:39:52.111] <TB3> INFO: ROC 2 VthrComp = 112
[18:39:52.111] <TB3> INFO: ROC 3 VthrComp = 132
[18:39:52.111] <TB3> INFO: ROC 4 VthrComp = 121
[18:39:52.111] <TB3> INFO: ROC 5 VthrComp = 131
[18:39:52.111] <TB3> INFO: ROC 6 VthrComp = 117
[18:39:52.111] <TB3> INFO: ROC 7 VthrComp = 135
[18:39:52.112] <TB3> INFO: ROC 8 VthrComp = 124
[18:39:52.112] <TB3> INFO: ROC 9 VthrComp = 115
[18:39:52.112] <TB3> INFO: ROC 10 VthrComp = 129
[18:39:52.112] <TB3> INFO: ROC 11 VthrComp = 133
[18:39:52.112] <TB3> INFO: ROC 12 VthrComp = 128
[18:39:52.112] <TB3> INFO: ROC 13 VthrComp = 124
[18:39:52.113] <TB3> INFO: ROC 14 VthrComp = 120
[18:39:52.113] <TB3> INFO: ROC 15 VthrComp = 131
[18:39:52.372] <TB3> INFO: Expecting 41600 events.
[18:39:55.977] <TB3> INFO: 41600 events read in total (3013ms).
[18:39:55.978] <TB3> INFO: Test took 3863ms.
[18:39:55.988] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:39:55.988] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:39:55.997] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:39:55.997] <TB3> INFO: run 1 of 1
[18:39:56.275] <TB3> INFO: Expecting 5025280 events.
[18:40:22.436] <TB3> INFO: 591112 events read in total (25569ms).
[18:40:48.062] <TB3> INFO: 1180920 events read in total (51196ms).
[18:41:13.489] <TB3> INFO: 1771368 events read in total (76622ms).
[18:41:39.038] <TB3> INFO: 2361088 events read in total (102171ms).
[18:42:04.468] <TB3> INFO: 2948416 events read in total (127601ms).
[18:42:29.795] <TB3> INFO: 3535112 events read in total (152928ms).
[18:42:55.556] <TB3> INFO: 4120960 events read in total (178689ms).
[18:43:20.523] <TB3> INFO: 4705560 events read in total (203656ms).
[18:43:34.550] <TB3> INFO: 5025280 events read in total (217683ms).
[18:43:34.625] <TB3> INFO: Test took 218629ms.
[18:44:01.530] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.8514 for pixel 18/4 mean/min/max = 46.4698/32.0666/60.8729
[18:44:01.531] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 67.3734 for pixel 25/79 mean/min/max = 51.0377/34.605/67.4704
[18:44:01.531] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.7678 for pixel 6/79 mean/min/max = 46.3613/33.8589/58.8637
[18:44:01.531] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.3147 for pixel 8/72 mean/min/max = 46.466/32.5641/60.3679
[18:44:01.531] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.0443 for pixel 9/9 mean/min/max = 45.5461/33.7359/57.3562
[18:44:01.532] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.8823 for pixel 13/7 mean/min/max = 46.1922/31.4563/60.9281
[18:44:01.532] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.3597 for pixel 46/79 mean/min/max = 45.2064/32.986/57.4268
[18:44:01.532] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.1037 for pixel 49/8 mean/min/max = 47.2192/34.3188/60.1196
[18:44:01.533] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.1783 for pixel 15/1 mean/min/max = 46.1982/33.2026/59.1939
[18:44:01.533] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 59.8779 for pixel 51/61 mean/min/max = 46.22/32.5269/59.9132
[18:44:01.533] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.9984 for pixel 50/79 mean/min/max = 46.7367/32.4257/61.0478
[18:44:01.534] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.3488 for pixel 2/65 mean/min/max = 46.6306/33.8181/59.4431
[18:44:01.534] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.9542 for pixel 8/10 mean/min/max = 46.477/32.9915/59.9625
[18:44:01.534] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.6536 for pixel 9/79 mean/min/max = 45.6302/33.3878/57.8726
[18:44:01.534] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.9939 for pixel 14/74 mean/min/max = 48.0736/33.862/62.2853
[18:44:01.535] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 61.4278 for pixel 6/2 mean/min/max = 46.6971/31.8018/61.5923
[18:44:01.535] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:44:01.623] <TB3> INFO: Expecting 411648 events.
[18:44:10.942] <TB3> INFO: 411648 events read in total (8725ms).
[18:44:10.952] <TB3> INFO: Expecting 411648 events.
[18:44:19.990] <TB3> INFO: 411648 events read in total (8635ms).
[18:44:19.999] <TB3> INFO: Expecting 411648 events.
[18:44:29.126] <TB3> INFO: 411648 events read in total (8723ms).
[18:44:29.141] <TB3> INFO: Expecting 411648 events.
[18:44:38.212] <TB3> INFO: 411648 events read in total (8668ms).
[18:44:38.228] <TB3> INFO: Expecting 411648 events.
[18:44:47.319] <TB3> INFO: 411648 events read in total (8688ms).
[18:44:47.344] <TB3> INFO: Expecting 411648 events.
[18:44:56.377] <TB3> INFO: 411648 events read in total (8631ms).
[18:44:56.397] <TB3> INFO: Expecting 411648 events.
[18:45:05.466] <TB3> INFO: 411648 events read in total (8666ms).
[18:45:05.489] <TB3> INFO: Expecting 411648 events.
[18:45:14.594] <TB3> INFO: 411648 events read in total (8695ms).
[18:45:14.623] <TB3> INFO: Expecting 411648 events.
[18:45:23.619] <TB3> INFO: 411648 events read in total (8593ms).
[18:45:23.647] <TB3> INFO: Expecting 411648 events.
[18:45:32.721] <TB3> INFO: 411648 events read in total (8671ms).
[18:45:32.750] <TB3> INFO: Expecting 411648 events.
[18:45:41.893] <TB3> INFO: 411648 events read in total (8740ms).
[18:45:41.925] <TB3> INFO: Expecting 411648 events.
[18:45:50.960] <TB3> INFO: 411648 events read in total (8632ms).
[18:45:50.995] <TB3> INFO: Expecting 411648 events.
[18:46:00.020] <TB3> INFO: 411648 events read in total (8622ms).
[18:46:00.057] <TB3> INFO: Expecting 411648 events.
[18:46:09.104] <TB3> INFO: 411648 events read in total (8644ms).
[18:46:09.158] <TB3> INFO: Expecting 411648 events.
[18:46:18.215] <TB3> INFO: 411648 events read in total (8655ms).
[18:46:18.256] <TB3> INFO: Expecting 411648 events.
[18:46:27.311] <TB3> INFO: 411648 events read in total (8652ms).
[18:46:27.369] <TB3> INFO: Test took 145834ms.
[18:46:28.070] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:46:28.080] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:46:28.080] <TB3> INFO: run 1 of 1
[18:46:28.311] <TB3> INFO: Expecting 5025280 events.
[18:46:54.008] <TB3> INFO: 589040 events read in total (25105ms).
[18:47:19.596] <TB3> INFO: 1176752 events read in total (50693ms).
[18:47:45.473] <TB3> INFO: 1763648 events read in total (76570ms).
[18:48:11.146] <TB3> INFO: 2349280 events read in total (102243ms).
[18:48:36.741] <TB3> INFO: 2936312 events read in total (127838ms).
[18:49:02.555] <TB3> INFO: 3524496 events read in total (153652ms).
[18:49:28.221] <TB3> INFO: 4109968 events read in total (179318ms).
[18:49:54.172] <TB3> INFO: 4698064 events read in total (205269ms).
[18:50:08.833] <TB3> INFO: 5025280 events read in total (219930ms).
[18:50:08.940] <TB3> INFO: Test took 220861ms.
[18:50:33.386] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 4.950632 .. 146.687883
[18:50:33.621] <TB3> INFO: Expecting 208000 events.
[18:50:43.181] <TB3> INFO: 208000 events read in total (8969ms).
[18:50:43.181] <TB3> INFO: Test took 9793ms.
[18:50:43.231] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 156 (-1/-1) hits flags = 528 (plus default)
[18:50:43.242] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:50:43.242] <TB3> INFO: run 1 of 1
[18:50:43.520] <TB3> INFO: Expecting 5091840 events.
[18:51:09.341] <TB3> INFO: 581120 events read in total (25229ms).
[18:51:34.424] <TB3> INFO: 1162072 events read in total (50312ms).
[18:51:59.637] <TB3> INFO: 1742632 events read in total (75526ms).
[18:52:24.890] <TB3> INFO: 2323744 events read in total (100778ms).
[18:52:50.111] <TB3> INFO: 2904160 events read in total (125999ms).
[18:53:15.711] <TB3> INFO: 3484456 events read in total (151599ms).
[18:53:41.012] <TB3> INFO: 4064656 events read in total (176900ms).
[18:54:06.589] <TB3> INFO: 4643248 events read in total (202477ms).
[18:54:26.353] <TB3> INFO: 5091840 events read in total (222242ms).
[18:54:26.431] <TB3> INFO: Test took 223190ms.
[18:54:54.306] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.639530 .. 46.572393
[18:54:54.540] <TB3> INFO: Expecting 208000 events.
[18:55:04.158] <TB3> INFO: 208000 events read in total (9026ms).
[18:55:04.159] <TB3> INFO: Test took 9852ms.
[18:55:04.225] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[18:55:04.236] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:55:04.236] <TB3> INFO: run 1 of 1
[18:55:04.514] <TB3> INFO: Expecting 1331200 events.
[18:55:32.047] <TB3> INFO: 658536 events read in total (26941ms).
[18:55:59.621] <TB3> INFO: 1314520 events read in total (54515ms).
[18:56:00.722] <TB3> INFO: 1331200 events read in total (55617ms).
[18:56:00.760] <TB3> INFO: Test took 56524ms.
[18:56:14.110] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.469521 .. 48.840515
[18:56:14.344] <TB3> INFO: Expecting 208000 events.
[18:56:23.003] <TB3> INFO: 208000 events read in total (9068ms).
[18:56:24.003] <TB3> INFO: Test took 9891ms.
[18:56:24.083] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 58 (-1/-1) hits flags = 528 (plus default)
[18:56:24.095] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:56:24.095] <TB3> INFO: run 1 of 1
[18:56:24.373] <TB3> INFO: Expecting 1364480 events.
[18:56:51.783] <TB3> INFO: 646080 events read in total (26818ms).
[18:57:18.439] <TB3> INFO: 1290616 events read in total (53475ms).
[18:57:21.896] <TB3> INFO: 1364480 events read in total (56931ms).
[18:57:21.926] <TB3> INFO: Test took 57831ms.
[18:57:35.501] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.519686 .. 50.901652
[18:57:35.743] <TB3> INFO: Expecting 208000 events.
[18:57:45.364] <TB3> INFO: 208000 events read in total (9029ms).
[18:57:45.365] <TB3> INFO: Test took 9862ms.
[18:57:45.411] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 60 (-1/-1) hits flags = 528 (plus default)
[18:57:45.422] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:57:45.422] <TB3> INFO: run 1 of 1
[18:57:45.700] <TB3> INFO: Expecting 1497600 events.
[18:58:12.985] <TB3> INFO: 646296 events read in total (26693ms).
[18:58:40.296] <TB3> INFO: 1292144 events read in total (54004ms).
[18:58:49.720] <TB3> INFO: 1497600 events read in total (63428ms).
[18:58:49.755] <TB3> INFO: Test took 64334ms.
[18:59:02.463] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:59:02.463] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:59:02.476] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:59:02.476] <TB3> INFO: run 1 of 1
[18:59:02.795] <TB3> INFO: Expecting 1364480 events.
[18:59:30.559] <TB3> INFO: 668552 events read in total (27173ms).
[18:59:58.347] <TB3> INFO: 1336224 events read in total (54961ms).
[18:59:59.901] <TB3> INFO: 1364480 events read in total (56515ms).
[18:59:59.932] <TB3> INFO: Test took 57457ms.
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:00:13.319] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:00:13.320] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:00:13.320] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C0.dat
[19:00:13.325] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C1.dat
[19:00:13.331] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C2.dat
[19:00:13.337] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C3.dat
[19:00:13.342] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C4.dat
[19:00:13.348] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C5.dat
[19:00:13.353] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C6.dat
[19:00:13.359] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C7.dat
[19:00:13.364] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C8.dat
[19:00:13.370] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C9.dat
[19:00:13.375] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C10.dat
[19:00:13.380] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C11.dat
[19:00:13.386] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C12.dat
[19:00:13.391] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C13.dat
[19:00:13.397] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C14.dat
[19:00:13.402] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C15.dat
[19:00:13.407] <TB3> INFO: PixTestTrim::trimTest() done
[19:00:13.407] <TB3> INFO: vtrim: 130 170 126 163 154 145 129 146 122 136 139 116 144 120 149 147
[19:00:13.407] <TB3> INFO: vthrcomp: 118 133 112 132 121 131 117 135 124 115 129 133 128 124 120 131
[19:00:13.407] <TB3> INFO: vcal mean: 35.17 35.47 34.98 34.97 35.00 35.33 34.99 35.05 35.10 34.98 35.10 35.08 35.04 34.95 35.85 35.78
[19:00:13.407] <TB3> INFO: vcal RMS: 1.30 1.68 1.17 1.12 0.96 1.45 1.05 1.09 1.13 1.17 1.15 1.08 1.15 1.01 2.03 1.94
[19:00:13.407] <TB3> INFO: bits mean: 9.81 8.55 9.35 9.89 9.90 10.25 9.89 9.27 9.79 9.56 9.47 9.16 9.79 9.59 10.06 10.37
[19:00:13.407] <TB3> INFO: bits RMS: 2.56 2.61 2.53 2.40 2.30 2.47 2.43 2.39 2.43 2.67 2.62 2.61 2.47 2.52 2.33 2.44
[19:00:13.414] <TB3> INFO: ----------------------------------------------------------------------
[19:00:13.414] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:00:13.414] <TB3> INFO: ----------------------------------------------------------------------
[19:00:13.417] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:00:13.427] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:00:13.427] <TB3> INFO: run 1 of 1
[19:00:13.660] <TB3> INFO: Expecting 4160000 events.
[19:00:46.380] <TB3> INFO: 771555 events read in total (32128ms).
[19:01:17.938] <TB3> INFO: 1537765 events read in total (63686ms).
[19:01:49.438] <TB3> INFO: 2299685 events read in total (95186ms).
[19:02:20.877] <TB3> INFO: 3056265 events read in total (126625ms).
[19:02:52.837] <TB3> INFO: 3807995 events read in total (158585ms).
[19:03:07.802] <TB3> INFO: 4160000 events read in total (173550ms).
[19:03:07.851] <TB3> INFO: Test took 174424ms.
[19:03:35.811] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[19:03:35.824] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:03:35.824] <TB3> INFO: run 1 of 1
[19:03:36.145] <TB3> INFO: Expecting 4326400 events.
[19:04:08.887] <TB3> INFO: 734380 events read in total (32150ms).
[19:04:39.722] <TB3> INFO: 1465100 events read in total (62985ms).
[19:05:10.457] <TB3> INFO: 2193035 events read in total (93720ms).
[19:05:41.048] <TB3> INFO: 2915935 events read in total (124311ms).
[19:06:11.480] <TB3> INFO: 3635440 events read in total (154743ms).
[19:06:40.983] <TB3> INFO: 4326400 events read in total (184246ms).
[19:06:41.063] <TB3> INFO: Test took 185239ms.
[19:07:11.183] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[19:07:11.193] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:07:11.193] <TB3> INFO: run 1 of 1
[19:07:11.442] <TB3> INFO: Expecting 4243200 events.
[19:07:42.872] <TB3> INFO: 740485 events read in total (30839ms).
[19:08:13.852] <TB3> INFO: 1476825 events read in total (61819ms).
[19:08:44.555] <TB3> INFO: 2210150 events read in total (92522ms).
[19:09:15.423] <TB3> INFO: 2938455 events read in total (123390ms).
[19:09:45.994] <TB3> INFO: 3663045 events read in total (153961ms).
[19:10:10.801] <TB3> INFO: 4243200 events read in total (178768ms).
[19:10:10.859] <TB3> INFO: Test took 179666ms.
[19:10:40.193] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[19:10:40.203] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:10:40.203] <TB3> INFO: run 1 of 1
[19:10:40.436] <TB3> INFO: Expecting 4264000 events.
[19:11:12.026] <TB3> INFO: 739095 events read in total (30998ms).
[19:11:43.041] <TB3> INFO: 1474500 events read in total (62013ms).
[19:12:14.688] <TB3> INFO: 2206725 events read in total (93660ms).
[19:12:45.875] <TB3> INFO: 2933985 events read in total (124847ms).
[19:13:16.665] <TB3> INFO: 3657810 events read in total (155637ms).
[19:13:43.184] <TB3> INFO: 4264000 events read in total (182156ms).
[19:13:43.238] <TB3> INFO: Test took 183034ms.
[19:14:12.639] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[19:14:12.649] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:14:12.649] <TB3> INFO: run 1 of 1
[19:14:12.882] <TB3> INFO: Expecting 4264000 events.
[19:14:44.494] <TB3> INFO: 739505 events read in total (31020ms).
[19:15:15.518] <TB3> INFO: 1474895 events read in total (62044ms).
[19:15:46.359] <TB3> INFO: 2207385 events read in total (92885ms).
[19:16:17.064] <TB3> INFO: 2934660 events read in total (123590ms).
[19:16:48.410] <TB3> INFO: 3658725 events read in total (154936ms).
[19:17:14.711] <TB3> INFO: 4264000 events read in total (181237ms).
[19:17:14.787] <TB3> INFO: Test took 182138ms.
[19:17:45.177] <TB3> INFO: PixTestTrim::trimBitTest() done
[19:17:45.178] <TB3> INFO: PixTestTrim::doTest() done, duration: 2472 seconds
[19:17:45.178] <TB3> INFO: Decoding statistics:
[19:17:45.178] <TB3> INFO: General information:
[19:17:45.178] <TB3> INFO: 16bit words read: 0
[19:17:45.178] <TB3> INFO: valid events total: 0
[19:17:45.178] <TB3> INFO: empty events: 0
[19:17:45.178] <TB3> INFO: valid events with pixels: 0
[19:17:45.178] <TB3> INFO: valid pixel hits: 0
[19:17:45.178] <TB3> INFO: Event errors: 0
[19:17:45.178] <TB3> INFO: start marker: 0
[19:17:45.178] <TB3> INFO: stop marker: 0
[19:17:45.178] <TB3> INFO: overflow: 0
[19:17:45.178] <TB3> INFO: invalid 5bit words: 0
[19:17:45.178] <TB3> INFO: invalid XOR eye diagram: 0
[19:17:45.178] <TB3> INFO: frame (failed synchr.): 0
[19:17:45.178] <TB3> INFO: idle data (no TBM trl): 0
[19:17:45.178] <TB3> INFO: no data (only TBM hdr): 0
[19:17:45.178] <TB3> INFO: TBM errors: 0
[19:17:45.178] <TB3> INFO: flawed TBM headers: 0
[19:17:45.178] <TB3> INFO: flawed TBM trailers: 0
[19:17:45.178] <TB3> INFO: event ID mismatches: 0
[19:17:45.178] <TB3> INFO: ROC errors: 0
[19:17:45.178] <TB3> INFO: missing ROC header(s): 0
[19:17:45.178] <TB3> INFO: misplaced readback start: 0
[19:17:45.178] <TB3> INFO: Pixel decoding errors: 0
[19:17:45.178] <TB3> INFO: pixel data incomplete: 0
[19:17:45.178] <TB3> INFO: pixel address: 0
[19:17:45.178] <TB3> INFO: pulse height fill bit: 0
[19:17:45.178] <TB3> INFO: buffer corruption: 0
[19:17:45.982] <TB3> INFO: ######################################################################
[19:17:45.982] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[19:17:45.982] <TB3> INFO: ######################################################################
[19:17:46.215] <TB3> INFO: Expecting 41600 events.
[19:17:49.729] <TB3> INFO: 41600 events read in total (2923ms).
[19:17:49.731] <TB3> INFO: Test took 3748ms.
[19:17:50.166] <TB3> INFO: Expecting 41600 events.
[19:17:53.685] <TB3> INFO: 41600 events read in total (2927ms).
[19:17:53.686] <TB3> INFO: Test took 3752ms.
[19:17:53.974] <TB3> INFO: Expecting 41600 events.
[19:17:57.518] <TB3> INFO: 41600 events read in total (2952ms).
[19:17:57.519] <TB3> INFO: Test took 3810ms.
[19:17:57.807] <TB3> INFO: Expecting 41600 events.
[19:18:01.251] <TB3> INFO: 41600 events read in total (2854ms).
[19:18:01.252] <TB3> INFO: Test took 3710ms.
[19:18:01.541] <TB3> INFO: Expecting 41600 events.
[19:18:05.179] <TB3> INFO: 41600 events read in total (3047ms).
[19:18:05.180] <TB3> INFO: Test took 3904ms.
[19:18:05.468] <TB3> INFO: Expecting 41600 events.
[19:18:08.913] <TB3> INFO: 41600 events read in total (2853ms).
[19:18:08.914] <TB3> INFO: Test took 3711ms.
[19:18:09.202] <TB3> INFO: Expecting 41600 events.
[19:18:12.722] <TB3> INFO: 41600 events read in total (2928ms).
[19:18:12.722] <TB3> INFO: Test took 3784ms.
[19:18:13.011] <TB3> INFO: Expecting 41600 events.
[19:18:16.524] <TB3> INFO: 41600 events read in total (2922ms).
[19:18:16.524] <TB3> INFO: Test took 3778ms.
[19:18:16.813] <TB3> INFO: Expecting 41600 events.
[19:18:20.277] <TB3> INFO: 41600 events read in total (2873ms).
[19:18:20.278] <TB3> INFO: Test took 3730ms.
[19:18:20.566] <TB3> INFO: Expecting 41600 events.
[19:18:24.101] <TB3> INFO: 41600 events read in total (2943ms).
[19:18:24.102] <TB3> INFO: Test took 3801ms.
[19:18:24.390] <TB3> INFO: Expecting 41600 events.
[19:18:27.944] <TB3> INFO: 41600 events read in total (2963ms).
[19:18:27.945] <TB3> INFO: Test took 3820ms.
[19:18:28.240] <TB3> INFO: Expecting 41600 events.
[19:18:31.702] <TB3> INFO: 41600 events read in total (2870ms).
[19:18:31.703] <TB3> INFO: Test took 3735ms.
[19:18:31.994] <TB3> INFO: Expecting 41600 events.
[19:18:35.514] <TB3> INFO: 41600 events read in total (2928ms).
[19:18:35.516] <TB3> INFO: Test took 3786ms.
[19:18:35.805] <TB3> INFO: Expecting 41600 events.
[19:18:39.277] <TB3> INFO: 41600 events read in total (2881ms).
[19:18:39.278] <TB3> INFO: Test took 3738ms.
[19:18:39.566] <TB3> INFO: Expecting 41600 events.
[19:18:43.144] <TB3> INFO: 41600 events read in total (2986ms).
[19:18:43.145] <TB3> INFO: Test took 3843ms.
[19:18:43.461] <TB3> INFO: Expecting 41600 events.
[19:18:47.014] <TB3> INFO: 41600 events read in total (2961ms).
[19:18:47.015] <TB3> INFO: Test took 3842ms.
[19:18:47.303] <TB3> INFO: Expecting 41600 events.
[19:18:50.846] <TB3> INFO: 41600 events read in total (2951ms).
[19:18:50.846] <TB3> INFO: Test took 3807ms.
[19:18:51.134] <TB3> INFO: Expecting 41600 events.
[19:18:54.665] <TB3> INFO: 41600 events read in total (2939ms).
[19:18:54.666] <TB3> INFO: Test took 3796ms.
[19:18:54.954] <TB3> INFO: Expecting 41600 events.
[19:18:58.478] <TB3> INFO: 41600 events read in total (2932ms).
[19:18:58.478] <TB3> INFO: Test took 3789ms.
[19:18:58.767] <TB3> INFO: Expecting 41600 events.
[19:19:02.195] <TB3> INFO: 41600 events read in total (2836ms).
[19:19:02.195] <TB3> INFO: Test took 3693ms.
[19:19:02.484] <TB3> INFO: Expecting 41600 events.
[19:19:06.007] <TB3> INFO: 41600 events read in total (2932ms).
[19:19:06.008] <TB3> INFO: Test took 3789ms.
[19:19:06.296] <TB3> INFO: Expecting 41600 events.
[19:19:09.737] <TB3> INFO: 41600 events read in total (2849ms).
[19:19:09.737] <TB3> INFO: Test took 3705ms.
[19:19:10.026] <TB3> INFO: Expecting 41600 events.
[19:19:13.468] <TB3> INFO: 41600 events read in total (2851ms).
[19:19:13.469] <TB3> INFO: Test took 3708ms.
[19:19:13.757] <TB3> INFO: Expecting 41600 events.
[19:19:17.300] <TB3> INFO: 41600 events read in total (2951ms).
[19:19:17.301] <TB3> INFO: Test took 3808ms.
[19:19:17.641] <TB3> INFO: Expecting 41600 events.
[19:19:21.081] <TB3> INFO: 41600 events read in total (2848ms).
[19:19:21.081] <TB3> INFO: Test took 3756ms.
[19:19:21.369] <TB3> INFO: Expecting 41600 events.
[19:19:24.979] <TB3> INFO: 41600 events read in total (3018ms).
[19:19:24.980] <TB3> INFO: Test took 3875ms.
[19:19:25.270] <TB3> INFO: Expecting 41600 events.
[19:19:28.783] <TB3> INFO: 41600 events read in total (2921ms).
[19:19:28.784] <TB3> INFO: Test took 3778ms.
[19:19:29.120] <TB3> INFO: Expecting 41600 events.
[19:19:32.566] <TB3> INFO: 41600 events read in total (2855ms).
[19:19:32.567] <TB3> INFO: Test took 3755ms.
[19:19:32.879] <TB3> INFO: Expecting 41600 events.
[19:19:36.319] <TB3> INFO: 41600 events read in total (2849ms).
[19:19:36.319] <TB3> INFO: Test took 3728ms.
[19:19:36.609] <TB3> INFO: Expecting 41600 events.
[19:19:40.055] <TB3> INFO: 41600 events read in total (2854ms).
[19:19:40.056] <TB3> INFO: Test took 3712ms.
[19:19:40.348] <TB3> INFO: Expecting 2560 events.
[19:19:41.234] <TB3> INFO: 2560 events read in total (295ms).
[19:19:41.234] <TB3> INFO: Test took 1163ms.
[19:19:41.542] <TB3> INFO: Expecting 2560 events.
[19:19:42.426] <TB3> INFO: 2560 events read in total (292ms).
[19:19:42.426] <TB3> INFO: Test took 1191ms.
[19:19:42.734] <TB3> INFO: Expecting 2560 events.
[19:19:43.617] <TB3> INFO: 2560 events read in total (291ms).
[19:19:43.617] <TB3> INFO: Test took 1190ms.
[19:19:43.925] <TB3> INFO: Expecting 2560 events.
[19:19:44.809] <TB3> INFO: 2560 events read in total (292ms).
[19:19:44.809] <TB3> INFO: Test took 1191ms.
[19:19:45.117] <TB3> INFO: Expecting 2560 events.
[19:19:45.996] <TB3> INFO: 2560 events read in total (287ms).
[19:19:45.996] <TB3> INFO: Test took 1186ms.
[19:19:46.304] <TB3> INFO: Expecting 2560 events.
[19:19:47.186] <TB3> INFO: 2560 events read in total (290ms).
[19:19:47.186] <TB3> INFO: Test took 1190ms.
[19:19:47.494] <TB3> INFO: Expecting 2560 events.
[19:19:48.374] <TB3> INFO: 2560 events read in total (288ms).
[19:19:48.374] <TB3> INFO: Test took 1187ms.
[19:19:48.682] <TB3> INFO: Expecting 2560 events.
[19:19:49.562] <TB3> INFO: 2560 events read in total (288ms).
[19:19:49.563] <TB3> INFO: Test took 1188ms.
[19:19:49.870] <TB3> INFO: Expecting 2560 events.
[19:19:50.752] <TB3> INFO: 2560 events read in total (290ms).
[19:19:50.752] <TB3> INFO: Test took 1189ms.
[19:19:51.060] <TB3> INFO: Expecting 2560 events.
[19:19:51.940] <TB3> INFO: 2560 events read in total (288ms).
[19:19:51.941] <TB3> INFO: Test took 1188ms.
[19:19:52.248] <TB3> INFO: Expecting 2560 events.
[19:19:53.127] <TB3> INFO: 2560 events read in total (287ms).
[19:19:53.128] <TB3> INFO: Test took 1187ms.
[19:19:53.435] <TB3> INFO: Expecting 2560 events.
[19:19:54.313] <TB3> INFO: 2560 events read in total (286ms).
[19:19:54.313] <TB3> INFO: Test took 1185ms.
[19:19:54.621] <TB3> INFO: Expecting 2560 events.
[19:19:55.505] <TB3> INFO: 2560 events read in total (292ms).
[19:19:55.506] <TB3> INFO: Test took 1192ms.
[19:19:55.813] <TB3> INFO: Expecting 2560 events.
[19:19:56.695] <TB3> INFO: 2560 events read in total (290ms).
[19:19:56.695] <TB3> INFO: Test took 1189ms.
[19:19:57.003] <TB3> INFO: Expecting 2560 events.
[19:19:57.885] <TB3> INFO: 2560 events read in total (290ms).
[19:19:57.886] <TB3> INFO: Test took 1190ms.
[19:19:58.193] <TB3> INFO: Expecting 2560 events.
[19:19:59.078] <TB3> INFO: 2560 events read in total (293ms).
[19:19:59.078] <TB3> INFO: Test took 1192ms.
[19:19:59.081] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:19:59.391] <TB3> INFO: Expecting 655360 events.
[19:20:13.642] <TB3> INFO: 655360 events read in total (13660ms).
[19:20:13.653] <TB3> INFO: Expecting 655360 events.
[19:20:27.718] <TB3> INFO: 655360 events read in total (13663ms).
[19:20:27.732] <TB3> INFO: Expecting 655360 events.
[19:20:41.861] <TB3> INFO: 655360 events read in total (13726ms).
[19:20:41.880] <TB3> INFO: Expecting 655360 events.
[19:20:55.863] <TB3> INFO: 655360 events read in total (13580ms).
[19:20:55.888] <TB3> INFO: Expecting 655360 events.
[19:21:09.909] <TB3> INFO: 655360 events read in total (13618ms).
[19:21:09.946] <TB3> INFO: Expecting 655360 events.
[19:21:23.968] <TB3> INFO: 655360 events read in total (13619ms).
[19:21:23.999] <TB3> INFO: Expecting 655360 events.
[19:21:38.094] <TB3> INFO: 655360 events read in total (13692ms).
[19:21:38.128] <TB3> INFO: Expecting 655360 events.
[19:21:52.062] <TB3> INFO: 655360 events read in total (13531ms).
[19:21:52.101] <TB3> INFO: Expecting 655360 events.
[19:22:06.113] <TB3> INFO: 655360 events read in total (13609ms).
[19:22:06.168] <TB3> INFO: Expecting 655360 events.
[19:22:20.221] <TB3> INFO: 655360 events read in total (13650ms).
[19:22:20.271] <TB3> INFO: Expecting 655360 events.
[19:22:34.229] <TB3> INFO: 655360 events read in total (13555ms).
[19:22:34.303] <TB3> INFO: Expecting 655360 events.
[19:22:48.361] <TB3> INFO: 655360 events read in total (13655ms).
[19:22:48.421] <TB3> INFO: Expecting 655360 events.
[19:23:02.448] <TB3> INFO: 655360 events read in total (13623ms).
[19:23:02.518] <TB3> INFO: Expecting 655360 events.
[19:23:16.507] <TB3> INFO: 655360 events read in total (13586ms).
[19:23:16.575] <TB3> INFO: Expecting 655360 events.
[19:23:30.561] <TB3> INFO: 655360 events read in total (13583ms).
[19:23:30.632] <TB3> INFO: Expecting 655360 events.
[19:23:44.645] <TB3> INFO: 655360 events read in total (13610ms).
[19:23:44.750] <TB3> INFO: Test took 225669ms.
[19:23:44.833] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:23:45.098] <TB3> INFO: Expecting 655360 events.
[19:23:58.836] <TB3> INFO: 655360 events read in total (13147ms).
[19:23:58.849] <TB3> INFO: Expecting 655360 events.
[19:24:12.613] <TB3> INFO: 655360 events read in total (13361ms).
[19:24:12.628] <TB3> INFO: Expecting 655360 events.
[19:24:26.297] <TB3> INFO: 655360 events read in total (13266ms).
[19:24:26.315] <TB3> INFO: Expecting 655360 events.
[19:24:40.044] <TB3> INFO: 655360 events read in total (13326ms).
[19:24:40.073] <TB3> INFO: Expecting 655360 events.
[19:24:54.074] <TB3> INFO: 655360 events read in total (13598ms).
[19:24:54.100] <TB3> INFO: Expecting 655360 events.
[19:25:07.888] <TB3> INFO: 655360 events read in total (13385ms).
[19:25:07.917] <TB3> INFO: Expecting 655360 events.
[19:25:21.870] <TB3> INFO: 655360 events read in total (13550ms).
[19:25:21.916] <TB3> INFO: Expecting 655360 events.
[19:25:35.799] <TB3> INFO: 655360 events read in total (13481ms).
[19:25:35.838] <TB3> INFO: Expecting 655360 events.
[19:25:49.921] <TB3> INFO: 655360 events read in total (13678ms).
[19:25:49.962] <TB3> INFO: Expecting 655360 events.
[19:26:03.898] <TB3> INFO: 655360 events read in total (13533ms).
[19:26:03.947] <TB3> INFO: Expecting 655360 events.
[19:26:17.730] <TB3> INFO: 655360 events read in total (13380ms).
[19:26:17.805] <TB3> INFO: Expecting 655360 events.
[19:26:31.752] <TB3> INFO: 655360 events read in total (13544ms).
[19:26:31.814] <TB3> INFO: Expecting 655360 events.
[19:26:45.740] <TB3> INFO: 655360 events read in total (13523ms).
[19:26:45.809] <TB3> INFO: Expecting 655360 events.
[19:26:59.744] <TB3> INFO: 655360 events read in total (13532ms).
[19:26:59.810] <TB3> INFO: Expecting 655360 events.
[19:27:13.876] <TB3> INFO: 655360 events read in total (13663ms).
[19:27:13.946] <TB3> INFO: Expecting 655360 events.
[19:27:27.948] <TB3> INFO: 655360 events read in total (13599ms).
[19:27:28.048] <TB3> INFO: Test took 223215ms.
[19:27:28.223] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.228] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.232] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.237] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[19:27:28.241] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[19:27:28.246] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[19:27:28.250] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[19:27:28.255] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[19:27:28.259] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[19:27:28.263] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[19:27:28.268] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[19:27:28.272] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.277] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.282] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.286] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[19:27:28.291] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.295] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.300] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.304] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.309] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.313] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.318] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.322] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.327] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.332] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.336] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.341] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.345] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.350] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.354] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.359] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.363] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.368] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.372] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.376] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:28.381] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:28.385] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:27:28.418] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:27:28.419] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:27:28.654] <TB3> INFO: Expecting 41600 events.
[19:27:31.765] <TB3> INFO: 41600 events read in total (2520ms).
[19:27:31.766] <TB3> INFO: Test took 3344ms.
[19:27:32.210] <TB3> INFO: Expecting 41600 events.
[19:27:35.201] <TB3> INFO: 41600 events read in total (2400ms).
[19:27:35.202] <TB3> INFO: Test took 3224ms.
[19:27:35.671] <TB3> INFO: Expecting 41600 events.
[19:27:38.790] <TB3> INFO: 41600 events read in total (2528ms).
[19:27:38.791] <TB3> INFO: Test took 3375ms.
[19:27:39.007] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:39.095] <TB3> INFO: Expecting 2560 events.
[19:27:39.980] <TB3> INFO: 2560 events read in total (293ms).
[19:27:39.980] <TB3> INFO: Test took 973ms.
[19:27:39.982] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:40.289] <TB3> INFO: Expecting 2560 events.
[19:27:41.174] <TB3> INFO: 2560 events read in total (294ms).
[19:27:41.174] <TB3> INFO: Test took 1193ms.
[19:27:41.176] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:41.483] <TB3> INFO: Expecting 2560 events.
[19:27:42.368] <TB3> INFO: 2560 events read in total (293ms).
[19:27:42.368] <TB3> INFO: Test took 1192ms.
[19:27:42.370] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:42.677] <TB3> INFO: Expecting 2560 events.
[19:27:43.561] <TB3> INFO: 2560 events read in total (293ms).
[19:27:43.562] <TB3> INFO: Test took 1192ms.
[19:27:43.563] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:43.869] <TB3> INFO: Expecting 2560 events.
[19:27:44.756] <TB3> INFO: 2560 events read in total (295ms).
[19:27:44.757] <TB3> INFO: Test took 1194ms.
[19:27:44.758] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:45.065] <TB3> INFO: Expecting 2560 events.
[19:27:45.951] <TB3> INFO: 2560 events read in total (294ms).
[19:27:45.952] <TB3> INFO: Test took 1194ms.
[19:27:45.954] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:46.260] <TB3> INFO: Expecting 2560 events.
[19:27:47.142] <TB3> INFO: 2560 events read in total (291ms).
[19:27:47.143] <TB3> INFO: Test took 1189ms.
[19:27:47.145] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:47.451] <TB3> INFO: Expecting 2560 events.
[19:27:48.338] <TB3> INFO: 2560 events read in total (295ms).
[19:27:48.338] <TB3> INFO: Test took 1193ms.
[19:27:48.340] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:48.647] <TB3> INFO: Expecting 2560 events.
[19:27:49.526] <TB3> INFO: 2560 events read in total (288ms).
[19:27:49.526] <TB3> INFO: Test took 1186ms.
[19:27:49.528] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:49.834] <TB3> INFO: Expecting 2560 events.
[19:27:50.713] <TB3> INFO: 2560 events read in total (287ms).
[19:27:50.713] <TB3> INFO: Test took 1186ms.
[19:27:50.715] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:51.029] <TB3> INFO: Expecting 2560 events.
[19:27:51.910] <TB3> INFO: 2560 events read in total (290ms).
[19:27:51.910] <TB3> INFO: Test took 1195ms.
[19:27:51.912] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:52.218] <TB3> INFO: Expecting 2560 events.
[19:27:53.097] <TB3> INFO: 2560 events read in total (287ms).
[19:27:53.097] <TB3> INFO: Test took 1185ms.
[19:27:53.099] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:53.405] <TB3> INFO: Expecting 2560 events.
[19:27:54.287] <TB3> INFO: 2560 events read in total (290ms).
[19:27:54.287] <TB3> INFO: Test took 1188ms.
[19:27:54.289] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:54.596] <TB3> INFO: Expecting 2560 events.
[19:27:55.477] <TB3> INFO: 2560 events read in total (290ms).
[19:27:55.477] <TB3> INFO: Test took 1188ms.
[19:27:55.478] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:55.785] <TB3> INFO: Expecting 2560 events.
[19:27:56.667] <TB3> INFO: 2560 events read in total (290ms).
[19:27:56.667] <TB3> INFO: Test took 1189ms.
[19:27:56.669] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:56.975] <TB3> INFO: Expecting 2560 events.
[19:27:57.857] <TB3> INFO: 2560 events read in total (290ms).
[19:27:57.857] <TB3> INFO: Test took 1188ms.
[19:27:57.859] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:58.166] <TB3> INFO: Expecting 2560 events.
[19:27:59.045] <TB3> INFO: 2560 events read in total (288ms).
[19:27:59.045] <TB3> INFO: Test took 1186ms.
[19:27:59.047] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:59.354] <TB3> INFO: Expecting 2560 events.
[19:28:00.233] <TB3> INFO: 2560 events read in total (288ms).
[19:28:00.233] <TB3> INFO: Test took 1186ms.
[19:28:00.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:00.541] <TB3> INFO: Expecting 2560 events.
[19:28:01.421] <TB3> INFO: 2560 events read in total (288ms).
[19:28:01.421] <TB3> INFO: Test took 1186ms.
[19:28:01.423] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:01.729] <TB3> INFO: Expecting 2560 events.
[19:28:02.608] <TB3> INFO: 2560 events read in total (287ms).
[19:28:02.608] <TB3> INFO: Test took 1185ms.
[19:28:02.610] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:02.917] <TB3> INFO: Expecting 2560 events.
[19:28:03.795] <TB3> INFO: 2560 events read in total (287ms).
[19:28:03.795] <TB3> INFO: Test took 1185ms.
[19:28:03.797] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:04.103] <TB3> INFO: Expecting 2560 events.
[19:28:04.988] <TB3> INFO: 2560 events read in total (288ms).
[19:28:04.988] <TB3> INFO: Test took 1191ms.
[19:28:04.990] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:05.297] <TB3> INFO: Expecting 2560 events.
[19:28:06.176] <TB3> INFO: 2560 events read in total (288ms).
[19:28:06.176] <TB3> INFO: Test took 1186ms.
[19:28:06.179] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:06.484] <TB3> INFO: Expecting 2560 events.
[19:28:07.367] <TB3> INFO: 2560 events read in total (291ms).
[19:28:07.367] <TB3> INFO: Test took 1189ms.
[19:28:07.369] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:07.675] <TB3> INFO: Expecting 2560 events.
[19:28:08.561] <TB3> INFO: 2560 events read in total (294ms).
[19:28:08.562] <TB3> INFO: Test took 1193ms.
[19:28:08.564] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:08.870] <TB3> INFO: Expecting 2560 events.
[19:28:09.753] <TB3> INFO: 2560 events read in total (292ms).
[19:28:09.754] <TB3> INFO: Test took 1191ms.
[19:28:09.756] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:10.062] <TB3> INFO: Expecting 2560 events.
[19:28:10.945] <TB3> INFO: 2560 events read in total (291ms).
[19:28:10.945] <TB3> INFO: Test took 1189ms.
[19:28:10.947] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:11.254] <TB3> INFO: Expecting 2560 events.
[19:28:12.140] <TB3> INFO: 2560 events read in total (294ms).
[19:28:12.140] <TB3> INFO: Test took 1193ms.
[19:28:12.142] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:12.449] <TB3> INFO: Expecting 2560 events.
[19:28:13.333] <TB3> INFO: 2560 events read in total (293ms).
[19:28:13.333] <TB3> INFO: Test took 1191ms.
[19:28:13.335] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:13.641] <TB3> INFO: Expecting 2560 events.
[19:28:14.524] <TB3> INFO: 2560 events read in total (291ms).
[19:28:14.524] <TB3> INFO: Test took 1189ms.
[19:28:14.526] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:14.832] <TB3> INFO: Expecting 2560 events.
[19:28:15.719] <TB3> INFO: 2560 events read in total (295ms).
[19:28:15.719] <TB3> INFO: Test took 1193ms.
[19:28:15.721] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:16.028] <TB3> INFO: Expecting 2560 events.
[19:28:16.914] <TB3> INFO: 2560 events read in total (295ms).
[19:28:16.914] <TB3> INFO: Test took 1193ms.
[19:28:17.376] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 631 seconds
[19:28:17.376] <TB3> INFO: PH scale (per ROC): 49 36 43 51 46 45 50 48 31 54 36 52 35 40 42 36
[19:28:17.376] <TB3> INFO: PH offset (per ROC): 103 110 104 122 109 116 120 109 103 122 108 122 102 109 102 97
[19:28:17.381] <TB3> INFO: Decoding statistics:
[19:28:17.381] <TB3> INFO: General information:
[19:28:17.381] <TB3> INFO: 16bit words read: 127826
[19:28:17.381] <TB3> INFO: valid events total: 20480
[19:28:17.381] <TB3> INFO: empty events: 18007
[19:28:17.381] <TB3> INFO: valid events with pixels: 2473
[19:28:17.381] <TB3> INFO: valid pixel hits: 2473
[19:28:17.381] <TB3> INFO: Event errors: 0
[19:28:17.381] <TB3> INFO: start marker: 0
[19:28:17.381] <TB3> INFO: stop marker: 0
[19:28:17.381] <TB3> INFO: overflow: 0
[19:28:17.381] <TB3> INFO: invalid 5bit words: 0
[19:28:17.381] <TB3> INFO: invalid XOR eye diagram: 0
[19:28:17.381] <TB3> INFO: frame (failed synchr.): 0
[19:28:17.381] <TB3> INFO: idle data (no TBM trl): 0
[19:28:17.381] <TB3> INFO: no data (only TBM hdr): 0
[19:28:17.381] <TB3> INFO: TBM errors: 0
[19:28:17.381] <TB3> INFO: flawed TBM headers: 0
[19:28:17.381] <TB3> INFO: flawed TBM trailers: 0
[19:28:17.381] <TB3> INFO: event ID mismatches: 0
[19:28:17.381] <TB3> INFO: ROC errors: 0
[19:28:17.381] <TB3> INFO: missing ROC header(s): 0
[19:28:17.381] <TB3> INFO: misplaced readback start: 0
[19:28:17.381] <TB3> INFO: Pixel decoding errors: 0
[19:28:17.381] <TB3> INFO: pixel data incomplete: 0
[19:28:17.381] <TB3> INFO: pixel address: 0
[19:28:17.381] <TB3> INFO: pulse height fill bit: 0
[19:28:17.381] <TB3> INFO: buffer corruption: 0
[19:28:17.649] <TB3> INFO: ######################################################################
[19:28:17.649] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:28:17.649] <TB3> INFO: ######################################################################
[19:28:17.661] <TB3> INFO: scanning low vcal = 10
[19:28:17.937] <TB3> INFO: Expecting 41600 events.
[19:28:21.493] <TB3> INFO: 41600 events read in total (2965ms).
[19:28:21.493] <TB3> INFO: Test took 3832ms.
[19:28:21.495] <TB3> INFO: scanning low vcal = 20
[19:28:21.794] <TB3> INFO: Expecting 41600 events.
[19:28:25.345] <TB3> INFO: 41600 events read in total (2960ms).
[19:28:25.346] <TB3> INFO: Test took 3851ms.
[19:28:25.347] <TB3> INFO: scanning low vcal = 30
[19:28:25.646] <TB3> INFO: Expecting 41600 events.
[19:28:29.285] <TB3> INFO: 41600 events read in total (3047ms).
[19:28:29.286] <TB3> INFO: Test took 3939ms.
[19:28:29.288] <TB3> INFO: scanning low vcal = 40
[19:28:29.565] <TB3> INFO: Expecting 41600 events.
[19:28:33.479] <TB3> INFO: 41600 events read in total (3322ms).
[19:28:33.480] <TB3> INFO: Test took 4191ms.
[19:28:33.483] <TB3> INFO: scanning low vcal = 50
[19:28:33.759] <TB3> INFO: Expecting 41600 events.
[19:28:37.701] <TB3> INFO: 41600 events read in total (3350ms).
[19:28:37.701] <TB3> INFO: Test took 4218ms.
[19:28:37.704] <TB3> INFO: scanning low vcal = 60
[19:28:37.981] <TB3> INFO: Expecting 41600 events.
[19:28:41.975] <TB3> INFO: 41600 events read in total (3403ms).
[19:28:41.976] <TB3> INFO: Test took 4272ms.
[19:28:41.978] <TB3> INFO: scanning low vcal = 70
[19:28:42.255] <TB3> INFO: Expecting 41600 events.
[19:28:46.198] <TB3> INFO: 41600 events read in total (3351ms).
[19:28:46.199] <TB3> INFO: Test took 4221ms.
[19:28:46.201] <TB3> INFO: scanning low vcal = 80
[19:28:46.478] <TB3> INFO: Expecting 41600 events.
[19:28:50.395] <TB3> INFO: 41600 events read in total (3326ms).
[19:28:50.396] <TB3> INFO: Test took 4195ms.
[19:28:50.399] <TB3> INFO: scanning low vcal = 90
[19:28:50.675] <TB3> INFO: Expecting 41600 events.
[19:28:54.660] <TB3> INFO: 41600 events read in total (3393ms).
[19:28:54.661] <TB3> INFO: Test took 4262ms.
[19:28:54.663] <TB3> INFO: scanning low vcal = 100
[19:28:54.940] <TB3> INFO: Expecting 41600 events.
[19:28:58.871] <TB3> INFO: 41600 events read in total (3339ms).
[19:28:58.872] <TB3> INFO: Test took 4209ms.
[19:28:58.875] <TB3> INFO: scanning low vcal = 110
[19:28:59.151] <TB3> INFO: Expecting 41600 events.
[19:29:03.067] <TB3> INFO: 41600 events read in total (3324ms).
[19:29:03.068] <TB3> INFO: Test took 4193ms.
[19:29:03.071] <TB3> INFO: scanning low vcal = 120
[19:29:03.347] <TB3> INFO: Expecting 41600 events.
[19:29:07.312] <TB3> INFO: 41600 events read in total (3373ms).
[19:29:07.313] <TB3> INFO: Test took 4242ms.
[19:29:07.315] <TB3> INFO: scanning low vcal = 130
[19:29:07.592] <TB3> INFO: Expecting 41600 events.
[19:29:11.510] <TB3> INFO: 41600 events read in total (3327ms).
[19:29:11.511] <TB3> INFO: Test took 4195ms.
[19:29:11.514] <TB3> INFO: scanning low vcal = 140
[19:29:11.790] <TB3> INFO: Expecting 41600 events.
[19:29:15.706] <TB3> INFO: 41600 events read in total (3324ms).
[19:29:15.706] <TB3> INFO: Test took 4192ms.
[19:29:15.709] <TB3> INFO: scanning low vcal = 150
[19:29:15.986] <TB3> INFO: Expecting 41600 events.
[19:29:19.942] <TB3> INFO: 41600 events read in total (3365ms).
[19:29:19.943] <TB3> INFO: Test took 4234ms.
[19:29:19.946] <TB3> INFO: scanning low vcal = 160
[19:29:20.222] <TB3> INFO: Expecting 41600 events.
[19:29:24.170] <TB3> INFO: 41600 events read in total (3356ms).
[19:29:24.170] <TB3> INFO: Test took 4224ms.
[19:29:24.173] <TB3> INFO: scanning low vcal = 170
[19:29:24.450] <TB3> INFO: Expecting 41600 events.
[19:29:28.423] <TB3> INFO: 41600 events read in total (3382ms).
[19:29:28.424] <TB3> INFO: Test took 4251ms.
[19:29:28.426] <TB3> INFO: scanning low vcal = 180
[19:29:28.703] <TB3> INFO: Expecting 41600 events.
[19:29:32.618] <TB3> INFO: 41600 events read in total (3323ms).
[19:29:32.619] <TB3> INFO: Test took 4192ms.
[19:29:32.621] <TB3> INFO: scanning low vcal = 190
[19:29:32.898] <TB3> INFO: Expecting 41600 events.
[19:29:36.846] <TB3> INFO: 41600 events read in total (3356ms).
[19:29:36.847] <TB3> INFO: Test took 4225ms.
[19:29:36.849] <TB3> INFO: scanning low vcal = 200
[19:29:37.126] <TB3> INFO: Expecting 41600 events.
[19:29:41.085] <TB3> INFO: 41600 events read in total (3368ms).
[19:29:41.086] <TB3> INFO: Test took 4237ms.
[19:29:41.088] <TB3> INFO: scanning low vcal = 210
[19:29:41.365] <TB3> INFO: Expecting 41600 events.
[19:29:45.322] <TB3> INFO: 41600 events read in total (3365ms).
[19:29:45.323] <TB3> INFO: Test took 4234ms.
[19:29:45.325] <TB3> INFO: scanning low vcal = 220
[19:29:45.602] <TB3> INFO: Expecting 41600 events.
[19:29:49.557] <TB3> INFO: 41600 events read in total (3364ms).
[19:29:49.557] <TB3> INFO: Test took 4232ms.
[19:29:49.560] <TB3> INFO: scanning low vcal = 230
[19:29:49.836] <TB3> INFO: Expecting 41600 events.
[19:29:53.776] <TB3> INFO: 41600 events read in total (3348ms).
[19:29:53.776] <TB3> INFO: Test took 4216ms.
[19:29:53.779] <TB3> INFO: scanning low vcal = 240
[19:29:54.056] <TB3> INFO: Expecting 41600 events.
[19:29:58.053] <TB3> INFO: 41600 events read in total (3406ms).
[19:29:58.054] <TB3> INFO: Test took 4275ms.
[19:29:58.056] <TB3> INFO: scanning low vcal = 250
[19:29:58.333] <TB3> INFO: Expecting 41600 events.
[19:30:02.312] <TB3> INFO: 41600 events read in total (3387ms).
[19:30:02.313] <TB3> INFO: Test took 4257ms.
[19:30:02.317] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[19:30:02.593] <TB3> INFO: Expecting 41600 events.
[19:30:06.571] <TB3> INFO: 41600 events read in total (3387ms).
[19:30:06.572] <TB3> INFO: Test took 4255ms.
[19:30:06.575] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[19:30:06.851] <TB3> INFO: Expecting 41600 events.
[19:30:10.815] <TB3> INFO: 41600 events read in total (3372ms).
[19:30:10.816] <TB3> INFO: Test took 4241ms.
[19:30:10.818] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[19:30:11.095] <TB3> INFO: Expecting 41600 events.
[19:30:15.063] <TB3> INFO: 41600 events read in total (3376ms).
[19:30:15.064] <TB3> INFO: Test took 4245ms.
[19:30:15.067] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[19:30:15.344] <TB3> INFO: Expecting 41600 events.
[19:30:19.270] <TB3> INFO: 41600 events read in total (3335ms).
[19:30:19.271] <TB3> INFO: Test took 4204ms.
[19:30:19.273] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:30:19.550] <TB3> INFO: Expecting 41600 events.
[19:30:23.506] <TB3> INFO: 41600 events read in total (3364ms).
[19:30:23.508] <TB3> INFO: Test took 4234ms.
[19:30:24.026] <TB3> INFO: PixTestGainPedestal::measure() done
[19:31:03.125] <TB3> INFO: PixTestGainPedestal::fit() done
[19:31:03.125] <TB3> INFO: non-linearity mean: 0.974 0.930 0.960 0.979 0.946 0.954 0.975 0.970 0.960 0.984 0.927 0.981 0.967 0.896 0.947 0.960
[19:31:03.125] <TB3> INFO: non-linearity RMS: 0.009 0.093 0.039 0.003 0.059 0.049 0.009 0.009 0.188 0.003 0.178 0.003 0.184 0.118 0.043 0.171
[19:31:03.126] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[19:31:03.140] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[19:31:03.154] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[19:31:03.167] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[19:31:03.181] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[19:31:03.194] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[19:31:03.212] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[19:31:03.231] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[19:31:03.249] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[19:31:03.268] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[19:31:03.287] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[19:31:03.307] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[19:31:03.326] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[19:31:03.345] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[19:31:03.364] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[19:31:03.386] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[19:31:03.405] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 165 seconds
[19:31:03.405] <TB3> INFO: Decoding statistics:
[19:31:03.405] <TB3> INFO: General information:
[19:31:03.405] <TB3> INFO: 16bit words read: 3289262
[19:31:03.405] <TB3> INFO: valid events total: 332800
[19:31:03.405] <TB3> INFO: empty events: 2720
[19:31:03.405] <TB3> INFO: valid events with pixels: 330080
[19:31:03.405] <TB3> INFO: valid pixel hits: 646231
[19:31:03.405] <TB3> INFO: Event errors: 0
[19:31:03.405] <TB3> INFO: start marker: 0
[19:31:03.405] <TB3> INFO: stop marker: 0
[19:31:03.405] <TB3> INFO: overflow: 0
[19:31:03.405] <TB3> INFO: invalid 5bit words: 0
[19:31:03.405] <TB3> INFO: invalid XOR eye diagram: 0
[19:31:03.405] <TB3> INFO: frame (failed synchr.): 0
[19:31:03.405] <TB3> INFO: idle data (no TBM trl): 0
[19:31:03.405] <TB3> INFO: no data (only TBM hdr): 0
[19:31:03.405] <TB3> INFO: TBM errors: 0
[19:31:03.405] <TB3> INFO: flawed TBM headers: 0
[19:31:03.405] <TB3> INFO: flawed TBM trailers: 0
[19:31:03.405] <TB3> INFO: event ID mismatches: 0
[19:31:03.405] <TB3> INFO: ROC errors: 0
[19:31:03.405] <TB3> INFO: missing ROC header(s): 0
[19:31:03.405] <TB3> INFO: misplaced readback start: 0
[19:31:03.405] <TB3> INFO: Pixel decoding errors: 0
[19:31:03.405] <TB3> INFO: pixel data incomplete: 0
[19:31:03.405] <TB3> INFO: pixel address: 0
[19:31:03.405] <TB3> INFO: pulse height fill bit: 0
[19:31:03.405] <TB3> INFO: buffer corruption: 0
[19:31:03.425] <TB3> INFO: Decoding statistics:
[19:31:03.425] <TB3> INFO: General information:
[19:31:03.425] <TB3> INFO: 16bit words read: 3418624
[19:31:03.425] <TB3> INFO: valid events total: 353536
[19:31:03.425] <TB3> INFO: empty events: 20983
[19:31:03.425] <TB3> INFO: valid events with pixels: 332553
[19:31:03.425] <TB3> INFO: valid pixel hits: 648704
[19:31:03.425] <TB3> INFO: Event errors: 0
[19:31:03.425] <TB3> INFO: start marker: 0
[19:31:03.425] <TB3> INFO: stop marker: 0
[19:31:03.425] <TB3> INFO: overflow: 0
[19:31:03.425] <TB3> INFO: invalid 5bit words: 0
[19:31:03.425] <TB3> INFO: invalid XOR eye diagram: 0
[19:31:03.425] <TB3> INFO: frame (failed synchr.): 0
[19:31:03.425] <TB3> INFO: idle data (no TBM trl): 0
[19:31:03.425] <TB3> INFO: no data (only TBM hdr): 0
[19:31:03.425] <TB3> INFO: TBM errors: 0
[19:31:03.425] <TB3> INFO: flawed TBM headers: 0
[19:31:03.425] <TB3> INFO: flawed TBM trailers: 0
[19:31:03.425] <TB3> INFO: event ID mismatches: 0
[19:31:03.425] <TB3> INFO: ROC errors: 0
[19:31:03.425] <TB3> INFO: missing ROC header(s): 0
[19:31:03.425] <TB3> INFO: misplaced readback start: 0
[19:31:03.425] <TB3> INFO: Pixel decoding errors: 0
[19:31:03.425] <TB3> INFO: pixel data incomplete: 0
[19:31:03.425] <TB3> INFO: pixel address: 0
[19:31:03.425] <TB3> INFO: pulse height fill bit: 0
[19:31:03.425] <TB3> INFO: buffer corruption: 0
[19:31:03.425] <TB3> INFO: enter test to run
[19:31:03.425] <TB3> INFO: test: Trim80 no parameter change
[19:31:03.425] <TB3> INFO: running: trim80
[19:31:03.448] <TB3> INFO: ######################################################################
[19:31:03.448] <TB3> INFO: PixTestTrim80::doTest()
[19:31:03.448] <TB3> INFO: ######################################################################
[19:31:03.449] <TB3> INFO: ----------------------------------------------------------------------
[19:31:03.449] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[19:31:03.449] <TB3> INFO: ----------------------------------------------------------------------
[19:31:03.489] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:31:03.489] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:31:03.499] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:31:03.499] <TB3> INFO: run 1 of 1
[19:31:03.734] <TB3> INFO: Expecting 5025280 events.
[19:31:31.209] <TB3> INFO: 681256 events read in total (26884ms).
[19:31:57.979] <TB3> INFO: 1358888 events read in total (53654ms).
[19:32:24.828] <TB3> INFO: 2035824 events read in total (80503ms).
[19:32:51.409] <TB3> INFO: 2710816 events read in total (107084ms).
[19:33:18.547] <TB3> INFO: 3383984 events read in total (134222ms).
[19:33:45.255] <TB3> INFO: 4056128 events read in total (160930ms).
[19:34:11.922] <TB3> INFO: 4728840 events read in total (187597ms).
[19:34:24.077] <TB3> INFO: 5025280 events read in total (199752ms).
[19:34:24.137] <TB3> INFO: Test took 200638ms.
[19:34:48.928] <TB3> INFO: ROC 0 VthrComp = 73
[19:34:48.929] <TB3> INFO: ROC 1 VthrComp = 87
[19:34:48.929] <TB3> INFO: ROC 2 VthrComp = 67
[19:34:48.929] <TB3> INFO: ROC 3 VthrComp = 78
[19:34:48.929] <TB3> INFO: ROC 4 VthrComp = 72
[19:34:48.930] <TB3> INFO: ROC 5 VthrComp = 81
[19:34:48.930] <TB3> INFO: ROC 6 VthrComp = 71
[19:34:48.930] <TB3> INFO: ROC 7 VthrComp = 85
[19:34:48.930] <TB3> INFO: ROC 8 VthrComp = 74
[19:34:48.930] <TB3> INFO: ROC 9 VthrComp = 70
[19:34:48.930] <TB3> INFO: ROC 10 VthrComp = 80
[19:34:48.931] <TB3> INFO: ROC 11 VthrComp = 81
[19:34:48.931] <TB3> INFO: ROC 12 VthrComp = 77
[19:34:48.931] <TB3> INFO: ROC 13 VthrComp = 74
[19:34:48.932] <TB3> INFO: ROC 14 VthrComp = 75
[19:34:48.932] <TB3> INFO: ROC 15 VthrComp = 82
[19:34:49.166] <TB3> INFO: Expecting 41600 events.
[19:34:52.615] <TB3> INFO: 41600 events read in total (2857ms).
[19:34:52.616] <TB3> INFO: Test took 3683ms.
[19:34:52.624] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:34:52.625] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:34:52.634] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:34:52.634] <TB3> INFO: run 1 of 1
[19:34:52.911] <TB3> INFO: Expecting 5025280 events.
[19:35:20.464] <TB3> INFO: 680320 events read in total (26961ms).
[19:35:47.417] <TB3> INFO: 1358680 events read in total (53914ms).
[19:36:13.962] <TB3> INFO: 2035680 events read in total (80459ms).
[19:36:40.690] <TB3> INFO: 2710640 events read in total (107187ms).
[19:37:07.575] <TB3> INFO: 3382944 events read in total (134072ms).
[19:37:34.737] <TB3> INFO: 4054432 events read in total (161234ms).
[19:38:01.420] <TB3> INFO: 4724376 events read in total (187917ms).
[19:38:13.739] <TB3> INFO: 5025280 events read in total (200236ms).
[19:38:13.800] <TB3> INFO: Test took 201166ms.
[19:38:38.067] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 109.761 for pixel 3/76 mean/min/max = 93.0879/76.3034/109.872
[19:38:38.068] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 110.328 for pixel 0/79 mean/min/max = 91.8287/73.3141/110.343
[19:38:38.068] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 106.374 for pixel 0/6 mean/min/max = 90.3793/74.3727/106.386
[19:38:38.069] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 111.123 for pixel 0/15 mean/min/max = 94.2486/77.1967/111.301
[19:38:38.069] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 105.953 for pixel 2/79 mean/min/max = 91.8858/77.7293/106.042
[19:38:38.069] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 108.114 for pixel 0/21 mean/min/max = 91.5276/74.5821/108.473
[19:38:38.070] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 103.353 for pixel 14/79 mean/min/max = 88.6847/73.7279/103.641
[19:38:38.070] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 104.99 for pixel 1/77 mean/min/max = 89.9871/74.9775/104.997
[19:38:38.071] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 108.255 for pixel 0/71 mean/min/max = 93.4941/78.709/108.279
[19:38:38.071] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 106.053 for pixel 4/20 mean/min/max = 90.2543/74.4472/106.061
[19:38:38.071] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 109.181 for pixel 0/74 mean/min/max = 91.8967/74.5382/109.255
[19:38:38.072] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 106.409 for pixel 51/61 mean/min/max = 91.0188/75.6021/106.436
[19:38:38.072] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 109.126 for pixel 51/64 mean/min/max = 93.3725/77.5542/109.191
[19:38:38.073] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 107.083 for pixel 36/70 mean/min/max = 92.4882/77.7441/107.232
[19:38:38.073] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 111.43 for pixel 13/15 mean/min/max = 94.65/77.6325/111.668
[19:38:38.073] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 108.156 for pixel 22/74 mean/min/max = 91.3828/74.5439/108.222
[19:38:38.074] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:38:38.162] <TB3> INFO: Expecting 411648 events.
[19:38:47.477] <TB3> INFO: 411648 events read in total (8723ms).
[19:38:47.484] <TB3> INFO: Expecting 411648 events.
[19:38:56.483] <TB3> INFO: 411648 events read in total (8596ms).
[19:38:56.493] <TB3> INFO: Expecting 411648 events.
[19:39:05.623] <TB3> INFO: 411648 events read in total (8727ms).
[19:39:05.639] <TB3> INFO: Expecting 411648 events.
[19:39:14.696] <TB3> INFO: 411648 events read in total (8654ms).
[19:39:14.715] <TB3> INFO: Expecting 411648 events.
[19:39:23.689] <TB3> INFO: 411648 events read in total (8571ms).
[19:39:23.705] <TB3> INFO: Expecting 411648 events.
[19:39:32.692] <TB3> INFO: 411648 events read in total (8584ms).
[19:39:32.711] <TB3> INFO: Expecting 411648 events.
[19:39:41.646] <TB3> INFO: 411648 events read in total (8532ms).
[19:39:41.668] <TB3> INFO: Expecting 411648 events.
[19:39:50.623] <TB3> INFO: 411648 events read in total (8552ms).
[19:39:50.648] <TB3> INFO: Expecting 411648 events.
[19:39:59.649] <TB3> INFO: 411648 events read in total (8598ms).
[19:39:59.676] <TB3> INFO: Expecting 411648 events.
[19:40:08.611] <TB3> INFO: 411648 events read in total (8532ms).
[19:40:08.645] <TB3> INFO: Expecting 411648 events.
[19:40:17.691] <TB3> INFO: 411648 events read in total (8643ms).
[19:40:17.736] <TB3> INFO: Expecting 411648 events.
[19:40:26.724] <TB3> INFO: 411648 events read in total (8585ms).
[19:40:26.761] <TB3> INFO: Expecting 411648 events.
[19:40:35.834] <TB3> INFO: 411648 events read in total (8670ms).
[19:40:35.874] <TB3> INFO: Expecting 411648 events.
[19:40:44.950] <TB3> INFO: 411648 events read in total (8674ms).
[19:40:44.993] <TB3> INFO: Expecting 411648 events.
[19:40:53.966] <TB3> INFO: 411648 events read in total (8570ms).
[19:40:54.027] <TB3> INFO: Expecting 411648 events.
[19:41:03.060] <TB3> INFO: 411648 events read in total (8630ms).
[19:41:03.106] <TB3> INFO: Test took 145032ms.
[19:41:04.753] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:41:04.764] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:41:04.764] <TB3> INFO: run 1 of 1
[19:41:04.996] <TB3> INFO: Expecting 5025280 events.
[19:41:32.409] <TB3> INFO: 667888 events read in total (26821ms).
[19:41:59.422] <TB3> INFO: 1333104 events read in total (53834ms).
[19:42:25.729] <TB3> INFO: 1998272 events read in total (80141ms).
[19:42:52.570] <TB3> INFO: 2660760 events read in total (106982ms).
[19:43:19.173] <TB3> INFO: 3319080 events read in total (133585ms).
[19:43:45.504] <TB3> INFO: 3974248 events read in total (159916ms).
[19:44:11.725] <TB3> INFO: 4626704 events read in total (186137ms).
[19:44:27.945] <TB3> INFO: 5025280 events read in total (202357ms).
[19:44:27.997] <TB3> INFO: Test took 203234ms.
[19:44:52.642] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 51.511892 .. 95.847699
[19:44:52.882] <TB3> INFO: Expecting 208000 events.
[19:45:02.531] <TB3> INFO: 208000 events read in total (9057ms).
[19:45:02.532] <TB3> INFO: Test took 9888ms.
[19:45:02.580] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 41 .. 105 (-1/-1) hits flags = 528 (plus default)
[19:45:02.590] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:45:02.590] <TB3> INFO: run 1 of 1
[19:45:02.868] <TB3> INFO: Expecting 2163200 events.
[19:45:31.342] <TB3> INFO: 709960 events read in total (27882ms).
[19:45:58.655] <TB3> INFO: 1415960 events read in total (55195ms).
[19:46:26.222] <TB3> INFO: 2112256 events read in total (82762ms).
[19:46:28.764] <TB3> INFO: 2163200 events read in total (85304ms).
[19:46:28.800] <TB3> INFO: Test took 86210ms.
[19:46:47.405] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 61.853623 .. 86.703164
[19:46:47.646] <TB3> INFO: Expecting 208000 events.
[19:46:57.348] <TB3> INFO: 208000 events read in total (9110ms).
[19:46:57.348] <TB3> INFO: Test took 9941ms.
[19:46:57.400] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 96 (-1/-1) hits flags = 528 (plus default)
[19:46:57.411] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:46:57.411] <TB3> INFO: run 1 of 1
[19:46:57.689] <TB3> INFO: Expecting 1530880 events.
[19:47:26.430] <TB3> INFO: 720272 events read in total (28149ms).
[19:47:55.012] <TB3> INFO: 1438816 events read in total (56731ms).
[19:47:58.982] <TB3> INFO: 1530880 events read in total (60701ms).
[19:47:59.008] <TB3> INFO: Test took 61597ms.
[19:48:16.898] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 66.581980 .. 82.897555
[19:48:17.131] <TB3> INFO: Expecting 208000 events.
[19:48:26.684] <TB3> INFO: 208000 events read in total (8963ms).
[19:48:26.685] <TB3> INFO: Test took 9786ms.
[19:48:26.734] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 56 .. 92 (-1/-1) hits flags = 528 (plus default)
[19:48:26.746] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:48:26.746] <TB3> INFO: run 1 of 1
[19:48:27.024] <TB3> INFO: Expecting 1231360 events.
[19:48:56.267] <TB3> INFO: 729792 events read in total (28652ms).
[19:49:16.272] <TB3> INFO: 1231360 events read in total (48657ms).
[19:49:16.299] <TB3> INFO: Test took 49554ms.
[19:49:32.757] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 68.811329 .. 82.093128
[19:49:32.992] <TB3> INFO: Expecting 208000 events.
[19:49:42.524] <TB3> INFO: 208000 events read in total (8940ms).
[19:49:42.524] <TB3> INFO: Test took 9766ms.
[19:49:42.570] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 92 (-1/-1) hits flags = 528 (plus default)
[19:49:42.580] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:49:42.580] <TB3> INFO: run 1 of 1
[19:49:42.858] <TB3> INFO: Expecting 1164800 events.
[19:50:12.121] <TB3> INFO: 723080 events read in total (28671ms).
[19:50:29.744] <TB3> INFO: 1164800 events read in total (46294ms).
[19:50:29.768] <TB3> INFO: Test took 47188ms.
[19:50:45.451] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[19:50:45.451] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[19:50:45.462] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[19:50:45.462] <TB3> INFO: run 1 of 1
[19:50:45.738] <TB3> INFO: Expecting 1364480 events.
[19:51:14.179] <TB3> INFO: 669000 events read in total (27850ms).
[19:51:41.414] <TB3> INFO: 1337456 events read in total (55085ms).
[19:51:42.921] <TB3> INFO: 1364480 events read in total (56592ms).
[19:51:42.940] <TB3> INFO: Test took 57477ms.
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C0.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C1.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C2.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C3.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C4.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C5.dat
[19:52:01.130] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C6.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C7.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C8.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C9.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C10.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C11.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C12.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C13.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C14.dat
[19:52:01.131] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C15.dat
[19:52:01.131] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C0.dat
[19:52:01.139] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C1.dat
[19:52:01.147] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C2.dat
[19:52:01.155] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C3.dat
[19:52:01.163] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C4.dat
[19:52:01.171] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C5.dat
[19:52:01.179] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C6.dat
[19:52:01.188] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C7.dat
[19:52:01.196] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C8.dat
[19:52:01.204] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C9.dat
[19:52:01.211] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C10.dat
[19:52:01.218] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C11.dat
[19:52:01.225] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C12.dat
[19:52:01.231] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C13.dat
[19:52:01.236] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C14.dat
[19:52:01.242] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1115_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C15.dat
[19:52:01.247] <TB3> INFO: PixTestTrim80::trimTest() done
[19:52:01.247] <TB3> INFO: vtrim: 113 122 98 120 102 115 88 104 98 99 107 103 120 102 111 116
[19:52:01.247] <TB3> INFO: vthrcomp: 73 87 67 78 72 81 71 85 74 70 80 81 77 74 75 82
[19:52:01.247] <TB3> INFO: vcal mean: 80.05 80.00 79.90 79.99 79.98 80.00 79.96 79.98 80.02 79.97 79.97 79.96 80.00 80.02 79.99 80.05
[19:52:01.247] <TB3> INFO: vcal RMS: 0.88 0.82 1.44 0.80 0.70 0.81 0.75 0.77 0.79 0.75 0.77 0.85 0.83 0.77 0.80 0.87
[19:52:01.247] <TB3> INFO: bits mean: 10.31 10.26 10.56 9.45 9.28 10.55 10.64 10.35 9.75 10.27 9.93 10.65 9.95 10.00 9.48 10.64
[19:52:01.247] <TB3> INFO: bits RMS: 2.08 2.48 2.27 2.24 2.38 2.18 2.43 2.32 2.02 2.43 2.49 2.08 2.06 2.08 2.23 2.19
[19:52:01.253] <TB3> INFO: ----------------------------------------------------------------------
[19:52:01.253] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:52:01.253] <TB3> INFO: ----------------------------------------------------------------------
[19:52:01.256] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:52:01.267] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:52:01.267] <TB3> INFO: run 1 of 1
[19:52:01.497] <TB3> INFO: Expecting 4160000 events.
[19:52:34.715] <TB3> INFO: 771630 events read in total (32626ms).
[19:53:06.810] <TB3> INFO: 1537945 events read in total (64721ms).
[19:53:38.700] <TB3> INFO: 2299945 events read in total (96611ms).
[19:54:10.002] <TB3> INFO: 3056990 events read in total (128913ms).
[19:54:43.491] <TB3> INFO: 3808735 events read in total (161402ms).
[19:54:58.220] <TB3> INFO: 4160000 events read in total (176131ms).
[19:54:58.308] <TB3> INFO: Test took 177041ms.
[19:55:23.245] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[19:55:23.256] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:55:23.256] <TB3> INFO: run 1 of 1
[19:55:23.498] <TB3> INFO: Expecting 4326400 events.
[19:55:55.688] <TB3> INFO: 734360 events read in total (31599ms).
[19:56:26.754] <TB3> INFO: 1465225 events read in total (62665ms).
[19:56:57.715] <TB3> INFO: 2193270 events read in total (93626ms).
[19:57:28.834] <TB3> INFO: 2916250 events read in total (124745ms).
[19:58:00.175] <TB3> INFO: 3635595 events read in total (156086ms).
[19:58:29.561] <TB3> INFO: 4326400 events read in total (185472ms).
[19:58:29.665] <TB3> INFO: Test took 186408ms.
[19:58:56.550] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[19:58:56.560] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:58:56.560] <TB3> INFO: run 1 of 1
[19:58:56.792] <TB3> INFO: Expecting 4222400 events.
[19:59:29.564] <TB3> INFO: 741870 events read in total (32181ms).
[20:00:00.915] <TB3> INFO: 1479775 events read in total (63532ms).
[20:00:32.529] <TB3> INFO: 2214790 events read in total (95146ms).
[20:01:04.065] <TB3> INFO: 2944100 events read in total (126682ms).
[20:01:35.555] <TB3> INFO: 3669660 events read in total (158172ms).
[20:01:59.011] <TB3> INFO: 4222400 events read in total (181628ms).
[20:01:59.103] <TB3> INFO: Test took 182543ms.
[20:02:26.814] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[20:02:26.824] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:02:26.824] <TB3> INFO: run 1 of 1
[20:02:27.057] <TB3> INFO: Expecting 4222400 events.
[20:02:59.119] <TB3> INFO: 741990 events read in total (31470ms).
[20:03:30.529] <TB3> INFO: 1480090 events read in total (62880ms).
[20:04:01.777] <TB3> INFO: 2215055 events read in total (94128ms).
[20:04:33.078] <TB3> INFO: 2944755 events read in total (125429ms).
[20:05:04.463] <TB3> INFO: 3670750 events read in total (156814ms).
[20:05:28.086] <TB3> INFO: 4222400 events read in total (180437ms).
[20:05:28.179] <TB3> INFO: Test took 181354ms.
[20:05:54.628] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[20:05:54.638] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:05:54.639] <TB3> INFO: run 1 of 1
[20:05:54.881] <TB3> INFO: Expecting 4264000 events.
[20:06:26.309] <TB3> INFO: 739385 events read in total (30836ms).
[20:06:57.700] <TB3> INFO: 1474855 events read in total (62227ms).
[20:07:29.203] <TB3> INFO: 2207210 events read in total (93730ms).
[20:08:00.647] <TB3> INFO: 2934650 events read in total (125174ms).
[20:08:31.816] <TB3> INFO: 3658845 events read in total (156343ms).
[20:08:58.463] <TB3> INFO: 4264000 events read in total (182990ms).
[20:08:58.542] <TB3> INFO: Test took 183903ms.
[20:09:22.479] <TB3> INFO: PixTestTrim80::trimBitTest() done
[20:09:22.480] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2299 seconds
[20:09:23.111] <TB3> INFO: enter test to run
[20:09:23.111] <TB3> INFO: test: exit no parameter change
[20:09:23.207] <TB3> QUIET: Connection to board 170 closed.
[20:09:23.208] <TB3> INFO: pXar: this is the end, my friend