[18:07:59.799] <TB2> INFO: *** Welcome to pxar ***
[18:07:59.799] <TB2> INFO: *** Today: 2016/11/02
[18:07:59.805] <TB2> INFO: *** Version: c8ba-dirty
[18:07:59.805] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:07:59.806] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:07:59.806] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//defaultMaskFile.dat
[18:07:59.806] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters_C15.dat
[18:07:59.869] <TB2> INFO: clk: 4
[18:07:59.869] <TB2> INFO: ctr: 4
[18:07:59.869] <TB2> INFO: sda: 19
[18:07:59.869] <TB2> INFO: tin: 9
[18:07:59.869] <TB2> INFO: level: 15
[18:07:59.869] <TB2> INFO: triggerdelay: 0
[18:07:59.869] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[18:07:59.869] <TB2> INFO: Log level: INFO
[18:07:59.879] <TB2> INFO: Found DTB DTB_WXC55Z
[18:07:59.890] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[18:07:59.892] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[18:07:59.893] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[18:08:01.381] <TB2> INFO: DUT info:
[18:08:01.381] <TB2> INFO: The DUT currently contains the following objects:
[18:08:01.381] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[18:08:01.381] <TB2> INFO: TBM Core alpha (0): 7 registers set
[18:08:01.381] <TB2> INFO: TBM Core beta (1): 7 registers set
[18:08:01.381] <TB2> INFO: TBM Core alpha (2): 7 registers set
[18:08:01.381] <TB2> INFO: TBM Core beta (3): 7 registers set
[18:08:01.381] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[18:08:01.381] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.381] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:08:01.782] <TB2> INFO: enter 'restricted' command line mode
[18:08:01.782] <TB2> INFO: enter test to run
[18:08:01.782] <TB2> INFO: test: pretest no parameter change
[18:08:01.782] <TB2> INFO: running: pretest
[18:08:02.350] <TB2> INFO: ######################################################################
[18:08:02.350] <TB2> INFO: PixTestPretest::doTest()
[18:08:02.350] <TB2> INFO: ######################################################################
[18:08:02.351] <TB2> INFO: ----------------------------------------------------------------------
[18:08:02.351] <TB2> INFO: PixTestPretest::programROC()
[18:08:02.351] <TB2> INFO: ----------------------------------------------------------------------
[18:08:20.364] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:08:20.364] <TB2> INFO: IA differences per ROC: 17.7 18.5 20.9 18.5 18.5 16.9 16.9 20.9 20.1 21.7 18.5 19.3 18.5 20.1 19.3 17.7
[18:08:20.400] <TB2> INFO: ----------------------------------------------------------------------
[18:08:20.400] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:08:20.400] <TB2> INFO: ----------------------------------------------------------------------
[18:08:41.645] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[18:08:41.645] <TB2> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 20.1 19.3 19.3 19.3 18.5 19.3 19.3 20.1 18.5 18.5 18.5 17.7 19.3
[18:08:41.673] <TB2> INFO: ----------------------------------------------------------------------
[18:08:41.674] <TB2> INFO: PixTestPretest::findTiming()
[18:08:41.674] <TB2> INFO: ----------------------------------------------------------------------
[18:08:41.674] <TB2> INFO: PixTestCmd::init()

[18:09:12.972] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 3, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[18:09:12.972] <TB2> INFO: (success/tries = 100/100), width = 4
[18:09:14.483] <TB2> INFO: ----------------------------------------------------------------------
[18:09:14.483] <TB2> INFO: PixTestPretest::findWorkingPixel()
[18:09:14.483] <TB2> INFO: ----------------------------------------------------------------------
[18:09:14.574] <TB2> INFO: Expecting 231680 events.
[18:09:24.206] <TB2> INFO: 231680 events read in total (9040ms).
[18:09:24.218] <TB2> INFO: Test took 9733ms.
[18:09:24.464] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:09:24.493] <TB2> INFO: ----------------------------------------------------------------------
[18:09:24.493] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[18:09:24.493] <TB2> INFO: ----------------------------------------------------------------------
[18:09:24.585] <TB2> INFO: Expecting 231680 events.
[18:09:34.206] <TB2> INFO: 231680 events read in total (9029ms).
[18:09:34.216] <TB2> INFO: Test took 9720ms.
[18:09:34.473] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[18:09:34.473] <TB2> INFO: CalDel: 86 92 93 79 62 76 97 75 77 90 82 77 92 95 89 81
[18:09:34.473] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C0.dat
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C1.dat
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C2.dat
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C3.dat
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C4.dat
[18:09:34.476] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C5.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C6.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C7.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C8.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C9.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C10.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C11.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C12.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C13.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C14.dat
[18:09:34.477] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters_C15.dat
[18:09:34.477] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[18:09:34.477] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[18:09:34.477] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[18:09:34.478] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[18:09:34.478] <TB2> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[18:09:34.575] <TB2> INFO: enter test to run
[18:09:34.576] <TB2> INFO: test: fulltest no parameter change
[18:09:34.576] <TB2> INFO: running: fulltest
[18:09:34.576] <TB2> INFO: ######################################################################
[18:09:34.576] <TB2> INFO: PixTestFullTest::doTest()
[18:09:34.576] <TB2> INFO: ######################################################################
[18:09:34.577] <TB2> INFO: ######################################################################
[18:09:34.577] <TB2> INFO: PixTestAlive::doTest()
[18:09:34.577] <TB2> INFO: ######################################################################
[18:09:34.578] <TB2> INFO: ----------------------------------------------------------------------
[18:09:34.578] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:34.578] <TB2> INFO: ----------------------------------------------------------------------
[18:09:34.813] <TB2> INFO: Expecting 41600 events.
[18:09:38.353] <TB2> INFO: 41600 events read in total (2948ms).
[18:09:38.354] <TB2> INFO: Test took 3775ms.
[18:09:38.580] <TB2> INFO: PixTestAlive::aliveTest() done
[18:09:38.580] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0
[18:09:38.581] <TB2> INFO: ----------------------------------------------------------------------
[18:09:38.582] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:38.582] <TB2> INFO: ----------------------------------------------------------------------
[18:09:38.817] <TB2> INFO: Expecting 41600 events.
[18:09:41.733] <TB2> INFO: 41600 events read in total (2325ms).
[18:09:41.733] <TB2> INFO: Test took 3150ms.
[18:09:41.733] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:09:41.973] <TB2> INFO: PixTestAlive::maskTest() done
[18:09:41.974] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:09:41.975] <TB2> INFO: ----------------------------------------------------------------------
[18:09:41.975] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:09:41.975] <TB2> INFO: ----------------------------------------------------------------------
[18:09:42.216] <TB2> INFO: Expecting 41600 events.
[18:09:45.817] <TB2> INFO: 41600 events read in total (3009ms).
[18:09:45.818] <TB2> INFO: Test took 3842ms.
[18:09:46.045] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[18:09:46.045] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:09:46.045] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[18:09:46.045] <TB2> INFO: Decoding statistics:
[18:09:46.045] <TB2> INFO: General information:
[18:09:46.045] <TB2> INFO: 16bit words read: 0
[18:09:46.045] <TB2> INFO: valid events total: 0
[18:09:46.045] <TB2> INFO: empty events: 0
[18:09:46.045] <TB2> INFO: valid events with pixels: 0
[18:09:46.045] <TB2> INFO: valid pixel hits: 0
[18:09:46.045] <TB2> INFO: Event errors: 0
[18:09:46.045] <TB2> INFO: start marker: 0
[18:09:46.045] <TB2> INFO: stop marker: 0
[18:09:46.045] <TB2> INFO: overflow: 0
[18:09:46.045] <TB2> INFO: invalid 5bit words: 0
[18:09:46.045] <TB2> INFO: invalid XOR eye diagram: 0
[18:09:46.045] <TB2> INFO: frame (failed synchr.): 0
[18:09:46.045] <TB2> INFO: idle data (no TBM trl): 0
[18:09:46.045] <TB2> INFO: no data (only TBM hdr): 0
[18:09:46.045] <TB2> INFO: TBM errors: 0
[18:09:46.045] <TB2> INFO: flawed TBM headers: 0
[18:09:46.046] <TB2> INFO: flawed TBM trailers: 0
[18:09:46.046] <TB2> INFO: event ID mismatches: 0
[18:09:46.046] <TB2> INFO: ROC errors: 0
[18:09:46.046] <TB2> INFO: missing ROC header(s): 0
[18:09:46.046] <TB2> INFO: misplaced readback start: 0
[18:09:46.046] <TB2> INFO: Pixel decoding errors: 0
[18:09:46.046] <TB2> INFO: pixel data incomplete: 0
[18:09:46.046] <TB2> INFO: pixel address: 0
[18:09:46.046] <TB2> INFO: pulse height fill bit: 0
[18:09:46.046] <TB2> INFO: buffer corruption: 0
[18:09:46.052] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:09:46.053] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[18:09:46.053] <TB2> INFO: ######################################################################
[18:09:46.053] <TB2> INFO: PixTestReadback::doTest()
[18:09:46.053] <TB2> INFO: ######################################################################
[18:09:46.053] <TB2> INFO: ----------------------------------------------------------------------
[18:09:46.053] <TB2> INFO: PixTestReadback::CalibrateVd()
[18:09:46.053] <TB2> INFO: ----------------------------------------------------------------------
[18:09:56.016] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:09:56.016] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:09:56.016] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:09:56.016] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:09:56.016] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:09:56.017] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:09:56.045] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:09:56.045] <TB2> INFO: ----------------------------------------------------------------------
[18:09:56.045] <TB2> INFO: PixTestReadback::CalibrateVa()
[18:09:56.045] <TB2> INFO: ----------------------------------------------------------------------
[18:10:05.935] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:10:05.935] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:10:05.936] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:10:05.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:10:05.937] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:10:05.964] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:10:05.964] <TB2> INFO: ----------------------------------------------------------------------
[18:10:05.964] <TB2> INFO: PixTestReadback::readbackVbg()
[18:10:05.964] <TB2> INFO: ----------------------------------------------------------------------
[18:10:13.614] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:10:13.614] <TB2> INFO: ----------------------------------------------------------------------
[18:10:13.614] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[18:10:13.614] <TB2> INFO: ----------------------------------------------------------------------
[18:10:13.614] <TB2> INFO: Vbg will be calibrated using Vd calibration
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.8calibrated Vbg = 1.17967 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 148.4calibrated Vbg = 1.17499 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 164calibrated Vbg = 1.17169 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.9calibrated Vbg = 1.16705 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.3calibrated Vbg = 1.17035 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 166.2calibrated Vbg = 1.17581 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.3calibrated Vbg = 1.17818 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.5calibrated Vbg = 1.18202 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.4calibrated Vbg = 1.17257 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.4calibrated Vbg = 1.17451 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 160.9calibrated Vbg = 1.1658 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 149.7calibrated Vbg = 1.16088 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.9calibrated Vbg = 1.17807 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.3calibrated Vbg = 1.17394 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156calibrated Vbg = 1.17671 :::*/*/*/*/
[18:10:13.614] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 152.6calibrated Vbg = 1.1725 :::*/*/*/*/
[18:10:13.616] <TB2> INFO: ----------------------------------------------------------------------
[18:10:13.616] <TB2> INFO: PixTestReadback::CalibrateIa()
[18:10:13.616] <TB2> INFO: ----------------------------------------------------------------------
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C0.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C1.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C2.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C3.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C4.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C5.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C6.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C7.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C8.dat
[18:12:53.898] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C9.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C10.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C11.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C12.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C13.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C14.dat
[18:12:53.899] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//readbackCal_C15.dat
[18:12:53.925] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:12:53.926] <TB2> INFO: PixTestReadback::doTest() done
[18:12:53.926] <TB2> INFO: Decoding statistics:
[18:12:53.926] <TB2> INFO: General information:
[18:12:53.926] <TB2> INFO: 16bit words read: 1536
[18:12:53.926] <TB2> INFO: valid events total: 256
[18:12:53.926] <TB2> INFO: empty events: 256
[18:12:53.926] <TB2> INFO: valid events with pixels: 0
[18:12:53.926] <TB2> INFO: valid pixel hits: 0
[18:12:53.926] <TB2> INFO: Event errors: 0
[18:12:53.926] <TB2> INFO: start marker: 0
[18:12:53.926] <TB2> INFO: stop marker: 0
[18:12:53.926] <TB2> INFO: overflow: 0
[18:12:53.926] <TB2> INFO: invalid 5bit words: 0
[18:12:53.926] <TB2> INFO: invalid XOR eye diagram: 0
[18:12:53.926] <TB2> INFO: frame (failed synchr.): 0
[18:12:53.926] <TB2> INFO: idle data (no TBM trl): 0
[18:12:53.926] <TB2> INFO: no data (only TBM hdr): 0
[18:12:53.926] <TB2> INFO: TBM errors: 0
[18:12:53.926] <TB2> INFO: flawed TBM headers: 0
[18:12:53.926] <TB2> INFO: flawed TBM trailers: 0
[18:12:53.926] <TB2> INFO: event ID mismatches: 0
[18:12:53.926] <TB2> INFO: ROC errors: 0
[18:12:53.926] <TB2> INFO: missing ROC header(s): 0
[18:12:53.926] <TB2> INFO: misplaced readback start: 0
[18:12:53.926] <TB2> INFO: Pixel decoding errors: 0
[18:12:53.926] <TB2> INFO: pixel data incomplete: 0
[18:12:53.926] <TB2> INFO: pixel address: 0
[18:12:53.926] <TB2> INFO: pulse height fill bit: 0
[18:12:53.926] <TB2> INFO: buffer corruption: 0
[18:12:53.961] <TB2> INFO: ######################################################################
[18:12:53.961] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[18:12:53.961] <TB2> INFO: ######################################################################
[18:12:53.964] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[18:12:53.975] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[18:12:53.975] <TB2> INFO: run 1 of 1
[18:12:54.207] <TB2> INFO: Expecting 3120000 events.
[18:13:24.796] <TB2> INFO: 680020 events read in total (29997ms).











[18:13:54.528] <TB2> INFO: 1357080 events read in total (59729ms).











[18:14:24.170] <TB2> INFO: 2030275 events read in total (89371ms).











[18:14:53.964] <TB2> INFO: 2704215 events read in total (119165ms).











[18:15:13.068] <TB2> INFO: 3120000 events read in total (138269ms).
[18:15:13.136] <TB2> INFO: Test took 139162ms.
[18:15:40.618] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 166 seconds
[18:15:40.618] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
[18:15:40.618] <TB2> INFO: separation cut (per ROC): 104 106 111 100 110 122 103 117 121 124 126 110 103 105 103 108
[18:15:40.618] <TB2> INFO: Decoding statistics:
[18:15:40.618] <TB2> INFO: General information:
[18:15:40.618] <TB2> INFO: 16bit words read: 0
[18:15:40.618] <TB2> INFO: valid events total: 0
[18:15:40.618] <TB2> INFO: empty events: 0
[18:15:40.618] <TB2> INFO: valid events with pixels: 0
[18:15:40.618] <TB2> INFO: valid pixel hits: 0
[18:15:40.618] <TB2> INFO: Event errors: 0
[18:15:40.618] <TB2> INFO: start marker: 0
[18:15:40.618] <TB2> INFO: stop marker: 0
[18:15:40.618] <TB2> INFO: overflow: 0
[18:15:40.618] <TB2> INFO: invalid 5bit words: 0
[18:15:40.618] <TB2> INFO: invalid XOR eye diagram: 0
[18:15:40.618] <TB2> INFO: frame (failed synchr.): 0
[18:15:40.618] <TB2> INFO: idle data (no TBM trl): 0
[18:15:40.618] <TB2> INFO: no data (only TBM hdr): 0
[18:15:40.618] <TB2> INFO: TBM errors: 0
[18:15:40.618] <TB2> INFO: flawed TBM headers: 0
[18:15:40.618] <TB2> INFO: flawed TBM trailers: 0
[18:15:40.618] <TB2> INFO: event ID mismatches: 0
[18:15:40.618] <TB2> INFO: ROC errors: 0
[18:15:40.618] <TB2> INFO: missing ROC header(s): 0
[18:15:40.618] <TB2> INFO: misplaced readback start: 0
[18:15:40.618] <TB2> INFO: Pixel decoding errors: 0
[18:15:40.618] <TB2> INFO: pixel data incomplete: 0
[18:15:40.618] <TB2> INFO: pixel address: 0
[18:15:40.618] <TB2> INFO: pulse height fill bit: 0
[18:15:40.618] <TB2> INFO: buffer corruption: 0
[18:15:40.660] <TB2> INFO: ######################################################################
[18:15:40.660] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:15:40.660] <TB2> INFO: ######################################################################
[18:15:40.660] <TB2> INFO: ----------------------------------------------------------------------
[18:15:40.660] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:15:40.660] <TB2> INFO: ----------------------------------------------------------------------
[18:15:40.660] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[18:15:40.671] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[18:15:40.671] <TB2> INFO: run 1 of 1
[18:15:40.906] <TB2> INFO: Expecting 36608000 events.
[18:16:04.004] <TB2> INFO: 685550 events read in total (22507ms).
[18:16:26.583] <TB2> INFO: 1356050 events read in total (45086ms).
[18:16:49.144] <TB2> INFO: 2026800 events read in total (67647ms).
[18:17:11.532] <TB2> INFO: 2694650 events read in total (90035ms).
[18:17:33.810] <TB2> INFO: 3361450 events read in total (112313ms).
[18:17:56.528] <TB2> INFO: 4028450 events read in total (135031ms).
[18:18:18.860] <TB2> INFO: 4696200 events read in total (157363ms).
[18:18:41.509] <TB2> INFO: 5363550 events read in total (180012ms).
[18:19:03.899] <TB2> INFO: 6027950 events read in total (202402ms).
[18:19:26.515] <TB2> INFO: 6693300 events read in total (225018ms).
[18:19:48.872] <TB2> INFO: 7356600 events read in total (247375ms).
[18:20:11.296] <TB2> INFO: 8023200 events read in total (269799ms).
[18:20:33.564] <TB2> INFO: 8689700 events read in total (292067ms).
[18:20:55.875] <TB2> INFO: 9355800 events read in total (314378ms).
[18:21:18.263] <TB2> INFO: 10020600 events read in total (336766ms).
[18:21:40.753] <TB2> INFO: 10683300 events read in total (359256ms).
[18:22:03.174] <TB2> INFO: 11347100 events read in total (381677ms).
[18:22:25.511] <TB2> INFO: 12010400 events read in total (404014ms).
[18:22:47.631] <TB2> INFO: 12672850 events read in total (426134ms).
[18:23:09.852] <TB2> INFO: 13335850 events read in total (448355ms).
[18:23:32.274] <TB2> INFO: 13997550 events read in total (470777ms).
[18:23:54.821] <TB2> INFO: 14662100 events read in total (493324ms).
[18:24:17.260] <TB2> INFO: 15326850 events read in total (515763ms).
[18:24:39.954] <TB2> INFO: 15989500 events read in total (538457ms).
[18:25:02.382] <TB2> INFO: 16654300 events read in total (560885ms).
[18:25:24.623] <TB2> INFO: 17315450 events read in total (583126ms).
[18:25:47.046] <TB2> INFO: 17976500 events read in total (605549ms).
[18:26:09.375] <TB2> INFO: 18637600 events read in total (627878ms).
[18:26:31.600] <TB2> INFO: 19297200 events read in total (650103ms).
[18:26:53.870] <TB2> INFO: 19955850 events read in total (672373ms).
[18:27:16.312] <TB2> INFO: 20614200 events read in total (694815ms).
[18:27:38.657] <TB2> INFO: 21271150 events read in total (717160ms).
[18:28:00.982] <TB2> INFO: 21929400 events read in total (739485ms).
[18:28:23.740] <TB2> INFO: 22589050 events read in total (762243ms).
[18:28:45.929] <TB2> INFO: 23247700 events read in total (784432ms).
[18:29:08.294] <TB2> INFO: 23904600 events read in total (806797ms).
[18:29:30.482] <TB2> INFO: 24562400 events read in total (828985ms).
[18:29:52.609] <TB2> INFO: 25220500 events read in total (851112ms).
[18:30:14.934] <TB2> INFO: 25878750 events read in total (873437ms).
[18:30:37.213] <TB2> INFO: 26537000 events read in total (895716ms).
[18:30:59.379] <TB2> INFO: 27193650 events read in total (917882ms).
[18:31:21.490] <TB2> INFO: 27851150 events read in total (939993ms).
[18:31:43.517] <TB2> INFO: 28508700 events read in total (962020ms).
[18:32:05.835] <TB2> INFO: 29165250 events read in total (984338ms).
[18:32:28.050] <TB2> INFO: 29821850 events read in total (1006553ms).
[18:32:50.316] <TB2> INFO: 30478250 events read in total (1028819ms).
[18:33:12.393] <TB2> INFO: 31133150 events read in total (1050896ms).
[18:33:34.577] <TB2> INFO: 31791500 events read in total (1073080ms).
[18:33:56.780] <TB2> INFO: 32447250 events read in total (1095283ms).
[18:34:19.098] <TB2> INFO: 33104500 events read in total (1117601ms).
[18:34:41.392] <TB2> INFO: 33760600 events read in total (1139895ms).
[18:35:03.734] <TB2> INFO: 34418550 events read in total (1162237ms).
[18:35:25.992] <TB2> INFO: 35075100 events read in total (1184495ms).
[18:35:48.317] <TB2> INFO: 35734500 events read in total (1206820ms).
[18:36:10.768] <TB2> INFO: 36403350 events read in total (1229271ms).
[18:36:18.105] <TB2> INFO: 36608000 events read in total (1236608ms).
[18:36:18.163] <TB2> INFO: Test took 1237491ms.
[18:36:18.575] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:20.466] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:22.227] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:24.123] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:25.877] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:27.692] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:29.613] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:31.400] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:33.096] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:34.581] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:36.373] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:38.245] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:40.234] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:42.086] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:43.929] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:45.445] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[18:36:46.981] <TB2> INFO: PixTestScurves::scurves() done
[18:36:46.981] <TB2> INFO: Vcal mean: 120.95 121.51 117.78 103.93 116.74 126.86 113.57 124.60 131.17 130.95 134.58 113.73 115.15 113.37 120.10 126.54
[18:36:46.981] <TB2> INFO: Vcal RMS: 6.24 5.99 5.70 5.02 5.12 5.75 5.26 5.67 6.70 6.34 6.99 5.13 5.70 5.72 6.15 6.06
[18:36:46.981] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1266 seconds
[18:36:46.981] <TB2> INFO: Decoding statistics:
[18:36:46.981] <TB2> INFO: General information:
[18:36:46.981] <TB2> INFO: 16bit words read: 0
[18:36:46.981] <TB2> INFO: valid events total: 0
[18:36:46.981] <TB2> INFO: empty events: 0
[18:36:46.981] <TB2> INFO: valid events with pixels: 0
[18:36:46.981] <TB2> INFO: valid pixel hits: 0
[18:36:46.981] <TB2> INFO: Event errors: 0
[18:36:46.981] <TB2> INFO: start marker: 0
[18:36:46.981] <TB2> INFO: stop marker: 0
[18:36:46.981] <TB2> INFO: overflow: 0
[18:36:46.981] <TB2> INFO: invalid 5bit words: 0
[18:36:46.981] <TB2> INFO: invalid XOR eye diagram: 0
[18:36:46.981] <TB2> INFO: frame (failed synchr.): 0
[18:36:46.981] <TB2> INFO: idle data (no TBM trl): 0
[18:36:46.981] <TB2> INFO: no data (only TBM hdr): 0
[18:36:46.981] <TB2> INFO: TBM errors: 0
[18:36:46.981] <TB2> INFO: flawed TBM headers: 0
[18:36:46.981] <TB2> INFO: flawed TBM trailers: 0
[18:36:46.981] <TB2> INFO: event ID mismatches: 0
[18:36:46.981] <TB2> INFO: ROC errors: 0
[18:36:46.981] <TB2> INFO: missing ROC header(s): 0
[18:36:46.981] <TB2> INFO: misplaced readback start: 0
[18:36:46.981] <TB2> INFO: Pixel decoding errors: 0
[18:36:46.981] <TB2> INFO: pixel data incomplete: 0
[18:36:46.981] <TB2> INFO: pixel address: 0
[18:36:46.981] <TB2> INFO: pulse height fill bit: 0
[18:36:46.981] <TB2> INFO: buffer corruption: 0
[18:36:47.046] <TB2> INFO: ######################################################################
[18:36:47.046] <TB2> INFO: PixTestTrim::doTest()
[18:36:47.046] <TB2> INFO: ######################################################################
[18:36:47.047] <TB2> INFO: ----------------------------------------------------------------------
[18:36:47.047] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:36:47.047] <TB2> INFO: ----------------------------------------------------------------------
[18:36:47.089] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:36:47.089] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:36:47.097] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:36:47.097] <TB2> INFO: run 1 of 1
[18:36:47.329] <TB2> INFO: Expecting 5025280 events.
[18:37:17.519] <TB2> INFO: 828112 events read in total (29597ms).
[18:37:47.078] <TB2> INFO: 1652984 events read in total (59156ms).
[18:38:16.472] <TB2> INFO: 2477184 events read in total (88551ms).
[18:38:45.928] <TB2> INFO: 3295280 events read in total (118006ms).
[18:39:15.100] <TB2> INFO: 4109672 events read in total (147179ms).
[18:39:45.209] <TB2> INFO: 4920176 events read in total (177287ms).
[18:39:49.444] <TB2> INFO: 5025280 events read in total (181522ms).
[18:39:49.487] <TB2> INFO: Test took 182390ms.
[18:40:05.686] <TB2> INFO: ROC 0 VthrComp = 131
[18:40:05.686] <TB2> INFO: ROC 1 VthrComp = 127
[18:40:05.686] <TB2> INFO: ROC 2 VthrComp = 129
[18:40:05.686] <TB2> INFO: ROC 3 VthrComp = 113
[18:40:05.687] <TB2> INFO: ROC 4 VthrComp = 129
[18:40:05.687] <TB2> INFO: ROC 5 VthrComp = 132
[18:40:05.687] <TB2> INFO: ROC 6 VthrComp = 117
[18:40:05.687] <TB2> INFO: ROC 7 VthrComp = 129
[18:40:05.687] <TB2> INFO: ROC 8 VthrComp = 133
[18:40:05.688] <TB2> INFO: ROC 9 VthrComp = 133
[18:40:05.688] <TB2> INFO: ROC 10 VthrComp = 132
[18:40:05.689] <TB2> INFO: ROC 11 VthrComp = 124
[18:40:05.689] <TB2> INFO: ROC 12 VthrComp = 113
[18:40:05.689] <TB2> INFO: ROC 13 VthrComp = 115
[18:40:05.689] <TB2> INFO: ROC 14 VthrComp = 118
[18:40:05.689] <TB2> INFO: ROC 15 VthrComp = 130
[18:40:05.930] <TB2> INFO: Expecting 41600 events.
[18:40:09.507] <TB2> INFO: 41600 events read in total (2986ms).
[18:40:09.508] <TB2> INFO: Test took 3817ms.
[18:40:09.517] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:40:09.517] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:40:09.526] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:40:09.526] <TB2> INFO: run 1 of 1
[18:40:09.804] <TB2> INFO: Expecting 5025280 events.
[18:40:35.689] <TB2> INFO: 589168 events read in total (25294ms).
[18:41:01.494] <TB2> INFO: 1177128 events read in total (51099ms).
[18:41:26.893] <TB2> INFO: 1764952 events read in total (76498ms).
[18:41:51.953] <TB2> INFO: 2353128 events read in total (101558ms).
[18:42:17.336] <TB2> INFO: 2939056 events read in total (126941ms).
[18:42:42.705] <TB2> INFO: 3524416 events read in total (152310ms).
[18:43:07.941] <TB2> INFO: 4108656 events read in total (177546ms).
[18:43:33.426] <TB2> INFO: 4692208 events read in total (203031ms).
[18:43:48.127] <TB2> INFO: 5025280 events read in total (217732ms).
[18:43:48.185] <TB2> INFO: Test took 218659ms.
[18:44:14.965] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 56.8089 for pixel 23/20 mean/min/max = 44.4254/31.9838/56.8671
[18:44:14.965] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.1528 for pixel 51/57 mean/min/max = 46.1453/33.97/58.3205
[18:44:14.965] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.2887 for pixel 33/6 mean/min/max = 44.6559/32.8386/56.4731
[18:44:14.966] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 55.0667 for pixel 0/7 mean/min/max = 44.4664/33.3058/55.6271
[18:44:14.966] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 55.4925 for pixel 4/54 mean/min/max = 43.9399/32.1962/55.6836
[18:44:14.966] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.8415 for pixel 9/5 mean/min/max = 46.9254/33.9382/59.9127
[18:44:14.967] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.3579 for pixel 21/73 mean/min/max = 45.886/32.1607/59.6112
[18:44:14.967] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.0399 for pixel 8/9 mean/min/max = 48.9199/36.7695/61.0703
[18:44:14.967] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.5958 for pixel 22/52 mean/min/max = 46.5542/32.481/60.6274
[18:44:14.968] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 63.0753 for pixel 0/5 mean/min/max = 48.0986/33.0304/63.1669
[18:44:14.968] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 66.5347 for pixel 8/54 mean/min/max = 52.1361/37.4829/66.7893
[18:44:14.968] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 56.7616 for pixel 13/67 mean/min/max = 44.9593/33.1557/56.7629
[18:44:14.969] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.8907 for pixel 20/64 mean/min/max = 47.1384/33.1979/61.079
[18:44:14.969] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.3639 for pixel 16/16 mean/min/max = 45.5079/32.5316/58.4843
[18:44:14.970] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.3507 for pixel 3/2 mean/min/max = 46.6139/31.835/61.3929
[18:44:14.970] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.1208 for pixel 12/79 mean/min/max = 45.7244/32.2089/59.2399
[18:44:14.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:44:15.059] <TB2> INFO: Expecting 411648 events.
[18:44:24.327] <TB2> INFO: 411648 events read in total (8676ms).
[18:44:24.333] <TB2> INFO: Expecting 411648 events.
[18:44:33.343] <TB2> INFO: 411648 events read in total (8606ms).
[18:44:33.352] <TB2> INFO: Expecting 411648 events.
[18:44:42.441] <TB2> INFO: 411648 events read in total (8686ms).
[18:44:42.453] <TB2> INFO: Expecting 411648 events.
[18:44:51.459] <TB2> INFO: 411648 events read in total (8603ms).
[18:44:51.477] <TB2> INFO: Expecting 411648 events.
[18:45:00.488] <TB2> INFO: 411648 events read in total (8608ms).
[18:45:00.504] <TB2> INFO: Expecting 411648 events.
[18:45:09.585] <TB2> INFO: 411648 events read in total (8678ms).
[18:45:09.611] <TB2> INFO: Expecting 411648 events.
[18:45:18.606] <TB2> INFO: 411648 events read in total (8591ms).
[18:45:18.627] <TB2> INFO: Expecting 411648 events.
[18:45:27.690] <TB2> INFO: 411648 events read in total (8660ms).
[18:45:27.729] <TB2> INFO: Expecting 411648 events.
[18:45:36.782] <TB2> INFO: 411648 events read in total (8650ms).
[18:45:36.812] <TB2> INFO: Expecting 411648 events.
[18:45:45.795] <TB2> INFO: 411648 events read in total (8580ms).
[18:45:45.825] <TB2> INFO: Expecting 411648 events.
[18:45:54.875] <TB2> INFO: 411648 events read in total (8647ms).
[18:45:54.921] <TB2> INFO: Expecting 411648 events.
[18:46:04.003] <TB2> INFO: 411648 events read in total (8679ms).
[18:46:04.039] <TB2> INFO: Expecting 411648 events.
[18:46:13.033] <TB2> INFO: 411648 events read in total (8591ms).
[18:46:13.086] <TB2> INFO: Expecting 411648 events.
[18:46:22.134] <TB2> INFO: 411648 events read in total (8645ms).
[18:46:22.174] <TB2> INFO: Expecting 411648 events.
[18:46:31.275] <TB2> INFO: 411648 events read in total (8699ms).
[18:46:31.321] <TB2> INFO: Expecting 411648 events.
[18:46:40.420] <TB2> INFO: 411648 events read in total (8696ms).
[18:46:40.464] <TB2> INFO: Test took 145494ms.
[18:46:41.174] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:46:41.187] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:46:41.187] <TB2> INFO: run 1 of 1
[18:46:41.419] <TB2> INFO: Expecting 5025280 events.
[18:47:07.698] <TB2> INFO: 583896 events read in total (25687ms).
[18:47:32.836] <TB2> INFO: 1166504 events read in total (50825ms).
[18:47:58.139] <TB2> INFO: 1749512 events read in total (76128ms).
[18:48:23.743] <TB2> INFO: 2331288 events read in total (101732ms).
[18:48:49.200] <TB2> INFO: 2913184 events read in total (127189ms).
[18:49:14.488] <TB2> INFO: 3493640 events read in total (152477ms).
[18:49:39.724] <TB2> INFO: 4074232 events read in total (177713ms).
[18:50:05.015] <TB2> INFO: 4654232 events read in total (203004ms).
[18:50:21.466] <TB2> INFO: 5025280 events read in total (219456ms).
[18:50:21.595] <TB2> INFO: Test took 220408ms.
[18:50:46.235] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 3.745753 .. 145.445417
[18:50:46.469] <TB2> INFO: Expecting 208000 events.
[18:50:55.949] <TB2> INFO: 208000 events read in total (8888ms).
[18:50:55.950] <TB2> INFO: Test took 9713ms.
[18:50:55.996] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 155 (-1/-1) hits flags = 528 (plus default)
[18:50:56.006] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:50:56.006] <TB2> INFO: run 1 of 1
[18:50:56.284] <TB2> INFO: Expecting 5091840 events.
[18:51:22.468] <TB2> INFO: 582672 events read in total (25593ms).
[18:51:47.693] <TB2> INFO: 1165152 events read in total (50819ms).
[18:52:13.232] <TB2> INFO: 1747272 events read in total (76357ms).
[18:52:38.372] <TB2> INFO: 2329688 events read in total (101497ms).
[18:53:03.789] <TB2> INFO: 2911712 events read in total (126915ms).
[18:53:29.125] <TB2> INFO: 3492768 events read in total (152250ms).
[18:53:54.665] <TB2> INFO: 4073096 events read in total (177790ms).
[18:54:20.137] <TB2> INFO: 4652768 events read in total (203262ms).
[18:54:39.892] <TB2> INFO: 5091840 events read in total (223017ms).
[18:54:39.966] <TB2> INFO: Test took 223960ms.
[18:55:06.454] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 26.907439 .. 46.909593
[18:55:06.686] <TB2> INFO: Expecting 208000 events.
[18:55:16.337] <TB2> INFO: 208000 events read in total (9059ms).
[18:55:16.338] <TB2> INFO: Test took 9883ms.
[18:55:16.386] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[18:55:16.396] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:55:16.397] <TB2> INFO: run 1 of 1
[18:55:16.675] <TB2> INFO: Expecting 1364480 events.
[18:55:44.569] <TB2> INFO: 658960 events read in total (27303ms).
[18:56:12.066] <TB2> INFO: 1317536 events read in total (54800ms).
[18:56:14.490] <TB2> INFO: 1364480 events read in total (57224ms).
[18:56:14.516] <TB2> INFO: Test took 58120ms.
[18:56:27.450] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 22.940071 .. 47.824273
[18:56:27.684] <TB2> INFO: Expecting 208000 events.
[18:56:37.338] <TB2> INFO: 208000 events read in total (9063ms).
[18:56:37.339] <TB2> INFO: Test took 9888ms.
[18:56:37.386] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 12 .. 57 (-1/-1) hits flags = 528 (plus default)
[18:56:37.396] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:56:37.396] <TB2> INFO: run 1 of 1
[18:56:37.673] <TB2> INFO: Expecting 1530880 events.
[18:57:05.664] <TB2> INFO: 670984 events read in total (27399ms).
[18:57:33.273] <TB2> INFO: 1342200 events read in total (55008ms).
[18:57:41.135] <TB2> INFO: 1530880 events read in total (62870ms).
[18:57:41.162] <TB2> INFO: Test took 63767ms.
[18:57:53.526] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 23.777765 .. 46.524324
[18:57:53.787] <TB2> INFO: Expecting 208000 events.
[18:58:03.541] <TB2> INFO: 208000 events read in total (9162ms).
[18:58:03.542] <TB2> INFO: Test took 10015ms.
[18:58:03.610] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 56 (-1/-1) hits flags = 528 (plus default)
[18:58:03.622] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:58:03.622] <TB2> INFO: run 1 of 1
[18:58:03.899] <TB2> INFO: Expecting 1464320 events.
[18:58:32.163] <TB2> INFO: 671552 events read in total (27672ms).
[18:58:59.292] <TB2> INFO: 1343128 events read in total (54801ms).
[18:59:04.839] <TB2> INFO: 1464320 events read in total (60349ms).
[18:59:04.865] <TB2> INFO: Test took 61244ms.
[18:59:18.183] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:59:18.183] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:59:18.193] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[18:59:18.193] <TB2> INFO: run 1 of 1
[18:59:18.424] <TB2> INFO: Expecting 1364480 events.
[18:59:45.999] <TB2> INFO: 668144 events read in total (26983ms).
[19:00:13.359] <TB2> INFO: 1336432 events read in total (54343ms).
[19:00:14.986] <TB2> INFO: 1364480 events read in total (55970ms).
[19:00:15.010] <TB2> INFO: Test took 56818ms.
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:00:29.093] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:00:29.094] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:00:29.094] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C0.dat
[19:00:29.100] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C1.dat
[19:00:29.105] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C2.dat
[19:00:29.111] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C3.dat
[19:00:29.116] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C4.dat
[19:00:29.122] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C5.dat
[19:00:29.127] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C6.dat
[19:00:29.133] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C7.dat
[19:00:29.138] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C8.dat
[19:00:29.144] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C9.dat
[19:00:29.150] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C10.dat
[19:00:29.155] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C11.dat
[19:00:29.161] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C12.dat
[19:00:29.168] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C13.dat
[19:00:29.176] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C14.dat
[19:00:29.183] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters35_C15.dat
[19:00:29.189] <TB2> INFO: PixTestTrim::trimTest() done
[19:00:29.189] <TB2> INFO: vtrim: 141 123 158 117 125 144 125 145 143 144 164 129 143 134 146 133
[19:00:29.189] <TB2> INFO: vthrcomp: 131 127 129 113 129 132 117 129 133 133 132 124 113 115 118 130
[19:00:29.189] <TB2> INFO: vcal mean: 34.97 35.05 34.92 34.97 34.96 35.12 34.96 35.31 35.22 35.17 35.23 34.99 35.31 34.96 35.54 35.04
[19:00:29.189] <TB2> INFO: vcal RMS: 1.17 1.10 0.97 0.99 0.93 1.08 1.07 1.29 1.32 1.29 1.57 0.95 1.54 1.19 1.88 1.22
[19:00:29.189] <TB2> INFO: bits mean: 10.66 9.59 10.42 10.10 10.25 9.58 10.13 8.73 10.00 9.01 8.27 9.81 10.31 10.13 10.62 9.70
[19:00:29.189] <TB2> INFO: bits RMS: 2.25 2.46 2.24 2.33 2.42 2.38 2.46 2.28 2.42 2.69 2.18 2.48 2.21 2.38 2.23 2.62
[19:00:29.197] <TB2> INFO: ----------------------------------------------------------------------
[19:00:29.197] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:00:29.197] <TB2> INFO: ----------------------------------------------------------------------
[19:00:29.199] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:00:29.210] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:00:29.210] <TB2> INFO: run 1 of 1
[19:00:29.442] <TB2> INFO: Expecting 4160000 events.
[19:01:01.332] <TB2> INFO: 751940 events read in total (31299ms).
[19:01:32.237] <TB2> INFO: 1496470 events read in total (62204ms).
[19:02:03.379] <TB2> INFO: 2237825 events read in total (93346ms).
[19:02:34.125] <TB2> INFO: 2973500 events read in total (124092ms).
[19:03:05.476] <TB2> INFO: 3706785 events read in total (155444ms).
[19:03:24.755] <TB2> INFO: 4160000 events read in total (174722ms).
[19:03:24.805] <TB2> INFO: Test took 175595ms.
[19:03:51.655] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 211 (-1/-1) hits flags = 528 (plus default)
[19:03:51.665] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:03:51.665] <TB2> INFO: run 1 of 1
[19:03:51.905] <TB2> INFO: Expecting 4409600 events.
[19:04:22.955] <TB2> INFO: 713820 events read in total (30459ms).
[19:04:53.160] <TB2> INFO: 1422065 events read in total (60664ms).
[19:05:23.670] <TB2> INFO: 2128670 events read in total (91174ms).
[19:05:53.709] <TB2> INFO: 2830245 events read in total (121213ms).
[19:06:23.943] <TB2> INFO: 3530530 events read in total (151447ms).
[19:06:54.108] <TB2> INFO: 4229840 events read in total (181612ms).
[19:07:02.043] <TB2> INFO: 4409600 events read in total (189547ms).
[19:07:02.100] <TB2> INFO: Test took 190435ms.
[19:07:30.810] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:07:30.820] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:07:30.820] <TB2> INFO: run 1 of 1
[19:07:31.052] <TB2> INFO: Expecting 4160000 events.
[19:08:02.155] <TB2> INFO: 728700 events read in total (30511ms).
[19:08:32.739] <TB2> INFO: 1451305 events read in total (61095ms).
[19:09:03.108] <TB2> INFO: 2171690 events read in total (91464ms).
[19:09:33.370] <TB2> INFO: 2886815 events read in total (121726ms).
[19:10:03.808] <TB2> INFO: 3600065 events read in total (152164ms).
[19:10:28.120] <TB2> INFO: 4160000 events read in total (176476ms).
[19:10:28.173] <TB2> INFO: Test took 177354ms.
[19:10:55.200] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[19:10:55.210] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:10:55.210] <TB2> INFO: run 1 of 1
[19:10:55.450] <TB2> INFO: Expecting 4118400 events.
[19:11:27.045] <TB2> INFO: 731485 events read in total (31003ms).
[19:11:57.743] <TB2> INFO: 1456780 events read in total (61701ms).
[19:12:28.664] <TB2> INFO: 2179625 events read in total (92622ms).
[19:12:59.321] <TB2> INFO: 2897125 events read in total (123279ms).
[19:13:29.713] <TB2> INFO: 3612925 events read in total (153671ms).
[19:13:51.344] <TB2> INFO: 4118400 events read in total (175302ms).
[19:13:51.398] <TB2> INFO: Test took 176188ms.
[19:14:18.788] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[19:14:18.798] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:14:18.798] <TB2> INFO: run 1 of 1
[19:14:19.030] <TB2> INFO: Expecting 4118400 events.
[19:14:50.418] <TB2> INFO: 731405 events read in total (30797ms).
[19:15:20.816] <TB2> INFO: 1456470 events read in total (61195ms).
[19:15:51.569] <TB2> INFO: 2179205 events read in total (91948ms).
[19:16:22.194] <TB2> INFO: 2896720 events read in total (122573ms).
[19:16:52.837] <TB2> INFO: 3612465 events read in total (153216ms).
[19:17:14.848] <TB2> INFO: 4118400 events read in total (175227ms).
[19:17:14.909] <TB2> INFO: Test took 176111ms.
[19:17:45.707] <TB2> INFO: PixTestTrim::trimBitTest() done
[19:17:45.708] <TB2> INFO: PixTestTrim::doTest() done, duration: 2458 seconds
[19:17:45.708] <TB2> INFO: Decoding statistics:
[19:17:45.708] <TB2> INFO: General information:
[19:17:45.708] <TB2> INFO: 16bit words read: 0
[19:17:45.708] <TB2> INFO: valid events total: 0
[19:17:45.708] <TB2> INFO: empty events: 0
[19:17:45.708] <TB2> INFO: valid events with pixels: 0
[19:17:45.708] <TB2> INFO: valid pixel hits: 0
[19:17:45.708] <TB2> INFO: Event errors: 0
[19:17:45.708] <TB2> INFO: start marker: 0
[19:17:45.708] <TB2> INFO: stop marker: 0
[19:17:45.709] <TB2> INFO: overflow: 0
[19:17:45.709] <TB2> INFO: invalid 5bit words: 0
[19:17:45.709] <TB2> INFO: invalid XOR eye diagram: 0
[19:17:45.709] <TB2> INFO: frame (failed synchr.): 0
[19:17:45.709] <TB2> INFO: idle data (no TBM trl): 0
[19:17:45.709] <TB2> INFO: no data (only TBM hdr): 0
[19:17:45.709] <TB2> INFO: TBM errors: 0
[19:17:45.709] <TB2> INFO: flawed TBM headers: 0
[19:17:45.709] <TB2> INFO: flawed TBM trailers: 0
[19:17:45.709] <TB2> INFO: event ID mismatches: 0
[19:17:45.709] <TB2> INFO: ROC errors: 0
[19:17:45.709] <TB2> INFO: missing ROC header(s): 0
[19:17:45.709] <TB2> INFO: misplaced readback start: 0
[19:17:45.709] <TB2> INFO: Pixel decoding errors: 0
[19:17:45.709] <TB2> INFO: pixel data incomplete: 0
[19:17:45.709] <TB2> INFO: pixel address: 0
[19:17:45.709] <TB2> INFO: pulse height fill bit: 0
[19:17:45.709] <TB2> INFO: buffer corruption: 0
[19:17:46.326] <TB2> INFO: ######################################################################
[19:17:46.326] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[19:17:46.326] <TB2> INFO: ######################################################################
[19:17:46.559] <TB2> INFO: Expecting 41600 events.
[19:17:50.099] <TB2> INFO: 41600 events read in total (2949ms).
[19:17:50.100] <TB2> INFO: Test took 3773ms.
[19:17:50.537] <TB2> INFO: Expecting 41600 events.
[19:17:54.061] <TB2> INFO: 41600 events read in total (2932ms).
[19:17:54.062] <TB2> INFO: Test took 3757ms.
[19:17:54.353] <TB2> INFO: Expecting 41600 events.
[19:17:58.017] <TB2> INFO: 41600 events read in total (3073ms).
[19:17:58.017] <TB2> INFO: Test took 3929ms.
[19:17:58.308] <TB2> INFO: Expecting 41600 events.
[19:18:01.755] <TB2> INFO: 41600 events read in total (2855ms).
[19:18:01.756] <TB2> INFO: Test took 3713ms.
[19:18:02.044] <TB2> INFO: Expecting 41600 events.
[19:18:05.480] <TB2> INFO: 41600 events read in total (2844ms).
[19:18:05.481] <TB2> INFO: Test took 3702ms.
[19:18:05.769] <TB2> INFO: Expecting 41600 events.
[19:18:09.323] <TB2> INFO: 41600 events read in total (2963ms).
[19:18:09.324] <TB2> INFO: Test took 3820ms.
[19:18:09.612] <TB2> INFO: Expecting 41600 events.
[19:18:13.151] <TB2> INFO: 41600 events read in total (2948ms).
[19:18:13.152] <TB2> INFO: Test took 3805ms.
[19:18:13.440] <TB2> INFO: Expecting 41600 events.
[19:18:17.040] <TB2> INFO: 41600 events read in total (3008ms).
[19:18:17.041] <TB2> INFO: Test took 3865ms.
[19:18:17.341] <TB2> INFO: Expecting 41600 events.
[19:18:20.947] <TB2> INFO: 41600 events read in total (3015ms).
[19:18:20.947] <TB2> INFO: Test took 3882ms.
[19:18:21.235] <TB2> INFO: Expecting 41600 events.
[19:18:24.711] <TB2> INFO: 41600 events read in total (2884ms).
[19:18:24.712] <TB2> INFO: Test took 3741ms.
[19:18:24.002] <TB2> INFO: Expecting 41600 events.
[19:18:28.604] <TB2> INFO: 41600 events read in total (3010ms).
[19:18:28.605] <TB2> INFO: Test took 3867ms.
[19:18:28.893] <TB2> INFO: Expecting 41600 events.
[19:18:32.483] <TB2> INFO: 41600 events read in total (2995ms).
[19:18:32.484] <TB2> INFO: Test took 3855ms.
[19:18:32.772] <TB2> INFO: Expecting 41600 events.
[19:18:36.320] <TB2> INFO: 41600 events read in total (2956ms).
[19:18:36.321] <TB2> INFO: Test took 3814ms.
[19:18:36.609] <TB2> INFO: Expecting 41600 events.
[19:18:40.092] <TB2> INFO: 41600 events read in total (2892ms).
[19:18:40.093] <TB2> INFO: Test took 3749ms.
[19:18:40.384] <TB2> INFO: Expecting 41600 events.
[19:18:43.852] <TB2> INFO: 41600 events read in total (2877ms).
[19:18:43.853] <TB2> INFO: Test took 3734ms.
[19:18:44.141] <TB2> INFO: Expecting 41600 events.
[19:18:47.773] <TB2> INFO: 41600 events read in total (3040ms).
[19:18:47.774] <TB2> INFO: Test took 3898ms.
[19:18:48.062] <TB2> INFO: Expecting 41600 events.
[19:18:51.553] <TB2> INFO: 41600 events read in total (2900ms).
[19:18:51.554] <TB2> INFO: Test took 3757ms.
[19:18:51.842] <TB2> INFO: Expecting 41600 events.
[19:18:55.350] <TB2> INFO: 41600 events read in total (2917ms).
[19:18:55.351] <TB2> INFO: Test took 3774ms.
[19:18:55.639] <TB2> INFO: Expecting 41600 events.
[19:18:59.140] <TB2> INFO: 41600 events read in total (2909ms).
[19:18:59.140] <TB2> INFO: Test took 3765ms.
[19:18:59.429] <TB2> INFO: Expecting 41600 events.
[19:19:02.878] <TB2> INFO: 41600 events read in total (2857ms).
[19:19:02.878] <TB2> INFO: Test took 3714ms.
[19:19:03.180] <TB2> INFO: Expecting 41600 events.
[19:19:06.698] <TB2> INFO: 41600 events read in total (2926ms).
[19:19:06.699] <TB2> INFO: Test took 3794ms.
[19:19:06.987] <TB2> INFO: Expecting 41600 events.
[19:19:10.514] <TB2> INFO: 41600 events read in total (2936ms).
[19:19:10.514] <TB2> INFO: Test took 3792ms.
[19:19:10.805] <TB2> INFO: Expecting 41600 events.
[19:19:14.322] <TB2> INFO: 41600 events read in total (2925ms).
[19:19:14.323] <TB2> INFO: Test took 3783ms.
[19:19:14.623] <TB2> INFO: Expecting 41600 events.
[19:19:18.273] <TB2> INFO: 41600 events read in total (3059ms).
[19:19:18.273] <TB2> INFO: Test took 3927ms.
[19:19:18.564] <TB2> INFO: Expecting 41600 events.
[19:19:22.057] <TB2> INFO: 41600 events read in total (2902ms).
[19:19:22.058] <TB2> INFO: Test took 3759ms.
[19:19:22.358] <TB2> INFO: Expecting 41600 events.
[19:19:26.014] <TB2> INFO: 41600 events read in total (3065ms).
[19:19:26.015] <TB2> INFO: Test took 3934ms.
[19:19:26.303] <TB2> INFO: Expecting 41600 events.
[19:19:29.857] <TB2> INFO: 41600 events read in total (2962ms).
[19:19:29.858] <TB2> INFO: Test took 3819ms.
[19:19:30.147] <TB2> INFO: Expecting 41600 events.
[19:19:33.624] <TB2> INFO: 41600 events read in total (2886ms).
[19:19:33.624] <TB2> INFO: Test took 3742ms.
[19:19:33.913] <TB2> INFO: Expecting 2560 events.
[19:19:34.796] <TB2> INFO: 2560 events read in total (291ms).
[19:19:34.796] <TB2> INFO: Test took 1159ms.
[19:19:35.104] <TB2> INFO: Expecting 2560 events.
[19:19:35.986] <TB2> INFO: 2560 events read in total (290ms).
[19:19:35.986] <TB2> INFO: Test took 1189ms.
[19:19:36.294] <TB2> INFO: Expecting 2560 events.
[19:19:37.182] <TB2> INFO: 2560 events read in total (296ms).
[19:19:37.182] <TB2> INFO: Test took 1196ms.
[19:19:37.490] <TB2> INFO: Expecting 2560 events.
[19:19:38.373] <TB2> INFO: 2560 events read in total (292ms).
[19:19:38.374] <TB2> INFO: Test took 1192ms.
[19:19:38.681] <TB2> INFO: Expecting 2560 events.
[19:19:39.560] <TB2> INFO: 2560 events read in total (287ms).
[19:19:39.561] <TB2> INFO: Test took 1187ms.
[19:19:39.868] <TB2> INFO: Expecting 2560 events.
[19:19:40.746] <TB2> INFO: 2560 events read in total (286ms).
[19:19:40.746] <TB2> INFO: Test took 1185ms.
[19:19:41.059] <TB2> INFO: Expecting 2560 events.
[19:19:41.937] <TB2> INFO: 2560 events read in total (286ms).
[19:19:41.937] <TB2> INFO: Test took 1190ms.
[19:19:42.245] <TB2> INFO: Expecting 2560 events.
[19:19:43.126] <TB2> INFO: 2560 events read in total (289ms).
[19:19:43.126] <TB2> INFO: Test took 1189ms.
[19:19:43.434] <TB2> INFO: Expecting 2560 events.
[19:19:44.314] <TB2> INFO: 2560 events read in total (288ms).
[19:19:44.314] <TB2> INFO: Test took 1187ms.
[19:19:44.622] <TB2> INFO: Expecting 2560 events.
[19:19:45.501] <TB2> INFO: 2560 events read in total (287ms).
[19:19:45.501] <TB2> INFO: Test took 1186ms.
[19:19:45.809] <TB2> INFO: Expecting 2560 events.
[19:19:46.691] <TB2> INFO: 2560 events read in total (290ms).
[19:19:46.691] <TB2> INFO: Test took 1189ms.
[19:19:46.999] <TB2> INFO: Expecting 2560 events.
[19:19:47.878] <TB2> INFO: 2560 events read in total (287ms).
[19:19:47.878] <TB2> INFO: Test took 1187ms.
[19:19:48.186] <TB2> INFO: Expecting 2560 events.
[19:19:49.069] <TB2> INFO: 2560 events read in total (291ms).
[19:19:49.069] <TB2> INFO: Test took 1190ms.
[19:19:49.377] <TB2> INFO: Expecting 2560 events.
[19:19:50.260] <TB2> INFO: 2560 events read in total (292ms).
[19:19:50.260] <TB2> INFO: Test took 1191ms.
[19:19:50.568] <TB2> INFO: Expecting 2560 events.
[19:19:51.451] <TB2> INFO: 2560 events read in total (292ms).
[19:19:51.451] <TB2> INFO: Test took 1191ms.
[19:19:51.759] <TB2> INFO: Expecting 2560 events.
[19:19:52.642] <TB2> INFO: 2560 events read in total (291ms).
[19:19:52.642] <TB2> INFO: Test took 1190ms.
[19:19:52.645] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:19:52.950] <TB2> INFO: Expecting 655360 events.
[19:20:07.314] <TB2> INFO: 655360 events read in total (13772ms).
[19:20:07.329] <TB2> INFO: Expecting 655360 events.
[19:20:21.504] <TB2> INFO: 655360 events read in total (13772ms).
[19:20:21.518] <TB2> INFO: Expecting 655360 events.
[19:20:35.621] <TB2> INFO: 655360 events read in total (13700ms).
[19:20:35.639] <TB2> INFO: Expecting 655360 events.
[19:20:49.842] <TB2> INFO: 655360 events read in total (13800ms).
[19:20:49.865] <TB2> INFO: Expecting 655360 events.
[19:21:03.971] <TB2> INFO: 655360 events read in total (13703ms).
[19:21:04.007] <TB2> INFO: Expecting 655360 events.
[19:21:18.133] <TB2> INFO: 655360 events read in total (13723ms).
[19:21:18.175] <TB2> INFO: Expecting 655360 events.
[19:21:32.142] <TB2> INFO: 655360 events read in total (13564ms).
[19:21:32.188] <TB2> INFO: Expecting 655360 events.
[19:21:46.244] <TB2> INFO: 655360 events read in total (13653ms).
[19:21:46.283] <TB2> INFO: Expecting 655360 events.
[19:22:00.453] <TB2> INFO: 655360 events read in total (13767ms).
[19:22:00.511] <TB2> INFO: Expecting 655360 events.
[19:22:14.529] <TB2> INFO: 655360 events read in total (13615ms).
[19:22:14.579] <TB2> INFO: Expecting 655360 events.
[19:22:28.661] <TB2> INFO: 655360 events read in total (13679ms).
[19:22:28.715] <TB2> INFO: Expecting 655360 events.
[19:22:42.777] <TB2> INFO: 655360 events read in total (13659ms).
[19:22:42.834] <TB2> INFO: Expecting 655360 events.
[19:22:56.917] <TB2> INFO: 655360 events read in total (13680ms).
[19:22:56.985] <TB2> INFO: Expecting 655360 events.
[19:23:11.138] <TB2> INFO: 655360 events read in total (13750ms).
[19:23:11.226] <TB2> INFO: Expecting 655360 events.
[19:23:25.343] <TB2> INFO: 655360 events read in total (13714ms).
[19:23:25.411] <TB2> INFO: Expecting 655360 events.
[19:23:39.534] <TB2> INFO: 655360 events read in total (13720ms).
[19:23:39.607] <TB2> INFO: Test took 226962ms.
[19:23:39.685] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:23:39.950] <TB2> INFO: Expecting 655360 events.
[19:23:54.152] <TB2> INFO: 655360 events read in total (13611ms).
[19:23:54.165] <TB2> INFO: Expecting 655360 events.
[19:24:08.222] <TB2> INFO: 655360 events read in total (13654ms).
[19:24:08.241] <TB2> INFO: Expecting 655360 events.
[19:24:22.304] <TB2> INFO: 655360 events read in total (13660ms).
[19:24:22.322] <TB2> INFO: Expecting 655360 events.
[19:24:36.081] <TB2> INFO: 655360 events read in total (13356ms).
[19:24:36.104] <TB2> INFO: Expecting 655360 events.
[19:24:50.154] <TB2> INFO: 655360 events read in total (13647ms).
[19:24:50.190] <TB2> INFO: Expecting 655360 events.
[19:25:04.022] <TB2> INFO: 655360 events read in total (13429ms).
[19:25:04.052] <TB2> INFO: Expecting 655360 events.
[19:25:18.066] <TB2> INFO: 655360 events read in total (13611ms).
[19:25:18.099] <TB2> INFO: Expecting 655360 events.
[19:25:31.948] <TB2> INFO: 655360 events read in total (13446ms).
[19:25:31.996] <TB2> INFO: Expecting 655360 events.
[19:25:45.650] <TB2> INFO: 655360 events read in total (13252ms).
[19:25:45.691] <TB2> INFO: Expecting 655360 events.
[19:25:59.358] <TB2> INFO: 655360 events read in total (13264ms).
[19:25:59.409] <TB2> INFO: Expecting 655360 events.
[19:26:13.149] <TB2> INFO: 655360 events read in total (13337ms).
[19:26:13.205] <TB2> INFO: Expecting 655360 events.
[19:26:27.164] <TB2> INFO: 655360 events read in total (13556ms).
[19:26:27.220] <TB2> INFO: Expecting 655360 events.
[19:26:41.155] <TB2> INFO: 655360 events read in total (13532ms).
[19:26:41.215] <TB2> INFO: Expecting 655360 events.
[19:26:54.949] <TB2> INFO: 655360 events read in total (13331ms).
[19:26:55.015] <TB2> INFO: Expecting 655360 events.
[19:27:08.966] <TB2> INFO: 655360 events read in total (13548ms).
[19:27:09.061] <TB2> INFO: Expecting 655360 events.
[19:27:22.745] <TB2> INFO: 655360 events read in total (13281ms).
[19:27:22.831] <TB2> INFO: Test took 223146ms.
[19:27:23.070] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.076] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.082] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.089] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.095] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:23.101] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:27:23.108] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[19:27:23.114] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[19:27:23.121] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[19:27:23.127] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[19:27:23.134] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[19:27:23.140] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[19:27:23.146] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[19:27:23.153] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[19:27:23.159] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.166] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.171] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.176] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.181] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.185] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.190] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.194] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.199] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:23.203] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.208] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.212] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.217] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:23.221] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:27:23.226] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.230] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.235] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.239] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.244] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.248] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.253] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[19:27:23.257] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[19:27:23.262] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[19:27:23.266] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[19:27:23.271] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[19:27:23.275] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[19:27:23.280] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[19:27:23.284] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[19:27:23.289] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:27:23.324] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:27:23.325] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:27:23.560] <TB2> INFO: Expecting 41600 events.
[19:27:26.635] <TB2> INFO: 41600 events read in total (2484ms).
[19:27:26.636] <TB2> INFO: Test took 3308ms.
[19:27:27.085] <TB2> INFO: Expecting 41600 events.
[19:27:30.070] <TB2> INFO: 41600 events read in total (2394ms).
[19:27:30.070] <TB2> INFO: Test took 3224ms.
[19:27:30.514] <TB2> INFO: Expecting 41600 events.
[19:27:33.641] <TB2> INFO: 41600 events read in total (2535ms).
[19:27:33.641] <TB2> INFO: Test took 3360ms.
[19:27:33.856] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:33.944] <TB2> INFO: Expecting 2560 events.
[19:27:34.828] <TB2> INFO: 2560 events read in total (292ms).
[19:27:34.828] <TB2> INFO: Test took 972ms.
[19:27:34.830] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:35.137] <TB2> INFO: Expecting 2560 events.
[19:27:36.024] <TB2> INFO: 2560 events read in total (295ms).
[19:27:36.024] <TB2> INFO: Test took 1194ms.
[19:27:36.026] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:36.333] <TB2> INFO: Expecting 2560 events.
[19:27:37.217] <TB2> INFO: 2560 events read in total (292ms).
[19:27:37.217] <TB2> INFO: Test took 1191ms.
[19:27:37.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:37.525] <TB2> INFO: Expecting 2560 events.
[19:27:38.414] <TB2> INFO: 2560 events read in total (297ms).
[19:27:38.414] <TB2> INFO: Test took 1195ms.
[19:27:38.417] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:38.722] <TB2> INFO: Expecting 2560 events.
[19:27:39.608] <TB2> INFO: 2560 events read in total (294ms).
[19:27:39.609] <TB2> INFO: Test took 1192ms.
[19:27:39.611] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:39.917] <TB2> INFO: Expecting 2560 events.
[19:27:40.801] <TB2> INFO: 2560 events read in total (292ms).
[19:27:40.801] <TB2> INFO: Test took 1191ms.
[19:27:40.803] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:41.110] <TB2> INFO: Expecting 2560 events.
[19:27:41.995] <TB2> INFO: 2560 events read in total (293ms).
[19:27:41.995] <TB2> INFO: Test took 1192ms.
[19:27:41.998] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:42.304] <TB2> INFO: Expecting 2560 events.
[19:27:43.189] <TB2> INFO: 2560 events read in total (294ms).
[19:27:43.189] <TB2> INFO: Test took 1191ms.
[19:27:43.191] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:43.497] <TB2> INFO: Expecting 2560 events.
[19:27:44.376] <TB2> INFO: 2560 events read in total (287ms).
[19:27:44.376] <TB2> INFO: Test took 1185ms.
[19:27:44.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:44.685] <TB2> INFO: Expecting 2560 events.
[19:27:45.563] <TB2> INFO: 2560 events read in total (287ms).
[19:27:45.563] <TB2> INFO: Test took 1185ms.
[19:27:45.565] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:45.872] <TB2> INFO: Expecting 2560 events.
[19:27:46.751] <TB2> INFO: 2560 events read in total (287ms).
[19:27:46.751] <TB2> INFO: Test took 1186ms.
[19:27:46.753] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:47.059] <TB2> INFO: Expecting 2560 events.
[19:27:47.938] <TB2> INFO: 2560 events read in total (287ms).
[19:27:47.938] <TB2> INFO: Test took 1185ms.
[19:27:47.940] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:48.246] <TB2> INFO: Expecting 2560 events.
[19:27:49.125] <TB2> INFO: 2560 events read in total (287ms).
[19:27:49.125] <TB2> INFO: Test took 1185ms.
[19:27:49.126] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:49.433] <TB2> INFO: Expecting 2560 events.
[19:27:50.312] <TB2> INFO: 2560 events read in total (287ms).
[19:27:50.312] <TB2> INFO: Test took 1186ms.
[19:27:50.314] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:50.621] <TB2> INFO: Expecting 2560 events.
[19:27:51.500] <TB2> INFO: 2560 events read in total (287ms).
[19:27:51.500] <TB2> INFO: Test took 1186ms.
[19:27:51.502] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:51.810] <TB2> INFO: Expecting 2560 events.
[19:27:52.689] <TB2> INFO: 2560 events read in total (287ms).
[19:27:52.689] <TB2> INFO: Test took 1187ms.
[19:27:52.691] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:52.998] <TB2> INFO: Expecting 2560 events.
[19:27:53.876] <TB2> INFO: 2560 events read in total (287ms).
[19:27:53.876] <TB2> INFO: Test took 1185ms.
[19:27:53.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:54.184] <TB2> INFO: Expecting 2560 events.
[19:27:55.064] <TB2> INFO: 2560 events read in total (288ms).
[19:27:55.064] <TB2> INFO: Test took 1186ms.
[19:27:55.066] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:55.373] <TB2> INFO: Expecting 2560 events.
[19:27:56.255] <TB2> INFO: 2560 events read in total (290ms).
[19:27:56.255] <TB2> INFO: Test took 1189ms.
[19:27:56.257] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:56.563] <TB2> INFO: Expecting 2560 events.
[19:27:57.442] <TB2> INFO: 2560 events read in total (287ms).
[19:27:57.443] <TB2> INFO: Test took 1186ms.
[19:27:57.444] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:57.751] <TB2> INFO: Expecting 2560 events.
[19:27:58.630] <TB2> INFO: 2560 events read in total (288ms).
[19:27:58.630] <TB2> INFO: Test took 1186ms.
[19:27:58.632] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:27:58.938] <TB2> INFO: Expecting 2560 events.
[19:27:59.819] <TB2> INFO: 2560 events read in total (289ms).
[19:27:59.820] <TB2> INFO: Test took 1188ms.
[19:27:59.821] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:00.128] <TB2> INFO: Expecting 2560 events.
[19:28:01.010] <TB2> INFO: 2560 events read in total (291ms).
[19:28:01.010] <TB2> INFO: Test took 1189ms.
[19:28:01.012] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:01.319] <TB2> INFO: Expecting 2560 events.
[19:28:02.197] <TB2> INFO: 2560 events read in total (287ms).
[19:28:02.197] <TB2> INFO: Test took 1185ms.
[19:28:02.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:02.505] <TB2> INFO: Expecting 2560 events.
[19:28:03.389] <TB2> INFO: 2560 events read in total (292ms).
[19:28:03.389] <TB2> INFO: Test took 1191ms.
[19:28:03.391] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:03.698] <TB2> INFO: Expecting 2560 events.
[19:28:04.582] <TB2> INFO: 2560 events read in total (293ms).
[19:28:04.582] <TB2> INFO: Test took 1191ms.
[19:28:04.584] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:04.891] <TB2> INFO: Expecting 2560 events.
[19:28:05.777] <TB2> INFO: 2560 events read in total (294ms).
[19:28:05.777] <TB2> INFO: Test took 1193ms.
[19:28:05.779] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:06.086] <TB2> INFO: Expecting 2560 events.
[19:28:06.969] <TB2> INFO: 2560 events read in total (292ms).
[19:28:06.969] <TB2> INFO: Test took 1190ms.
[19:28:06.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:07.277] <TB2> INFO: Expecting 2560 events.
[19:28:08.161] <TB2> INFO: 2560 events read in total (292ms).
[19:28:08.161] <TB2> INFO: Test took 1190ms.
[19:28:08.163] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:08.469] <TB2> INFO: Expecting 2560 events.
[19:28:09.353] <TB2> INFO: 2560 events read in total (292ms).
[19:28:09.353] <TB2> INFO: Test took 1190ms.
[19:28:09.355] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:09.662] <TB2> INFO: Expecting 2560 events.
[19:28:10.544] <TB2> INFO: 2560 events read in total (291ms).
[19:28:10.544] <TB2> INFO: Test took 1189ms.
[19:28:10.546] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:28:10.853] <TB2> INFO: Expecting 2560 events.
[19:28:11.739] <TB2> INFO: 2560 events read in total (295ms).
[19:28:11.739] <TB2> INFO: Test took 1193ms.
[19:28:12.202] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 625 seconds
[19:28:12.202] <TB2> INFO: PH scale (per ROC): 42 48 48 30 49 48 50 48 45 44 32 43 46 45 27 33
[19:28:12.202] <TB2> INFO: PH offset (per ROC): 107 112 101 96 124 104 107 109 101 106 90 96 112 110 100 105
[19:28:12.207] <TB2> INFO: Decoding statistics:
[19:28:12.207] <TB2> INFO: General information:
[19:28:12.207] <TB2> INFO: 16bit words read: 127884
[19:28:12.207] <TB2> INFO: valid events total: 20480
[19:28:12.207] <TB2> INFO: empty events: 17978
[19:28:12.207] <TB2> INFO: valid events with pixels: 2502
[19:28:12.207] <TB2> INFO: valid pixel hits: 2502
[19:28:12.207] <TB2> INFO: Event errors: 0
[19:28:12.207] <TB2> INFO: start marker: 0
[19:28:12.207] <TB2> INFO: stop marker: 0
[19:28:12.207] <TB2> INFO: overflow: 0
[19:28:12.207] <TB2> INFO: invalid 5bit words: 0
[19:28:12.207] <TB2> INFO: invalid XOR eye diagram: 0
[19:28:12.208] <TB2> INFO: frame (failed synchr.): 0
[19:28:12.208] <TB2> INFO: idle data (no TBM trl): 0
[19:28:12.208] <TB2> INFO: no data (only TBM hdr): 0
[19:28:12.208] <TB2> INFO: TBM errors: 0
[19:28:12.208] <TB2> INFO: flawed TBM headers: 0
[19:28:12.208] <TB2> INFO: flawed TBM trailers: 0
[19:28:12.208] <TB2> INFO: event ID mismatches: 0
[19:28:12.208] <TB2> INFO: ROC errors: 0
[19:28:12.208] <TB2> INFO: missing ROC header(s): 0
[19:28:12.208] <TB2> INFO: misplaced readback start: 0
[19:28:12.208] <TB2> INFO: Pixel decoding errors: 0
[19:28:12.208] <TB2> INFO: pixel data incomplete: 0
[19:28:12.208] <TB2> INFO: pixel address: 0
[19:28:12.208] <TB2> INFO: pulse height fill bit: 0
[19:28:12.208] <TB2> INFO: buffer corruption: 0
[19:28:12.559] <TB2> INFO: ######################################################################
[19:28:12.559] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:28:12.559] <TB2> INFO: ######################################################################
[19:28:12.572] <TB2> INFO: scanning low vcal = 10
[19:28:12.804] <TB2> INFO: Expecting 41600 events.
[19:28:16.373] <TB2> INFO: 41600 events read in total (2978ms).
[19:28:16.373] <TB2> INFO: Test took 3801ms.
[19:28:16.375] <TB2> INFO: scanning low vcal = 20
[19:28:16.673] <TB2> INFO: Expecting 41600 events.
[19:28:20.229] <TB2> INFO: 41600 events read in total (2964ms).
[19:28:20.230] <TB2> INFO: Test took 3855ms.
[19:28:20.231] <TB2> INFO: scanning low vcal = 30
[19:28:20.530] <TB2> INFO: Expecting 41600 events.
[19:28:24.183] <TB2> INFO: 41600 events read in total (3062ms).
[19:28:24.184] <TB2> INFO: Test took 3953ms.
[19:28:24.186] <TB2> INFO: scanning low vcal = 40
[19:28:24.463] <TB2> INFO: Expecting 41600 events.
[19:28:28.370] <TB2> INFO: 41600 events read in total (3315ms).
[19:28:28.371] <TB2> INFO: Test took 4184ms.
[19:28:28.373] <TB2> INFO: scanning low vcal = 50
[19:28:28.650] <TB2> INFO: Expecting 41600 events.
[19:28:32.592] <TB2> INFO: 41600 events read in total (3350ms).
[19:28:32.593] <TB2> INFO: Test took 4220ms.
[19:28:32.595] <TB2> INFO: scanning low vcal = 60
[19:28:32.872] <TB2> INFO: Expecting 41600 events.
[19:28:36.835] <TB2> INFO: 41600 events read in total (3371ms).
[19:28:36.836] <TB2> INFO: Test took 4240ms.
[19:28:36.839] <TB2> INFO: scanning low vcal = 70
[19:28:37.116] <TB2> INFO: Expecting 41600 events.
[19:28:41.053] <TB2> INFO: 41600 events read in total (3346ms).
[19:28:41.054] <TB2> INFO: Test took 4215ms.
[19:28:41.057] <TB2> INFO: scanning low vcal = 80
[19:28:41.334] <TB2> INFO: Expecting 41600 events.
[19:28:45.280] <TB2> INFO: 41600 events read in total (3355ms).
[19:28:45.281] <TB2> INFO: Test took 4224ms.
[19:28:45.283] <TB2> INFO: scanning low vcal = 90
[19:28:45.560] <TB2> INFO: Expecting 41600 events.
[19:28:49.483] <TB2> INFO: 41600 events read in total (3331ms).
[19:28:49.484] <TB2> INFO: Test took 4201ms.
[19:28:49.486] <TB2> INFO: scanning low vcal = 100
[19:28:49.763] <TB2> INFO: Expecting 41600 events.
[19:28:53.685] <TB2> INFO: 41600 events read in total (3330ms).
[19:28:53.685] <TB2> INFO: Test took 4198ms.
[19:28:53.688] <TB2> INFO: scanning low vcal = 110
[19:28:53.965] <TB2> INFO: Expecting 41600 events.
[19:28:57.925] <TB2> INFO: 41600 events read in total (3369ms).
[19:28:57.925] <TB2> INFO: Test took 4237ms.
[19:28:57.928] <TB2> INFO: scanning low vcal = 120
[19:28:58.205] <TB2> INFO: Expecting 41600 events.
[19:29:02.147] <TB2> INFO: 41600 events read in total (3351ms).
[19:29:02.148] <TB2> INFO: Test took 4220ms.
[19:29:02.150] <TB2> INFO: scanning low vcal = 130
[19:29:02.427] <TB2> INFO: Expecting 41600 events.
[19:29:06.359] <TB2> INFO: 41600 events read in total (3341ms).
[19:29:06.359] <TB2> INFO: Test took 4209ms.
[19:29:06.362] <TB2> INFO: scanning low vcal = 140
[19:29:06.639] <TB2> INFO: Expecting 41600 events.
[19:29:10.609] <TB2> INFO: 41600 events read in total (3379ms).
[19:29:10.609] <TB2> INFO: Test took 4247ms.
[19:29:10.612] <TB2> INFO: scanning low vcal = 150
[19:29:10.889] <TB2> INFO: Expecting 41600 events.
[19:29:14.831] <TB2> INFO: 41600 events read in total (3350ms).
[19:29:14.832] <TB2> INFO: Test took 4220ms.
[19:29:14.834] <TB2> INFO: scanning low vcal = 160
[19:29:15.111] <TB2> INFO: Expecting 41600 events.
[19:29:19.036] <TB2> INFO: 41600 events read in total (3333ms).
[19:29:19.037] <TB2> INFO: Test took 4202ms.
[19:29:19.040] <TB2> INFO: scanning low vcal = 170
[19:29:19.317] <TB2> INFO: Expecting 41600 events.
[19:29:23.293] <TB2> INFO: 41600 events read in total (3385ms).
[19:29:23.294] <TB2> INFO: Test took 4254ms.
[19:29:23.298] <TB2> INFO: scanning low vcal = 180
[19:29:23.574] <TB2> INFO: Expecting 41600 events.
[19:29:27.510] <TB2> INFO: 41600 events read in total (3345ms).
[19:29:27.510] <TB2> INFO: Test took 4212ms.
[19:29:27.513] <TB2> INFO: scanning low vcal = 190
[19:29:27.790] <TB2> INFO: Expecting 41600 events.
[19:29:31.772] <TB2> INFO: 41600 events read in total (3391ms).
[19:29:31.772] <TB2> INFO: Test took 4259ms.
[19:29:31.775] <TB2> INFO: scanning low vcal = 200
[19:29:32.052] <TB2> INFO: Expecting 41600 events.
[19:29:36.015] <TB2> INFO: 41600 events read in total (3371ms).
[19:29:36.016] <TB2> INFO: Test took 4241ms.
[19:29:36.019] <TB2> INFO: scanning low vcal = 210
[19:29:36.303] <TB2> INFO: Expecting 41600 events.
[19:29:40.229] <TB2> INFO: 41600 events read in total (3334ms).
[19:29:40.230] <TB2> INFO: Test took 4211ms.
[19:29:40.232] <TB2> INFO: scanning low vcal = 220
[19:29:40.509] <TB2> INFO: Expecting 41600 events.
[19:29:44.436] <TB2> INFO: 41600 events read in total (3335ms).
[19:29:44.437] <TB2> INFO: Test took 4205ms.
[19:29:44.441] <TB2> INFO: scanning low vcal = 230
[19:29:44.717] <TB2> INFO: Expecting 41600 events.
[19:29:48.654] <TB2> INFO: 41600 events read in total (3345ms).
[19:29:48.655] <TB2> INFO: Test took 4214ms.
[19:29:48.658] <TB2> INFO: scanning low vcal = 240
[19:29:48.934] <TB2> INFO: Expecting 41600 events.
[19:29:52.859] <TB2> INFO: 41600 events read in total (3333ms).
[19:29:52.860] <TB2> INFO: Test took 4202ms.
[19:29:52.862] <TB2> INFO: scanning low vcal = 250
[19:29:53.139] <TB2> INFO: Expecting 41600 events.
[19:29:57.097] <TB2> INFO: 41600 events read in total (3367ms).
[19:29:57.097] <TB2> INFO: Test took 4235ms.
[19:29:57.101] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[19:29:57.377] <TB2> INFO: Expecting 41600 events.
[19:30:01.327] <TB2> INFO: 41600 events read in total (3358ms).
[19:30:01.328] <TB2> INFO: Test took 4227ms.
[19:30:01.330] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[19:30:01.607] <TB2> INFO: Expecting 41600 events.
[19:30:05.545] <TB2> INFO: 41600 events read in total (3347ms).
[19:30:05.545] <TB2> INFO: Test took 4215ms.
[19:30:05.548] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[19:30:05.824] <TB2> INFO: Expecting 41600 events.
[19:30:09.772] <TB2> INFO: 41600 events read in total (3356ms).
[19:30:09.773] <TB2> INFO: Test took 4225ms.
[19:30:09.776] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[19:30:10.052] <TB2> INFO: Expecting 41600 events.
[19:30:14.174] <TB2> INFO: 41600 events read in total (3530ms).
[19:30:14.175] <TB2> INFO: Test took 4399ms.
[19:30:14.178] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:30:14.499] <TB2> INFO: Expecting 41600 events.
[19:30:18.427] <TB2> INFO: 41600 events read in total (3336ms).
[19:30:18.427] <TB2> INFO: Test took 4249ms.
[19:30:19.008] <TB2> INFO: PixTestGainPedestal::measure() done
[19:30:56.776] <TB2> INFO: PixTestGainPedestal::fit() done
[19:30:56.776] <TB2> INFO: non-linearity mean: 0.926 0.965 0.950 0.925 0.975 0.948 0.961 0.973 0.954 0.935 0.909 0.934 0.967 0.951 0.941 0.916
[19:30:56.776] <TB2> INFO: non-linearity RMS: 0.106 0.022 0.049 0.192 0.007 0.046 0.037 0.024 0.036 0.089 0.148 0.166 0.020 0.056 0.185 0.098
[19:30:56.776] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[19:30:56.799] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[19:30:56.823] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[19:30:56.845] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[19:30:56.868] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[19:30:56.891] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[19:30:56.914] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[19:30:56.936] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[19:30:56.959] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[19:30:56.981] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[19:30:57.003] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[19:30:57.026] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[19:30:57.048] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[19:30:57.071] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[19:30:57.088] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[19:30:57.111] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[19:30:57.133] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 164 seconds
[19:30:57.133] <TB2> INFO: Decoding statistics:
[19:30:57.133] <TB2> INFO: General information:
[19:30:57.133] <TB2> INFO: 16bit words read: 3312252
[19:30:57.133] <TB2> INFO: valid events total: 332800
[19:30:57.133] <TB2> INFO: empty events: 159
[19:30:57.133] <TB2> INFO: valid events with pixels: 332641
[19:30:57.133] <TB2> INFO: valid pixel hits: 657726
[19:30:57.133] <TB2> INFO: Event errors: 0
[19:30:57.133] <TB2> INFO: start marker: 0
[19:30:57.133] <TB2> INFO: stop marker: 0
[19:30:57.133] <TB2> INFO: overflow: 0
[19:30:57.133] <TB2> INFO: invalid 5bit words: 0
[19:30:57.133] <TB2> INFO: invalid XOR eye diagram: 0
[19:30:57.133] <TB2> INFO: frame (failed synchr.): 0
[19:30:57.133] <TB2> INFO: idle data (no TBM trl): 0
[19:30:57.133] <TB2> INFO: no data (only TBM hdr): 0
[19:30:57.133] <TB2> INFO: TBM errors: 0
[19:30:57.133] <TB2> INFO: flawed TBM headers: 0
[19:30:57.133] <TB2> INFO: flawed TBM trailers: 0
[19:30:57.133] <TB2> INFO: event ID mismatches: 0
[19:30:57.133] <TB2> INFO: ROC errors: 0
[19:30:57.133] <TB2> INFO: missing ROC header(s): 0
[19:30:57.133] <TB2> INFO: misplaced readback start: 0
[19:30:57.133] <TB2> INFO: Pixel decoding errors: 0
[19:30:57.133] <TB2> INFO: pixel data incomplete: 0
[19:30:57.133] <TB2> INFO: pixel address: 0
[19:30:57.133] <TB2> INFO: pulse height fill bit: 0
[19:30:57.133] <TB2> INFO: buffer corruption: 0
[19:30:57.154] <TB2> INFO: Decoding statistics:
[19:30:57.154] <TB2> INFO: General information:
[19:30:57.154] <TB2> INFO: 16bit words read: 3441672
[19:30:57.154] <TB2> INFO: valid events total: 353536
[19:30:57.154] <TB2> INFO: empty events: 18393
[19:30:57.154] <TB2> INFO: valid events with pixels: 335143
[19:30:57.154] <TB2> INFO: valid pixel hits: 660228
[19:30:57.154] <TB2> INFO: Event errors: 0
[19:30:57.154] <TB2> INFO: start marker: 0
[19:30:57.154] <TB2> INFO: stop marker: 0
[19:30:57.154] <TB2> INFO: overflow: 0
[19:30:57.154] <TB2> INFO: invalid 5bit words: 0
[19:30:57.154] <TB2> INFO: invalid XOR eye diagram: 0
[19:30:57.154] <TB2> INFO: frame (failed synchr.): 0
[19:30:57.154] <TB2> INFO: idle data (no TBM trl): 0
[19:30:57.154] <TB2> INFO: no data (only TBM hdr): 0
[19:30:57.154] <TB2> INFO: TBM errors: 0
[19:30:57.154] <TB2> INFO: flawed TBM headers: 0
[19:30:57.154] <TB2> INFO: flawed TBM trailers: 0
[19:30:57.154] <TB2> INFO: event ID mismatches: 0
[19:30:57.154] <TB2> INFO: ROC errors: 0
[19:30:57.154] <TB2> INFO: missing ROC header(s): 0
[19:30:57.154] <TB2> INFO: misplaced readback start: 0
[19:30:57.154] <TB2> INFO: Pixel decoding errors: 0
[19:30:57.154] <TB2> INFO: pixel data incomplete: 0
[19:30:57.154] <TB2> INFO: pixel address: 0
[19:30:57.154] <TB2> INFO: pulse height fill bit: 0
[19:30:57.154] <TB2> INFO: buffer corruption: 0
[19:30:57.154] <TB2> INFO: enter test to run
[19:30:57.154] <TB2> INFO: test: Trim80 no parameter change
[19:30:57.154] <TB2> INFO: running: trim80
[19:30:57.177] <TB2> INFO: ######################################################################
[19:30:57.177] <TB2> INFO: PixTestTrim80::doTest()
[19:30:57.177] <TB2> INFO: ######################################################################
[19:30:57.178] <TB2> INFO: ----------------------------------------------------------------------
[19:30:57.178] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[19:30:57.178] <TB2> INFO: ----------------------------------------------------------------------
[19:30:57.218] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:30:57.218] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:30:57.229] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:30:57.229] <TB2> INFO: run 1 of 1
[19:30:57.517] <TB2> INFO: Expecting 5025280 events.
[19:31:24.820] <TB2> INFO: 674752 events read in total (26712ms).
[19:31:51.428] <TB2> INFO: 1344336 events read in total (53320ms).
[19:32:18.236] <TB2> INFO: 2012208 events read in total (80128ms).
[19:32:44.651] <TB2> INFO: 2678248 events read in total (106543ms).
[19:33:11.204] <TB2> INFO: 3341968 events read in total (133096ms).
[19:33:37.759] <TB2> INFO: 4004304 events read in total (159651ms).
[19:34:04.081] <TB2> INFO: 4665600 events read in total (185973ms).
[19:34:18.465] <TB2> INFO: 5025280 events read in total (200357ms).
[19:34:18.527] <TB2> INFO: Test took 201298ms.
[19:34:43.053] <TB2> INFO: ROC 0 VthrComp = 76
[19:34:43.054] <TB2> INFO: ROC 1 VthrComp = 76
[19:34:43.054] <TB2> INFO: ROC 2 VthrComp = 73
[19:34:43.054] <TB2> INFO: ROC 3 VthrComp = 63
[19:34:43.054] <TB2> INFO: ROC 4 VthrComp = 74
[19:34:43.054] <TB2> INFO: ROC 5 VthrComp = 80
[19:34:43.054] <TB2> INFO: ROC 6 VthrComp = 70
[19:34:43.054] <TB2> INFO: ROC 7 VthrComp = 78
[19:34:43.055] <TB2> INFO: ROC 8 VthrComp = 81
[19:34:43.055] <TB2> INFO: ROC 9 VthrComp = 82
[19:34:43.055] <TB2> INFO: ROC 10 VthrComp = 86
[19:34:43.055] <TB2> INFO: ROC 11 VthrComp = 71
[19:34:43.055] <TB2> INFO: ROC 12 VthrComp = 70
[19:34:43.055] <TB2> INFO: ROC 13 VthrComp = 69
[19:34:43.055] <TB2> INFO: ROC 14 VthrComp = 73
[19:34:43.055] <TB2> INFO: ROC 15 VthrComp = 78
[19:34:43.290] <TB2> INFO: Expecting 41600 events.
[19:34:46.844] <TB2> INFO: 41600 events read in total (2962ms).
[19:34:46.845] <TB2> INFO: Test took 3788ms.
[19:34:46.854] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:34:46.854] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:34:46.863] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:34:46.863] <TB2> INFO: run 1 of 1
[19:34:47.141] <TB2> INFO: Expecting 5025280 events.
[19:35:14.855] <TB2> INFO: 684576 events read in total (27122ms).
[19:35:41.621] <TB2> INFO: 1365176 events read in total (53888ms).
[19:36:08.512] <TB2> INFO: 2045816 events read in total (80779ms).
[19:36:35.692] <TB2> INFO: 2722744 events read in total (107959ms).
[19:37:02.287] <TB2> INFO: 3395344 events read in total (134554ms).
[19:37:29.161] <TB2> INFO: 4066304 events read in total (161428ms).
[19:37:55.757] <TB2> INFO: 4736216 events read in total (188024ms).
[19:38:07.344] <TB2> INFO: 5025280 events read in total (199611ms).
[19:38:07.389] <TB2> INFO: Test took 200526ms.
[19:38:30.154] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 109.301 for pixel 0/6 mean/min/max = 93.3192/77.2776/109.361
[19:38:30.155] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 107.619 for pixel 0/63 mean/min/max = 92.8299/78.016/107.644
[19:38:30.155] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 107.999 for pixel 10/79 mean/min/max = 93.0927/78.0875/108.098
[19:38:30.156] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 103.861 for pixel 2/70 mean/min/max = 89.7835/75.4817/104.085
[19:38:30.156] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 106.041 for pixel 18/74 mean/min/max = 91.912/77.5888/106.235
[19:38:30.156] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 106.064 for pixel 51/16 mean/min/max = 90.4845/74.8697/106.099
[19:38:30.157] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 104.833 for pixel 21/73 mean/min/max = 89.6484/73.9749/105.322
[19:38:30.157] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 108.221 for pixel 0/8 mean/min/max = 93.1173/77.9046/108.33
[19:38:30.158] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 108.426 for pixel 0/42 mean/min/max = 91.7917/75.1085/108.475
[19:38:30.158] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 108.896 for pixel 51/70 mean/min/max = 91.4231/73.8168/109.029
[19:38:30.159] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 107.199 for pixel 0/68 mean/min/max = 90.5864/73.929/107.244
[19:38:30.159] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 105.182 for pixel 0/75 mean/min/max = 89.6603/74.1146/105.206
[19:38:30.159] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 106.604 for pixel 1/77 mean/min/max = 89.9274/73.248/106.607
[19:38:30.160] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 106.725 for pixel 2/73 mean/min/max = 90.512/74.1236/106.9
[19:38:30.160] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 110.225 for pixel 0/18 mean/min/max = 93.6566/77.0571/110.256
[19:38:30.160] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 109.635 for pixel 0/46 mean/min/max = 93.6139/77.3895/109.838
[19:38:30.161] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:38:30.249] <TB2> INFO: Expecting 411648 events.
[19:38:39.754] <TB2> INFO: 411648 events read in total (8913ms).
[19:38:39.761] <TB2> INFO: Expecting 411648 events.
[19:38:48.904] <TB2> INFO: 411648 events read in total (8740ms).
[19:38:48.916] <TB2> INFO: Expecting 411648 events.
[19:38:57.991] <TB2> INFO: 411648 events read in total (8672ms).
[19:38:58.003] <TB2> INFO: Expecting 411648 events.
[19:39:07.109] <TB2> INFO: 411648 events read in total (8703ms).
[19:39:07.123] <TB2> INFO: Expecting 411648 events.
[19:39:16.136] <TB2> INFO: 411648 events read in total (8610ms).
[19:39:16.153] <TB2> INFO: Expecting 411648 events.
[19:39:25.233] <TB2> INFO: 411648 events read in total (8677ms).
[19:39:25.254] <TB2> INFO: Expecting 411648 events.
[19:39:34.371] <TB2> INFO: 411648 events read in total (8714ms).
[19:39:34.393] <TB2> INFO: Expecting 411648 events.
[19:39:43.392] <TB2> INFO: 411648 events read in total (8596ms).
[19:39:43.425] <TB2> INFO: Expecting 411648 events.
[19:39:52.437] <TB2> INFO: 411648 events read in total (8609ms).
[19:39:52.465] <TB2> INFO: Expecting 411648 events.
[19:40:01.620] <TB2> INFO: 411648 events read in total (8753ms).
[19:40:01.649] <TB2> INFO: Expecting 411648 events.
[19:40:10.766] <TB2> INFO: 411648 events read in total (8714ms).
[19:40:10.800] <TB2> INFO: Expecting 411648 events.
[19:40:19.939] <TB2> INFO: 411648 events read in total (8736ms).
[19:40:19.987] <TB2> INFO: Expecting 411648 events.
[19:40:29.004] <TB2> INFO: 411648 events read in total (8614ms).
[19:40:29.040] <TB2> INFO: Expecting 411648 events.
[19:40:38.147] <TB2> INFO: 411648 events read in total (8704ms).
[19:40:38.189] <TB2> INFO: Expecting 411648 events.
[19:40:47.276] <TB2> INFO: 411648 events read in total (8684ms).
[19:40:47.318] <TB2> INFO: Expecting 411648 events.
[19:40:56.371] <TB2> INFO: 411648 events read in total (8650ms).
[19:40:56.418] <TB2> INFO: Test took 146257ms.
[19:40:58.075] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:40:58.087] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:40:58.087] <TB2> INFO: run 1 of 1
[19:40:58.343] <TB2> INFO: Expecting 5025280 events.
[19:41:25.862] <TB2> INFO: 667736 events read in total (26927ms).
[19:41:52.723] <TB2> INFO: 1332360 events read in total (53788ms).
[19:42:19.274] <TB2> INFO: 1996360 events read in total (80339ms).
[19:42:45.711] <TB2> INFO: 2658648 events read in total (106776ms).
[19:43:11.862] <TB2> INFO: 3316256 events read in total (132927ms).
[19:43:38.308] <TB2> INFO: 3972440 events read in total (159373ms).
[19:44:04.263] <TB2> INFO: 4625856 events read in total (185328ms).
[19:44:20.370] <TB2> INFO: 5025280 events read in total (201435ms).
[19:44:20.437] <TB2> INFO: Test took 202350ms.
[19:44:44.216] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 52.670467 .. 104.063727
[19:44:44.500] <TB2> INFO: Expecting 208000 events.
[19:44:54.119] <TB2> INFO: 208000 events read in total (9027ms).
[19:44:54.120] <TB2> INFO: Test took 9903ms.
[19:44:54.165] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 114 (-1/-1) hits flags = 528 (plus default)
[19:44:54.175] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:44:54.175] <TB2> INFO: run 1 of 1
[19:44:54.452] <TB2> INFO: Expecting 2429440 events.
[19:45:22.073] <TB2> INFO: 681008 events read in total (27029ms).
[19:45:49.519] <TB2> INFO: 1359416 events read in total (54475ms).
[19:46:16.421] <TB2> INFO: 2028464 events read in total (81377ms).
[19:46:32.922] <TB2> INFO: 2429440 events read in total (97878ms).
[19:46:32.953] <TB2> INFO: Test took 98778ms.
[19:46:51.713] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 62.138120 .. 94.434047
[19:46:51.986] <TB2> INFO: Expecting 208000 events.
[19:47:01.427] <TB2> INFO: 208000 events read in total (8849ms).
[19:47:01.427] <TB2> INFO: Test took 9713ms.
[19:47:01.473] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 52 .. 104 (-1/-1) hits flags = 528 (plus default)
[19:47:01.482] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:47:01.482] <TB2> INFO: run 1 of 1
[19:47:01.759] <TB2> INFO: Expecting 1763840 events.
[19:47:30.012] <TB2> INFO: 681632 events read in total (27661ms).
[19:47:57.142] <TB2> INFO: 1362472 events read in total (54791ms).
[19:48:13.628] <TB2> INFO: 1763840 events read in total (71277ms).
[19:48:13.662] <TB2> INFO: Test took 72181ms.
[19:48:30.479] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 65.426795 .. 89.171164
[19:48:30.712] <TB2> INFO: Expecting 208000 events.
[19:48:40.494] <TB2> INFO: 208000 events read in total (9191ms).
[19:48:40.495] <TB2> INFO: Test took 10015ms.
[19:48:40.575] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 55 .. 99 (-1/-1) hits flags = 528 (plus default)
[19:48:40.588] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:48:40.588] <TB2> INFO: run 1 of 1
[19:48:40.866] <TB2> INFO: Expecting 1497600 events.
[19:49:09.105] <TB2> INFO: 692128 events read in total (27648ms).
[19:49:36.890] <TB2> INFO: 1383304 events read in total (55433ms).
[19:49:41.947] <TB2> INFO: 1497600 events read in total (60490ms).
[19:49:41.969] <TB2> INFO: Test took 61381ms.
[19:49:58.327] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 69.736258 .. 88.575021
[19:49:58.562] <TB2> INFO: Expecting 208000 events.
[19:50:08.200] <TB2> INFO: 208000 events read in total (9046ms).
[19:50:08.200] <TB2> INFO: Test took 9871ms.
[19:50:08.247] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 59 .. 98 (-1/-1) hits flags = 528 (plus default)
[19:50:08.257] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:50:08.258] <TB2> INFO: run 1 of 1
[19:50:08.535] <TB2> INFO: Expecting 1331200 events.
[19:50:37.078] <TB2> INFO: 683248 events read in total (27951ms).
[19:51:03.243] <TB2> INFO: 1331200 events read in total (54116ms).
[19:51:03.266] <TB2> INFO: Test took 55008ms.
[19:51:20.437] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[19:51:20.437] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[19:51:20.449] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:51:20.449] <TB2> INFO: run 1 of 1
[19:51:20.713] <TB2> INFO: Expecting 1364480 events.
[19:51:48.705] <TB2> INFO: 668736 events read in total (27400ms).
[19:52:15.343] <TB2> INFO: 1336920 events read in total (54038ms).
[19:52:16.902] <TB2> INFO: 1364480 events read in total (55597ms).
[19:52:16.920] <TB2> INFO: Test took 56472ms.
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C0.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C1.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C2.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C3.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C4.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C5.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C6.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C7.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C8.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C9.dat
[19:52:35.414] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C10.dat
[19:52:35.415] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C11.dat
[19:52:35.415] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C12.dat
[19:52:35.415] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C13.dat
[19:52:35.415] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C14.dat
[19:52:35.415] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//dacParameters80_C15.dat
[19:52:35.415] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C0.dat
[19:52:35.421] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C1.dat
[19:52:35.426] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C2.dat
[19:52:35.432] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C3.dat
[19:52:35.438] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C4.dat
[19:52:35.443] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C5.dat
[19:52:35.449] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C6.dat
[19:52:35.454] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C7.dat
[19:52:35.459] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C8.dat
[19:52:35.465] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C9.dat
[19:52:35.470] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C10.dat
[19:52:35.476] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C11.dat
[19:52:35.481] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C12.dat
[19:52:35.488] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C13.dat
[19:52:35.496] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C14.dat
[19:52:35.503] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1114_FullQualification_2016-11-02_15h29m_1478096993//003_FulltestTrim80_p17//trimParameters80_C15.dat
[19:52:35.510] <TB2> INFO: PixTestTrim80::trimTest() done
[19:52:35.510] <TB2> INFO: vtrim: 100 106 121 86 96 103 79 94 111 117 104 99 96 102 99 110
[19:52:35.510] <TB2> INFO: vthrcomp: 76 76 73 63 74 80 70 78 81 82 86 71 70 69 73 78
[19:52:35.510] <TB2> INFO: vcal mean: 79.98 79.96 80.01 79.95 79.98 79.94 79.93 80.00 79.95 79.95 79.94 79.98 79.93 79.98 79.99 79.96
[19:52:35.510] <TB2> INFO: vcal RMS: 0.69 0.73 0.70 0.73 0.70 0.76 0.75 0.72 0.79 0.78 1.91 0.73 0.82 0.76 0.78 0.75
[19:52:35.510] <TB2> INFO: bits mean: 9.26 9.94 9.85 10.51 9.70 10.47 10.58 9.07 10.35 10.53 10.44 10.70 10.85 10.56 9.38 9.33
[19:52:35.510] <TB2> INFO: bits RMS: 2.37 2.07 2.05 2.21 2.23 2.25 2.43 2.37 2.27 2.28 2.39 2.29 2.30 2.32 2.36 2.35
[19:52:35.518] <TB2> INFO: ----------------------------------------------------------------------
[19:52:35.518] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:52:35.518] <TB2> INFO: ----------------------------------------------------------------------
[19:52:35.520] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:52:35.529] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:52:35.529] <TB2> INFO: run 1 of 1
[19:52:35.781] <TB2> INFO: Expecting 4160000 events.
[19:53:07.558] <TB2> INFO: 751555 events read in total (31186ms).
[19:53:38.853] <TB2> INFO: 1495765 events read in total (62481ms).
[19:54:10.080] <TB2> INFO: 2236900 events read in total (93708ms).
[19:54:41.626] <TB2> INFO: 2972335 events read in total (125254ms).
[19:55:12.971] <TB2> INFO: 3705530 events read in total (156599ms).
[19:55:32.171] <TB2> INFO: 4160000 events read in total (175799ms).
[19:55:32.227] <TB2> INFO: Test took 176697ms.
[19:55:59.951] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[19:55:59.962] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:55:59.962] <TB2> INFO: run 1 of 1
[19:56:00.195] <TB2> INFO: Expecting 4284800 events.
[19:56:31.479] <TB2> INFO: 720600 events read in total (30693ms).
[19:57:01.954] <TB2> INFO: 1435550 events read in total (61168ms).
[19:57:32.673] <TB2> INFO: 2148695 events read in total (91887ms).
[19:58:03.188] <TB2> INFO: 2856135 events read in total (122402ms).
[19:58:33.919] <TB2> INFO: 3562710 events read in total (153133ms).
[19:59:04.465] <TB2> INFO: 4270365 events read in total (183679ms).
[19:59:05.457] <TB2> INFO: 4284800 events read in total (184671ms).
[19:59:05.516] <TB2> INFO: Test took 185553ms.
[19:59:33.923] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[19:59:33.932] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:59:33.932] <TB2> INFO: run 1 of 1
[19:59:34.164] <TB2> INFO: Expecting 4118400 events.
[20:00:05.830] <TB2> INFO: 731115 events read in total (31075ms).
[20:00:36.664] <TB2> INFO: 1456180 events read in total (61909ms).
[20:01:07.762] <TB2> INFO: 2178885 events read in total (93007ms).
[20:01:38.883] <TB2> INFO: 2896230 events read in total (124128ms).
[20:02:09.370] <TB2> INFO: 3611610 events read in total (154615ms).
[20:02:31.096] <TB2> INFO: 4118400 events read in total (176341ms).
[20:02:31.184] <TB2> INFO: Test took 177251ms.
[20:03:00.137] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[20:03:00.147] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:03:00.147] <TB2> INFO: run 1 of 1
[20:03:00.380] <TB2> INFO: Expecting 4139200 events.
[20:03:32.005] <TB2> INFO: 729700 events read in total (31033ms).
[20:04:03.197] <TB2> INFO: 1453300 events read in total (62225ms).
[20:04:34.071] <TB2> INFO: 2174765 events read in total (93099ms).
[20:05:05.131] <TB2> INFO: 2891020 events read in total (124159ms).
[20:05:35.886] <TB2> INFO: 3605370 events read in total (154914ms).
[20:05:58.900] <TB2> INFO: 4139200 events read in total (177928ms).
[20:05:58.977] <TB2> INFO: Test took 178830ms.
[20:06:25.973] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[20:06:25.984] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:06:25.984] <TB2> INFO: run 1 of 1
[20:06:26.216] <TB2> INFO: Expecting 4118400 events.
[20:06:57.899] <TB2> INFO: 731255 events read in total (31092ms).
[20:07:28.956] <TB2> INFO: 1456215 events read in total (62149ms).
[20:07:59.917] <TB2> INFO: 2178770 events read in total (93110ms).
[20:08:30.853] <TB2> INFO: 2896235 events read in total (124046ms).
[20:09:02.584] <TB2> INFO: 3611775 events read in total (155777ms).
[20:09:25.199] <TB2> INFO: 4118400 events read in total (178392ms).
[20:09:25.275] <TB2> INFO: Test took 179291ms.
[20:09:48.139] <TB2> INFO: PixTestTrim80::trimBitTest() done
[20:09:48.140] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2330 seconds
[20:09:48.762] <TB2> INFO: enter test to run
[20:09:48.762] <TB2> INFO: test: exit no parameter change
[20:09:48.857] <TB2> QUIET: Connection to board 156 closed.
[20:09:48.857] <TB2> INFO: pXar: this is the end, my friend