[16:10:22.456] <TB1> INFO: *** Welcome to pxar ***
[16:10:22.456] <TB1> INFO: *** Today: 2016/11/02
[16:10:22.462] <TB1> INFO: *** Version: c8ba-dirty
[16:10:22.462] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C15.dat
[16:10:22.462] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C1b.dat
[16:10:22.462] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//defaultMaskFile.dat
[16:10:22.462] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters_C15.dat
[16:10:22.525] <TB1> INFO: clk: 4
[16:10:22.525] <TB1> INFO: ctr: 4
[16:10:22.525] <TB1> INFO: sda: 19
[16:10:22.525] <TB1> INFO: tin: 9
[16:10:22.525] <TB1> INFO: level: 15
[16:10:22.525] <TB1> INFO: triggerdelay: 0
[16:10:22.525] <TB1> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[16:10:22.525] <TB1> INFO: Log level: INFO
[16:10:22.534] <TB1> INFO: Found DTB DTB_WXC03A
[16:10:22.545] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[16:10:22.547] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
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[16:10:22.549] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[16:10:24.037] <TB1> INFO: DUT info:
[16:10:24.037] <TB1> INFO: The DUT currently contains the following objects:
[16:10:24.037] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[16:10:24.037] <TB1> INFO: TBM Core alpha (0): 7 registers set
[16:10:24.037] <TB1> INFO: TBM Core beta (1): 7 registers set
[16:10:24.037] <TB1> INFO: TBM Core alpha (2): 7 registers set
[16:10:24.037] <TB1> INFO: TBM Core beta (3): 7 registers set
[16:10:24.037] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:10:24.037] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.037] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.038] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.038] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.038] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.038] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.038] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:10:24.438] <TB1> INFO: enter 'restricted' command line mode
[16:10:24.438] <TB1> INFO: enter test to run
[16:10:24.438] <TB1> INFO: test: pretest no parameter change
[16:10:24.439] <TB1> INFO: running: pretest
[16:10:24.444] <TB1> INFO: ######################################################################
[16:10:24.444] <TB1> INFO: PixTestPretest::doTest()
[16:10:24.444] <TB1> INFO: ######################################################################
[16:10:24.445] <TB1> INFO: ----------------------------------------------------------------------
[16:10:24.445] <TB1> INFO: PixTestPretest::programROC()
[16:10:24.445] <TB1> INFO: ----------------------------------------------------------------------
[16:10:42.459] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:10:42.459] <TB1> INFO: IA differences per ROC: 18.5 17.7 17.7 19.3 19.3 20.1 16.9 16.1 20.1 20.1 17.7 19.3 19.3 16.9 19.3 19.3
[16:10:42.518] <TB1> INFO: ----------------------------------------------------------------------
[16:10:42.518] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:10:42.518] <TB1> INFO: ----------------------------------------------------------------------
[16:10:50.324] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[16:10:50.324] <TB1> INFO: i(loss) [mA/ROC]: 20.9 19.3 19.3 19.3 20.1 18.5 19.3 20.1 20.1 20.1 20.9 20.1 20.1 20.9 20.1 19.3
[16:10:50.358] <TB1> INFO: ----------------------------------------------------------------------
[16:10:50.359] <TB1> INFO: PixTestPretest::findTiming()
[16:10:50.359] <TB1> INFO: ----------------------------------------------------------------------
[16:10:50.359] <TB1> INFO: PixTestCmd::init()

[16:11:22.714] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:11:22.714] <TB1> INFO: (success/tries = 100/100), width = 3
[16:11:24.227] <TB1> INFO: ----------------------------------------------------------------------
[16:11:24.227] <TB1> INFO: PixTestPretest::findWorkingPixel()
[16:11:24.227] <TB1> INFO: ----------------------------------------------------------------------
[16:11:24.322] <TB1> INFO: Expecting 231680 events.
[16:11:34.308] <TB1> INFO: 231680 events read in total (9394ms).
[16:11:34.318] <TB1> INFO: Test took 10086ms.
[16:11:34.557] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:11:34.592] <TB1> INFO: ----------------------------------------------------------------------
[16:11:34.592] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:11:34.592] <TB1> INFO: ----------------------------------------------------------------------
[16:11:34.688] <TB1> INFO: Expecting 231680 events.
[16:11:44.603] <TB1> INFO: 231680 events read in total (9323ms).
[16:11:44.614] <TB1> INFO: Test took 10016ms.
[16:11:44.867] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:11:44.867] <TB1> INFO: CalDel: 94 71 76 90 90 90 77 80 97 111 102 89 94 80 87 86
[16:11:44.867] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 53 51 51 51 51 51 51 51
[16:11:44.870] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C0.dat
[16:11:44.870] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C1.dat
[16:11:44.870] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C2.dat
[16:11:44.870] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C3.dat
[16:11:44.870] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C4.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C5.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C6.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C7.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C8.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C9.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C10.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C11.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C12.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C13.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C14.dat
[16:11:44.871] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters_C15.dat
[16:11:44.872] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C0a.dat
[16:11:44.872] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C0b.dat
[16:11:44.872] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C1a.dat
[16:11:44.872] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//tbmParameters_C1b.dat
[16:11:44.872] <TB1> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[16:11:44.924] <TB1> INFO: enter test to run
[16:11:44.924] <TB1> INFO: test: FullTest no parameter change
[16:11:44.924] <TB1> INFO: running: fulltest
[16:11:44.925] <TB1> INFO: ######################################################################
[16:11:44.925] <TB1> INFO: PixTestFullTest::doTest()
[16:11:44.925] <TB1> INFO: ######################################################################
[16:11:44.926] <TB1> INFO: ######################################################################
[16:11:44.926] <TB1> INFO: PixTestAlive::doTest()
[16:11:44.926] <TB1> INFO: ######################################################################
[16:11:44.928] <TB1> INFO: ----------------------------------------------------------------------
[16:11:44.928] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:11:44.928] <TB1> INFO: ----------------------------------------------------------------------
[16:11:45.167] <TB1> INFO: Expecting 41600 events.
[16:11:48.780] <TB1> INFO: 41600 events read in total (3021ms).
[16:11:48.781] <TB1> INFO: Test took 3852ms.
[16:11:49.014] <TB1> INFO: PixTestAlive::aliveTest() done
[16:11:49.014] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
[16:11:49.016] <TB1> INFO: ----------------------------------------------------------------------
[16:11:49.016] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:11:49.016] <TB1> INFO: ----------------------------------------------------------------------
[16:11:49.262] <TB1> INFO: Expecting 41600 events.
[16:11:52.334] <TB1> INFO: 41600 events read in total (2480ms).
[16:11:52.334] <TB1> INFO: Test took 3314ms.
[16:11:52.334] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:11:52.572] <TB1> INFO: PixTestAlive::maskTest() done
[16:11:52.572] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:11:52.574] <TB1> INFO: ----------------------------------------------------------------------
[16:11:52.574] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:11:52.574] <TB1> INFO: ----------------------------------------------------------------------
[16:11:52.812] <TB1> INFO: Expecting 41600 events.
[16:11:56.320] <TB1> INFO: 41600 events read in total (2916ms).
[16:11:56.320] <TB1> INFO: Test took 3744ms.
[16:11:56.557] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:11:56.557] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:11:56.558] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:11:56.558] <TB1> INFO: Decoding statistics:
[16:11:56.558] <TB1> INFO: General information:
[16:11:56.558] <TB1> INFO: 16bit words read: 0
[16:11:56.558] <TB1> INFO: valid events total: 0
[16:11:56.558] <TB1> INFO: empty events: 0
[16:11:56.558] <TB1> INFO: valid events with pixels: 0
[16:11:56.558] <TB1> INFO: valid pixel hits: 0
[16:11:56.558] <TB1> INFO: Event errors: 0
[16:11:56.558] <TB1> INFO: start marker: 0
[16:11:56.558] <TB1> INFO: stop marker: 0
[16:11:56.558] <TB1> INFO: overflow: 0
[16:11:56.558] <TB1> INFO: invalid 5bit words: 0
[16:11:56.558] <TB1> INFO: invalid XOR eye diagram: 0
[16:11:56.558] <TB1> INFO: frame (failed synchr.): 0
[16:11:56.558] <TB1> INFO: idle data (no TBM trl): 0
[16:11:56.558] <TB1> INFO: no data (only TBM hdr): 0
[16:11:56.558] <TB1> INFO: TBM errors: 0
[16:11:56.558] <TB1> INFO: flawed TBM headers: 0
[16:11:56.558] <TB1> INFO: flawed TBM trailers: 0
[16:11:56.558] <TB1> INFO: event ID mismatches: 0
[16:11:56.558] <TB1> INFO: ROC errors: 0
[16:11:56.558] <TB1> INFO: missing ROC header(s): 0
[16:11:56.558] <TB1> INFO: misplaced readback start: 0
[16:11:56.558] <TB1> INFO: Pixel decoding errors: 0
[16:11:56.558] <TB1> INFO: pixel data incomplete: 0
[16:11:56.558] <TB1> INFO: pixel address: 0
[16:11:56.558] <TB1> INFO: pulse height fill bit: 0
[16:11:56.558] <TB1> INFO: buffer corruption: 0
[16:11:56.565] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C15.dat
[16:11:56.565] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:11:56.565] <TB1> INFO: ######################################################################
[16:11:56.565] <TB1> INFO: PixTestReadback::doTest()
[16:11:56.565] <TB1> INFO: ######################################################################
[16:11:56.565] <TB1> INFO: ----------------------------------------------------------------------
[16:11:56.565] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:11:56.565] <TB1> INFO: ----------------------------------------------------------------------
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C0.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C1.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C2.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C3.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C4.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C5.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C6.dat
[16:12:06.527] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C7.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C8.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C9.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C10.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C11.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C12.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C13.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C14.dat
[16:12:06.528] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C15.dat
[16:12:06.561] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:12:06.561] <TB1> INFO: ----------------------------------------------------------------------
[16:12:06.561] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:12:06.561] <TB1> INFO: ----------------------------------------------------------------------
[16:12:16.492] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C0.dat
[16:12:16.492] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C1.dat
[16:12:16.492] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C2.dat
[16:12:16.492] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C3.dat
[16:12:16.492] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C4.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C5.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C6.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C7.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C8.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C9.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C10.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C11.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C12.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C13.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C14.dat
[16:12:16.493] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C15.dat
[16:12:16.525] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:12:16.525] <TB1> INFO: ----------------------------------------------------------------------
[16:12:16.525] <TB1> INFO: PixTestReadback::readbackVbg()
[16:12:16.525] <TB1> INFO: ----------------------------------------------------------------------
[16:12:24.199] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:12:24.200] <TB1> INFO: ----------------------------------------------------------------------
[16:12:24.200] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:12:24.200] <TB1> INFO: ----------------------------------------------------------------------
[16:12:24.200] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.3calibrated Vbg = 1.18318 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 158calibrated Vbg = 1.17529 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 142calibrated Vbg = 1.17068 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.6calibrated Vbg = 1.17542 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.3calibrated Vbg = 1.18102 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 141.3calibrated Vbg = 1.18477 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 144.6calibrated Vbg = 1.18508 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.8calibrated Vbg = 1.1845 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159.2calibrated Vbg = 1.17827 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151.1calibrated Vbg = 1.17387 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.1calibrated Vbg = 1.16719 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.6calibrated Vbg = 1.16641 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.1calibrated Vbg = 1.16601 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.2calibrated Vbg = 1.17365 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.1calibrated Vbg = 1.17573 :::*/*/*/*/
[16:12:24.200] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.7calibrated Vbg = 1.17707 :::*/*/*/*/
[16:12:24.202] <TB1> INFO: ----------------------------------------------------------------------
[16:12:24.203] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:12:24.203] <TB1> INFO: ----------------------------------------------------------------------
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C0.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C1.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C2.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C3.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C4.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C5.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C6.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C7.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C8.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C9.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C10.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C11.dat
[16:15:05.063] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C12.dat
[16:15:05.064] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C13.dat
[16:15:05.064] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C14.dat
[16:15:05.064] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//readbackCal_C15.dat
[16:15:05.093] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:15:05.095] <TB1> INFO: PixTestReadback::doTest() done
[16:15:05.095] <TB1> INFO: Decoding statistics:
[16:15:05.095] <TB1> INFO: General information:
[16:15:05.095] <TB1> INFO: 16bit words read: 1536
[16:15:05.095] <TB1> INFO: valid events total: 256
[16:15:05.095] <TB1> INFO: empty events: 256
[16:15:05.095] <TB1> INFO: valid events with pixels: 0
[16:15:05.095] <TB1> INFO: valid pixel hits: 0
[16:15:05.095] <TB1> INFO: Event errors: 0
[16:15:05.095] <TB1> INFO: start marker: 0
[16:15:05.095] <TB1> INFO: stop marker: 0
[16:15:05.095] <TB1> INFO: overflow: 0
[16:15:05.095] <TB1> INFO: invalid 5bit words: 0
[16:15:05.095] <TB1> INFO: invalid XOR eye diagram: 0
[16:15:05.095] <TB1> INFO: frame (failed synchr.): 0
[16:15:05.095] <TB1> INFO: idle data (no TBM trl): 0
[16:15:05.095] <TB1> INFO: no data (only TBM hdr): 0
[16:15:05.095] <TB1> INFO: TBM errors: 0
[16:15:05.095] <TB1> INFO: flawed TBM headers: 0
[16:15:05.095] <TB1> INFO: flawed TBM trailers: 0
[16:15:05.096] <TB1> INFO: event ID mismatches: 0
[16:15:05.096] <TB1> INFO: ROC errors: 0
[16:15:05.096] <TB1> INFO: missing ROC header(s): 0
[16:15:05.096] <TB1> INFO: misplaced readback start: 0
[16:15:05.096] <TB1> INFO: Pixel decoding errors: 0
[16:15:05.096] <TB1> INFO: pixel data incomplete: 0
[16:15:05.096] <TB1> INFO: pixel address: 0
[16:15:05.096] <TB1> INFO: pulse height fill bit: 0
[16:15:05.096] <TB1> INFO: buffer corruption: 0
[16:15:05.148] <TB1> INFO: ######################################################################
[16:15:05.148] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:15:05.148] <TB1> INFO: ######################################################################
[16:15:05.151] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:15:05.174] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:15:05.174] <TB1> INFO: run 1 of 1
[16:15:05.413] <TB1> INFO: Expecting 3120000 events.
[16:15:36.798] <TB1> INFO: 656770 events read in total (30793ms).











[16:16:07.222] <TB1> INFO: 1306515 events read in total (61217ms).











[16:16:37.586] <TB1> INFO: 1951850 events read in total (91581ms).











[16:17:08.055] <TB1> INFO: 2597060 events read in total (122050ms).
[16:17:32.026] <TB1> INFO: 3120000 events read in total (146021ms).
[16:17:32.095] <TB1> INFO: Test took 146921ms.
[16:17:57.182] <TB1> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 172 seconds
[16:17:57.182] <TB1> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 2 0 0 0 0 0 1 0 0
[16:17:57.182] <TB1> INFO: separation cut (per ROC): 105 106 96 106 105 102 107 102 120 92 112 108 103 106 107 107
[16:17:57.182] <TB1> INFO: Decoding statistics:
[16:17:57.182] <TB1> INFO: General information:
[16:17:57.182] <TB1> INFO: 16bit words read: 0
[16:17:57.182] <TB1> INFO: valid events total: 0
[16:17:57.182] <TB1> INFO: empty events: 0
[16:17:57.182] <TB1> INFO: valid events with pixels: 0
[16:17:57.182] <TB1> INFO: valid pixel hits: 0
[16:17:57.182] <TB1> INFO: Event errors: 0
[16:17:57.182] <TB1> INFO: start marker: 0
[16:17:57.182] <TB1> INFO: stop marker: 0
[16:17:57.182] <TB1> INFO: overflow: 0
[16:17:57.182] <TB1> INFO: invalid 5bit words: 0
[16:17:57.182] <TB1> INFO: invalid XOR eye diagram: 0
[16:17:57.182] <TB1> INFO: frame (failed synchr.): 0
[16:17:57.182] <TB1> INFO: idle data (no TBM trl): 0
[16:17:57.182] <TB1> INFO: no data (only TBM hdr): 0
[16:17:57.182] <TB1> INFO: TBM errors: 0
[16:17:57.182] <TB1> INFO: flawed TBM headers: 0
[16:17:57.182] <TB1> INFO: flawed TBM trailers: 0
[16:17:57.182] <TB1> INFO: event ID mismatches: 0
[16:17:57.182] <TB1> INFO: ROC errors: 0
[16:17:57.182] <TB1> INFO: missing ROC header(s): 0
[16:17:57.182] <TB1> INFO: misplaced readback start: 0
[16:17:57.182] <TB1> INFO: Pixel decoding errors: 0
[16:17:57.182] <TB1> INFO: pixel data incomplete: 0
[16:17:57.182] <TB1> INFO: pixel address: 0
[16:17:57.182] <TB1> INFO: pulse height fill bit: 0
[16:17:57.182] <TB1> INFO: buffer corruption: 0
[16:17:57.218] <TB1> INFO: ######################################################################
[16:17:57.218] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:17:57.218] <TB1> INFO: ######################################################################
[16:17:57.218] <TB1> INFO: ----------------------------------------------------------------------
[16:17:57.218] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:17:57.218] <TB1> INFO: ----------------------------------------------------------------------
[16:17:57.218] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:17:57.233] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:17:57.233] <TB1> INFO: run 1 of 1
[16:17:57.469] <TB1> INFO: Expecting 36608000 events.
[16:18:21.320] <TB1> INFO: 666200 events read in total (23259ms).
[16:18:44.392] <TB1> INFO: 1320650 events read in total (46331ms).
[16:19:07.195] <TB1> INFO: 1976850 events read in total (69134ms).
[16:19:29.940] <TB1> INFO: 2630700 events read in total (91879ms).
[16:19:52.484] <TB1> INFO: 3285350 events read in total (114423ms).
[16:20:15.346] <TB1> INFO: 3941050 events read in total (137285ms).
[16:20:38.101] <TB1> INFO: 4596150 events read in total (160040ms).
[16:21:00.731] <TB1> INFO: 5249750 events read in total (182670ms).
[16:21:23.411] <TB1> INFO: 5903500 events read in total (205350ms).
[16:21:46.034] <TB1> INFO: 6559700 events read in total (227973ms).
[16:22:08.831] <TB1> INFO: 7213750 events read in total (250770ms).
[16:22:31.645] <TB1> INFO: 7866000 events read in total (273584ms).
[16:22:54.430] <TB1> INFO: 8519450 events read in total (296369ms).
[16:23:16.735] <TB1> INFO: 9173750 events read in total (318674ms).
[16:23:39.609] <TB1> INFO: 9828200 events read in total (341548ms).
[16:24:02.412] <TB1> INFO: 10480750 events read in total (364351ms).
[16:24:25.164] <TB1> INFO: 11133900 events read in total (387103ms).
[16:24:48.109] <TB1> INFO: 11787600 events read in total (410048ms).
[16:25:10.890] <TB1> INFO: 12440850 events read in total (432829ms).
[16:25:33.990] <TB1> INFO: 13094400 events read in total (455929ms).
[16:25:56.638] <TB1> INFO: 13748600 events read in total (478577ms).
[16:26:19.439] <TB1> INFO: 14402500 events read in total (501378ms).
[16:26:42.362] <TB1> INFO: 15055100 events read in total (524301ms).
[16:27:05.180] <TB1> INFO: 15707250 events read in total (547119ms).
[16:27:28.022] <TB1> INFO: 16359700 events read in total (569961ms).
[16:27:50.582] <TB1> INFO: 17011750 events read in total (592521ms).
[16:28:13.187] <TB1> INFO: 17662150 events read in total (615126ms).
[16:28:35.744] <TB1> INFO: 18311650 events read in total (637683ms).
[16:28:58.503] <TB1> INFO: 18962500 events read in total (660442ms).
[16:29:21.554] <TB1> INFO: 19611550 events read in total (683493ms).
[16:29:44.522] <TB1> INFO: 20260050 events read in total (706461ms).
[16:30:07.306] <TB1> INFO: 20908800 events read in total (729245ms).
[16:30:30.141] <TB1> INFO: 21558400 events read in total (752080ms).
[16:30:52.808] <TB1> INFO: 22207200 events read in total (774747ms).
[16:31:15.498] <TB1> INFO: 22854850 events read in total (797437ms).
[16:31:38.223] <TB1> INFO: 23504500 events read in total (820162ms).
[16:32:00.714] <TB1> INFO: 24154600 events read in total (842653ms).
[16:32:23.279] <TB1> INFO: 24804400 events read in total (865218ms).
[16:32:45.942] <TB1> INFO: 25453100 events read in total (887881ms).
[16:33:08.428] <TB1> INFO: 26102000 events read in total (910367ms).
[16:33:30.840] <TB1> INFO: 26751000 events read in total (932779ms).
[16:33:53.731] <TB1> INFO: 27399900 events read in total (955670ms).
[16:34:15.949] <TB1> INFO: 28048100 events read in total (977888ms).
[16:34:38.648] <TB1> INFO: 28695550 events read in total (1000587ms).
[16:35:01.296] <TB1> INFO: 29342700 events read in total (1023235ms).
[16:35:24.150] <TB1> INFO: 29989100 events read in total (1046089ms).
[16:35:46.774] <TB1> INFO: 30636950 events read in total (1068713ms).
[16:36:09.469] <TB1> INFO: 31283200 events read in total (1091408ms).
[16:36:31.869] <TB1> INFO: 31931950 events read in total (1113808ms).
[16:36:54.400] <TB1> INFO: 32581000 events read in total (1136339ms).
[16:37:16.981] <TB1> INFO: 33228950 events read in total (1158920ms).
[16:37:39.861] <TB1> INFO: 33877800 events read in total (1181800ms).
[16:38:02.603] <TB1> INFO: 34524800 events read in total (1204542ms).
[16:38:25.478] <TB1> INFO: 35170550 events read in total (1227417ms).
[16:38:47.956] <TB1> INFO: 35817900 events read in total (1249895ms).
[16:39:10.547] <TB1> INFO: 36474400 events read in total (1272486ms).
[16:39:15.478] <TB1> INFO: 36608000 events read in total (1277417ms).
[16:39:15.575] <TB1> INFO: Test took 1278342ms.
[16:39:16.040] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:17.571] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:19.199] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:20.780] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:22.386] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:23.967] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:25.478] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:27.023] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:28.753] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:30.785] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:32.821] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:34.710] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:36.701] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:38.900] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:40.583] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:42.103] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:39:43.747] <TB1> INFO: PixTestScurves::scurves() done
[16:39:43.747] <TB1> INFO: Vcal mean: 118.09 106.87 100.32 111.65 110.58 99.90 117.21 110.61 126.33 98.65 116.59 115.28 112.74 105.30 115.07 110.37
[16:39:43.747] <TB1> INFO: Vcal RMS: 5.94 4.75 5.05 5.03 4.94 5.05 5.33 4.79 6.01 5.25 6.02 5.50 4.95 4.71 4.99 4.95
[16:39:43.747] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1306 seconds
[16:39:43.747] <TB1> INFO: Decoding statistics:
[16:39:43.747] <TB1> INFO: General information:
[16:39:43.747] <TB1> INFO: 16bit words read: 0
[16:39:43.747] <TB1> INFO: valid events total: 0
[16:39:43.747] <TB1> INFO: empty events: 0
[16:39:43.747] <TB1> INFO: valid events with pixels: 0
[16:39:43.747] <TB1> INFO: valid pixel hits: 0
[16:39:43.747] <TB1> INFO: Event errors: 0
[16:39:43.747] <TB1> INFO: start marker: 0
[16:39:43.747] <TB1> INFO: stop marker: 0
[16:39:43.747] <TB1> INFO: overflow: 0
[16:39:43.747] <TB1> INFO: invalid 5bit words: 0
[16:39:43.747] <TB1> INFO: invalid XOR eye diagram: 0
[16:39:43.747] <TB1> INFO: frame (failed synchr.): 0
[16:39:43.747] <TB1> INFO: idle data (no TBM trl): 0
[16:39:43.747] <TB1> INFO: no data (only TBM hdr): 0
[16:39:43.747] <TB1> INFO: TBM errors: 0
[16:39:43.747] <TB1> INFO: flawed TBM headers: 0
[16:39:43.747] <TB1> INFO: flawed TBM trailers: 0
[16:39:43.747] <TB1> INFO: event ID mismatches: 0
[16:39:43.747] <TB1> INFO: ROC errors: 0
[16:39:43.747] <TB1> INFO: missing ROC header(s): 0
[16:39:43.747] <TB1> INFO: misplaced readback start: 0
[16:39:43.747] <TB1> INFO: Pixel decoding errors: 0
[16:39:43.747] <TB1> INFO: pixel data incomplete: 0
[16:39:43.747] <TB1> INFO: pixel address: 0
[16:39:43.747] <TB1> INFO: pulse height fill bit: 0
[16:39:43.747] <TB1> INFO: buffer corruption: 0
[16:39:43.828] <TB1> INFO: ######################################################################
[16:39:43.828] <TB1> INFO: PixTestTrim::doTest()
[16:39:43.828] <TB1> INFO: ######################################################################
[16:39:43.829] <TB1> INFO: ----------------------------------------------------------------------
[16:39:43.829] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:39:43.829] <TB1> INFO: ----------------------------------------------------------------------
[16:39:43.871] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:39:43.872] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:39:43.886] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:39:43.887] <TB1> INFO: run 1 of 1
[16:39:44.150] <TB1> INFO: Expecting 5025280 events.
[16:40:14.738] <TB1> INFO: 815792 events read in total (29981ms).
[16:40:45.131] <TB1> INFO: 1629736 events read in total (60374ms).
[16:41:15.409] <TB1> INFO: 2441752 events read in total (90652ms).
[16:41:45.670] <TB1> INFO: 3249688 events read in total (120913ms).
[16:42:15.572] <TB1> INFO: 4054864 events read in total (150816ms).
[16:42:45.371] <TB1> INFO: 4857296 events read in total (180614ms).
[16:42:51.739] <TB1> INFO: 5025280 events read in total (186982ms).
[16:42:51.810] <TB1> INFO: Test took 187923ms.
[16:43:12.133] <TB1> INFO: ROC 0 VthrComp = 125
[16:43:12.134] <TB1> INFO: ROC 1 VthrComp = 118
[16:43:12.134] <TB1> INFO: ROC 2 VthrComp = 109
[16:43:12.134] <TB1> INFO: ROC 3 VthrComp = 124
[16:43:12.134] <TB1> INFO: ROC 4 VthrComp = 121
[16:43:12.134] <TB1> INFO: ROC 5 VthrComp = 110
[16:43:12.136] <TB1> INFO: ROC 6 VthrComp = 124
[16:43:12.136] <TB1> INFO: ROC 7 VthrComp = 118
[16:43:12.136] <TB1> INFO: ROC 8 VthrComp = 135
[16:43:12.136] <TB1> INFO: ROC 9 VthrComp = 108
[16:43:12.136] <TB1> INFO: ROC 10 VthrComp = 129
[16:43:12.136] <TB1> INFO: ROC 11 VthrComp = 124
[16:43:12.136] <TB1> INFO: ROC 12 VthrComp = 127
[16:43:12.136] <TB1> INFO: ROC 13 VthrComp = 121
[16:43:12.136] <TB1> INFO: ROC 14 VthrComp = 128
[16:43:12.136] <TB1> INFO: ROC 15 VthrComp = 126
[16:43:12.402] <TB1> INFO: Expecting 41600 events.
[16:43:15.932] <TB1> INFO: 41600 events read in total (2938ms).
[16:43:15.933] <TB1> INFO: Test took 3794ms.
[16:43:15.946] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:43:15.946] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:43:15.959] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:43:15.960] <TB1> INFO: run 1 of 1
[16:43:16.284] <TB1> INFO: Expecting 5025280 events.
[16:43:42.387] <TB1> INFO: 586776 events read in total (25512ms).
[16:44:07.843] <TB1> INFO: 1172904 events read in total (50968ms).
[16:44:33.892] <TB1> INFO: 1758968 events read in total (77017ms).
[16:44:59.700] <TB1> INFO: 2344384 events read in total (102825ms).
[16:45:25.525] <TB1> INFO: 2928104 events read in total (128650ms).
[16:45:51.231] <TB1> INFO: 3510848 events read in total (154356ms).
[16:46:17.137] <TB1> INFO: 4093192 events read in total (180262ms).
[16:46:42.995] <TB1> INFO: 4674608 events read in total (206120ms).
[16:46:58.749] <TB1> INFO: 5025280 events read in total (221874ms).
[16:46:58.928] <TB1> INFO: Test took 222968ms.
[16:47:27.027] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 59.1217 for pixel 23/3 mean/min/max = 44.9455/30.4656/59.4255
[16:47:27.028] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 56.3317 for pixel 0/3 mean/min/max = 44.1557/31.9569/56.3546
[16:47:27.028] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 58.4263 for pixel 20/20 mean/min/max = 46.3985/34.2508/58.5462
[16:47:27.029] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.7045 for pixel 0/11 mean/min/max = 44.6896/31.2289/58.1503
[16:47:27.029] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.3892 for pixel 25/75 mean/min/max = 45.3284/32.1724/58.4844
[16:47:27.029] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.4945 for pixel 17/68 mean/min/max = 46.0996/34.5796/57.6196
[16:47:27.030] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.7324 for pixel 0/53 mean/min/max = 45.2241/31.592/58.8561
[16:47:27.030] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 58.5682 for pixel 8/22 mean/min/max = 45.5095/32.2675/58.7515
[16:47:27.031] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.4976 for pixel 6/15 mean/min/max = 47.6877/33.8052/61.5701
[16:47:27.031] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.891 for pixel 17/1 mean/min/max = 46.7125/34.4662/58.9587
[16:47:27.031] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 58.966 for pixel 2/20 mean/min/max = 44.843/30.5753/59.1107
[16:47:27.032] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.0702 for pixel 11/5 mean/min/max = 45.643/30.9378/60.3481
[16:47:27.032] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 56.2738 for pixel 2/60 mean/min/max = 43.6628/30.8548/56.4709
[16:47:27.032] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 55.4795 for pixel 2/78 mean/min/max = 44.1035/32.4589/55.748
[16:47:27.033] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.5762 for pixel 0/0 mean/min/max = 43.858/31.0535/56.6625
[16:47:27.033] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 56.6094 for pixel 17/69 mean/min/max = 43.5372/30.3118/56.7626
[16:47:27.034] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:47:27.123] <TB1> INFO: Expecting 411648 events.
[16:47:36.509] <TB1> INFO: 411648 events read in total (8795ms).
[16:47:36.520] <TB1> INFO: Expecting 411648 events.
[16:47:45.790] <TB1> INFO: 411648 events read in total (8867ms).
[16:47:45.801] <TB1> INFO: Expecting 411648 events.
[16:47:55.150] <TB1> INFO: 411648 events read in total (8946ms).
[16:47:55.165] <TB1> INFO: Expecting 411648 events.
[16:48:04.536] <TB1> INFO: 411648 events read in total (8968ms).
[16:48:04.552] <TB1> INFO: Expecting 411648 events.
[16:48:13.904] <TB1> INFO: 411648 events read in total (8948ms).
[16:48:13.931] <TB1> INFO: Expecting 411648 events.
[16:48:23.327] <TB1> INFO: 411648 events read in total (8993ms).
[16:48:23.355] <TB1> INFO: Expecting 411648 events.
[16:48:32.720] <TB1> INFO: 411648 events read in total (8962ms).
[16:48:32.747] <TB1> INFO: Expecting 411648 events.
[16:48:42.121] <TB1> INFO: 411648 events read in total (8971ms).
[16:48:42.151] <TB1> INFO: Expecting 411648 events.
[16:48:51.613] <TB1> INFO: 411648 events read in total (9059ms).
[16:48:51.645] <TB1> INFO: Expecting 411648 events.
[16:49:01.049] <TB1> INFO: 411648 events read in total (9001ms).
[16:49:01.095] <TB1> INFO: Expecting 411648 events.
[16:49:10.514] <TB1> INFO: 411648 events read in total (9016ms).
[16:49:10.609] <TB1> INFO: Expecting 411648 events.
[16:49:20.058] <TB1> INFO: 411648 events read in total (9046ms).
[16:49:20.101] <TB1> INFO: Expecting 411648 events.
[16:49:29.526] <TB1> INFO: 411648 events read in total (9022ms).
[16:49:29.580] <TB1> INFO: Expecting 411648 events.
[16:49:38.934] <TB1> INFO: 411648 events read in total (8951ms).
[16:49:38.997] <TB1> INFO: Expecting 411648 events.
[16:49:48.370] <TB1> INFO: 411648 events read in total (8970ms).
[16:49:48.428] <TB1> INFO: Expecting 411648 events.
[16:49:57.749] <TB1> INFO: 411648 events read in total (8918ms).
[16:49:57.808] <TB1> INFO: Test took 150774ms.
[16:49:58.647] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:49:58.661] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:49:58.661] <TB1> INFO: run 1 of 1
[16:49:58.939] <TB1> INFO: Expecting 5025280 events.
[16:50:25.209] <TB1> INFO: 583696 events read in total (25678ms).
[16:50:51.426] <TB1> INFO: 1166048 events read in total (51895ms).
[16:51:18.345] <TB1> INFO: 1748440 events read in total (78815ms).
[16:51:44.624] <TB1> INFO: 2329680 events read in total (105093ms).
[16:52:10.960] <TB1> INFO: 2910872 events read in total (131429ms).
[16:52:37.438] <TB1> INFO: 3490752 events read in total (157907ms).
[16:53:03.773] <TB1> INFO: 4069312 events read in total (184242ms).
[16:53:30.236] <TB1> INFO: 4648984 events read in total (210705ms).
[16:53:47.523] <TB1> INFO: 5025280 events read in total (227992ms).
[16:53:47.652] <TB1> INFO: Test took 228992ms.
[16:54:10.620] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 6.500000 .. 138.714582
[16:54:10.904] <TB1> INFO: Expecting 208000 events.
[16:54:20.886] <TB1> INFO: 208000 events read in total (9390ms).
[16:54:20.887] <TB1> INFO: Test took 10264ms.
[16:54:20.938] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 6 .. 148 (-1/-1) hits flags = 528 (plus default)
[16:54:20.951] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:54:20.951] <TB1> INFO: run 1 of 1
[16:54:21.229] <TB1> INFO: Expecting 4759040 events.
[16:54:47.946] <TB1> INFO: 579968 events read in total (26125ms).
[16:55:13.001] <TB1> INFO: 1159624 events read in total (52180ms).
[16:55:40.382] <TB1> INFO: 1739600 events read in total (78561ms).
[16:56:06.523] <TB1> INFO: 2319272 events read in total (104702ms).
[16:56:32.473] <TB1> INFO: 2897752 events read in total (130652ms).
[16:56:58.573] <TB1> INFO: 3475968 events read in total (156752ms).
[16:57:24.263] <TB1> INFO: 4054184 events read in total (182442ms).
[16:57:50.048] <TB1> INFO: 4631936 events read in total (208227ms).
[16:57:56.192] <TB1> INFO: 4759040 events read in total (214371ms).
[16:57:56.294] <TB1> INFO: Test took 215343ms.
[16:58:24.549] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.144207 .. 47.123994
[16:58:24.788] <TB1> INFO: Expecting 208000 events.
[16:58:34.887] <TB1> INFO: 208000 events read in total (9507ms).
[16:58:34.888] <TB1> INFO: Test took 10338ms.
[16:58:34.935] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[16:58:34.949] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:58:34.949] <TB1> INFO: run 1 of 1
[16:58:35.227] <TB1> INFO: Expecting 1364480 events.
[16:59:04.328] <TB1> INFO: 649928 events read in total (28510ms).
[16:59:31.462] <TB1> INFO: 1297576 events read in total (55644ms).
[16:59:34.616] <TB1> INFO: 1364480 events read in total (58798ms).
[16:59:34.648] <TB1> INFO: Test took 59700ms.
[16:59:47.373] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 25.748850 .. 43.779790
[16:59:47.698] <TB1> INFO: Expecting 208000 events.
[16:59:57.338] <TB1> INFO: 208000 events read in total (9048ms).
[16:59:57.340] <TB1> INFO: Test took 9965ms.
[16:59:57.411] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 53 (-1/-1) hits flags = 528 (plus default)
[16:59:57.429] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:59:57.429] <TB1> INFO: run 1 of 1
[16:59:57.707] <TB1> INFO: Expecting 1297920 events.
[17:00:25.893] <TB1> INFO: 675480 events read in total (27595ms).
[17:00:51.820] <TB1> INFO: 1297920 events read in total (53523ms).
[17:00:51.853] <TB1> INFO: Test took 54425ms.
[17:01:07.082] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.424006 .. 42.396415
[17:01:07.324] <TB1> INFO: Expecting 208000 events.
[17:01:17.133] <TB1> INFO: 208000 events read in total (9217ms).
[17:01:17.134] <TB1> INFO: Test took 10049ms.
[17:01:17.183] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 52 (-1/-1) hits flags = 528 (plus default)
[17:01:17.197] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:01:17.197] <TB1> INFO: run 1 of 1
[17:01:17.475] <TB1> INFO: Expecting 1264640 events.
[17:01:46.113] <TB1> INFO: 680640 events read in total (28039ms).
[17:02:10.327] <TB1> INFO: 1264640 events read in total (52253ms).
[17:02:10.365] <TB1> INFO: Test took 53169ms.
[17:02:23.928] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:02:23.928] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:02:23.941] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[17:02:23.941] <TB1> INFO: run 1 of 1
[17:02:24.180] <TB1> INFO: Expecting 1364480 events.
[17:02:52.528] <TB1> INFO: 666784 events read in total (27755ms).
[17:03:20.262] <TB1> INFO: 1333120 events read in total (55489ms).
[17:03:22.035] <TB1> INFO: 1364480 events read in total (57262ms).
[17:03:22.062] <TB1> INFO: Test took 58121ms.
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C0.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C1.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C2.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C3.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C4.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C5.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C6.dat
[17:03:35.530] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C7.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C8.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C9.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C10.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C11.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C12.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C13.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C14.dat
[17:03:35.531] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C15.dat
[17:03:35.531] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C0.dat
[17:03:35.538] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C1.dat
[17:03:35.544] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C2.dat
[17:03:35.550] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C3.dat
[17:03:35.556] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C4.dat
[17:03:35.562] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C5.dat
[17:03:35.569] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C6.dat
[17:03:35.575] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C7.dat
[17:03:35.580] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C8.dat
[17:03:35.585] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C9.dat
[17:03:35.590] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C10.dat
[17:03:35.594] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C11.dat
[17:03:35.599] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C12.dat
[17:03:35.604] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C13.dat
[17:03:35.610] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C14.dat
[17:03:35.616] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//trimParameters35_C15.dat
[17:03:35.622] <TB1> INFO: PixTestTrim::trimTest() done
[17:03:35.622] <TB1> INFO: vtrim: 125 127 134 105 123 132 118 126 150 122 135 139 133 119 116 131
[17:03:35.622] <TB1> INFO: vthrcomp: 125 118 109 124 121 110 124 118 135 108 129 124 127 121 128 126
[17:03:35.622] <TB1> INFO: vcal mean: 34.95 34.98 34.94 34.94 34.94 35.00 34.97 34.96 35.00 35.00 34.93 34.90 34.93 34.94 34.92 34.90
[17:03:35.622] <TB1> INFO: vcal RMS: 1.10 0.96 0.91 1.04 1.01 0.93 1.04 1.07 1.09 0.91 1.21 1.07 1.04 0.96 1.00 1.04
[17:03:35.622] <TB1> INFO: bits mean: 9.89 9.90 9.01 9.26 9.66 9.40 9.62 9.47 8.96 9.06 10.06 9.94 10.42 10.00 9.60 10.40
[17:03:35.623] <TB1> INFO: bits RMS: 2.73 2.59 2.47 2.98 2.63 2.33 2.72 2.71 2.55 2.45 2.65 2.62 2.50 2.48 2.86 2.61
[17:03:35.633] <TB1> INFO: ----------------------------------------------------------------------
[17:03:35.633] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:03:35.633] <TB1> INFO: ----------------------------------------------------------------------
[17:03:35.636] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:03:35.649] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:03:35.649] <TB1> INFO: run 1 of 1
[17:03:35.904] <TB1> INFO: Expecting 4160000 events.
[17:04:07.941] <TB1> INFO: 734470 events read in total (31445ms).
[17:04:39.438] <TB1> INFO: 1465365 events read in total (62942ms).
[17:05:10.930] <TB1> INFO: 2193805 events read in total (94434ms).
[17:05:42.310] <TB1> INFO: 2918540 events read in total (125814ms).
[17:06:13.915] <TB1> INFO: 3641350 events read in total (157419ms).
[17:06:36.366] <TB1> INFO: 4160000 events read in total (179870ms).
[17:06:36.447] <TB1> INFO: Test took 180798ms.
[17:07:06.118] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[17:07:06.131] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:07:06.132] <TB1> INFO: run 1 of 1
[17:07:06.409] <TB1> INFO: Expecting 4139200 events.
[17:07:37.264] <TB1> INFO: 713000 events read in total (30263ms).
[17:08:08.307] <TB1> INFO: 1422735 events read in total (61306ms).
[17:08:39.179] <TB1> INFO: 2130190 events read in total (92178ms).
[17:09:10.295] <TB1> INFO: 2833655 events read in total (123294ms).
[17:09:41.375] <TB1> INFO: 3535895 events read in total (154374ms).
[17:10:07.925] <TB1> INFO: 4139200 events read in total (180924ms).
[17:10:08.012] <TB1> INFO: Test took 181880ms.
[17:10:38.552] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[17:10:38.565] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:10:38.565] <TB1> INFO: run 1 of 1
[17:10:38.802] <TB1> INFO: Expecting 4056000 events.
[17:11:10.601] <TB1> INFO: 718185 events read in total (31207ms).
[17:11:41.657] <TB1> INFO: 1433015 events read in total (62263ms).
[17:12:12.537] <TB1> INFO: 2145415 events read in total (93143ms).
[17:12:43.668] <TB1> INFO: 2853865 events read in total (124274ms).
[17:13:14.504] <TB1> INFO: 3560825 events read in total (155110ms).
[17:13:36.368] <TB1> INFO: 4056000 events read in total (176974ms).
[17:13:36.491] <TB1> INFO: Test took 177925ms.
[17:14:04.754] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[17:14:04.769] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:14:04.769] <TB1> INFO: run 1 of 1
[17:14:05.060] <TB1> INFO: Expecting 4056000 events.
[17:14:37.071] <TB1> INFO: 718385 events read in total (31420ms).
[17:15:07.860] <TB1> INFO: 1433540 events read in total (62209ms).
[17:15:38.906] <TB1> INFO: 2146000 events read in total (93255ms).
[17:16:10.019] <TB1> INFO: 2854645 events read in total (124368ms).
[17:16:41.185] <TB1> INFO: 3561810 events read in total (155534ms).
[17:17:02.987] <TB1> INFO: 4056000 events read in total (177336ms).
[17:17:03.074] <TB1> INFO: Test took 178306ms.
[17:17:27.622] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[17:17:27.635] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:17:27.635] <TB1> INFO: run 1 of 1
[17:17:27.888] <TB1> INFO: Expecting 4056000 events.
[17:17:58.911] <TB1> INFO: 718505 events read in total (30431ms).
[17:18:29.999] <TB1> INFO: 1433935 events read in total (61519ms).
[17:19:01.053] <TB1> INFO: 2146570 events read in total (92573ms).
[17:19:32.088] <TB1> INFO: 2855225 events read in total (123608ms).
[17:20:03.365] <TB1> INFO: 3562415 events read in total (154885ms).
[17:20:25.021] <TB1> INFO: 4056000 events read in total (176541ms).
[17:20:25.182] <TB1> INFO: Test took 177547ms.
[17:20:49.046] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:20:49.047] <TB1> INFO: PixTestTrim::doTest() done, duration: 2465 seconds
[17:20:49.047] <TB1> INFO: Decoding statistics:
[17:20:49.047] <TB1> INFO: General information:
[17:20:49.047] <TB1> INFO: 16bit words read: 0
[17:20:49.047] <TB1> INFO: valid events total: 0
[17:20:49.047] <TB1> INFO: empty events: 0
[17:20:49.047] <TB1> INFO: valid events with pixels: 0
[17:20:49.047] <TB1> INFO: valid pixel hits: 0
[17:20:49.047] <TB1> INFO: Event errors: 0
[17:20:49.047] <TB1> INFO: start marker: 0
[17:20:49.047] <TB1> INFO: stop marker: 0
[17:20:49.047] <TB1> INFO: overflow: 0
[17:20:49.047] <TB1> INFO: invalid 5bit words: 0
[17:20:49.047] <TB1> INFO: invalid XOR eye diagram: 0
[17:20:49.047] <TB1> INFO: frame (failed synchr.): 0
[17:20:49.047] <TB1> INFO: idle data (no TBM trl): 0
[17:20:49.047] <TB1> INFO: no data (only TBM hdr): 0
[17:20:49.047] <TB1> INFO: TBM errors: 0
[17:20:49.047] <TB1> INFO: flawed TBM headers: 0
[17:20:49.047] <TB1> INFO: flawed TBM trailers: 0
[17:20:49.047] <TB1> INFO: event ID mismatches: 0
[17:20:49.047] <TB1> INFO: ROC errors: 0
[17:20:49.047] <TB1> INFO: missing ROC header(s): 0
[17:20:49.047] <TB1> INFO: misplaced readback start: 0
[17:20:49.047] <TB1> INFO: Pixel decoding errors: 0
[17:20:49.047] <TB1> INFO: pixel data incomplete: 0
[17:20:49.047] <TB1> INFO: pixel address: 0
[17:20:49.047] <TB1> INFO: pulse height fill bit: 0
[17:20:49.047] <TB1> INFO: buffer corruption: 0
[17:20:49.708] <TB1> INFO: ######################################################################
[17:20:49.708] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:20:49.708] <TB1> INFO: ######################################################################
[17:20:49.986] <TB1> INFO: Expecting 41600 events.
[17:20:53.501] <TB1> INFO: 41600 events read in total (2923ms).
[17:20:53.502] <TB1> INFO: Test took 3792ms.
[17:20:53.948] <TB1> INFO: Expecting 41600 events.
[17:20:57.471] <TB1> INFO: 41600 events read in total (2932ms).
[17:20:57.472] <TB1> INFO: Test took 3767ms.
[17:20:57.778] <TB1> INFO: Expecting 41600 events.
[17:21:01.449] <TB1> INFO: 41600 events read in total (3080ms).
[17:21:01.450] <TB1> INFO: Test took 3952ms.
[17:21:01.739] <TB1> INFO: Expecting 41600 events.
[17:21:05.211] <TB1> INFO: 41600 events read in total (2881ms).
[17:21:05.212] <TB1> INFO: Test took 3738ms.
[17:21:05.500] <TB1> INFO: Expecting 41600 events.
[17:21:09.031] <TB1> INFO: 41600 events read in total (2939ms).
[17:21:09.032] <TB1> INFO: Test took 3796ms.
[17:21:09.323] <TB1> INFO: Expecting 41600 events.
[17:21:12.796] <TB1> INFO: 41600 events read in total (2882ms).
[17:21:12.797] <TB1> INFO: Test took 3739ms.
[17:21:13.085] <TB1> INFO: Expecting 41600 events.
[17:21:16.633] <TB1> INFO: 41600 events read in total (2956ms).
[17:21:16.634] <TB1> INFO: Test took 3813ms.
[17:21:16.925] <TB1> INFO: Expecting 41600 events.
[17:21:20.520] <TB1> INFO: 41600 events read in total (3003ms).
[17:21:20.521] <TB1> INFO: Test took 3860ms.
[17:21:20.823] <TB1> INFO: Expecting 41600 events.
[17:21:24.331] <TB1> INFO: 41600 events read in total (2917ms).
[17:21:24.332] <TB1> INFO: Test took 3787ms.
[17:21:24.621] <TB1> INFO: Expecting 41600 events.
[17:21:28.097] <TB1> INFO: 41600 events read in total (2884ms).
[17:21:28.098] <TB1> INFO: Test took 3742ms.
[17:21:28.387] <TB1> INFO: Expecting 41600 events.
[17:21:31.892] <TB1> INFO: 41600 events read in total (2913ms).
[17:21:31.893] <TB1> INFO: Test took 3771ms.
[17:21:32.185] <TB1> INFO: Expecting 41600 events.
[17:21:35.831] <TB1> INFO: 41600 events read in total (3054ms).
[17:21:35.832] <TB1> INFO: Test took 3913ms.
[17:21:36.121] <TB1> INFO: Expecting 41600 events.
[17:21:39.668] <TB1> INFO: 41600 events read in total (2955ms).
[17:21:39.668] <TB1> INFO: Test took 3812ms.
[17:21:39.958] <TB1> INFO: Expecting 41600 events.
[17:21:43.485] <TB1> INFO: 41600 events read in total (2936ms).
[17:21:43.486] <TB1> INFO: Test took 3793ms.
[17:21:43.776] <TB1> INFO: Expecting 41600 events.
[17:21:47.319] <TB1> INFO: 41600 events read in total (2952ms).
[17:21:47.320] <TB1> INFO: Test took 3809ms.
[17:21:47.609] <TB1> INFO: Expecting 41600 events.
[17:21:51.149] <TB1> INFO: 41600 events read in total (2949ms).
[17:21:51.150] <TB1> INFO: Test took 3806ms.
[17:21:51.439] <TB1> INFO: Expecting 41600 events.
[17:21:54.957] <TB1> INFO: 41600 events read in total (2927ms).
[17:21:54.958] <TB1> INFO: Test took 3784ms.
[17:21:55.247] <TB1> INFO: Expecting 41600 events.
[17:21:58.943] <TB1> INFO: 41600 events read in total (3106ms).
[17:21:58.944] <TB1> INFO: Test took 3962ms.
[17:21:59.233] <TB1> INFO: Expecting 41600 events.
[17:22:02.722] <TB1> INFO: 41600 events read in total (2897ms).
[17:22:02.722] <TB1> INFO: Test took 3754ms.
[17:22:03.011] <TB1> INFO: Expecting 41600 events.
[17:22:06.588] <TB1> INFO: 41600 events read in total (2985ms).
[17:22:06.588] <TB1> INFO: Test took 3842ms.
[17:22:06.880] <TB1> INFO: Expecting 41600 events.
[17:22:10.395] <TB1> INFO: 41600 events read in total (2924ms).
[17:22:10.396] <TB1> INFO: Test took 3781ms.
[17:22:10.687] <TB1> INFO: Expecting 41600 events.
[17:22:14.225] <TB1> INFO: 41600 events read in total (2946ms).
[17:22:14.226] <TB1> INFO: Test took 3804ms.
[17:22:14.515] <TB1> INFO: Expecting 41600 events.
[17:22:18.110] <TB1> INFO: 41600 events read in total (3003ms).
[17:22:18.111] <TB1> INFO: Test took 3860ms.
[17:22:18.400] <TB1> INFO: Expecting 41600 events.
[17:22:21.968] <TB1> INFO: 41600 events read in total (2976ms).
[17:22:21.968] <TB1> INFO: Test took 3832ms.
[17:22:22.258] <TB1> INFO: Expecting 41600 events.
[17:22:25.801] <TB1> INFO: 41600 events read in total (2951ms).
[17:22:25.802] <TB1> INFO: Test took 3809ms.
[17:22:26.093] <TB1> INFO: Expecting 41600 events.
[17:22:29.687] <TB1> INFO: 41600 events read in total (3002ms).
[17:22:29.688] <TB1> INFO: Test took 3860ms.
[17:22:29.993] <TB1> INFO: Expecting 41600 events.
[17:22:33.634] <TB1> INFO: 41600 events read in total (3049ms).
[17:22:33.635] <TB1> INFO: Test took 3923ms.
[17:22:33.925] <TB1> INFO: Expecting 41600 events.
[17:22:37.449] <TB1> INFO: 41600 events read in total (2933ms).
[17:22:37.450] <TB1> INFO: Test took 3790ms.
[17:22:37.767] <TB1> INFO: Expecting 41600 events.
[17:22:41.364] <TB1> INFO: 41600 events read in total (3005ms).
[17:22:41.365] <TB1> INFO: Test took 3886ms.
[17:22:41.654] <TB1> INFO: Expecting 41600 events.
[17:22:45.145] <TB1> INFO: 41600 events read in total (2899ms).
[17:22:45.146] <TB1> INFO: Test took 3757ms.
[17:22:45.436] <TB1> INFO: Expecting 41600 events.
[17:22:49.096] <TB1> INFO: 41600 events read in total (3068ms).
[17:22:49.097] <TB1> INFO: Test took 3926ms.
[17:22:49.387] <TB1> INFO: Expecting 41600 events.
[17:22:53.030] <TB1> INFO: 41600 events read in total (3051ms).
[17:22:53.031] <TB1> INFO: Test took 3909ms.
[17:22:53.325] <TB1> INFO: Expecting 41600 events.
[17:22:56.936] <TB1> INFO: 41600 events read in total (3019ms).
[17:22:56.937] <TB1> INFO: Test took 3878ms.
[17:22:57.226] <TB1> INFO: Expecting 41600 events.
[17:23:00.889] <TB1> INFO: 41600 events read in total (3071ms).
[17:23:00.890] <TB1> INFO: Test took 3929ms.
[17:23:01.182] <TB1> INFO: Expecting 41600 events.
[17:23:04.711] <TB1> INFO: 41600 events read in total (2938ms).
[17:23:04.711] <TB1> INFO: Test took 3794ms.
[17:23:05.006] <TB1> INFO: Expecting 41600 events.
[17:23:08.484] <TB1> INFO: 41600 events read in total (2886ms).
[17:23:08.485] <TB1> INFO: Test took 3747ms.
[17:23:08.780] <TB1> INFO: Expecting 41600 events.
[17:23:12.385] <TB1> INFO: 41600 events read in total (3014ms).
[17:23:12.386] <TB1> INFO: Test took 3872ms.
[17:23:12.676] <TB1> INFO: Expecting 41600 events.
[17:23:16.238] <TB1> INFO: 41600 events read in total (2970ms).
[17:23:16.238] <TB1> INFO: Test took 3828ms.
[17:23:16.528] <TB1> INFO: Expecting 41600 events.
[17:23:20.044] <TB1> INFO: 41600 events read in total (2924ms).
[17:23:20.045] <TB1> INFO: Test took 3782ms.
[17:23:20.334] <TB1> INFO: Expecting 41600 events.
[17:23:23.955] <TB1> INFO: 41600 events read in total (3029ms).
[17:23:23.956] <TB1> INFO: Test took 3887ms.
[17:23:24.246] <TB1> INFO: Expecting 41600 events.
[17:23:27.843] <TB1> INFO: 41600 events read in total (3005ms).
[17:23:27.844] <TB1> INFO: Test took 3864ms.
[17:23:28.134] <TB1> INFO: Expecting 41600 events.
[17:23:31.686] <TB1> INFO: 41600 events read in total (2960ms).
[17:23:31.686] <TB1> INFO: Test took 3818ms.
[17:23:31.976] <TB1> INFO: Expecting 41600 events.
[17:23:35.499] <TB1> INFO: 41600 events read in total (2931ms).
[17:23:35.500] <TB1> INFO: Test took 3789ms.
[17:23:35.791] <TB1> INFO: Expecting 41600 events.
[17:23:39.331] <TB1> INFO: 41600 events read in total (2947ms).
[17:23:39.331] <TB1> INFO: Test took 3805ms.
[17:23:39.621] <TB1> INFO: Expecting 41600 events.
[17:23:43.175] <TB1> INFO: 41600 events read in total (2962ms).
[17:23:43.175] <TB1> INFO: Test took 3820ms.
[17:23:43.466] <TB1> INFO: Expecting 41600 events.
[17:23:46.953] <TB1> INFO: 41600 events read in total (2896ms).
[17:23:46.953] <TB1> INFO: Test took 3753ms.
[17:23:47.243] <TB1> INFO: Expecting 41600 events.
[17:23:50.739] <TB1> INFO: 41600 events read in total (2905ms).
[17:23:50.739] <TB1> INFO: Test took 3761ms.
[17:23:51.042] <TB1> INFO: Expecting 41600 events.
[17:23:54.592] <TB1> INFO: 41600 events read in total (2959ms).
[17:23:54.593] <TB1> INFO: Test took 3828ms.
[17:23:54.886] <TB1> INFO: Expecting 41600 events.
[17:23:58.418] <TB1> INFO: 41600 events read in total (2941ms).
[17:23:58.419] <TB1> INFO: Test took 3799ms.
[17:23:58.713] <TB1> INFO: Expecting 41600 events.
[17:24:02.278] <TB1> INFO: 41600 events read in total (2973ms).
[17:24:02.279] <TB1> INFO: Test took 3831ms.
[17:24:02.569] <TB1> INFO: Expecting 41600 events.
[17:24:06.094] <TB1> INFO: 41600 events read in total (2933ms).
[17:24:06.095] <TB1> INFO: Test took 3791ms.
[17:24:06.384] <TB1> INFO: Expecting 41600 events.
[17:24:09.911] <TB1> INFO: 41600 events read in total (2935ms).
[17:24:09.912] <TB1> INFO: Test took 3793ms.
[17:24:10.221] <TB1> INFO: Expecting 41600 events.
[17:24:13.716] <TB1> INFO: 41600 events read in total (2903ms).
[17:24:13.717] <TB1> INFO: Test took 3781ms.
[17:24:14.012] <TB1> INFO: Expecting 41600 events.
[17:24:17.538] <TB1> INFO: 41600 events read in total (2934ms).
[17:24:17.539] <TB1> INFO: Test took 3793ms.
[17:24:17.829] <TB1> INFO: Expecting 2560 events.
[17:24:18.726] <TB1> INFO: 2560 events read in total (305ms).
[17:24:18.726] <TB1> INFO: Test took 1174ms.
[17:24:19.033] <TB1> INFO: Expecting 2560 events.
[17:24:19.917] <TB1> INFO: 2560 events read in total (293ms).
[17:24:19.917] <TB1> INFO: Test took 1190ms.
[17:24:20.225] <TB1> INFO: Expecting 2560 events.
[17:24:21.115] <TB1> INFO: 2560 events read in total (299ms).
[17:24:21.115] <TB1> INFO: Test took 1197ms.
[17:24:21.422] <TB1> INFO: Expecting 2560 events.
[17:24:22.310] <TB1> INFO: 2560 events read in total (296ms).
[17:24:22.311] <TB1> INFO: Test took 1196ms.
[17:24:22.619] <TB1> INFO: Expecting 2560 events.
[17:24:23.506] <TB1> INFO: 2560 events read in total (296ms).
[17:24:23.507] <TB1> INFO: Test took 1196ms.
[17:24:23.814] <TB1> INFO: Expecting 2560 events.
[17:24:24.700] <TB1> INFO: 2560 events read in total (294ms).
[17:24:24.700] <TB1> INFO: Test took 1192ms.
[17:24:25.009] <TB1> INFO: Expecting 2560 events.
[17:24:25.893] <TB1> INFO: 2560 events read in total (292ms).
[17:24:25.893] <TB1> INFO: Test took 1192ms.
[17:24:26.200] <TB1> INFO: Expecting 2560 events.
[17:24:27.090] <TB1> INFO: 2560 events read in total (298ms).
[17:24:27.091] <TB1> INFO: Test took 1197ms.
[17:24:27.398] <TB1> INFO: Expecting 2560 events.
[17:24:28.279] <TB1> INFO: 2560 events read in total (289ms).
[17:24:28.280] <TB1> INFO: Test took 1189ms.
[17:24:28.587] <TB1> INFO: Expecting 2560 events.
[17:24:29.470] <TB1> INFO: 2560 events read in total (292ms).
[17:24:29.470] <TB1> INFO: Test took 1190ms.
[17:24:29.778] <TB1> INFO: Expecting 2560 events.
[17:24:30.666] <TB1> INFO: 2560 events read in total (296ms).
[17:24:30.667] <TB1> INFO: Test took 1196ms.
[17:24:30.973] <TB1> INFO: Expecting 2560 events.
[17:24:31.862] <TB1> INFO: 2560 events read in total (297ms).
[17:24:31.863] <TB1> INFO: Test took 1196ms.
[17:24:32.170] <TB1> INFO: Expecting 2560 events.
[17:24:33.063] <TB1> INFO: 2560 events read in total (301ms).
[17:24:33.063] <TB1> INFO: Test took 1200ms.
[17:24:33.371] <TB1> INFO: Expecting 2560 events.
[17:24:34.255] <TB1> INFO: 2560 events read in total (293ms).
[17:24:34.255] <TB1> INFO: Test took 1191ms.
[17:24:34.563] <TB1> INFO: Expecting 2560 events.
[17:24:35.445] <TB1> INFO: 2560 events read in total (290ms).
[17:24:35.445] <TB1> INFO: Test took 1190ms.
[17:24:35.754] <TB1> INFO: Expecting 2560 events.
[17:24:36.640] <TB1> INFO: 2560 events read in total (294ms).
[17:24:36.640] <TB1> INFO: Test took 1194ms.
[17:24:36.949] <TB1> INFO: Expecting 655360 events.
[17:24:57.958] <TB1> INFO: 531260 events read in total (20417ms).
[17:25:02.945] <TB1> INFO: 655360 events read in total (25404ms).
[17:25:02.962] <TB1> INFO: Test took 26319ms.
[17:25:02.993] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:25:03.252] <TB1> INFO: Expecting 655360 events.
[17:25:17.719] <TB1> INFO: 655360 events read in total (13875ms).
[17:25:17.733] <TB1> INFO: Expecting 655360 events.
[17:25:32.051] <TB1> INFO: 655360 events read in total (13915ms).
[17:25:32.070] <TB1> INFO: Expecting 655360 events.
[17:25:46.612] <TB1> INFO: 655360 events read in total (14138ms).
[17:25:46.632] <TB1> INFO: Expecting 655360 events.
[17:26:01.287] <TB1> INFO: 655360 events read in total (14251ms).
[17:26:01.315] <TB1> INFO: Expecting 655360 events.
[17:26:15.691] <TB1> INFO: 655360 events read in total (13973ms).
[17:26:15.724] <TB1> INFO: Expecting 655360 events.
[17:26:30.325] <TB1> INFO: 655360 events read in total (14198ms).
[17:26:30.361] <TB1> INFO: Expecting 655360 events.
[17:26:44.868] <TB1> INFO: 655360 events read in total (14104ms).
[17:26:44.916] <TB1> INFO: Expecting 655360 events.
[17:26:59.473] <TB1> INFO: 655360 events read in total (14153ms).
[17:26:59.517] <TB1> INFO: Expecting 655360 events.
[17:27:13.999] <TB1> INFO: 655360 events read in total (14079ms).
[17:27:14.058] <TB1> INFO: Expecting 655360 events.
[17:27:28.588] <TB1> INFO: 655360 events read in total (14126ms).
[17:27:28.699] <TB1> INFO: Expecting 655360 events.
[17:27:43.108] <TB1> INFO: 655360 events read in total (14006ms).
[17:27:43.234] <TB1> INFO: Expecting 655360 events.
[17:27:57.588] <TB1> INFO: 655360 events read in total (13951ms).
[17:27:57.663] <TB1> INFO: Expecting 655360 events.
[17:28:12.348] <TB1> INFO: 655360 events read in total (14282ms).
[17:28:12.481] <TB1> INFO: Expecting 655360 events.
[17:28:26.967] <TB1> INFO: 655360 events read in total (14083ms).
[17:28:27.056] <TB1> INFO: Expecting 655360 events.
[17:28:41.553] <TB1> INFO: 655360 events read in total (14094ms).
[17:28:41.677] <TB1> INFO: Expecting 655360 events.
[17:28:56.185] <TB1> INFO: 655360 events read in total (14105ms).
[17:28:56.285] <TB1> INFO: Test took 233292ms.
[17:28:56.477] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.483] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:28:56.489] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:28:56.495] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.501] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.507] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.513] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.519] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.525] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.530] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:28:56.536] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:28:56.542] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.548] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:28:56.554] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.560] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.566] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.572] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.577] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:28:56.583] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:28:56.589] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:28:56.595] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[17:28:56.601] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.607] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.612] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.618] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:28:56.624] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C0.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C1.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C2.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C3.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C4.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C5.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C6.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C7.dat
[17:28:56.659] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C8.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C9.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C10.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C11.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C12.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C13.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C14.dat
[17:28:56.660] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//dacParameters35_C15.dat
[17:28:56.900] <TB1> INFO: Expecting 41600 events.
[17:29:00.049] <TB1> INFO: 41600 events read in total (2557ms).
[17:29:00.049] <TB1> INFO: Test took 3386ms.
[17:29:00.505] <TB1> INFO: Expecting 41600 events.
[17:29:03.624] <TB1> INFO: 41600 events read in total (2527ms).
[17:29:03.625] <TB1> INFO: Test took 3359ms.
[17:29:04.078] <TB1> INFO: Expecting 41600 events.
[17:29:07.194] <TB1> INFO: 41600 events read in total (2524ms).
[17:29:07.194] <TB1> INFO: Test took 3353ms.
[17:29:07.411] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:07.500] <TB1> INFO: Expecting 2560 events.
[17:29:08.391] <TB1> INFO: 2560 events read in total (300ms).
[17:29:08.391] <TB1> INFO: Test took 980ms.
[17:29:08.396] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:08.700] <TB1> INFO: Expecting 2560 events.
[17:29:09.589] <TB1> INFO: 2560 events read in total (298ms).
[17:29:09.589] <TB1> INFO: Test took 1193ms.
[17:29:09.592] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:09.898] <TB1> INFO: Expecting 2560 events.
[17:29:10.780] <TB1> INFO: 2560 events read in total (290ms).
[17:29:10.781] <TB1> INFO: Test took 1189ms.
[17:29:10.784] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:11.089] <TB1> INFO: Expecting 2560 events.
[17:29:11.981] <TB1> INFO: 2560 events read in total (301ms).
[17:29:11.982] <TB1> INFO: Test took 1198ms.
[17:29:11.985] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:12.288] <TB1> INFO: Expecting 2560 events.
[17:29:13.177] <TB1> INFO: 2560 events read in total (298ms).
[17:29:13.178] <TB1> INFO: Test took 1193ms.
[17:29:13.180] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:13.487] <TB1> INFO: Expecting 2560 events.
[17:29:14.372] <TB1> INFO: 2560 events read in total (294ms).
[17:29:14.373] <TB1> INFO: Test took 1194ms.
[17:29:14.379] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:14.680] <TB1> INFO: Expecting 2560 events.
[17:29:15.569] <TB1> INFO: 2560 events read in total (297ms).
[17:29:15.569] <TB1> INFO: Test took 1191ms.
[17:29:15.571] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:15.878] <TB1> INFO: Expecting 2560 events.
[17:29:16.770] <TB1> INFO: 2560 events read in total (300ms).
[17:29:16.770] <TB1> INFO: Test took 1199ms.
[17:29:16.773] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:17.080] <TB1> INFO: Expecting 2560 events.
[17:29:17.967] <TB1> INFO: 2560 events read in total (296ms).
[17:29:17.968] <TB1> INFO: Test took 1195ms.
[17:29:17.971] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:18.276] <TB1> INFO: Expecting 2560 events.
[17:29:19.163] <TB1> INFO: 2560 events read in total (295ms).
[17:29:19.164] <TB1> INFO: Test took 1193ms.
[17:29:19.167] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:19.472] <TB1> INFO: Expecting 2560 events.
[17:29:20.357] <TB1> INFO: 2560 events read in total (293ms).
[17:29:20.357] <TB1> INFO: Test took 1190ms.
[17:29:20.362] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:20.665] <TB1> INFO: Expecting 2560 events.
[17:29:21.549] <TB1> INFO: 2560 events read in total (292ms).
[17:29:21.550] <TB1> INFO: Test took 1188ms.
[17:29:21.553] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:21.858] <TB1> INFO: Expecting 2560 events.
[17:29:22.743] <TB1> INFO: 2560 events read in total (293ms).
[17:29:22.743] <TB1> INFO: Test took 1192ms.
[17:29:22.747] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:23.052] <TB1> INFO: Expecting 2560 events.
[17:29:23.937] <TB1> INFO: 2560 events read in total (293ms).
[17:29:23.938] <TB1> INFO: Test took 1191ms.
[17:29:23.941] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:24.245] <TB1> INFO: Expecting 2560 events.
[17:29:25.126] <TB1> INFO: 2560 events read in total (289ms).
[17:29:25.127] <TB1> INFO: Test took 1186ms.
[17:29:25.129] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:25.435] <TB1> INFO: Expecting 2560 events.
[17:29:26.314] <TB1> INFO: 2560 events read in total (289ms).
[17:29:26.315] <TB1> INFO: Test took 1186ms.
[17:29:26.317] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:26.624] <TB1> INFO: Expecting 2560 events.
[17:29:27.502] <TB1> INFO: 2560 events read in total (287ms).
[17:29:27.502] <TB1> INFO: Test took 1185ms.
[17:29:27.505] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:27.811] <TB1> INFO: Expecting 2560 events.
[17:29:28.692] <TB1> INFO: 2560 events read in total (289ms).
[17:29:28.692] <TB1> INFO: Test took 1187ms.
[17:29:28.695] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:28.001] <TB1> INFO: Expecting 2560 events.
[17:29:29.889] <TB1> INFO: 2560 events read in total (296ms).
[17:29:29.889] <TB1> INFO: Test took 1194ms.
[17:29:29.891] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:30.198] <TB1> INFO: Expecting 2560 events.
[17:29:31.086] <TB1> INFO: 2560 events read in total (296ms).
[17:29:31.087] <TB1> INFO: Test took 1196ms.
[17:29:31.090] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:31.395] <TB1> INFO: Expecting 2560 events.
[17:29:32.283] <TB1> INFO: 2560 events read in total (296ms).
[17:29:32.284] <TB1> INFO: Test took 1194ms.
[17:29:32.289] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:32.592] <TB1> INFO: Expecting 2560 events.
[17:29:33.485] <TB1> INFO: 2560 events read in total (301ms).
[17:29:33.486] <TB1> INFO: Test took 1197ms.
[17:29:33.490] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:33.793] <TB1> INFO: Expecting 2560 events.
[17:29:34.676] <TB1> INFO: 2560 events read in total (291ms).
[17:29:34.677] <TB1> INFO: Test took 1187ms.
[17:29:34.680] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:34.985] <TB1> INFO: Expecting 2560 events.
[17:29:35.870] <TB1> INFO: 2560 events read in total (293ms).
[17:29:35.870] <TB1> INFO: Test took 1190ms.
[17:29:35.873] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:36.179] <TB1> INFO: Expecting 2560 events.
[17:29:37.064] <TB1> INFO: 2560 events read in total (294ms).
[17:29:37.064] <TB1> INFO: Test took 1191ms.
[17:29:37.067] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:37.372] <TB1> INFO: Expecting 2560 events.
[17:29:38.267] <TB1> INFO: 2560 events read in total (304ms).
[17:29:38.267] <TB1> INFO: Test took 1200ms.
[17:29:38.270] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:38.574] <TB1> INFO: Expecting 2560 events.
[17:29:39.460] <TB1> INFO: 2560 events read in total (294ms).
[17:29:39.460] <TB1> INFO: Test took 1190ms.
[17:29:39.465] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:39.768] <TB1> INFO: Expecting 2560 events.
[17:29:40.655] <TB1> INFO: 2560 events read in total (296ms).
[17:29:40.655] <TB1> INFO: Test took 1190ms.
[17:29:40.659] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:40.962] <TB1> INFO: Expecting 2560 events.
[17:29:41.850] <TB1> INFO: 2560 events read in total (296ms).
[17:29:41.850] <TB1> INFO: Test took 1192ms.
[17:29:41.855] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:42.158] <TB1> INFO: Expecting 2560 events.
[17:29:43.044] <TB1> INFO: 2560 events read in total (295ms).
[17:29:43.045] <TB1> INFO: Test took 1190ms.
[17:29:43.048] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:43.354] <TB1> INFO: Expecting 2560 events.
[17:29:44.239] <TB1> INFO: 2560 events read in total (293ms).
[17:29:44.239] <TB1> INFO: Test took 1191ms.
[17:29:44.243] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:29:44.547] <TB1> INFO: Expecting 2560 events.
[17:29:45.438] <TB1> INFO: 2560 events read in total (299ms).
[17:29:45.439] <TB1> INFO: Test took 1196ms.
[17:29:45.922] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 536 seconds
[17:29:45.922] <TB1> INFO: PH scale (per ROC): 56 59 58 41 41 62 41 44 65 44 42 49 58 41 49 60
[17:29:45.922] <TB1> INFO: PH offset (per ROC): 132 132 131 99 112 131 104 105 122 125 111 131 124 93 126 138
[17:29:45.932] <TB1> INFO: Decoding statistics:
[17:29:45.933] <TB1> INFO: General information:
[17:29:45.933] <TB1> INFO: 16bit words read: 127892
[17:29:45.933] <TB1> INFO: valid events total: 20480
[17:29:45.933] <TB1> INFO: empty events: 17974
[17:29:45.933] <TB1> INFO: valid events with pixels: 2506
[17:29:45.933] <TB1> INFO: valid pixel hits: 2506
[17:29:45.933] <TB1> INFO: Event errors: 0
[17:29:45.933] <TB1> INFO: start marker: 0
[17:29:45.933] <TB1> INFO: stop marker: 0
[17:29:45.933] <TB1> INFO: overflow: 0
[17:29:45.933] <TB1> INFO: invalid 5bit words: 0
[17:29:45.933] <TB1> INFO: invalid XOR eye diagram: 0
[17:29:45.933] <TB1> INFO: frame (failed synchr.): 0
[17:29:45.933] <TB1> INFO: idle data (no TBM trl): 0
[17:29:45.933] <TB1> INFO: no data (only TBM hdr): 0
[17:29:45.933] <TB1> INFO: TBM errors: 0
[17:29:45.933] <TB1> INFO: flawed TBM headers: 0
[17:29:45.933] <TB1> INFO: flawed TBM trailers: 0
[17:29:45.933] <TB1> INFO: event ID mismatches: 0
[17:29:45.933] <TB1> INFO: ROC errors: 0
[17:29:45.933] <TB1> INFO: missing ROC header(s): 0
[17:29:45.933] <TB1> INFO: misplaced readback start: 0
[17:29:45.933] <TB1> INFO: Pixel decoding errors: 0
[17:29:45.933] <TB1> INFO: pixel data incomplete: 0
[17:29:45.933] <TB1> INFO: pixel address: 0
[17:29:45.933] <TB1> INFO: pulse height fill bit: 0
[17:29:45.933] <TB1> INFO: buffer corruption: 0
[17:29:46.092] <TB1> INFO: ######################################################################
[17:29:46.092] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:29:46.092] <TB1> INFO: ######################################################################
[17:29:46.106] <TB1> INFO: scanning low vcal = 10
[17:29:46.344] <TB1> INFO: Expecting 41600 events.
[17:29:49.931] <TB1> INFO: 41600 events read in total (2995ms).
[17:29:49.931] <TB1> INFO: Test took 3825ms.
[17:29:49.933] <TB1> INFO: scanning low vcal = 20
[17:29:50.231] <TB1> INFO: Expecting 41600 events.
[17:29:53.842] <TB1> INFO: 41600 events read in total (3019ms).
[17:29:53.843] <TB1> INFO: Test took 3910ms.
[17:29:53.844] <TB1> INFO: scanning low vcal = 30
[17:29:54.139] <TB1> INFO: Expecting 41600 events.
[17:29:57.822] <TB1> INFO: 41600 events read in total (3091ms).
[17:29:57.823] <TB1> INFO: Test took 3978ms.
[17:29:57.826] <TB1> INFO: scanning low vcal = 40
[17:29:58.103] <TB1> INFO: Expecting 41600 events.
[17:30:02.077] <TB1> INFO: 41600 events read in total (3382ms).
[17:30:02.078] <TB1> INFO: Test took 4252ms.
[17:30:02.081] <TB1> INFO: scanning low vcal = 50
[17:30:02.359] <TB1> INFO: Expecting 41600 events.
[17:30:06.346] <TB1> INFO: 41600 events read in total (3396ms).
[17:30:06.347] <TB1> INFO: Test took 4265ms.
[17:30:06.351] <TB1> INFO: scanning low vcal = 60
[17:30:06.627] <TB1> INFO: Expecting 41600 events.
[17:30:10.619] <TB1> INFO: 41600 events read in total (3401ms).
[17:30:10.620] <TB1> INFO: Test took 4269ms.
[17:30:10.624] <TB1> INFO: scanning low vcal = 70
[17:30:10.901] <TB1> INFO: Expecting 41600 events.
[17:30:14.945] <TB1> INFO: 41600 events read in total (3452ms).
[17:30:14.946] <TB1> INFO: Test took 4322ms.
[17:30:14.949] <TB1> INFO: scanning low vcal = 80
[17:30:15.225] <TB1> INFO: Expecting 41600 events.
[17:30:19.260] <TB1> INFO: 41600 events read in total (3443ms).
[17:30:19.261] <TB1> INFO: Test took 4313ms.
[17:30:19.266] <TB1> INFO: scanning low vcal = 90
[17:30:19.542] <TB1> INFO: Expecting 41600 events.
[17:30:23.535] <TB1> INFO: 41600 events read in total (3402ms).
[17:30:23.536] <TB1> INFO: Test took 4270ms.
[17:30:23.540] <TB1> INFO: scanning low vcal = 100
[17:30:23.817] <TB1> INFO: Expecting 41600 events.
[17:30:27.862] <TB1> INFO: 41600 events read in total (3454ms).
[17:30:27.862] <TB1> INFO: Test took 4322ms.
[17:30:27.865] <TB1> INFO: scanning low vcal = 110
[17:30:28.143] <TB1> INFO: Expecting 41600 events.
[17:30:32.138] <TB1> INFO: 41600 events read in total (3403ms).
[17:30:32.139] <TB1> INFO: Test took 4274ms.
[17:30:32.142] <TB1> INFO: scanning low vcal = 120
[17:30:32.424] <TB1> INFO: Expecting 41600 events.
[17:30:36.433] <TB1> INFO: 41600 events read in total (3418ms).
[17:30:36.434] <TB1> INFO: Test took 4292ms.
[17:30:36.437] <TB1> INFO: scanning low vcal = 130
[17:30:36.714] <TB1> INFO: Expecting 41600 events.
[17:30:40.747] <TB1> INFO: 41600 events read in total (3441ms).
[17:30:40.748] <TB1> INFO: Test took 4311ms.
[17:30:40.750] <TB1> INFO: scanning low vcal = 140
[17:30:41.028] <TB1> INFO: Expecting 41600 events.
[17:30:45.075] <TB1> INFO: 41600 events read in total (3456ms).
[17:30:45.076] <TB1> INFO: Test took 4325ms.
[17:30:45.080] <TB1> INFO: scanning low vcal = 150
[17:30:45.356] <TB1> INFO: Expecting 41600 events.
[17:30:49.321] <TB1> INFO: 41600 events read in total (3373ms).
[17:30:49.322] <TB1> INFO: Test took 4242ms.
[17:30:49.326] <TB1> INFO: scanning low vcal = 160
[17:30:49.601] <TB1> INFO: Expecting 41600 events.
[17:30:53.588] <TB1> INFO: 41600 events read in total (3395ms).
[17:30:53.589] <TB1> INFO: Test took 4263ms.
[17:30:53.592] <TB1> INFO: scanning low vcal = 170
[17:30:53.869] <TB1> INFO: Expecting 41600 events.
[17:30:57.870] <TB1> INFO: 41600 events read in total (3409ms).
[17:30:57.871] <TB1> INFO: Test took 4279ms.
[17:30:57.877] <TB1> INFO: scanning low vcal = 180
[17:30:58.151] <TB1> INFO: Expecting 41600 events.
[17:31:02.141] <TB1> INFO: 41600 events read in total (3397ms).
[17:31:02.141] <TB1> INFO: Test took 4264ms.
[17:31:02.145] <TB1> INFO: scanning low vcal = 190
[17:31:02.422] <TB1> INFO: Expecting 41600 events.
[17:31:06.393] <TB1> INFO: 41600 events read in total (3379ms).
[17:31:06.394] <TB1> INFO: Test took 4249ms.
[17:31:06.398] <TB1> INFO: scanning low vcal = 200
[17:31:06.674] <TB1> INFO: Expecting 41600 events.
[17:31:10.636] <TB1> INFO: 41600 events read in total (3370ms).
[17:31:10.637] <TB1> INFO: Test took 4239ms.
[17:31:10.640] <TB1> INFO: scanning low vcal = 210
[17:31:10.917] <TB1> INFO: Expecting 41600 events.
[17:31:14.934] <TB1> INFO: 41600 events read in total (3425ms).
[17:31:14.935] <TB1> INFO: Test took 4294ms.
[17:31:14.938] <TB1> INFO: scanning low vcal = 220
[17:31:15.215] <TB1> INFO: Expecting 41600 events.
[17:31:19.180] <TB1> INFO: 41600 events read in total (3373ms).
[17:31:19.181] <TB1> INFO: Test took 4243ms.
[17:31:19.184] <TB1> INFO: scanning low vcal = 230
[17:31:19.461] <TB1> INFO: Expecting 41600 events.
[17:31:23.473] <TB1> INFO: 41600 events read in total (3420ms).
[17:31:23.474] <TB1> INFO: Test took 4290ms.
[17:31:23.479] <TB1> INFO: scanning low vcal = 240
[17:31:23.764] <TB1> INFO: Expecting 41600 events.
[17:31:27.765] <TB1> INFO: 41600 events read in total (3409ms).
[17:31:27.766] <TB1> INFO: Test took 4287ms.
[17:31:27.769] <TB1> INFO: scanning low vcal = 250
[17:31:28.047] <TB1> INFO: Expecting 41600 events.
[17:31:32.028] <TB1> INFO: 41600 events read in total (3390ms).
[17:31:32.028] <TB1> INFO: Test took 4259ms.
[17:31:32.034] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[17:31:32.309] <TB1> INFO: Expecting 41600 events.
[17:31:36.298] <TB1> INFO: 41600 events read in total (3398ms).
[17:31:36.299] <TB1> INFO: Test took 4265ms.
[17:31:36.302] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[17:31:36.579] <TB1> INFO: Expecting 41600 events.
[17:31:40.589] <TB1> INFO: 41600 events read in total (3418ms).
[17:31:40.589] <TB1> INFO: Test took 4287ms.
[17:31:40.593] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[17:31:40.870] <TB1> INFO: Expecting 41600 events.
[17:31:44.830] <TB1> INFO: 41600 events read in total (3368ms).
[17:31:44.831] <TB1> INFO: Test took 4238ms.
[17:31:44.834] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[17:31:45.112] <TB1> INFO: Expecting 41600 events.
[17:31:49.082] <TB1> INFO: 41600 events read in total (3379ms).
[17:31:49.082] <TB1> INFO: Test took 4249ms.
[17:31:49.086] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:31:49.363] <TB1> INFO: Expecting 41600 events.
[17:31:53.423] <TB1> INFO: 41600 events read in total (3468ms).
[17:31:53.424] <TB1> INFO: Test took 4338ms.
[17:31:53.838] <TB1> INFO: PixTestGainPedestal::measure() done
[17:32:26.961] <TB1> INFO: PixTestGainPedestal::fit() done
[17:32:26.961] <TB1> INFO: non-linearity mean: 0.978 0.976 0.972 0.896 0.898 0.977 0.924 0.899 0.984 0.944 0.923 0.977 0.973 0.889 0.970 0.972
[17:32:26.961] <TB1> INFO: non-linearity RMS: 0.002 0.003 0.004 0.127 0.119 0.003 0.181 0.108 0.003 0.019 0.058 0.004 0.004 0.107 0.005 0.003
[17:32:26.961] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:32:26.980] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:32:26.999] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:32:27.018] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:32:27.037] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:32:27.056] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:32:27.075] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:32:27.094] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:32:27.113] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:32:27.132] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:32:27.150] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:32:27.169] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:32:27.188] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:32:27.207] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:32:27.226] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:32:27.245] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:32:27.264] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[17:32:27.264] <TB1> INFO: Decoding statistics:
[17:32:27.264] <TB1> INFO: General information:
[17:32:27.264] <TB1> INFO: 16bit words read: 3327954
[17:32:27.264] <TB1> INFO: valid events total: 332800
[17:32:27.264] <TB1> INFO: empty events: 0
[17:32:27.264] <TB1> INFO: valid events with pixels: 332800
[17:32:27.264] <TB1> INFO: valid pixel hits: 665577
[17:32:27.264] <TB1> INFO: Event errors: 0
[17:32:27.264] <TB1> INFO: start marker: 0
[17:32:27.264] <TB1> INFO: stop marker: 0
[17:32:27.264] <TB1> INFO: overflow: 0
[17:32:27.264] <TB1> INFO: invalid 5bit words: 0
[17:32:27.264] <TB1> INFO: invalid XOR eye diagram: 0
[17:32:27.264] <TB1> INFO: frame (failed synchr.): 0
[17:32:27.264] <TB1> INFO: idle data (no TBM trl): 0
[17:32:27.264] <TB1> INFO: no data (only TBM hdr): 0
[17:32:27.264] <TB1> INFO: TBM errors: 0
[17:32:27.264] <TB1> INFO: flawed TBM headers: 0
[17:32:27.264] <TB1> INFO: flawed TBM trailers: 0
[17:32:27.264] <TB1> INFO: event ID mismatches: 0
[17:32:27.264] <TB1> INFO: ROC errors: 0
[17:32:27.264] <TB1> INFO: missing ROC header(s): 0
[17:32:27.264] <TB1> INFO: misplaced readback start: 0
[17:32:27.264] <TB1> INFO: Pixel decoding errors: 0
[17:32:27.264] <TB1> INFO: pixel data incomplete: 0
[17:32:27.264] <TB1> INFO: pixel address: 0
[17:32:27.264] <TB1> INFO: pulse height fill bit: 0
[17:32:27.264] <TB1> INFO: buffer corruption: 0
[17:32:27.292] <TB1> INFO: Decoding statistics:
[17:32:27.292] <TB1> INFO: General information:
[17:32:27.292] <TB1> INFO: 16bit words read: 3457382
[17:32:27.292] <TB1> INFO: valid events total: 353536
[17:32:27.292] <TB1> INFO: empty events: 18230
[17:32:27.292] <TB1> INFO: valid events with pixels: 335306
[17:32:27.292] <TB1> INFO: valid pixel hits: 668083
[17:32:27.292] <TB1> INFO: Event errors: 0
[17:32:27.292] <TB1> INFO: start marker: 0
[17:32:27.292] <TB1> INFO: stop marker: 0
[17:32:27.292] <TB1> INFO: overflow: 0
[17:32:27.292] <TB1> INFO: invalid 5bit words: 0
[17:32:27.292] <TB1> INFO: invalid XOR eye diagram: 0
[17:32:27.292] <TB1> INFO: frame (failed synchr.): 0
[17:32:27.292] <TB1> INFO: idle data (no TBM trl): 0
[17:32:27.292] <TB1> INFO: no data (only TBM hdr): 0
[17:32:27.292] <TB1> INFO: TBM errors: 0
[17:32:27.292] <TB1> INFO: flawed TBM headers: 0
[17:32:27.292] <TB1> INFO: flawed TBM trailers: 0
[17:32:27.292] <TB1> INFO: event ID mismatches: 0
[17:32:27.292] <TB1> INFO: ROC errors: 0
[17:32:27.292] <TB1> INFO: missing ROC header(s): 0
[17:32:27.292] <TB1> INFO: misplaced readback start: 0
[17:32:27.292] <TB1> INFO: Pixel decoding errors: 0
[17:32:27.292] <TB1> INFO: pixel data incomplete: 0
[17:32:27.292] <TB1> INFO: pixel address: 0
[17:32:27.293] <TB1> INFO: pulse height fill bit: 0
[17:32:27.293] <TB1> INFO: buffer corruption: 0
[17:32:27.293] <TB1> INFO: enter test to run
[17:32:27.293] <TB1> INFO: test: exit no parameter change
[17:32:27.444] <TB1> QUIET: Connection to board 154 closed.
[17:32:27.445] <TB1> INFO: pXar: this is the end, my friend