[17:44:51.796] <TB1> INFO: *** Welcome to pxar ***
[17:44:51.796] <TB1> INFO: *** Today: 2016/11/02
[17:44:51.802] <TB1> INFO: *** Version: c8ba-dirty
[17:44:51.802] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C15.dat
[17:44:51.803] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[17:44:51.803] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//defaultMaskFile.dat
[17:44:51.804] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters_C15.dat
[17:44:51.908] <TB1> INFO: clk: 4
[17:44:51.908] <TB1> INFO: ctr: 4
[17:44:51.908] <TB1> INFO: sda: 19
[17:44:51.908] <TB1> INFO: tin: 9
[17:44:51.908] <TB1> INFO: level: 15
[17:44:51.908] <TB1> INFO: triggerdelay: 0
[17:44:51.908] <TB1> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[17:44:51.908] <TB1> INFO: Log level: INFO
[17:44:51.917] <TB1> INFO: Found DTB DTB_WXC03A
[17:44:51.929] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[17:44:51.931] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[17:44:51.932] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[17:44:53.423] <TB1> INFO: DUT info:
[17:44:53.423] <TB1> INFO: The DUT currently contains the following objects:
[17:44:53.423] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[17:44:53.423] <TB1> INFO: TBM Core alpha (0): 7 registers set
[17:44:53.423] <TB1> INFO: TBM Core beta (1): 7 registers set
[17:44:53.423] <TB1> INFO: TBM Core alpha (2): 7 registers set
[17:44:53.423] <TB1> INFO: TBM Core beta (3): 7 registers set
[17:44:53.423] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:44:53.423] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.423] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:44:53.824] <TB1> INFO: enter 'restricted' command line mode
[17:44:53.824] <TB1> INFO: enter test to run
[17:44:53.824] <TB1> INFO: test: pretest no parameter change
[17:44:53.824] <TB1> INFO: running: pretest
[17:44:53.830] <TB1> INFO: ######################################################################
[17:44:53.830] <TB1> INFO: PixTestPretest::doTest()
[17:44:53.830] <TB1> INFO: ######################################################################
[17:44:53.831] <TB1> INFO: ----------------------------------------------------------------------
[17:44:53.831] <TB1> INFO: PixTestPretest::programROC()
[17:44:53.831] <TB1> INFO: ----------------------------------------------------------------------
[17:45:11.845] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:45:11.845] <TB1> INFO: IA differences per ROC: 17.7 16.9 17.7 18.5 18.5 19.3 16.1 16.1 19.3 20.1 17.7 18.5 17.7 17.7 18.5 18.5
[17:45:11.900] <TB1> INFO: ----------------------------------------------------------------------
[17:45:11.900] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:45:11.900] <TB1> INFO: ----------------------------------------------------------------------
[17:45:20.113] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[17:45:20.113] <TB1> INFO: i(loss) [mA/ROC]: 20.9 20.1 20.9 20.1 20.1 20.1 20.1 20.9 20.1 20.9 20.1 20.9 20.1 20.1 20.1 20.1
[17:45:20.145] <TB1> INFO: ----------------------------------------------------------------------
[17:45:20.145] <TB1> INFO: PixTestPretest::findTiming()
[17:45:20.145] <TB1> INFO: ----------------------------------------------------------------------
[17:45:20.145] <TB1> INFO: PixTestCmd::init()

[17:45:52.247] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:45:52.247] <TB1> INFO: (success/tries = 100/100), width = 3
[17:45:53.745] <TB1> INFO: ----------------------------------------------------------------------
[17:45:53.745] <TB1> INFO: PixTestPretest::findWorkingPixel()
[17:45:53.745] <TB1> INFO: ----------------------------------------------------------------------
[17:45:53.841] <TB1> INFO: Expecting 231680 events.
[17:46:03.783] <TB1> INFO: 231680 events read in total (9351ms).
[17:46:03.792] <TB1> INFO: Test took 10041ms.
[17:46:04.041] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:46:04.080] <TB1> INFO: ----------------------------------------------------------------------
[17:46:04.080] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[17:46:04.080] <TB1> INFO: ----------------------------------------------------------------------
[17:46:04.175] <TB1> INFO: Expecting 231680 events.
[17:46:14.167] <TB1> INFO: 231680 events read in total (9400ms).
[17:46:14.183] <TB1> INFO: Test took 10098ms.
[17:46:14.441] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[17:46:14.441] <TB1> INFO: CalDel: 82 63 68 79 79 80 68 72 85 98 91 79 81 71 78 78
[17:46:14.441] <TB1> INFO: VthrComp: 52 53 51 51 51 51 53 51 54 51 51 51 51 51 51 51
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C0.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C1.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C2.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C3.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C4.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C5.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C6.dat
[17:46:14.444] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C7.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C8.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C9.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C10.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C11.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C12.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C13.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C14.dat
[17:46:14.445] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters_C15.dat
[17:46:14.445] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[17:46:14.445] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[17:46:14.446] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[17:46:14.446] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[17:46:14.446] <TB1> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[17:46:14.503] <TB1> INFO: enter test to run
[17:46:14.503] <TB1> INFO: test: fulltest no parameter change
[17:46:14.503] <TB1> INFO: running: fulltest
[17:46:14.503] <TB1> INFO: ######################################################################
[17:46:14.503] <TB1> INFO: PixTestFullTest::doTest()
[17:46:14.503] <TB1> INFO: ######################################################################
[17:46:14.504] <TB1> INFO: ######################################################################
[17:46:14.504] <TB1> INFO: PixTestAlive::doTest()
[17:46:14.504] <TB1> INFO: ######################################################################
[17:46:14.505] <TB1> INFO: ----------------------------------------------------------------------
[17:46:14.505] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:46:14.505] <TB1> INFO: ----------------------------------------------------------------------
[17:46:14.747] <TB1> INFO: Expecting 41600 events.
[17:46:18.265] <TB1> INFO: 41600 events read in total (2927ms).
[17:46:18.265] <TB1> INFO: Test took 3756ms.
[17:46:18.498] <TB1> INFO: PixTestAlive::aliveTest() done
[17:46:18.498] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
[17:46:18.500] <TB1> INFO: ----------------------------------------------------------------------
[17:46:18.500] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:46:18.500] <TB1> INFO: ----------------------------------------------------------------------
[17:46:18.743] <TB1> INFO: Expecting 41600 events.
[17:46:21.758] <TB1> INFO: 41600 events read in total (2423ms).
[17:46:21.759] <TB1> INFO: Test took 3257ms.
[17:46:21.759] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:46:21.995] <TB1> INFO: PixTestAlive::maskTest() done
[17:46:21.995] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:46:21.997] <TB1> INFO: ----------------------------------------------------------------------
[17:46:21.997] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:46:21.997] <TB1> INFO: ----------------------------------------------------------------------
[17:46:22.243] <TB1> INFO: Expecting 41600 events.
[17:46:25.778] <TB1> INFO: 41600 events read in total (2943ms).
[17:46:25.779] <TB1> INFO: Test took 3778ms.
[17:46:26.012] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[17:46:26.012] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:46:26.012] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:46:26.012] <TB1> INFO: Decoding statistics:
[17:46:26.012] <TB1> INFO: General information:
[17:46:26.012] <TB1> INFO: 16bit words read: 0
[17:46:26.013] <TB1> INFO: valid events total: 0
[17:46:26.013] <TB1> INFO: empty events: 0
[17:46:26.013] <TB1> INFO: valid events with pixels: 0
[17:46:26.013] <TB1> INFO: valid pixel hits: 0
[17:46:26.013] <TB1> INFO: Event errors: 0
[17:46:26.013] <TB1> INFO: start marker: 0
[17:46:26.013] <TB1> INFO: stop marker: 0
[17:46:26.013] <TB1> INFO: overflow: 0
[17:46:26.013] <TB1> INFO: invalid 5bit words: 0
[17:46:26.013] <TB1> INFO: invalid XOR eye diagram: 0
[17:46:26.013] <TB1> INFO: frame (failed synchr.): 0
[17:46:26.013] <TB1> INFO: idle data (no TBM trl): 0
[17:46:26.013] <TB1> INFO: no data (only TBM hdr): 0
[17:46:26.013] <TB1> INFO: TBM errors: 0
[17:46:26.013] <TB1> INFO: flawed TBM headers: 0
[17:46:26.013] <TB1> INFO: flawed TBM trailers: 0
[17:46:26.013] <TB1> INFO: event ID mismatches: 0
[17:46:26.013] <TB1> INFO: ROC errors: 0
[17:46:26.013] <TB1> INFO: missing ROC header(s): 0
[17:46:26.013] <TB1> INFO: misplaced readback start: 0
[17:46:26.013] <TB1> INFO: Pixel decoding errors: 0
[17:46:26.013] <TB1> INFO: pixel data incomplete: 0
[17:46:26.013] <TB1> INFO: pixel address: 0
[17:46:26.013] <TB1> INFO: pulse height fill bit: 0
[17:46:26.013] <TB1> INFO: buffer corruption: 0
[17:46:26.020] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:46:26.020] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[17:46:26.020] <TB1> INFO: ######################################################################
[17:46:26.020] <TB1> INFO: PixTestReadback::doTest()
[17:46:26.020] <TB1> INFO: ######################################################################
[17:46:26.020] <TB1> INFO: ----------------------------------------------------------------------
[17:46:26.020] <TB1> INFO: PixTestReadback::CalibrateVd()
[17:46:26.020] <TB1> INFO: ----------------------------------------------------------------------
[17:46:35.985] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:46:35.985] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:46:35.986] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:46:35.987] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:46:35.987] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:46:36.017] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:46:36.017] <TB1> INFO: ----------------------------------------------------------------------
[17:46:36.017] <TB1> INFO: PixTestReadback::CalibrateVa()
[17:46:36.017] <TB1> INFO: ----------------------------------------------------------------------
[17:46:45.937] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:46:45.938] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:46:45.939] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:46:45.939] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:46:45.939] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:46:45.973] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:46:45.973] <TB1> INFO: ----------------------------------------------------------------------
[17:46:45.973] <TB1> INFO: PixTestReadback::readbackVbg()
[17:46:45.973] <TB1> INFO: ----------------------------------------------------------------------
[17:46:53.642] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:46:53.642] <TB1> INFO: ----------------------------------------------------------------------
[17:46:53.642] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[17:46:53.642] <TB1> INFO: ----------------------------------------------------------------------
[17:46:53.642] <TB1> INFO: Vbg will be calibrated using Vd calibration
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.5calibrated Vbg = 1.20307 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 157.9calibrated Vbg = 1.19168 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 143.5calibrated Vbg = 1.18711 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.3calibrated Vbg = 1.18777 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.6calibrated Vbg = 1.19459 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 142.8calibrated Vbg = 1.19767 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 145.7calibrated Vbg = 1.1986 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.8calibrated Vbg = 1.20054 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159.1calibrated Vbg = 1.19177 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151.9calibrated Vbg = 1.19762 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.4calibrated Vbg = 1.18146 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.5calibrated Vbg = 1.18399 :::*/*/*/*/
[17:46:53.642] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.6calibrated Vbg = 1.18471 :::*/*/*/*/
[17:46:53.643] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.2calibrated Vbg = 1.1899 :::*/*/*/*/
[17:46:53.643] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.3calibrated Vbg = 1.19316 :::*/*/*/*/
[17:46:53.643] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 150.7calibrated Vbg = 1.19258 :::*/*/*/*/
[17:46:53.645] <TB1> INFO: ----------------------------------------------------------------------
[17:46:53.646] <TB1> INFO: PixTestReadback::CalibrateIa()
[17:46:53.646] <TB1> INFO: ----------------------------------------------------------------------
[17:49:34.489] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C0.dat
[17:49:34.489] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C1.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C2.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C3.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C4.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C5.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C6.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C7.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C8.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C9.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C10.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C11.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C12.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C13.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C14.dat
[17:49:34.490] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//readbackCal_C15.dat
[17:49:34.522] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[17:49:34.525] <TB1> INFO: PixTestReadback::doTest() done
[17:49:34.525] <TB1> INFO: Decoding statistics:
[17:49:34.525] <TB1> INFO: General information:
[17:49:34.525] <TB1> INFO: 16bit words read: 1536
[17:49:34.525] <TB1> INFO: valid events total: 256
[17:49:34.525] <TB1> INFO: empty events: 256
[17:49:34.525] <TB1> INFO: valid events with pixels: 0
[17:49:34.525] <TB1> INFO: valid pixel hits: 0
[17:49:34.525] <TB1> INFO: Event errors: 0
[17:49:34.525] <TB1> INFO: start marker: 0
[17:49:34.525] <TB1> INFO: stop marker: 0
[17:49:34.525] <TB1> INFO: overflow: 0
[17:49:34.525] <TB1> INFO: invalid 5bit words: 0
[17:49:34.525] <TB1> INFO: invalid XOR eye diagram: 0
[17:49:34.525] <TB1> INFO: frame (failed synchr.): 0
[17:49:34.525] <TB1> INFO: idle data (no TBM trl): 0
[17:49:34.525] <TB1> INFO: no data (only TBM hdr): 0
[17:49:34.525] <TB1> INFO: TBM errors: 0
[17:49:34.526] <TB1> INFO: flawed TBM headers: 0
[17:49:34.526] <TB1> INFO: flawed TBM trailers: 0
[17:49:34.526] <TB1> INFO: event ID mismatches: 0
[17:49:34.526] <TB1> INFO: ROC errors: 0
[17:49:34.526] <TB1> INFO: missing ROC header(s): 0
[17:49:34.526] <TB1> INFO: misplaced readback start: 0
[17:49:34.526] <TB1> INFO: Pixel decoding errors: 0
[17:49:34.526] <TB1> INFO: pixel data incomplete: 0
[17:49:34.526] <TB1> INFO: pixel address: 0
[17:49:34.526] <TB1> INFO: pulse height fill bit: 0
[17:49:34.526] <TB1> INFO: buffer corruption: 0
[17:49:34.578] <TB1> INFO: ######################################################################
[17:49:34.578] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:49:34.578] <TB1> INFO: ######################################################################
[17:49:34.581] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:49:34.646] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:49:34.646] <TB1> INFO: run 1 of 1
[17:49:34.888] <TB1> INFO: Expecting 3120000 events.
[17:50:06.620] <TB1> INFO: 673955 events read in total (31140ms).











[17:50:37.261] <TB1> INFO: 1340160 events read in total (61781ms).
[17:51:07.937] <TB1> INFO: 2000925 events read in total (92457ms).











[17:51:38.753] <TB1> INFO: 2660960 events read in total (123273ms).











[17:52:00.169] <TB1> INFO: 3120000 events read in total (144689ms).
[17:52:00.277] <TB1> INFO: Test took 145633ms.
[17:52:28.423] <TB1> INFO: PixTestBBMap::doTest() done with 4 decoding errors: , duration: 173 seconds
[17:52:28.423] <TB1> INFO: number of dead bumps (per ROC): 1 0 0 0 0 1 1 1 0 0 0 0 0 1 0 1
[17:52:28.423] <TB1> INFO: separation cut (per ROC): 111 109 107 110 105 105 104 106 126 103 115 111 103 105 111 106
[17:52:28.423] <TB1> INFO: Decoding statistics:
[17:52:28.423] <TB1> INFO: General information:
[17:52:28.423] <TB1> INFO: 16bit words read: 0
[17:52:28.423] <TB1> INFO: valid events total: 0
[17:52:28.423] <TB1> INFO: empty events: 0
[17:52:28.423] <TB1> INFO: valid events with pixels: 0
[17:52:28.423] <TB1> INFO: valid pixel hits: 0
[17:52:28.423] <TB1> INFO: Event errors: 0
[17:52:28.423] <TB1> INFO: start marker: 0
[17:52:28.423] <TB1> INFO: stop marker: 0
[17:52:28.423] <TB1> INFO: overflow: 0
[17:52:28.423] <TB1> INFO: invalid 5bit words: 0
[17:52:28.423] <TB1> INFO: invalid XOR eye diagram: 0
[17:52:28.423] <TB1> INFO: frame (failed synchr.): 0
[17:52:28.423] <TB1> INFO: idle data (no TBM trl): 0
[17:52:28.423] <TB1> INFO: no data (only TBM hdr): 0
[17:52:28.423] <TB1> INFO: TBM errors: 0
[17:52:28.423] <TB1> INFO: flawed TBM headers: 0
[17:52:28.423] <TB1> INFO: flawed TBM trailers: 0
[17:52:28.423] <TB1> INFO: event ID mismatches: 0
[17:52:28.423] <TB1> INFO: ROC errors: 0
[17:52:28.423] <TB1> INFO: missing ROC header(s): 0
[17:52:28.423] <TB1> INFO: misplaced readback start: 0
[17:52:28.423] <TB1> INFO: Pixel decoding errors: 0
[17:52:28.423] <TB1> INFO: pixel data incomplete: 0
[17:52:28.423] <TB1> INFO: pixel address: 0
[17:52:28.423] <TB1> INFO: pulse height fill bit: 0
[17:52:28.423] <TB1> INFO: buffer corruption: 0
[17:52:28.471] <TB1> INFO: ######################################################################
[17:52:28.471] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:52:28.471] <TB1> INFO: ######################################################################
[17:52:28.471] <TB1> INFO: ----------------------------------------------------------------------
[17:52:28.472] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:52:28.472] <TB1> INFO: ----------------------------------------------------------------------
[17:52:28.472] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:52:28.486] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[17:52:28.486] <TB1> INFO: run 1 of 1
[17:52:28.757] <TB1> INFO: Expecting 36608000 events.
[17:52:53.077] <TB1> INFO: 699600 events read in total (23728ms).
[17:53:16.149] <TB1> INFO: 1382800 events read in total (46800ms).
[17:53:39.545] <TB1> INFO: 2066550 events read in total (70196ms).
[17:54:02.924] <TB1> INFO: 2749750 events read in total (93575ms).
[17:54:26.398] <TB1> INFO: 3431950 events read in total (117049ms).
[17:54:49.387] <TB1> INFO: 4116300 events read in total (140038ms).
[17:55:12.743] <TB1> INFO: 4797400 events read in total (163394ms).
[17:55:36.874] <TB1> INFO: 5477850 events read in total (187525ms).
[17:56:00.184] <TB1> INFO: 6158700 events read in total (210835ms).
[17:56:23.531] <TB1> INFO: 6839950 events read in total (234182ms).
[17:56:46.776] <TB1> INFO: 7518500 events read in total (257427ms).
[17:57:09.997] <TB1> INFO: 8197250 events read in total (280648ms).
[17:57:33.400] <TB1> INFO: 8877000 events read in total (304051ms).
[17:57:56.659] <TB1> INFO: 9557750 events read in total (327310ms).
[17:58:19.994] <TB1> INFO: 10239350 events read in total (350645ms).
[17:58:43.432] <TB1> INFO: 10918400 events read in total (374083ms).
[17:59:07.079] <TB1> INFO: 11598550 events read in total (397730ms).
[17:59:30.753] <TB1> INFO: 12280750 events read in total (421404ms).
[17:59:54.412] <TB1> INFO: 12960850 events read in total (445063ms).
[18:00:18.342] <TB1> INFO: 13639800 events read in total (468993ms).
[18:00:42.332] <TB1> INFO: 14321050 events read in total (492983ms).
[18:01:06.433] <TB1> INFO: 15000900 events read in total (517084ms).
[18:01:30.909] <TB1> INFO: 15679250 events read in total (541560ms).
[18:01:55.485] <TB1> INFO: 16357050 events read in total (566136ms).
[18:02:19.659] <TB1> INFO: 17034550 events read in total (590310ms).
[18:02:43.697] <TB1> INFO: 17710600 events read in total (614348ms).
[18:03:08.244] <TB1> INFO: 18384100 events read in total (638895ms).
[18:03:32.913] <TB1> INFO: 19059700 events read in total (663564ms).
[18:03:57.281] <TB1> INFO: 19734550 events read in total (687932ms).
[18:04:22.350] <TB1> INFO: 20406950 events read in total (713001ms).
[18:04:46.527] <TB1> INFO: 21080800 events read in total (737178ms).
[18:05:11.491] <TB1> INFO: 21753000 events read in total (762142ms).
[18:05:36.796] <TB1> INFO: 22425900 events read in total (787447ms).
[18:06:01.559] <TB1> INFO: 23098000 events read in total (812210ms).
[18:06:25.354] <TB1> INFO: 23772900 events read in total (836005ms).
[18:06:49.504] <TB1> INFO: 24446050 events read in total (860155ms).
[18:07:13.916] <TB1> INFO: 25118900 events read in total (884567ms).
[18:07:38.546] <TB1> INFO: 25791450 events read in total (909197ms).
[18:08:02.906] <TB1> INFO: 26464950 events read in total (933557ms).
[18:08:27.301] <TB1> INFO: 27138400 events read in total (957952ms).
[18:08:52.157] <TB1> INFO: 27812800 events read in total (982808ms).
[18:09:16.748] <TB1> INFO: 28483900 events read in total (1007399ms).
[18:09:41.152] <TB1> INFO: 29153750 events read in total (1031803ms).
[18:10:05.919] <TB1> INFO: 29824900 events read in total (1056570ms).
[18:10:30.853] <TB1> INFO: 30494150 events read in total (1081504ms).
[18:10:55.067] <TB1> INFO: 31164050 events read in total (1105718ms).
[18:11:19.348] <TB1> INFO: 31835350 events read in total (1129999ms).
[18:11:43.757] <TB1> INFO: 32506150 events read in total (1154408ms).
[18:12:07.612] <TB1> INFO: 33178950 events read in total (1178263ms).
[18:12:31.979] <TB1> INFO: 33850350 events read in total (1202630ms).
[18:12:56.462] <TB1> INFO: 34519550 events read in total (1227113ms).
[18:13:20.703] <TB1> INFO: 35188350 events read in total (1251354ms).
[18:13:44.709] <TB1> INFO: 35858500 events read in total (1275360ms).
[18:14:09.794] <TB1> INFO: 36544150 events read in total (1300445ms).
[18:14:12.452] <TB1> INFO: 36608000 events read in total (1303103ms).
[18:14:12.553] <TB1> INFO: Test took 1304066ms.
[18:14:13.061] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:15.183] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:16.861] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:18.610] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:20.436] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:22.042] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:23.759] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:25.735] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:27.778] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:29.923] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:32.015] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:33.690] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:35.251] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:36.796] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:38.720] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:40.644] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:14:42.395] <TB1> INFO: PixTestScurves::scurves() done
[18:14:42.395] <TB1> INFO: Vcal mean: 129.30 116.50 117.26 125.56 122.56 114.61 126.74 123.37 134.03 113.29 130.27 128.00 124.42 117.12 127.60 121.03
[18:14:42.395] <TB1> INFO: Vcal RMS: 6.26 5.12 5.32 6.23 6.52 5.04 5.55 5.65 6.09 5.12 6.58 5.93 5.81 5.21 5.44 5.98
[18:14:42.395] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1333 seconds
[18:14:42.395] <TB1> INFO: Decoding statistics:
[18:14:42.395] <TB1> INFO: General information:
[18:14:42.395] <TB1> INFO: 16bit words read: 0
[18:14:42.395] <TB1> INFO: valid events total: 0
[18:14:42.395] <TB1> INFO: empty events: 0
[18:14:42.395] <TB1> INFO: valid events with pixels: 0
[18:14:42.395] <TB1> INFO: valid pixel hits: 0
[18:14:42.395] <TB1> INFO: Event errors: 0
[18:14:42.395] <TB1> INFO: start marker: 0
[18:14:42.395] <TB1> INFO: stop marker: 0
[18:14:42.395] <TB1> INFO: overflow: 0
[18:14:42.395] <TB1> INFO: invalid 5bit words: 0
[18:14:42.395] <TB1> INFO: invalid XOR eye diagram: 0
[18:14:42.395] <TB1> INFO: frame (failed synchr.): 0
[18:14:42.395] <TB1> INFO: idle data (no TBM trl): 0
[18:14:42.395] <TB1> INFO: no data (only TBM hdr): 0
[18:14:42.395] <TB1> INFO: TBM errors: 0
[18:14:42.395] <TB1> INFO: flawed TBM headers: 0
[18:14:42.396] <TB1> INFO: flawed TBM trailers: 0
[18:14:42.396] <TB1> INFO: event ID mismatches: 0
[18:14:42.396] <TB1> INFO: ROC errors: 0
[18:14:42.396] <TB1> INFO: missing ROC header(s): 0
[18:14:42.396] <TB1> INFO: misplaced readback start: 0
[18:14:42.396] <TB1> INFO: Pixel decoding errors: 0
[18:14:42.396] <TB1> INFO: pixel data incomplete: 0
[18:14:42.396] <TB1> INFO: pixel address: 0
[18:14:42.396] <TB1> INFO: pulse height fill bit: 0
[18:14:42.396] <TB1> INFO: buffer corruption: 0
[18:14:42.463] <TB1> INFO: ######################################################################
[18:14:42.463] <TB1> INFO: PixTestTrim::doTest()
[18:14:42.463] <TB1> INFO: ######################################################################
[18:14:42.464] <TB1> INFO: ----------------------------------------------------------------------
[18:14:42.464] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:14:42.464] <TB1> INFO: ----------------------------------------------------------------------
[18:14:42.504] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:14:42.504] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:14:42.518] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:14:42.518] <TB1> INFO: run 1 of 1
[18:14:42.790] <TB1> INFO: Expecting 5025280 events.
[18:15:16.459] <TB1> INFO: 832056 events read in total (33066ms).
[18:15:48.081] <TB1> INFO: 1662240 events read in total (64688ms).
[18:16:19.430] <TB1> INFO: 2490400 events read in total (96037ms).
[18:16:50.491] <TB1> INFO: 3313320 events read in total (127098ms).
[18:17:21.426] <TB1> INFO: 4132936 events read in total (158034ms).
[18:17:52.868] <TB1> INFO: 4950856 events read in total (189475ms).
[18:17:56.198] <TB1> INFO: 5025280 events read in total (192805ms).
[18:17:56.265] <TB1> INFO: Test took 193746ms.
[18:18:14.377] <TB1> INFO: ROC 0 VthrComp = 132
[18:18:14.378] <TB1> INFO: ROC 1 VthrComp = 128
[18:18:14.378] <TB1> INFO: ROC 2 VthrComp = 125
[18:18:14.378] <TB1> INFO: ROC 3 VthrComp = 129
[18:18:14.378] <TB1> INFO: ROC 4 VthrComp = 130
[18:18:14.378] <TB1> INFO: ROC 5 VthrComp = 123
[18:18:14.379] <TB1> INFO: ROC 6 VthrComp = 130
[18:18:14.379] <TB1> INFO: ROC 7 VthrComp = 129
[18:18:14.379] <TB1> INFO: ROC 8 VthrComp = 133
[18:18:14.380] <TB1> INFO: ROC 9 VthrComp = 122
[18:18:14.380] <TB1> INFO: ROC 10 VthrComp = 131
[18:18:14.380] <TB1> INFO: ROC 11 VthrComp = 132
[18:18:14.380] <TB1> INFO: ROC 12 VthrComp = 134
[18:18:14.380] <TB1> INFO: ROC 13 VthrComp = 131
[18:18:14.380] <TB1> INFO: ROC 14 VthrComp = 133
[18:18:14.381] <TB1> INFO: ROC 15 VthrComp = 132
[18:18:14.628] <TB1> INFO: Expecting 41600 events.
[18:18:18.079] <TB1> INFO: 41600 events read in total (2859ms).
[18:18:18.080] <TB1> INFO: Test took 3698ms.
[18:18:18.091] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:18:18.091] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:18:18.105] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:18:18.105] <TB1> INFO: run 1 of 1
[18:18:18.383] <TB1> INFO: Expecting 5025280 events.
[18:18:47.217] <TB1> INFO: 588232 events read in total (28242ms).
[18:19:14.517] <TB1> INFO: 1175768 events read in total (55542ms).
[18:19:42.287] <TB1> INFO: 1763040 events read in total (83312ms).
[18:20:10.514] <TB1> INFO: 2349464 events read in total (111539ms).
[18:20:37.992] <TB1> INFO: 2933784 events read in total (139017ms).
[18:21:05.951] <TB1> INFO: 3518080 events read in total (166976ms).
[18:21:33.599] <TB1> INFO: 4101848 events read in total (194624ms).
[18:22:00.381] <TB1> INFO: 4685040 events read in total (221406ms).
[18:22:16.761] <TB1> INFO: 5025280 events read in total (237786ms).
[18:22:16.854] <TB1> INFO: Test took 238750ms.
[18:22:47.961] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.3107 for pixel 1/6 mean/min/max = 45.7861/31.2493/60.3228
[18:22:47.961] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 56.9804 for pixel 21/5 mean/min/max = 44.8245/32.5909/57.0582
[18:22:47.962] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.5607 for pixel 0/16 mean/min/max = 44.588/31.5795/57.5966
[18:22:47.962] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 61.6453 for pixel 10/23 mean/min/max = 48.3394/35.0292/61.6496
[18:22:47.963] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.4366 for pixel 51/1 mean/min/max = 44.7937/31.1183/58.4692
[18:22:47.963] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.01 for pixel 20/20 mean/min/max = 45.1092/33.1037/57.1146
[18:22:47.964] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.0429 for pixel 0/53 mean/min/max = 46.1237/32.1609/60.0865
[18:22:47.964] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.0458 for pixel 8/0 mean/min/max = 45.5168/31.9793/59.0543
[18:22:47.965] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 67.2201 for pixel 17/2 mean/min/max = 52.2772/37.1957/67.3586
[18:22:47.965] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 58.3285 for pixel 17/1 mean/min/max = 45.5734/32.7331/58.4137
[18:22:47.966] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.7697 for pixel 0/66 mean/min/max = 48.6133/34.4137/62.8128
[18:22:47.966] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 61.2324 for pixel 15/2 mean/min/max = 46.8317/32.2928/61.3705
[18:22:47.967] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 56.9821 for pixel 17/79 mean/min/max = 44.6509/32.187/57.1147
[18:22:47.967] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 55.8109 for pixel 18/7 mean/min/max = 43.7015/31.4919/55.9111
[18:22:47.968] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 58.4561 for pixel 0/4 mean/min/max = 46.5352/34.525/58.5455
[18:22:47.968] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.2247 for pixel 2/15 mean/min/max = 45.035/31.7487/58.3213
[18:22:47.968] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:22:48.057] <TB1> INFO: Expecting 411648 events.
[18:22:57.728] <TB1> INFO: 411648 events read in total (9079ms).
[18:22:57.736] <TB1> INFO: Expecting 411648 events.
[18:23:07.340] <TB1> INFO: 411648 events read in total (9201ms).
[18:23:07.355] <TB1> INFO: Expecting 411648 events.
[18:23:17.059] <TB1> INFO: 411648 events read in total (9291ms).
[18:23:17.073] <TB1> INFO: Expecting 411648 events.
[18:23:26.926] <TB1> INFO: 411648 events read in total (9447ms).
[18:23:26.945] <TB1> INFO: Expecting 411648 events.
[18:23:36.336] <TB1> INFO: 411648 events read in total (8981ms).
[18:23:36.365] <TB1> INFO: Expecting 411648 events.
[18:23:45.823] <TB1> INFO: 411648 events read in total (9055ms).
[18:23:45.853] <TB1> INFO: Expecting 411648 events.
[18:23:55.221] <TB1> INFO: 411648 events read in total (8965ms).
[18:23:55.247] <TB1> INFO: Expecting 411648 events.
[18:24:04.588] <TB1> INFO: 411648 events read in total (8937ms).
[18:24:04.619] <TB1> INFO: Expecting 411648 events.
[18:24:13.971] <TB1> INFO: 411648 events read in total (8950ms).
[18:24:14.004] <TB1> INFO: Expecting 411648 events.
[18:24:23.455] <TB1> INFO: 411648 events read in total (9048ms).
[18:24:23.500] <TB1> INFO: Expecting 411648 events.
[18:24:32.813] <TB1> INFO: 411648 events read in total (8910ms).
[18:24:32.849] <TB1> INFO: Expecting 411648 events.
[18:24:42.134] <TB1> INFO: 411648 events read in total (8879ms).
[18:24:42.175] <TB1> INFO: Expecting 411648 events.
[18:24:51.757] <TB1> INFO: 411648 events read in total (9178ms).
[18:24:51.823] <TB1> INFO: Expecting 411648 events.
[18:25:01.197] <TB1> INFO: 411648 events read in total (8969ms).
[18:25:01.262] <TB1> INFO: Expecting 411648 events.
[18:25:10.618] <TB1> INFO: 411648 events read in total (8953ms).
[18:25:10.667] <TB1> INFO: Expecting 411648 events.
[18:25:20.198] <TB1> INFO: 411648 events read in total (9128ms).
[18:25:20.263] <TB1> INFO: Test took 152295ms.
[18:25:21.162] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:25:21.179] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:25:21.179] <TB1> INFO: run 1 of 1
[18:25:21.548] <TB1> INFO: Expecting 5025280 events.
[18:25:48.537] <TB1> INFO: 585320 events read in total (26397ms).
[18:26:15.210] <TB1> INFO: 1169832 events read in total (53070ms).
[18:26:42.548] <TB1> INFO: 1754368 events read in total (80408ms).
[18:27:09.000] <TB1> INFO: 2338240 events read in total (107860ms).
[18:27:37.667] <TB1> INFO: 2922176 events read in total (135527ms).
[18:28:05.264] <TB1> INFO: 3504888 events read in total (163124ms).
[18:28:32.467] <TB1> INFO: 4086024 events read in total (190327ms).
[18:28:59.812] <TB1> INFO: 4668656 events read in total (217672ms).
[18:29:17.511] <TB1> INFO: 5025280 events read in total (235371ms).
[18:29:17.696] <TB1> INFO: Test took 236518ms.
[18:29:47.803] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 12.006799 .. 142.093868
[18:29:48.048] <TB1> INFO: Expecting 208000 events.
[18:29:58.229] <TB1> INFO: 208000 events read in total (9589ms).
[18:29:58.230] <TB1> INFO: Test took 10425ms.
[18:29:58.323] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 152 (-1/-1) hits flags = 528 (plus default)
[18:29:58.340] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:29:58.340] <TB1> INFO: run 1 of 1
[18:29:58.624] <TB1> INFO: Expecting 5025280 events.
[18:30:27.222] <TB1> INFO: 584552 events read in total (28006ms).
[18:30:54.496] <TB1> INFO: 1168872 events read in total (55280ms).
[18:31:22.189] <TB1> INFO: 1752816 events read in total (82974ms).
[18:31:49.123] <TB1> INFO: 2336912 events read in total (109907ms).
[18:32:16.022] <TB1> INFO: 2920840 events read in total (136807ms).
[18:32:43.212] <TB1> INFO: 3504136 events read in total (163996ms).
[18:33:10.353] <TB1> INFO: 4087520 events read in total (191137ms).
[18:33:37.482] <TB1> INFO: 4670448 events read in total (218266ms).
[18:33:54.141] <TB1> INFO: 5025280 events read in total (234925ms).
[18:33:54.275] <TB1> INFO: Test took 235936ms.
[18:34:25.747] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.210258 .. 47.255385
[18:34:26.055] <TB1> INFO: Expecting 208000 events.
[18:34:36.757] <TB1> INFO: 208000 events read in total (10111ms).
[18:34:36.758] <TB1> INFO: Test took 11009ms.
[18:34:36.844] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[18:34:36.860] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:34:36.860] <TB1> INFO: run 1 of 1
[18:34:37.138] <TB1> INFO: Expecting 1364480 events.
[18:35:07.439] <TB1> INFO: 650784 events read in total (29709ms).
[18:35:36.036] <TB1> INFO: 1301520 events read in total (58306ms).
[18:35:39.054] <TB1> INFO: 1364480 events read in total (61325ms).
[18:35:39.104] <TB1> INFO: Test took 62244ms.
[18:35:57.466] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 27.957574 .. 49.122559
[18:35:57.711] <TB1> INFO: Expecting 208000 events.
[18:36:07.617] <TB1> INFO: 208000 events read in total (9315ms).
[18:36:07.618] <TB1> INFO: Test took 10149ms.
[18:36:07.681] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 59 (-1/-1) hits flags = 528 (plus default)
[18:36:07.695] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:36:07.695] <TB1> INFO: run 1 of 1
[18:36:07.974] <TB1> INFO: Expecting 1431040 events.
[18:36:37.590] <TB1> INFO: 645872 events read in total (29024ms).
[18:37:06.527] <TB1> INFO: 1290520 events read in total (57962ms).
[18:37:13.216] <TB1> INFO: 1431040 events read in total (64651ms).
[18:37:13.254] <TB1> INFO: Test took 65560ms.
[18:37:28.817] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 25.690831 .. 52.747336
[18:37:29.115] <TB1> INFO: Expecting 208000 events.
[18:37:39.691] <TB1> INFO: 208000 events read in total (9980ms).
[18:37:39.692] <TB1> INFO: Test took 10874ms.
[18:37:39.749] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 62 (-1/-1) hits flags = 528 (plus default)
[18:37:39.763] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:37:39.763] <TB1> INFO: run 1 of 1
[18:37:40.041] <TB1> INFO: Expecting 1597440 events.
[18:38:09.504] <TB1> INFO: 643944 events read in total (28872ms).
[18:38:38.079] <TB1> INFO: 1287752 events read in total (57447ms).
[18:38:51.879] <TB1> INFO: 1597440 events read in total (71247ms).
[18:38:51.920] <TB1> INFO: Test took 72157ms.
[18:39:06.873] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:39:06.873] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:39:06.888] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:39:06.888] <TB1> INFO: run 1 of 1
[18:39:07.198] <TB1> INFO: Expecting 1364480 events.
[18:39:36.504] <TB1> INFO: 668464 events read in total (28713ms).
[18:40:05.983] <TB1> INFO: 1336696 events read in total (58192ms).
[18:40:07.792] <TB1> INFO: 1364480 events read in total (60001ms).
[18:40:07.834] <TB1> INFO: Test took 60947ms.
[18:40:22.811] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C0.dat
[18:40:22.811] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C1.dat
[18:40:22.811] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C2.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C3.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C4.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C5.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C6.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C7.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C8.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C9.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C10.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C11.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C12.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C13.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C14.dat
[18:40:22.812] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C15.dat
[18:40:22.813] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C0.dat
[18:40:22.818] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C1.dat
[18:40:22.823] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C2.dat
[18:40:22.828] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C3.dat
[18:40:22.833] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C4.dat
[18:40:22.838] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C5.dat
[18:40:22.843] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C6.dat
[18:40:22.848] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C7.dat
[18:40:22.853] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C8.dat
[18:40:22.858] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C9.dat
[18:40:22.863] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C10.dat
[18:40:22.867] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C11.dat
[18:40:22.872] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C12.dat
[18:40:22.878] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C13.dat
[18:40:22.883] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C14.dat
[18:40:22.887] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters35_C15.dat
[18:40:22.892] <TB1> INFO: PixTestTrim::trimTest() done
[18:40:22.892] <TB1> INFO: vtrim: 123 128 132 132 113 129 120 124 183 122 139 137 120 117 127 133
[18:40:22.892] <TB1> INFO: vthrcomp: 132 128 125 129 130 123 130 129 133 122 131 132 134 131 133 132
[18:40:22.892] <TB1> INFO: vcal mean: 35.06 35.01 35.05 35.15 35.10 34.96 35.12 35.02 35.76 35.01 35.06 35.09 34.99 34.99 35.09 35.00
[18:40:22.892] <TB1> INFO: vcal RMS: 1.11 0.95 1.01 1.12 1.21 0.98 1.18 1.09 1.94 0.97 1.20 1.14 0.97 1.00 1.01 1.03
[18:40:22.892] <TB1> INFO: bits mean: 9.47 9.72 9.99 8.76 9.58 9.83 9.37 9.29 8.73 9.56 8.51 9.36 9.41 10.22 8.48 9.84
[18:40:22.892] <TB1> INFO: bits RMS: 2.79 2.57 2.53 2.44 2.87 2.42 2.78 2.85 2.22 2.55 2.58 2.70 2.75 2.52 2.70 2.60
[18:40:22.902] <TB1> INFO: ----------------------------------------------------------------------
[18:40:22.902] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:40:22.902] <TB1> INFO: ----------------------------------------------------------------------
[18:40:22.905] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:40:22.920] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:40:22.920] <TB1> INFO: run 1 of 1
[18:40:23.185] <TB1> INFO: Expecting 4160000 events.
[18:40:57.106] <TB1> INFO: 769260 events read in total (33329ms).
[18:41:29.386] <TB1> INFO: 1534855 events read in total (65609ms).
[18:42:01.503] <TB1> INFO: 2295570 events read in total (97726ms).
[18:42:34.360] <TB1> INFO: 3051780 events read in total (130583ms).
[18:43:07.631] <TB1> INFO: 3804960 events read in total (163854ms).
[18:43:24.145] <TB1> INFO: 4160000 events read in total (180368ms).
[18:43:24.218] <TB1> INFO: Test took 181297ms.
[18:43:55.484] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[18:43:55.499] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:43:55.499] <TB1> INFO: run 1 of 1
[18:43:55.826] <TB1> INFO: Expecting 4305600 events.
[18:44:29.204] <TB1> INFO: 734360 events read in total (32786ms).
[18:45:01.303] <TB1> INFO: 1465420 events read in total (64885ms).
[18:45:33.143] <TB1> INFO: 2194075 events read in total (96725ms).
[18:46:04.860] <TB1> INFO: 2918370 events read in total (128442ms).
[18:46:36.331] <TB1> INFO: 3640350 events read in total (159913ms).
[18:47:06.544] <TB1> INFO: 4305600 events read in total (190126ms).
[18:47:06.643] <TB1> INFO: Test took 191143ms.
[18:47:36.898] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[18:47:36.912] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:47:36.912] <TB1> INFO: run 1 of 1
[18:47:37.151] <TB1> INFO: Expecting 4284800 events.
[18:48:10.414] <TB1> INFO: 736370 events read in total (32671ms).
[18:48:42.230] <TB1> INFO: 1469295 events read in total (64487ms).
[18:49:14.108] <TB1> INFO: 2199360 events read in total (96365ms).
[18:49:46.208] <TB1> INFO: 2925025 events read in total (128465ms).
[18:50:17.833] <TB1> INFO: 3649075 events read in total (160090ms).
[18:50:46.724] <TB1> INFO: 4284800 events read in total (188981ms).
[18:50:46.825] <TB1> INFO: Test took 189913ms.
[18:51:17.305] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[18:51:17.320] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:51:17.320] <TB1> INFO: run 1 of 1
[18:51:17.565] <TB1> INFO: Expecting 4264000 events.
[18:51:51.160] <TB1> INFO: 737985 events read in total (33004ms).
[18:52:23.657] <TB1> INFO: 1472220 events read in total (65501ms).
[18:52:55.647] <TB1> INFO: 2203500 events read in total (97492ms).
[18:53:27.884] <TB1> INFO: 2929965 events read in total (129728ms).
[18:54:00.389] <TB1> INFO: 3655440 events read in total (162233ms).
[18:54:28.467] <TB1> INFO: 4264000 events read in total (190311ms).
[18:54:28.560] <TB1> INFO: Test took 191241ms.
[18:54:59.127] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[18:54:59.142] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:54:59.142] <TB1> INFO: run 1 of 1
[18:54:59.411] <TB1> INFO: Expecting 4243200 events.
[18:55:32.742] <TB1> INFO: 739670 events read in total (32739ms).
[18:56:04.784] <TB1> INFO: 1475325 events read in total (64781ms).
[18:56:37.168] <TB1> INFO: 2208110 events read in total (97166ms).
[18:57:09.049] <TB1> INFO: 2936920 events read in total (129046ms).
[18:57:42.857] <TB1> INFO: 3663570 events read in total (162854ms).
[18:58:09.200] <TB1> INFO: 4243200 events read in total (189197ms).
[18:58:09.296] <TB1> INFO: Test took 190153ms.
[18:58:37.972] <TB1> INFO: PixTestTrim::trimBitTest() done
[18:58:37.973] <TB1> INFO: PixTestTrim::doTest() done, duration: 2635 seconds
[18:58:37.973] <TB1> INFO: Decoding statistics:
[18:58:37.973] <TB1> INFO: General information:
[18:58:37.973] <TB1> INFO: 16bit words read: 0
[18:58:37.973] <TB1> INFO: valid events total: 0
[18:58:37.973] <TB1> INFO: empty events: 0
[18:58:37.973] <TB1> INFO: valid events with pixels: 0
[18:58:37.973] <TB1> INFO: valid pixel hits: 0
[18:58:37.973] <TB1> INFO: Event errors: 0
[18:58:37.973] <TB1> INFO: start marker: 0
[18:58:37.973] <TB1> INFO: stop marker: 0
[18:58:37.973] <TB1> INFO: overflow: 0
[18:58:37.973] <TB1> INFO: invalid 5bit words: 0
[18:58:37.973] <TB1> INFO: invalid XOR eye diagram: 0
[18:58:37.973] <TB1> INFO: frame (failed synchr.): 0
[18:58:37.973] <TB1> INFO: idle data (no TBM trl): 0
[18:58:37.973] <TB1> INFO: no data (only TBM hdr): 0
[18:58:37.973] <TB1> INFO: TBM errors: 0
[18:58:37.973] <TB1> INFO: flawed TBM headers: 0
[18:58:37.973] <TB1> INFO: flawed TBM trailers: 0
[18:58:37.973] <TB1> INFO: event ID mismatches: 0
[18:58:37.973] <TB1> INFO: ROC errors: 0
[18:58:37.973] <TB1> INFO: missing ROC header(s): 0
[18:58:37.973] <TB1> INFO: misplaced readback start: 0
[18:58:37.973] <TB1> INFO: Pixel decoding errors: 0
[18:58:37.973] <TB1> INFO: pixel data incomplete: 0
[18:58:37.973] <TB1> INFO: pixel address: 0
[18:58:37.973] <TB1> INFO: pulse height fill bit: 0
[18:58:37.973] <TB1> INFO: buffer corruption: 0
[18:58:38.635] <TB1> INFO: ######################################################################
[18:58:38.635] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:58:38.635] <TB1> INFO: ######################################################################
[18:58:38.901] <TB1> INFO: Expecting 41600 events.
[18:58:42.438] <TB1> INFO: 41600 events read in total (2945ms).
[18:58:42.439] <TB1> INFO: Test took 3803ms.
[18:58:42.879] <TB1> INFO: Expecting 41600 events.
[18:58:46.453] <TB1> INFO: 41600 events read in total (2982ms).
[18:58:46.454] <TB1> INFO: Test took 3811ms.
[18:58:46.744] <TB1> INFO: Expecting 41600 events.
[18:58:50.432] <TB1> INFO: 41600 events read in total (3097ms).
[18:58:50.434] <TB1> INFO: Test took 3955ms.
[18:58:50.802] <TB1> INFO: Expecting 41600 events.
[18:58:54.399] <TB1> INFO: 41600 events read in total (3005ms).
[18:58:54.400] <TB1> INFO: Test took 3943ms.
[18:58:54.719] <TB1> INFO: Expecting 41600 events.
[18:58:58.257] <TB1> INFO: 41600 events read in total (2940ms).
[18:58:58.258] <TB1> INFO: Test took 3827ms.
[18:58:58.547] <TB1> INFO: Expecting 41600 events.
[18:59:02.153] <TB1> INFO: 41600 events read in total (3015ms).
[18:59:02.154] <TB1> INFO: Test took 3871ms.
[18:59:02.444] <TB1> INFO: Expecting 41600 events.
[18:59:06.044] <TB1> INFO: 41600 events read in total (3009ms).
[18:59:06.045] <TB1> INFO: Test took 3866ms.
[18:59:06.444] <TB1> INFO: Expecting 41600 events.
[18:59:09.979] <TB1> INFO: 41600 events read in total (2943ms).
[18:59:09.981] <TB1> INFO: Test took 3906ms.
[18:59:10.385] <TB1> INFO: Expecting 41600 events.
[18:59:14.114] <TB1> INFO: 41600 events read in total (3138ms).
[18:59:14.115] <TB1> INFO: Test took 4103ms.
[18:59:14.508] <TB1> INFO: Expecting 41600 events.
[18:59:18.316] <TB1> INFO: 41600 events read in total (3214ms).
[18:59:18.319] <TB1> INFO: Test took 4172ms.
[18:59:18.651] <TB1> INFO: Expecting 41600 events.
[18:59:22.228] <TB1> INFO: 41600 events read in total (2985ms).
[18:59:22.229] <TB1> INFO: Test took 3881ms.
[18:59:22.522] <TB1> INFO: Expecting 41600 events.
[18:59:26.206] <TB1> INFO: 41600 events read in total (3086ms).
[18:59:26.207] <TB1> INFO: Test took 3950ms.
[18:59:26.499] <TB1> INFO: Expecting 41600 events.
[18:59:30.033] <TB1> INFO: 41600 events read in total (2942ms).
[18:59:30.034] <TB1> INFO: Test took 3800ms.
[18:59:30.376] <TB1> INFO: Expecting 41600 events.
[18:59:33.962] <TB1> INFO: 41600 events read in total (2994ms).
[18:59:33.964] <TB1> INFO: Test took 3905ms.
[18:59:34.346] <TB1> INFO: Expecting 41600 events.
[18:59:37.978] <TB1> INFO: 41600 events read in total (3040ms).
[18:59:37.980] <TB1> INFO: Test took 3989ms.
[18:59:38.289] <TB1> INFO: Expecting 41600 events.
[18:59:41.797] <TB1> INFO: 41600 events read in total (2916ms).
[18:59:41.798] <TB1> INFO: Test took 3793ms.
[18:59:42.088] <TB1> INFO: Expecting 41600 events.
[18:59:45.639] <TB1> INFO: 41600 events read in total (2959ms).
[18:59:45.640] <TB1> INFO: Test took 3817ms.
[18:59:45.930] <TB1> INFO: Expecting 41600 events.
[18:59:49.438] <TB1> INFO: 41600 events read in total (2916ms).
[18:59:49.439] <TB1> INFO: Test took 3774ms.
[18:59:49.757] <TB1> INFO: Expecting 41600 events.
[18:59:53.361] <TB1> INFO: 41600 events read in total (3012ms).
[18:59:53.363] <TB1> INFO: Test took 3897ms.
[18:59:53.654] <TB1> INFO: Expecting 41600 events.
[18:59:57.213] <TB1> INFO: 41600 events read in total (2967ms).
[18:59:57.214] <TB1> INFO: Test took 3827ms.
[18:59:57.504] <TB1> INFO: Expecting 41600 events.
[19:00:01.151] <TB1> INFO: 41600 events read in total (3055ms).
[19:00:01.152] <TB1> INFO: Test took 3914ms.
[19:00:01.441] <TB1> INFO: Expecting 41600 events.
[19:00:05.100] <TB1> INFO: 41600 events read in total (3067ms).
[19:00:05.101] <TB1> INFO: Test took 3925ms.
[19:00:05.391] <TB1> INFO: Expecting 41600 events.
[19:00:08.874] <TB1> INFO: 41600 events read in total (2891ms).
[19:00:08.875] <TB1> INFO: Test took 3749ms.
[19:00:09.164] <TB1> INFO: Expecting 41600 events.
[19:00:12.671] <TB1> INFO: 41600 events read in total (2915ms).
[19:00:12.672] <TB1> INFO: Test took 3773ms.
[19:00:12.965] <TB1> INFO: Expecting 41600 events.
[19:00:16.537] <TB1> INFO: 41600 events read in total (2980ms).
[19:00:16.538] <TB1> INFO: Test took 3842ms.
[19:00:16.828] <TB1> INFO: Expecting 41600 events.
[19:00:20.414] <TB1> INFO: 41600 events read in total (2995ms).
[19:00:20.415] <TB1> INFO: Test took 3852ms.
[19:00:20.705] <TB1> INFO: Expecting 41600 events.
[19:00:24.286] <TB1> INFO: 41600 events read in total (2989ms).
[19:00:24.287] <TB1> INFO: Test took 3847ms.
[19:00:24.579] <TB1> INFO: Expecting 41600 events.
[19:00:28.224] <TB1> INFO: 41600 events read in total (3053ms).
[19:00:28.225] <TB1> INFO: Test took 3911ms.
[19:00:28.515] <TB1> INFO: Expecting 41600 events.
[19:00:32.142] <TB1> INFO: 41600 events read in total (3036ms).
[19:00:32.144] <TB1> INFO: Test took 3894ms.
[19:00:32.434] <TB1> INFO: Expecting 41600 events.
[19:00:36.076] <TB1> INFO: 41600 events read in total (3050ms).
[19:00:36.077] <TB1> INFO: Test took 3907ms.
[19:00:36.369] <TB1> INFO: Expecting 2560 events.
[19:00:37.253] <TB1> INFO: 2560 events read in total (293ms).
[19:00:37.254] <TB1> INFO: Test took 1162ms.
[19:00:37.561] <TB1> INFO: Expecting 2560 events.
[19:00:38.445] <TB1> INFO: 2560 events read in total (293ms).
[19:00:38.445] <TB1> INFO: Test took 1191ms.
[19:00:38.753] <TB1> INFO: Expecting 2560 events.
[19:00:39.640] <TB1> INFO: 2560 events read in total (295ms).
[19:00:39.640] <TB1> INFO: Test took 1194ms.
[19:00:39.947] <TB1> INFO: Expecting 2560 events.
[19:00:40.830] <TB1> INFO: 2560 events read in total (291ms).
[19:00:40.831] <TB1> INFO: Test took 1191ms.
[19:00:41.151] <TB1> INFO: Expecting 2560 events.
[19:00:42.030] <TB1> INFO: 2560 events read in total (287ms).
[19:00:42.031] <TB1> INFO: Test took 1200ms.
[19:00:42.338] <TB1> INFO: Expecting 2560 events.
[19:00:43.226] <TB1> INFO: 2560 events read in total (293ms).
[19:00:43.227] <TB1> INFO: Test took 1195ms.
[19:00:43.535] <TB1> INFO: Expecting 2560 events.
[19:00:44.414] <TB1> INFO: 2560 events read in total (288ms).
[19:00:44.414] <TB1> INFO: Test took 1187ms.
[19:00:44.722] <TB1> INFO: Expecting 2560 events.
[19:00:45.601] <TB1> INFO: 2560 events read in total (288ms).
[19:00:45.602] <TB1> INFO: Test took 1187ms.
[19:00:45.909] <TB1> INFO: Expecting 2560 events.
[19:00:46.794] <TB1> INFO: 2560 events read in total (293ms).
[19:00:46.794] <TB1> INFO: Test took 1192ms.
[19:00:47.102] <TB1> INFO: Expecting 2560 events.
[19:00:47.984] <TB1> INFO: 2560 events read in total (291ms).
[19:00:47.984] <TB1> INFO: Test took 1189ms.
[19:00:48.292] <TB1> INFO: Expecting 2560 events.
[19:00:49.172] <TB1> INFO: 2560 events read in total (289ms).
[19:00:49.172] <TB1> INFO: Test took 1187ms.
[19:00:49.480] <TB1> INFO: Expecting 2560 events.
[19:00:50.363] <TB1> INFO: 2560 events read in total (292ms).
[19:00:50.363] <TB1> INFO: Test took 1191ms.
[19:00:50.670] <TB1> INFO: Expecting 2560 events.
[19:00:51.555] <TB1> INFO: 2560 events read in total (293ms).
[19:00:51.555] <TB1> INFO: Test took 1190ms.
[19:00:51.863] <TB1> INFO: Expecting 2560 events.
[19:00:52.752] <TB1> INFO: 2560 events read in total (297ms).
[19:00:52.752] <TB1> INFO: Test took 1197ms.
[19:00:53.061] <TB1> INFO: Expecting 2560 events.
[19:00:53.947] <TB1> INFO: 2560 events read in total (295ms).
[19:00:53.947] <TB1> INFO: Test took 1194ms.
[19:00:54.254] <TB1> INFO: Expecting 2560 events.
[19:00:55.138] <TB1> INFO: 2560 events read in total (292ms).
[19:00:55.138] <TB1> INFO: Test took 1191ms.
[19:00:55.142] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:00:55.446] <TB1> INFO: Expecting 655360 events.
[19:01:09.980] <TB1> INFO: 655360 events read in total (13943ms).
[19:01:09.993] <TB1> INFO: Expecting 655360 events.
[19:01:24.284] <TB1> INFO: 655360 events read in total (13888ms).
[19:01:24.301] <TB1> INFO: Expecting 655360 events.
[19:01:38.877] <TB1> INFO: 655360 events read in total (14173ms).
[19:01:38.910] <TB1> INFO: Expecting 655360 events.
[19:01:53.402] <TB1> INFO: 655360 events read in total (14088ms).
[19:01:53.436] <TB1> INFO: Expecting 655360 events.
[19:02:07.912] <TB1> INFO: 655360 events read in total (14073ms).
[19:02:07.944] <TB1> INFO: Expecting 655360 events.
[19:02:22.312] <TB1> INFO: 655360 events read in total (13965ms).
[19:02:22.366] <TB1> INFO: Expecting 655360 events.
[19:02:36.799] <TB1> INFO: 655360 events read in total (14030ms).
[19:02:36.847] <TB1> INFO: Expecting 655360 events.
[19:02:51.356] <TB1> INFO: 655360 events read in total (14106ms).
[19:02:51.414] <TB1> INFO: Expecting 655360 events.
[19:03:05.918] <TB1> INFO: 655360 events read in total (14100ms).
[19:03:06.011] <TB1> INFO: Expecting 655360 events.
[19:03:20.353] <TB1> INFO: 655360 events read in total (13933ms).
[19:03:20.418] <TB1> INFO: Expecting 655360 events.
[19:03:34.889] <TB1> INFO: 655360 events read in total (14068ms).
[19:03:34.996] <TB1> INFO: Expecting 655360 events.
[19:03:49.365] <TB1> INFO: 655360 events read in total (13965ms).
[19:03:49.474] <TB1> INFO: Expecting 655360 events.
[19:04:03.842] <TB1> INFO: 655360 events read in total (13965ms).
[19:04:03.928] <TB1> INFO: Expecting 655360 events.
[19:04:18.416] <TB1> INFO: 655360 events read in total (14085ms).
[19:04:18.504] <TB1> INFO: Expecting 655360 events.
[19:04:32.785] <TB1> INFO: 655360 events read in total (13878ms).
[19:04:32.890] <TB1> INFO: Expecting 655360 events.
[19:04:47.371] <TB1> INFO: 655360 events read in total (14078ms).
[19:04:47.502] <TB1> INFO: Test took 232360ms.
[19:04:47.603] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:04:47.859] <TB1> INFO: Expecting 655360 events.
[19:05:02.466] <TB1> INFO: 655360 events read in total (14015ms).
[19:05:02.486] <TB1> INFO: Expecting 655360 events.
[19:05:16.793] <TB1> INFO: 655360 events read in total (13904ms).
[19:05:16.819] <TB1> INFO: Expecting 655360 events.
[19:05:31.257] <TB1> INFO: 655360 events read in total (14035ms).
[19:05:31.279] <TB1> INFO: Expecting 655360 events.
[19:05:45.576] <TB1> INFO: 655360 events read in total (13894ms).
[19:05:45.608] <TB1> INFO: Expecting 655360 events.
[19:05:59.681] <TB1> INFO: 655360 events read in total (13669ms).
[19:05:59.712] <TB1> INFO: Expecting 655360 events.
[19:06:13.885] <TB1> INFO: 655360 events read in total (13770ms).
[19:06:13.924] <TB1> INFO: Expecting 655360 events.
[19:06:28.101] <TB1> INFO: 655360 events read in total (13774ms).
[19:06:28.167] <TB1> INFO: Expecting 655360 events.
[19:06:42.308] <TB1> INFO: 655360 events read in total (13738ms).
[19:06:42.353] <TB1> INFO: Expecting 655360 events.
[19:06:56.592] <TB1> INFO: 655360 events read in total (13833ms).
[19:06:56.679] <TB1> INFO: Expecting 655360 events.
[19:07:10.913] <TB1> INFO: 655360 events read in total (13831ms).
[19:07:10.982] <TB1> INFO: Expecting 655360 events.
[19:07:25.238] <TB1> INFO: 655360 events read in total (13853ms).
[19:07:25.312] <TB1> INFO: Expecting 655360 events.
[19:07:39.420] <TB1> INFO: 655360 events read in total (13705ms).
[19:07:39.498] <TB1> INFO: Expecting 655360 events.
[19:07:54.021] <TB1> INFO: 655360 events read in total (14120ms).
[19:07:54.121] <TB1> INFO: Expecting 655360 events.
[19:08:08.330] <TB1> INFO: 655360 events read in total (13802ms).
[19:08:08.452] <TB1> INFO: Expecting 655360 events.
[19:08:22.743] <TB1> INFO: 655360 events read in total (13888ms).
[19:08:22.850] <TB1> INFO: Expecting 655360 events.
[19:08:37.103] <TB1> INFO: 655360 events read in total (13850ms).
[19:08:37.275] <TB1> INFO: Test took 229672ms.
[19:08:37.520] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.528] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.536] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.544] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.552] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.560] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.568] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:37.576] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:37.584] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[19:08:37.592] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[19:08:37.600] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[19:08:37.608] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[19:08:37.616] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[19:08:37.624] <TB1> INFO: safety margin for low PH: adding 11, margin is now 31
[19:08:37.631] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.639] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.647] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.655] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.662] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.671] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.678] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:37.686] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:37.693] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.701] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.709] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.717] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.725] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:37.734] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:37.744] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[19:08:37.752] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[19:08:37.760] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[19:08:37.768] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[19:08:37.775] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.782] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.792] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.801] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.809] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.817] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.825] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.833] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.841] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.849] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.857] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.864] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.872] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.880] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:37.888] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:37.896] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[19:08:37.904] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[19:08:37.912] <TB1> INFO: safety margin for low PH: adding 8, margin is now 28
[19:08:37.920] <TB1> INFO: safety margin for low PH: adding 9, margin is now 29
[19:08:37.929] <TB1> INFO: safety margin for low PH: adding 10, margin is now 30
[19:08:37.937] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.944] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.953] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:37.960] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:37.968] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:37.976] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:37.984] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:37.992] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:37.999] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:38.007] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:38.015] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:08:38.024] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[19:08:38.031] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[19:08:38.039] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[19:08:38.047] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[19:08:38.055] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:38.063] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:08:38.099] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:08:38.099] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:08:38.099] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:08:38.100] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:08:38.101] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:08:38.342] <TB1> INFO: Expecting 41600 events.
[19:08:41.468] <TB1> INFO: 41600 events read in total (2534ms).
[19:08:41.469] <TB1> INFO: Test took 3364ms.
[19:08:41.918] <TB1> INFO: Expecting 41600 events.
[19:08:45.039] <TB1> INFO: 41600 events read in total (2530ms).
[19:08:45.041] <TB1> INFO: Test took 3361ms.
[19:08:45.493] <TB1> INFO: Expecting 41600 events.
[19:08:48.603] <TB1> INFO: 41600 events read in total (2518ms).
[19:08:48.604] <TB1> INFO: Test took 3349ms.
[19:08:48.821] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:48.910] <TB1> INFO: Expecting 2560 events.
[19:08:49.794] <TB1> INFO: 2560 events read in total (292ms).
[19:08:49.794] <TB1> INFO: Test took 973ms.
[19:08:49.796] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:50.102] <TB1> INFO: Expecting 2560 events.
[19:08:51.007] <TB1> INFO: 2560 events read in total (306ms).
[19:08:51.007] <TB1> INFO: Test took 1211ms.
[19:08:51.009] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:51.316] <TB1> INFO: Expecting 2560 events.
[19:08:52.205] <TB1> INFO: 2560 events read in total (298ms).
[19:08:52.205] <TB1> INFO: Test took 1196ms.
[19:08:52.208] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:52.513] <TB1> INFO: Expecting 2560 events.
[19:08:53.397] <TB1> INFO: 2560 events read in total (292ms).
[19:08:53.398] <TB1> INFO: Test took 1190ms.
[19:08:53.400] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:53.706] <TB1> INFO: Expecting 2560 events.
[19:08:54.592] <TB1> INFO: 2560 events read in total (295ms).
[19:08:54.593] <TB1> INFO: Test took 1193ms.
[19:08:54.595] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:54.901] <TB1> INFO: Expecting 2560 events.
[19:08:55.785] <TB1> INFO: 2560 events read in total (292ms).
[19:08:55.785] <TB1> INFO: Test took 1190ms.
[19:08:55.787] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:56.094] <TB1> INFO: Expecting 2560 events.
[19:08:56.977] <TB1> INFO: 2560 events read in total (292ms).
[19:08:56.977] <TB1> INFO: Test took 1190ms.
[19:08:56.979] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:57.285] <TB1> INFO: Expecting 2560 events.
[19:08:58.171] <TB1> INFO: 2560 events read in total (294ms).
[19:08:58.171] <TB1> INFO: Test took 1192ms.
[19:08:58.174] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:58.480] <TB1> INFO: Expecting 2560 events.
[19:08:59.365] <TB1> INFO: 2560 events read in total (294ms).
[19:08:59.365] <TB1> INFO: Test took 1191ms.
[19:08:59.368] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:08:59.673] <TB1> INFO: Expecting 2560 events.
[19:09:00.552] <TB1> INFO: 2560 events read in total (287ms).
[19:09:00.552] <TB1> INFO: Test took 1184ms.
[19:09:00.554] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:00.861] <TB1> INFO: Expecting 2560 events.
[19:09:01.742] <TB1> INFO: 2560 events read in total (290ms).
[19:09:01.742] <TB1> INFO: Test took 1188ms.
[19:09:01.745] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:02.051] <TB1> INFO: Expecting 2560 events.
[19:09:02.934] <TB1> INFO: 2560 events read in total (291ms).
[19:09:02.934] <TB1> INFO: Test took 1189ms.
[19:09:02.936] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:03.242] <TB1> INFO: Expecting 2560 events.
[19:09:04.123] <TB1> INFO: 2560 events read in total (291ms).
[19:09:04.124] <TB1> INFO: Test took 1188ms.
[19:09:04.126] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:04.435] <TB1> INFO: Expecting 2560 events.
[19:09:05.317] <TB1> INFO: 2560 events read in total (291ms).
[19:09:05.317] <TB1> INFO: Test took 1191ms.
[19:09:05.324] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:05.625] <TB1> INFO: Expecting 2560 events.
[19:09:06.506] <TB1> INFO: 2560 events read in total (289ms).
[19:09:06.506] <TB1> INFO: Test took 1182ms.
[19:09:06.509] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:06.814] <TB1> INFO: Expecting 2560 events.
[19:09:07.694] <TB1> INFO: 2560 events read in total (288ms).
[19:09:07.694] <TB1> INFO: Test took 1185ms.
[19:09:07.697] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:08.003] <TB1> INFO: Expecting 2560 events.
[19:09:08.883] <TB1> INFO: 2560 events read in total (288ms).
[19:09:08.883] <TB1> INFO: Test took 1187ms.
[19:09:08.885] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:09.191] <TB1> INFO: Expecting 2560 events.
[19:09:10.071] <TB1> INFO: 2560 events read in total (288ms).
[19:09:10.071] <TB1> INFO: Test took 1186ms.
[19:09:10.075] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:10.380] <TB1> INFO: Expecting 2560 events.
[19:09:11.265] <TB1> INFO: 2560 events read in total (294ms).
[19:09:11.265] <TB1> INFO: Test took 1191ms.
[19:09:11.269] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:11.573] <TB1> INFO: Expecting 2560 events.
[19:09:12.456] <TB1> INFO: 2560 events read in total (291ms).
[19:09:12.457] <TB1> INFO: Test took 1188ms.
[19:09:12.459] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:12.769] <TB1> INFO: Expecting 2560 events.
[19:09:13.649] <TB1> INFO: 2560 events read in total (288ms).
[19:09:13.649] <TB1> INFO: Test took 1190ms.
[19:09:13.652] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:13.957] <TB1> INFO: Expecting 2560 events.
[19:09:14.835] <TB1> INFO: 2560 events read in total (287ms).
[19:09:14.835] <TB1> INFO: Test took 1184ms.
[19:09:14.838] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:15.144] <TB1> INFO: Expecting 2560 events.
[19:09:16.024] <TB1> INFO: 2560 events read in total (289ms).
[19:09:16.025] <TB1> INFO: Test took 1187ms.
[19:09:16.027] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:16.333] <TB1> INFO: Expecting 2560 events.
[19:09:17.217] <TB1> INFO: 2560 events read in total (293ms).
[19:09:17.219] <TB1> INFO: Test took 1192ms.
[19:09:17.221] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:17.526] <TB1> INFO: Expecting 2560 events.
[19:09:18.409] <TB1> INFO: 2560 events read in total (292ms).
[19:09:18.409] <TB1> INFO: Test took 1188ms.
[19:09:18.412] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:18.718] <TB1> INFO: Expecting 2560 events.
[19:09:19.602] <TB1> INFO: 2560 events read in total (293ms).
[19:09:19.602] <TB1> INFO: Test took 1191ms.
[19:09:19.605] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:19.914] <TB1> INFO: Expecting 2560 events.
[19:09:20.806] <TB1> INFO: 2560 events read in total (301ms).
[19:09:20.806] <TB1> INFO: Test took 1202ms.
[19:09:20.809] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:21.113] <TB1> INFO: Expecting 2560 events.
[19:09:21.000] <TB1> INFO: 2560 events read in total (295ms).
[19:09:21.000] <TB1> INFO: Test took 1191ms.
[19:09:21.003] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:22.309] <TB1> INFO: Expecting 2560 events.
[19:09:23.200] <TB1> INFO: 2560 events read in total (300ms).
[19:09:23.200] <TB1> INFO: Test took 1198ms.
[19:09:23.203] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:23.509] <TB1> INFO: Expecting 2560 events.
[19:09:24.393] <TB1> INFO: 2560 events read in total (293ms).
[19:09:24.393] <TB1> INFO: Test took 1191ms.
[19:09:24.395] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:24.704] <TB1> INFO: Expecting 2560 events.
[19:09:25.591] <TB1> INFO: 2560 events read in total (295ms).
[19:09:25.591] <TB1> INFO: Test took 1196ms.
[19:09:25.594] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:09:25.900] <TB1> INFO: Expecting 2560 events.
[19:09:26.784] <TB1> INFO: 2560 events read in total (293ms).
[19:09:26.784] <TB1> INFO: Test took 1191ms.
[19:09:27.250] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 648 seconds
[19:09:27.250] <TB1> INFO: PH scale (per ROC): 48 51 43 44 38 48 41 40 58 53 48 48 41 44 39 44
[19:09:27.250] <TB1> INFO: PH offset (per ROC): 103 105 112 88 106 110 94 97 114 109 98 125 102 84 106 114
[19:09:27.256] <TB1> INFO: Decoding statistics:
[19:09:27.256] <TB1> INFO: General information:
[19:09:27.256] <TB1> INFO: 16bit words read: 127888
[19:09:27.256] <TB1> INFO: valid events total: 20480
[19:09:27.256] <TB1> INFO: empty events: 17976
[19:09:27.256] <TB1> INFO: valid events with pixels: 2504
[19:09:27.256] <TB1> INFO: valid pixel hits: 2504
[19:09:27.256] <TB1> INFO: Event errors: 0
[19:09:27.256] <TB1> INFO: start marker: 0
[19:09:27.256] <TB1> INFO: stop marker: 0
[19:09:27.256] <TB1> INFO: overflow: 0
[19:09:27.256] <TB1> INFO: invalid 5bit words: 0
[19:09:27.256] <TB1> INFO: invalid XOR eye diagram: 0
[19:09:27.256] <TB1> INFO: frame (failed synchr.): 0
[19:09:27.256] <TB1> INFO: idle data (no TBM trl): 0
[19:09:27.256] <TB1> INFO: no data (only TBM hdr): 0
[19:09:27.256] <TB1> INFO: TBM errors: 0
[19:09:27.256] <TB1> INFO: flawed TBM headers: 0
[19:09:27.256] <TB1> INFO: flawed TBM trailers: 0
[19:09:27.256] <TB1> INFO: event ID mismatches: 0
[19:09:27.256] <TB1> INFO: ROC errors: 0
[19:09:27.256] <TB1> INFO: missing ROC header(s): 0
[19:09:27.256] <TB1> INFO: misplaced readback start: 0
[19:09:27.256] <TB1> INFO: Pixel decoding errors: 0
[19:09:27.256] <TB1> INFO: pixel data incomplete: 0
[19:09:27.256] <TB1> INFO: pixel address: 0
[19:09:27.256] <TB1> INFO: pulse height fill bit: 0
[19:09:27.256] <TB1> INFO: buffer corruption: 0
[19:09:27.563] <TB1> INFO: ######################################################################
[19:09:27.563] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:09:27.563] <TB1> INFO: ######################################################################
[19:09:27.582] <TB1> INFO: scanning low vcal = 10
[19:09:27.952] <TB1> INFO: Expecting 41600 events.
[19:09:31.513] <TB1> INFO: 41600 events read in total (2969ms).
[19:09:31.513] <TB1> INFO: Test took 3931ms.
[19:09:31.515] <TB1> INFO: scanning low vcal = 20
[19:09:31.813] <TB1> INFO: Expecting 41600 events.
[19:09:35.381] <TB1> INFO: 41600 events read in total (2976ms).
[19:09:35.381] <TB1> INFO: Test took 3866ms.
[19:09:35.383] <TB1> INFO: scanning low vcal = 30
[19:09:35.681] <TB1> INFO: Expecting 41600 events.
[19:09:39.307] <TB1> INFO: 41600 events read in total (3036ms).
[19:09:39.308] <TB1> INFO: Test took 3924ms.
[19:09:39.313] <TB1> INFO: scanning low vcal = 40
[19:09:39.590] <TB1> INFO: Expecting 41600 events.
[19:09:43.530] <TB1> INFO: 41600 events read in total (3349ms).
[19:09:43.532] <TB1> INFO: Test took 4219ms.
[19:09:43.535] <TB1> INFO: scanning low vcal = 50
[19:09:43.812] <TB1> INFO: Expecting 41600 events.
[19:09:47.827] <TB1> INFO: 41600 events read in total (3423ms).
[19:09:47.828] <TB1> INFO: Test took 4293ms.
[19:09:47.831] <TB1> INFO: scanning low vcal = 60
[19:09:48.108] <TB1> INFO: Expecting 41600 events.
[19:09:52.089] <TB1> INFO: 41600 events read in total (3390ms).
[19:09:52.089] <TB1> INFO: Test took 4259ms.
[19:09:52.093] <TB1> INFO: scanning low vcal = 70
[19:09:52.369] <TB1> INFO: Expecting 41600 events.
[19:09:56.364] <TB1> INFO: 41600 events read in total (3403ms).
[19:09:56.364] <TB1> INFO: Test took 4271ms.
[19:09:56.369] <TB1> INFO: scanning low vcal = 80
[19:09:56.644] <TB1> INFO: Expecting 41600 events.
[19:10:00.620] <TB1> INFO: 41600 events read in total (3384ms).
[19:10:00.621] <TB1> INFO: Test took 4252ms.
[19:10:00.626] <TB1> INFO: scanning low vcal = 90
[19:10:00.901] <TB1> INFO: Expecting 41600 events.
[19:10:04.890] <TB1> INFO: 41600 events read in total (3397ms).
[19:10:04.891] <TB1> INFO: Test took 4265ms.
[19:10:04.896] <TB1> INFO: scanning low vcal = 100
[19:10:05.172] <TB1> INFO: Expecting 41600 events.
[19:10:09.155] <TB1> INFO: 41600 events read in total (3392ms).
[19:10:09.156] <TB1> INFO: Test took 4260ms.
[19:10:09.159] <TB1> INFO: scanning low vcal = 110
[19:10:09.436] <TB1> INFO: Expecting 41600 events.
[19:10:13.473] <TB1> INFO: 41600 events read in total (3446ms).
[19:10:13.473] <TB1> INFO: Test took 4314ms.
[19:10:13.477] <TB1> INFO: scanning low vcal = 120
[19:10:13.753] <TB1> INFO: Expecting 41600 events.
[19:10:17.701] <TB1> INFO: 41600 events read in total (3356ms).
[19:10:17.702] <TB1> INFO: Test took 4225ms.
[19:10:17.705] <TB1> INFO: scanning low vcal = 130
[19:10:17.982] <TB1> INFO: Expecting 41600 events.
[19:10:21.942] <TB1> INFO: 41600 events read in total (3369ms).
[19:10:21.943] <TB1> INFO: Test took 4238ms.
[19:10:21.946] <TB1> INFO: scanning low vcal = 140
[19:10:22.222] <TB1> INFO: Expecting 41600 events.
[19:10:26.181] <TB1> INFO: 41600 events read in total (3367ms).
[19:10:26.181] <TB1> INFO: Test took 4235ms.
[19:10:26.185] <TB1> INFO: scanning low vcal = 150
[19:10:26.461] <TB1> INFO: Expecting 41600 events.
[19:10:30.481] <TB1> INFO: 41600 events read in total (3428ms).
[19:10:30.482] <TB1> INFO: Test took 4297ms.
[19:10:30.485] <TB1> INFO: scanning low vcal = 160
[19:10:30.768] <TB1> INFO: Expecting 41600 events.
[19:10:34.705] <TB1> INFO: 41600 events read in total (3346ms).
[19:10:34.706] <TB1> INFO: Test took 4221ms.
[19:10:34.709] <TB1> INFO: scanning low vcal = 170
[19:10:34.985] <TB1> INFO: Expecting 41600 events.
[19:10:38.944] <TB1> INFO: 41600 events read in total (3367ms).
[19:10:38.945] <TB1> INFO: Test took 4236ms.
[19:10:38.951] <TB1> INFO: scanning low vcal = 180
[19:10:39.229] <TB1> INFO: Expecting 41600 events.
[19:10:43.247] <TB1> INFO: 41600 events read in total (3427ms).
[19:10:43.248] <TB1> INFO: Test took 4297ms.
[19:10:43.253] <TB1> INFO: scanning low vcal = 190
[19:10:43.528] <TB1> INFO: Expecting 41600 events.
[19:10:47.524] <TB1> INFO: 41600 events read in total (3405ms).
[19:10:47.525] <TB1> INFO: Test took 4272ms.
[19:10:47.528] <TB1> INFO: scanning low vcal = 200
[19:10:47.804] <TB1> INFO: Expecting 41600 events.
[19:10:51.834] <TB1> INFO: 41600 events read in total (3438ms).
[19:10:51.834] <TB1> INFO: Test took 4306ms.
[19:10:51.838] <TB1> INFO: scanning low vcal = 210
[19:10:52.114] <TB1> INFO: Expecting 41600 events.
[19:10:56.115] <TB1> INFO: 41600 events read in total (3409ms).
[19:10:56.116] <TB1> INFO: Test took 4278ms.
[19:10:56.120] <TB1> INFO: scanning low vcal = 220
[19:10:56.404] <TB1> INFO: Expecting 41600 events.
[19:11:00.427] <TB1> INFO: 41600 events read in total (3428ms).
[19:11:00.428] <TB1> INFO: Test took 4308ms.
[19:11:00.432] <TB1> INFO: scanning low vcal = 230
[19:11:00.709] <TB1> INFO: Expecting 41600 events.
[19:11:04.764] <TB1> INFO: 41600 events read in total (3462ms).
[19:11:04.765] <TB1> INFO: Test took 4332ms.
[19:11:04.770] <TB1> INFO: scanning low vcal = 240
[19:11:05.045] <TB1> INFO: Expecting 41600 events.
[19:11:09.116] <TB1> INFO: 41600 events read in total (3479ms).
[19:11:09.121] <TB1> INFO: Test took 4350ms.
[19:11:09.125] <TB1> INFO: scanning low vcal = 250
[19:11:09.454] <TB1> INFO: Expecting 41600 events.
[19:11:13.457] <TB1> INFO: 41600 events read in total (3411ms).
[19:11:13.458] <TB1> INFO: Test took 4332ms.
[19:11:13.463] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[19:11:13.738] <TB1> INFO: Expecting 41600 events.
[19:11:17.855] <TB1> INFO: 41600 events read in total (3525ms).
[19:11:17.857] <TB1> INFO: Test took 4395ms.
[19:11:17.862] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[19:11:18.198] <TB1> INFO: Expecting 41600 events.
[19:11:22.254] <TB1> INFO: 41600 events read in total (3465ms).
[19:11:22.255] <TB1> INFO: Test took 4393ms.
[19:11:22.262] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[19:11:22.540] <TB1> INFO: Expecting 41600 events.
[19:11:26.625] <TB1> INFO: 41600 events read in total (3489ms).
[19:11:26.628] <TB1> INFO: Test took 4366ms.
[19:11:26.633] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[19:11:27.007] <TB1> INFO: Expecting 41600 events.
[19:11:31.081] <TB1> INFO: 41600 events read in total (3481ms).
[19:11:31.084] <TB1> INFO: Test took 4451ms.
[19:11:31.088] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:11:31.415] <TB1> INFO: Expecting 41600 events.
[19:11:35.379] <TB1> INFO: 41600 events read in total (3371ms).
[19:11:35.380] <TB1> INFO: Test took 4292ms.
[19:11:35.814] <TB1> INFO: PixTestGainPedestal::measure() done
[19:12:15.056] <TB1> INFO: PixTestGainPedestal::fit() done
[19:12:15.056] <TB1> INFO: non-linearity mean: 0.949 0.966 0.923 0.915 0.906 0.940 0.940 0.895 0.985 0.970 0.961 0.981 0.920 0.924 0.928 0.928
[19:12:15.056] <TB1> INFO: non-linearity RMS: 0.070 0.027 0.079 0.114 0.107 0.073 0.170 0.128 0.003 0.011 0.031 0.003 0.158 0.079 0.100 0.093
[19:12:15.056] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[19:12:15.076] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[19:12:15.096] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[19:12:15.117] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[19:12:15.137] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[19:12:15.156] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[19:12:15.176] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[19:12:15.196] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[19:12:15.215] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[19:12:15.232] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[19:12:15.249] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[19:12:15.268] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[19:12:15.286] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[19:12:15.303] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[19:12:15.319] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[19:12:15.333] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[19:12:15.347] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[19:12:15.347] <TB1> INFO: Decoding statistics:
[19:12:15.347] <TB1> INFO: General information:
[19:12:15.347] <TB1> INFO: 16bit words read: 3271822
[19:12:15.347] <TB1> INFO: valid events total: 332800
[19:12:15.347] <TB1> INFO: empty events: 1688
[19:12:15.347] <TB1> INFO: valid events with pixels: 331112
[19:12:15.347] <TB1> INFO: valid pixel hits: 637511
[19:12:15.347] <TB1> INFO: Event errors: 0
[19:12:15.347] <TB1> INFO: start marker: 0
[19:12:15.347] <TB1> INFO: stop marker: 0
[19:12:15.347] <TB1> INFO: overflow: 0
[19:12:15.347] <TB1> INFO: invalid 5bit words: 0
[19:12:15.347] <TB1> INFO: invalid XOR eye diagram: 0
[19:12:15.347] <TB1> INFO: frame (failed synchr.): 0
[19:12:15.347] <TB1> INFO: idle data (no TBM trl): 0
[19:12:15.347] <TB1> INFO: no data (only TBM hdr): 0
[19:12:15.347] <TB1> INFO: TBM errors: 0
[19:12:15.347] <TB1> INFO: flawed TBM headers: 0
[19:12:15.347] <TB1> INFO: flawed TBM trailers: 0
[19:12:15.347] <TB1> INFO: event ID mismatches: 0
[19:12:15.347] <TB1> INFO: ROC errors: 0
[19:12:15.347] <TB1> INFO: missing ROC header(s): 0
[19:12:15.347] <TB1> INFO: misplaced readback start: 0
[19:12:15.347] <TB1> INFO: Pixel decoding errors: 0
[19:12:15.347] <TB1> INFO: pixel data incomplete: 0
[19:12:15.347] <TB1> INFO: pixel address: 0
[19:12:15.347] <TB1> INFO: pulse height fill bit: 0
[19:12:15.347] <TB1> INFO: buffer corruption: 0
[19:12:15.364] <TB1> INFO: Decoding statistics:
[19:12:15.364] <TB1> INFO: General information:
[19:12:15.364] <TB1> INFO: 16bit words read: 3401246
[19:12:15.364] <TB1> INFO: valid events total: 353536
[19:12:15.364] <TB1> INFO: empty events: 19920
[19:12:15.364] <TB1> INFO: valid events with pixels: 333616
[19:12:15.364] <TB1> INFO: valid pixel hits: 640015
[19:12:15.364] <TB1> INFO: Event errors: 0
[19:12:15.364] <TB1> INFO: start marker: 0
[19:12:15.364] <TB1> INFO: stop marker: 0
[19:12:15.364] <TB1> INFO: overflow: 0
[19:12:15.364] <TB1> INFO: invalid 5bit words: 0
[19:12:15.364] <TB1> INFO: invalid XOR eye diagram: 0
[19:12:15.364] <TB1> INFO: frame (failed synchr.): 0
[19:12:15.364] <TB1> INFO: idle data (no TBM trl): 0
[19:12:15.364] <TB1> INFO: no data (only TBM hdr): 0
[19:12:15.364] <TB1> INFO: TBM errors: 0
[19:12:15.364] <TB1> INFO: flawed TBM headers: 0
[19:12:15.364] <TB1> INFO: flawed TBM trailers: 0
[19:12:15.364] <TB1> INFO: event ID mismatches: 0
[19:12:15.364] <TB1> INFO: ROC errors: 0
[19:12:15.364] <TB1> INFO: missing ROC header(s): 0
[19:12:15.365] <TB1> INFO: misplaced readback start: 0
[19:12:15.365] <TB1> INFO: Pixel decoding errors: 0
[19:12:15.365] <TB1> INFO: pixel data incomplete: 0
[19:12:15.365] <TB1> INFO: pixel address: 0
[19:12:15.365] <TB1> INFO: pulse height fill bit: 0
[19:12:15.365] <TB1> INFO: buffer corruption: 0
[19:12:15.365] <TB1> INFO: enter test to run
[19:12:15.365] <TB1> INFO: test: trim80 no parameter change
[19:12:15.365] <TB1> INFO: running: trim80
[19:12:15.366] <TB1> INFO: ######################################################################
[19:12:15.366] <TB1> INFO: PixTestTrim80::doTest()
[19:12:15.366] <TB1> INFO: ######################################################################
[19:12:15.367] <TB1> INFO: ----------------------------------------------------------------------
[19:12:15.367] <TB1> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[19:12:15.367] <TB1> INFO: ----------------------------------------------------------------------
[19:12:15.409] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:12:15.409] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:12:15.424] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:12:15.425] <TB1> INFO: run 1 of 1
[19:12:15.718] <TB1> INFO: Expecting 5025280 events.
[19:12:44.368] <TB1> INFO: 675856 events read in total (28058ms).
[19:13:13.092] <TB1> INFO: 1348984 events read in total (56782ms).
[19:13:41.024] <TB1> INFO: 2020824 events read in total (84715ms).
[19:14:09.193] <TB1> INFO: 2690616 events read in total (112883ms).
[19:14:37.431] <TB1> INFO: 3357840 events read in total (141121ms).
[19:15:05.736] <TB1> INFO: 4025904 events read in total (169426ms).
[19:15:34.552] <TB1> INFO: 4692848 events read in total (198242ms).
[19:15:48.331] <TB1> INFO: 5025280 events read in total (212021ms).
[19:15:48.414] <TB1> INFO: Test took 212989ms.
[19:16:15.147] <TB1> INFO: ROC 0 VthrComp = 80
[19:16:15.148] <TB1> INFO: ROC 1 VthrComp = 74
[19:16:15.148] <TB1> INFO: ROC 2 VthrComp = 73
[19:16:15.148] <TB1> INFO: ROC 3 VthrComp = 79
[19:16:15.148] <TB1> INFO: ROC 4 VthrComp = 76
[19:16:15.148] <TB1> INFO: ROC 5 VthrComp = 72
[19:16:15.148] <TB1> INFO: ROC 6 VthrComp = 80
[19:16:15.149] <TB1> INFO: ROC 7 VthrComp = 76
[19:16:15.149] <TB1> INFO: ROC 8 VthrComp = 89
[19:16:15.149] <TB1> INFO: ROC 9 VthrComp = 71
[19:16:15.150] <TB1> INFO: ROC 10 VthrComp = 81
[19:16:15.150] <TB1> INFO: ROC 11 VthrComp = 80
[19:16:15.150] <TB1> INFO: ROC 12 VthrComp = 77
[19:16:15.151] <TB1> INFO: ROC 13 VthrComp = 75
[19:16:15.151] <TB1> INFO: ROC 14 VthrComp = 81
[19:16:15.151] <TB1> INFO: ROC 15 VthrComp = 76
[19:16:15.398] <TB1> INFO: Expecting 41600 events.
[19:16:18.958] <TB1> INFO: 41600 events read in total (2969ms).
[19:16:18.959] <TB1> INFO: Test took 3806ms.
[19:16:18.974] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:16:18.974] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:16:18.991] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:16:18.992] <TB1> INFO: run 1 of 1
[19:16:19.275] <TB1> INFO: Expecting 5025280 events.
[19:16:48.395] <TB1> INFO: 688336 events read in total (28527ms).
[19:17:17.972] <TB1> INFO: 1371936 events read in total (58104ms).
[19:17:46.043] <TB1> INFO: 2052328 events read in total (86175ms).
[19:18:14.457] <TB1> INFO: 2730480 events read in total (114589ms).
[19:18:42.308] <TB1> INFO: 3404864 events read in total (142440ms).
[19:19:11.204] <TB1> INFO: 4077112 events read in total (171336ms).
[19:19:40.191] <TB1> INFO: 4747504 events read in total (200323ms).
[19:19:51.764] <TB1> INFO: 5025280 events read in total (211896ms).
[19:19:51.844] <TB1> INFO: Test took 212852ms.
[19:20:17.834] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 107.647 for pixel 0/13 mean/min/max = 91.7464/75.7153/107.778
[19:20:17.835] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 106.746 for pixel 16/79 mean/min/max = 92.1259/77.4915/106.76
[19:20:17.835] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 105.938 for pixel 7/75 mean/min/max = 91.1552/76.1657/106.145
[19:20:17.836] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 107.755 for pixel 8/72 mean/min/max = 92.5147/77.1776/107.852
[19:20:17.836] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 109.521 for pixel 13/5 mean/min/max = 93.6551/77.7127/109.598
[19:20:17.836] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 106.438 for pixel 36/79 mean/min/max = 91.9756/77.4574/106.494
[19:20:17.837] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 106.435 for pixel 46/56 mean/min/max = 91.1088/75.6533/106.564
[19:20:17.837] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 110.249 for pixel 0/59 mean/min/max = 93.7467/77.09/110.403
[19:20:17.838] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 108.369 for pixel 22/79 mean/min/max = 92.1047/75.8173/108.392
[19:20:17.838] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 104.852 for pixel 0/0 mean/min/max = 89.4456/73.8193/105.072
[19:20:17.839] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 108.156 for pixel 51/78 mean/min/max = 91.6288/75.0816/108.176
[19:20:17.839] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 106.976 for pixel 11/77 mean/min/max = 91.3769/75.1475/107.606
[19:20:17.840] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 107.941 for pixel 25/77 mean/min/max = 93.508/78.8845/108.132
[19:20:17.840] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 105.815 for pixel 8/58 mean/min/max = 91.497/77.1782/105.816
[19:20:17.841] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 105.109 for pixel 0/65 mean/min/max = 90.3927/75.6078/105.178
[19:20:17.841] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 109.428 for pixel 0/8 mean/min/max = 93.3244/77.1763/109.472
[19:20:17.842] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:20:17.931] <TB1> INFO: Expecting 411648 events.
[19:20:27.418] <TB1> INFO: 411648 events read in total (8895ms).
[19:20:27.428] <TB1> INFO: Expecting 411648 events.
[19:20:36.780] <TB1> INFO: 411648 events read in total (8949ms).
[19:20:36.794] <TB1> INFO: Expecting 411648 events.
[19:20:46.014] <TB1> INFO: 411648 events read in total (8817ms).
[19:20:46.035] <TB1> INFO: Expecting 411648 events.
[19:20:55.404] <TB1> INFO: 411648 events read in total (8965ms).
[19:20:55.423] <TB1> INFO: Expecting 411648 events.
[19:21:04.792] <TB1> INFO: 411648 events read in total (8965ms).
[19:21:04.814] <TB1> INFO: Expecting 411648 events.
[19:21:14.252] <TB1> INFO: 411648 events read in total (9035ms).
[19:21:14.276] <TB1> INFO: Expecting 411648 events.
[19:21:23.493] <TB1> INFO: 411648 events read in total (8814ms).
[19:21:23.520] <TB1> INFO: Expecting 411648 events.
[19:21:32.728] <TB1> INFO: 411648 events read in total (8805ms).
[19:21:32.758] <TB1> INFO: Expecting 411648 events.
[19:21:42.030] <TB1> INFO: 411648 events read in total (8868ms).
[19:21:42.101] <TB1> INFO: Expecting 411648 events.
[19:21:51.351] <TB1> INFO: 411648 events read in total (8847ms).
[19:21:51.410] <TB1> INFO: Expecting 411648 events.
[19:22:00.707] <TB1> INFO: 411648 events read in total (8894ms).
[19:22:00.774] <TB1> INFO: Expecting 411648 events.
[19:22:10.012] <TB1> INFO: 411648 events read in total (8833ms).
[19:22:10.078] <TB1> INFO: Expecting 411648 events.
[19:22:19.257] <TB1> INFO: 411648 events read in total (8775ms).
[19:22:19.328] <TB1> INFO: Expecting 411648 events.
[19:22:28.606] <TB1> INFO: 411648 events read in total (8875ms).
[19:22:28.670] <TB1> INFO: Expecting 411648 events.
[19:22:37.957] <TB1> INFO: 411648 events read in total (8884ms).
[19:22:38.057] <TB1> INFO: Expecting 411648 events.
[19:22:47.305] <TB1> INFO: 411648 events read in total (8845ms).
[19:22:47.372] <TB1> INFO: Test took 149530ms.
[19:22:49.072] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:22:49.086] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:22:49.086] <TB1> INFO: run 1 of 1
[19:22:49.324] <TB1> INFO: Expecting 5025280 events.
[19:23:17.648] <TB1> INFO: 671216 events read in total (27729ms).
[19:23:45.063] <TB1> INFO: 1340000 events read in total (55144ms).
[19:24:13.578] <TB1> INFO: 2007808 events read in total (83659ms).
[19:24:41.100] <TB1> INFO: 2673224 events read in total (111181ms).
[19:25:08.643] <TB1> INFO: 3335424 events read in total (138725ms).
[19:25:37.208] <TB1> INFO: 3996080 events read in total (167289ms).
[19:26:06.583] <TB1> INFO: 4654544 events read in total (196664ms).
[19:26:22.445] <TB1> INFO: 5025280 events read in total (212526ms).
[19:26:22.523] <TB1> INFO: Test took 213437ms.
[19:26:47.887] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 56.528249 .. 126.271320
[19:26:48.139] <TB1> INFO: Expecting 208000 events.
[19:26:58.086] <TB1> INFO: 208000 events read in total (9355ms).
[19:26:58.088] <TB1> INFO: Test took 10199ms.
[19:26:58.135] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 46 .. 136 (-1/-1) hits flags = 528 (plus default)
[19:26:58.149] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:26:58.149] <TB1> INFO: run 1 of 1
[19:26:58.427] <TB1> INFO: Expecting 3028480 events.
[19:27:26.969] <TB1> INFO: 631808 events read in total (27951ms).
[19:27:55.332] <TB1> INFO: 1263392 events read in total (56314ms).
[19:28:23.824] <TB1> INFO: 1892648 events read in total (84806ms).
[19:28:51.219] <TB1> INFO: 2519392 events read in total (112201ms).
[19:29:13.232] <TB1> INFO: 3028480 events read in total (134214ms).
[19:29:13.305] <TB1> INFO: Test took 135156ms.
[19:29:36.870] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 64.624311 .. 113.742246
[19:29:37.167] <TB1> INFO: Expecting 208000 events.
[19:29:47.733] <TB1> INFO: 208000 events read in total (9974ms).
[19:29:47.734] <TB1> INFO: Test took 10863ms.
[19:29:47.784] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 54 .. 123 (-1/-1) hits flags = 528 (plus default)
[19:29:47.800] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:29:47.800] <TB1> INFO: run 1 of 1
[19:29:48.088] <TB1> INFO: Expecting 2329600 events.
[19:30:17.613] <TB1> INFO: 628248 events read in total (28933ms).
[19:30:44.669] <TB1> INFO: 1256912 events read in total (55989ms).
[19:31:12.565] <TB1> INFO: 1885344 events read in total (83885ms).
[19:31:32.705] <TB1> INFO: 2329600 events read in total (104025ms).
[19:31:32.754] <TB1> INFO: Test took 104954ms.
[19:31:58.027] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 68.649758 .. 89.064467
[19:31:58.354] <TB1> INFO: Expecting 208000 events.
[19:32:08.676] <TB1> INFO: 208000 events read in total (9729ms).
[19:32:08.676] <TB1> INFO: Test took 10648ms.
[19:32:08.726] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 58 .. 99 (-1/-1) hits flags = 528 (plus default)
[19:32:08.741] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:32:08.741] <TB1> INFO: run 1 of 1
[19:32:09.062] <TB1> INFO: Expecting 1397760 events.
[19:32:38.720] <TB1> INFO: 681904 events read in total (29065ms).
[19:33:07.907] <TB1> INFO: 1362280 events read in total (58252ms).
[19:33:09.845] <TB1> INFO: 1397760 events read in total (60191ms).
[19:33:09.875] <TB1> INFO: Test took 61135ms.
[19:33:29.312] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 71.855737 .. 88.773340
[19:33:29.549] <TB1> INFO: Expecting 208000 events.
[19:33:39.813] <TB1> INFO: 208000 events read in total (9672ms).
[19:33:39.814] <TB1> INFO: Test took 10501ms.
[19:33:39.868] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 61 .. 98 (-1/-1) hits flags = 528 (plus default)
[19:33:39.883] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:33:39.883] <TB1> INFO: run 1 of 1
[19:33:40.165] <TB1> INFO: Expecting 1264640 events.
[19:34:09.765] <TB1> INFO: 675304 events read in total (29008ms).
[19:34:35.422] <TB1> INFO: 1264640 events read in total (54665ms).
[19:34:35.479] <TB1> INFO: Test took 55596ms.
[19:34:54.827] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[19:34:54.827] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[19:34:54.842] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:34:54.842] <TB1> INFO: run 1 of 1
[19:34:55.104] <TB1> INFO: Expecting 1364480 events.
[19:35:25.605] <TB1> INFO: 668664 events read in total (29910ms).
[19:35:54.430] <TB1> INFO: 1337080 events read in total (58735ms).
[19:35:56.139] <TB1> INFO: 1364480 events read in total (60444ms).
[19:35:56.174] <TB1> INFO: Test took 61332ms.
[19:36:13.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C0.dat
[19:36:13.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C1.dat
[19:36:13.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C2.dat
[19:36:13.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C3.dat
[19:36:13.773] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C4.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C5.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C6.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C7.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C8.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C9.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C10.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C11.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C12.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C13.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C14.dat
[19:36:13.774] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//dacParameters80_C15.dat
[19:36:13.775] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C0.dat
[19:36:13.781] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C1.dat
[19:36:13.788] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C2.dat
[19:36:13.792] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C3.dat
[19:36:13.798] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C4.dat
[19:36:13.804] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C5.dat
[19:36:13.811] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C6.dat
[19:36:13.818] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C7.dat
[19:36:13.822] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C8.dat
[19:36:13.829] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C9.dat
[19:36:13.836] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C10.dat
[19:36:13.843] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C11.dat
[19:36:13.850] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C12.dat
[19:36:13.857] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C13.dat
[19:36:13.864] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C14.dat
[19:36:13.871] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1109_FullQualification_2016-11-02_15h17m_1478096238//003_FulltestTrim80_p17//trimParameters80_C15.dat
[19:36:13.877] <TB1> INFO: PixTestTrim80::trimTest() done
[19:36:13.877] <TB1> INFO: vtrim: 93 95 98 97 100 96 98 106 110 83 95 101 106 97 96 105
[19:36:13.877] <TB1> INFO: vthrcomp: 80 74 73 79 76 72 80 76 89 71 81 80 77 75 81 76
[19:36:13.877] <TB1> INFO: vcal mean: 79.99 80.01 80.03 79.98 79.99 80.03 79.99 79.99 79.96 79.98 80.03 79.98 80.00 80.00 79.99 80.01
[19:36:13.877] <TB1> INFO: vcal RMS: 1.45 0.70 0.77 0.77 0.74 0.74 0.76 0.70 0.76 0.71 1.46 0.76 0.74 0.71 0.70 0.72
[19:36:13.877] <TB1> INFO: bits mean: 9.32 9.32 9.77 9.60 9.22 9.58 10.10 9.32 9.66 10.47 9.53 9.88 9.21 9.98 9.73 9.13
[19:36:13.877] <TB1> INFO: bits RMS: 2.64 2.35 2.37 2.28 2.34 2.28 2.35 2.32 2.43 2.45 2.64 2.46 2.25 2.15 2.51 2.43
[19:36:13.887] <TB1> INFO: ----------------------------------------------------------------------
[19:36:13.888] <TB1> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:36:13.889] <TB1> INFO: ----------------------------------------------------------------------
[19:36:13.893] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:36:13.909] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:36:13.909] <TB1> INFO: run 1 of 1
[19:36:14.162] <TB1> INFO: Expecting 4160000 events.
[19:36:48.895] <TB1> INFO: 769165 events read in total (34142ms).
[19:37:21.883] <TB1> INFO: 1534715 events read in total (67130ms).
[19:37:55.583] <TB1> INFO: 2295155 events read in total (100830ms).
[19:38:28.515] <TB1> INFO: 3052035 events read in total (133762ms).
[19:39:01.374] <TB1> INFO: 3805605 events read in total (166621ms).
[19:39:17.323] <TB1> INFO: 4160000 events read in total (182570ms).
[19:39:17.424] <TB1> INFO: Test took 183514ms.
[19:39:45.518] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[19:39:45.534] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:39:45.534] <TB1> INFO: run 1 of 1
[19:39:45.792] <TB1> INFO: Expecting 4388800 events.
[19:40:19.471] <TB1> INFO: 728495 events read in total (33087ms).
[19:40:51.991] <TB1> INFO: 1454575 events read in total (65607ms).
[19:41:25.585] <TB1> INFO: 2178070 events read in total (99202ms).
[19:41:58.504] <TB1> INFO: 2897990 events read in total (132120ms).
[19:42:31.070] <TB1> INFO: 3616075 events read in total (164686ms).
[19:43:03.695] <TB1> INFO: 4332715 events read in total (197311ms).
[19:43:06.454] <TB1> INFO: 4388800 events read in total (200070ms).
[19:43:06.540] <TB1> INFO: Test took 201006ms.
[19:43:35.954] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[19:43:35.973] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:43:35.973] <TB1> INFO: run 1 of 1
[19:43:36.215] <TB1> INFO: Expecting 4264000 events.
[19:44:10.414] <TB1> INFO: 737815 events read in total (33607ms).
[19:44:43.428] <TB1> INFO: 1471610 events read in total (66621ms).
[19:45:16.185] <TB1> INFO: 2202685 events read in total (99379ms).
[19:45:48.534] <TB1> INFO: 2929720 events read in total (131727ms).
[19:46:20.192] <TB1> INFO: 3654775 events read in total (163385ms).
[19:46:47.468] <TB1> INFO: 4264000 events read in total (190661ms).
[19:46:47.557] <TB1> INFO: Test took 191584ms.
[19:47:17.249] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[19:47:17.267] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:47:17.267] <TB1> INFO: run 1 of 1
[19:47:17.590] <TB1> INFO: Expecting 4284800 events.
[19:47:51.011] <TB1> INFO: 736205 events read in total (32829ms).
[19:48:24.453] <TB1> INFO: 1468445 events read in total (66271ms).
[19:48:56.905] <TB1> INFO: 2198825 events read in total (98723ms).
[19:49:28.927] <TB1> INFO: 2924835 events read in total (130745ms).
[19:50:00.658] <TB1> INFO: 3648340 events read in total (162476ms).
[19:50:29.172] <TB1> INFO: 4284800 events read in total (190990ms).
[19:50:29.258] <TB1> INFO: Test took 191990ms.
[19:50:57.700] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[19:50:57.714] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:50:57.714] <TB1> INFO: run 1 of 1
[19:50:57.980] <TB1> INFO: Expecting 4264000 events.
[19:51:31.334] <TB1> INFO: 737770 events read in total (32761ms).
[19:52:04.675] <TB1> INFO: 1472210 events read in total (66102ms).
[19:52:39.009] <TB1> INFO: 2203905 events read in total (100436ms).
[19:53:13.006] <TB1> INFO: 2931525 events read in total (134433ms).
[19:53:46.571] <TB1> INFO: 3657160 events read in total (167998ms).
[19:54:14.524] <TB1> INFO: 4264000 events read in total (195951ms).
[19:54:14.632] <TB1> INFO: Test took 196918ms.
[19:54:38.151] <TB1> INFO: PixTestTrim80::trimBitTest() done
[19:54:38.152] <TB1> INFO: PixTestTrim80::doTest() done, duration: 2542 seconds
[19:54:38.895] <TB1> INFO: enter test to run
[19:54:38.895] <TB1> INFO: test: exit no parameter change
[19:54:39.098] <TB1> QUIET: Connection to board 154 closed.
[19:54:39.100] <TB1> INFO: pXar: this is the end, my friend