[10:40:42.565] <TB3> INFO: *** Welcome to pxar ***
[10:40:42.566] <TB3> INFO: *** Today: 2016/11/02
[10:40:42.571] <TB3> INFO: *** Version: c8ba-dirty
[10:40:42.571] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C15.dat
[10:40:42.571] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1b.dat
[10:40:42.571] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//defaultMaskFile.dat
[10:40:42.572] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters_C15.dat
[10:40:42.638] <TB3> INFO: clk: 4
[10:40:42.638] <TB3> INFO: ctr: 4
[10:40:42.638] <TB3> INFO: sda: 19
[10:40:42.638] <TB3> INFO: tin: 9
[10:40:42.638] <TB3> INFO: level: 15
[10:40:42.638] <TB3> INFO: triggerdelay: 0
[10:40:42.638] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[10:40:42.638] <TB3> INFO: Log level: INFO
[10:40:42.647] <TB3> INFO: Found DTB DTB_WZ4I6J
[10:40:42.655] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[10:40:42.657] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[10:40:42.659] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[10:40:44.143] <TB3> INFO: DUT info:
[10:40:44.143] <TB3> INFO: The DUT currently contains the following objects:
[10:40:44.143] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[10:40:44.143] <TB3> INFO: TBM Core alpha (0): 7 registers set
[10:40:44.143] <TB3> INFO: TBM Core beta (1): 7 registers set
[10:40:44.143] <TB3> INFO: TBM Core alpha (2): 7 registers set
[10:40:44.143] <TB3> INFO: TBM Core beta (3): 7 registers set
[10:40:44.143] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:40:44.143] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.143] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:44.544] <TB3> INFO: enter 'restricted' command line mode
[10:40:44.544] <TB3> INFO: enter test to run
[10:40:44.544] <TB3> INFO: test: pretest no parameter change
[10:40:44.544] <TB3> INFO: running: pretest
[10:40:45.129] <TB3> INFO: ######################################################################
[10:40:45.129] <TB3> INFO: PixTestPretest::doTest()
[10:40:45.129] <TB3> INFO: ######################################################################
[10:40:45.130] <TB3> INFO: ----------------------------------------------------------------------
[10:40:45.130] <TB3> INFO: PixTestPretest::programROC()
[10:40:45.130] <TB3> INFO: ----------------------------------------------------------------------
[10:41:03.144] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:41:03.144] <TB3> INFO: IA differences per ROC: 17.7 21.7 20.9 19.3 20.9 16.9 19.3 22.5 16.9 19.3 20.1 20.9 19.3 16.1 18.5 22.5
[10:41:03.179] <TB3> INFO: ----------------------------------------------------------------------
[10:41:03.179] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:41:03.179] <TB3> INFO: ----------------------------------------------------------------------
[10:41:11.964] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[10:41:11.964] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 18.5 19.3 19.3 19.3 19.3 18.5 19.3 18.5 18.5 18.5 18.5 18.5
[10:41:11.992] <TB3> INFO: ----------------------------------------------------------------------
[10:41:11.992] <TB3> INFO: PixTestPretest::findTiming()
[10:41:11.992] <TB3> INFO: ----------------------------------------------------------------------
[10:41:11.992] <TB3> INFO: PixTestCmd::init()

[10:41:43.226] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:41:43.226] <TB3> INFO: (success/tries = 100/100), width = 3
[10:41:44.728] <TB3> INFO: ----------------------------------------------------------------------
[10:41:44.728] <TB3> INFO: PixTestPretest::findWorkingPixel()
[10:41:44.728] <TB3> INFO: ----------------------------------------------------------------------
[10:41:44.819] <TB3> INFO: Expecting 231680 events.
[10:41:54.417] <TB3> INFO: 231680 events read in total (9007ms).
[10:41:54.424] <TB3> INFO: Test took 9694ms.
[10:41:54.668] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:41:54.698] <TB3> INFO: ----------------------------------------------------------------------
[10:41:54.698] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[10:41:54.698] <TB3> INFO: ----------------------------------------------------------------------
[10:41:54.791] <TB3> INFO: Expecting 231680 events.
[10:42:04.479] <TB3> INFO: 231680 events read in total (9096ms).
[10:42:04.487] <TB3> INFO: Test took 9784ms.
[10:42:04.745] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[10:42:04.745] <TB3> INFO: CalDel: 95 82 102 95 95 86 100 77 116 87 96 111 119 127 111 109
[10:42:04.745] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C0.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C1.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C2.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C3.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C4.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C5.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C6.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C7.dat
[10:42:04.749] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C8.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C9.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C10.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C11.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C12.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C13.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C14.dat
[10:42:04.750] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C15.dat
[10:42:04.750] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0a.dat
[10:42:04.750] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0b.dat
[10:42:04.750] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1a.dat
[10:42:04.750] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1b.dat
[10:42:04.750] <TB3> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[10:42:04.848] <TB3> INFO: enter test to run
[10:42:04.848] <TB3> INFO: test: FullTest no parameter change
[10:42:04.848] <TB3> INFO: running: fulltest
[10:42:04.848] <TB3> INFO: ######################################################################
[10:42:04.848] <TB3> INFO: PixTestFullTest::doTest()
[10:42:04.848] <TB3> INFO: ######################################################################
[10:42:04.850] <TB3> INFO: ######################################################################
[10:42:04.850] <TB3> INFO: PixTestAlive::doTest()
[10:42:04.850] <TB3> INFO: ######################################################################
[10:42:04.851] <TB3> INFO: ----------------------------------------------------------------------
[10:42:04.851] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:42:04.851] <TB3> INFO: ----------------------------------------------------------------------
[10:42:05.087] <TB3> INFO: Expecting 41600 events.
[10:42:08.588] <TB3> INFO: 41600 events read in total (2909ms).
[10:42:08.588] <TB3> INFO: Test took 3735ms.
[10:42:08.817] <TB3> INFO: PixTestAlive::aliveTest() done
[10:42:08.817] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:42:08.818] <TB3> INFO: ----------------------------------------------------------------------
[10:42:08.818] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:42:08.818] <TB3> INFO: ----------------------------------------------------------------------
[10:42:09.095] <TB3> INFO: Expecting 41600 events.
[10:42:12.031] <TB3> INFO: 41600 events read in total (2344ms).
[10:42:12.031] <TB3> INFO: Test took 3212ms.
[10:42:12.032] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:42:12.268] <TB3> INFO: PixTestAlive::maskTest() done
[10:42:12.268] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:42:12.269] <TB3> INFO: ----------------------------------------------------------------------
[10:42:12.269] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:42:12.269] <TB3> INFO: ----------------------------------------------------------------------
[10:42:12.502] <TB3> INFO: Expecting 41600 events.
[10:42:16.038] <TB3> INFO: 41600 events read in total (2944ms).
[10:42:16.039] <TB3> INFO: Test took 3769ms.
[10:42:16.267] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[10:42:16.267] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:42:16.267] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:42:16.267] <TB3> INFO: Decoding statistics:
[10:42:16.267] <TB3> INFO: General information:
[10:42:16.267] <TB3> INFO: 16bit words read: 0
[10:42:16.267] <TB3> INFO: valid events total: 0
[10:42:16.267] <TB3> INFO: empty events: 0
[10:42:16.267] <TB3> INFO: valid events with pixels: 0
[10:42:16.267] <TB3> INFO: valid pixel hits: 0
[10:42:16.267] <TB3> INFO: Event errors: 0
[10:42:16.267] <TB3> INFO: start marker: 0
[10:42:16.267] <TB3> INFO: stop marker: 0
[10:42:16.267] <TB3> INFO: overflow: 0
[10:42:16.267] <TB3> INFO: invalid 5bit words: 0
[10:42:16.267] <TB3> INFO: invalid XOR eye diagram: 0
[10:42:16.267] <TB3> INFO: frame (failed synchr.): 0
[10:42:16.267] <TB3> INFO: idle data (no TBM trl): 0
[10:42:16.267] <TB3> INFO: no data (only TBM hdr): 0
[10:42:16.267] <TB3> INFO: TBM errors: 0
[10:42:16.267] <TB3> INFO: flawed TBM headers: 0
[10:42:16.267] <TB3> INFO: flawed TBM trailers: 0
[10:42:16.267] <TB3> INFO: event ID mismatches: 0
[10:42:16.267] <TB3> INFO: ROC errors: 0
[10:42:16.267] <TB3> INFO: missing ROC header(s): 0
[10:42:16.267] <TB3> INFO: misplaced readback start: 0
[10:42:16.267] <TB3> INFO: Pixel decoding errors: 0
[10:42:16.267] <TB3> INFO: pixel data incomplete: 0
[10:42:16.267] <TB3> INFO: pixel address: 0
[10:42:16.267] <TB3> INFO: pulse height fill bit: 0
[10:42:16.267] <TB3> INFO: buffer corruption: 0
[10:42:16.276] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:42:16.277] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:42:16.277] <TB3> INFO: ######################################################################
[10:42:16.277] <TB3> INFO: PixTestReadback::doTest()
[10:42:16.277] <TB3> INFO: ######################################################################
[10:42:16.277] <TB3> INFO: ----------------------------------------------------------------------
[10:42:16.277] <TB3> INFO: PixTestReadback::CalibrateVd()
[10:42:16.277] <TB3> INFO: ----------------------------------------------------------------------
[10:42:26.230] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:42:26.230] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:42:26.231] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:42:26.260] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:42:26.260] <TB3> INFO: ----------------------------------------------------------------------
[10:42:26.260] <TB3> INFO: PixTestReadback::CalibrateVa()
[10:42:26.260] <TB3> INFO: ----------------------------------------------------------------------
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:42:36.153] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:42:36.154] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:42:36.182] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:42:36.182] <TB3> INFO: ----------------------------------------------------------------------
[10:42:36.182] <TB3> INFO: PixTestReadback::readbackVbg()
[10:42:36.182] <TB3> INFO: ----------------------------------------------------------------------
[10:42:43.823] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:42:43.823] <TB3> INFO: ----------------------------------------------------------------------
[10:42:43.824] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[10:42:43.824] <TB3> INFO: ----------------------------------------------------------------------
[10:42:43.824] <TB3> INFO: Vbg will be calibrated using Vd calibration
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.4calibrated Vbg = 1.15278 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 141calibrated Vbg = 1.1572 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 158.3calibrated Vbg = 1.15567 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.6calibrated Vbg = 1.153 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 146.9calibrated Vbg = 1.15217 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.1calibrated Vbg = 1.15408 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 150.2calibrated Vbg = 1.15824 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.9calibrated Vbg = 1.15723 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.8calibrated Vbg = 1.15689 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156calibrated Vbg = 1.15132 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159.4calibrated Vbg = 1.14257 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 149.1calibrated Vbg = 1.14301 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.8calibrated Vbg = 1.15505 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 160.9calibrated Vbg = 1.15076 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.9calibrated Vbg = 1.15801 :::*/*/*/*/
[10:42:43.824] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146calibrated Vbg = 1.15849 :::*/*/*/*/
[10:42:43.826] <TB3> INFO: ----------------------------------------------------------------------
[10:42:43.826] <TB3> INFO: PixTestReadback::CalibrateIa()
[10:42:43.826] <TB3> INFO: ----------------------------------------------------------------------
[10:45:24.113] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:45:24.113] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:45:24.114] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:45:24.115] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:45:24.115] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:45:24.141] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[10:45:24.142] <TB3> INFO: PixTestReadback::doTest() done
[10:45:24.142] <TB3> INFO: Decoding statistics:
[10:45:24.142] <TB3> INFO: General information:
[10:45:24.142] <TB3> INFO: 16bit words read: 1536
[10:45:24.142] <TB3> INFO: valid events total: 256
[10:45:24.142] <TB3> INFO: empty events: 256
[10:45:24.142] <TB3> INFO: valid events with pixels: 0
[10:45:24.142] <TB3> INFO: valid pixel hits: 0
[10:45:24.142] <TB3> INFO: Event errors: 0
[10:45:24.142] <TB3> INFO: start marker: 0
[10:45:24.142] <TB3> INFO: stop marker: 0
[10:45:24.142] <TB3> INFO: overflow: 0
[10:45:24.142] <TB3> INFO: invalid 5bit words: 0
[10:45:24.142] <TB3> INFO: invalid XOR eye diagram: 0
[10:45:24.142] <TB3> INFO: frame (failed synchr.): 0
[10:45:24.142] <TB3> INFO: idle data (no TBM trl): 0
[10:45:24.142] <TB3> INFO: no data (only TBM hdr): 0
[10:45:24.142] <TB3> INFO: TBM errors: 0
[10:45:24.142] <TB3> INFO: flawed TBM headers: 0
[10:45:24.142] <TB3> INFO: flawed TBM trailers: 0
[10:45:24.142] <TB3> INFO: event ID mismatches: 0
[10:45:24.142] <TB3> INFO: ROC errors: 0
[10:45:24.142] <TB3> INFO: missing ROC header(s): 0
[10:45:24.142] <TB3> INFO: misplaced readback start: 0
[10:45:24.142] <TB3> INFO: Pixel decoding errors: 0
[10:45:24.142] <TB3> INFO: pixel data incomplete: 0
[10:45:24.142] <TB3> INFO: pixel address: 0
[10:45:24.142] <TB3> INFO: pulse height fill bit: 0
[10:45:24.143] <TB3> INFO: buffer corruption: 0
[10:45:24.190] <TB3> INFO: ######################################################################
[10:45:24.190] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:45:24.190] <TB3> INFO: ######################################################################
[10:45:24.192] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:45:24.206] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[10:45:24.206] <TB3> INFO: run 1 of 1
[10:45:24.438] <TB3> INFO: Expecting 3120000 events.
[10:45:54.450] <TB3> INFO: 649295 events read in total (29420ms).
[10:46:23.611] <TB3> INFO: 1293720 events read in total (58581ms).











[10:46:52.474] <TB3> INFO: 1935055 events read in total (87444ms).











[10:47:21.626] <TB3> INFO: 2576320 events read in total (116596ms).











[10:47:47.070] <TB3> INFO: 3120000 events read in total (142040ms).
[10:47:47.128] <TB3> INFO: Test took 142923ms.
[10:48:13.694] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 169 seconds
[10:48:13.694] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 14 0 0 0 0 0 0 0
[10:48:13.694] <TB3> INFO: separation cut (per ROC): 106 106 106 100 95 97 89 105 82 103 96 91 86 82 95 95
[10:48:13.694] <TB3> INFO: Decoding statistics:
[10:48:13.694] <TB3> INFO: General information:
[10:48:13.694] <TB3> INFO: 16bit words read: 0
[10:48:13.694] <TB3> INFO: valid events total: 0
[10:48:13.694] <TB3> INFO: empty events: 0
[10:48:13.694] <TB3> INFO: valid events with pixels: 0
[10:48:13.694] <TB3> INFO: valid pixel hits: 0
[10:48:13.694] <TB3> INFO: Event errors: 0
[10:48:13.694] <TB3> INFO: start marker: 0
[10:48:13.694] <TB3> INFO: stop marker: 0
[10:48:13.694] <TB3> INFO: overflow: 0
[10:48:13.694] <TB3> INFO: invalid 5bit words: 0
[10:48:13.694] <TB3> INFO: invalid XOR eye diagram: 0
[10:48:13.694] <TB3> INFO: frame (failed synchr.): 0
[10:48:13.694] <TB3> INFO: idle data (no TBM trl): 0
[10:48:13.694] <TB3> INFO: no data (only TBM hdr): 0
[10:48:13.694] <TB3> INFO: TBM errors: 0
[10:48:13.694] <TB3> INFO: flawed TBM headers: 0
[10:48:13.694] <TB3> INFO: flawed TBM trailers: 0
[10:48:13.694] <TB3> INFO: event ID mismatches: 0
[10:48:13.694] <TB3> INFO: ROC errors: 0
[10:48:13.694] <TB3> INFO: missing ROC header(s): 0
[10:48:13.694] <TB3> INFO: misplaced readback start: 0
[10:48:13.694] <TB3> INFO: Pixel decoding errors: 0
[10:48:13.694] <TB3> INFO: pixel data incomplete: 0
[10:48:13.694] <TB3> INFO: pixel address: 0
[10:48:13.694] <TB3> INFO: pulse height fill bit: 0
[10:48:13.694] <TB3> INFO: buffer corruption: 0
[10:48:13.745] <TB3> INFO: ######################################################################
[10:48:13.745] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:48:13.745] <TB3> INFO: ######################################################################
[10:48:13.745] <TB3> INFO: ----------------------------------------------------------------------
[10:48:13.745] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:48:13.745] <TB3> INFO: ----------------------------------------------------------------------
[10:48:13.745] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:48:13.757] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[10:48:13.757] <TB3> INFO: run 1 of 1
[10:48:14.031] <TB3> INFO: Expecting 36608000 events.
[10:48:37.216] <TB3> INFO: 665650 events read in total (22593ms).
[10:48:59.623] <TB3> INFO: 1320000 events read in total (45000ms).
[10:49:22.140] <TB3> INFO: 1975500 events read in total (67517ms).
[10:49:44.724] <TB3> INFO: 2628100 events read in total (90101ms).
[10:50:06.890] <TB3> INFO: 3280250 events read in total (112267ms).
[10:50:29.207] <TB3> INFO: 3931450 events read in total (134584ms).
[10:50:51.404] <TB3> INFO: 4583000 events read in total (156781ms).
[10:51:13.804] <TB3> INFO: 5235350 events read in total (179181ms).
[10:51:36.104] <TB3> INFO: 5887100 events read in total (201481ms).
[10:51:58.428] <TB3> INFO: 6538500 events read in total (223805ms).
[10:52:20.581] <TB3> INFO: 7189800 events read in total (245958ms).
[10:52:42.819] <TB3> INFO: 7841050 events read in total (268196ms).
[10:53:05.280] <TB3> INFO: 8492700 events read in total (290657ms).
[10:53:27.546] <TB3> INFO: 9146650 events read in total (312923ms).
[10:53:49.765] <TB3> INFO: 9797200 events read in total (335142ms).
[10:54:12.183] <TB3> INFO: 10447950 events read in total (357560ms).
[10:54:34.421] <TB3> INFO: 11096250 events read in total (379798ms).
[10:54:56.602] <TB3> INFO: 11745750 events read in total (401979ms).
[10:55:18.629] <TB3> INFO: 12394650 events read in total (424006ms).
[10:55:40.904] <TB3> INFO: 13042250 events read in total (446281ms).
[10:56:03.099] <TB3> INFO: 13691150 events read in total (468476ms).
[10:56:25.212] <TB3> INFO: 14339750 events read in total (490589ms).
[10:56:47.389] <TB3> INFO: 14985950 events read in total (512766ms).
[10:57:09.236] <TB3> INFO: 15632750 events read in total (534614ms).
[10:57:31.713] <TB3> INFO: 16278150 events read in total (557090ms).
[10:57:53.929] <TB3> INFO: 16923050 events read in total (579306ms).
[10:58:16.005] <TB3> INFO: 17571700 events read in total (601382ms).
[10:58:38.307] <TB3> INFO: 18216550 events read in total (623684ms).
[10:59:00.700] <TB3> INFO: 18862700 events read in total (646077ms).
[10:59:22.919] <TB3> INFO: 19508200 events read in total (668296ms).
[10:59:45.374] <TB3> INFO: 20151850 events read in total (690751ms).
[11:00:07.594] <TB3> INFO: 20797150 events read in total (712971ms).
[11:00:29.647] <TB3> INFO: 21440250 events read in total (735024ms).
[11:00:51.925] <TB3> INFO: 22083100 events read in total (757302ms).
[11:01:13.839] <TB3> INFO: 22725600 events read in total (779216ms).
[11:01:35.890] <TB3> INFO: 23369050 events read in total (801267ms).
[11:01:57.837] <TB3> INFO: 24011200 events read in total (823214ms).
[11:02:19.747] <TB3> INFO: 24652900 events read in total (845124ms).
[11:02:41.589] <TB3> INFO: 25293000 events read in total (866966ms).
[11:03:03.440] <TB3> INFO: 25932900 events read in total (888817ms).
[11:03:25.357] <TB3> INFO: 26572950 events read in total (910734ms).
[11:03:47.476] <TB3> INFO: 27213800 events read in total (932853ms).
[11:04:09.272] <TB3> INFO: 27853050 events read in total (954649ms).
[11:04:31.052] <TB3> INFO: 28492850 events read in total (976429ms).
[11:04:52.959] <TB3> INFO: 29133850 events read in total (998336ms).
[11:05:15.177] <TB3> INFO: 29772950 events read in total (1020554ms).
[11:05:37.100] <TB3> INFO: 30412100 events read in total (1042477ms).
[11:05:58.775] <TB3> INFO: 31051550 events read in total (1064152ms).
[11:06:20.848] <TB3> INFO: 31691400 events read in total (1086225ms).
[11:06:42.858] <TB3> INFO: 32330000 events read in total (1108235ms).
[11:07:04.002] <TB3> INFO: 32969400 events read in total (1130379ms).
[11:07:27.079] <TB3> INFO: 33609100 events read in total (1152456ms).
[11:07:49.208] <TB3> INFO: 34249750 events read in total (1174585ms).
[11:08:11.172] <TB3> INFO: 34891200 events read in total (1196549ms).
[11:08:33.579] <TB3> INFO: 35532250 events read in total (1218956ms).
[11:08:55.975] <TB3> INFO: 36177400 events read in total (1241352ms).
[11:09:11.058] <TB3> INFO: 36608000 events read in total (1256435ms).
[11:09:11.130] <TB3> INFO: Test took 1257373ms.
[11:09:11.708] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:13.610] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:15.259] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:17.203] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:18.861] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:20.736] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:22.234] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:23.736] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:25.350] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:26.938] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:28.537] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:30.146] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:31.758] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:33.627] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:35.591] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:37.454] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:09:39.591] <TB3> INFO: PixTestScurves::scurves() done
[11:09:39.591] <TB3> INFO: Vcal mean: 112.88 108.96 111.03 103.77 100.23 107.74 101.75 121.62 101.49 112.51 101.53 103.05 103.13 107.27 112.79 108.95
[11:09:39.591] <TB3> INFO: Vcal RMS: 5.20 5.04 5.40 5.25 5.42 5.03 5.52 6.09 6.40 5.72 5.45 5.46 6.71 7.26 4.72 4.54
[11:09:39.591] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1285 seconds
[11:09:39.591] <TB3> INFO: Decoding statistics:
[11:09:39.591] <TB3> INFO: General information:
[11:09:39.591] <TB3> INFO: 16bit words read: 0
[11:09:39.591] <TB3> INFO: valid events total: 0
[11:09:39.591] <TB3> INFO: empty events: 0
[11:09:39.591] <TB3> INFO: valid events with pixels: 0
[11:09:39.591] <TB3> INFO: valid pixel hits: 0
[11:09:39.591] <TB3> INFO: Event errors: 0
[11:09:39.591] <TB3> INFO: start marker: 0
[11:09:39.591] <TB3> INFO: stop marker: 0
[11:09:39.591] <TB3> INFO: overflow: 0
[11:09:39.591] <TB3> INFO: invalid 5bit words: 0
[11:09:39.591] <TB3> INFO: invalid XOR eye diagram: 0
[11:09:39.591] <TB3> INFO: frame (failed synchr.): 0
[11:09:39.591] <TB3> INFO: idle data (no TBM trl): 0
[11:09:39.591] <TB3> INFO: no data (only TBM hdr): 0
[11:09:39.591] <TB3> INFO: TBM errors: 0
[11:09:39.591] <TB3> INFO: flawed TBM headers: 0
[11:09:39.591] <TB3> INFO: flawed TBM trailers: 0
[11:09:39.591] <TB3> INFO: event ID mismatches: 0
[11:09:39.591] <TB3> INFO: ROC errors: 0
[11:09:39.591] <TB3> INFO: missing ROC header(s): 0
[11:09:39.591] <TB3> INFO: misplaced readback start: 0
[11:09:39.591] <TB3> INFO: Pixel decoding errors: 0
[11:09:39.591] <TB3> INFO: pixel data incomplete: 0
[11:09:39.591] <TB3> INFO: pixel address: 0
[11:09:39.591] <TB3> INFO: pulse height fill bit: 0
[11:09:39.591] <TB3> INFO: buffer corruption: 0
[11:09:39.657] <TB3> INFO: ######################################################################
[11:09:39.657] <TB3> INFO: PixTestTrim::doTest()
[11:09:39.657] <TB3> INFO: ######################################################################
[11:09:39.658] <TB3> INFO: ----------------------------------------------------------------------
[11:09:39.658] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:09:39.658] <TB3> INFO: ----------------------------------------------------------------------
[11:09:39.699] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:09:39.699] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:09:39.709] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:09:39.709] <TB3> INFO: run 1 of 1
[11:09:39.977] <TB3> INFO: Expecting 5025280 events.
[11:10:09.997] <TB3> INFO: 813280 events read in total (29426ms).
[11:10:39.172] <TB3> INFO: 1623256 events read in total (58601ms).
[11:11:07.984] <TB3> INFO: 2429424 events read in total (87413ms).
[11:11:37.111] <TB3> INFO: 3234408 events read in total (116540ms).
[11:12:06.331] <TB3> INFO: 4035632 events read in total (145760ms).
[11:12:35.581] <TB3> INFO: 4834408 events read in total (175010ms).
[11:12:42.729] <TB3> INFO: 5025280 events read in total (182158ms).
[11:12:42.774] <TB3> INFO: Test took 183065ms.
[11:13:03.640] <TB3> INFO: ROC 0 VthrComp = 123
[11:13:03.640] <TB3> INFO: ROC 1 VthrComp = 121
[11:13:03.640] <TB3> INFO: ROC 2 VthrComp = 127
[11:13:03.640] <TB3> INFO: ROC 3 VthrComp = 114
[11:13:03.640] <TB3> INFO: ROC 4 VthrComp = 108
[11:13:03.640] <TB3> INFO: ROC 5 VthrComp = 114
[11:13:03.641] <TB3> INFO: ROC 6 VthrComp = 108
[11:13:03.641] <TB3> INFO: ROC 7 VthrComp = 133
[11:13:03.641] <TB3> INFO: ROC 8 VthrComp = 103
[11:13:03.641] <TB3> INFO: ROC 9 VthrComp = 120
[11:13:03.641] <TB3> INFO: ROC 10 VthrComp = 109
[11:13:03.641] <TB3> INFO: ROC 11 VthrComp = 109
[11:13:03.641] <TB3> INFO: ROC 12 VthrComp = 105
[11:13:03.642] <TB3> INFO: ROC 13 VthrComp = 100
[11:13:03.642] <TB3> INFO: ROC 14 VthrComp = 115
[11:13:03.642] <TB3> INFO: ROC 15 VthrComp = 117
[11:13:03.903] <TB3> INFO: Expecting 41600 events.
[11:13:07.360] <TB3> INFO: 41600 events read in total (2862ms).
[11:13:07.361] <TB3> INFO: Test took 3718ms.
[11:13:07.369] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:13:07.369] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:13:07.380] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:13:07.380] <TB3> INFO: run 1 of 1
[11:13:07.658] <TB3> INFO: Expecting 5025280 events.
[11:13:33.269] <TB3> INFO: 587392 events read in total (25019ms).
[11:13:58.899] <TB3> INFO: 1173856 events read in total (50649ms).
[11:14:24.216] <TB3> INFO: 1762256 events read in total (75966ms).
[11:14:49.837] <TB3> INFO: 2350320 events read in total (101587ms).
[11:15:15.445] <TB3> INFO: 2935912 events read in total (127195ms).
[11:15:40.568] <TB3> INFO: 3520016 events read in total (152318ms).
[11:16:05.669] <TB3> INFO: 4103432 events read in total (177419ms).
[11:16:30.818] <TB3> INFO: 4686304 events read in total (202568ms).
[11:16:45.838] <TB3> INFO: 5025280 events read in total (217588ms).
[11:16:45.899] <TB3> INFO: Test took 218519ms.
[11:17:09.199] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.9827 for pixel 5/79 mean/min/max = 44.7943/31.2156/58.3729
[11:17:09.199] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.942 for pixel 2/74 mean/min/max = 45.0549/32.0463/58.0635
[11:17:09.199] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.6028 for pixel 11/75 mean/min/max = 44.8237/31.0223/58.625
[11:17:09.200] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.6788 for pixel 18/4 mean/min/max = 45.0103/32.2298/57.7908
[11:17:09.200] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 59.7126 for pixel 7/67 mean/min/max = 46.7759/33.8299/59.722
[11:17:09.200] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.876 for pixel 9/19 mean/min/max = 45.0348/32.0056/58.0639
[11:17:09.200] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.7947 for pixel 3/79 mean/min/max = 46.9581/33.9821/59.934
[11:17:09.201] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 59.6861 for pixel 18/10 mean/min/max = 46.1277/32.4382/59.8171
[11:17:09.201] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 65.911 for pixel 4/0 mean/min/max = 49.0215/31.9432/66.0998
[11:17:09.201] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.6538 for pixel 0/46 mean/min/max = 46.8882/31.027/62.7494
[11:17:09.202] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.0216 for pixel 5/65 mean/min/max = 46.4981/32.9535/60.0428
[11:17:09.202] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.8958 for pixel 6/62 mean/min/max = 46.9481/33.7081/60.1881
[11:17:09.202] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 65.4083 for pixel 17/2 mean/min/max = 48.7781/32.1092/65.4471
[11:17:09.202] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 70.5621 for pixel 51/8 mean/min/max = 50.7034/30.7616/70.6451
[11:17:09.203] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 60.3847 for pixel 25/42 mean/min/max = 45.9334/31.2271/60.6397
[11:17:09.203] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6518 for pixel 47/10 mean/min/max = 45.3423/31.9832/58.7013
[11:17:09.203] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:17:09.292] <TB3> INFO: Expecting 411648 events.
[11:17:18.519] <TB3> INFO: 411648 events read in total (8636ms).
[11:17:18.529] <TB3> INFO: Expecting 411648 events.
[11:17:27.569] <TB3> INFO: 411648 events read in total (8637ms).
[11:17:27.582] <TB3> INFO: Expecting 411648 events.
[11:17:36.690] <TB3> INFO: 411648 events read in total (8705ms).
[11:17:36.702] <TB3> INFO: Expecting 411648 events.
[11:17:45.730] <TB3> INFO: 411648 events read in total (8625ms).
[11:17:45.750] <TB3> INFO: Expecting 411648 events.
[11:17:54.819] <TB3> INFO: 411648 events read in total (8666ms).
[11:17:54.837] <TB3> INFO: Expecting 411648 events.
[11:18:03.924] <TB3> INFO: 411648 events read in total (8684ms).
[11:18:03.944] <TB3> INFO: Expecting 411648 events.
[11:18:12.890] <TB3> INFO: 411648 events read in total (8543ms).
[11:18:12.913] <TB3> INFO: Expecting 411648 events.
[11:18:22.005] <TB3> INFO: 411648 events read in total (8689ms).
[11:18:22.041] <TB3> INFO: Expecting 411648 events.
[11:18:31.123] <TB3> INFO: 411648 events read in total (8679ms).
[11:18:31.155] <TB3> INFO: Expecting 411648 events.
[11:18:40.161] <TB3> INFO: 411648 events read in total (8603ms).
[11:18:40.203] <TB3> INFO: Expecting 411648 events.
[11:18:49.230] <TB3> INFO: 411648 events read in total (8624ms).
[11:18:49.267] <TB3> INFO: Expecting 411648 events.
[11:18:58.302] <TB3> INFO: 411648 events read in total (8632ms).
[11:18:58.336] <TB3> INFO: Expecting 411648 events.
[11:19:07.417] <TB3> INFO: 411648 events read in total (8678ms).
[11:19:07.458] <TB3> INFO: Expecting 411648 events.
[11:19:16.522] <TB3> INFO: 411648 events read in total (8661ms).
[11:19:16.561] <TB3> INFO: Expecting 411648 events.
[11:19:25.654] <TB3> INFO: 411648 events read in total (8690ms).
[11:19:25.715] <TB3> INFO: Expecting 411648 events.
[11:19:34.900] <TB3> INFO: 411648 events read in total (8782ms).
[11:19:34.963] <TB3> INFO: Test took 145760ms.
[11:19:35.893] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:19:35.905] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:19:35.905] <TB3> INFO: run 1 of 1
[11:19:36.171] <TB3> INFO: Expecting 5025280 events.
[11:20:01.924] <TB3> INFO: 585104 events read in total (25161ms).
[11:20:27.055] <TB3> INFO: 1167896 events read in total (50292ms).
[11:20:52.767] <TB3> INFO: 1750472 events read in total (76005ms).
[11:21:17.882] <TB3> INFO: 2333232 events read in total (101119ms).
[11:21:43.113] <TB3> INFO: 2915520 events read in total (126350ms).
[11:22:08.429] <TB3> INFO: 3500080 events read in total (151666ms).
[11:22:33.967] <TB3> INFO: 4083936 events read in total (177204ms).
[11:22:59.661] <TB3> INFO: 4666800 events read in total (202898ms).
[11:23:15.318] <TB3> INFO: 5025280 events read in total (218555ms).
[11:23:15.415] <TB3> INFO: Test took 219510ms.
[11:23:37.939] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.537227 .. 147.675599
[11:23:38.172] <TB3> INFO: Expecting 208000 events.
[11:23:47.684] <TB3> INFO: 208000 events read in total (8920ms).
[11:23:47.685] <TB3> INFO: Test took 9745ms.
[11:23:47.738] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[11:23:47.750] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:23:47.750] <TB3> INFO: run 1 of 1
[11:23:48.028] <TB3> INFO: Expecting 5258240 events.
[11:24:14.063] <TB3> INFO: 585424 events read in total (25444ms).
[11:24:39.208] <TB3> INFO: 1171000 events read in total (50589ms).
[11:25:04.103] <TB3> INFO: 1756352 events read in total (75484ms).
[11:25:29.136] <TB3> INFO: 2341480 events read in total (100517ms).
[11:25:54.540] <TB3> INFO: 2926144 events read in total (125921ms).
[11:26:19.342] <TB3> INFO: 3509608 events read in total (150723ms).
[11:26:44.096] <TB3> INFO: 4092728 events read in total (175477ms).
[11:27:09.556] <TB3> INFO: 4675144 events read in total (200937ms).
[11:27:34.551] <TB3> INFO: 5258016 events read in total (225932ms).
[11:27:34.981] <TB3> INFO: 5258240 events read in total (226362ms).
[11:27:35.046] <TB3> INFO: Test took 227296ms.
[11:28:01.105] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.883432 .. 48.519679
[11:28:01.370] <TB3> INFO: Expecting 208000 events.
[11:28:10.972] <TB3> INFO: 208000 events read in total (9010ms).
[11:28:10.973] <TB3> INFO: Test took 9867ms.
[11:28:11.039] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 58 (-1/-1) hits flags = 528 (plus default)
[11:28:11.050] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:28:11.050] <TB3> INFO: run 1 of 1
[11:28:11.328] <TB3> INFO: Expecting 1397760 events.
[11:28:39.253] <TB3> INFO: 648352 events read in total (27333ms).
[11:29:05.967] <TB3> INFO: 1293936 events read in total (54047ms).
[11:29:10.660] <TB3> INFO: 1397760 events read in total (58740ms).
[11:29:10.688] <TB3> INFO: Test took 59638ms.
[11:29:24.199] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.554084 .. 47.694692
[11:29:24.473] <TB3> INFO: Expecting 208000 events.
[11:29:34.171] <TB3> INFO: 208000 events read in total (9106ms).
[11:29:34.172] <TB3> INFO: Test took 9971ms.
[11:29:34.232] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:29:34.243] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:29:34.243] <TB3> INFO: run 1 of 1
[11:29:34.521] <TB3> INFO: Expecting 1431040 events.
[11:30:02.441] <TB3> INFO: 659536 events read in total (27328ms).
[11:30:29.249] <TB3> INFO: 1317808 events read in total (54136ms).
[11:30:34.344] <TB3> INFO: 1431040 events read in total (59231ms).
[11:30:34.376] <TB3> INFO: Test took 60133ms.
[11:30:48.897] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 22.929163 .. 45.310336
[11:30:49.172] <TB3> INFO: Expecting 208000 events.
[11:30:58.923] <TB3> INFO: 208000 events read in total (9160ms).
[11:30:58.924] <TB3> INFO: Test took 10026ms.
[11:30:58.972] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 12 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:30:58.981] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:30:58.981] <TB3> INFO: run 1 of 1
[11:30:59.258] <TB3> INFO: Expecting 1464320 events.
[11:31:27.615] <TB3> INFO: 679352 events read in total (27765ms).
[11:31:55.596] <TB3> INFO: 1358456 events read in total (55746ms).
[11:32:00.225] <TB3> INFO: 1464320 events read in total (60375ms).
[11:32:00.249] <TB3> INFO: Test took 61268ms.
[11:32:12.730] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:32:12.730] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:32:12.740] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:32:12.740] <TB3> INFO: run 1 of 1
[11:32:12.988] <TB3> INFO: Expecting 1364480 events.
[11:32:41.316] <TB3> INFO: 667656 events read in total (27736ms).
[11:33:09.281] <TB3> INFO: 1334752 events read in total (55701ms).
[11:33:10.961] <TB3> INFO: 1364480 events read in total (57381ms).
[11:33:10.982] <TB3> INFO: Test took 58241ms.
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C0.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C1.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C2.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C3.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C4.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C5.dat
[11:33:22.206] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C6.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C7.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C8.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C9.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C10.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C11.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C12.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C13.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C14.dat
[11:33:22.207] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C15.dat
[11:33:22.207] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C0.dat
[11:33:22.215] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C1.dat
[11:33:22.222] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C2.dat
[11:33:22.229] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C3.dat
[11:33:22.234] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C4.dat
[11:33:22.240] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C5.dat
[11:33:22.245] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C6.dat
[11:33:22.251] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C7.dat
[11:33:22.256] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C8.dat
[11:33:22.261] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C9.dat
[11:33:22.267] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C10.dat
[11:33:22.272] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C11.dat
[11:33:22.277] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C12.dat
[11:33:22.283] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C13.dat
[11:33:22.288] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C14.dat
[11:33:22.294] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C15.dat
[11:33:22.299] <TB3> INFO: PixTestTrim::trimTest() done
[11:33:22.299] <TB3> INFO: vtrim: 151 141 149 132 137 154 118 173 162 140 135 128 135 140 144 146
[11:33:22.299] <TB3> INFO: vthrcomp: 123 121 127 114 108 114 108 133 103 120 109 109 105 100 115 117
[11:33:22.299] <TB3> INFO: vcal mean: 34.95 34.99 34.95 35.00 35.05 34.93 35.03 35.01 34.99 35.00 34.97 34.95 35.01 35.12 34.96 34.95
[11:33:22.299] <TB3> INFO: vcal RMS: 1.12 0.95 1.03 0.93 0.94 1.04 0.98 1.06 1.06 1.10 0.93 1.00 1.04 1.30 1.24 1.03
[11:33:22.299] <TB3> INFO: bits mean: 11.03 9.90 10.18 9.99 9.20 10.43 9.07 10.18 9.32 9.68 9.29 9.32 9.53 9.29 10.65 10.29
[11:33:22.299] <TB3> INFO: bits RMS: 2.10 2.56 2.54 2.46 2.54 2.31 2.55 2.27 2.55 2.65 2.59 2.42 2.42 2.61 2.22 2.37
[11:33:22.306] <TB3> INFO: ----------------------------------------------------------------------
[11:33:22.306] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:33:22.306] <TB3> INFO: ----------------------------------------------------------------------
[11:33:22.308] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:33:22.318] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:33:22.318] <TB3> INFO: run 1 of 1
[11:33:22.550] <TB3> INFO: Expecting 4160000 events.
[11:33:53.920] <TB3> INFO: 732235 events read in total (30778ms).
[11:34:24.600] <TB3> INFO: 1458675 events read in total (61458ms).
[11:34:55.263] <TB3> INFO: 2179300 events read in total (92121ms).
[11:35:25.724] <TB3> INFO: 2895595 events read in total (122582ms).
[11:35:56.307] <TB3> INFO: 3607355 events read in total (153165ms).
[11:36:19.830] <TB3> INFO: 4160000 events read in total (176688ms).
[11:36:19.883] <TB3> INFO: Test took 177565ms.
[11:36:46.971] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:36:46.981] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:36:46.982] <TB3> INFO: run 1 of 1
[11:36:47.229] <TB3> INFO: Expecting 4160000 events.
[11:37:18.282] <TB3> INFO: 708320 events read in total (30461ms).
[11:37:48.446] <TB3> INFO: 1411355 events read in total (60625ms).
[11:38:18.807] <TB3> INFO: 2109830 events read in total (90986ms).
[11:38:48.876] <TB3> INFO: 2804865 events read in total (121055ms).
[11:39:19.485] <TB3> INFO: 3495820 events read in total (151664ms).
[11:39:47.999] <TB3> INFO: 4160000 events read in total (180178ms).
[11:39:48.062] <TB3> INFO: Test took 181080ms.
[11:40:15.725] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[11:40:15.738] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:40:15.738] <TB3> INFO: run 1 of 1
[11:40:15.975] <TB3> INFO: Expecting 3868800 events.
[11:40:47.065] <TB3> INFO: 726265 events read in total (30499ms).
[11:41:17.622] <TB3> INFO: 1446570 events read in total (61056ms).
[11:41:47.972] <TB3> INFO: 2161230 events read in total (91406ms).
[11:42:18.022] <TB3> INFO: 2870875 events read in total (121456ms).
[11:42:48.392] <TB3> INFO: 3577995 events read in total (151826ms).
[11:43:01.340] <TB3> INFO: 3868800 events read in total (164774ms).
[11:43:01.406] <TB3> INFO: Test took 165668ms.
[11:43:27.428] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[11:43:27.439] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:43:27.439] <TB3> INFO: run 1 of 1
[11:43:27.672] <TB3> INFO: Expecting 3848000 events.
[11:43:59.343] <TB3> INFO: 727840 events read in total (31079ms).
[11:44:30.012] <TB3> INFO: 1449445 events read in total (61748ms).
[11:45:00.721] <TB3> INFO: 2165555 events read in total (92457ms).
[11:45:31.046] <TB3> INFO: 2876655 events read in total (122782ms).
[11:46:01.617] <TB3> INFO: 3585190 events read in total (153353ms).
[11:46:13.254] <TB3> INFO: 3848000 events read in total (164990ms).
[11:46:13.317] <TB3> INFO: Test took 165877ms.
[11:46:41.258] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[11:46:41.272] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:46:41.272] <TB3> INFO: run 1 of 1
[11:46:41.549] <TB3> INFO: Expecting 3868800 events.
[11:47:13.163] <TB3> INFO: 726395 events read in total (31022ms).
[11:47:43.961] <TB3> INFO: 1446840 events read in total (61820ms).
[11:48:14.477] <TB3> INFO: 2161705 events read in total (92337ms).
[11:48:44.787] <TB3> INFO: 2871650 events read in total (122646ms).
[11:49:15.284] <TB3> INFO: 3579035 events read in total (153143ms).
[11:49:27.755] <TB3> INFO: 3868800 events read in total (165614ms).
[11:49:27.804] <TB3> INFO: Test took 166531ms.
[11:49:54.709] <TB3> INFO: PixTestTrim::trimBitTest() done
[11:49:54.710] <TB3> INFO: PixTestTrim::doTest() done, duration: 2415 seconds
[11:49:54.710] <TB3> INFO: Decoding statistics:
[11:49:54.710] <TB3> INFO: General information:
[11:49:54.710] <TB3> INFO: 16bit words read: 0
[11:49:54.710] <TB3> INFO: valid events total: 0
[11:49:54.710] <TB3> INFO: empty events: 0
[11:49:54.710] <TB3> INFO: valid events with pixels: 0
[11:49:54.710] <TB3> INFO: valid pixel hits: 0
[11:49:54.710] <TB3> INFO: Event errors: 0
[11:49:54.710] <TB3> INFO: start marker: 0
[11:49:54.710] <TB3> INFO: stop marker: 0
[11:49:54.710] <TB3> INFO: overflow: 0
[11:49:54.710] <TB3> INFO: invalid 5bit words: 0
[11:49:54.710] <TB3> INFO: invalid XOR eye diagram: 0
[11:49:54.710] <TB3> INFO: frame (failed synchr.): 0
[11:49:54.710] <TB3> INFO: idle data (no TBM trl): 0
[11:49:54.710] <TB3> INFO: no data (only TBM hdr): 0
[11:49:54.710] <TB3> INFO: TBM errors: 0
[11:49:54.710] <TB3> INFO: flawed TBM headers: 0
[11:49:54.710] <TB3> INFO: flawed TBM trailers: 0
[11:49:54.711] <TB3> INFO: event ID mismatches: 0
[11:49:54.711] <TB3> INFO: ROC errors: 0
[11:49:54.711] <TB3> INFO: missing ROC header(s): 0
[11:49:54.711] <TB3> INFO: misplaced readback start: 0
[11:49:54.711] <TB3> INFO: Pixel decoding errors: 0
[11:49:54.711] <TB3> INFO: pixel data incomplete: 0
[11:49:54.711] <TB3> INFO: pixel address: 0
[11:49:54.711] <TB3> INFO: pulse height fill bit: 0
[11:49:54.711] <TB3> INFO: buffer corruption: 0
[11:49:55.339] <TB3> INFO: ######################################################################
[11:49:55.339] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:49:55.339] <TB3> INFO: ######################################################################
[11:49:55.572] <TB3> INFO: Expecting 41600 events.
[11:49:59.064] <TB3> INFO: 41600 events read in total (2900ms).
[11:49:59.065] <TB3> INFO: Test took 3725ms.
[11:49:59.499] <TB3> INFO: Expecting 41600 events.
[11:50:03.038] <TB3> INFO: 41600 events read in total (2947ms).
[11:50:03.039] <TB3> INFO: Test took 3772ms.
[11:50:03.327] <TB3> INFO: Expecting 41600 events.
[11:50:06.809] <TB3> INFO: 41600 events read in total (2890ms).
[11:50:06.810] <TB3> INFO: Test took 3747ms.
[11:50:07.098] <TB3> INFO: Expecting 41600 events.
[11:50:10.661] <TB3> INFO: 41600 events read in total (2971ms).
[11:50:10.661] <TB3> INFO: Test took 3828ms.
[11:50:10.949] <TB3> INFO: Expecting 41600 events.
[11:50:14.495] <TB3> INFO: 41600 events read in total (2954ms).
[11:50:14.496] <TB3> INFO: Test took 3812ms.
[11:50:14.799] <TB3> INFO: Expecting 41600 events.
[11:50:18.398] <TB3> INFO: 41600 events read in total (3007ms).
[11:50:18.399] <TB3> INFO: Test took 3877ms.
[11:50:18.687] <TB3> INFO: Expecting 41600 events.
[11:50:22.140] <TB3> INFO: 41600 events read in total (2862ms).
[11:50:22.141] <TB3> INFO: Test took 3719ms.
[11:50:22.432] <TB3> INFO: Expecting 41600 events.
[11:50:26.010] <TB3> INFO: 41600 events read in total (2987ms).
[11:50:26.010] <TB3> INFO: Test took 3843ms.
[11:50:26.298] <TB3> INFO: Expecting 41600 events.
[11:50:29.876] <TB3> INFO: 41600 events read in total (2986ms).
[11:50:29.877] <TB3> INFO: Test took 3843ms.
[11:50:30.180] <TB3> INFO: Expecting 41600 events.
[11:50:33.638] <TB3> INFO: 41600 events read in total (2866ms).
[11:50:33.639] <TB3> INFO: Test took 3736ms.
[11:50:33.927] <TB3> INFO: Expecting 41600 events.
[11:50:37.414] <TB3> INFO: 41600 events read in total (2896ms).
[11:50:37.415] <TB3> INFO: Test took 3753ms.
[11:50:37.703] <TB3> INFO: Expecting 41600 events.
[11:50:41.138] <TB3> INFO: 41600 events read in total (2844ms).
[11:50:41.139] <TB3> INFO: Test took 3701ms.
[11:50:41.427] <TB3> INFO: Expecting 41600 events.
[11:50:44.955] <TB3> INFO: 41600 events read in total (2937ms).
[11:50:44.955] <TB3> INFO: Test took 3793ms.
[11:50:45.243] <TB3> INFO: Expecting 41600 events.
[11:50:48.697] <TB3> INFO: 41600 events read in total (2862ms).
[11:50:48.698] <TB3> INFO: Test took 3720ms.
[11:50:48.986] <TB3> INFO: Expecting 41600 events.
[11:50:52.513] <TB3> INFO: 41600 events read in total (2935ms).
[11:50:52.514] <TB3> INFO: Test took 3792ms.
[11:50:52.802] <TB3> INFO: Expecting 41600 events.
[11:50:56.406] <TB3> INFO: 41600 events read in total (3012ms).
[11:50:56.408] <TB3> INFO: Test took 3871ms.
[11:50:56.696] <TB3> INFO: Expecting 41600 events.
[11:51:00.136] <TB3> INFO: 41600 events read in total (2849ms).
[11:51:00.137] <TB3> INFO: Test took 3706ms.
[11:51:00.425] <TB3> INFO: Expecting 41600 events.
[11:51:03.939] <TB3> INFO: 41600 events read in total (2923ms).
[11:51:03.939] <TB3> INFO: Test took 3779ms.
[11:51:04.227] <TB3> INFO: Expecting 41600 events.
[11:51:07.678] <TB3> INFO: 41600 events read in total (2859ms).
[11:51:07.679] <TB3> INFO: Test took 3716ms.
[11:51:07.967] <TB3> INFO: Expecting 41600 events.
[11:51:11.544] <TB3> INFO: 41600 events read in total (2985ms).
[11:51:11.545] <TB3> INFO: Test took 3842ms.
[11:51:11.842] <TB3> INFO: Expecting 41600 events.
[11:51:15.367] <TB3> INFO: 41600 events read in total (2933ms).
[11:51:15.368] <TB3> INFO: Test took 3800ms.
[11:51:15.657] <TB3> INFO: Expecting 41600 events.
[11:51:19.188] <TB3> INFO: 41600 events read in total (2939ms).
[11:51:19.189] <TB3> INFO: Test took 3798ms.
[11:51:19.477] <TB3> INFO: Expecting 41600 events.
[11:51:22.983] <TB3> INFO: 41600 events read in total (2915ms).
[11:51:22.984] <TB3> INFO: Test took 3772ms.
[11:51:23.275] <TB3> INFO: Expecting 41600 events.
[11:51:26.710] <TB3> INFO: 41600 events read in total (2843ms).
[11:51:26.710] <TB3> INFO: Test took 3700ms.
[11:51:26.999] <TB3> INFO: Expecting 41600 events.
[11:51:30.515] <TB3> INFO: 41600 events read in total (2925ms).
[11:51:30.516] <TB3> INFO: Test took 3782ms.
[11:51:30.804] <TB3> INFO: Expecting 41600 events.
[11:51:34.350] <TB3> INFO: 41600 events read in total (2955ms).
[11:51:34.351] <TB3> INFO: Test took 3812ms.
[11:51:34.641] <TB3> INFO: Expecting 41600 events.
[11:51:38.113] <TB3> INFO: 41600 events read in total (2880ms).
[11:51:38.113] <TB3> INFO: Test took 3736ms.
[11:51:38.401] <TB3> INFO: Expecting 41600 events.
[11:51:41.919] <TB3> INFO: 41600 events read in total (2926ms).
[11:51:41.920] <TB3> INFO: Test took 3784ms.
[11:51:42.211] <TB3> INFO: Expecting 41600 events.
[11:51:45.731] <TB3> INFO: 41600 events read in total (2928ms).
[11:51:45.731] <TB3> INFO: Test took 3785ms.
[11:51:46.020] <TB3> INFO: Expecting 41600 events.
[11:51:49.534] <TB3> INFO: 41600 events read in total (2922ms).
[11:51:49.534] <TB3> INFO: Test took 3779ms.
[11:51:49.823] <TB3> INFO: Expecting 41600 events.
[11:51:53.256] <TB3> INFO: 41600 events read in total (2841ms).
[11:51:53.257] <TB3> INFO: Test took 3699ms.
[11:51:53.545] <TB3> INFO: Expecting 41600 events.
[11:51:57.044] <TB3> INFO: 41600 events read in total (2908ms).
[11:51:57.045] <TB3> INFO: Test took 3765ms.
[11:51:57.333] <TB3> INFO: Expecting 41600 events.
[11:52:00.800] <TB3> INFO: 41600 events read in total (2876ms).
[11:52:00.800] <TB3> INFO: Test took 3732ms.
[11:52:01.088] <TB3> INFO: Expecting 41600 events.
[11:52:04.571] <TB3> INFO: 41600 events read in total (2891ms).
[11:52:04.572] <TB3> INFO: Test took 3749ms.
[11:52:04.873] <TB3> INFO: Expecting 41600 events.
[11:52:08.436] <TB3> INFO: 41600 events read in total (2972ms).
[11:52:08.436] <TB3> INFO: Test took 3841ms.
[11:52:08.724] <TB3> INFO: Expecting 41600 events.
[11:52:12.236] <TB3> INFO: 41600 events read in total (2920ms).
[11:52:12.237] <TB3> INFO: Test took 3777ms.
[11:52:12.527] <TB3> INFO: Expecting 41600 events.
[11:52:16.069] <TB3> INFO: 41600 events read in total (2950ms).
[11:52:16.070] <TB3> INFO: Test took 3807ms.
[11:52:16.373] <TB3> INFO: Expecting 41600 events.
[11:52:19.958] <TB3> INFO: 41600 events read in total (2994ms).
[11:52:19.959] <TB3> INFO: Test took 3866ms.
[11:52:20.250] <TB3> INFO: Expecting 41600 events.
[11:52:23.760] <TB3> INFO: 41600 events read in total (2918ms).
[11:52:23.761] <TB3> INFO: Test took 3775ms.
[11:52:24.057] <TB3> INFO: Expecting 41600 events.
[11:52:27.524] <TB3> INFO: 41600 events read in total (2875ms).
[11:52:27.525] <TB3> INFO: Test took 3741ms.
[11:52:27.815] <TB3> INFO: Expecting 41600 events.
[11:52:31.320] <TB3> INFO: 41600 events read in total (2913ms).
[11:52:31.321] <TB3> INFO: Test took 3770ms.
[11:52:31.609] <TB3> INFO: Expecting 41600 events.
[11:52:35.136] <TB3> INFO: 41600 events read in total (2935ms).
[11:52:35.136] <TB3> INFO: Test took 3792ms.
[11:52:35.432] <TB3> INFO: Expecting 41600 events.
[11:52:39.054] <TB3> INFO: 41600 events read in total (3030ms).
[11:52:39.055] <TB3> INFO: Test took 3895ms.
[11:52:39.346] <TB3> INFO: Expecting 41600 events.
[11:52:42.799] <TB3> INFO: 41600 events read in total (2862ms).
[11:52:42.800] <TB3> INFO: Test took 3719ms.
[11:52:43.088] <TB3> INFO: Expecting 41600 events.
[11:52:46.528] <TB3> INFO: 41600 events read in total (2849ms).
[11:52:46.529] <TB3> INFO: Test took 3706ms.
[11:52:46.817] <TB3> INFO: Expecting 41600 events.
[11:52:50.381] <TB3> INFO: 41600 events read in total (2972ms).
[11:52:50.382] <TB3> INFO: Test took 3829ms.
[11:52:50.675] <TB3> INFO: Expecting 41600 events.
[11:52:54.131] <TB3> INFO: 41600 events read in total (2865ms).
[11:52:54.131] <TB3> INFO: Test took 3721ms.
[11:52:54.432] <TB3> INFO: Expecting 41600 events.
[11:52:57.978] <TB3> INFO: 41600 events read in total (2954ms).
[11:52:57.979] <TB3> INFO: Test took 3822ms.
[11:52:58.267] <TB3> INFO: Expecting 41600 events.
[11:53:01.791] <TB3> INFO: 41600 events read in total (2932ms).
[11:53:01.792] <TB3> INFO: Test took 3790ms.
[11:53:02.083] <TB3> INFO: Expecting 41600 events.
[11:53:05.567] <TB3> INFO: 41600 events read in total (2892ms).
[11:53:05.568] <TB3> INFO: Test took 3750ms.
[11:53:05.856] <TB3> INFO: Expecting 41600 events.
[11:53:09.423] <TB3> INFO: 41600 events read in total (2975ms).
[11:53:09.424] <TB3> INFO: Test took 3833ms.
[11:53:09.714] <TB3> INFO: Expecting 41600 events.
[11:53:13.195] <TB3> INFO: 41600 events read in total (2889ms).
[11:53:13.196] <TB3> INFO: Test took 3746ms.
[11:53:13.484] <TB3> INFO: Expecting 41600 events.
[11:53:16.938] <TB3> INFO: 41600 events read in total (2862ms).
[11:53:16.939] <TB3> INFO: Test took 3719ms.
[11:53:17.232] <TB3> INFO: Expecting 41600 events.
[11:53:20.731] <TB3> INFO: 41600 events read in total (2907ms).
[11:53:20.731] <TB3> INFO: Test took 3763ms.
[11:53:21.023] <TB3> INFO: Expecting 2560 events.
[11:53:21.905] <TB3> INFO: 2560 events read in total (290ms).
[11:53:21.905] <TB3> INFO: Test took 1159ms.
[11:53:22.213] <TB3> INFO: Expecting 2560 events.
[11:53:23.095] <TB3> INFO: 2560 events read in total (291ms).
[11:53:23.095] <TB3> INFO: Test took 1190ms.
[11:53:23.403] <TB3> INFO: Expecting 2560 events.
[11:53:24.287] <TB3> INFO: 2560 events read in total (292ms).
[11:53:24.287] <TB3> INFO: Test took 1191ms.
[11:53:24.595] <TB3> INFO: Expecting 2560 events.
[11:53:25.479] <TB3> INFO: 2560 events read in total (293ms).
[11:53:25.479] <TB3> INFO: Test took 1192ms.
[11:53:25.787] <TB3> INFO: Expecting 2560 events.
[11:53:26.664] <TB3> INFO: 2560 events read in total (285ms).
[11:53:26.665] <TB3> INFO: Test took 1185ms.
[11:53:26.973] <TB3> INFO: Expecting 2560 events.
[11:53:27.850] <TB3> INFO: 2560 events read in total (286ms).
[11:53:27.851] <TB3> INFO: Test took 1186ms.
[11:53:28.158] <TB3> INFO: Expecting 2560 events.
[11:53:29.035] <TB3> INFO: 2560 events read in total (285ms).
[11:53:29.035] <TB3> INFO: Test took 1184ms.
[11:53:29.343] <TB3> INFO: Expecting 2560 events.
[11:53:30.220] <TB3> INFO: 2560 events read in total (285ms).
[11:53:30.221] <TB3> INFO: Test took 1185ms.
[11:53:30.528] <TB3> INFO: Expecting 2560 events.
[11:53:31.407] <TB3> INFO: 2560 events read in total (287ms).
[11:53:31.407] <TB3> INFO: Test took 1186ms.
[11:53:31.715] <TB3> INFO: Expecting 2560 events.
[11:53:32.596] <TB3> INFO: 2560 events read in total (289ms).
[11:53:32.596] <TB3> INFO: Test took 1189ms.
[11:53:32.904] <TB3> INFO: Expecting 2560 events.
[11:53:33.781] <TB3> INFO: 2560 events read in total (286ms).
[11:53:33.782] <TB3> INFO: Test took 1185ms.
[11:53:34.090] <TB3> INFO: Expecting 2560 events.
[11:53:34.967] <TB3> INFO: 2560 events read in total (286ms).
[11:53:34.967] <TB3> INFO: Test took 1185ms.
[11:53:35.275] <TB3> INFO: Expecting 2560 events.
[11:53:36.160] <TB3> INFO: 2560 events read in total (293ms).
[11:53:36.160] <TB3> INFO: Test took 1192ms.
[11:53:36.468] <TB3> INFO: Expecting 2560 events.
[11:53:37.350] <TB3> INFO: 2560 events read in total (291ms).
[11:53:37.350] <TB3> INFO: Test took 1190ms.
[11:53:37.658] <TB3> INFO: Expecting 2560 events.
[11:53:38.541] <TB3> INFO: 2560 events read in total (291ms).
[11:53:38.541] <TB3> INFO: Test took 1190ms.
[11:53:38.849] <TB3> INFO: Expecting 2560 events.
[11:53:39.731] <TB3> INFO: 2560 events read in total (290ms).
[11:53:39.731] <TB3> INFO: Test took 1190ms.
[11:53:39.734] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:40.040] <TB3> INFO: Expecting 655360 events.
[11:53:54.230] <TB3> INFO: 655360 events read in total (13599ms).
[11:53:54.244] <TB3> INFO: Expecting 655360 events.
[11:54:08.253] <TB3> INFO: 655360 events read in total (13606ms).
[11:54:08.268] <TB3> INFO: Expecting 655360 events.
[11:54:22.254] <TB3> INFO: 655360 events read in total (13583ms).
[11:54:22.273] <TB3> INFO: Expecting 655360 events.
[11:54:36.392] <TB3> INFO: 655360 events read in total (13716ms).
[11:54:36.415] <TB3> INFO: Expecting 655360 events.
[11:54:50.533] <TB3> INFO: 655360 events read in total (13715ms).
[11:54:50.559] <TB3> INFO: Expecting 655360 events.
[11:55:04.542] <TB3> INFO: 655360 events read in total (13580ms).
[11:55:04.573] <TB3> INFO: Expecting 655360 events.
[11:55:18.626] <TB3> INFO: 655360 events read in total (13650ms).
[11:55:18.661] <TB3> INFO: Expecting 655360 events.
[11:55:32.626] <TB3> INFO: 655360 events read in total (13562ms).
[11:55:32.665] <TB3> INFO: Expecting 655360 events.
[11:55:46.607] <TB3> INFO: 655360 events read in total (13539ms).
[11:55:46.652] <TB3> INFO: Expecting 655360 events.
[11:56:00.702] <TB3> INFO: 655360 events read in total (13647ms).
[11:56:00.765] <TB3> INFO: Expecting 655360 events.
[11:56:14.790] <TB3> INFO: 655360 events read in total (13622ms).
[11:56:14.844] <TB3> INFO: Expecting 655360 events.
[11:56:28.860] <TB3> INFO: 655360 events read in total (13613ms).
[11:56:28.917] <TB3> INFO: Expecting 655360 events.
[11:56:42.934] <TB3> INFO: 655360 events read in total (13614ms).
[11:56:43.020] <TB3> INFO: Expecting 655360 events.
[11:56:56.596] <TB3> INFO: 655360 events read in total (13173ms).
[11:56:56.658] <TB3> INFO: Expecting 655360 events.
[11:57:10.778] <TB3> INFO: 655360 events read in total (13717ms).
[11:57:10.871] <TB3> INFO: Expecting 655360 events.
[11:57:24.001] <TB3> INFO: 655360 events read in total (13727ms).
[11:57:25.079] <TB3> INFO: Test took 225346ms.
[11:57:25.165] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:57:25.429] <TB3> INFO: Expecting 655360 events.
[11:57:39.612] <TB3> INFO: 655360 events read in total (13591ms).
[11:57:39.622] <TB3> INFO: Expecting 655360 events.
[11:57:53.638] <TB3> INFO: 655360 events read in total (13613ms).
[11:57:53.657] <TB3> INFO: Expecting 655360 events.
[11:58:07.600] <TB3> INFO: 655360 events read in total (13540ms).
[11:58:07.618] <TB3> INFO: Expecting 655360 events.
[11:58:21.624] <TB3> INFO: 655360 events read in total (13603ms).
[11:58:21.646] <TB3> INFO: Expecting 655360 events.
[11:58:35.527] <TB3> INFO: 655360 events read in total (13478ms).
[11:58:35.555] <TB3> INFO: Expecting 655360 events.
[11:58:49.514] <TB3> INFO: 655360 events read in total (13556ms).
[11:58:49.546] <TB3> INFO: Expecting 655360 events.
[11:59:03.655] <TB3> INFO: 655360 events read in total (13706ms).
[11:59:03.690] <TB3> INFO: Expecting 655360 events.
[11:59:17.777] <TB3> INFO: 655360 events read in total (13684ms).
[11:59:17.816] <TB3> INFO: Expecting 655360 events.
[11:59:31.986] <TB3> INFO: 655360 events read in total (13767ms).
[11:59:32.030] <TB3> INFO: Expecting 655360 events.
[11:59:46.143] <TB3> INFO: 655360 events read in total (13710ms).
[11:59:46.207] <TB3> INFO: Expecting 655360 events.
[12:00:00.285] <TB3> INFO: 655360 events read in total (13675ms).
[12:00:00.338] <TB3> INFO: Expecting 655360 events.
[12:00:14.497] <TB3> INFO: 655360 events read in total (13756ms).
[12:00:14.553] <TB3> INFO: Expecting 655360 events.
[12:00:28.659] <TB3> INFO: 655360 events read in total (13704ms).
[12:00:28.721] <TB3> INFO: Expecting 655360 events.
[12:00:42.625] <TB3> INFO: 655360 events read in total (13502ms).
[12:00:42.690] <TB3> INFO: Expecting 655360 events.
[12:00:56.772] <TB3> INFO: 655360 events read in total (13679ms).
[12:00:56.849] <TB3> INFO: Expecting 655360 events.
[12:01:10.934] <TB3> INFO: 655360 events read in total (13682ms).
[12:01:11.017] <TB3> INFO: Test took 225852ms.
[12:01:11.238] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.244] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.251] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.257] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.263] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.269] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.276] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.282] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.288] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.294] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.301] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:01:11.307] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:01:11.313] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:01:11.319] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:01:11.326] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:01:11.332] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:01:11.339] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.345] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.351] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.358] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:01:11.364] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:01:11.370] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:01:11.376] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:01:11.383] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:01:11.389] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:01:11.396] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.402] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.408] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.414] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.421] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.427] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.433] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.440] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.446] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.452] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.459] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.465] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.471] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:01:11.478] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:01:11.484] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:01:11.490] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:01:11.497] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:01:11.503] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:01:11.509] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:01:11.516] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[12:01:11.522] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[12:01:11.528] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[12:01:11.535] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[12:01:11.541] <TB3> INFO: safety margin for low PH: adding 13, margin is now 33
[12:01:11.547] <TB3> INFO: safety margin for low PH: adding 14, margin is now 34
[12:01:11.553] <TB3> INFO: safety margin for low PH: adding 15, margin is now 35
[12:01:11.560] <TB3> INFO: safety margin for low PH: adding 16, margin is now 36
[12:01:11.566] <TB3> INFO: safety margin for low PH: adding 17, margin is now 37
[12:01:11.572] <TB3> INFO: safety margin for low PH: adding 18, margin is now 38
[12:01:11.579] <TB3> INFO: safety margin for low PH: adding 19, margin is now 39
[12:01:11.585] <TB3> INFO: safety margin for low PH: adding 20, margin is now 40
[12:01:11.592] <TB3> INFO: safety margin for low PH: adding 21, margin is now 41
[12:01:11.598] <TB3> INFO: safety margin for low PH: adding 22, margin is now 42
[12:01:11.604] <TB3> INFO: safety margin for low PH: adding 23, margin is now 43
[12:01:11.611] <TB3> INFO: safety margin for low PH: adding 24, margin is now 44
[12:01:11.617] <TB3> INFO: safety margin for low PH: adding 25, margin is now 45
[12:01:11.623] <TB3> INFO: safety margin for low PH: adding 26, margin is now 46
[12:01:11.630] <TB3> INFO: safety margin for low PH: adding 27, margin is now 47
[12:01:11.636] <TB3> INFO: safety margin for low PH: adding 28, margin is now 48
[12:01:11.642] <TB3> INFO: safety margin for low PH: adding 29, margin is now 49
[12:01:11.649] <TB3> INFO: safety margin for low PH: adding 30, margin is now 50
[12:01:11.655] <TB3> INFO: safety margin for low PH: adding 31, margin is now 51
[12:01:11.661] <TB3> INFO: safety margin for low PH: adding 32, margin is now 52
[12:01:11.668] <TB3> INFO: safety margin for low PH: adding 33, margin is now 53
[12:01:11.674] <TB3> INFO: safety margin for low PH: adding 34, margin is now 54
[12:01:11.680] <TB3> INFO: safety margin for low PH: adding 35, margin is now 55
[12:01:11.687] <TB3> INFO: safety margin for low PH: adding 36, margin is now 56
[12:01:11.693] <TB3> INFO: safety margin for low PH: adding 37, margin is now 57
[12:01:11.699] <TB3> INFO: safety margin for low PH: adding 38, margin is now 58
[12:01:11.706] <TB3> INFO: safety margin for low PH: adding 39, margin is now 59
[12:01:11.712] <TB3> INFO: safety margin for low PH: adding 40, margin is now 60
[12:01:11.718] <TB3> INFO: safety margin for low PH: adding 41, margin is now 61
[12:01:11.725] <TB3> INFO: safety margin for low PH: adding 42, margin is now 62
[12:01:11.731] <TB3> INFO: safety margin for low PH: adding 43, margin is now 63
[12:01:11.738] <TB3> INFO: safety margin for low PH: adding 44, margin is now 64
[12:01:11.744] <TB3> INFO: safety margin for low PH: adding 45, margin is now 65
[12:01:11.750] <TB3> INFO: safety margin for low PH: adding 46, margin is now 66
[12:01:11.756] <TB3> INFO: safety margin for low PH: adding 47, margin is now 67
[12:01:11.763] <TB3> INFO: safety margin for low PH: adding 48, margin is now 68
[12:01:11.769] <TB3> INFO: safety margin for low PH: adding 49, margin is now 69
[12:01:11.775] <TB3> INFO: safety margin for low PH: adding 50, margin is now 70
[12:01:11.782] <TB3> INFO: safety margin for low PH: adding 51, margin is now 71
[12:01:11.788] <TB3> INFO: safety margin for low PH: adding 52, margin is now 72
[12:01:11.795] <TB3> INFO: safety margin for low PH: adding 53, margin is now 73
[12:01:11.801] <TB3> INFO: safety margin for low PH: adding 54, margin is now 74
[12:01:11.807] <TB3> INFO: safety margin for low PH: adding 55, margin is now 75
[12:01:11.813] <TB3> INFO: safety margin for low PH: adding 56, margin is now 76
[12:01:11.820] <TB3> INFO: safety margin for low PH: adding 57, margin is now 77
[12:01:11.825] <TB3> INFO: safety margin for low PH: adding 58, margin is now 78
[12:01:11.829] <TB3> INFO: safety margin for low PH: adding 59, margin is now 79
[12:01:11.834] <TB3> INFO: safety margin for low PH: adding 60, margin is now 80
[12:01:11.838] <TB3> INFO: safety margin for low PH: adding 61, margin is now 81
[12:01:11.843] <TB3> INFO: safety margin for low PH: adding 62, margin is now 82
[12:01:11.847] <TB3> INFO: safety margin for low PH: adding 63, margin is now 83
[12:01:11.852] <TB3> INFO: safety margin for low PH: adding 64, margin is now 84
[12:01:11.856] <TB3> INFO: safety margin for low PH: adding 65, margin is now 85
[12:01:11.861] <TB3> INFO: safety margin for low PH: adding 66, margin is now 86
[12:01:11.866] <TB3> INFO: safety margin for low PH: adding 67, margin is now 87
[12:01:11.870] <TB3> INFO: safety margin for low PH: adding 68, margin is now 88
[12:01:11.875] <TB3> INFO: safety margin for low PH: adding 69, margin is now 89
[12:01:11.880] <TB3> INFO: safety margin for low PH: adding 70, margin is now 90
[12:01:11.884] <TB3> INFO: safety margin for low PH: adding 71, margin is now 91
[12:01:11.889] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.894] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:01:11.898] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C0.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C1.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C2.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C3.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C4.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C5.dat
[12:01:11.933] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C6.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C7.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C8.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C9.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C10.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C11.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C12.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C13.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C14.dat
[12:01:11.934] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C15.dat
[12:01:12.180] <TB3> INFO: Expecting 41600 events.
[12:01:15.301] <TB3> INFO: 41600 events read in total (2530ms).
[12:01:15.301] <TB3> INFO: Test took 3364ms.
[12:01:15.746] <TB3> INFO: Expecting 41600 events.
[12:01:18.831] <TB3> INFO: 41600 events read in total (2493ms).
[12:01:18.832] <TB3> INFO: Test took 3318ms.
[12:01:19.318] <TB3> INFO: Expecting 41600 events.
[12:01:22.469] <TB3> INFO: 41600 events read in total (2560ms).
[12:01:22.470] <TB3> INFO: Test took 3427ms.
[12:01:22.685] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:22.773] <TB3> INFO: Expecting 2560 events.
[12:01:23.659] <TB3> INFO: 2560 events read in total (294ms).
[12:01:23.659] <TB3> INFO: Test took 974ms.
[12:01:23.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:23.967] <TB3> INFO: Expecting 2560 events.
[12:01:24.852] <TB3> INFO: 2560 events read in total (293ms).
[12:01:24.852] <TB3> INFO: Test took 1191ms.
[12:01:24.854] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:25.160] <TB3> INFO: Expecting 2560 events.
[12:01:26.042] <TB3> INFO: 2560 events read in total (290ms).
[12:01:26.042] <TB3> INFO: Test took 1189ms.
[12:01:26.044] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:26.351] <TB3> INFO: Expecting 2560 events.
[12:01:27.237] <TB3> INFO: 2560 events read in total (294ms).
[12:01:27.237] <TB3> INFO: Test took 1193ms.
[12:01:27.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:27.546] <TB3> INFO: Expecting 2560 events.
[12:01:28.430] <TB3> INFO: 2560 events read in total (292ms).
[12:01:28.430] <TB3> INFO: Test took 1190ms.
[12:01:28.432] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:28.739] <TB3> INFO: Expecting 2560 events.
[12:01:29.621] <TB3> INFO: 2560 events read in total (291ms).
[12:01:29.621] <TB3> INFO: Test took 1189ms.
[12:01:29.623] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:29.929] <TB3> INFO: Expecting 2560 events.
[12:01:30.814] <TB3> INFO: 2560 events read in total (293ms).
[12:01:30.815] <TB3> INFO: Test took 1192ms.
[12:01:30.817] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:31.123] <TB3> INFO: Expecting 2560 events.
[12:01:32.008] <TB3> INFO: 2560 events read in total (293ms).
[12:01:32.009] <TB3> INFO: Test took 1192ms.
[12:01:32.010] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:32.317] <TB3> INFO: Expecting 2560 events.
[12:01:33.195] <TB3> INFO: 2560 events read in total (287ms).
[12:01:33.196] <TB3> INFO: Test took 1186ms.
[12:01:33.197] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:33.504] <TB3> INFO: Expecting 2560 events.
[12:01:34.384] <TB3> INFO: 2560 events read in total (288ms).
[12:01:34.384] <TB3> INFO: Test took 1187ms.
[12:01:34.386] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:34.693] <TB3> INFO: Expecting 2560 events.
[12:01:35.574] <TB3> INFO: 2560 events read in total (290ms).
[12:01:35.574] <TB3> INFO: Test took 1188ms.
[12:01:35.576] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:35.882] <TB3> INFO: Expecting 2560 events.
[12:01:36.765] <TB3> INFO: 2560 events read in total (291ms).
[12:01:36.765] <TB3> INFO: Test took 1189ms.
[12:01:36.767] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:37.073] <TB3> INFO: Expecting 2560 events.
[12:01:37.955] <TB3> INFO: 2560 events read in total (291ms).
[12:01:37.955] <TB3> INFO: Test took 1188ms.
[12:01:37.957] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:38.263] <TB3> INFO: Expecting 2560 events.
[12:01:39.142] <TB3> INFO: 2560 events read in total (287ms).
[12:01:39.143] <TB3> INFO: Test took 1186ms.
[12:01:39.144] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:39.451] <TB3> INFO: Expecting 2560 events.
[12:01:40.331] <TB3> INFO: 2560 events read in total (288ms).
[12:01:40.331] <TB3> INFO: Test took 1187ms.
[12:01:40.333] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:40.639] <TB3> INFO: Expecting 2560 events.
[12:01:41.520] <TB3> INFO: 2560 events read in total (289ms).
[12:01:41.521] <TB3> INFO: Test took 1188ms.
[12:01:41.523] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:41.829] <TB3> INFO: Expecting 2560 events.
[12:01:42.718] <TB3> INFO: 2560 events read in total (298ms).
[12:01:42.718] <TB3> INFO: Test took 1195ms.
[12:01:42.720] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:43.026] <TB3> INFO: Expecting 2560 events.
[12:01:43.906] <TB3> INFO: 2560 events read in total (288ms).
[12:01:43.907] <TB3> INFO: Test took 1187ms.
[12:01:43.909] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:44.215] <TB3> INFO: Expecting 2560 events.
[12:01:45.096] <TB3> INFO: 2560 events read in total (290ms).
[12:01:45.097] <TB3> INFO: Test took 1189ms.
[12:01:45.098] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:45.405] <TB3> INFO: Expecting 2560 events.
[12:01:46.283] <TB3> INFO: 2560 events read in total (286ms).
[12:01:46.283] <TB3> INFO: Test took 1185ms.
[12:01:46.285] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:46.592] <TB3> INFO: Expecting 2560 events.
[12:01:47.471] <TB3> INFO: 2560 events read in total (288ms).
[12:01:47.471] <TB3> INFO: Test took 1186ms.
[12:01:47.473] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:47.779] <TB3> INFO: Expecting 2560 events.
[12:01:48.661] <TB3> INFO: 2560 events read in total (290ms).
[12:01:48.661] <TB3> INFO: Test took 1188ms.
[12:01:48.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:48.970] <TB3> INFO: Expecting 2560 events.
[12:01:49.848] <TB3> INFO: 2560 events read in total (287ms).
[12:01:49.849] <TB3> INFO: Test took 1186ms.
[12:01:49.850] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:50.157] <TB3> INFO: Expecting 2560 events.
[12:01:51.037] <TB3> INFO: 2560 events read in total (288ms).
[12:01:51.038] <TB3> INFO: Test took 1188ms.
[12:01:51.039] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:51.346] <TB3> INFO: Expecting 2560 events.
[12:01:52.229] <TB3> INFO: 2560 events read in total (292ms).
[12:01:52.229] <TB3> INFO: Test took 1190ms.
[12:01:52.231] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:52.538] <TB3> INFO: Expecting 2560 events.
[12:01:53.422] <TB3> INFO: 2560 events read in total (293ms).
[12:01:53.422] <TB3> INFO: Test took 1191ms.
[12:01:53.424] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:53.731] <TB3> INFO: Expecting 2560 events.
[12:01:54.616] <TB3> INFO: 2560 events read in total (294ms).
[12:01:54.616] <TB3> INFO: Test took 1192ms.
[12:01:54.618] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:54.925] <TB3> INFO: Expecting 2560 events.
[12:01:55.809] <TB3> INFO: 2560 events read in total (293ms).
[12:01:55.809] <TB3> INFO: Test took 1191ms.
[12:01:55.811] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:56.118] <TB3> INFO: Expecting 2560 events.
[12:01:57.004] <TB3> INFO: 2560 events read in total (295ms).
[12:01:57.005] <TB3> INFO: Test took 1194ms.
[12:01:57.006] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:57.313] <TB3> INFO: Expecting 2560 events.
[12:01:58.196] <TB3> INFO: 2560 events read in total (292ms).
[12:01:58.196] <TB3> INFO: Test took 1190ms.
[12:01:58.198] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:58.504] <TB3> INFO: Expecting 2560 events.
[12:01:59.386] <TB3> INFO: 2560 events read in total (290ms).
[12:01:59.387] <TB3> INFO: Test took 1189ms.
[12:01:59.388] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:01:59.695] <TB3> INFO: Expecting 2560 events.
[12:02:00.578] <TB3> INFO: 2560 events read in total (291ms).
[12:02:00.579] <TB3> INFO: Test took 1191ms.
[12:02:01.043] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 725 seconds
[12:02:01.043] <TB3> INFO: PH scale (per ROC): 54 43 56 43 44 45 51 49 61 43 52 48 36 40 37 38
[12:02:01.043] <TB3> INFO: PH offset (per ROC): 128 90 125 101 95 93 144 122 127 108 122 141 105 120 95 118
[12:02:01.049] <TB3> INFO: Decoding statistics:
[12:02:01.049] <TB3> INFO: General information:
[12:02:01.049] <TB3> INFO: 16bit words read: 127888
[12:02:01.049] <TB3> INFO: valid events total: 20480
[12:02:01.049] <TB3> INFO: empty events: 17976
[12:02:01.050] <TB3> INFO: valid events with pixels: 2504
[12:02:01.050] <TB3> INFO: valid pixel hits: 2504
[12:02:01.050] <TB3> INFO: Event errors: 0
[12:02:01.050] <TB3> INFO: start marker: 0
[12:02:01.050] <TB3> INFO: stop marker: 0
[12:02:01.050] <TB3> INFO: overflow: 0
[12:02:01.050] <TB3> INFO: invalid 5bit words: 0
[12:02:01.050] <TB3> INFO: invalid XOR eye diagram: 0
[12:02:01.050] <TB3> INFO: frame (failed synchr.): 0
[12:02:01.050] <TB3> INFO: idle data (no TBM trl): 0
[12:02:01.050] <TB3> INFO: no data (only TBM hdr): 0
[12:02:01.050] <TB3> INFO: TBM errors: 0
[12:02:01.050] <TB3> INFO: flawed TBM headers: 0
[12:02:01.050] <TB3> INFO: flawed TBM trailers: 0
[12:02:01.050] <TB3> INFO: event ID mismatches: 0
[12:02:01.050] <TB3> INFO: ROC errors: 0
[12:02:01.050] <TB3> INFO: missing ROC header(s): 0
[12:02:01.050] <TB3> INFO: misplaced readback start: 0
[12:02:01.050] <TB3> INFO: Pixel decoding errors: 0
[12:02:01.050] <TB3> INFO: pixel data incomplete: 0
[12:02:01.050] <TB3> INFO: pixel address: 0
[12:02:01.050] <TB3> INFO: pulse height fill bit: 0
[12:02:01.050] <TB3> INFO: buffer corruption: 0
[12:02:01.311] <TB3> INFO: ######################################################################
[12:02:01.311] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:02:01.311] <TB3> INFO: ######################################################################
[12:02:01.322] <TB3> INFO: scanning low vcal = 10
[12:02:01.594] <TB3> INFO: Expecting 41600 events.
[12:02:05.159] <TB3> INFO: 41600 events read in total (2974ms).
[12:02:05.159] <TB3> INFO: Test took 3837ms.
[12:02:05.161] <TB3> INFO: scanning low vcal = 20
[12:02:05.460] <TB3> INFO: Expecting 41600 events.
[12:02:09.029] <TB3> INFO: 41600 events read in total (2977ms).
[12:02:09.029] <TB3> INFO: Test took 3868ms.
[12:02:09.030] <TB3> INFO: scanning low vcal = 30
[12:02:09.330] <TB3> INFO: Expecting 41600 events.
[12:02:12.974] <TB3> INFO: 41600 events read in total (3052ms).
[12:02:12.975] <TB3> INFO: Test took 3944ms.
[12:02:12.977] <TB3> INFO: scanning low vcal = 40
[12:02:13.257] <TB3> INFO: Expecting 41600 events.
[12:02:17.196] <TB3> INFO: 41600 events read in total (3347ms).
[12:02:17.197] <TB3> INFO: Test took 4220ms.
[12:02:17.200] <TB3> INFO: scanning low vcal = 50
[12:02:17.491] <TB3> INFO: Expecting 41600 events.
[12:02:21.497] <TB3> INFO: 41600 events read in total (3415ms).
[12:02:21.498] <TB3> INFO: Test took 4298ms.
[12:02:21.501] <TB3> INFO: scanning low vcal = 60
[12:02:21.777] <TB3> INFO: Expecting 41600 events.
[12:02:25.738] <TB3> INFO: 41600 events read in total (3369ms).
[12:02:25.739] <TB3> INFO: Test took 4238ms.
[12:02:25.741] <TB3> INFO: scanning low vcal = 70
[12:02:26.041] <TB3> INFO: Expecting 41600 events.
[12:02:29.975] <TB3> INFO: 41600 events read in total (3343ms).
[12:02:29.976] <TB3> INFO: Test took 4235ms.
[12:02:29.979] <TB3> INFO: scanning low vcal = 80
[12:02:30.256] <TB3> INFO: Expecting 41600 events.
[12:02:34.187] <TB3> INFO: 41600 events read in total (3340ms).
[12:02:34.187] <TB3> INFO: Test took 4209ms.
[12:02:34.190] <TB3> INFO: scanning low vcal = 90
[12:02:34.467] <TB3> INFO: Expecting 41600 events.
[12:02:38.433] <TB3> INFO: 41600 events read in total (3375ms).
[12:02:38.433] <TB3> INFO: Test took 4243ms.
[12:02:38.436] <TB3> INFO: scanning low vcal = 100
[12:02:38.712] <TB3> INFO: Expecting 41600 events.
[12:02:42.649] <TB3> INFO: 41600 events read in total (3345ms).
[12:02:42.649] <TB3> INFO: Test took 4213ms.
[12:02:42.652] <TB3> INFO: scanning low vcal = 110
[12:02:42.929] <TB3> INFO: Expecting 41600 events.
[12:02:46.889] <TB3> INFO: 41600 events read in total (3369ms).
[12:02:46.890] <TB3> INFO: Test took 4238ms.
[12:02:46.892] <TB3> INFO: scanning low vcal = 120
[12:02:47.169] <TB3> INFO: Expecting 41600 events.
[12:02:51.154] <TB3> INFO: 41600 events read in total (3393ms).
[12:02:51.155] <TB3> INFO: Test took 4262ms.
[12:02:51.158] <TB3> INFO: scanning low vcal = 130
[12:02:51.452] <TB3> INFO: Expecting 41600 events.
[12:02:55.449] <TB3> INFO: 41600 events read in total (3405ms).
[12:02:55.450] <TB3> INFO: Test took 4291ms.
[12:02:55.452] <TB3> INFO: scanning low vcal = 140
[12:02:55.729] <TB3> INFO: Expecting 41600 events.
[12:02:59.661] <TB3> INFO: 41600 events read in total (3341ms).
[12:02:59.661] <TB3> INFO: Test took 4209ms.
[12:02:59.664] <TB3> INFO: scanning low vcal = 150
[12:02:59.952] <TB3> INFO: Expecting 41600 events.
[12:03:03.909] <TB3> INFO: 41600 events read in total (3366ms).
[12:03:03.910] <TB3> INFO: Test took 4246ms.
[12:03:03.913] <TB3> INFO: scanning low vcal = 160
[12:03:04.189] <TB3> INFO: Expecting 41600 events.
[12:03:08.173] <TB3> INFO: 41600 events read in total (3392ms).
[12:03:08.174] <TB3> INFO: Test took 4261ms.
[12:03:08.177] <TB3> INFO: scanning low vcal = 170
[12:03:08.498] <TB3> INFO: Expecting 41600 events.
[12:03:12.519] <TB3> INFO: 41600 events read in total (3430ms).
[12:03:12.520] <TB3> INFO: Test took 4343ms.
[12:03:12.523] <TB3> INFO: scanning low vcal = 180
[12:03:12.799] <TB3> INFO: Expecting 41600 events.
[12:03:16.768] <TB3> INFO: 41600 events read in total (3377ms).
[12:03:16.769] <TB3> INFO: Test took 4246ms.
[12:03:16.771] <TB3> INFO: scanning low vcal = 190
[12:03:17.048] <TB3> INFO: Expecting 41600 events.
[12:03:20.981] <TB3> INFO: 41600 events read in total (3341ms).
[12:03:20.982] <TB3> INFO: Test took 4210ms.
[12:03:20.984] <TB3> INFO: scanning low vcal = 200
[12:03:21.261] <TB3> INFO: Expecting 41600 events.
[12:03:25.258] <TB3> INFO: 41600 events read in total (3405ms).
[12:03:25.259] <TB3> INFO: Test took 4275ms.
[12:03:25.261] <TB3> INFO: scanning low vcal = 210
[12:03:25.538] <TB3> INFO: Expecting 41600 events.
[12:03:29.534] <TB3> INFO: 41600 events read in total (3404ms).
[12:03:29.535] <TB3> INFO: Test took 4274ms.
[12:03:29.537] <TB3> INFO: scanning low vcal = 220
[12:03:29.814] <TB3> INFO: Expecting 41600 events.
[12:03:33.889] <TB3> INFO: 41600 events read in total (3484ms).
[12:03:33.890] <TB3> INFO: Test took 4353ms.
[12:03:33.894] <TB3> INFO: scanning low vcal = 230
[12:03:34.204] <TB3> INFO: Expecting 41600 events.
[12:03:38.232] <TB3> INFO: 41600 events read in total (3436ms).
[12:03:38.233] <TB3> INFO: Test took 4339ms.
[12:03:38.235] <TB3> INFO: scanning low vcal = 240
[12:03:38.512] <TB3> INFO: Expecting 41600 events.
[12:03:42.549] <TB3> INFO: 41600 events read in total (3445ms).
[12:03:42.550] <TB3> INFO: Test took 4315ms.
[12:03:42.553] <TB3> INFO: scanning low vcal = 250
[12:03:42.864] <TB3> INFO: Expecting 41600 events.
[12:03:46.885] <TB3> INFO: 41600 events read in total (3430ms).
[12:03:46.885] <TB3> INFO: Test took 4332ms.
[12:03:46.889] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[12:03:47.200] <TB3> INFO: Expecting 41600 events.
[12:03:51.232] <TB3> INFO: 41600 events read in total (3440ms).
[12:03:51.233] <TB3> INFO: Test took 4344ms.
[12:03:51.236] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[12:03:51.546] <TB3> INFO: Expecting 41600 events.
[12:03:55.538] <TB3> INFO: 41600 events read in total (3400ms).
[12:03:55.539] <TB3> INFO: Test took 4303ms.
[12:03:55.542] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[12:03:55.819] <TB3> INFO: Expecting 41600 events.
[12:03:59.901] <TB3> INFO: 41600 events read in total (3491ms).
[12:03:59.902] <TB3> INFO: Test took 4360ms.
[12:03:59.905] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[12:04:00.182] <TB3> INFO: Expecting 41600 events.
[12:04:04.259] <TB3> INFO: 41600 events read in total (3485ms).
[12:04:04.260] <TB3> INFO: Test took 4355ms.
[12:04:04.263] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:04:04.573] <TB3> INFO: Expecting 41600 events.
[12:04:08.524] <TB3> INFO: 41600 events read in total (3359ms).
[12:04:08.525] <TB3> INFO: Test took 4262ms.
[12:04:08.903] <TB3> INFO: PixTestGainPedestal::measure() done
[12:04:42.051] <TB3> INFO: PixTestGainPedestal::fit() done
[12:04:42.051] <TB3> INFO: non-linearity mean: 0.970 0.997 0.971 0.996 0.952 0.909 0.974 0.968 0.978 0.899 0.931 0.971 0.911 0.948 0.932 0.945
[12:04:42.051] <TB3> INFO: non-linearity RMS: 0.004 0.189 0.005 0.169 0.169 0.116 0.005 0.005 0.003 0.110 0.070 0.005 0.111 0.037 0.079 0.028
[12:04:42.051] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:04:42.065] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:04:42.079] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:04:42.093] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:04:42.107] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:04:42.121] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:04:42.135] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:04:42.149] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:04:42.163] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:04:42.177] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:04:42.191] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:04:42.205] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:04:42.219] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:04:42.233] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:04:42.247] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:04:42.261] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1107_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:04:42.275] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[12:04:42.275] <TB3> INFO: Decoding statistics:
[12:04:42.275] <TB3> INFO: General information:
[12:04:42.275] <TB3> INFO: 16bit words read: 3327944
[12:04:42.275] <TB3> INFO: valid events total: 332800
[12:04:42.275] <TB3> INFO: empty events: 0
[12:04:42.275] <TB3> INFO: valid events with pixels: 332800
[12:04:42.275] <TB3> INFO: valid pixel hits: 665572
[12:04:42.275] <TB3> INFO: Event errors: 0
[12:04:42.275] <TB3> INFO: start marker: 0
[12:04:42.275] <TB3> INFO: stop marker: 0
[12:04:42.275] <TB3> INFO: overflow: 0
[12:04:42.275] <TB3> INFO: invalid 5bit words: 0
[12:04:42.275] <TB3> INFO: invalid XOR eye diagram: 0
[12:04:42.275] <TB3> INFO: frame (failed synchr.): 0
[12:04:42.275] <TB3> INFO: idle data (no TBM trl): 0
[12:04:42.275] <TB3> INFO: no data (only TBM hdr): 0
[12:04:42.275] <TB3> INFO: TBM errors: 0
[12:04:42.275] <TB3> INFO: flawed TBM headers: 0
[12:04:42.275] <TB3> INFO: flawed TBM trailers: 0
[12:04:42.275] <TB3> INFO: event ID mismatches: 0
[12:04:42.275] <TB3> INFO: ROC errors: 0
[12:04:42.275] <TB3> INFO: missing ROC header(s): 0
[12:04:42.275] <TB3> INFO: misplaced readback start: 0
[12:04:42.275] <TB3> INFO: Pixel decoding errors: 0
[12:04:42.275] <TB3> INFO: pixel data incomplete: 0
[12:04:42.275] <TB3> INFO: pixel address: 0
[12:04:42.275] <TB3> INFO: pulse height fill bit: 0
[12:04:42.275] <TB3> INFO: buffer corruption: 0
[12:04:42.291] <TB3> INFO: Decoding statistics:
[12:04:42.291] <TB3> INFO: General information:
[12:04:42.291] <TB3> INFO: 16bit words read: 3457368
[12:04:42.291] <TB3> INFO: valid events total: 353536
[12:04:42.291] <TB3> INFO: empty events: 18232
[12:04:42.291] <TB3> INFO: valid events with pixels: 335304
[12:04:42.291] <TB3> INFO: valid pixel hits: 668076
[12:04:42.291] <TB3> INFO: Event errors: 0
[12:04:42.291] <TB3> INFO: start marker: 0
[12:04:42.291] <TB3> INFO: stop marker: 0
[12:04:42.291] <TB3> INFO: overflow: 0
[12:04:42.291] <TB3> INFO: invalid 5bit words: 0
[12:04:42.291] <TB3> INFO: invalid XOR eye diagram: 0
[12:04:42.291] <TB3> INFO: frame (failed synchr.): 0
[12:04:42.291] <TB3> INFO: idle data (no TBM trl): 0
[12:04:42.291] <TB3> INFO: no data (only TBM hdr): 0
[12:04:42.291] <TB3> INFO: TBM errors: 0
[12:04:42.291] <TB3> INFO: flawed TBM headers: 0
[12:04:42.291] <TB3> INFO: flawed TBM trailers: 0
[12:04:42.291] <TB3> INFO: event ID mismatches: 0
[12:04:42.291] <TB3> INFO: ROC errors: 0
[12:04:42.291] <TB3> INFO: missing ROC header(s): 0
[12:04:42.291] <TB3> INFO: misplaced readback start: 0
[12:04:42.291] <TB3> INFO: Pixel decoding errors: 0
[12:04:42.291] <TB3> INFO: pixel data incomplete: 0
[12:04:42.291] <TB3> INFO: pixel address: 0
[12:04:42.291] <TB3> INFO: pulse height fill bit: 0
[12:04:42.292] <TB3> INFO: buffer corruption: 0
[12:04:42.292] <TB3> INFO: enter test to run
[12:04:42.292] <TB3> INFO: test: exit no parameter change
[12:04:42.352] <TB3> QUIET: Connection to board 170 closed.
[12:04:42.353] <TB3> INFO: pXar: this is the end, my friend