[10:40:12.511] <TB0> INFO: *** Welcome to pxar ***
[10:40:12.511] <TB0> INFO: *** Today: 2016/11/02
[10:40:12.517] <TB0> INFO: *** Version: c8ba-dirty
[10:40:12.517] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C15.dat
[10:40:12.518] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1b.dat
[10:40:12.518] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//defaultMaskFile.dat
[10:40:12.518] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters_C15.dat
[10:40:12.571] <TB0> INFO: clk: 4
[10:40:12.571] <TB0> INFO: ctr: 4
[10:40:12.571] <TB0> INFO: sda: 19
[10:40:12.571] <TB0> INFO: tin: 9
[10:40:12.571] <TB0> INFO: level: 15
[10:40:12.571] <TB0> INFO: triggerdelay: 0
[10:40:12.571] <TB0> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[10:40:12.572] <TB0> INFO: Log level: INFO
[10:40:12.580] <TB0> INFO: Found DTB DTB_WS6AYH
[10:40:12.587] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[10:40:12.589] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
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[10:40:12.591] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[10:40:14.073] <TB0> INFO: DUT info:
[10:40:14.073] <TB0> INFO: The DUT currently contains the following objects:
[10:40:14.073] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[10:40:14.073] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:40:14.073] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:40:14.073] <TB0> INFO: TBM Core alpha (2): 7 registers set
[10:40:14.073] <TB0> INFO: TBM Core beta (3): 7 registers set
[10:40:14.073] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:40:14.073] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.073] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.074] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.074] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:40:14.474] <TB0> INFO: enter 'restricted' command line mode
[10:40:14.474] <TB0> INFO: enter test to run
[10:40:14.474] <TB0> INFO: test: pretest no parameter change
[10:40:14.474] <TB0> INFO: running: pretest
[10:40:15.005] <TB0> INFO: ######################################################################
[10:40:15.005] <TB0> INFO: PixTestPretest::doTest()
[10:40:15.005] <TB0> INFO: ######################################################################
[10:40:15.006] <TB0> INFO: ----------------------------------------------------------------------
[10:40:15.006] <TB0> INFO: PixTestPretest::programROC()
[10:40:15.006] <TB0> INFO: ----------------------------------------------------------------------
[10:40:33.019] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:40:33.019] <TB0> INFO: IA differences per ROC: 19.3 19.3 20.1 19.3 20.1 19.3 17.7 18.5 21.7 18.5 20.1 21.7 20.1 20.1 19.3 19.3
[10:40:33.053] <TB0> INFO: ----------------------------------------------------------------------
[10:40:33.053] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:40:33.053] <TB0> INFO: ----------------------------------------------------------------------
[10:40:39.224] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[10:40:39.224] <TB0> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 20.1 19.3 20.1 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3
[10:40:39.251] <TB0> INFO: ----------------------------------------------------------------------
[10:40:39.251] <TB0> INFO: PixTestPretest::findTiming()
[10:40:39.251] <TB0> INFO: ----------------------------------------------------------------------
[10:40:39.251] <TB0> INFO: PixTestCmd::init()

[10:41:10.352] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:41:10.352] <TB0> INFO: (success/tries = 100/100), width = 4
[10:41:11.857] <TB0> INFO: ----------------------------------------------------------------------
[10:41:11.857] <TB0> INFO: PixTestPretest::findWorkingPixel()
[10:41:11.857] <TB0> INFO: ----------------------------------------------------------------------
[10:41:11.949] <TB0> INFO: Expecting 231680 events.
[10:41:21.624] <TB0> INFO: 231680 events read in total (9083ms).
[10:41:21.631] <TB0> INFO: Test took 9771ms.
[10:41:21.876] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:41:21.909] <TB0> INFO: ----------------------------------------------------------------------
[10:41:21.909] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[10:41:21.909] <TB0> INFO: ----------------------------------------------------------------------
[10:41:21.002] <TB0> INFO: Expecting 231680 events.
[10:41:31.631] <TB0> INFO: 231680 events read in total (9038ms).
[10:41:31.638] <TB0> INFO: Test took 9725ms.
[10:41:31.898] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[10:41:31.898] <TB0> INFO: CalDel: 101 103 93 89 111 114 97 109 99 104 95 108 102 94 96 93
[10:41:31.898] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:41:31.900] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C0.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C1.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C2.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C3.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C4.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C5.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C6.dat
[10:41:31.901] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C7.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C8.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C9.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C10.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C11.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C12.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C13.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C14.dat
[10:41:31.902] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters_C15.dat
[10:41:31.902] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0a.dat
[10:41:31.902] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C0b.dat
[10:41:31.903] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1a.dat
[10:41:31.903] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//tbmParameters_C1b.dat
[10:41:31.903] <TB0> INFO: PixTestPretest::doTest() done, duration: 77 seconds
[10:41:31.999] <TB0> INFO: enter test to run
[10:41:31.999] <TB0> INFO: test: FullTest no parameter change
[10:41:31.999] <TB0> INFO: running: fulltest
[10:41:31.999] <TB0> INFO: ######################################################################
[10:41:31.999] <TB0> INFO: PixTestFullTest::doTest()
[10:41:31.999] <TB0> INFO: ######################################################################
[10:41:31.000] <TB0> INFO: ######################################################################
[10:41:31.000] <TB0> INFO: PixTestAlive::doTest()
[10:41:31.000] <TB0> INFO: ######################################################################
[10:41:31.001] <TB0> INFO: ----------------------------------------------------------------------
[10:41:31.001] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:41:31.001] <TB0> INFO: ----------------------------------------------------------------------
[10:41:32.240] <TB0> INFO: Expecting 41600 events.
[10:41:35.825] <TB0> INFO: 41600 events read in total (2994ms).
[10:41:35.826] <TB0> INFO: Test took 3823ms.
[10:41:36.053] <TB0> INFO: PixTestAlive::aliveTest() done
[10:41:36.053] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:41:36.054] <TB0> INFO: ----------------------------------------------------------------------
[10:41:36.054] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:41:36.054] <TB0> INFO: ----------------------------------------------------------------------
[10:41:36.287] <TB0> INFO: Expecting 41600 events.
[10:41:39.207] <TB0> INFO: 41600 events read in total (2329ms).
[10:41:39.208] <TB0> INFO: Test took 3153ms.
[10:41:39.208] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:41:39.449] <TB0> INFO: PixTestAlive::maskTest() done
[10:41:39.449] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:41:39.451] <TB0> INFO: ----------------------------------------------------------------------
[10:41:39.451] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:41:39.451] <TB0> INFO: ----------------------------------------------------------------------
[10:41:39.683] <TB0> INFO: Expecting 41600 events.
[10:41:43.089] <TB0> INFO: 41600 events read in total (2814ms).
[10:41:43.090] <TB0> INFO: Test took 3638ms.
[10:41:43.318] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[10:41:43.318] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:41:43.318] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:41:43.318] <TB0> INFO: Decoding statistics:
[10:41:43.318] <TB0> INFO: General information:
[10:41:43.318] <TB0> INFO: 16bit words read: 0
[10:41:43.318] <TB0> INFO: valid events total: 0
[10:41:43.318] <TB0> INFO: empty events: 0
[10:41:43.318] <TB0> INFO: valid events with pixels: 0
[10:41:43.318] <TB0> INFO: valid pixel hits: 0
[10:41:43.318] <TB0> INFO: Event errors: 0
[10:41:43.318] <TB0> INFO: start marker: 0
[10:41:43.318] <TB0> INFO: stop marker: 0
[10:41:43.318] <TB0> INFO: overflow: 0
[10:41:43.318] <TB0> INFO: invalid 5bit words: 0
[10:41:43.318] <TB0> INFO: invalid XOR eye diagram: 0
[10:41:43.318] <TB0> INFO: frame (failed synchr.): 0
[10:41:43.318] <TB0> INFO: idle data (no TBM trl): 0
[10:41:43.319] <TB0> INFO: no data (only TBM hdr): 0
[10:41:43.319] <TB0> INFO: TBM errors: 0
[10:41:43.319] <TB0> INFO: flawed TBM headers: 0
[10:41:43.319] <TB0> INFO: flawed TBM trailers: 0
[10:41:43.319] <TB0> INFO: event ID mismatches: 0
[10:41:43.319] <TB0> INFO: ROC errors: 0
[10:41:43.319] <TB0> INFO: missing ROC header(s): 0
[10:41:43.319] <TB0> INFO: misplaced readback start: 0
[10:41:43.319] <TB0> INFO: Pixel decoding errors: 0
[10:41:43.319] <TB0> INFO: pixel data incomplete: 0
[10:41:43.319] <TB0> INFO: pixel address: 0
[10:41:43.319] <TB0> INFO: pulse height fill bit: 0
[10:41:43.319] <TB0> INFO: buffer corruption: 0
[10:41:43.326] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:41:43.326] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:41:43.326] <TB0> INFO: ######################################################################
[10:41:43.326] <TB0> INFO: PixTestReadback::doTest()
[10:41:43.326] <TB0> INFO: ######################################################################
[10:41:43.326] <TB0> INFO: ----------------------------------------------------------------------
[10:41:43.326] <TB0> INFO: PixTestReadback::CalibrateVd()
[10:41:43.326] <TB0> INFO: ----------------------------------------------------------------------
[10:41:53.283] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:41:53.284] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:41:53.310] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:41:53.310] <TB0> INFO: ----------------------------------------------------------------------
[10:41:53.310] <TB0> INFO: PixTestReadback::CalibrateVa()
[10:41:53.310] <TB0> INFO: ----------------------------------------------------------------------
[10:42:03.206] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:42:03.206] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:42:03.206] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:42:03.206] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:42:03.207] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:42:03.208] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:42:03.235] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:42:03.235] <TB0> INFO: ----------------------------------------------------------------------
[10:42:03.235] <TB0> INFO: PixTestReadback::readbackVbg()
[10:42:03.235] <TB0> INFO: ----------------------------------------------------------------------
[10:42:10.880] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:42:10.880] <TB0> INFO: ----------------------------------------------------------------------
[10:42:10.880] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[10:42:10.880] <TB0> INFO: ----------------------------------------------------------------------
[10:42:10.880] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:42:10.880] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 161.8calibrated Vbg = 1.18002 :::*/*/*/*/
[10:42:10.880] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 159.7calibrated Vbg = 1.17306 :::*/*/*/*/
[10:42:10.880] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.1calibrated Vbg = 1.16811 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 168.2calibrated Vbg = 1.17475 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153.3calibrated Vbg = 1.17668 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.3calibrated Vbg = 1.17737 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 159.1calibrated Vbg = 1.1758 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.6calibrated Vbg = 1.18102 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 144calibrated Vbg = 1.1728 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.3calibrated Vbg = 1.1725 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.6calibrated Vbg = 1.16147 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 162.2calibrated Vbg = 1.16419 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.7calibrated Vbg = 1.16982 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 163.4calibrated Vbg = 1.17678 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 153.7calibrated Vbg = 1.17701 :::*/*/*/*/
[10:42:10.881] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 153.7calibrated Vbg = 1.17646 :::*/*/*/*/
[10:42:10.882] <TB0> INFO: ----------------------------------------------------------------------
[10:42:10.882] <TB0> INFO: PixTestReadback::CalibrateIa()
[10:42:10.883] <TB0> INFO: ----------------------------------------------------------------------
[10:44:51.183] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C0.dat
[10:44:51.183] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C1.dat
[10:44:51.183] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C2.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C3.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C4.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C5.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C6.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C7.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C8.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C9.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C10.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C11.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C12.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C13.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C14.dat
[10:44:51.184] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//readbackCal_C15.dat
[10:44:51.213] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:44:51.214] <TB0> INFO: PixTestReadback::doTest() done
[10:44:51.214] <TB0> INFO: Decoding statistics:
[10:44:51.215] <TB0> INFO: General information:
[10:44:51.215] <TB0> INFO: 16bit words read: 1536
[10:44:51.215] <TB0> INFO: valid events total: 256
[10:44:51.215] <TB0> INFO: empty events: 256
[10:44:51.215] <TB0> INFO: valid events with pixels: 0
[10:44:51.215] <TB0> INFO: valid pixel hits: 0
[10:44:51.215] <TB0> INFO: Event errors: 0
[10:44:51.215] <TB0> INFO: start marker: 0
[10:44:51.215] <TB0> INFO: stop marker: 0
[10:44:51.215] <TB0> INFO: overflow: 0
[10:44:51.215] <TB0> INFO: invalid 5bit words: 0
[10:44:51.215] <TB0> INFO: invalid XOR eye diagram: 0
[10:44:51.215] <TB0> INFO: frame (failed synchr.): 0
[10:44:51.215] <TB0> INFO: idle data (no TBM trl): 0
[10:44:51.215] <TB0> INFO: no data (only TBM hdr): 0
[10:44:51.215] <TB0> INFO: TBM errors: 0
[10:44:51.215] <TB0> INFO: flawed TBM headers: 0
[10:44:51.215] <TB0> INFO: flawed TBM trailers: 0
[10:44:51.215] <TB0> INFO: event ID mismatches: 0
[10:44:51.215] <TB0> INFO: ROC errors: 0
[10:44:51.215] <TB0> INFO: missing ROC header(s): 0
[10:44:51.215] <TB0> INFO: misplaced readback start: 0
[10:44:51.215] <TB0> INFO: Pixel decoding errors: 0
[10:44:51.215] <TB0> INFO: pixel data incomplete: 0
[10:44:51.215] <TB0> INFO: pixel address: 0
[10:44:51.215] <TB0> INFO: pulse height fill bit: 0
[10:44:51.215] <TB0> INFO: buffer corruption: 0
[10:44:51.250] <TB0> INFO: ######################################################################
[10:44:51.250] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:44:51.250] <TB0> INFO: ######################################################################
[10:44:51.252] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:44:51.263] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:44:51.263] <TB0> INFO: run 1 of 1
[10:44:51.495] <TB0> INFO: Expecting 3120000 events.
[10:45:21.748] <TB0> INFO: 667550 events read in total (29662ms).





















[10:45:50.001] <TB0> INFO: 1331460 events read in total (58915ms).











[10:46:20.598] <TB0> INFO: 1993175 events read in total (88512ms).











[10:46:50.534] <TB0> INFO: 2655480 events read in total (118448ms).











[10:47:11.174] <TB0> INFO: 3120000 events read in total (139088ms).
[10:47:11.250] <TB0> INFO: Test took 139988ms.
[10:47:37.210] <TB0> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 165 seconds
[10:47:37.210] <TB0> INFO: number of dead bumps (per ROC): 0 0 2 0 0 1 0 1 0 0 0 0 0 0 1 0
[10:47:37.210] <TB0> INFO: separation cut (per ROC): 104 107 105 106 108 117 103 100 102 103 110 109 108 106 108 110
[10:47:37.210] <TB0> INFO: Decoding statistics:
[10:47:37.210] <TB0> INFO: General information:
[10:47:37.210] <TB0> INFO: 16bit words read: 0
[10:47:37.210] <TB0> INFO: valid events total: 0
[10:47:37.210] <TB0> INFO: empty events: 0
[10:47:37.210] <TB0> INFO: valid events with pixels: 0
[10:47:37.210] <TB0> INFO: valid pixel hits: 0
[10:47:37.210] <TB0> INFO: Event errors: 0
[10:47:37.210] <TB0> INFO: start marker: 0
[10:47:37.210] <TB0> INFO: stop marker: 0
[10:47:37.210] <TB0> INFO: overflow: 0
[10:47:37.210] <TB0> INFO: invalid 5bit words: 0
[10:47:37.210] <TB0> INFO: invalid XOR eye diagram: 0
[10:47:37.210] <TB0> INFO: frame (failed synchr.): 0
[10:47:37.210] <TB0> INFO: idle data (no TBM trl): 0
[10:47:37.210] <TB0> INFO: no data (only TBM hdr): 0
[10:47:37.210] <TB0> INFO: TBM errors: 0
[10:47:37.210] <TB0> INFO: flawed TBM headers: 0
[10:47:37.210] <TB0> INFO: flawed TBM trailers: 0
[10:47:37.210] <TB0> INFO: event ID mismatches: 0
[10:47:37.210] <TB0> INFO: ROC errors: 0
[10:47:37.210] <TB0> INFO: missing ROC header(s): 0
[10:47:37.210] <TB0> INFO: misplaced readback start: 0
[10:47:37.210] <TB0> INFO: Pixel decoding errors: 0
[10:47:37.210] <TB0> INFO: pixel data incomplete: 0
[10:47:37.210] <TB0> INFO: pixel address: 0
[10:47:37.210] <TB0> INFO: pulse height fill bit: 0
[10:47:37.210] <TB0> INFO: buffer corruption: 0
[10:47:37.245] <TB0> INFO: ######################################################################
[10:47:37.245] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:47:37.245] <TB0> INFO: ######################################################################
[10:47:37.245] <TB0> INFO: ----------------------------------------------------------------------
[10:47:37.245] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:47:37.245] <TB0> INFO: ----------------------------------------------------------------------
[10:47:37.245] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:47:37.254] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[10:47:37.255] <TB0> INFO: run 1 of 1
[10:47:37.496] <TB0> INFO: Expecting 36608000 events.
[10:48:00.610] <TB0> INFO: 670500 events read in total (22522ms).
[10:48:22.749] <TB0> INFO: 1328550 events read in total (44661ms).
[10:48:45.113] <TB0> INFO: 1986050 events read in total (67025ms).
[10:49:07.138] <TB0> INFO: 2642500 events read in total (89050ms).
[10:49:29.408] <TB0> INFO: 3299950 events read in total (111320ms).
[10:49:51.756] <TB0> INFO: 3956850 events read in total (133668ms).
[10:50:14.051] <TB0> INFO: 4614800 events read in total (155963ms).
[10:50:36.236] <TB0> INFO: 5272650 events read in total (178148ms).
[10:50:58.469] <TB0> INFO: 5930650 events read in total (200381ms).
[10:51:20.747] <TB0> INFO: 6587800 events read in total (222659ms).
[10:51:42.883] <TB0> INFO: 7245400 events read in total (244795ms).
[10:52:04.972] <TB0> INFO: 7902450 events read in total (266884ms).
[10:52:27.199] <TB0> INFO: 8560350 events read in total (289111ms).
[10:52:49.458] <TB0> INFO: 9214300 events read in total (311370ms).
[10:53:11.684] <TB0> INFO: 9870050 events read in total (333596ms).
[10:53:33.952] <TB0> INFO: 10524800 events read in total (355864ms).
[10:53:56.104] <TB0> INFO: 11182000 events read in total (378016ms).
[10:54:18.351] <TB0> INFO: 11835200 events read in total (400263ms).
[10:54:40.322] <TB0> INFO: 12489100 events read in total (422234ms).
[10:55:02.661] <TB0> INFO: 13143100 events read in total (444573ms).
[10:55:24.790] <TB0> INFO: 13796900 events read in total (466702ms).
[10:55:46.928] <TB0> INFO: 14449450 events read in total (488840ms).
[10:56:09.007] <TB0> INFO: 15105000 events read in total (510919ms).
[10:56:31.196] <TB0> INFO: 15759050 events read in total (533108ms).
[10:56:53.238] <TB0> INFO: 16412700 events read in total (555150ms).
[10:57:15.663] <TB0> INFO: 17067700 events read in total (577575ms).
[10:57:37.978] <TB0> INFO: 17720650 events read in total (599890ms).
[10:57:59.876] <TB0> INFO: 18373900 events read in total (621788ms).
[10:58:21.882] <TB0> INFO: 19026400 events read in total (643794ms).
[10:58:44.148] <TB0> INFO: 19680250 events read in total (666060ms).
[10:59:05.002] <TB0> INFO: 20329800 events read in total (687914ms).
[10:59:28.224] <TB0> INFO: 20980000 events read in total (710136ms).
[10:59:50.007] <TB0> INFO: 21630300 events read in total (731919ms).
[11:00:12.096] <TB0> INFO: 22282050 events read in total (754008ms).
[11:00:34.019] <TB0> INFO: 22932650 events read in total (775931ms).
[11:00:56.365] <TB0> INFO: 23583800 events read in total (798277ms).
[11:01:18.405] <TB0> INFO: 24233250 events read in total (820317ms).
[11:01:40.254] <TB0> INFO: 24882600 events read in total (842166ms).
[11:02:02.278] <TB0> INFO: 25532000 events read in total (864190ms).
[11:02:24.312] <TB0> INFO: 26182900 events read in total (886224ms).
[11:02:46.491] <TB0> INFO: 26832500 events read in total (908403ms).
[11:03:08.597] <TB0> INFO: 27481800 events read in total (930509ms).
[11:03:30.613] <TB0> INFO: 28131950 events read in total (952525ms).
[11:03:52.882] <TB0> INFO: 28780300 events read in total (974794ms).
[11:04:14.942] <TB0> INFO: 29429750 events read in total (996854ms).
[11:04:36.882] <TB0> INFO: 30076800 events read in total (1018794ms).
[11:04:58.825] <TB0> INFO: 30725550 events read in total (1040737ms).
[11:05:21.010] <TB0> INFO: 31373250 events read in total (1062922ms).
[11:05:42.985] <TB0> INFO: 32022650 events read in total (1084897ms).
[11:06:05.153] <TB0> INFO: 32672050 events read in total (1107065ms).
[11:06:27.021] <TB0> INFO: 33321400 events read in total (1128933ms).
[11:06:49.177] <TB0> INFO: 33972250 events read in total (1151089ms).
[11:07:11.409] <TB0> INFO: 34622350 events read in total (1173321ms).
[11:07:33.296] <TB0> INFO: 35274000 events read in total (1195208ms).
[11:07:55.427] <TB0> INFO: 35924350 events read in total (1217339ms).
[11:08:17.770] <TB0> INFO: 36587050 events read in total (1239682ms).
[11:08:18.935] <TB0> INFO: 36608000 events read in total (1240847ms).
[11:08:18.994] <TB0> INFO: Test took 1241739ms.
[11:08:19.386] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:21.380] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:23.395] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:25.452] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:27.505] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:29.256] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:31.392] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:33.088] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:35.083] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:36.784] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:38.391] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:40.198] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:42.136] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:43.748] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:45.752] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:47.739] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:08:49.784] <TB0> INFO: PixTestScurves::scurves() done
[11:08:49.784] <TB0> INFO: Vcal mean: 114.94 117.39 114.48 115.29 123.94 127.00 111.26 110.03 103.29 109.14 118.56 115.77 115.06 113.34 113.38 115.59
[11:08:49.784] <TB0> INFO: Vcal RMS: 5.75 5.36 5.71 5.12 6.55 6.00 5.14 5.49 4.94 4.84 6.11 5.96 5.08 4.58 5.26 5.46
[11:08:49.784] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1272 seconds
[11:08:49.784] <TB0> INFO: Decoding statistics:
[11:08:49.784] <TB0> INFO: General information:
[11:08:49.784] <TB0> INFO: 16bit words read: 0
[11:08:49.784] <TB0> INFO: valid events total: 0
[11:08:49.784] <TB0> INFO: empty events: 0
[11:08:49.784] <TB0> INFO: valid events with pixels: 0
[11:08:49.784] <TB0> INFO: valid pixel hits: 0
[11:08:49.784] <TB0> INFO: Event errors: 0
[11:08:49.784] <TB0> INFO: start marker: 0
[11:08:49.784] <TB0> INFO: stop marker: 0
[11:08:49.784] <TB0> INFO: overflow: 0
[11:08:49.784] <TB0> INFO: invalid 5bit words: 0
[11:08:49.784] <TB0> INFO: invalid XOR eye diagram: 0
[11:08:49.784] <TB0> INFO: frame (failed synchr.): 0
[11:08:49.784] <TB0> INFO: idle data (no TBM trl): 0
[11:08:49.784] <TB0> INFO: no data (only TBM hdr): 0
[11:08:49.784] <TB0> INFO: TBM errors: 0
[11:08:49.784] <TB0> INFO: flawed TBM headers: 0
[11:08:49.784] <TB0> INFO: flawed TBM trailers: 0
[11:08:49.784] <TB0> INFO: event ID mismatches: 0
[11:08:49.784] <TB0> INFO: ROC errors: 0
[11:08:49.784] <TB0> INFO: missing ROC header(s): 0
[11:08:49.784] <TB0> INFO: misplaced readback start: 0
[11:08:49.784] <TB0> INFO: Pixel decoding errors: 0
[11:08:49.785] <TB0> INFO: pixel data incomplete: 0
[11:08:49.785] <TB0> INFO: pixel address: 0
[11:08:49.785] <TB0> INFO: pulse height fill bit: 0
[11:08:49.785] <TB0> INFO: buffer corruption: 0
[11:08:49.871] <TB0> INFO: ######################################################################
[11:08:49.871] <TB0> INFO: PixTestTrim::doTest()
[11:08:49.871] <TB0> INFO: ######################################################################
[11:08:49.872] <TB0> INFO: ----------------------------------------------------------------------
[11:08:49.872] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:08:49.872] <TB0> INFO: ----------------------------------------------------------------------
[11:08:49.914] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:08:49.914] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:08:49.923] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:08:49.923] <TB0> INFO: run 1 of 1
[11:08:50.157] <TB0> INFO: Expecting 5025280 events.
[11:09:20.632] <TB0> INFO: 819440 events read in total (29880ms).
[11:09:50.107] <TB0> INFO: 1636136 events read in total (59355ms).
[11:10:19.194] <TB0> INFO: 2449776 events read in total (88442ms).
[11:10:48.534] <TB0> INFO: 3262176 events read in total (117782ms).
[11:11:18.053] <TB0> INFO: 4070496 events read in total (147301ms).
[11:11:47.640] <TB0> INFO: 4877168 events read in total (176888ms).
[11:11:53.232] <TB0> INFO: 5025280 events read in total (182480ms).
[11:11:53.289] <TB0> INFO: Test took 183366ms.
[11:12:13.917] <TB0> INFO: ROC 0 VthrComp = 118
[11:12:13.917] <TB0> INFO: ROC 1 VthrComp = 128
[11:12:13.917] <TB0> INFO: ROC 2 VthrComp = 118
[11:12:13.917] <TB0> INFO: ROC 3 VthrComp = 124
[11:12:13.917] <TB0> INFO: ROC 4 VthrComp = 129
[11:12:13.917] <TB0> INFO: ROC 5 VthrComp = 134
[11:12:13.918] <TB0> INFO: ROC 6 VthrComp = 120
[11:12:13.918] <TB0> INFO: ROC 7 VthrComp = 108
[11:12:13.918] <TB0> INFO: ROC 8 VthrComp = 110
[11:12:13.918] <TB0> INFO: ROC 9 VthrComp = 115
[11:12:13.918] <TB0> INFO: ROC 10 VthrComp = 124
[11:12:13.918] <TB0> INFO: ROC 11 VthrComp = 117
[11:12:13.918] <TB0> INFO: ROC 12 VthrComp = 126
[11:12:13.918] <TB0> INFO: ROC 13 VthrComp = 125
[11:12:13.918] <TB0> INFO: ROC 14 VthrComp = 120
[11:12:13.919] <TB0> INFO: ROC 15 VthrComp = 120
[11:12:14.153] <TB0> INFO: Expecting 41600 events.
[11:12:17.596] <TB0> INFO: 41600 events read in total (2852ms).
[11:12:17.596] <TB0> INFO: Test took 3676ms.
[11:12:17.609] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:12:17.609] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:12:17.621] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:12:17.621] <TB0> INFO: run 1 of 1
[11:12:17.899] <TB0> INFO: Expecting 5025280 events.
[11:12:44.590] <TB0> INFO: 585584 events read in total (26100ms).
[11:13:09.591] <TB0> INFO: 1170848 events read in total (51101ms).
[11:13:34.874] <TB0> INFO: 1756800 events read in total (76384ms).
[11:14:00.161] <TB0> INFO: 2341832 events read in total (101671ms).
[11:14:25.553] <TB0> INFO: 2926696 events read in total (127063ms).
[11:14:50.804] <TB0> INFO: 3511136 events read in total (152314ms).
[11:15:15.907] <TB0> INFO: 4095280 events read in total (177417ms).
[11:15:41.184] <TB0> INFO: 4679168 events read in total (202694ms).
[11:15:56.413] <TB0> INFO: 5025280 events read in total (217923ms).
[11:15:56.474] <TB0> INFO: Test took 218853ms.
[11:16:24.955] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.9662 for pixel 0/43 mean/min/max = 45.8979/30.7885/61.0072
[11:16:24.956] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 57.9357 for pixel 23/77 mean/min/max = 45.0663/32.0769/58.0557
[11:16:24.956] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 62.264 for pixel 17/1 mean/min/max = 46.511/30.6646/62.3573
[11:16:24.956] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 58.0409 for pixel 36/60 mean/min/max = 45.3574/32.6416/58.0732
[11:16:24.957] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.4403 for pixel 0/14 mean/min/max = 46.0907/30.5545/61.627
[11:16:24.957] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.6311 for pixel 29/5 mean/min/max = 45.397/32.1429/58.6511
[11:16:24.957] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 59.1132 for pixel 17/9 mean/min/max = 45.5733/31.7602/59.3864
[11:16:24.958] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 66.1367 for pixel 9/5 mean/min/max = 49.9667/33.7251/66.2084
[11:16:24.958] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 59.2143 for pixel 0/0 mean/min/max = 47.0009/34.7383/59.2635
[11:16:24.958] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 58.222 for pixel 0/16 mean/min/max = 45.3983/32.47/58.3265
[11:16:24.958] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.8446 for pixel 0/1 mean/min/max = 46.8307/32.7644/60.8969
[11:16:24.959] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 61.1241 for pixel 0/12 mean/min/max = 46.5327/31.8293/61.236
[11:16:24.959] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 56.318 for pixel 38/75 mean/min/max = 43.725/30.7349/56.7151
[11:16:24.959] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 56.2539 for pixel 48/13 mean/min/max = 44.033/31.5742/56.4919
[11:16:24.960] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.497 for pixel 0/52 mean/min/max = 45.2063/31.7626/58.65
[11:16:24.960] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 60.4311 for pixel 51/4 mean/min/max = 45.8762/31.257/60.4953
[11:16:24.960] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:16:25.055] <TB0> INFO: Expecting 411648 events.
[11:16:34.490] <TB0> INFO: 411648 events read in total (8843ms).
[11:16:34.498] <TB0> INFO: Expecting 411648 events.
[11:16:43.967] <TB0> INFO: 411648 events read in total (9066ms).
[11:16:43.980] <TB0> INFO: Expecting 411648 events.
[11:16:53.295] <TB0> INFO: 411648 events read in total (8912ms).
[11:16:53.310] <TB0> INFO: Expecting 411648 events.
[11:17:02.505] <TB0> INFO: 411648 events read in total (8792ms).
[11:17:02.524] <TB0> INFO: Expecting 411648 events.
[11:17:11.535] <TB0> INFO: 411648 events read in total (8608ms).
[11:17:11.551] <TB0> INFO: Expecting 411648 events.
[11:17:20.517] <TB0> INFO: 411648 events read in total (8563ms).
[11:17:20.537] <TB0> INFO: Expecting 411648 events.
[11:17:29.588] <TB0> INFO: 411648 events read in total (8649ms).
[11:17:29.617] <TB0> INFO: Expecting 411648 events.
[11:17:38.600] <TB0> INFO: 411648 events read in total (8580ms).
[11:17:38.624] <TB0> INFO: Expecting 411648 events.
[11:17:47.593] <TB0> INFO: 411648 events read in total (8566ms).
[11:17:47.629] <TB0> INFO: Expecting 411648 events.
[11:17:56.687] <TB0> INFO: 411648 events read in total (8655ms).
[11:17:56.716] <TB0> INFO: Expecting 411648 events.
[11:18:05.735] <TB0> INFO: 411648 events read in total (8616ms).
[11:18:05.772] <TB0> INFO: Expecting 411648 events.
[11:18:14.716] <TB0> INFO: 411648 events read in total (8541ms).
[11:18:14.751] <TB0> INFO: Expecting 411648 events.
[11:18:23.854] <TB0> INFO: 411648 events read in total (8700ms).
[11:18:23.909] <TB0> INFO: Expecting 411648 events.
[11:18:32.957] <TB0> INFO: 411648 events read in total (8645ms).
[11:18:32.998] <TB0> INFO: Expecting 411648 events.
[11:18:42.011] <TB0> INFO: 411648 events read in total (8610ms).
[11:18:42.056] <TB0> INFO: Expecting 411648 events.
[11:18:51.048] <TB0> INFO: 411648 events read in total (8589ms).
[11:18:51.094] <TB0> INFO: Test took 146134ms.
[11:18:51.841] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:18:51.850] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:18:51.850] <TB0> INFO: run 1 of 1
[11:18:52.124] <TB0> INFO: Expecting 5025280 events.
[11:19:17.666] <TB0> INFO: 584224 events read in total (24950ms).
[11:19:42.842] <TB0> INFO: 1169432 events read in total (50126ms).
[11:20:08.208] <TB0> INFO: 1754304 events read in total (75492ms).
[11:20:33.293] <TB0> INFO: 2337920 events read in total (100577ms).
[11:20:58.661] <TB0> INFO: 2923384 events read in total (125945ms).
[11:21:23.980] <TB0> INFO: 3509696 events read in total (151264ms).
[11:21:49.492] <TB0> INFO: 4093648 events read in total (176776ms).
[11:22:15.135] <TB0> INFO: 4677152 events read in total (202420ms).
[11:22:30.408] <TB0> INFO: 5025280 events read in total (217692ms).
[11:22:30.522] <TB0> INFO: Test took 218673ms.
[11:22:54.944] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 145.198544
[11:22:55.208] <TB0> INFO: Expecting 208000 events.
[11:23:04.681] <TB0> INFO: 208000 events read in total (8881ms).
[11:23:04.682] <TB0> INFO: Test took 9737ms.
[11:23:04.729] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 155 (-1/-1) hits flags = 528 (plus default)
[11:23:04.740] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:23:04.740] <TB0> INFO: run 1 of 1
[11:23:05.018] <TB0> INFO: Expecting 5125120 events.
[11:23:31.008] <TB0> INFO: 582600 events read in total (25398ms).
[11:23:56.195] <TB0> INFO: 1165112 events read in total (50585ms).
[11:24:21.236] <TB0> INFO: 1747640 events read in total (75626ms).
[11:24:46.908] <TB0> INFO: 2330200 events read in total (101298ms).
[11:25:12.302] <TB0> INFO: 2912920 events read in total (126692ms).
[11:25:37.691] <TB0> INFO: 3495240 events read in total (152081ms).
[11:26:02.932] <TB0> INFO: 4077504 events read in total (177322ms).
[11:26:27.837] <TB0> INFO: 4659208 events read in total (202227ms).
[11:26:47.831] <TB0> INFO: 5125120 events read in total (222222ms).
[11:26:47.899] <TB0> INFO: Test took 223159ms.
[11:27:14.955] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.826614 .. 43.655041
[11:27:15.188] <TB0> INFO: Expecting 208000 events.
[11:27:24.976] <TB0> INFO: 208000 events read in total (9196ms).
[11:27:24.977] <TB0> INFO: Test took 10021ms.
[11:27:25.024] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 53 (-1/-1) hits flags = 528 (plus default)
[11:27:25.034] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:27:25.034] <TB0> INFO: run 1 of 1
[11:27:25.312] <TB0> INFO: Expecting 1264640 events.
[11:27:53.709] <TB0> INFO: 669512 events read in total (27804ms).
[11:28:18.058] <TB0> INFO: 1264640 events read in total (52153ms).
[11:28:18.090] <TB0> INFO: Test took 53056ms.
[11:28:32.320] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 24.208992 .. 47.624993
[11:28:32.555] <TB0> INFO: Expecting 208000 events.
[11:28:42.169] <TB0> INFO: 208000 events read in total (9022ms).
[11:28:42.170] <TB0> INFO: Test took 9849ms.
[11:28:42.218] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 57 (-1/-1) hits flags = 528 (plus default)
[11:28:42.227] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:28:42.227] <TB0> INFO: run 1 of 1
[11:28:42.505] <TB0> INFO: Expecting 1464320 events.
[11:29:10.321] <TB0> INFO: 662464 events read in total (27225ms).
[11:29:37.351] <TB0> INFO: 1324600 events read in total (54256ms).
[11:29:43.418] <TB0> INFO: 1464320 events read in total (60323ms).
[11:29:43.456] <TB0> INFO: Test took 61230ms.
[11:29:57.279] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 23.208206 .. 48.920611
[11:29:57.535] <TB0> INFO: Expecting 208000 events.
[11:30:06.984] <TB0> INFO: 208000 events read in total (8857ms).
[11:30:06.985] <TB0> INFO: Test took 9705ms.
[11:30:07.051] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 58 (-1/-1) hits flags = 528 (plus default)
[11:30:07.062] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:30:07.062] <TB0> INFO: run 1 of 1
[11:30:07.341] <TB0> INFO: Expecting 1530880 events.
[11:30:35.151] <TB0> INFO: 663048 events read in total (27219ms).
[11:31:02.300] <TB0> INFO: 1325472 events read in total (54368ms).
[11:31:11.141] <TB0> INFO: 1530880 events read in total (63209ms).
[11:31:11.174] <TB0> INFO: Test took 64112ms.
[11:31:24.873] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:31:24.873] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:31:24.883] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:31:24.883] <TB0> INFO: run 1 of 1
[11:31:25.126] <TB0> INFO: Expecting 1364480 events.
[11:31:53.576] <TB0> INFO: 666224 events read in total (27858ms).
[11:32:21.248] <TB0> INFO: 1332568 events read in total (55531ms).
[11:32:23.045] <TB0> INFO: 1364480 events read in total (57328ms).
[11:32:23.074] <TB0> INFO: Test took 58191ms.
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C0.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C1.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C2.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C3.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C4.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C5.dat
[11:32:37.144] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C6.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C7.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C8.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C9.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C10.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C11.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C12.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C13.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C14.dat
[11:32:37.145] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C15.dat
[11:32:37.145] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C0.dat
[11:32:37.154] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C1.dat
[11:32:37.162] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C2.dat
[11:32:37.170] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C3.dat
[11:32:37.178] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C4.dat
[11:32:37.187] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C5.dat
[11:32:37.195] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C6.dat
[11:32:37.203] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C7.dat
[11:32:37.211] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C8.dat
[11:32:37.219] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C9.dat
[11:32:37.228] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C10.dat
[11:32:37.236] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C11.dat
[11:32:37.244] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C12.dat
[11:32:37.252] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C13.dat
[11:32:37.261] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C14.dat
[11:32:37.269] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//trimParameters35_C15.dat
[11:32:37.277] <TB0> INFO: PixTestTrim::trimTest() done
[11:32:37.277] <TB0> INFO: vtrim: 138 125 158 142 130 117 137 157 137 120 139 136 129 134 127 143
[11:32:37.277] <TB0> INFO: vthrcomp: 118 128 118 124 129 134 120 108 110 115 124 117 126 125 120 120
[11:32:37.277] <TB0> INFO: vcal mean: 34.91 34.96 34.98 35.04 35.01 34.83 34.95 35.38 35.00 34.98 35.00 34.95 34.90 34.90 35.00 34.97
[11:32:37.277] <TB0> INFO: vcal RMS: 1.09 1.01 1.22 1.07 1.27 1.10 1.09 1.61 0.94 1.01 1.10 1.18 1.17 1.08 1.05 1.09
[11:32:37.277] <TB0> INFO: bits mean: 9.68 9.67 10.19 9.98 9.75 9.47 9.83 9.80 9.04 9.87 9.30 9.77 10.42 10.36 9.68 9.84
[11:32:37.277] <TB0> INFO: bits RMS: 2.74 2.65 2.44 2.40 2.73 2.69 2.53 2.29 2.44 2.48 2.59 2.57 2.53 2.40 2.69 2.61
[11:32:37.285] <TB0> INFO: ----------------------------------------------------------------------
[11:32:37.286] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:32:37.286] <TB0> INFO: ----------------------------------------------------------------------
[11:32:37.289] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:32:37.301] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:32:37.301] <TB0> INFO: run 1 of 1
[11:32:37.622] <TB0> INFO: Expecting 4160000 events.
[11:33:09.204] <TB0> INFO: 738005 events read in total (30991ms).
[11:33:40.045] <TB0> INFO: 1471410 events read in total (61832ms).
[11:34:10.610] <TB0> INFO: 2201760 events read in total (92397ms).
[11:34:41.328] <TB0> INFO: 2927995 events read in total (123115ms).
[11:35:11.909] <TB0> INFO: 3652385 events read in total (153697ms).
[11:35:33.497] <TB0> INFO: 4160000 events read in total (175284ms).
[11:35:33.553] <TB0> INFO: Test took 176251ms.
[11:36:02.309] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[11:36:02.319] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:36:02.319] <TB0> INFO: run 1 of 1
[11:36:02.552] <TB0> INFO: Expecting 4056000 events.
[11:36:34.133] <TB0> INFO: 720205 events read in total (30989ms).
[11:37:04.386] <TB0> INFO: 1435880 events read in total (61242ms).
[11:37:35.185] <TB0> INFO: 2148745 events read in total (92041ms).
[11:38:05.720] <TB0> INFO: 2857950 events read in total (122576ms).
[11:38:35.851] <TB0> INFO: 3565275 events read in total (152707ms).
[11:38:56.851] <TB0> INFO: 4056000 events read in total (173707ms).
[11:38:56.918] <TB0> INFO: Test took 174599ms.
[11:39:25.701] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[11:39:25.712] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:39:25.712] <TB0> INFO: run 1 of 1
[11:39:25.945] <TB0> INFO: Expecting 3785600 events.
[11:39:57.383] <TB0> INFO: 738955 events read in total (30847ms).
[11:40:28.019] <TB0> INFO: 1472285 events read in total (61483ms).
[11:40:58.665] <TB0> INFO: 2202390 events read in total (92129ms).
[11:41:29.366] <TB0> INFO: 2928585 events read in total (122830ms).
[11:42:00.078] <TB0> INFO: 3653520 events read in total (153542ms).
[11:42:05.794] <TB0> INFO: 3785600 events read in total (159259ms).
[11:42:05.850] <TB0> INFO: Test took 160138ms.
[11:42:32.049] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[11:42:32.058] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:42:32.059] <TB0> INFO: run 1 of 1
[11:42:32.295] <TB0> INFO: Expecting 3785600 events.
[11:43:04.228] <TB0> INFO: 739095 events read in total (31342ms).
[11:43:34.674] <TB0> INFO: 1472375 events read in total (61788ms).
[11:44:05.296] <TB0> INFO: 2202705 events read in total (92410ms).
[11:44:36.092] <TB0> INFO: 2929095 events read in total (123206ms).
[11:45:06.749] <TB0> INFO: 3654310 events read in total (153863ms).
[11:45:12.601] <TB0> INFO: 3785600 events read in total (159715ms).
[11:45:12.656] <TB0> INFO: Test took 160597ms.
[11:45:37.658] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[11:45:37.669] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:45:37.669] <TB0> INFO: run 1 of 1
[11:45:37.900] <TB0> INFO: Expecting 3827200 events.
[11:46:10.373] <TB0> INFO: 735795 events read in total (31881ms).
[11:46:41.448] <TB0> INFO: 1466105 events read in total (62956ms).
[11:47:12.018] <TB0> INFO: 2193240 events read in total (93526ms).
[11:47:42.898] <TB0> INFO: 2916660 events read in total (124406ms).
[11:48:13.756] <TB0> INFO: 3638645 events read in total (155264ms).
[11:48:22.050] <TB0> INFO: 3827200 events read in total (163558ms).
[11:48:22.094] <TB0> INFO: Test took 164425ms.
[11:48:48.151] <TB0> INFO: PixTestTrim::trimBitTest() done
[11:48:48.152] <TB0> INFO: PixTestTrim::doTest() done, duration: 2398 seconds
[11:48:48.152] <TB0> INFO: Decoding statistics:
[11:48:48.152] <TB0> INFO: General information:
[11:48:48.152] <TB0> INFO: 16bit words read: 0
[11:48:48.152] <TB0> INFO: valid events total: 0
[11:48:48.152] <TB0> INFO: empty events: 0
[11:48:48.152] <TB0> INFO: valid events with pixels: 0
[11:48:48.152] <TB0> INFO: valid pixel hits: 0
[11:48:48.152] <TB0> INFO: Event errors: 0
[11:48:48.152] <TB0> INFO: start marker: 0
[11:48:48.152] <TB0> INFO: stop marker: 0
[11:48:48.152] <TB0> INFO: overflow: 0
[11:48:48.152] <TB0> INFO: invalid 5bit words: 0
[11:48:48.152] <TB0> INFO: invalid XOR eye diagram: 0
[11:48:48.152] <TB0> INFO: frame (failed synchr.): 0
[11:48:48.152] <TB0> INFO: idle data (no TBM trl): 0
[11:48:48.152] <TB0> INFO: no data (only TBM hdr): 0
[11:48:48.152] <TB0> INFO: TBM errors: 0
[11:48:48.152] <TB0> INFO: flawed TBM headers: 0
[11:48:48.152] <TB0> INFO: flawed TBM trailers: 0
[11:48:48.152] <TB0> INFO: event ID mismatches: 0
[11:48:48.152] <TB0> INFO: ROC errors: 0
[11:48:48.152] <TB0> INFO: missing ROC header(s): 0
[11:48:48.152] <TB0> INFO: misplaced readback start: 0
[11:48:48.152] <TB0> INFO: Pixel decoding errors: 0
[11:48:48.152] <TB0> INFO: pixel data incomplete: 0
[11:48:48.153] <TB0> INFO: pixel address: 0
[11:48:48.153] <TB0> INFO: pulse height fill bit: 0
[11:48:48.153] <TB0> INFO: buffer corruption: 0
[11:48:48.964] <TB0> INFO: ######################################################################
[11:48:48.964] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:48:48.964] <TB0> INFO: ######################################################################
[11:48:49.218] <TB0> INFO: Expecting 41600 events.
[11:48:52.645] <TB0> INFO: 41600 events read in total (2835ms).
[11:48:52.646] <TB0> INFO: Test took 3681ms.
[11:48:53.086] <TB0> INFO: Expecting 41600 events.
[11:48:56.668] <TB0> INFO: 41600 events read in total (2991ms).
[11:48:56.669] <TB0> INFO: Test took 3821ms.
[11:48:56.958] <TB0> INFO: Expecting 41600 events.
[11:49:00.442] <TB0> INFO: 41600 events read in total (2893ms).
[11:49:00.443] <TB0> INFO: Test took 3750ms.
[11:49:00.731] <TB0> INFO: Expecting 41600 events.
[11:49:04.394] <TB0> INFO: 41600 events read in total (3071ms).
[11:49:04.395] <TB0> INFO: Test took 3929ms.
[11:49:04.689] <TB0> INFO: Expecting 41600 events.
[11:49:08.415] <TB0> INFO: 41600 events read in total (3134ms).
[11:49:08.416] <TB0> INFO: Test took 3998ms.
[11:49:08.708] <TB0> INFO: Expecting 41600 events.
[11:49:12.270] <TB0> INFO: 41600 events read in total (2970ms).
[11:49:12.271] <TB0> INFO: Test took 3827ms.
[11:49:12.561] <TB0> INFO: Expecting 41600 events.
[11:49:16.100] <TB0> INFO: 41600 events read in total (2947ms).
[11:49:16.101] <TB0> INFO: Test took 3805ms.
[11:49:16.390] <TB0> INFO: Expecting 41600 events.
[11:49:19.983] <TB0> INFO: 41600 events read in total (3002ms).
[11:49:19.983] <TB0> INFO: Test took 3858ms.
[11:49:20.271] <TB0> INFO: Expecting 41600 events.
[11:49:23.735] <TB0> INFO: 41600 events read in total (2872ms).
[11:49:23.735] <TB0> INFO: Test took 3728ms.
[11:49:24.023] <TB0> INFO: Expecting 41600 events.
[11:49:27.570] <TB0> INFO: 41600 events read in total (2955ms).
[11:49:27.571] <TB0> INFO: Test took 3812ms.
[11:49:27.862] <TB0> INFO: Expecting 41600 events.
[11:49:31.474] <TB0> INFO: 41600 events read in total (3021ms).
[11:49:31.476] <TB0> INFO: Test took 3879ms.
[11:49:31.827] <TB0> INFO: Expecting 41600 events.
[11:49:35.559] <TB0> INFO: 41600 events read in total (3140ms).
[11:49:35.560] <TB0> INFO: Test took 4056ms.
[11:49:35.848] <TB0> INFO: Expecting 41600 events.
[11:49:39.473] <TB0> INFO: 41600 events read in total (3033ms).
[11:49:39.474] <TB0> INFO: Test took 3891ms.
[11:49:39.763] <TB0> INFO: Expecting 41600 events.
[11:49:43.350] <TB0> INFO: 41600 events read in total (2995ms).
[11:49:43.351] <TB0> INFO: Test took 3852ms.
[11:49:43.643] <TB0> INFO: Expecting 41600 events.
[11:49:47.214] <TB0> INFO: 41600 events read in total (2979ms).
[11:49:47.214] <TB0> INFO: Test took 3836ms.
[11:49:47.502] <TB0> INFO: Expecting 41600 events.
[11:49:51.268] <TB0> INFO: 41600 events read in total (3174ms).
[11:49:51.269] <TB0> INFO: Test took 4031ms.
[11:49:51.560] <TB0> INFO: Expecting 41600 events.
[11:49:55.074] <TB0> INFO: 41600 events read in total (2923ms).
[11:49:55.074] <TB0> INFO: Test took 3779ms.
[11:49:55.365] <TB0> INFO: Expecting 41600 events.
[11:49:58.842] <TB0> INFO: 41600 events read in total (2885ms).
[11:49:58.843] <TB0> INFO: Test took 3743ms.
[11:49:59.131] <TB0> INFO: Expecting 41600 events.
[11:50:02.618] <TB0> INFO: 41600 events read in total (2895ms).
[11:50:02.619] <TB0> INFO: Test took 3753ms.
[11:50:02.907] <TB0> INFO: Expecting 41600 events.
[11:50:06.440] <TB0> INFO: 41600 events read in total (2941ms).
[11:50:06.441] <TB0> INFO: Test took 3798ms.
[11:50:06.731] <TB0> INFO: Expecting 41600 events.
[11:50:10.277] <TB0> INFO: 41600 events read in total (2955ms).
[11:50:10.278] <TB0> INFO: Test took 3812ms.
[11:50:10.568] <TB0> INFO: Expecting 41600 events.
[11:50:14.127] <TB0> INFO: 41600 events read in total (2967ms).
[11:50:14.127] <TB0> INFO: Test took 3824ms.
[11:50:14.417] <TB0> INFO: Expecting 41600 events.
[11:50:17.870] <TB0> INFO: 41600 events read in total (2861ms).
[11:50:17.871] <TB0> INFO: Test took 3720ms.
[11:50:18.161] <TB0> INFO: Expecting 41600 events.
[11:50:21.682] <TB0> INFO: 41600 events read in total (2930ms).
[11:50:21.683] <TB0> INFO: Test took 3787ms.
[11:50:21.974] <TB0> INFO: Expecting 41600 events.
[11:50:25.538] <TB0> INFO: 41600 events read in total (2973ms).
[11:50:25.539] <TB0> INFO: Test took 3829ms.
[11:50:25.845] <TB0> INFO: Expecting 41600 events.
[11:50:29.331] <TB0> INFO: 41600 events read in total (2894ms).
[11:50:29.332] <TB0> INFO: Test took 3765ms.
[11:50:29.623] <TB0> INFO: Expecting 41600 events.
[11:50:33.078] <TB0> INFO: 41600 events read in total (2864ms).
[11:50:33.078] <TB0> INFO: Test took 3720ms.
[11:50:33.367] <TB0> INFO: Expecting 41600 events.
[11:50:37.004] <TB0> INFO: 41600 events read in total (3046ms).
[11:50:37.005] <TB0> INFO: Test took 3903ms.
[11:50:37.295] <TB0> INFO: Expecting 41600 events.
[11:50:40.838] <TB0> INFO: 41600 events read in total (2951ms).
[11:50:40.838] <TB0> INFO: Test took 3807ms.
[11:50:41.138] <TB0> INFO: Expecting 41600 events.
[11:50:44.728] <TB0> INFO: 41600 events read in total (2999ms).
[11:50:44.729] <TB0> INFO: Test took 3866ms.
[11:50:45.018] <TB0> INFO: Expecting 2560 events.
[11:50:45.901] <TB0> INFO: 2560 events read in total (291ms).
[11:50:45.901] <TB0> INFO: Test took 1160ms.
[11:50:46.209] <TB0> INFO: Expecting 2560 events.
[11:50:47.092] <TB0> INFO: 2560 events read in total (292ms).
[11:50:47.092] <TB0> INFO: Test took 1190ms.
[11:50:47.400] <TB0> INFO: Expecting 2560 events.
[11:50:48.283] <TB0> INFO: 2560 events read in total (291ms).
[11:50:48.283] <TB0> INFO: Test took 1190ms.
[11:50:48.591] <TB0> INFO: Expecting 2560 events.
[11:50:49.473] <TB0> INFO: 2560 events read in total (291ms).
[11:50:49.473] <TB0> INFO: Test took 1189ms.
[11:50:49.781] <TB0> INFO: Expecting 2560 events.
[11:50:50.661] <TB0> INFO: 2560 events read in total (289ms).
[11:50:50.662] <TB0> INFO: Test took 1188ms.
[11:50:50.970] <TB0> INFO: Expecting 2560 events.
[11:50:51.848] <TB0> INFO: 2560 events read in total (287ms).
[11:50:51.848] <TB0> INFO: Test took 1186ms.
[11:50:52.157] <TB0> INFO: Expecting 2560 events.
[11:50:53.040] <TB0> INFO: 2560 events read in total (291ms).
[11:50:53.040] <TB0> INFO: Test took 1191ms.
[11:50:53.348] <TB0> INFO: Expecting 2560 events.
[11:50:54.228] <TB0> INFO: 2560 events read in total (289ms).
[11:50:54.228] <TB0> INFO: Test took 1188ms.
[11:50:54.536] <TB0> INFO: Expecting 2560 events.
[11:50:55.417] <TB0> INFO: 2560 events read in total (289ms).
[11:50:55.417] <TB0> INFO: Test took 1188ms.
[11:50:55.725] <TB0> INFO: Expecting 2560 events.
[11:50:56.604] <TB0> INFO: 2560 events read in total (288ms).
[11:50:56.604] <TB0> INFO: Test took 1187ms.
[11:50:56.912] <TB0> INFO: Expecting 2560 events.
[11:50:57.792] <TB0> INFO: 2560 events read in total (289ms).
[11:50:57.792] <TB0> INFO: Test took 1188ms.
[11:50:58.100] <TB0> INFO: Expecting 2560 events.
[11:50:58.979] <TB0> INFO: 2560 events read in total (287ms).
[11:50:58.979] <TB0> INFO: Test took 1186ms.
[11:50:59.287] <TB0> INFO: Expecting 2560 events.
[11:51:00.171] <TB0> INFO: 2560 events read in total (293ms).
[11:51:00.171] <TB0> INFO: Test took 1191ms.
[11:51:00.479] <TB0> INFO: Expecting 2560 events.
[11:51:01.363] <TB0> INFO: 2560 events read in total (293ms).
[11:51:01.363] <TB0> INFO: Test took 1192ms.
[11:51:01.671] <TB0> INFO: Expecting 2560 events.
[11:51:02.556] <TB0> INFO: 2560 events read in total (294ms).
[11:51:02.556] <TB0> INFO: Test took 1192ms.
[11:51:02.864] <TB0> INFO: Expecting 2560 events.
[11:51:03.749] <TB0> INFO: 2560 events read in total (293ms).
[11:51:03.749] <TB0> INFO: Test took 1192ms.
[11:51:03.752] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:51:04.057] <TB0> INFO: Expecting 655360 events.
[11:51:18.450] <TB0> INFO: 655360 events read in total (13802ms).
[11:51:18.465] <TB0> INFO: Expecting 655360 events.
[11:51:32.701] <TB0> INFO: 655360 events read in total (13833ms).
[11:51:32.721] <TB0> INFO: Expecting 655360 events.
[11:51:47.006] <TB0> INFO: 655360 events read in total (13882ms).
[11:51:47.024] <TB0> INFO: Expecting 655360 events.
[11:52:01.172] <TB0> INFO: 655360 events read in total (13745ms).
[11:52:01.197] <TB0> INFO: Expecting 655360 events.
[11:52:15.371] <TB0> INFO: 655360 events read in total (13771ms).
[11:52:15.398] <TB0> INFO: Expecting 655360 events.
[11:52:29.516] <TB0> INFO: 655360 events read in total (13715ms).
[11:52:29.547] <TB0> INFO: Expecting 655360 events.
[11:52:43.661] <TB0> INFO: 655360 events read in total (13711ms).
[11:52:43.696] <TB0> INFO: Expecting 655360 events.
[11:52:57.776] <TB0> INFO: 655360 events read in total (13677ms).
[11:52:57.815] <TB0> INFO: Expecting 655360 events.
[11:53:12.074] <TB0> INFO: 655360 events read in total (13856ms).
[11:53:12.119] <TB0> INFO: Expecting 655360 events.
[11:53:26.237] <TB0> INFO: 655360 events read in total (13715ms).
[11:53:26.303] <TB0> INFO: Expecting 655360 events.
[11:53:40.427] <TB0> INFO: 655360 events read in total (13721ms).
[11:53:40.480] <TB0> INFO: Expecting 655360 events.
[11:53:54.546] <TB0> INFO: 655360 events read in total (13663ms).
[11:53:54.623] <TB0> INFO: Expecting 655360 events.
[11:54:08.694] <TB0> INFO: 655360 events read in total (13668ms).
[11:54:08.755] <TB0> INFO: Expecting 655360 events.
[11:54:22.901] <TB0> INFO: 655360 events read in total (13743ms).
[11:54:22.966] <TB0> INFO: Expecting 655360 events.
[11:54:36.962] <TB0> INFO: 655360 events read in total (13593ms).
[11:54:37.032] <TB0> INFO: Expecting 655360 events.
[11:54:51.129] <TB0> INFO: 655360 events read in total (13694ms).
[11:54:51.233] <TB0> INFO: Test took 227481ms.
[11:54:51.330] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:54:51.595] <TB0> INFO: Expecting 655360 events.
[11:55:05.760] <TB0> INFO: 655360 events read in total (13573ms).
[11:55:05.770] <TB0> INFO: Expecting 655360 events.
[11:55:19.742] <TB0> INFO: 655360 events read in total (13569ms).
[11:55:19.761] <TB0> INFO: Expecting 655360 events.
[11:55:33.658] <TB0> INFO: 655360 events read in total (13494ms).
[11:55:33.682] <TB0> INFO: Expecting 655360 events.
[11:55:47.462] <TB0> INFO: 655360 events read in total (13377ms).
[11:55:47.492] <TB0> INFO: Expecting 655360 events.
[11:56:01.299] <TB0> INFO: 655360 events read in total (13404ms).
[11:56:01.334] <TB0> INFO: Expecting 655360 events.
[11:56:15.354] <TB0> INFO: 655360 events read in total (13617ms).
[11:56:15.384] <TB0> INFO: Expecting 655360 events.
[11:56:29.362] <TB0> INFO: 655360 events read in total (13575ms).
[11:56:29.408] <TB0> INFO: Expecting 655360 events.
[11:56:43.168] <TB0> INFO: 655360 events read in total (13357ms).
[11:56:43.205] <TB0> INFO: Expecting 655360 events.
[11:56:57.097] <TB0> INFO: 655360 events read in total (13489ms).
[11:56:57.141] <TB0> INFO: Expecting 655360 events.
[11:57:11.188] <TB0> INFO: 655360 events read in total (13644ms).
[11:57:11.236] <TB0> INFO: Expecting 655360 events.
[11:57:25.123] <TB0> INFO: 655360 events read in total (13484ms).
[11:57:25.177] <TB0> INFO: Expecting 655360 events.
[11:57:39.121] <TB0> INFO: 655360 events read in total (13541ms).
[11:57:39.179] <TB0> INFO: Expecting 655360 events.
[11:57:53.136] <TB0> INFO: 655360 events read in total (13554ms).
[11:57:53.218] <TB0> INFO: Expecting 655360 events.
[11:58:07.206] <TB0> INFO: 655360 events read in total (13585ms).
[11:58:07.272] <TB0> INFO: Expecting 655360 events.
[11:58:21.249] <TB0> INFO: 655360 events read in total (13574ms).
[11:58:21.317] <TB0> INFO: Expecting 655360 events.
[11:58:35.284] <TB0> INFO: 655360 events read in total (13563ms).
[11:58:35.385] <TB0> INFO: Test took 224055ms.
[11:58:35.630] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.636] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.642] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.648] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.653] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.657] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:35.662] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:35.667] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:58:35.671] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:58:35.676] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:58:35.681] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:58:35.686] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[11:58:35.690] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[11:58:35.695] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[11:58:35.700] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[11:58:35.705] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[11:58:35.710] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[11:58:35.714] <TB0> INFO: safety margin for low PH: adding 13, margin is now 33
[11:58:35.719] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.724] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:35.729] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:35.733] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:58:35.738] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:58:35.743] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:58:35.748] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[11:58:35.753] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[11:58:35.758] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.764] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.770] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.776] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:35.781] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:35.786] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:58:35.791] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:58:35.796] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.801] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.806] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.811] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.816] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.821] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.826] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:58:35.831] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:58:35.837] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:58:35.871] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C0.dat
[11:58:35.871] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C1.dat
[11:58:35.871] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C2.dat
[11:58:35.871] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C3.dat
[11:58:35.871] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C4.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C5.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C6.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C7.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C8.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C9.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C10.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C11.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C12.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C13.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C14.dat
[11:58:35.872] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//dacParameters35_C15.dat
[11:58:36.107] <TB0> INFO: Expecting 41600 events.
[11:58:39.188] <TB0> INFO: 41600 events read in total (2490ms).
[11:58:39.189] <TB0> INFO: Test took 3314ms.
[11:58:39.630] <TB0> INFO: Expecting 41600 events.
[11:58:42.675] <TB0> INFO: 41600 events read in total (2453ms).
[11:58:42.676] <TB0> INFO: Test took 3277ms.
[11:58:43.120] <TB0> INFO: Expecting 41600 events.
[11:58:46.196] <TB0> INFO: 41600 events read in total (2484ms).
[11:58:46.196] <TB0> INFO: Test took 3310ms.
[11:58:46.414] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:46.502] <TB0> INFO: Expecting 2560 events.
[11:58:47.385] <TB0> INFO: 2560 events read in total (291ms).
[11:58:47.385] <TB0> INFO: Test took 971ms.
[11:58:47.387] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:47.694] <TB0> INFO: Expecting 2560 events.
[11:58:48.575] <TB0> INFO: 2560 events read in total (290ms).
[11:58:48.576] <TB0> INFO: Test took 1189ms.
[11:58:48.578] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:48.884] <TB0> INFO: Expecting 2560 events.
[11:58:49.771] <TB0> INFO: 2560 events read in total (295ms).
[11:58:49.771] <TB0> INFO: Test took 1193ms.
[11:58:49.773] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:50.079] <TB0> INFO: Expecting 2560 events.
[11:58:50.965] <TB0> INFO: 2560 events read in total (294ms).
[11:58:50.965] <TB0> INFO: Test took 1192ms.
[11:58:50.967] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:51.273] <TB0> INFO: Expecting 2560 events.
[11:58:52.156] <TB0> INFO: 2560 events read in total (291ms).
[11:58:52.156] <TB0> INFO: Test took 1189ms.
[11:58:52.158] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:52.465] <TB0> INFO: Expecting 2560 events.
[11:58:53.347] <TB0> INFO: 2560 events read in total (291ms).
[11:58:53.347] <TB0> INFO: Test took 1189ms.
[11:58:53.350] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:53.656] <TB0> INFO: Expecting 2560 events.
[11:58:54.538] <TB0> INFO: 2560 events read in total (291ms).
[11:58:54.539] <TB0> INFO: Test took 1189ms.
[11:58:54.540] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:54.847] <TB0> INFO: Expecting 2560 events.
[11:58:55.730] <TB0> INFO: 2560 events read in total (292ms).
[11:58:55.730] <TB0> INFO: Test took 1190ms.
[11:58:55.733] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:56.038] <TB0> INFO: Expecting 2560 events.
[11:58:56.917] <TB0> INFO: 2560 events read in total (287ms).
[11:58:56.917] <TB0> INFO: Test took 1185ms.
[11:58:56.919] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:57.225] <TB0> INFO: Expecting 2560 events.
[11:58:58.104] <TB0> INFO: 2560 events read in total (287ms).
[11:58:58.105] <TB0> INFO: Test took 1186ms.
[11:58:58.107] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:58.413] <TB0> INFO: Expecting 2560 events.
[11:58:59.294] <TB0> INFO: 2560 events read in total (289ms).
[11:58:59.294] <TB0> INFO: Test took 1187ms.
[11:58:59.296] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:58:59.603] <TB0> INFO: Expecting 2560 events.
[11:59:00.484] <TB0> INFO: 2560 events read in total (290ms).
[11:59:00.484] <TB0> INFO: Test took 1188ms.
[11:59:00.486] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:00.793] <TB0> INFO: Expecting 2560 events.
[11:59:01.672] <TB0> INFO: 2560 events read in total (288ms).
[11:59:01.672] <TB0> INFO: Test took 1186ms.
[11:59:01.676] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:01.980] <TB0> INFO: Expecting 2560 events.
[11:59:02.859] <TB0> INFO: 2560 events read in total (287ms).
[11:59:02.859] <TB0> INFO: Test took 1184ms.
[11:59:02.861] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:03.167] <TB0> INFO: Expecting 2560 events.
[11:59:04.047] <TB0> INFO: 2560 events read in total (288ms).
[11:59:04.047] <TB0> INFO: Test took 1186ms.
[11:59:04.049] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:04.355] <TB0> INFO: Expecting 2560 events.
[11:59:05.233] <TB0> INFO: 2560 events read in total (286ms).
[11:59:05.233] <TB0> INFO: Test took 1184ms.
[11:59:05.235] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:05.542] <TB0> INFO: Expecting 2560 events.
[11:59:06.420] <TB0> INFO: 2560 events read in total (287ms).
[11:59:06.420] <TB0> INFO: Test took 1185ms.
[11:59:06.422] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:06.728] <TB0> INFO: Expecting 2560 events.
[11:59:07.609] <TB0> INFO: 2560 events read in total (289ms).
[11:59:07.609] <TB0> INFO: Test took 1187ms.
[11:59:07.611] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:07.917] <TB0> INFO: Expecting 2560 events.
[11:59:08.796] <TB0> INFO: 2560 events read in total (287ms).
[11:59:08.796] <TB0> INFO: Test took 1185ms.
[11:59:08.798] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:09.105] <TB0> INFO: Expecting 2560 events.
[11:59:09.982] <TB0> INFO: 2560 events read in total (286ms).
[11:59:09.983] <TB0> INFO: Test took 1185ms.
[11:59:09.985] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:10.291] <TB0> INFO: Expecting 2560 events.
[11:59:11.169] <TB0> INFO: 2560 events read in total (287ms).
[11:59:11.170] <TB0> INFO: Test took 1186ms.
[11:59:11.171] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:11.478] <TB0> INFO: Expecting 2560 events.
[11:59:12.356] <TB0> INFO: 2560 events read in total (287ms).
[11:59:12.357] <TB0> INFO: Test took 1186ms.
[11:59:12.359] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:12.665] <TB0> INFO: Expecting 2560 events.
[11:59:13.543] <TB0> INFO: 2560 events read in total (287ms).
[11:59:13.544] <TB0> INFO: Test took 1185ms.
[11:59:13.545] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:13.852] <TB0> INFO: Expecting 2560 events.
[11:59:14.730] <TB0> INFO: 2560 events read in total (287ms).
[11:59:14.730] <TB0> INFO: Test took 1185ms.
[11:59:14.732] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:15.039] <TB0> INFO: Expecting 2560 events.
[11:59:15.921] <TB0> INFO: 2560 events read in total (291ms).
[11:59:15.921] <TB0> INFO: Test took 1189ms.
[11:59:15.923] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:16.229] <TB0> INFO: Expecting 2560 events.
[11:59:17.112] <TB0> INFO: 2560 events read in total (291ms).
[11:59:17.112] <TB0> INFO: Test took 1189ms.
[11:59:17.115] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:17.421] <TB0> INFO: Expecting 2560 events.
[11:59:18.302] <TB0> INFO: 2560 events read in total (290ms).
[11:59:18.302] <TB0> INFO: Test took 1188ms.
[11:59:18.304] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:18.611] <TB0> INFO: Expecting 2560 events.
[11:59:19.493] <TB0> INFO: 2560 events read in total (291ms).
[11:59:19.493] <TB0> INFO: Test took 1189ms.
[11:59:19.495] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:19.801] <TB0> INFO: Expecting 2560 events.
[11:59:20.684] <TB0> INFO: 2560 events read in total (291ms).
[11:59:20.684] <TB0> INFO: Test took 1189ms.
[11:59:20.686] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:20.993] <TB0> INFO: Expecting 2560 events.
[11:59:21.875] <TB0> INFO: 2560 events read in total (290ms).
[11:59:21.875] <TB0> INFO: Test took 1189ms.
[11:59:21.877] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:22.183] <TB0> INFO: Expecting 2560 events.
[11:59:23.066] <TB0> INFO: 2560 events read in total (291ms).
[11:59:23.066] <TB0> INFO: Test took 1189ms.
[11:59:23.068] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:59:23.374] <TB0> INFO: Expecting 2560 events.
[11:59:24.258] <TB0> INFO: 2560 events read in total (292ms).
[11:59:24.258] <TB0> INFO: Test took 1190ms.
[11:59:24.724] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 635 seconds
[11:59:24.724] <TB0> INFO: PH scale (per ROC): 40 49 44 43 49 32 59 54 47 56 63 69 66 57 62 49
[11:59:24.724] <TB0> INFO: PH offset (per ROC): 99 98 106 105 112 112 125 126 111 141 94 110 122 119 134 106
[11:59:24.728] <TB0> INFO: Decoding statistics:
[11:59:24.728] <TB0> INFO: General information:
[11:59:24.728] <TB0> INFO: 16bit words read: 127886
[11:59:24.728] <TB0> INFO: valid events total: 20480
[11:59:24.729] <TB0> INFO: empty events: 17977
[11:59:24.729] <TB0> INFO: valid events with pixels: 2503
[11:59:24.729] <TB0> INFO: valid pixel hits: 2503
[11:59:24.729] <TB0> INFO: Event errors: 0
[11:59:24.729] <TB0> INFO: start marker: 0
[11:59:24.729] <TB0> INFO: stop marker: 0
[11:59:24.729] <TB0> INFO: overflow: 0
[11:59:24.729] <TB0> INFO: invalid 5bit words: 0
[11:59:24.729] <TB0> INFO: invalid XOR eye diagram: 0
[11:59:24.729] <TB0> INFO: frame (failed synchr.): 0
[11:59:24.729] <TB0> INFO: idle data (no TBM trl): 0
[11:59:24.729] <TB0> INFO: no data (only TBM hdr): 0
[11:59:24.729] <TB0> INFO: TBM errors: 0
[11:59:24.729] <TB0> INFO: flawed TBM headers: 0
[11:59:24.729] <TB0> INFO: flawed TBM trailers: 0
[11:59:24.729] <TB0> INFO: event ID mismatches: 0
[11:59:24.729] <TB0> INFO: ROC errors: 0
[11:59:24.729] <TB0> INFO: missing ROC header(s): 0
[11:59:24.729] <TB0> INFO: misplaced readback start: 0
[11:59:24.729] <TB0> INFO: Pixel decoding errors: 0
[11:59:24.729] <TB0> INFO: pixel data incomplete: 0
[11:59:24.729] <TB0> INFO: pixel address: 0
[11:59:24.729] <TB0> INFO: pulse height fill bit: 0
[11:59:24.729] <TB0> INFO: buffer corruption: 0
[11:59:25.066] <TB0> INFO: ######################################################################
[11:59:25.066] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:59:25.066] <TB0> INFO: ######################################################################
[11:59:25.078] <TB0> INFO: scanning low vcal = 10
[11:59:25.314] <TB0> INFO: Expecting 41600 events.
[11:59:28.878] <TB0> INFO: 41600 events read in total (2973ms).
[11:59:28.878] <TB0> INFO: Test took 3800ms.
[11:59:28.879] <TB0> INFO: scanning low vcal = 20
[11:59:29.179] <TB0> INFO: Expecting 41600 events.
[11:59:32.727] <TB0> INFO: 41600 events read in total (2956ms).
[11:59:32.728] <TB0> INFO: Test took 3849ms.
[11:59:32.729] <TB0> INFO: scanning low vcal = 30
[11:59:33.027] <TB0> INFO: Expecting 41600 events.
[11:59:36.644] <TB0> INFO: 41600 events read in total (3026ms).
[11:59:36.645] <TB0> INFO: Test took 3915ms.
[11:59:36.647] <TB0> INFO: scanning low vcal = 40
[11:59:36.924] <TB0> INFO: Expecting 41600 events.
[11:59:40.852] <TB0> INFO: 41600 events read in total (3337ms).
[11:59:40.853] <TB0> INFO: Test took 4206ms.
[11:59:40.855] <TB0> INFO: scanning low vcal = 50
[11:59:41.132] <TB0> INFO: Expecting 41600 events.
[11:59:45.090] <TB0> INFO: 41600 events read in total (3366ms).
[11:59:45.091] <TB0> INFO: Test took 4235ms.
[11:59:45.094] <TB0> INFO: scanning low vcal = 60
[11:59:45.370] <TB0> INFO: Expecting 41600 events.
[11:59:49.282] <TB0> INFO: 41600 events read in total (3320ms).
[11:59:49.283] <TB0> INFO: Test took 4189ms.
[11:59:49.285] <TB0> INFO: scanning low vcal = 70
[11:59:49.562] <TB0> INFO: Expecting 41600 events.
[11:59:53.478] <TB0> INFO: 41600 events read in total (3325ms).
[11:59:53.479] <TB0> INFO: Test took 4194ms.
[11:59:53.481] <TB0> INFO: scanning low vcal = 80
[11:59:53.758] <TB0> INFO: Expecting 41600 events.
[11:59:57.696] <TB0> INFO: 41600 events read in total (3346ms).
[11:59:57.697] <TB0> INFO: Test took 4216ms.
[11:59:57.700] <TB0> INFO: scanning low vcal = 90
[11:59:57.976] <TB0> INFO: Expecting 41600 events.
[12:00:01.936] <TB0> INFO: 41600 events read in total (3368ms).
[12:00:01.937] <TB0> INFO: Test took 4237ms.
[12:00:01.939] <TB0> INFO: scanning low vcal = 100
[12:00:02.216] <TB0> INFO: Expecting 41600 events.
[12:00:06.178] <TB0> INFO: 41600 events read in total (3370ms).
[12:00:06.179] <TB0> INFO: Test took 4240ms.
[12:00:06.182] <TB0> INFO: scanning low vcal = 110
[12:00:06.458] <TB0> INFO: Expecting 41600 events.
[12:00:10.402] <TB0> INFO: 41600 events read in total (3352ms).
[12:00:10.403] <TB0> INFO: Test took 4221ms.
[12:00:10.406] <TB0> INFO: scanning low vcal = 120
[12:00:10.682] <TB0> INFO: Expecting 41600 events.
[12:00:14.636] <TB0> INFO: 41600 events read in total (3362ms).
[12:00:14.637] <TB0> INFO: Test took 4231ms.
[12:00:14.639] <TB0> INFO: scanning low vcal = 130
[12:00:14.916] <TB0> INFO: Expecting 41600 events.
[12:00:18.838] <TB0> INFO: 41600 events read in total (3330ms).
[12:00:18.838] <TB0> INFO: Test took 4199ms.
[12:00:18.841] <TB0> INFO: scanning low vcal = 140
[12:00:19.118] <TB0> INFO: Expecting 41600 events.
[12:00:23.051] <TB0> INFO: 41600 events read in total (3342ms).
[12:00:23.052] <TB0> INFO: Test took 4211ms.
[12:00:23.054] <TB0> INFO: scanning low vcal = 150
[12:00:23.331] <TB0> INFO: Expecting 41600 events.
[12:00:27.265] <TB0> INFO: 41600 events read in total (3342ms).
[12:00:27.266] <TB0> INFO: Test took 4212ms.
[12:00:27.269] <TB0> INFO: scanning low vcal = 160
[12:00:27.545] <TB0> INFO: Expecting 41600 events.
[12:00:31.497] <TB0> INFO: 41600 events read in total (3360ms).
[12:00:31.497] <TB0> INFO: Test took 4228ms.
[12:00:31.500] <TB0> INFO: scanning low vcal = 170
[12:00:31.777] <TB0> INFO: Expecting 41600 events.
[12:00:35.716] <TB0> INFO: 41600 events read in total (3347ms).
[12:00:35.717] <TB0> INFO: Test took 4217ms.
[12:00:35.720] <TB0> INFO: scanning low vcal = 180
[12:00:35.997] <TB0> INFO: Expecting 41600 events.
[12:00:39.954] <TB0> INFO: 41600 events read in total (3365ms).
[12:00:39.955] <TB0> INFO: Test took 4235ms.
[12:00:39.958] <TB0> INFO: scanning low vcal = 190
[12:00:40.234] <TB0> INFO: Expecting 41600 events.
[12:00:44.190] <TB0> INFO: 41600 events read in total (3364ms).
[12:00:44.191] <TB0> INFO: Test took 4233ms.
[12:00:44.193] <TB0> INFO: scanning low vcal = 200
[12:00:44.470] <TB0> INFO: Expecting 41600 events.
[12:00:48.430] <TB0> INFO: 41600 events read in total (3368ms).
[12:00:48.430] <TB0> INFO: Test took 4236ms.
[12:00:48.433] <TB0> INFO: scanning low vcal = 210
[12:00:48.710] <TB0> INFO: Expecting 41600 events.
[12:00:52.627] <TB0> INFO: 41600 events read in total (3326ms).
[12:00:52.628] <TB0> INFO: Test took 4195ms.
[12:00:52.630] <TB0> INFO: scanning low vcal = 220
[12:00:52.907] <TB0> INFO: Expecting 41600 events.
[12:00:56.855] <TB0> INFO: 41600 events read in total (3356ms).
[12:00:56.855] <TB0> INFO: Test took 4224ms.
[12:00:56.858] <TB0> INFO: scanning low vcal = 230
[12:00:57.135] <TB0> INFO: Expecting 41600 events.
[12:01:01.098] <TB0> INFO: 41600 events read in total (3372ms).
[12:01:01.099] <TB0> INFO: Test took 4241ms.
[12:01:01.101] <TB0> INFO: scanning low vcal = 240
[12:01:01.378] <TB0> INFO: Expecting 41600 events.
[12:01:05.300] <TB0> INFO: 41600 events read in total (3331ms).
[12:01:05.301] <TB0> INFO: Test took 4200ms.
[12:01:05.303] <TB0> INFO: scanning low vcal = 250
[12:01:05.580] <TB0> INFO: Expecting 41600 events.
[12:01:09.532] <TB0> INFO: 41600 events read in total (3361ms).
[12:01:09.533] <TB0> INFO: Test took 4230ms.
[12:01:09.537] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:01:09.812] <TB0> INFO: Expecting 41600 events.
[12:01:13.768] <TB0> INFO: 41600 events read in total (3364ms).
[12:01:13.769] <TB0> INFO: Test took 4232ms.
[12:01:13.772] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:01:14.048] <TB0> INFO: Expecting 41600 events.
[12:01:18.028] <TB0> INFO: 41600 events read in total (3386ms).
[12:01:18.029] <TB0> INFO: Test took 4257ms.
[12:01:18.032] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:01:18.309] <TB0> INFO: Expecting 41600 events.
[12:01:22.251] <TB0> INFO: 41600 events read in total (3351ms).
[12:01:22.252] <TB0> INFO: Test took 4220ms.
[12:01:22.254] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:01:22.531] <TB0> INFO: Expecting 41600 events.
[12:01:26.493] <TB0> INFO: 41600 events read in total (3371ms).
[12:01:26.494] <TB0> INFO: Test took 4240ms.
[12:01:26.496] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:01:26.773] <TB0> INFO: Expecting 41600 events.
[12:01:30.733] <TB0> INFO: 41600 events read in total (3369ms).
[12:01:30.733] <TB0> INFO: Test took 4237ms.
[12:01:31.288] <TB0> INFO: PixTestGainPedestal::measure() done
[12:02:06.198] <TB0> INFO: PixTestGainPedestal::fit() done
[12:02:06.198] <TB0> INFO: non-linearity mean: 0.916 0.942 0.906 0.913 0.968 0.978 0.984 0.983 0.945 0.977 0.972 0.986 0.983 0.976 0.985 0.968
[12:02:06.198] <TB0> INFO: non-linearity RMS: 0.174 0.055 0.112 0.175 0.015 0.193 0.003 0.003 0.054 0.005 0.014 0.004 0.004 0.005 0.004 0.014
[12:02:06.198] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:02:06.212] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:02:06.225] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:02:06.239] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:02:06.253] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:02:06.267] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:02:06.280] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:02:06.294] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:02:06.307] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:02:06.321] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:02:06.335] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:02:06.348] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:02:06.362] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:02:06.376] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:02:06.389] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:02:06.403] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1104_FullQualification_2016-11-02_09h46m_1478076416//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:02:06.416] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[12:02:06.416] <TB0> INFO: Decoding statistics:
[12:02:06.416] <TB0> INFO: General information:
[12:02:06.417] <TB0> INFO: 16bit words read: 3327802
[12:02:06.417] <TB0> INFO: valid events total: 332800
[12:02:06.417] <TB0> INFO: empty events: 0
[12:02:06.417] <TB0> INFO: valid events with pixels: 332800
[12:02:06.417] <TB0> INFO: valid pixel hits: 665501
[12:02:06.417] <TB0> INFO: Event errors: 0
[12:02:06.417] <TB0> INFO: start marker: 0
[12:02:06.417] <TB0> INFO: stop marker: 0
[12:02:06.417] <TB0> INFO: overflow: 0
[12:02:06.417] <TB0> INFO: invalid 5bit words: 0
[12:02:06.417] <TB0> INFO: invalid XOR eye diagram: 0
[12:02:06.417] <TB0> INFO: frame (failed synchr.): 0
[12:02:06.417] <TB0> INFO: idle data (no TBM trl): 0
[12:02:06.417] <TB0> INFO: no data (only TBM hdr): 0
[12:02:06.417] <TB0> INFO: TBM errors: 0
[12:02:06.417] <TB0> INFO: flawed TBM headers: 0
[12:02:06.417] <TB0> INFO: flawed TBM trailers: 0
[12:02:06.417] <TB0> INFO: event ID mismatches: 0
[12:02:06.417] <TB0> INFO: ROC errors: 0
[12:02:06.417] <TB0> INFO: missing ROC header(s): 0
[12:02:06.417] <TB0> INFO: misplaced readback start: 0
[12:02:06.417] <TB0> INFO: Pixel decoding errors: 0
[12:02:06.417] <TB0> INFO: pixel data incomplete: 0
[12:02:06.417] <TB0> INFO: pixel address: 0
[12:02:06.417] <TB0> INFO: pulse height fill bit: 0
[12:02:06.417] <TB0> INFO: buffer corruption: 0
[12:02:06.432] <TB0> INFO: Decoding statistics:
[12:02:06.432] <TB0> INFO: General information:
[12:02:06.433] <TB0> INFO: 16bit words read: 3457224
[12:02:06.433] <TB0> INFO: valid events total: 353536
[12:02:06.433] <TB0> INFO: empty events: 18233
[12:02:06.433] <TB0> INFO: valid events with pixels: 335303
[12:02:06.433] <TB0> INFO: valid pixel hits: 668004
[12:02:06.433] <TB0> INFO: Event errors: 0
[12:02:06.433] <TB0> INFO: start marker: 0
[12:02:06.433] <TB0> INFO: stop marker: 0
[12:02:06.433] <TB0> INFO: overflow: 0
[12:02:06.433] <TB0> INFO: invalid 5bit words: 0
[12:02:06.433] <TB0> INFO: invalid XOR eye diagram: 0
[12:02:06.433] <TB0> INFO: frame (failed synchr.): 0
[12:02:06.433] <TB0> INFO: idle data (no TBM trl): 0
[12:02:06.433] <TB0> INFO: no data (only TBM hdr): 0
[12:02:06.433] <TB0> INFO: TBM errors: 0
[12:02:06.433] <TB0> INFO: flawed TBM headers: 0
[12:02:06.433] <TB0> INFO: flawed TBM trailers: 0
[12:02:06.433] <TB0> INFO: event ID mismatches: 0
[12:02:06.433] <TB0> INFO: ROC errors: 0
[12:02:06.433] <TB0> INFO: missing ROC header(s): 0
[12:02:06.433] <TB0> INFO: misplaced readback start: 0
[12:02:06.433] <TB0> INFO: Pixel decoding errors: 0
[12:02:06.433] <TB0> INFO: pixel data incomplete: 0
[12:02:06.433] <TB0> INFO: pixel address: 0
[12:02:06.433] <TB0> INFO: pulse height fill bit: 0
[12:02:06.433] <TB0> INFO: buffer corruption: 0
[12:02:06.433] <TB0> INFO: enter test to run
[12:02:06.433] <TB0> INFO: test: exit no parameter change
[12:02:06.472] <TB0> QUIET: Connection to board 73 closed.
[12:02:06.472] <TB0> INFO: pXar: this is the end, my friend