[12:03:08.597] <TB3> INFO: *** Welcome to pxar ***
[12:03:08.597] <TB3> INFO: *** Today: 2016/11/02
[12:03:08.605] <TB3> INFO: *** Version: c8ba-dirty
[12:03:08.605] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C15.dat
[12:03:08.605] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[12:03:08.606] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//defaultMaskFile.dat
[12:03:08.606] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters_C15.dat
[12:03:08.668] <TB3> INFO: clk: 4
[12:03:08.668] <TB3> INFO: ctr: 4
[12:03:08.668] <TB3> INFO: sda: 19
[12:03:08.668] <TB3> INFO: tin: 9
[12:03:08.668] <TB3> INFO: level: 15
[12:03:08.668] <TB3> INFO: triggerdelay: 0
[12:03:08.668] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[12:03:08.669] <TB3> INFO: Log level: INFO
[12:03:08.678] <TB3> INFO: Found DTB DTB_WWVASW
[12:03:08.686] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[12:03:08.688] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:03:08.690] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:03:10.187] <TB3> INFO: DUT info:
[12:03:10.187] <TB3> INFO: The DUT currently contains the following objects:
[12:03:10.187] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:03:10.187] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:03:10.187] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:03:10.187] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:03:10.187] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:03:10.187] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:03:10.188] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.188] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:03:10.589] <TB3> INFO: enter 'restricted' command line mode
[12:03:10.589] <TB3> INFO: enter test to run
[12:03:10.589] <TB3> INFO: test: pretest no parameter change
[12:03:10.589] <TB3> INFO: running: pretest
[12:03:10.596] <TB3> INFO: ######################################################################
[12:03:10.596] <TB3> INFO: PixTestPretest::doTest()
[12:03:10.596] <TB3> INFO: ######################################################################
[12:03:10.597] <TB3> INFO: ----------------------------------------------------------------------
[12:03:10.597] <TB3> INFO: PixTestPretest::programROC()
[12:03:10.597] <TB3> INFO: ----------------------------------------------------------------------
[12:03:28.612] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:03:28.612] <TB3> INFO: IA differences per ROC: 19.3 17.7 20.1 17.7 21.7 20.1 19.3 17.7 20.1 20.9 18.5 19.3 17.7 18.5 20.1 19.3
[12:03:28.684] <TB3> INFO: ----------------------------------------------------------------------
[12:03:28.684] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:03:28.684] <TB3> INFO: ----------------------------------------------------------------------
[12:03:49.986] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[12:03:49.986] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 20.1 19.3 20.1 20.1 19.3 20.1 20.1 20.1 20.1 19.3 20.1 20.1 20.1 19.3
[12:03:50.017] <TB3> INFO: ----------------------------------------------------------------------
[12:03:50.017] <TB3> INFO: PixTestPretest::findTiming()
[12:03:50.017] <TB3> INFO: ----------------------------------------------------------------------
[12:03:50.017] <TB3> INFO: PixTestCmd::init()

[12:04:22.227] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:04:22.227] <TB3> INFO: (success/tries = 100/100), width = 4
[12:04:23.734] <TB3> INFO: ----------------------------------------------------------------------
[12:04:23.734] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:04:23.734] <TB3> INFO: ----------------------------------------------------------------------
[12:04:23.828] <TB3> INFO: Expecting 231680 events.
[12:04:33.680] <TB3> INFO: 231680 events read in total (9260ms).
[12:04:33.691] <TB3> INFO: Test took 9953ms.
[12:04:33.946] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:04:33.981] <TB3> INFO: ----------------------------------------------------------------------
[12:04:33.981] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:04:33.981] <TB3> INFO: ----------------------------------------------------------------------
[12:04:34.076] <TB3> INFO: Expecting 231680 events.
[12:04:44.118] <TB3> INFO: 231680 events read in total (9450ms).
[12:04:44.130] <TB3> INFO: Test took 10144ms.
[12:04:44.386] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:04:44.386] <TB3> INFO: CalDel: 107 92 81 79 78 78 91 83 80 82 71 95 82 102 93 84
[12:04:44.386] <TB3> INFO: VthrComp: 51 51 51 51 52 51 51 51 51 51 51 51 51 51 51 51
[12:04:44.388] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C0.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C1.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C2.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C3.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C4.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C5.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C6.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C7.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C8.dat
[12:04:44.389] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C9.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C10.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C11.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C12.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C13.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C14.dat
[12:04:44.390] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters_C15.dat
[12:04:44.390] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[12:04:44.390] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[12:04:44.390] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[12:04:44.390] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[12:04:44.390] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[12:04:44.443] <TB3> INFO: enter test to run
[12:04:44.443] <TB3> INFO: test: fulltest no parameter change
[12:04:44.443] <TB3> INFO: running: fulltest
[12:04:44.444] <TB3> INFO: ######################################################################
[12:04:44.444] <TB3> INFO: PixTestFullTest::doTest()
[12:04:44.444] <TB3> INFO: ######################################################################
[12:04:44.445] <TB3> INFO: ######################################################################
[12:04:44.445] <TB3> INFO: PixTestAlive::doTest()
[12:04:44.445] <TB3> INFO: ######################################################################
[12:04:44.446] <TB3> INFO: ----------------------------------------------------------------------
[12:04:44.446] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:04:44.446] <TB3> INFO: ----------------------------------------------------------------------
[12:04:44.688] <TB3> INFO: Expecting 41600 events.
[12:04:48.248] <TB3> INFO: 41600 events read in total (2968ms).
[12:04:48.249] <TB3> INFO: Test took 3802ms.
[12:04:48.478] <TB3> INFO: PixTestAlive::aliveTest() done
[12:04:48.479] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:04:48.480] <TB3> INFO: ----------------------------------------------------------------------
[12:04:48.480] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:04:48.480] <TB3> INFO: ----------------------------------------------------------------------
[12:04:48.725] <TB3> INFO: Expecting 41600 events.
[12:04:51.658] <TB3> INFO: 41600 events read in total (2341ms).
[12:04:51.658] <TB3> INFO: Test took 3176ms.
[12:04:51.659] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:04:51.906] <TB3> INFO: PixTestAlive::maskTest() done
[12:04:51.907] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:04:51.908] <TB3> INFO: ----------------------------------------------------------------------
[12:04:51.908] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:04:51.908] <TB3> INFO: ----------------------------------------------------------------------
[12:04:52.152] <TB3> INFO: Expecting 41600 events.
[12:04:55.685] <TB3> INFO: 41600 events read in total (2941ms).
[12:04:55.686] <TB3> INFO: Test took 3776ms.
[12:04:55.916] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:04:55.916] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:04:55.917] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:04:55.917] <TB3> INFO: Decoding statistics:
[12:04:55.917] <TB3> INFO: General information:
[12:04:55.917] <TB3> INFO: 16bit words read: 0
[12:04:55.917] <TB3> INFO: valid events total: 0
[12:04:55.917] <TB3> INFO: empty events: 0
[12:04:55.917] <TB3> INFO: valid events with pixels: 0
[12:04:55.917] <TB3> INFO: valid pixel hits: 0
[12:04:55.917] <TB3> INFO: Event errors: 0
[12:04:55.917] <TB3> INFO: start marker: 0
[12:04:55.917] <TB3> INFO: stop marker: 0
[12:04:55.917] <TB3> INFO: overflow: 0
[12:04:55.917] <TB3> INFO: invalid 5bit words: 0
[12:04:55.917] <TB3> INFO: invalid XOR eye diagram: 0
[12:04:55.917] <TB3> INFO: frame (failed synchr.): 0
[12:04:55.917] <TB3> INFO: idle data (no TBM trl): 0
[12:04:55.917] <TB3> INFO: no data (only TBM hdr): 0
[12:04:55.917] <TB3> INFO: TBM errors: 0
[12:04:55.917] <TB3> INFO: flawed TBM headers: 0
[12:04:55.917] <TB3> INFO: flawed TBM trailers: 0
[12:04:55.917] <TB3> INFO: event ID mismatches: 0
[12:04:55.917] <TB3> INFO: ROC errors: 0
[12:04:55.917] <TB3> INFO: missing ROC header(s): 0
[12:04:55.917] <TB3> INFO: misplaced readback start: 0
[12:04:55.917] <TB3> INFO: Pixel decoding errors: 0
[12:04:55.917] <TB3> INFO: pixel data incomplete: 0
[12:04:55.917] <TB3> INFO: pixel address: 0
[12:04:55.917] <TB3> INFO: pulse height fill bit: 0
[12:04:55.917] <TB3> INFO: buffer corruption: 0
[12:04:55.923] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:04:55.924] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[12:04:55.924] <TB3> INFO: ######################################################################
[12:04:55.924] <TB3> INFO: PixTestReadback::doTest()
[12:04:55.925] <TB3> INFO: ######################################################################
[12:04:55.925] <TB3> INFO: ----------------------------------------------------------------------
[12:04:55.925] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:04:55.925] <TB3> INFO: ----------------------------------------------------------------------
[12:05:05.905] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:05:05.905] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:05:05.906] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:05:05.907] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:05:05.907] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:05:05.907] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:05:05.938] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:05:05.938] <TB3> INFO: ----------------------------------------------------------------------
[12:05:05.938] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:05:05.938] <TB3> INFO: ----------------------------------------------------------------------
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:05:15.869] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:05:15.870] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:05:15.898] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:05:15.898] <TB3> INFO: ----------------------------------------------------------------------
[12:05:15.898] <TB3> INFO: PixTestReadback::readbackVbg()
[12:05:15.898] <TB3> INFO: ----------------------------------------------------------------------
[12:05:23.566] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:05:23.566] <TB3> INFO: ----------------------------------------------------------------------
[12:05:23.566] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:05:23.566] <TB3> INFO: ----------------------------------------------------------------------
[12:05:23.566] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156.1calibrated Vbg = 1.21488 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 145.8calibrated Vbg = 1.21265 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.9calibrated Vbg = 1.20508 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 152.2calibrated Vbg = 1.20416 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.5calibrated Vbg = 1.21214 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 161.4calibrated Vbg = 1.21611 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 161.1calibrated Vbg = 1.21326 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 165.6calibrated Vbg = 1.2132 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 146.1calibrated Vbg = 1.20779 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.1calibrated Vbg = 1.20489 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 146.3calibrated Vbg = 1.19746 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 158.8calibrated Vbg = 1.20029 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 164.1calibrated Vbg = 1.20264 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159calibrated Vbg = 1.2107 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.8calibrated Vbg = 1.21121 :::*/*/*/*/
[12:05:23.566] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158.1calibrated Vbg = 1.20693 :::*/*/*/*/
[12:05:23.568] <TB3> INFO: ----------------------------------------------------------------------
[12:05:23.568] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:05:23.568] <TB3> INFO: ----------------------------------------------------------------------
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:08:04.309] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:08:04.310] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:08:04.338] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:08:04.339] <TB3> INFO: PixTestReadback::doTest() done
[12:08:04.339] <TB3> INFO: Decoding statistics:
[12:08:04.339] <TB3> INFO: General information:
[12:08:04.339] <TB3> INFO: 16bit words read: 1536
[12:08:04.339] <TB3> INFO: valid events total: 256
[12:08:04.339] <TB3> INFO: empty events: 256
[12:08:04.340] <TB3> INFO: valid events with pixels: 0
[12:08:04.340] <TB3> INFO: valid pixel hits: 0
[12:08:04.340] <TB3> INFO: Event errors: 0
[12:08:04.340] <TB3> INFO: start marker: 0
[12:08:04.340] <TB3> INFO: stop marker: 0
[12:08:04.340] <TB3> INFO: overflow: 0
[12:08:04.340] <TB3> INFO: invalid 5bit words: 0
[12:08:04.340] <TB3> INFO: invalid XOR eye diagram: 0
[12:08:04.340] <TB3> INFO: frame (failed synchr.): 0
[12:08:04.340] <TB3> INFO: idle data (no TBM trl): 0
[12:08:04.340] <TB3> INFO: no data (only TBM hdr): 0
[12:08:04.340] <TB3> INFO: TBM errors: 0
[12:08:04.340] <TB3> INFO: flawed TBM headers: 0
[12:08:04.340] <TB3> INFO: flawed TBM trailers: 0
[12:08:04.340] <TB3> INFO: event ID mismatches: 0
[12:08:04.340] <TB3> INFO: ROC errors: 0
[12:08:04.340] <TB3> INFO: missing ROC header(s): 0
[12:08:04.340] <TB3> INFO: misplaced readback start: 0
[12:08:04.340] <TB3> INFO: Pixel decoding errors: 0
[12:08:04.340] <TB3> INFO: pixel data incomplete: 0
[12:08:04.340] <TB3> INFO: pixel address: 0
[12:08:04.340] <TB3> INFO: pulse height fill bit: 0
[12:08:04.340] <TB3> INFO: buffer corruption: 0
[12:08:04.389] <TB3> INFO: ######################################################################
[12:08:04.389] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:08:04.389] <TB3> INFO: ######################################################################
[12:08:04.392] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:08:04.474] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:08:04.474] <TB3> INFO: run 1 of 1
[12:08:04.711] <TB3> INFO: Expecting 3120000 events.
[12:08:36.203] <TB3> INFO: 666510 events read in total (30898ms).











[12:09:06.485] <TB3> INFO: 1327615 events read in total (61180ms).





















[12:09:36.966] <TB3> INFO: 1986000 events read in total (91661ms).











[12:10:07.508] <TB3> INFO: 2647030 events read in total (122203ms).











[12:10:29.920] <TB3> INFO: 3120000 events read in total (144615ms).
[12:10:30.073] <TB3> INFO: Test took 145600ms.
[12:10:54.513] <TB3> INFO: PixTestBBMap::doTest() done with 21 decoding errors: , duration: 170 seconds
[12:10:54.513] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 210 0 0 0 0
[12:10:54.513] <TB3> INFO: separation cut (per ROC): 101 107 106 107 114 107 107 112 109 111 109 105 116 111 106 110
[12:10:54.513] <TB3> INFO: Decoding statistics:
[12:10:54.513] <TB3> INFO: General information:
[12:10:54.513] <TB3> INFO: 16bit words read: 0
[12:10:54.513] <TB3> INFO: valid events total: 0
[12:10:54.513] <TB3> INFO: empty events: 0
[12:10:54.513] <TB3> INFO: valid events with pixels: 0
[12:10:54.513] <TB3> INFO: valid pixel hits: 0
[12:10:54.513] <TB3> INFO: Event errors: 0
[12:10:54.513] <TB3> INFO: start marker: 0
[12:10:54.513] <TB3> INFO: stop marker: 0
[12:10:54.513] <TB3> INFO: overflow: 0
[12:10:54.513] <TB3> INFO: invalid 5bit words: 0
[12:10:54.513] <TB3> INFO: invalid XOR eye diagram: 0
[12:10:54.513] <TB3> INFO: frame (failed synchr.): 0
[12:10:54.513] <TB3> INFO: idle data (no TBM trl): 0
[12:10:54.513] <TB3> INFO: no data (only TBM hdr): 0
[12:10:54.513] <TB3> INFO: TBM errors: 0
[12:10:54.513] <TB3> INFO: flawed TBM headers: 0
[12:10:54.513] <TB3> INFO: flawed TBM trailers: 0
[12:10:54.513] <TB3> INFO: event ID mismatches: 0
[12:10:54.513] <TB3> INFO: ROC errors: 0
[12:10:54.513] <TB3> INFO: missing ROC header(s): 0
[12:10:54.513] <TB3> INFO: misplaced readback start: 0
[12:10:54.513] <TB3> INFO: Pixel decoding errors: 0
[12:10:54.513] <TB3> INFO: pixel data incomplete: 0
[12:10:54.513] <TB3> INFO: pixel address: 0
[12:10:54.513] <TB3> INFO: pulse height fill bit: 0
[12:10:54.513] <TB3> INFO: buffer corruption: 0
[12:10:54.586] <TB3> INFO: ######################################################################
[12:10:54.586] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:10:54.586] <TB3> INFO: ######################################################################
[12:10:54.586] <TB3> INFO: ----------------------------------------------------------------------
[12:10:54.586] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:10:54.586] <TB3> INFO: ----------------------------------------------------------------------
[12:10:54.586] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:10:54.601] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:10:54.601] <TB3> INFO: run 1 of 1
[12:10:54.877] <TB3> INFO: Expecting 36608000 events.
[12:11:18.331] <TB3> INFO: 691100 events read in total (22862ms).
[12:11:41.746] <TB3> INFO: 1368800 events read in total (46277ms).
[12:12:04.874] <TB3> INFO: 2045550 events read in total (69405ms).
[12:12:27.766] <TB3> INFO: 2722500 events read in total (92297ms).
[12:12:50.989] <TB3> INFO: 3399000 events read in total (115520ms).
[12:13:14.473] <TB3> INFO: 4079050 events read in total (139004ms).
[12:13:37.631] <TB3> INFO: 4756750 events read in total (162162ms).
[12:14:00.870] <TB3> INFO: 5433350 events read in total (185401ms).
[12:14:24.444] <TB3> INFO: 6108650 events read in total (208975ms).
[12:14:48.199] <TB3> INFO: 6783150 events read in total (232730ms).
[12:15:11.834] <TB3> INFO: 7459850 events read in total (256365ms).
[12:15:35.421] <TB3> INFO: 8137900 events read in total (279952ms).
[12:15:58.690] <TB3> INFO: 8814550 events read in total (303221ms).
[12:16:22.149] <TB3> INFO: 9491500 events read in total (326680ms).
[12:16:45.158] <TB3> INFO: 10168700 events read in total (349689ms).
[12:17:08.340] <TB3> INFO: 10845650 events read in total (372871ms).
[12:17:31.401] <TB3> INFO: 11521900 events read in total (395932ms).
[12:17:54.291] <TB3> INFO: 12198800 events read in total (418822ms).
[12:18:17.229] <TB3> INFO: 12872850 events read in total (441760ms).
[12:18:40.327] <TB3> INFO: 13547900 events read in total (464858ms).
[12:19:03.453] <TB3> INFO: 14223650 events read in total (487984ms).
[12:19:26.962] <TB3> INFO: 14897300 events read in total (511493ms).
[12:19:50.541] <TB3> INFO: 15572100 events read in total (535072ms).
[12:20:13.935] <TB3> INFO: 16244100 events read in total (558466ms).
[12:20:37.029] <TB3> INFO: 16919550 events read in total (581560ms).
[12:20:59.738] <TB3> INFO: 17590200 events read in total (604269ms).
[12:21:22.727] <TB3> INFO: 18261800 events read in total (627258ms).
[12:21:45.727] <TB3> INFO: 18934000 events read in total (650258ms).
[12:22:08.658] <TB3> INFO: 19604200 events read in total (673189ms).
[12:22:31.618] <TB3> INFO: 20274500 events read in total (696149ms).
[12:22:54.781] <TB3> INFO: 20945300 events read in total (719312ms).
[12:23:17.559] <TB3> INFO: 21616250 events read in total (742090ms).
[12:23:40.631] <TB3> INFO: 22286850 events read in total (765162ms).
[12:24:03.719] <TB3> INFO: 22956800 events read in total (788250ms).
[12:24:26.483] <TB3> INFO: 23625800 events read in total (811014ms).
[12:24:49.037] <TB3> INFO: 24294700 events read in total (833568ms).
[12:25:11.865] <TB3> INFO: 24963750 events read in total (856396ms).
[12:25:35.079] <TB3> INFO: 25632500 events read in total (879610ms).
[12:25:57.879] <TB3> INFO: 26302000 events read in total (902410ms).
[12:26:20.618] <TB3> INFO: 26970200 events read in total (925149ms).
[12:26:43.649] <TB3> INFO: 27638800 events read in total (948180ms).
[12:27:06.515] <TB3> INFO: 28306950 events read in total (971046ms).
[12:27:29.332] <TB3> INFO: 28975750 events read in total (993863ms).
[12:27:52.164] <TB3> INFO: 29644100 events read in total (1016695ms).
[12:28:14.839] <TB3> INFO: 30309650 events read in total (1039370ms).
[12:28:37.689] <TB3> INFO: 30975700 events read in total (1062220ms).
[12:29:00.903] <TB3> INFO: 31642350 events read in total (1085434ms).
[12:29:23.719] <TB3> INFO: 32309400 events read in total (1108250ms).
[12:29:46.689] <TB3> INFO: 32976200 events read in total (1131220ms).
[12:30:09.926] <TB3> INFO: 33644650 events read in total (1154457ms).
[12:30:33.205] <TB3> INFO: 34311550 events read in total (1177736ms).
[12:30:55.872] <TB3> INFO: 34979100 events read in total (1200403ms).
[12:31:18.715] <TB3> INFO: 35649000 events read in total (1223246ms).
[12:31:43.234] <TB3> INFO: 36326150 events read in total (1247765ms).
[12:31:53.810] <TB3> INFO: 36608000 events read in total (1258341ms).
[12:31:53.959] <TB3> INFO: Test took 1259358ms.
[12:31:54.306] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:31:55.742] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:31:57.161] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:31:58.570] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:31:59.976] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:01.449] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:02.901] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:04.836] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:07.035] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:08.764] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:10.667] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:12.516] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:14.498] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:16.264] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:17.680] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:19.298] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:32:21.275] <TB3> INFO: PixTestScurves::scurves() done
[12:32:21.275] <TB3> INFO: Vcal mean: 113.64 119.80 123.07 117.25 132.89 130.80 118.37 132.45 131.94 125.10 117.36 117.83 129.54 123.35 118.73 120.85
[12:32:21.275] <TB3> INFO: Vcal RMS: 4.81 5.21 5.91 5.11 5.78 6.20 5.79 6.96 6.42 6.25 6.42 5.35 5.76 6.33 5.63 5.61
[12:32:21.275] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1286 seconds
[12:32:21.275] <TB3> INFO: Decoding statistics:
[12:32:21.275] <TB3> INFO: General information:
[12:32:21.275] <TB3> INFO: 16bit words read: 0
[12:32:21.275] <TB3> INFO: valid events total: 0
[12:32:21.275] <TB3> INFO: empty events: 0
[12:32:21.275] <TB3> INFO: valid events with pixels: 0
[12:32:21.275] <TB3> INFO: valid pixel hits: 0
[12:32:21.275] <TB3> INFO: Event errors: 0
[12:32:21.275] <TB3> INFO: start marker: 0
[12:32:21.275] <TB3> INFO: stop marker: 0
[12:32:21.275] <TB3> INFO: overflow: 0
[12:32:21.275] <TB3> INFO: invalid 5bit words: 0
[12:32:21.275] <TB3> INFO: invalid XOR eye diagram: 0
[12:32:21.275] <TB3> INFO: frame (failed synchr.): 0
[12:32:21.276] <TB3> INFO: idle data (no TBM trl): 0
[12:32:21.276] <TB3> INFO: no data (only TBM hdr): 0
[12:32:21.276] <TB3> INFO: TBM errors: 0
[12:32:21.276] <TB3> INFO: flawed TBM headers: 0
[12:32:21.276] <TB3> INFO: flawed TBM trailers: 0
[12:32:21.276] <TB3> INFO: event ID mismatches: 0
[12:32:21.276] <TB3> INFO: ROC errors: 0
[12:32:21.276] <TB3> INFO: missing ROC header(s): 0
[12:32:21.276] <TB3> INFO: misplaced readback start: 0
[12:32:21.276] <TB3> INFO: Pixel decoding errors: 0
[12:32:21.276] <TB3> INFO: pixel data incomplete: 0
[12:32:21.276] <TB3> INFO: pixel address: 0
[12:32:21.276] <TB3> INFO: pulse height fill bit: 0
[12:32:21.276] <TB3> INFO: buffer corruption: 0
[12:32:21.345] <TB3> INFO: ######################################################################
[12:32:21.345] <TB3> INFO: PixTestTrim::doTest()
[12:32:21.345] <TB3> INFO: ######################################################################
[12:32:21.346] <TB3> INFO: ----------------------------------------------------------------------
[12:32:21.346] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:32:21.346] <TB3> INFO: ----------------------------------------------------------------------
[12:32:21.403] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:32:21.403] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:32:21.417] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:32:21.417] <TB3> INFO: run 1 of 1
[12:32:21.701] <TB3> INFO: Expecting 5025280 events.
[12:32:52.322] <TB3> INFO: 830088 events read in total (30018ms).
[12:33:22.360] <TB3> INFO: 1657592 events read in total (60056ms).
[12:33:52.515] <TB3> INFO: 2482896 events read in total (90212ms).
[12:34:23.019] <TB3> INFO: 3306040 events read in total (120715ms).
[12:34:53.137] <TB3> INFO: 4124992 events read in total (150834ms).
[12:35:23.310] <TB3> INFO: 4942616 events read in total (181006ms).
[12:35:26.626] <TB3> INFO: 5025280 events read in total (184322ms).
[12:35:26.678] <TB3> INFO: Test took 185261ms.
[12:35:41.953] <TB3> INFO: ROC 0 VthrComp = 119
[12:35:41.953] <TB3> INFO: ROC 1 VthrComp = 123
[12:35:41.954] <TB3> INFO: ROC 2 VthrComp = 126
[12:35:41.954] <TB3> INFO: ROC 3 VthrComp = 126
[12:35:41.954] <TB3> INFO: ROC 4 VthrComp = 137
[12:35:41.954] <TB3> INFO: ROC 5 VthrComp = 134
[12:35:41.954] <TB3> INFO: ROC 6 VthrComp = 123
[12:35:41.954] <TB3> INFO: ROC 7 VthrComp = 130
[12:35:41.954] <TB3> INFO: ROC 8 VthrComp = 134
[12:35:41.954] <TB3> INFO: ROC 9 VthrComp = 129
[12:35:41.954] <TB3> INFO: ROC 10 VthrComp = 127
[12:35:41.954] <TB3> INFO: ROC 11 VthrComp = 113
[12:35:41.954] <TB3> INFO: ROC 12 VthrComp = 132
[12:35:41.954] <TB3> INFO: ROC 13 VthrComp = 129
[12:35:41.955] <TB3> INFO: ROC 14 VthrComp = 120
[12:35:41.955] <TB3> INFO: ROC 15 VthrComp = 130
[12:35:42.217] <TB3> INFO: Expecting 41600 events.
[12:35:45.752] <TB3> INFO: 41600 events read in total (2943ms).
[12:35:45.753] <TB3> INFO: Test took 3797ms.
[12:35:45.762] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:35:45.762] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:35:45.773] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:35:45.773] <TB3> INFO: run 1 of 1
[12:35:46.051] <TB3> INFO: Expecting 5025280 events.
[12:36:12.523] <TB3> INFO: 590080 events read in total (25880ms).
[12:36:38.566] <TB3> INFO: 1178920 events read in total (51923ms).
[12:37:04.515] <TB3> INFO: 1768312 events read in total (77872ms).
[12:37:30.159] <TB3> INFO: 2357120 events read in total (103516ms).
[12:37:56.113] <TB3> INFO: 2944344 events read in total (129470ms).
[12:38:22.222] <TB3> INFO: 3530480 events read in total (155579ms).
[12:38:48.246] <TB3> INFO: 4115000 events read in total (181603ms).
[12:39:14.093] <TB3> INFO: 4698456 events read in total (207450ms).
[12:39:29.020] <TB3> INFO: 5025280 events read in total (222377ms).
[12:39:29.161] <TB3> INFO: Test took 223388ms.
[12:39:51.973] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.8977 for pixel 0/76 mean/min/max = 44.7335/32.5587/56.9083
[12:39:51.973] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 58.7531 for pixel 11/8 mean/min/max = 45.925/32.9814/58.8685
[12:39:51.973] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.2269 for pixel 20/72 mean/min/max = 46.2724/33.0979/59.4468
[12:39:51.974] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 56.6052 for pixel 28/10 mean/min/max = 44.3214/31.6558/56.987
[12:39:51.974] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 67.4111 for pixel 17/0 mean/min/max = 52.5091/36.9959/68.0223
[12:39:51.975] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 60.75 for pixel 20/78 mean/min/max = 47.0809/33.3513/60.8105
[12:39:51.975] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.9284 for pixel 6/79 mean/min/max = 46.0078/30.9547/61.0609
[12:39:51.976] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 66.2869 for pixel 0/30 mean/min/max = 48.4608/30.5492/66.3724
[12:39:51.976] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 63.1776 for pixel 41/24 mean/min/max = 49.5543/35.9167/63.1919
[12:39:51.977] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.0478 for pixel 17/10 mean/min/max = 46.429/32.806/60.0521
[12:39:51.977] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.9123 for pixel 2/71 mean/min/max = 44.7167/31.4865/57.947
[12:39:51.978] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 63.2141 for pixel 40/7 mean/min/max = 50.7283/38.1075/63.3491
[12:39:51.978] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.8502 for pixel 15/1 mean/min/max = 48.1932/35.5353/60.8511
[12:39:51.979] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.8338 for pixel 18/79 mean/min/max = 45.7022/32.5085/58.896
[12:39:51.979] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 62.6629 for pixel 4/26 mean/min/max = 47.2409/31.7974/62.6845
[12:39:51.980] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 56.4183 for pixel 43/1 mean/min/max = 43.8025/31.1404/56.4645
[12:39:51.980] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:52.069] <TB3> INFO: Expecting 411648 events.
[12:40:01.489] <TB3> INFO: 411648 events read in total (8828ms).
[12:40:01.496] <TB3> INFO: Expecting 411648 events.
[12:40:10.849] <TB3> INFO: 411648 events read in total (8950ms).
[12:40:10.860] <TB3> INFO: Expecting 411648 events.
[12:40:20.209] <TB3> INFO: 411648 events read in total (8946ms).
[12:40:20.225] <TB3> INFO: Expecting 411648 events.
[12:40:29.483] <TB3> INFO: 411648 events read in total (8855ms).
[12:40:29.500] <TB3> INFO: Expecting 411648 events.
[12:40:38.921] <TB3> INFO: 411648 events read in total (9018ms).
[12:40:38.940] <TB3> INFO: Expecting 411648 events.
[12:40:48.269] <TB3> INFO: 411648 events read in total (8926ms).
[12:40:48.291] <TB3> INFO: Expecting 411648 events.
[12:40:57.591] <TB3> INFO: 411648 events read in total (8896ms).
[12:40:57.615] <TB3> INFO: Expecting 411648 events.
[12:41:06.926] <TB3> INFO: 411648 events read in total (8908ms).
[12:41:06.953] <TB3> INFO: Expecting 411648 events.
[12:41:16.299] <TB3> INFO: 411648 events read in total (8943ms).
[12:41:16.338] <TB3> INFO: Expecting 411648 events.
[12:41:25.667] <TB3> INFO: 411648 events read in total (8925ms).
[12:41:25.710] <TB3> INFO: Expecting 411648 events.
[12:41:35.112] <TB3> INFO: 411648 events read in total (8999ms).
[12:41:35.174] <TB3> INFO: Expecting 411648 events.
[12:41:44.541] <TB3> INFO: 411648 events read in total (8964ms).
[12:41:44.585] <TB3> INFO: Expecting 411648 events.
[12:41:54.042] <TB3> INFO: 411648 events read in total (9054ms).
[12:41:54.093] <TB3> INFO: Expecting 411648 events.
[12:42:03.416] <TB3> INFO: 411648 events read in total (8920ms).
[12:42:03.476] <TB3> INFO: Expecting 411648 events.
[12:42:12.731] <TB3> INFO: 411648 events read in total (8852ms).
[12:42:12.794] <TB3> INFO: Expecting 411648 events.
[12:42:22.047] <TB3> INFO: 411648 events read in total (8850ms).
[12:42:22.126] <TB3> INFO: Test took 150146ms.
[12:42:22.937] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:42:22.953] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:42:22.953] <TB3> INFO: run 1 of 1
[12:42:23.192] <TB3> INFO: Expecting 5025280 events.
[12:42:49.709] <TB3> INFO: 587624 events read in total (25925ms).
[12:43:15.663] <TB3> INFO: 1173176 events read in total (51879ms).
[12:43:41.678] <TB3> INFO: 1759144 events read in total (77894ms).
[12:44:07.748] <TB3> INFO: 2344496 events read in total (103964ms).
[12:44:34.823] <TB3> INFO: 2930920 events read in total (131040ms).
[12:45:01.422] <TB3> INFO: 3516136 events read in total (157638ms).
[12:45:27.868] <TB3> INFO: 4101776 events read in total (184084ms).
[12:45:54.263] <TB3> INFO: 4686312 events read in total (210479ms).
[12:46:09.843] <TB3> INFO: 5025280 events read in total (226059ms).
[12:46:09.992] <TB3> INFO: Test took 227039ms.
[12:46:33.092] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.091811 .. 143.937784
[12:46:33.418] <TB3> INFO: Expecting 208000 events.
[12:46:43.356] <TB3> INFO: 208000 events read in total (9347ms).
[12:46:43.358] <TB3> INFO: Test took 10264ms.
[12:46:43.406] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 153 (-1/-1) hits flags = 528 (plus default)
[12:46:43.419] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:46:43.419] <TB3> INFO: run 1 of 1
[12:46:43.698] <TB3> INFO: Expecting 5125120 events.
[12:47:10.279] <TB3> INFO: 586104 events read in total (25989ms).
[12:47:36.429] <TB3> INFO: 1172472 events read in total (52142ms).
[12:48:01.991] <TB3> INFO: 1759032 events read in total (77701ms).
[12:48:28.158] <TB3> INFO: 2345256 events read in total (103868ms).
[12:48:54.507] <TB3> INFO: 2931752 events read in total (130217ms).
[12:49:20.605] <TB3> INFO: 3517680 events read in total (156315ms).
[12:49:46.623] <TB3> INFO: 4103160 events read in total (182333ms).
[12:50:12.774] <TB3> INFO: 4688336 events read in total (208484ms).
[12:50:32.766] <TB3> INFO: 5125120 events read in total (228476ms).
[12:50:32.952] <TB3> INFO: Test took 229534ms.
[12:51:00.112] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.412246 .. 44.892197
[12:51:00.375] <TB3> INFO: Expecting 208000 events.
[12:51:09.997] <TB3> INFO: 208000 events read in total (9031ms).
[12:51:09.998] <TB3> INFO: Test took 9884ms.
[12:51:10.047] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 54 (-1/-1) hits flags = 528 (plus default)
[12:51:10.061] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:51:10.061] <TB3> INFO: run 1 of 1
[12:51:10.340] <TB3> INFO: Expecting 1297920 events.
[12:51:38.942] <TB3> INFO: 668312 events read in total (28011ms).
[12:52:05.238] <TB3> INFO: 1297920 events read in total (54307ms).
[12:52:05.282] <TB3> INFO: Test took 55222ms.
[12:52:19.593] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.672034 .. 49.536875
[12:52:19.909] <TB3> INFO: Expecting 208000 events.
[12:52:29.856] <TB3> INFO: 208000 events read in total (9356ms).
[12:52:29.856] <TB3> INFO: Test took 10262ms.
[12:52:29.912] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[12:52:29.926] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:52:29.926] <TB3> INFO: run 1 of 1
[12:52:30.208] <TB3> INFO: Expecting 1464320 events.
[12:52:58.242] <TB3> INFO: 650064 events read in total (27443ms).
[12:53:26.418] <TB3> INFO: 1299184 events read in total (55620ms).
[12:53:34.029] <TB3> INFO: 1464320 events read in total (63230ms).
[12:53:34.064] <TB3> INFO: Test took 64139ms.
[12:53:48.467] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.404151 .. 53.347169
[12:53:48.746] <TB3> INFO: Expecting 208000 events.
[12:53:58.512] <TB3> INFO: 208000 events read in total (9175ms).
[12:53:58.513] <TB3> INFO: Test took 10045ms.
[12:53:58.562] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 63 (-1/-1) hits flags = 528 (plus default)
[12:53:58.575] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:53:58.575] <TB3> INFO: run 1 of 1
[12:53:58.854] <TB3> INFO: Expecting 1630720 events.
[12:54:26.919] <TB3> INFO: 641168 events read in total (27474ms).
[12:54:54.455] <TB3> INFO: 1282040 events read in total (55010ms).
[12:55:09.509] <TB3> INFO: 1630720 events read in total (70064ms).
[12:55:09.560] <TB3> INFO: Test took 70985ms.
[12:55:23.256] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:55:23.256] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:55:23.269] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:55:23.269] <TB3> INFO: run 1 of 1
[12:55:23.508] <TB3> INFO: Expecting 1364480 events.
[12:55:51.943] <TB3> INFO: 668376 events read in total (27843ms).
[12:56:20.748] <TB3> INFO: 1336744 events read in total (56648ms).
[12:56:22.373] <TB3> INFO: 1364480 events read in total (58273ms).
[12:56:22.406] <TB3> INFO: Test took 59138ms.
[12:56:35.484] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C0.dat
[12:56:35.484] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C1.dat
[12:56:35.484] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C2.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C3.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C4.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C5.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C6.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C7.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C8.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C9.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C10.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C11.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C12.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C13.dat
[12:56:35.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C14.dat
[12:56:35.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C15.dat
[12:56:35.486] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C0.dat
[12:56:35.492] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C1.dat
[12:56:35.497] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C2.dat
[12:56:35.502] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C3.dat
[12:56:35.507] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C4.dat
[12:56:35.512] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C5.dat
[12:56:35.518] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C6.dat
[12:56:35.523] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C7.dat
[12:56:35.528] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C8.dat
[12:56:35.533] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C9.dat
[12:56:35.538] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C10.dat
[12:56:35.543] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C11.dat
[12:56:35.548] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C12.dat
[12:56:35.554] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C13.dat
[12:56:35.558] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C14.dat
[12:56:35.563] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters35_C15.dat
[12:56:35.568] <TB3> INFO: PixTestTrim::trimTest() done
[12:56:35.568] <TB3> INFO: vtrim: 111 126 125 112 177 137 140 143 147 130 137 156 128 133 135 122
[12:56:35.568] <TB3> INFO: vthrcomp: 119 123 126 126 137 134 123 130 134 129 127 113 132 129 120 130
[12:56:35.568] <TB3> INFO: vcal mean: 35.02 35.05 35.07 34.99 35.63 35.11 35.00 35.28 35.35 35.01 34.95 35.83 35.02 34.99 35.03 34.92
[12:56:35.568] <TB3> INFO: vcal RMS: 1.01 1.07 1.17 1.04 1.90 1.15 1.08 1.43 1.42 1.02 0.98 2.24 1.06 1.01 1.16 1.10
[12:56:35.568] <TB3> INFO: bits mean: 9.09 9.54 9.13 10.07 8.68 9.39 9.80 9.38 8.61 9.34 9.88 9.00 8.51 9.46 9.63 10.30
[12:56:35.568] <TB3> INFO: bits RMS: 2.94 2.59 2.72 2.59 2.35 2.57 2.73 2.89 2.38 2.66 2.74 2.23 2.45 2.65 2.64 2.56
[12:56:35.583] <TB3> INFO: ----------------------------------------------------------------------
[12:56:35.583] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:56:35.583] <TB3> INFO: ----------------------------------------------------------------------
[12:56:35.586] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:56:35.598] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:56:35.598] <TB3> INFO: run 1 of 1
[12:56:35.864] <TB3> INFO: Expecting 4160000 events.
[12:57:08.504] <TB3> INFO: 763045 events read in total (32048ms).
[12:57:40.753] <TB3> INFO: 1523675 events read in total (64297ms).
[12:58:12.827] <TB3> INFO: 2279150 events read in total (96371ms).
[12:58:44.917] <TB3> INFO: 3030750 events read in total (128461ms).
[12:59:16.728] <TB3> INFO: 3779695 events read in total (160272ms).
[12:59:32.736] <TB3> INFO: 4160000 events read in total (176280ms).
[12:59:32.896] <TB3> INFO: Test took 177298ms.
[12:59:56.586] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[12:59:56.599] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:59:56.599] <TB3> INFO: run 1 of 1
[12:59:56.835] <TB3> INFO: Expecting 4430400 events.
[13:00:28.798] <TB3> INFO: 723005 events read in total (31372ms).
[13:01:00.018] <TB3> INFO: 1443550 events read in total (62592ms).
[13:01:31.014] <TB3> INFO: 2160535 events read in total (93588ms).
[13:02:02.395] <TB3> INFO: 2875035 events read in total (124969ms).
[13:02:33.320] <TB3> INFO: 3586860 events read in total (155894ms).
[13:03:04.889] <TB3> INFO: 4297835 events read in total (187463ms).
[13:03:11.174] <TB3> INFO: 4430400 events read in total (193748ms).
[13:03:11.338] <TB3> INFO: Test took 194740ms.
[13:03:40.204] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[13:03:40.216] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:03:40.216] <TB3> INFO: run 1 of 1
[13:03:40.455] <TB3> INFO: Expecting 4264000 events.
[13:04:12.600] <TB3> INFO: 733055 events read in total (31553ms).
[13:04:44.058] <TB3> INFO: 1463310 events read in total (63011ms).
[13:05:15.672] <TB3> INFO: 2190455 events read in total (94626ms).
[13:05:46.951] <TB3> INFO: 2914000 events read in total (125904ms).
[13:06:18.390] <TB3> INFO: 3634645 events read in total (157343ms).
[13:06:46.240] <TB3> INFO: 4264000 events read in total (185193ms).
[13:06:46.348] <TB3> INFO: Test took 186132ms.
[13:07:15.628] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[13:07:15.642] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:07:15.642] <TB3> INFO: run 1 of 1
[13:07:15.878] <TB3> INFO: Expecting 4243200 events.
[13:07:48.100] <TB3> INFO: 734365 events read in total (31630ms).
[13:08:19.652] <TB3> INFO: 1466755 events read in total (63182ms).
[13:08:51.094] <TB3> INFO: 2195365 events read in total (94624ms).
[13:09:23.082] <TB3> INFO: 2919975 events read in total (126612ms).
[13:09:54.559] <TB3> INFO: 3642675 events read in total (158089ms).
[13:10:20.615] <TB3> INFO: 4243200 events read in total (184145ms).
[13:10:20.703] <TB3> INFO: Test took 185062ms.
[13:10:47.675] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[13:10:47.687] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:10:47.687] <TB3> INFO: run 1 of 1
[13:10:47.923] <TB3> INFO: Expecting 4243200 events.
[13:11:19.960] <TB3> INFO: 735400 events read in total (31445ms).
[13:11:51.257] <TB3> INFO: 1468040 events read in total (62742ms).
[13:12:22.591] <TB3> INFO: 2196660 events read in total (94076ms).
[13:12:53.310] <TB3> INFO: 2921595 events read in total (124795ms).
[13:13:24.569] <TB3> INFO: 3644490 events read in total (156054ms).
[13:13:50.272] <TB3> INFO: 4243200 events read in total (181757ms).
[13:13:50.372] <TB3> INFO: Test took 182684ms.
[13:14:17.617] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:14:17.618] <TB3> INFO: PixTestTrim::doTest() done, duration: 2516 seconds
[13:14:17.618] <TB3> INFO: Decoding statistics:
[13:14:17.618] <TB3> INFO: General information:
[13:14:17.618] <TB3> INFO: 16bit words read: 0
[13:14:17.618] <TB3> INFO: valid events total: 0
[13:14:17.618] <TB3> INFO: empty events: 0
[13:14:17.618] <TB3> INFO: valid events with pixels: 0
[13:14:17.618] <TB3> INFO: valid pixel hits: 0
[13:14:17.618] <TB3> INFO: Event errors: 0
[13:14:17.618] <TB3> INFO: start marker: 0
[13:14:17.618] <TB3> INFO: stop marker: 0
[13:14:17.618] <TB3> INFO: overflow: 0
[13:14:17.618] <TB3> INFO: invalid 5bit words: 0
[13:14:17.618] <TB3> INFO: invalid XOR eye diagram: 0
[13:14:17.618] <TB3> INFO: frame (failed synchr.): 0
[13:14:17.619] <TB3> INFO: idle data (no TBM trl): 0
[13:14:17.619] <TB3> INFO: no data (only TBM hdr): 0
[13:14:17.619] <TB3> INFO: TBM errors: 0
[13:14:17.619] <TB3> INFO: flawed TBM headers: 0
[13:14:17.619] <TB3> INFO: flawed TBM trailers: 0
[13:14:17.619] <TB3> INFO: event ID mismatches: 0
[13:14:17.619] <TB3> INFO: ROC errors: 0
[13:14:17.619] <TB3> INFO: missing ROC header(s): 0
[13:14:17.619] <TB3> INFO: misplaced readback start: 0
[13:14:17.619] <TB3> INFO: Pixel decoding errors: 0
[13:14:17.619] <TB3> INFO: pixel data incomplete: 0
[13:14:17.619] <TB3> INFO: pixel address: 0
[13:14:17.619] <TB3> INFO: pulse height fill bit: 0
[13:14:17.619] <TB3> INFO: buffer corruption: 0
[13:14:18.222] <TB3> INFO: ######################################################################
[13:14:18.222] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:14:18.222] <TB3> INFO: ######################################################################
[13:14:18.490] <TB3> INFO: Expecting 41600 events.
[13:14:22.148] <TB3> INFO: 41600 events read in total (3067ms).
[13:14:22.149] <TB3> INFO: Test took 3926ms.
[13:14:22.633] <TB3> INFO: Expecting 41600 events.
[13:14:26.144] <TB3> INFO: 41600 events read in total (2920ms).
[13:14:26.145] <TB3> INFO: Test took 3792ms.
[13:14:26.435] <TB3> INFO: Expecting 41600 events.
[13:14:29.918] <TB3> INFO: 41600 events read in total (2892ms).
[13:14:29.919] <TB3> INFO: Test took 3749ms.
[13:14:30.222] <TB3> INFO: Expecting 41600 events.
[13:14:34.011] <TB3> INFO: 41600 events read in total (3197ms).
[13:14:34.012] <TB3> INFO: Test took 4069ms.
[13:14:34.304] <TB3> INFO: Expecting 41600 events.
[13:14:37.848] <TB3> INFO: 41600 events read in total (2953ms).
[13:14:37.849] <TB3> INFO: Test took 3810ms.
[13:14:38.140] <TB3> INFO: Expecting 41600 events.
[13:14:41.722] <TB3> INFO: 41600 events read in total (2990ms).
[13:14:41.723] <TB3> INFO: Test took 3847ms.
[13:14:42.015] <TB3> INFO: Expecting 41600 events.
[13:14:45.676] <TB3> INFO: 41600 events read in total (3069ms).
[13:14:45.677] <TB3> INFO: Test took 3930ms.
[13:14:45.984] <TB3> INFO: Expecting 41600 events.
[13:14:49.494] <TB3> INFO: 41600 events read in total (2918ms).
[13:14:49.495] <TB3> INFO: Test took 3794ms.
[13:14:49.787] <TB3> INFO: Expecting 41600 events.
[13:14:53.311] <TB3> INFO: 41600 events read in total (2933ms).
[13:14:53.312] <TB3> INFO: Test took 3791ms.
[13:14:53.602] <TB3> INFO: Expecting 41600 events.
[13:14:57.112] <TB3> INFO: 41600 events read in total (2918ms).
[13:14:57.113] <TB3> INFO: Test took 3776ms.
[13:14:57.402] <TB3> INFO: Expecting 41600 events.
[13:15:00.981] <TB3> INFO: 41600 events read in total (2987ms).
[13:15:00.983] <TB3> INFO: Test took 3846ms.
[13:15:01.288] <TB3> INFO: Expecting 41600 events.
[13:15:04.835] <TB3> INFO: 41600 events read in total (2955ms).
[13:15:04.836] <TB3> INFO: Test took 3829ms.
[13:15:05.127] <TB3> INFO: Expecting 41600 events.
[13:15:08.643] <TB3> INFO: 41600 events read in total (2925ms).
[13:15:08.644] <TB3> INFO: Test took 3782ms.
[13:15:08.978] <TB3> INFO: Expecting 41600 events.
[13:15:12.473] <TB3> INFO: 41600 events read in total (2904ms).
[13:15:12.474] <TB3> INFO: Test took 3805ms.
[13:15:12.781] <TB3> INFO: Expecting 41600 events.
[13:15:16.281] <TB3> INFO: 41600 events read in total (2908ms).
[13:15:16.282] <TB3> INFO: Test took 3781ms.
[13:15:16.571] <TB3> INFO: Expecting 41600 events.
[13:15:20.082] <TB3> INFO: 41600 events read in total (2919ms).
[13:15:20.083] <TB3> INFO: Test took 3776ms.
[13:15:20.372] <TB3> INFO: Expecting 41600 events.
[13:15:23.900] <TB3> INFO: 41600 events read in total (2937ms).
[13:15:23.901] <TB3> INFO: Test took 3793ms.
[13:15:24.191] <TB3> INFO: Expecting 41600 events.
[13:15:27.710] <TB3> INFO: 41600 events read in total (2928ms).
[13:15:27.711] <TB3> INFO: Test took 3785ms.
[13:15:27.000] <TB3> INFO: Expecting 41600 events.
[13:15:31.499] <TB3> INFO: 41600 events read in total (2908ms).
[13:15:31.500] <TB3> INFO: Test took 3765ms.
[13:15:31.789] <TB3> INFO: Expecting 41600 events.
[13:15:35.372] <TB3> INFO: 41600 events read in total (2991ms).
[13:15:35.373] <TB3> INFO: Test took 3849ms.
[13:15:35.662] <TB3> INFO: Expecting 41600 events.
[13:15:39.158] <TB3> INFO: 41600 events read in total (2904ms).
[13:15:39.159] <TB3> INFO: Test took 3762ms.
[13:15:39.449] <TB3> INFO: Expecting 41600 events.
[13:15:43.008] <TB3> INFO: 41600 events read in total (2968ms).
[13:15:43.010] <TB3> INFO: Test took 3826ms.
[13:15:43.304] <TB3> INFO: Expecting 41600 events.
[13:15:46.860] <TB3> INFO: 41600 events read in total (2964ms).
[13:15:46.861] <TB3> INFO: Test took 3822ms.
[13:15:47.151] <TB3> INFO: Expecting 41600 events.
[13:15:50.661] <TB3> INFO: 41600 events read in total (2918ms).
[13:15:50.662] <TB3> INFO: Test took 3776ms.
[13:15:50.952] <TB3> INFO: Expecting 41600 events.
[13:15:54.445] <TB3> INFO: 41600 events read in total (2901ms).
[13:15:54.446] <TB3> INFO: Test took 3759ms.
[13:15:54.742] <TB3> INFO: Expecting 41600 events.
[13:15:58.249] <TB3> INFO: 41600 events read in total (2915ms).
[13:15:58.250] <TB3> INFO: Test took 3780ms.
[13:15:58.540] <TB3> INFO: Expecting 41600 events.
[13:16:02.206] <TB3> INFO: 41600 events read in total (3074ms).
[13:16:02.208] <TB3> INFO: Test took 3933ms.
[13:16:02.501] <TB3> INFO: Expecting 41600 events.
[13:16:06.035] <TB3> INFO: 41600 events read in total (2943ms).
[13:16:06.036] <TB3> INFO: Test took 3801ms.
[13:16:06.329] <TB3> INFO: Expecting 41600 events.
[13:16:09.870] <TB3> INFO: 41600 events read in total (2950ms).
[13:16:09.871] <TB3> INFO: Test took 3808ms.
[13:16:10.161] <TB3> INFO: Expecting 41600 events.
[13:16:13.669] <TB3> INFO: 41600 events read in total (2916ms).
[13:16:13.670] <TB3> INFO: Test took 3774ms.
[13:16:13.961] <TB3> INFO: Expecting 41600 events.
[13:16:17.482] <TB3> INFO: 41600 events read in total (2929ms).
[13:16:17.483] <TB3> INFO: Test took 3787ms.
[13:16:17.774] <TB3> INFO: Expecting 2560 events.
[13:16:18.665] <TB3> INFO: 2560 events read in total (299ms).
[13:16:18.665] <TB3> INFO: Test took 1169ms.
[13:16:18.974] <TB3> INFO: Expecting 2560 events.
[13:16:19.866] <TB3> INFO: 2560 events read in total (300ms).
[13:16:19.867] <TB3> INFO: Test took 1202ms.
[13:16:20.174] <TB3> INFO: Expecting 2560 events.
[13:16:21.067] <TB3> INFO: 2560 events read in total (301ms).
[13:16:21.067] <TB3> INFO: Test took 1199ms.
[13:16:21.375] <TB3> INFO: Expecting 2560 events.
[13:16:22.266] <TB3> INFO: 2560 events read in total (299ms).
[13:16:22.267] <TB3> INFO: Test took 1199ms.
[13:16:22.575] <TB3> INFO: Expecting 2560 events.
[13:16:23.468] <TB3> INFO: 2560 events read in total (302ms).
[13:16:23.469] <TB3> INFO: Test took 1202ms.
[13:16:23.776] <TB3> INFO: Expecting 2560 events.
[13:16:24.665] <TB3> INFO: 2560 events read in total (298ms).
[13:16:24.666] <TB3> INFO: Test took 1197ms.
[13:16:24.973] <TB3> INFO: Expecting 2560 events.
[13:16:25.864] <TB3> INFO: 2560 events read in total (299ms).
[13:16:25.864] <TB3> INFO: Test took 1197ms.
[13:16:26.171] <TB3> INFO: Expecting 2560 events.
[13:16:27.062] <TB3> INFO: 2560 events read in total (300ms).
[13:16:27.062] <TB3> INFO: Test took 1197ms.
[13:16:27.370] <TB3> INFO: Expecting 2560 events.
[13:16:28.254] <TB3> INFO: 2560 events read in total (292ms).
[13:16:28.254] <TB3> INFO: Test took 1191ms.
[13:16:28.562] <TB3> INFO: Expecting 2560 events.
[13:16:29.452] <TB3> INFO: 2560 events read in total (298ms).
[13:16:29.452] <TB3> INFO: Test took 1197ms.
[13:16:29.760] <TB3> INFO: Expecting 2560 events.
[13:16:30.652] <TB3> INFO: 2560 events read in total (300ms).
[13:16:30.652] <TB3> INFO: Test took 1199ms.
[13:16:30.958] <TB3> INFO: Expecting 2560 events.
[13:16:31.852] <TB3> INFO: 2560 events read in total (302ms).
[13:16:31.852] <TB3> INFO: Test took 1199ms.
[13:16:32.160] <TB3> INFO: Expecting 2560 events.
[13:16:33.045] <TB3> INFO: 2560 events read in total (293ms).
[13:16:33.045] <TB3> INFO: Test took 1192ms.
[13:16:33.353] <TB3> INFO: Expecting 2560 events.
[13:16:34.239] <TB3> INFO: 2560 events read in total (295ms).
[13:16:34.240] <TB3> INFO: Test took 1194ms.
[13:16:34.546] <TB3> INFO: Expecting 2560 events.
[13:16:35.443] <TB3> INFO: 2560 events read in total (305ms).
[13:16:35.443] <TB3> INFO: Test took 1202ms.
[13:16:35.751] <TB3> INFO: Expecting 2560 events.
[13:16:36.643] <TB3> INFO: 2560 events read in total (300ms).
[13:16:36.644] <TB3> INFO: Test took 1200ms.
[13:16:36.647] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:16:36.951] <TB3> INFO: Expecting 655360 events.
[13:16:51.645] <TB3> INFO: 655360 events read in total (14102ms).
[13:16:51.662] <TB3> INFO: Expecting 655360 events.
[13:17:06.095] <TB3> INFO: 655360 events read in total (14030ms).
[13:17:06.116] <TB3> INFO: Expecting 655360 events.
[13:17:20.545] <TB3> INFO: 655360 events read in total (14026ms).
[13:17:20.567] <TB3> INFO: Expecting 655360 events.
[13:17:35.041] <TB3> INFO: 655360 events read in total (14071ms).
[13:17:35.068] <TB3> INFO: Expecting 655360 events.
[13:17:49.646] <TB3> INFO: 655360 events read in total (14175ms).
[13:17:49.678] <TB3> INFO: Expecting 655360 events.
[13:18:04.258] <TB3> INFO: 655360 events read in total (14177ms).
[13:18:04.302] <TB3> INFO: Expecting 655360 events.
[13:18:18.775] <TB3> INFO: 655360 events read in total (14069ms).
[13:18:18.823] <TB3> INFO: Expecting 655360 events.
[13:18:33.449] <TB3> INFO: 655360 events read in total (14222ms).
[13:18:33.511] <TB3> INFO: Expecting 655360 events.
[13:18:47.982] <TB3> INFO: 655360 events read in total (14068ms).
[13:18:48.046] <TB3> INFO: Expecting 655360 events.
[13:19:02.558] <TB3> INFO: 655360 events read in total (14109ms).
[13:19:02.630] <TB3> INFO: Expecting 655360 events.
[13:19:17.165] <TB3> INFO: 655360 events read in total (14132ms).
[13:19:17.250] <TB3> INFO: Expecting 655360 events.
[13:19:31.747] <TB3> INFO: 655360 events read in total (14094ms).
[13:19:31.831] <TB3> INFO: Expecting 655360 events.
[13:19:46.416] <TB3> INFO: 655360 events read in total (14182ms).
[13:19:46.520] <TB3> INFO: Expecting 655360 events.
[13:20:01.036] <TB3> INFO: 655360 events read in total (14113ms).
[13:20:01.137] <TB3> INFO: Expecting 655360 events.
[13:20:15.656] <TB3> INFO: 655360 events read in total (14116ms).
[13:20:15.763] <TB3> INFO: Expecting 655360 events.
[13:20:30.405] <TB3> INFO: 655360 events read in total (14239ms).
[13:20:30.519] <TB3> INFO: Test took 233872ms.
[13:20:30.631] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:30.886] <TB3> INFO: Expecting 655360 events.
[13:20:45.463] <TB3> INFO: 655360 events read in total (13985ms).
[13:20:45.477] <TB3> INFO: Expecting 655360 events.
[13:20:59.944] <TB3> INFO: 655360 events read in total (14064ms).
[13:20:59.967] <TB3> INFO: Expecting 655360 events.
[13:21:14.049] <TB3> INFO: 655360 events read in total (13679ms).
[13:21:14.073] <TB3> INFO: Expecting 655360 events.
[13:21:28.506] <TB3> INFO: 655360 events read in total (14030ms).
[13:21:28.540] <TB3> INFO: Expecting 655360 events.
[13:21:42.982] <TB3> INFO: 655360 events read in total (14039ms).
[13:21:43.020] <TB3> INFO: Expecting 655360 events.
[13:21:57.459] <TB3> INFO: 655360 events read in total (14036ms).
[13:21:57.504] <TB3> INFO: Expecting 655360 events.
[13:22:11.838] <TB3> INFO: 655360 events read in total (13931ms).
[13:22:11.929] <TB3> INFO: Expecting 655360 events.
[13:22:26.183] <TB3> INFO: 655360 events read in total (13850ms).
[13:22:26.257] <TB3> INFO: Expecting 655360 events.
[13:22:40.413] <TB3> INFO: 655360 events read in total (13753ms).
[13:22:40.478] <TB3> INFO: Expecting 655360 events.
[13:22:54.882] <TB3> INFO: 655360 events read in total (14001ms).
[13:22:54.947] <TB3> INFO: Expecting 655360 events.
[13:23:09.566] <TB3> INFO: 655360 events read in total (14215ms).
[13:23:09.624] <TB3> INFO: Expecting 655360 events.
[13:23:23.736] <TB3> INFO: 655360 events read in total (13709ms).
[13:23:23.808] <TB3> INFO: Expecting 655360 events.
[13:23:38.219] <TB3> INFO: 655360 events read in total (14008ms).
[13:23:38.283] <TB3> INFO: Expecting 655360 events.
[13:23:52.558] <TB3> INFO: 655360 events read in total (13871ms).
[13:23:52.661] <TB3> INFO: Expecting 655360 events.
[13:24:07.077] <TB3> INFO: 655360 events read in total (14013ms).
[13:24:07.183] <TB3> INFO: Expecting 655360 events.
[13:24:21.607] <TB3> INFO: 655360 events read in total (14021ms).
[13:24:21.754] <TB3> INFO: Test took 231123ms.
[13:24:21.965] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:21.971] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:21.978] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:21.983] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:21.989] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:21.996] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:24:21.001] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:24:22.007] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.013] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:22.018] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.024] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.030] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.035] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.041] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.047] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.052] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.059] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.065] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.071] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:22.077] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:24:22.083] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.089] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:22.095] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:24:22.101] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:24:22.107] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:24:22.113] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:24:22.119] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:24:22.125] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:24:22.131] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[13:24:22.137] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[13:24:22.143] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[13:24:22.149] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[13:24:22.155] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[13:24:22.161] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.167] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:22.173] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:24:22.179] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:24:22.219] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C0.dat
[13:24:22.219] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C1.dat
[13:24:22.219] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C2.dat
[13:24:22.219] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C3.dat
[13:24:22.220] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C4.dat
[13:24:22.220] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C5.dat
[13:24:22.220] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C6.dat
[13:24:22.220] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C7.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C8.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C9.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C10.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C11.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C12.dat
[13:24:22.221] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C13.dat
[13:24:22.222] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C14.dat
[13:24:22.222] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters35_C15.dat
[13:24:22.511] <TB3> INFO: Expecting 41600 events.
[13:24:25.652] <TB3> INFO: 41600 events read in total (2549ms).
[13:24:25.653] <TB3> INFO: Test took 3428ms.
[13:24:26.104] <TB3> INFO: Expecting 41600 events.
[13:24:29.178] <TB3> INFO: 41600 events read in total (2482ms).
[13:24:29.179] <TB3> INFO: Test took 3315ms.
[13:24:29.637] <TB3> INFO: Expecting 41600 events.
[13:24:32.811] <TB3> INFO: 41600 events read in total (2582ms).
[13:24:32.812] <TB3> INFO: Test took 3419ms.
[13:24:33.031] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:33.121] <TB3> INFO: Expecting 2560 events.
[13:24:34.015] <TB3> INFO: 2560 events read in total (302ms).
[13:24:34.015] <TB3> INFO: Test took 984ms.
[13:24:34.018] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:34.323] <TB3> INFO: Expecting 2560 events.
[13:24:35.214] <TB3> INFO: 2560 events read in total (299ms).
[13:24:35.215] <TB3> INFO: Test took 1197ms.
[13:24:35.218] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:35.523] <TB3> INFO: Expecting 2560 events.
[13:24:36.415] <TB3> INFO: 2560 events read in total (301ms).
[13:24:36.417] <TB3> INFO: Test took 1199ms.
[13:24:36.420] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:36.724] <TB3> INFO: Expecting 2560 events.
[13:24:37.620] <TB3> INFO: 2560 events read in total (305ms).
[13:24:37.621] <TB3> INFO: Test took 1201ms.
[13:24:37.624] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:37.928] <TB3> INFO: Expecting 2560 events.
[13:24:38.825] <TB3> INFO: 2560 events read in total (305ms).
[13:24:38.825] <TB3> INFO: Test took 1202ms.
[13:24:38.827] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:39.134] <TB3> INFO: Expecting 2560 events.
[13:24:40.027] <TB3> INFO: 2560 events read in total (301ms).
[13:24:40.027] <TB3> INFO: Test took 1200ms.
[13:24:40.030] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:40.335] <TB3> INFO: Expecting 2560 events.
[13:24:41.225] <TB3> INFO: 2560 events read in total (298ms).
[13:24:41.226] <TB3> INFO: Test took 1196ms.
[13:24:41.229] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:41.534] <TB3> INFO: Expecting 2560 events.
[13:24:42.426] <TB3> INFO: 2560 events read in total (300ms).
[13:24:42.427] <TB3> INFO: Test took 1198ms.
[13:24:42.429] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:42.734] <TB3> INFO: Expecting 2560 events.
[13:24:43.623] <TB3> INFO: 2560 events read in total (297ms).
[13:24:43.624] <TB3> INFO: Test took 1195ms.
[13:24:43.628] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:43.931] <TB3> INFO: Expecting 2560 events.
[13:24:44.822] <TB3> INFO: 2560 events read in total (299ms).
[13:24:44.822] <TB3> INFO: Test took 1194ms.
[13:24:44.827] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:45.131] <TB3> INFO: Expecting 2560 events.
[13:24:46.018] <TB3> INFO: 2560 events read in total (295ms).
[13:24:46.019] <TB3> INFO: Test took 1192ms.
[13:24:46.022] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:46.326] <TB3> INFO: Expecting 2560 events.
[13:24:47.213] <TB3> INFO: 2560 events read in total (295ms).
[13:24:47.213] <TB3> INFO: Test took 1192ms.
[13:24:47.216] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:47.521] <TB3> INFO: Expecting 2560 events.
[13:24:48.413] <TB3> INFO: 2560 events read in total (300ms).
[13:24:48.413] <TB3> INFO: Test took 1197ms.
[13:24:48.416] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:48.722] <TB3> INFO: Expecting 2560 events.
[13:24:49.610] <TB3> INFO: 2560 events read in total (296ms).
[13:24:49.611] <TB3> INFO: Test took 1195ms.
[13:24:49.614] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:49.918] <TB3> INFO: Expecting 2560 events.
[13:24:50.807] <TB3> INFO: 2560 events read in total (297ms).
[13:24:50.808] <TB3> INFO: Test took 1194ms.
[13:24:50.810] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:51.115] <TB3> INFO: Expecting 2560 events.
[13:24:52.004] <TB3> INFO: 2560 events read in total (297ms).
[13:24:52.005] <TB3> INFO: Test took 1195ms.
[13:24:52.007] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:52.313] <TB3> INFO: Expecting 2560 events.
[13:24:53.201] <TB3> INFO: 2560 events read in total (296ms).
[13:24:53.201] <TB3> INFO: Test took 1195ms.
[13:24:53.207] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:53.510] <TB3> INFO: Expecting 2560 events.
[13:24:54.403] <TB3> INFO: 2560 events read in total (302ms).
[13:24:54.403] <TB3> INFO: Test took 1197ms.
[13:24:54.407] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:54.712] <TB3> INFO: Expecting 2560 events.
[13:24:55.601] <TB3> INFO: 2560 events read in total (297ms).
[13:24:55.601] <TB3> INFO: Test took 1194ms.
[13:24:55.603] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:55.910] <TB3> INFO: Expecting 2560 events.
[13:24:56.801] <TB3> INFO: 2560 events read in total (300ms).
[13:24:56.802] <TB3> INFO: Test took 1199ms.
[13:24:56.805] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:57.109] <TB3> INFO: Expecting 2560 events.
[13:24:57.999] <TB3> INFO: 2560 events read in total (298ms).
[13:24:57.000] <TB3> INFO: Test took 1195ms.
[13:24:58.004] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:58.308] <TB3> INFO: Expecting 2560 events.
[13:24:59.199] <TB3> INFO: 2560 events read in total (299ms).
[13:24:59.200] <TB3> INFO: Test took 1196ms.
[13:24:59.203] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:24:59.508] <TB3> INFO: Expecting 2560 events.
[13:25:00.389] <TB3> INFO: 2560 events read in total (289ms).
[13:25:00.389] <TB3> INFO: Test took 1186ms.
[13:25:00.392] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:00.696] <TB3> INFO: Expecting 2560 events.
[13:25:01.590] <TB3> INFO: 2560 events read in total (302ms).
[13:25:01.591] <TB3> INFO: Test took 1199ms.
[13:25:01.593] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:01.898] <TB3> INFO: Expecting 2560 events.
[13:25:02.792] <TB3> INFO: 2560 events read in total (302ms).
[13:25:02.792] <TB3> INFO: Test took 1199ms.
[13:25:02.794] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:03.100] <TB3> INFO: Expecting 2560 events.
[13:25:03.990] <TB3> INFO: 2560 events read in total (298ms).
[13:25:03.991] <TB3> INFO: Test took 1197ms.
[13:25:03.996] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:04.299] <TB3> INFO: Expecting 2560 events.
[13:25:05.185] <TB3> INFO: 2560 events read in total (294ms).
[13:25:05.186] <TB3> INFO: Test took 1191ms.
[13:25:05.189] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:05.494] <TB3> INFO: Expecting 2560 events.
[13:25:06.388] <TB3> INFO: 2560 events read in total (302ms).
[13:25:06.388] <TB3> INFO: Test took 1199ms.
[13:25:06.393] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:06.697] <TB3> INFO: Expecting 2560 events.
[13:25:07.589] <TB3> INFO: 2560 events read in total (300ms).
[13:25:07.589] <TB3> INFO: Test took 1196ms.
[13:25:07.594] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:07.897] <TB3> INFO: Expecting 2560 events.
[13:25:08.785] <TB3> INFO: 2560 events read in total (296ms).
[13:25:08.785] <TB3> INFO: Test took 1191ms.
[13:25:08.789] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:09.093] <TB3> INFO: Expecting 2560 events.
[13:25:09.987] <TB3> INFO: 2560 events read in total (302ms).
[13:25:09.988] <TB3> INFO: Test took 1200ms.
[13:25:09.992] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:10.296] <TB3> INFO: Expecting 2560 events.
[13:25:11.189] <TB3> INFO: 2560 events read in total (301ms).
[13:25:11.190] <TB3> INFO: Test took 1199ms.
[13:25:11.654] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 653 seconds
[13:25:11.655] <TB3> INFO: PH scale (per ROC): 51 47 47 45 43 34 44 48 32 46 41 45 37 48 51 58
[13:25:11.655] <TB3> INFO: PH offset (per ROC): 108 110 139 106 106 79 99 86 110 95 107 98 96 116 84 125
[13:25:11.662] <TB3> INFO: Decoding statistics:
[13:25:11.662] <TB3> INFO: General information:
[13:25:11.662] <TB3> INFO: 16bit words read: 127876
[13:25:11.662] <TB3> INFO: valid events total: 20480
[13:25:11.662] <TB3> INFO: empty events: 17982
[13:25:11.662] <TB3> INFO: valid events with pixels: 2498
[13:25:11.662] <TB3> INFO: valid pixel hits: 2498
[13:25:11.662] <TB3> INFO: Event errors: 0
[13:25:11.662] <TB3> INFO: start marker: 0
[13:25:11.662] <TB3> INFO: stop marker: 0
[13:25:11.662] <TB3> INFO: overflow: 0
[13:25:11.662] <TB3> INFO: invalid 5bit words: 0
[13:25:11.662] <TB3> INFO: invalid XOR eye diagram: 0
[13:25:11.662] <TB3> INFO: frame (failed synchr.): 0
[13:25:11.662] <TB3> INFO: idle data (no TBM trl): 0
[13:25:11.662] <TB3> INFO: no data (only TBM hdr): 0
[13:25:11.662] <TB3> INFO: TBM errors: 0
[13:25:11.662] <TB3> INFO: flawed TBM headers: 0
[13:25:11.662] <TB3> INFO: flawed TBM trailers: 0
[13:25:11.662] <TB3> INFO: event ID mismatches: 0
[13:25:11.662] <TB3> INFO: ROC errors: 0
[13:25:11.662] <TB3> INFO: missing ROC header(s): 0
[13:25:11.662] <TB3> INFO: misplaced readback start: 0
[13:25:11.662] <TB3> INFO: Pixel decoding errors: 0
[13:25:11.662] <TB3> INFO: pixel data incomplete: 0
[13:25:11.662] <TB3> INFO: pixel address: 0
[13:25:11.662] <TB3> INFO: pulse height fill bit: 0
[13:25:11.662] <TB3> INFO: buffer corruption: 0
[13:25:11.827] <TB3> INFO: ######################################################################
[13:25:11.827] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:25:11.827] <TB3> INFO: ######################################################################
[13:25:11.841] <TB3> INFO: scanning low vcal = 10
[13:25:12.079] <TB3> INFO: Expecting 41600 events.
[13:25:15.686] <TB3> INFO: 41600 events read in total (3015ms).
[13:25:15.686] <TB3> INFO: Test took 3844ms.
[13:25:15.688] <TB3> INFO: scanning low vcal = 20
[13:25:15.984] <TB3> INFO: Expecting 41600 events.
[13:25:19.585] <TB3> INFO: 41600 events read in total (3009ms).
[13:25:19.585] <TB3> INFO: Test took 3897ms.
[13:25:19.587] <TB3> INFO: scanning low vcal = 30
[13:25:19.883] <TB3> INFO: Expecting 41600 events.
[13:25:23.602] <TB3> INFO: 41600 events read in total (3127ms).
[13:25:23.603] <TB3> INFO: Test took 4016ms.
[13:25:23.606] <TB3> INFO: scanning low vcal = 40
[13:25:23.883] <TB3> INFO: Expecting 41600 events.
[13:25:27.875] <TB3> INFO: 41600 events read in total (3400ms).
[13:25:27.876] <TB3> INFO: Test took 4270ms.
[13:25:27.879] <TB3> INFO: scanning low vcal = 50
[13:25:28.157] <TB3> INFO: Expecting 41600 events.
[13:25:32.199] <TB3> INFO: 41600 events read in total (3450ms).
[13:25:32.199] <TB3> INFO: Test took 4320ms.
[13:25:32.203] <TB3> INFO: scanning low vcal = 60
[13:25:32.480] <TB3> INFO: Expecting 41600 events.
[13:25:36.509] <TB3> INFO: 41600 events read in total (3437ms).
[13:25:36.510] <TB3> INFO: Test took 4307ms.
[13:25:36.514] <TB3> INFO: scanning low vcal = 70
[13:25:36.791] <TB3> INFO: Expecting 41600 events.
[13:25:40.794] <TB3> INFO: 41600 events read in total (3411ms).
[13:25:40.795] <TB3> INFO: Test took 4280ms.
[13:25:40.798] <TB3> INFO: scanning low vcal = 80
[13:25:41.076] <TB3> INFO: Expecting 41600 events.
[13:25:45.101] <TB3> INFO: 41600 events read in total (3433ms).
[13:25:45.102] <TB3> INFO: Test took 4304ms.
[13:25:45.106] <TB3> INFO: scanning low vcal = 90
[13:25:45.383] <TB3> INFO: Expecting 41600 events.
[13:25:49.393] <TB3> INFO: 41600 events read in total (3418ms).
[13:25:49.394] <TB3> INFO: Test took 4288ms.
[13:25:49.398] <TB3> INFO: scanning low vcal = 100
[13:25:49.675] <TB3> INFO: Expecting 41600 events.
[13:25:53.697] <TB3> INFO: 41600 events read in total (3430ms).
[13:25:53.698] <TB3> INFO: Test took 4300ms.
[13:25:53.701] <TB3> INFO: scanning low vcal = 110
[13:25:53.977] <TB3> INFO: Expecting 41600 events.
[13:25:57.953] <TB3> INFO: 41600 events read in total (3384ms).
[13:25:57.954] <TB3> INFO: Test took 4253ms.
[13:25:57.958] <TB3> INFO: scanning low vcal = 120
[13:25:58.238] <TB3> INFO: Expecting 41600 events.
[13:26:02.176] <TB3> INFO: 41600 events read in total (3347ms).
[13:26:02.177] <TB3> INFO: Test took 4219ms.
[13:26:02.181] <TB3> INFO: scanning low vcal = 130
[13:26:02.457] <TB3> INFO: Expecting 41600 events.
[13:26:06.423] <TB3> INFO: 41600 events read in total (3375ms).
[13:26:06.424] <TB3> INFO: Test took 4242ms.
[13:26:06.427] <TB3> INFO: scanning low vcal = 140
[13:26:06.703] <TB3> INFO: Expecting 41600 events.
[13:26:10.664] <TB3> INFO: 41600 events read in total (3369ms).
[13:26:10.665] <TB3> INFO: Test took 4239ms.
[13:26:10.669] <TB3> INFO: scanning low vcal = 150
[13:26:10.945] <TB3> INFO: Expecting 41600 events.
[13:26:14.903] <TB3> INFO: 41600 events read in total (3366ms).
[13:26:14.904] <TB3> INFO: Test took 4235ms.
[13:26:14.908] <TB3> INFO: scanning low vcal = 160
[13:26:15.185] <TB3> INFO: Expecting 41600 events.
[13:26:19.135] <TB3> INFO: 41600 events read in total (3359ms).
[13:26:19.136] <TB3> INFO: Test took 4228ms.
[13:26:19.139] <TB3> INFO: scanning low vcal = 170
[13:26:19.416] <TB3> INFO: Expecting 41600 events.
[13:26:23.368] <TB3> INFO: 41600 events read in total (3361ms).
[13:26:23.369] <TB3> INFO: Test took 4230ms.
[13:26:23.374] <TB3> INFO: scanning low vcal = 180
[13:26:23.648] <TB3> INFO: Expecting 41600 events.
[13:26:27.664] <TB3> INFO: 41600 events read in total (3424ms).
[13:26:27.665] <TB3> INFO: Test took 4291ms.
[13:26:27.668] <TB3> INFO: scanning low vcal = 190
[13:26:27.945] <TB3> INFO: Expecting 41600 events.
[13:26:31.975] <TB3> INFO: 41600 events read in total (3438ms).
[13:26:31.976] <TB3> INFO: Test took 4308ms.
[13:26:31.979] <TB3> INFO: scanning low vcal = 200
[13:26:32.257] <TB3> INFO: Expecting 41600 events.
[13:26:36.260] <TB3> INFO: 41600 events read in total (3412ms).
[13:26:36.261] <TB3> INFO: Test took 4282ms.
[13:26:36.264] <TB3> INFO: scanning low vcal = 210
[13:26:36.542] <TB3> INFO: Expecting 41600 events.
[13:26:40.547] <TB3> INFO: 41600 events read in total (3414ms).
[13:26:40.548] <TB3> INFO: Test took 4284ms.
[13:26:40.551] <TB3> INFO: scanning low vcal = 220
[13:26:40.828] <TB3> INFO: Expecting 41600 events.
[13:26:44.800] <TB3> INFO: 41600 events read in total (3381ms).
[13:26:44.801] <TB3> INFO: Test took 4250ms.
[13:26:44.804] <TB3> INFO: scanning low vcal = 230
[13:26:45.081] <TB3> INFO: Expecting 41600 events.
[13:26:49.028] <TB3> INFO: 41600 events read in total (3355ms).
[13:26:49.028] <TB3> INFO: Test took 4224ms.
[13:26:49.032] <TB3> INFO: scanning low vcal = 240
[13:26:49.309] <TB3> INFO: Expecting 41600 events.
[13:26:53.262] <TB3> INFO: 41600 events read in total (3361ms).
[13:26:53.262] <TB3> INFO: Test took 4230ms.
[13:26:53.265] <TB3> INFO: scanning low vcal = 250
[13:26:53.542] <TB3> INFO: Expecting 41600 events.
[13:26:57.566] <TB3> INFO: 41600 events read in total (3432ms).
[13:26:57.567] <TB3> INFO: Test took 4301ms.
[13:26:57.571] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:26:57.848] <TB3> INFO: Expecting 41600 events.
[13:27:01.844] <TB3> INFO: 41600 events read in total (3405ms).
[13:27:01.845] <TB3> INFO: Test took 4274ms.
[13:27:01.848] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:27:02.125] <TB3> INFO: Expecting 41600 events.
[13:27:06.105] <TB3> INFO: 41600 events read in total (3388ms).
[13:27:06.106] <TB3> INFO: Test took 4258ms.
[13:27:06.109] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:27:06.386] <TB3> INFO: Expecting 41600 events.
[13:27:10.367] <TB3> INFO: 41600 events read in total (3389ms).
[13:27:10.368] <TB3> INFO: Test took 4258ms.
[13:27:10.372] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:27:10.649] <TB3> INFO: Expecting 41600 events.
[13:27:14.621] <TB3> INFO: 41600 events read in total (3381ms).
[13:27:14.622] <TB3> INFO: Test took 4250ms.
[13:27:14.625] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:27:14.902] <TB3> INFO: Expecting 41600 events.
[13:27:18.923] <TB3> INFO: 41600 events read in total (3430ms).
[13:27:18.924] <TB3> INFO: Test took 4299ms.
[13:27:19.477] <TB3> INFO: PixTestGainPedestal::measure() done
[13:28:02.271] <TB3> INFO: PixTestGainPedestal::fit() done
[13:28:02.271] <TB3> INFO: non-linearity mean: 0.968 0.956 0.972 0.942 0.930 0.881 0.938 0.973 0.965 0.948 0.920 0.947 0.915 0.959 0.967 0.984
[13:28:02.271] <TB3> INFO: non-linearity RMS: 0.017 0.038 0.006 0.137 0.085 0.128 0.054 0.007 0.186 0.048 0.102 0.054 0.127 0.020 0.024 0.003
[13:28:02.271] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[13:28:02.290] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[13:28:02.303] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[13:28:02.316] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[13:28:02.329] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[13:28:02.342] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[13:28:02.355] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[13:28:02.368] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[13:28:02.381] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[13:28:02.394] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[13:28:02.407] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[13:28:02.420] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[13:28:02.433] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[13:28:02.446] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[13:28:02.459] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[13:28:02.472] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[13:28:02.485] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 170 seconds
[13:28:02.485] <TB3> INFO: Decoding statistics:
[13:28:02.485] <TB3> INFO: General information:
[13:28:02.485] <TB3> INFO: 16bit words read: 3292972
[13:28:02.485] <TB3> INFO: valid events total: 332800
[13:28:02.485] <TB3> INFO: empty events: 1638
[13:28:02.485] <TB3> INFO: valid events with pixels: 331162
[13:28:02.485] <TB3> INFO: valid pixel hits: 648086
[13:28:02.485] <TB3> INFO: Event errors: 0
[13:28:02.485] <TB3> INFO: start marker: 0
[13:28:02.485] <TB3> INFO: stop marker: 0
[13:28:02.485] <TB3> INFO: overflow: 0
[13:28:02.485] <TB3> INFO: invalid 5bit words: 0
[13:28:02.485] <TB3> INFO: invalid XOR eye diagram: 0
[13:28:02.485] <TB3> INFO: frame (failed synchr.): 0
[13:28:02.485] <TB3> INFO: idle data (no TBM trl): 0
[13:28:02.485] <TB3> INFO: no data (only TBM hdr): 0
[13:28:02.485] <TB3> INFO: TBM errors: 0
[13:28:02.485] <TB3> INFO: flawed TBM headers: 0
[13:28:02.485] <TB3> INFO: flawed TBM trailers: 0
[13:28:02.485] <TB3> INFO: event ID mismatches: 0
[13:28:02.485] <TB3> INFO: ROC errors: 0
[13:28:02.485] <TB3> INFO: missing ROC header(s): 0
[13:28:02.485] <TB3> INFO: misplaced readback start: 0
[13:28:02.485] <TB3> INFO: Pixel decoding errors: 0
[13:28:02.485] <TB3> INFO: pixel data incomplete: 0
[13:28:02.485] <TB3> INFO: pixel address: 0
[13:28:02.485] <TB3> INFO: pulse height fill bit: 0
[13:28:02.485] <TB3> INFO: buffer corruption: 0
[13:28:02.503] <TB3> INFO: Decoding statistics:
[13:28:02.503] <TB3> INFO: General information:
[13:28:02.503] <TB3> INFO: 16bit words read: 3422384
[13:28:02.503] <TB3> INFO: valid events total: 353536
[13:28:02.503] <TB3> INFO: empty events: 19876
[13:28:02.503] <TB3> INFO: valid events with pixels: 333660
[13:28:02.503] <TB3> INFO: valid pixel hits: 650584
[13:28:02.503] <TB3> INFO: Event errors: 0
[13:28:02.503] <TB3> INFO: start marker: 0
[13:28:02.503] <TB3> INFO: stop marker: 0
[13:28:02.503] <TB3> INFO: overflow: 0
[13:28:02.503] <TB3> INFO: invalid 5bit words: 0
[13:28:02.503] <TB3> INFO: invalid XOR eye diagram: 0
[13:28:02.503] <TB3> INFO: frame (failed synchr.): 0
[13:28:02.503] <TB3> INFO: idle data (no TBM trl): 0
[13:28:02.503] <TB3> INFO: no data (only TBM hdr): 0
[13:28:02.503] <TB3> INFO: TBM errors: 0
[13:28:02.503] <TB3> INFO: flawed TBM headers: 0
[13:28:02.503] <TB3> INFO: flawed TBM trailers: 0
[13:28:02.503] <TB3> INFO: event ID mismatches: 0
[13:28:02.503] <TB3> INFO: ROC errors: 0
[13:28:02.503] <TB3> INFO: missing ROC header(s): 0
[13:28:02.503] <TB3> INFO: misplaced readback start: 0
[13:28:02.503] <TB3> INFO: Pixel decoding errors: 0
[13:28:02.503] <TB3> INFO: pixel data incomplete: 0
[13:28:02.503] <TB3> INFO: pixel address: 0
[13:28:02.503] <TB3> INFO: pulse height fill bit: 0
[13:28:02.503] <TB3> INFO: buffer corruption: 0
[13:28:02.503] <TB3> INFO: enter test to run
[13:28:02.503] <TB3> INFO: test: trim80 no parameter change
[13:28:02.503] <TB3> INFO: running: trim80
[13:28:02.505] <TB3> INFO: ######################################################################
[13:28:02.505] <TB3> INFO: PixTestTrim80::doTest()
[13:28:02.505] <TB3> INFO: ######################################################################
[13:28:02.506] <TB3> INFO: ----------------------------------------------------------------------
[13:28:02.506] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[13:28:02.506] <TB3> INFO: ----------------------------------------------------------------------
[13:28:02.550] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:28:02.550] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:28:02.561] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:28:02.561] <TB3> INFO: run 1 of 1
[13:28:02.841] <TB3> INFO: Expecting 5025280 events.
[13:28:30.828] <TB3> INFO: 679496 events read in total (27395ms).
[13:28:58.437] <TB3> INFO: 1356040 events read in total (55004ms).
[13:29:26.151] <TB3> INFO: 2030968 events read in total (82719ms).
[13:29:53.401] <TB3> INFO: 2705080 events read in total (109968ms).
[13:30:20.957] <TB3> INFO: 3379032 events read in total (137524ms).
[13:30:48.567] <TB3> INFO: 4052392 events read in total (165134ms).
[13:31:15.830] <TB3> INFO: 4725224 events read in total (192397ms).
[13:31:28.356] <TB3> INFO: 5025280 events read in total (204923ms).
[13:31:28.475] <TB3> INFO: Test took 205914ms.
[13:31:52.503] <TB3> INFO: ROC 0 VthrComp = 70
[13:31:52.503] <TB3> INFO: ROC 1 VthrComp = 74
[13:31:52.503] <TB3> INFO: ROC 2 VthrComp = 76
[13:31:52.503] <TB3> INFO: ROC 3 VthrComp = 73
[13:31:52.503] <TB3> INFO: ROC 4 VthrComp = 86
[13:31:52.503] <TB3> INFO: ROC 5 VthrComp = 82
[13:31:52.503] <TB3> INFO: ROC 6 VthrComp = 72
[13:31:52.503] <TB3> INFO: ROC 7 VthrComp = 80
[13:31:52.503] <TB3> INFO: ROC 8 VthrComp = 83
[13:31:52.504] <TB3> INFO: ROC 9 VthrComp = 77
[13:31:52.504] <TB3> INFO: ROC 10 VthrComp = 72
[13:31:52.504] <TB3> INFO: ROC 11 VthrComp = 73
[13:31:52.504] <TB3> INFO: ROC 12 VthrComp = 82
[13:31:52.504] <TB3> INFO: ROC 13 VthrComp = 75
[13:31:52.504] <TB3> INFO: ROC 14 VthrComp = 72
[13:31:52.504] <TB3> INFO: ROC 15 VthrComp = 75
[13:31:52.743] <TB3> INFO: Expecting 41600 events.
[13:31:56.229] <TB3> INFO: 41600 events read in total (2894ms).
[13:31:56.231] <TB3> INFO: Test took 3725ms.
[13:31:56.242] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:31:56.242] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:31:56.254] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:31:56.254] <TB3> INFO: run 1 of 1
[13:31:56.533] <TB3> INFO: Expecting 5025280 events.
[13:32:24.907] <TB3> INFO: 684912 events read in total (27782ms).
[13:32:52.725] <TB3> INFO: 1367224 events read in total (55600ms).
[13:33:20.274] <TB3> INFO: 2049552 events read in total (83149ms).
[13:33:47.675] <TB3> INFO: 2728432 events read in total (110550ms).
[13:34:15.150] <TB3> INFO: 3402752 events read in total (138025ms).
[13:34:42.641] <TB3> INFO: 4076568 events read in total (165516ms).
[13:35:10.688] <TB3> INFO: 4747912 events read in total (193563ms).
[13:35:22.404] <TB3> INFO: 5025280 events read in total (205279ms).
[13:35:22.499] <TB3> INFO: Test took 206246ms.
[13:35:53.563] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 104.059 for pixel 51/76 mean/min/max = 89.5847/74.7959/104.373
[13:35:53.563] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 107.054 for pixel 11/66 mean/min/max = 92.735/78.3702/107.1
[13:35:53.564] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 109.427 for pixel 0/38 mean/min/max = 93.6692/77.8679/109.47
[13:35:53.565] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 106.179 for pixel 0/65 mean/min/max = 91.6812/77.1076/106.255
[13:35:53.565] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 107.112 for pixel 2/6 mean/min/max = 91.115/75.0698/107.16
[13:35:53.566] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 107.162 for pixel 0/0 mean/min/max = 91.2809/75.3193/107.242
[13:35:53.566] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 109.892 for pixel 2/14 mean/min/max = 94.0488/77.9931/110.105
[13:35:53.567] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 112.032 for pixel 0/42 mean/min/max = 93.5219/74.8522/112.192
[13:35:53.567] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 108.013 for pixel 51/79 mean/min/max = 91.3945/74.7597/108.029
[13:35:53.568] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 108.789 for pixel 0/4 mean/min/max = 93.4586/77.9665/108.951
[13:35:53.569] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 110.986 for pixel 0/17 mean/min/max = 94.2377/77.1915/111.284
[13:35:53.569] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 106.803 for pixel 40/74 mean/min/max = 92.1405/77.3158/106.965
[13:35:53.570] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 104.414 for pixel 51/73 mean/min/max = 90.0878/75.2523/104.923
[13:35:53.570] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 110.247 for pixel 0/64 mean/min/max = 94.0127/77.7377/110.288
[13:35:53.571] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 109.978 for pixel 3/79 mean/min/max = 93.9398/77.8072/110.073
[13:35:53.571] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 106.976 for pixel 13/78 mean/min/max = 92.7035/78.2752/107.132
[13:35:53.572] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:35:53.661] <TB3> INFO: Expecting 411648 events.
[13:36:03.219] <TB3> INFO: 411648 events read in total (8966ms).
[13:36:03.227] <TB3> INFO: Expecting 411648 events.
[13:36:12.477] <TB3> INFO: 411648 events read in total (8847ms).
[13:36:12.488] <TB3> INFO: Expecting 411648 events.
[13:36:21.812] <TB3> INFO: 411648 events read in total (8921ms).
[13:36:21.832] <TB3> INFO: Expecting 411648 events.
[13:36:31.081] <TB3> INFO: 411648 events read in total (8846ms).
[13:36:31.104] <TB3> INFO: Expecting 411648 events.
[13:36:40.318] <TB3> INFO: 411648 events read in total (8811ms).
[13:36:40.343] <TB3> INFO: Expecting 411648 events.
[13:36:49.734] <TB3> INFO: 411648 events read in total (8988ms).
[13:36:49.761] <TB3> INFO: Expecting 411648 events.
[13:36:59.217] <TB3> INFO: 411648 events read in total (9053ms).
[13:36:59.253] <TB3> INFO: Expecting 411648 events.
[13:37:08.572] <TB3> INFO: 411648 events read in total (8916ms).
[13:37:08.611] <TB3> INFO: Expecting 411648 events.
[13:37:17.883] <TB3> INFO: 411648 events read in total (8869ms).
[13:37:17.915] <TB3> INFO: Expecting 411648 events.
[13:37:27.352] <TB3> INFO: 411648 events read in total (9034ms).
[13:37:27.426] <TB3> INFO: Expecting 411648 events.
[13:37:36.637] <TB3> INFO: 411648 events read in total (8808ms).
[13:37:36.686] <TB3> INFO: Expecting 411648 events.
[13:37:45.900] <TB3> INFO: 411648 events read in total (8811ms).
[13:37:45.958] <TB3> INFO: Expecting 411648 events.
[13:37:55.415] <TB3> INFO: 411648 events read in total (9054ms).
[13:37:55.495] <TB3> INFO: Expecting 411648 events.
[13:38:04.819] <TB3> INFO: 411648 events read in total (8921ms).
[13:38:04.896] <TB3> INFO: Expecting 411648 events.
[13:38:14.313] <TB3> INFO: 411648 events read in total (9014ms).
[13:38:14.449] <TB3> INFO: Expecting 411648 events.
[13:38:23.942] <TB3> INFO: 411648 events read in total (9090ms).
[13:38:24.022] <TB3> INFO: Test took 150450ms.
[13:38:25.662] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:38:25.675] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:38:25.675] <TB3> INFO: run 1 of 1
[13:38:25.912] <TB3> INFO: Expecting 5025280 events.
[13:38:54.039] <TB3> INFO: 671216 events read in total (27535ms).
[13:39:21.949] <TB3> INFO: 1340648 events read in total (55445ms).
[13:39:49.930] <TB3> INFO: 2009496 events read in total (83426ms).
[13:40:17.505] <TB3> INFO: 2675248 events read in total (111001ms).
[13:40:45.215] <TB3> INFO: 3336560 events read in total (138711ms).
[13:41:12.135] <TB3> INFO: 3994904 events read in total (165631ms).
[13:41:39.738] <TB3> INFO: 4651728 events read in total (193234ms).
[13:41:55.276] <TB3> INFO: 5025280 events read in total (208772ms).
[13:41:55.375] <TB3> INFO: Test took 209700ms.
[13:42:21.698] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 53.002870 .. 100.849231
[13:42:22.025] <TB3> INFO: Expecting 208000 events.
[13:42:32.400] <TB3> INFO: 208000 events read in total (9783ms).
[13:42:32.401] <TB3> INFO: Test took 10701ms.
[13:42:32.450] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 43 .. 110 (-1/-1) hits flags = 528 (plus default)
[13:42:32.462] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:42:32.462] <TB3> INFO: run 1 of 1
[13:42:32.740] <TB3> INFO: Expecting 2263040 events.
[13:43:01.797] <TB3> INFO: 689896 events read in total (28465ms).
[13:43:30.114] <TB3> INFO: 1377792 events read in total (56783ms).
[13:43:58.747] <TB3> INFO: 2058464 events read in total (85415ms).
[13:44:07.509] <TB3> INFO: 2263040 events read in total (94177ms).
[13:44:07.563] <TB3> INFO: Test took 95102ms.
[13:44:30.233] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 61.992946 .. 91.804405
[13:44:30.590] <TB3> INFO: Expecting 208000 events.
[13:44:40.636] <TB3> INFO: 208000 events read in total (9455ms).
[13:44:40.636] <TB3> INFO: Test took 10397ms.
[13:44:40.701] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 101 (-1/-1) hits flags = 528 (plus default)
[13:44:40.714] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:44:40.714] <TB3> INFO: run 1 of 1
[13:44:40.994] <TB3> INFO: Expecting 1697280 events.
[13:45:10.835] <TB3> INFO: 694832 events read in total (29249ms).
[13:45:39.261] <TB3> INFO: 1390160 events read in total (57676ms).
[13:45:52.366] <TB3> INFO: 1697280 events read in total (70780ms).
[13:45:52.406] <TB3> INFO: Test took 71692ms.
[13:46:11.092] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 66.480186 .. 86.433543
[13:46:11.426] <TB3> INFO: Expecting 208000 events.
[13:46:21.799] <TB3> INFO: 208000 events read in total (9781ms).
[13:46:21.800] <TB3> INFO: Test took 10707ms.
[13:46:21.855] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 56 .. 96 (-1/-1) hits flags = 528 (plus default)
[13:46:21.870] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:46:21.870] <TB3> INFO: run 1 of 1
[13:46:22.168] <TB3> INFO: Expecting 1364480 events.
[13:46:51.907] <TB3> INFO: 705016 events read in total (29147ms).
[13:47:19.228] <TB3> INFO: 1364480 events read in total (56468ms).
[13:47:19.263] <TB3> INFO: Test took 57393ms.
[13:47:38.506] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 69.753737 .. 86.433543
[13:47:38.797] <TB3> INFO: Expecting 208000 events.
[13:47:48.724] <TB3> INFO: 208000 events read in total (9336ms).
[13:47:48.725] <TB3> INFO: Test took 10216ms.
[13:47:48.774] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 59 .. 96 (-1/-1) hits flags = 528 (plus default)
[13:47:48.787] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:47:48.787] <TB3> INFO: run 1 of 1
[13:47:49.065] <TB3> INFO: Expecting 1264640 events.
[13:48:17.574] <TB3> INFO: 693224 events read in total (27918ms).
[13:48:41.557] <TB3> INFO: 1264640 events read in total (51902ms).
[13:48:41.592] <TB3> INFO: Test took 52806ms.
[13:49:00.115] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[13:49:00.115] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[13:49:00.127] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:49:00.127] <TB3> INFO: run 1 of 1
[13:49:00.365] <TB3> INFO: Expecting 1364480 events.
[13:49:28.654] <TB3> INFO: 667248 events read in total (27697ms).
[13:49:56.147] <TB3> INFO: 1334960 events read in total (55190ms).
[13:49:57.837] <TB3> INFO: 1364480 events read in total (56880ms).
[13:49:57.876] <TB3> INFO: Test took 57748ms.
[13:50:16.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C0.dat
[13:50:16.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C1.dat
[13:50:16.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C2.dat
[13:50:16.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C3.dat
[13:50:16.485] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C4.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C5.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C6.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C7.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C8.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C9.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C10.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C11.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C12.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C13.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C14.dat
[13:50:16.486] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//dacParameters80_C15.dat
[13:50:16.486] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C0.dat
[13:50:16.493] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C1.dat
[13:50:16.499] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C2.dat
[13:50:16.504] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C3.dat
[13:50:16.509] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C4.dat
[13:50:16.513] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C5.dat
[13:50:16.518] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C6.dat
[13:50:16.523] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C7.dat
[13:50:16.527] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C8.dat
[13:50:16.532] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C9.dat
[13:50:16.537] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C10.dat
[13:50:16.541] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C11.dat
[13:50:16.546] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C12.dat
[13:50:16.551] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C13.dat
[13:50:16.555] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C14.dat
[13:50:16.560] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1103_FullQualification_2016-11-02_09h36m_1478075793//003_FulltestTrim80_p17//trimParameters80_C15.dat
[13:50:16.565] <TB3> INFO: PixTestTrim80::trimTest() done
[13:50:16.565] <TB3> INFO: vtrim: 87 100 104 85 103 91 113 100 100 98 108 96 85 105 99 100
[13:50:16.565] <TB3> INFO: vthrcomp: 70 74 76 73 86 82 72 80 83 77 72 73 82 75 72 75
[13:50:16.565] <TB3> INFO: vcal mean: 79.91 79.93 79.98 79.92 79.94 79.94 79.92 79.91 79.92 79.92 79.93 79.99 79.92 79.92 79.93 79.92
[13:50:16.565] <TB3> INFO: vcal RMS: 0.70 0.73 0.74 0.69 0.78 0.72 0.78 0.82 0.71 0.74 0.71 1.14 0.73 0.71 0.73 0.72
[13:50:16.565] <TB3> INFO: bits mean: 9.88 9.57 9.06 9.57 10.04 9.53 9.60 9.31 9.90 8.86 8.96 9.68 9.99 8.98 9.32 9.44
[13:50:16.565] <TB3> INFO: bits RMS: 2.57 2.14 2.35 2.31 2.42 2.60 2.17 2.72 2.46 2.48 2.51 2.24 2.45 2.38 2.33 2.20
[13:50:16.571] <TB3> INFO: ----------------------------------------------------------------------
[13:50:16.572] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:50:16.572] <TB3> INFO: ----------------------------------------------------------------------
[13:50:16.574] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:50:16.587] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:50:16.587] <TB3> INFO: run 1 of 1
[13:50:16.864] <TB3> INFO: Expecting 4160000 events.
[13:50:51.019] <TB3> INFO: 763270 events read in total (33564ms).
[13:51:23.142] <TB3> INFO: 1524440 events read in total (65687ms).
[13:51:55.544] <TB3> INFO: 2279975 events read in total (98089ms).
[13:52:27.909] <TB3> INFO: 3031335 events read in total (130454ms).
[13:52:59.973] <TB3> INFO: 3779935 events read in total (162518ms).
[13:53:16.165] <TB3> INFO: 4160000 events read in total (178710ms).
[13:53:16.262] <TB3> INFO: Test took 179675ms.
[13:53:46.055] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[13:53:46.069] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:53:46.069] <TB3> INFO: run 1 of 1
[13:53:46.395] <TB3> INFO: Expecting 4284800 events.
[13:54:19.173] <TB3> INFO: 731770 events read in total (32186ms).
[13:54:50.775] <TB3> INFO: 1460775 events read in total (63788ms).
[13:55:22.547] <TB3> INFO: 2185895 events read in total (95560ms).
[13:55:53.902] <TB3> INFO: 2908195 events read in total (126915ms).
[13:56:25.630] <TB3> INFO: 3627640 events read in total (158643ms).
[13:56:54.237] <TB3> INFO: 4284800 events read in total (187250ms).
[13:56:54.332] <TB3> INFO: Test took 188263ms.
[13:57:21.469] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[13:57:21.484] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:57:21.484] <TB3> INFO: run 1 of 1
[13:57:21.739] <TB3> INFO: Expecting 4264000 events.
[13:57:54.238] <TB3> INFO: 733405 events read in total (31907ms).
[13:58:25.572] <TB3> INFO: 1463625 events read in total (63241ms).
[13:58:57.211] <TB3> INFO: 2190705 events read in total (94880ms).
[13:59:28.278] <TB3> INFO: 2914325 events read in total (125947ms).
[13:59:59.611] <TB3> INFO: 3635095 events read in total (157280ms).
[14:00:26.000] <TB3> INFO: 4264000 events read in total (184669ms).
[14:00:27.102] <TB3> INFO: Test took 185618ms.
[14:00:58.469] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[14:00:58.483] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:00:58.483] <TB3> INFO: run 1 of 1
[14:00:58.763] <TB3> INFO: Expecting 4264000 events.
[14:01:31.119] <TB3> INFO: 733395 events read in total (31764ms).
[14:02:02.792] <TB3> INFO: 1464430 events read in total (63437ms).
[14:02:34.347] <TB3> INFO: 2191730 events read in total (94993ms).
[14:03:05.970] <TB3> INFO: 2915230 events read in total (126615ms).
[14:03:37.624] <TB3> INFO: 3636280 events read in total (158269ms).
[14:04:05.034] <TB3> INFO: 4264000 events read in total (185679ms).
[14:04:05.122] <TB3> INFO: Test took 186639ms.
[14:04:31.325] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[14:04:31.339] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:04:31.339] <TB3> INFO: run 1 of 1
[14:04:31.666] <TB3> INFO: Expecting 4243200 events.
[14:05:03.859] <TB3> INFO: 734850 events read in total (31602ms).
[14:05:36.261] <TB3> INFO: 1467465 events read in total (64004ms).
[14:06:08.031] <TB3> INFO: 2195975 events read in total (95774ms).
[14:06:39.376] <TB3> INFO: 2921170 events read in total (127119ms).
[14:07:10.669] <TB3> INFO: 3644235 events read in total (158412ms).
[14:07:36.713] <TB3> INFO: 4243200 events read in total (184456ms).
[14:07:36.858] <TB3> INFO: Test took 185518ms.
[14:08:09.397] <TB3> INFO: PixTestTrim80::trimBitTest() done
[14:08:09.398] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2406 seconds
[14:08:10.030] <TB3> INFO: enter test to run
[14:08:10.030] <TB3> INFO: test: exit no parameter change
[14:08:10.226] <TB3> QUIET: Connection to board 126 closed.
[14:08:10.235] <TB3> INFO: pXar: this is the end, my friend