[10:29:07.789] <TB0> INFO: *** Welcome to pxar ***
[10:29:07.789] <TB0> INFO: *** Today: 2016/11/02
[10:29:07.797] <TB0> INFO: *** Version: c8ba-dirty
[10:29:07.797] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C15.dat
[10:29:07.798] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1b.dat
[10:29:07.798] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//defaultMaskFile.dat
[10:29:07.798] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters_C15.dat
[10:29:07.857] <TB0> INFO: clk: 4
[10:29:07.857] <TB0> INFO: ctr: 4
[10:29:07.857] <TB0> INFO: sda: 19
[10:29:07.857] <TB0> INFO: tin: 9
[10:29:07.857] <TB0> INFO: level: 15
[10:29:07.857] <TB0> INFO: triggerdelay: 0
[10:29:07.857] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[10:29:07.857] <TB0> INFO: Log level: INFO
[10:29:07.865] <TB0> INFO: Found DTB DTB_WRQ4OZ
[10:29:07.875] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[10:29:07.877] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[10:29:07.879] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[10:29:09.365] <TB0> INFO: DUT info:
[10:29:09.365] <TB0> INFO: The DUT currently contains the following objects:
[10:29:09.365] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[10:29:09.365] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:29:09.365] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:29:09.365] <TB0> INFO: TBM Core alpha (2): 7 registers set
[10:29:09.365] <TB0> INFO: TBM Core beta (3): 7 registers set
[10:29:09.365] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[10:29:09.365] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.366] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:29:09.766] <TB0> INFO: enter 'restricted' command line mode
[10:29:09.766] <TB0> INFO: enter test to run
[10:29:09.766] <TB0> INFO: test: pretest no parameter change
[10:29:09.766] <TB0> INFO: running: pretest
[10:29:09.771] <TB0> INFO: ######################################################################
[10:29:09.771] <TB0> INFO: PixTestPretest::doTest()
[10:29:09.771] <TB0> INFO: ######################################################################
[10:29:09.772] <TB0> INFO: ----------------------------------------------------------------------
[10:29:09.772] <TB0> INFO: PixTestPretest::programROC()
[10:29:09.772] <TB0> INFO: ----------------------------------------------------------------------
[10:29:27.786] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:29:27.786] <TB0> INFO: IA differences per ROC: 17.7 18.5 17.7 17.7 23.3 20.1 17.7 19.3 18.5 19.3 20.1 20.9 21.7 19.3 19.3 18.5
[10:29:27.853] <TB0> INFO: ----------------------------------------------------------------------
[10:29:27.854] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:29:27.854] <TB0> INFO: ----------------------------------------------------------------------
[10:29:35.339] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[10:29:35.339] <TB0> INFO: i(loss) [mA/ROC]: 19.2 20.1 19.2 19.2 20.1 19.2 20.1 20.1 20.1 19.2 19.2 19.2 19.2 19.2 19.2 19.2
[10:29:35.369] <TB0> INFO: ----------------------------------------------------------------------
[10:29:35.369] <TB0> INFO: PixTestPretest::findTiming()
[10:29:35.369] <TB0> INFO: ----------------------------------------------------------------------
[10:29:35.369] <TB0> INFO: PixTestCmd::init()

[10:30:07.726] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[10:30:07.727] <TB0> INFO: (success/tries = 100/100), width = 4
[10:30:09.243] <TB0> INFO: ----------------------------------------------------------------------
[10:30:09.243] <TB0> INFO: PixTestPretest::findWorkingPixel()
[10:30:09.243] <TB0> INFO: ----------------------------------------------------------------------
[10:30:09.338] <TB0> INFO: Expecting 231680 events.
[10:30:19.400] <TB0> INFO: 231680 events read in total (9470ms).
[10:30:19.410] <TB0> INFO: Test took 10162ms.
[10:30:19.659] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[10:30:19.697] <TB0> INFO: ----------------------------------------------------------------------
[10:30:19.698] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[10:30:19.698] <TB0> INFO: ----------------------------------------------------------------------
[10:30:19.793] <TB0> INFO: Expecting 231680 events.
[10:30:29.668] <TB0> INFO: 231680 events read in total (9283ms).
[10:30:29.680] <TB0> INFO: Test took 9977ms.
[10:30:29.947] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[10:30:29.947] <TB0> INFO: CalDel: 96 98 98 89 107 98 86 102 105 94 102 90 77 101 105 106
[10:30:29.947] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:30:29.950] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C0.dat
[10:30:29.951] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C1.dat
[10:30:29.951] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C2.dat
[10:30:29.951] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C3.dat
[10:30:29.951] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C4.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C5.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C6.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C7.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C8.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C9.dat
[10:30:29.952] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C10.dat
[10:30:29.953] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C11.dat
[10:30:29.953] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C12.dat
[10:30:29.953] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C13.dat
[10:30:29.953] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C14.dat
[10:30:29.953] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters_C15.dat
[10:30:29.953] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0a.dat
[10:30:29.953] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C0b.dat
[10:30:29.954] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1a.dat
[10:30:29.954] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//tbmParameters_C1b.dat
[10:30:29.954] <TB0> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[10:30:30.008] <TB0> INFO: enter test to run
[10:30:30.008] <TB0> INFO: test: FullTest no parameter change
[10:30:30.008] <TB0> INFO: running: fulltest
[10:30:30.008] <TB0> INFO: ######################################################################
[10:30:30.008] <TB0> INFO: PixTestFullTest::doTest()
[10:30:30.008] <TB0> INFO: ######################################################################
[10:30:30.009] <TB0> INFO: ######################################################################
[10:30:30.009] <TB0> INFO: PixTestAlive::doTest()
[10:30:30.009] <TB0> INFO: ######################################################################
[10:30:30.011] <TB0> INFO: ----------------------------------------------------------------------
[10:30:30.011] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:30:30.011] <TB0> INFO: ----------------------------------------------------------------------
[10:30:30.248] <TB0> INFO: Expecting 41600 events.
[10:30:33.782] <TB0> INFO: 41600 events read in total (2942ms).
[10:30:33.783] <TB0> INFO: Test took 3771ms.
[10:30:34.019] <TB0> INFO: PixTestAlive::aliveTest() done
[10:30:34.019] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:30:34.021] <TB0> INFO: ----------------------------------------------------------------------
[10:30:34.021] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:30:34.021] <TB0> INFO: ----------------------------------------------------------------------
[10:30:34.264] <TB0> INFO: Expecting 41600 events.
[10:30:37.353] <TB0> INFO: 41600 events read in total (2497ms).
[10:30:37.353] <TB0> INFO: Test took 3330ms.
[10:30:37.354] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:30:37.591] <TB0> INFO: PixTestAlive::maskTest() done
[10:30:37.591] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:30:37.593] <TB0> INFO: ----------------------------------------------------------------------
[10:30:37.593] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:30:37.593] <TB0> INFO: ----------------------------------------------------------------------
[10:30:37.835] <TB0> INFO: Expecting 41600 events.
[10:30:41.341] <TB0> INFO: 41600 events read in total (2914ms).
[10:30:41.342] <TB0> INFO: Test took 3747ms.
[10:30:41.578] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[10:30:41.578] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:30:41.578] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[10:30:41.578] <TB0> INFO: Decoding statistics:
[10:30:41.578] <TB0> INFO: General information:
[10:30:41.578] <TB0> INFO: 16bit words read: 0
[10:30:41.578] <TB0> INFO: valid events total: 0
[10:30:41.578] <TB0> INFO: empty events: 0
[10:30:41.578] <TB0> INFO: valid events with pixels: 0
[10:30:41.578] <TB0> INFO: valid pixel hits: 0
[10:30:41.578] <TB0> INFO: Event errors: 0
[10:30:41.578] <TB0> INFO: start marker: 0
[10:30:41.578] <TB0> INFO: stop marker: 0
[10:30:41.578] <TB0> INFO: overflow: 0
[10:30:41.578] <TB0> INFO: invalid 5bit words: 0
[10:30:41.578] <TB0> INFO: invalid XOR eye diagram: 0
[10:30:41.578] <TB0> INFO: frame (failed synchr.): 0
[10:30:41.578] <TB0> INFO: idle data (no TBM trl): 0
[10:30:41.578] <TB0> INFO: no data (only TBM hdr): 0
[10:30:41.578] <TB0> INFO: TBM errors: 0
[10:30:41.578] <TB0> INFO: flawed TBM headers: 0
[10:30:41.578] <TB0> INFO: flawed TBM trailers: 0
[10:30:41.578] <TB0> INFO: event ID mismatches: 0
[10:30:41.578] <TB0> INFO: ROC errors: 0
[10:30:41.578] <TB0> INFO: missing ROC header(s): 0
[10:30:41.579] <TB0> INFO: misplaced readback start: 0
[10:30:41.579] <TB0> INFO: Pixel decoding errors: 0
[10:30:41.579] <TB0> INFO: pixel data incomplete: 0
[10:30:41.579] <TB0> INFO: pixel address: 0
[10:30:41.579] <TB0> INFO: pulse height fill bit: 0
[10:30:41.579] <TB0> INFO: buffer corruption: 0
[10:30:41.587] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:30:41.588] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[10:30:41.588] <TB0> INFO: ######################################################################
[10:30:41.588] <TB0> INFO: PixTestReadback::doTest()
[10:30:41.588] <TB0> INFO: ######################################################################
[10:30:41.588] <TB0> INFO: ----------------------------------------------------------------------
[10:30:41.588] <TB0> INFO: PixTestReadback::CalibrateVd()
[10:30:41.588] <TB0> INFO: ----------------------------------------------------------------------
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:30:51.554] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:30:51.555] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:30:51.584] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:30:51.584] <TB0> INFO: ----------------------------------------------------------------------
[10:30:51.584] <TB0> INFO: PixTestReadback::CalibrateVa()
[10:30:51.584] <TB0> INFO: ----------------------------------------------------------------------
[10:31:01.495] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:31:01.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:31:01.528] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:31:01.528] <TB0> INFO: ----------------------------------------------------------------------
[10:31:01.528] <TB0> INFO: PixTestReadback::readbackVbg()
[10:31:01.528] <TB0> INFO: ----------------------------------------------------------------------
[10:31:09.197] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:31:09.197] <TB0> INFO: ----------------------------------------------------------------------
[10:31:09.197] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[10:31:09.197] <TB0> INFO: ----------------------------------------------------------------------
[10:31:09.197] <TB0> INFO: Vbg will be calibrated using Vd calibration
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 145.4calibrated Vbg = 1.17161 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.1calibrated Vbg = 1.17194 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.3calibrated Vbg = 1.16348 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 147calibrated Vbg = 1.16141 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.2calibrated Vbg = 1.16575 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 158.2calibrated Vbg = 1.1732 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157.1calibrated Vbg = 1.17316 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 148.5calibrated Vbg = 1.17751 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.8calibrated Vbg = 1.16709 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 155.9calibrated Vbg = 1.1677 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.9calibrated Vbg = 1.16311 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 148.1calibrated Vbg = 1.15547 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.4calibrated Vbg = 1.16921 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 149.6calibrated Vbg = 1.16992 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 144.8calibrated Vbg = 1.16639 :::*/*/*/*/
[10:31:09.197] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 149.2calibrated Vbg = 1.1763 :::*/*/*/*/
[10:31:09.201] <TB0> INFO: ----------------------------------------------------------------------
[10:31:09.201] <TB0> INFO: PixTestReadback::CalibrateIa()
[10:31:09.201] <TB0> INFO: ----------------------------------------------------------------------
[10:33:50.020] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C0.dat
[10:33:50.020] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C1.dat
[10:33:50.020] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C2.dat
[10:33:50.020] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C3.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C4.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C5.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C6.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C7.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C8.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C9.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C10.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C11.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C12.dat
[10:33:50.021] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C13.dat
[10:33:50.022] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C14.dat
[10:33:50.022] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//readbackCal_C15.dat
[10:33:50.050] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[10:33:50.051] <TB0> INFO: PixTestReadback::doTest() done
[10:33:50.051] <TB0> INFO: Decoding statistics:
[10:33:50.051] <TB0> INFO: General information:
[10:33:50.051] <TB0> INFO: 16bit words read: 1536
[10:33:50.051] <TB0> INFO: valid events total: 256
[10:33:50.051] <TB0> INFO: empty events: 256
[10:33:50.051] <TB0> INFO: valid events with pixels: 0
[10:33:50.051] <TB0> INFO: valid pixel hits: 0
[10:33:50.051] <TB0> INFO: Event errors: 0
[10:33:50.051] <TB0> INFO: start marker: 0
[10:33:50.051] <TB0> INFO: stop marker: 0
[10:33:50.051] <TB0> INFO: overflow: 0
[10:33:50.051] <TB0> INFO: invalid 5bit words: 0
[10:33:50.051] <TB0> INFO: invalid XOR eye diagram: 0
[10:33:50.051] <TB0> INFO: frame (failed synchr.): 0
[10:33:50.051] <TB0> INFO: idle data (no TBM trl): 0
[10:33:50.051] <TB0> INFO: no data (only TBM hdr): 0
[10:33:50.051] <TB0> INFO: TBM errors: 0
[10:33:50.051] <TB0> INFO: flawed TBM headers: 0
[10:33:50.051] <TB0> INFO: flawed TBM trailers: 0
[10:33:50.051] <TB0> INFO: event ID mismatches: 0
[10:33:50.051] <TB0> INFO: ROC errors: 0
[10:33:50.051] <TB0> INFO: missing ROC header(s): 0
[10:33:50.051] <TB0> INFO: misplaced readback start: 0
[10:33:50.051] <TB0> INFO: Pixel decoding errors: 0
[10:33:50.051] <TB0> INFO: pixel data incomplete: 0
[10:33:50.051] <TB0> INFO: pixel address: 0
[10:33:50.051] <TB0> INFO: pulse height fill bit: 0
[10:33:50.051] <TB0> INFO: buffer corruption: 0
[10:33:50.103] <TB0> INFO: ######################################################################
[10:33:50.103] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:33:50.103] <TB0> INFO: ######################################################################
[10:33:50.106] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[10:33:50.160] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[10:33:50.160] <TB0> INFO: run 1 of 1
[10:33:50.397] <TB0> INFO: Expecting 3120000 events.
[10:34:21.414] <TB0> INFO: 636465 events read in total (30425ms).











[10:34:50.874] <TB0> INFO: 1270435 events read in total (59885ms).











[10:35:20.568] <TB0> INFO: 1901915 events read in total (89579ms).











[10:35:50.132] <TB0> INFO: 2533590 events read in total (119143ms).











[10:36:17.736] <TB0> INFO: 3120000 events read in total (146747ms).
[10:36:17.854] <TB0> INFO: Test took 147695ms.
[10:36:41.232] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 171 seconds
[10:36:41.232] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 2 0 0 0 0 0 0 1 1 3 0
[10:36:41.232] <TB0> INFO: separation cut (per ROC): 95 107 103 106 113 91 98 106 101 112 109 117 86 83 86 115
[10:36:41.232] <TB0> INFO: Decoding statistics:
[10:36:41.232] <TB0> INFO: General information:
[10:36:41.232] <TB0> INFO: 16bit words read: 0
[10:36:41.232] <TB0> INFO: valid events total: 0
[10:36:41.232] <TB0> INFO: empty events: 0
[10:36:41.232] <TB0> INFO: valid events with pixels: 0
[10:36:41.232] <TB0> INFO: valid pixel hits: 0
[10:36:41.232] <TB0> INFO: Event errors: 0
[10:36:41.232] <TB0> INFO: start marker: 0
[10:36:41.232] <TB0> INFO: stop marker: 0
[10:36:41.232] <TB0> INFO: overflow: 0
[10:36:41.232] <TB0> INFO: invalid 5bit words: 0
[10:36:41.232] <TB0> INFO: invalid XOR eye diagram: 0
[10:36:41.232] <TB0> INFO: frame (failed synchr.): 0
[10:36:41.232] <TB0> INFO: idle data (no TBM trl): 0
[10:36:41.232] <TB0> INFO: no data (only TBM hdr): 0
[10:36:41.232] <TB0> INFO: TBM errors: 0
[10:36:41.232] <TB0> INFO: flawed TBM headers: 0
[10:36:41.232] <TB0> INFO: flawed TBM trailers: 0
[10:36:41.232] <TB0> INFO: event ID mismatches: 0
[10:36:41.232] <TB0> INFO: ROC errors: 0
[10:36:41.232] <TB0> INFO: missing ROC header(s): 0
[10:36:41.232] <TB0> INFO: misplaced readback start: 0
[10:36:41.232] <TB0> INFO: Pixel decoding errors: 0
[10:36:41.232] <TB0> INFO: pixel data incomplete: 0
[10:36:41.232] <TB0> INFO: pixel address: 0
[10:36:41.232] <TB0> INFO: pulse height fill bit: 0
[10:36:41.232] <TB0> INFO: buffer corruption: 0
[10:36:41.269] <TB0> INFO: ######################################################################
[10:36:41.269] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:36:41.269] <TB0> INFO: ######################################################################
[10:36:41.270] <TB0> INFO: ----------------------------------------------------------------------
[10:36:41.270] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[10:36:41.270] <TB0> INFO: ----------------------------------------------------------------------
[10:36:41.270] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[10:36:41.284] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[10:36:41.284] <TB0> INFO: run 1 of 1
[10:36:41.519] <TB0> INFO: Expecting 36608000 events.
[10:37:05.035] <TB0> INFO: 665100 events read in total (22924ms).
[10:37:28.879] <TB0> INFO: 1319500 events read in total (46768ms).
[10:37:51.592] <TB0> INFO: 1973400 events read in total (69481ms).
[10:38:14.535] <TB0> INFO: 2627400 events read in total (92424ms).
[10:38:37.325] <TB0> INFO: 3280500 events read in total (115214ms).
[10:38:59.970] <TB0> INFO: 3934250 events read in total (137859ms).
[10:39:22.598] <TB0> INFO: 4587800 events read in total (160487ms).
[10:39:45.291] <TB0> INFO: 5240300 events read in total (183180ms).
[10:40:07.999] <TB0> INFO: 5891900 events read in total (205888ms).
[10:40:30.792] <TB0> INFO: 6544150 events read in total (228681ms).
[10:40:53.452] <TB0> INFO: 7195900 events read in total (251341ms).
[10:41:16.132] <TB0> INFO: 7847450 events read in total (274021ms).
[10:41:38.746] <TB0> INFO: 8498200 events read in total (296635ms).
[10:42:01.193] <TB0> INFO: 9148950 events read in total (319082ms).
[10:42:24.147] <TB0> INFO: 9799100 events read in total (342036ms).
[10:42:46.954] <TB0> INFO: 10450200 events read in total (364843ms).
[10:43:09.822] <TB0> INFO: 11100850 events read in total (387711ms).
[10:43:32.499] <TB0> INFO: 11750700 events read in total (410388ms).
[10:43:55.244] <TB0> INFO: 12400800 events read in total (433133ms).
[10:44:17.900] <TB0> INFO: 13050250 events read in total (455789ms).
[10:44:40.465] <TB0> INFO: 13699750 events read in total (478354ms).
[10:45:02.886] <TB0> INFO: 14348850 events read in total (500776ms).
[10:45:25.757] <TB0> INFO: 14997650 events read in total (523646ms).
[10:45:48.625] <TB0> INFO: 15646100 events read in total (546514ms).
[10:46:11.449] <TB0> INFO: 16295400 events read in total (569338ms).
[10:46:34.057] <TB0> INFO: 16944950 events read in total (591946ms).
[10:46:56.946] <TB0> INFO: 17593100 events read in total (614835ms).
[10:47:19.746] <TB0> INFO: 18240600 events read in total (637635ms).
[10:47:42.357] <TB0> INFO: 18887900 events read in total (660246ms).
[10:48:05.144] <TB0> INFO: 19533550 events read in total (683033ms).
[10:48:27.659] <TB0> INFO: 20178650 events read in total (705548ms).
[10:48:49.975] <TB0> INFO: 20824700 events read in total (727864ms).
[10:49:12.677] <TB0> INFO: 21468400 events read in total (750566ms).
[10:49:35.336] <TB0> INFO: 22112900 events read in total (773225ms).
[10:49:57.703] <TB0> INFO: 22756800 events read in total (795592ms).
[10:50:20.263] <TB0> INFO: 23399550 events read in total (818152ms).
[10:50:42.997] <TB0> INFO: 24043650 events read in total (840886ms).
[10:51:05.389] <TB0> INFO: 24689300 events read in total (863278ms).
[10:51:27.866] <TB0> INFO: 25335200 events read in total (885755ms).
[10:51:50.298] <TB0> INFO: 25980300 events read in total (908187ms).
[10:52:12.999] <TB0> INFO: 26624250 events read in total (930888ms).
[10:52:35.608] <TB0> INFO: 27266450 events read in total (953497ms).
[10:52:58.438] <TB0> INFO: 27908700 events read in total (976327ms).
[10:53:20.869] <TB0> INFO: 28552850 events read in total (998758ms).
[10:53:43.470] <TB0> INFO: 29196900 events read in total (1021359ms).
[10:54:06.110] <TB0> INFO: 29840150 events read in total (1043999ms).
[10:54:28.479] <TB0> INFO: 30482050 events read in total (1066368ms).
[10:54:51.021] <TB0> INFO: 31123900 events read in total (1088910ms).
[10:55:13.549] <TB0> INFO: 31766100 events read in total (1111438ms).
[10:55:36.240] <TB0> INFO: 32409200 events read in total (1134129ms).
[10:55:58.631] <TB0> INFO: 33051000 events read in total (1156520ms).
[10:56:20.971] <TB0> INFO: 33693450 events read in total (1178860ms).
[10:56:43.837] <TB0> INFO: 34336700 events read in total (1201726ms).
[10:57:06.369] <TB0> INFO: 34979550 events read in total (1224258ms).
[10:57:28.836] <TB0> INFO: 35622700 events read in total (1246725ms).
[10:57:51.773] <TB0> INFO: 36273000 events read in total (1269662ms).
[10:58:03.613] <TB0> INFO: 36608000 events read in total (1281502ms).
[10:58:03.686] <TB0> INFO: Test took 1282402ms.
[10:58:04.061] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:05.587] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:07.309] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:09.080] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:11.079] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:12.967] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:14.933] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:16.985] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:18.804] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:20.361] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:22.311] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:24.065] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:25.880] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:27.712] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:29.384] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:31.019] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[10:58:33.114] <TB0> INFO: PixTestScurves::scurves() done
[10:58:33.114] <TB0> INFO: Vcal mean: 105.22 101.11 103.21 108.10 112.14 112.48 108.83 119.78 111.20 110.05 107.80 105.43 109.43 107.42 106.10 112.61
[10:58:33.114] <TB0> INFO: Vcal RMS: 5.58 5.20 5.13 5.07 5.01 5.14 5.29 6.50 4.72 4.99 5.42 5.20 4.98 5.08 5.26 5.62
[10:58:33.114] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1311 seconds
[10:58:33.115] <TB0> INFO: Decoding statistics:
[10:58:33.115] <TB0> INFO: General information:
[10:58:33.115] <TB0> INFO: 16bit words read: 0
[10:58:33.115] <TB0> INFO: valid events total: 0
[10:58:33.115] <TB0> INFO: empty events: 0
[10:58:33.115] <TB0> INFO: valid events with pixels: 0
[10:58:33.115] <TB0> INFO: valid pixel hits: 0
[10:58:33.115] <TB0> INFO: Event errors: 0
[10:58:33.115] <TB0> INFO: start marker: 0
[10:58:33.115] <TB0> INFO: stop marker: 0
[10:58:33.115] <TB0> INFO: overflow: 0
[10:58:33.115] <TB0> INFO: invalid 5bit words: 0
[10:58:33.115] <TB0> INFO: invalid XOR eye diagram: 0
[10:58:33.115] <TB0> INFO: frame (failed synchr.): 0
[10:58:33.115] <TB0> INFO: idle data (no TBM trl): 0
[10:58:33.115] <TB0> INFO: no data (only TBM hdr): 0
[10:58:33.115] <TB0> INFO: TBM errors: 0
[10:58:33.115] <TB0> INFO: flawed TBM headers: 0
[10:58:33.115] <TB0> INFO: flawed TBM trailers: 0
[10:58:33.115] <TB0> INFO: event ID mismatches: 0
[10:58:33.115] <TB0> INFO: ROC errors: 0
[10:58:33.115] <TB0> INFO: missing ROC header(s): 0
[10:58:33.115] <TB0> INFO: misplaced readback start: 0
[10:58:33.115] <TB0> INFO: Pixel decoding errors: 0
[10:58:33.115] <TB0> INFO: pixel data incomplete: 0
[10:58:33.115] <TB0> INFO: pixel address: 0
[10:58:33.115] <TB0> INFO: pulse height fill bit: 0
[10:58:33.115] <TB0> INFO: buffer corruption: 0
[10:58:33.204] <TB0> INFO: ######################################################################
[10:58:33.204] <TB0> INFO: PixTestTrim::doTest()
[10:58:33.204] <TB0> INFO: ######################################################################
[10:58:33.205] <TB0> INFO: ----------------------------------------------------------------------
[10:58:33.205] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[10:58:33.205] <TB0> INFO: ----------------------------------------------------------------------
[10:58:33.256] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:58:33.256] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:58:33.270] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[10:58:33.270] <TB0> INFO: run 1 of 1
[10:58:33.538] <TB0> INFO: Expecting 5025280 events.
[10:59:03.973] <TB0> INFO: 814992 events read in total (29827ms).
[10:59:34.090] <TB0> INFO: 1626760 events read in total (59944ms).
[11:00:03.922] <TB0> INFO: 2436344 events read in total (89776ms).
[11:00:33.991] <TB0> INFO: 3243176 events read in total (119845ms).
[11:01:03.871] <TB0> INFO: 4046656 events read in total (149725ms).
[11:01:33.680] <TB0> INFO: 4847288 events read in total (179534ms).
[11:01:40.726] <TB0> INFO: 5025280 events read in total (186580ms).
[11:01:40.786] <TB0> INFO: Test took 187517ms.
[11:02:00.666] <TB0> INFO: ROC 0 VthrComp = 110
[11:02:00.666] <TB0> INFO: ROC 1 VthrComp = 110
[11:02:00.666] <TB0> INFO: ROC 2 VthrComp = 107
[11:02:00.666] <TB0> INFO: ROC 3 VthrComp = 113
[11:02:00.666] <TB0> INFO: ROC 4 VthrComp = 123
[11:02:00.666] <TB0> INFO: ROC 5 VthrComp = 118
[11:02:00.666] <TB0> INFO: ROC 6 VthrComp = 112
[11:02:00.667] <TB0> INFO: ROC 7 VthrComp = 124
[11:02:00.667] <TB0> INFO: ROC 8 VthrComp = 119
[11:02:00.667] <TB0> INFO: ROC 9 VthrComp = 127
[11:02:00.667] <TB0> INFO: ROC 10 VthrComp = 111
[11:02:00.667] <TB0> INFO: ROC 11 VthrComp = 116
[11:02:00.667] <TB0> INFO: ROC 12 VthrComp = 121
[11:02:00.667] <TB0> INFO: ROC 13 VthrComp = 116
[11:02:00.667] <TB0> INFO: ROC 14 VthrComp = 111
[11:02:00.667] <TB0> INFO: ROC 15 VthrComp = 119
[11:02:00.906] <TB0> INFO: Expecting 41600 events.
[11:02:04.467] <TB0> INFO: 41600 events read in total (2970ms).
[11:02:04.468] <TB0> INFO: Test took 3799ms.
[11:02:04.479] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:02:04.479] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:02:04.490] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:02:04.490] <TB0> INFO: run 1 of 1
[11:02:04.768] <TB0> INFO: Expecting 5025280 events.
[11:02:31.479] <TB0> INFO: 587800 events read in total (26119ms).
[11:02:57.724] <TB0> INFO: 1175256 events read in total (52364ms).
[11:03:23.390] <TB0> INFO: 1762720 events read in total (78030ms).
[11:03:48.996] <TB0> INFO: 2349016 events read in total (103636ms).
[11:04:14.728] <TB0> INFO: 2934200 events read in total (129368ms).
[11:04:40.284] <TB0> INFO: 3518328 events read in total (154924ms).
[11:05:05.975] <TB0> INFO: 4101888 events read in total (180615ms).
[11:05:31.420] <TB0> INFO: 4685176 events read in total (206060ms).
[11:05:46.413] <TB0> INFO: 5025280 events read in total (221053ms).
[11:05:46.548] <TB0> INFO: Test took 222057ms.
[11:06:10.277] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.8219 for pixel 25/8 mean/min/max = 47.3858/33.9204/60.8511
[11:06:10.277] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.1529 for pixel 25/2 mean/min/max = 46.5087/34.753/58.2644
[11:06:10.278] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.6056 for pixel 8/76 mean/min/max = 47.0528/34.3763/59.7294
[11:06:10.279] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 58.9746 for pixel 7/46 mean/min/max = 45.7049/32.3483/59.0615
[11:06:10.279] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.4256 for pixel 29/79 mean/min/max = 45.2766/32.037/58.5162
[11:06:10.280] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 59.1224 for pixel 21/13 mean/min/max = 45.6266/32.1079/59.1453
[11:06:10.280] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 59.899 for pixel 11/3 mean/min/max = 46.1687/32.0532/60.2843
[11:06:10.281] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 61.5631 for pixel 25/77 mean/min/max = 46.2968/31.0231/61.5705
[11:06:10.281] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.6615 for pixel 26/43 mean/min/max = 44.9719/32.1496/57.7942
[11:06:10.281] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 56.2227 for pixel 15/7 mean/min/max = 43.5925/30.7035/56.4815
[11:06:10.282] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 62.0251 for pixel 21/65 mean/min/max = 48.1454/34.1454/62.1455
[11:06:10.282] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 57.2336 for pixel 0/6 mean/min/max = 44.4741/31.5689/57.3793
[11:06:10.283] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 57.8422 for pixel 6/7 mean/min/max = 45.0025/32.1554/57.8495
[11:06:10.283] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 57.8655 for pixel 25/78 mean/min/max = 44.9993/32.0063/57.9924
[11:06:10.284] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 59.4033 for pixel 14/69 mean/min/max = 46.6576/33.7665/59.5486
[11:06:10.284] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 58.6752 for pixel 15/71 mean/min/max = 44.9906/31.0564/58.9249
[11:06:10.286] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:10.374] <TB0> INFO: Expecting 411648 events.
[11:06:19.837] <TB0> INFO: 411648 events read in total (8864ms).
[11:06:19.844] <TB0> INFO: Expecting 411648 events.
[11:06:29.027] <TB0> INFO: 411648 events read in total (8780ms).
[11:06:29.040] <TB0> INFO: Expecting 411648 events.
[11:06:38.277] <TB0> INFO: 411648 events read in total (8834ms).
[11:06:38.290] <TB0> INFO: Expecting 411648 events.
[11:06:47.532] <TB0> INFO: 411648 events read in total (8839ms).
[11:06:47.549] <TB0> INFO: Expecting 411648 events.
[11:06:56.678] <TB0> INFO: 411648 events read in total (8727ms).
[11:06:56.701] <TB0> INFO: Expecting 411648 events.
[11:07:06.261] <TB0> INFO: 411648 events read in total (9157ms).
[11:07:06.288] <TB0> INFO: Expecting 411648 events.
[11:07:15.822] <TB0> INFO: 411648 events read in total (9130ms).
[11:07:15.847] <TB0> INFO: Expecting 411648 events.
[11:07:25.326] <TB0> INFO: 411648 events read in total (9076ms).
[11:07:25.353] <TB0> INFO: Expecting 411648 events.
[11:07:34.921] <TB0> INFO: 411648 events read in total (9163ms).
[11:07:34.963] <TB0> INFO: Expecting 411648 events.
[11:07:44.484] <TB0> INFO: 411648 events read in total (9118ms).
[11:07:44.532] <TB0> INFO: Expecting 411648 events.
[11:07:54.167] <TB0> INFO: 411648 events read in total (9232ms).
[11:07:54.216] <TB0> INFO: Expecting 411648 events.
[11:08:03.663] <TB0> INFO: 411648 events read in total (9044ms).
[11:08:03.792] <TB0> INFO: Expecting 411648 events.
[11:08:13.308] <TB0> INFO: 411648 events read in total (9113ms).
[11:08:13.416] <TB0> INFO: Expecting 411648 events.
[11:08:22.872] <TB0> INFO: 411648 events read in total (9053ms).
[11:08:22.959] <TB0> INFO: Expecting 411648 events.
[11:08:32.421] <TB0> INFO: 411648 events read in total (9059ms).
[11:08:32.484] <TB0> INFO: Expecting 411648 events.
[11:08:41.946] <TB0> INFO: 411648 events read in total (9059ms).
[11:08:42.015] <TB0> INFO: Test took 151729ms.
[11:08:42.871] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:08:42.885] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:08:42.885] <TB0> INFO: run 1 of 1
[11:08:43.123] <TB0> INFO: Expecting 5025280 events.
[11:09:09.833] <TB0> INFO: 586160 events read in total (26118ms).
[11:09:35.826] <TB0> INFO: 1170784 events read in total (52111ms).
[11:10:02.162] <TB0> INFO: 1755816 events read in total (78447ms).
[11:10:28.367] <TB0> INFO: 2339880 events read in total (104652ms).
[11:10:54.597] <TB0> INFO: 2924696 events read in total (130882ms).
[11:11:20.634] <TB0> INFO: 3509200 events read in total (156919ms).
[11:11:46.708] <TB0> INFO: 4092936 events read in total (182993ms).
[11:12:12.699] <TB0> INFO: 4676504 events read in total (208984ms).
[11:12:28.553] <TB0> INFO: 5025280 events read in total (224838ms).
[11:12:28.722] <TB0> INFO: Test took 225838ms.
[11:12:52.426] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 1.098905 .. 145.720207
[11:12:52.663] <TB0> INFO: Expecting 208000 events.
[11:13:02.707] <TB0> INFO: 208000 events read in total (9452ms).
[11:13:02.709] <TB0> INFO: Test took 10281ms.
[11:13:02.769] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 155 (-1/-1) hits flags = 528 (plus default)
[11:13:02.784] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:13:02.784] <TB0> INFO: run 1 of 1
[11:13:03.063] <TB0> INFO: Expecting 5158400 events.
[11:13:29.056] <TB0> INFO: 583960 events read in total (25402ms).
[11:13:54.842] <TB0> INFO: 1167896 events read in total (51188ms).
[11:14:20.347] <TB0> INFO: 1751784 events read in total (76693ms).
[11:14:46.473] <TB0> INFO: 2335664 events read in total (102819ms).
[11:15:11.926] <TB0> INFO: 2919368 events read in total (128273ms).
[11:15:37.403] <TB0> INFO: 3502688 events read in total (153749ms).
[11:16:03.514] <TB0> INFO: 4085864 events read in total (179860ms).
[11:16:28.684] <TB0> INFO: 4668448 events read in total (205030ms).
[11:16:50.891] <TB0> INFO: 5158400 events read in total (227237ms).
[11:16:50.987] <TB0> INFO: Test took 228204ms.
[11:17:18.999] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 14.605533 .. 46.766488
[11:17:19.276] <TB0> INFO: Expecting 208000 events.
[11:17:28.875] <TB0> INFO: 208000 events read in total (9008ms).
[11:17:28.876] <TB0> INFO: Test took 9875ms.
[11:17:28.925] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 4 .. 56 (-1/-1) hits flags = 528 (plus default)
[11:17:28.938] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:17:28.938] <TB0> INFO: run 1 of 1
[11:17:29.216] <TB0> INFO: Expecting 1763840 events.
[11:17:57.586] <TB0> INFO: 698360 events read in total (27778ms).
[11:18:25.567] <TB0> INFO: 1396064 events read in total (55759ms).
[11:18:40.655] <TB0> INFO: 1763840 events read in total (70847ms).
[11:18:40.688] <TB0> INFO: Test took 71750ms.
[11:18:54.567] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 16.104906 .. 45.602502
[11:18:54.806] <TB0> INFO: Expecting 208000 events.
[11:19:04.995] <TB0> INFO: 208000 events read in total (9597ms).
[11:19:04.997] <TB0> INFO: Test took 10429ms.
[11:19:05.046] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 6 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:19:05.061] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:19:05.061] <TB0> INFO: run 1 of 1
[11:19:05.339] <TB0> INFO: Expecting 1664000 events.
[11:19:34.732] <TB0> INFO: 697632 events read in total (28801ms).
[11:20:02.753] <TB0> INFO: 1394680 events read in total (56822ms).
[11:20:14.539] <TB0> INFO: 1664000 events read in total (68608ms).
[11:20:14.583] <TB0> INFO: Test took 69523ms.
[11:20:27.517] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 18.124678 .. 43.050425
[11:20:27.798] <TB0> INFO: Expecting 208000 events.
[11:20:37.585] <TB0> INFO: 208000 events read in total (9195ms).
[11:20:37.586] <TB0> INFO: Test took 10067ms.
[11:20:37.635] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 8 .. 53 (-1/-1) hits flags = 528 (plus default)
[11:20:37.649] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:20:37.649] <TB0> INFO: run 1 of 1
[11:20:37.927] <TB0> INFO: Expecting 1530880 events.
[11:21:06.234] <TB0> INFO: 701272 events read in total (27715ms).
[11:21:34.939] <TB0> INFO: 1401872 events read in total (56420ms).
[11:21:40.680] <TB0> INFO: 1530880 events read in total (62161ms).
[11:21:40.710] <TB0> INFO: Test took 63062ms.
[11:21:54.194] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:21:54.194] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[11:21:54.209] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:21:54.209] <TB0> INFO: run 1 of 1
[11:21:54.487] <TB0> INFO: Expecting 1364480 events.
[11:22:23.066] <TB0> INFO: 666744 events read in total (27987ms).
[11:22:51.577] <TB0> INFO: 1333160 events read in total (56498ms).
[11:22:53.417] <TB0> INFO: 1364480 events read in total (58338ms).
[11:22:53.454] <TB0> INFO: Test took 59245ms.
[11:23:06.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C0.dat
[11:23:06.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C1.dat
[11:23:06.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C2.dat
[11:23:06.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C3.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C4.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C5.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C6.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C7.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C8.dat
[11:23:06.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C9.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C10.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C11.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C12.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C13.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C14.dat
[11:23:06.386] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C15.dat
[11:23:06.387] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C0.dat
[11:23:06.395] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C1.dat
[11:23:06.402] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C2.dat
[11:23:06.407] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C3.dat
[11:23:06.412] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C4.dat
[11:23:06.417] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C5.dat
[11:23:06.421] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C6.dat
[11:23:06.426] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C7.dat
[11:23:06.431] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C8.dat
[11:23:06.435] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C9.dat
[11:23:06.440] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C10.dat
[11:23:06.445] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C11.dat
[11:23:06.450] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C12.dat
[11:23:06.454] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C13.dat
[11:23:06.459] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C14.dat
[11:23:06.464] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//trimParameters35_C15.dat
[11:23:06.469] <TB0> INFO: PixTestTrim::trimTest() done
[11:23:06.469] <TB0> INFO: vtrim: 128 127 113 134 124 125 120 145 117 135 142 116 132 133 126 130
[11:23:06.469] <TB0> INFO: vthrcomp: 110 110 107 113 123 118 112 124 119 127 111 116 121 116 111 119
[11:23:06.469] <TB0> INFO: vcal mean: 34.98 34.96 35.02 34.98 34.97 34.97 34.93 35.07 34.99 34.92 34.97 34.93 34.94 34.94 34.96 34.95
[11:23:06.469] <TB0> INFO: vcal RMS: 0.97 0.87 0.93 1.02 0.98 1.00 1.04 1.19 0.98 1.04 1.08 1.04 1.04 1.04 0.91 1.05
[11:23:06.469] <TB0> INFO: bits mean: 9.12 8.95 8.64 9.61 9.48 9.51 9.37 9.85 9.63 10.13 9.02 9.59 9.72 9.90 8.69 10.06
[11:23:06.469] <TB0> INFO: bits RMS: 2.49 2.50 2.62 2.63 2.76 2.71 2.74 2.61 2.71 2.69 2.47 2.77 2.65 2.55 2.76 2.57
[11:23:06.477] <TB0> INFO: ----------------------------------------------------------------------
[11:23:06.477] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[11:23:06.477] <TB0> INFO: ----------------------------------------------------------------------
[11:23:06.480] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[11:23:06.494] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:23:06.494] <TB0> INFO: run 1 of 1
[11:23:06.733] <TB0> INFO: Expecting 4160000 events.
[11:23:38.829] <TB0> INFO: 733795 events read in total (31504ms).
[11:24:10.148] <TB0> INFO: 1461850 events read in total (62823ms).
[11:24:41.440] <TB0> INFO: 2186505 events read in total (94115ms).
[11:25:12.991] <TB0> INFO: 2905930 events read in total (125666ms).
[11:25:44.130] <TB0> INFO: 3622835 events read in total (156805ms).
[11:26:07.527] <TB0> INFO: 4160000 events read in total (180202ms).
[11:26:07.635] <TB0> INFO: Test took 181141ms.
[11:26:33.664] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[11:26:33.678] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:26:33.678] <TB0> INFO: run 1 of 1
[11:26:33.917] <TB0> INFO: Expecting 4035200 events.
[11:27:05.321] <TB0> INFO: 716485 events read in total (30812ms).
[11:27:36.102] <TB0> INFO: 1427340 events read in total (61593ms).
[11:28:06.934] <TB0> INFO: 2135025 events read in total (92425ms).
[11:28:38.038] <TB0> INFO: 2838500 events read in total (123529ms).
[11:29:09.094] <TB0> INFO: 3539510 events read in total (154585ms).
[11:29:30.768] <TB0> INFO: 4035200 events read in total (176259ms).
[11:29:30.831] <TB0> INFO: Test took 177153ms.
[11:30:00.336] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[11:30:00.349] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:30:00.349] <TB0> INFO: run 1 of 1
[11:30:00.627] <TB0> INFO: Expecting 3785600 events.
[11:30:32.644] <TB0> INFO: 733320 events read in total (31425ms).
[11:31:04.083] <TB0> INFO: 1460285 events read in total (62864ms).
[11:31:35.300] <TB0> INFO: 2182950 events read in total (94082ms).
[11:32:06.354] <TB0> INFO: 2900805 events read in total (125135ms).
[11:32:37.847] <TB0> INFO: 3616995 events read in total (156628ms).
[11:32:45.272] <TB0> INFO: 3785600 events read in total (164053ms).
[11:32:45.345] <TB0> INFO: Test took 164995ms.
[11:33:11.798] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 179 (-1/-1) hits flags = 528 (plus default)
[11:33:11.812] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:33:11.812] <TB0> INFO: run 1 of 1
[11:33:12.090] <TB0> INFO: Expecting 3744000 events.
[11:33:44.436] <TB0> INFO: 736080 events read in total (31754ms).
[11:34:15.576] <TB0> INFO: 1465815 events read in total (62894ms).
[11:34:46.826] <TB0> INFO: 2191175 events read in total (94145ms).
[11:35:18.295] <TB0> INFO: 2912145 events read in total (125614ms).
[11:35:49.281] <TB0> INFO: 3631135 events read in total (156599ms).
[11:35:54.475] <TB0> INFO: 3744000 events read in total (161793ms).
[11:35:54.543] <TB0> INFO: Test took 162730ms.
[11:36:21.441] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[11:36:21.455] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:36:21.455] <TB0> INFO: run 1 of 1
[11:36:21.694] <TB0> INFO: Expecting 3806400 events.
[11:36:53.831] <TB0> INFO: 731745 events read in total (31546ms).
[11:37:24.946] <TB0> INFO: 1457020 events read in total (62661ms).
[11:37:56.234] <TB0> INFO: 2178440 events read in total (93949ms).
[11:38:27.506] <TB0> INFO: 2895240 events read in total (125221ms).
[11:38:59.335] <TB0> INFO: 3610160 events read in total (157050ms).
[11:39:08.027] <TB0> INFO: 3806400 events read in total (165742ms).
[11:39:08.088] <TB0> INFO: Test took 166633ms.
[11:39:35.597] <TB0> INFO: PixTestTrim::trimBitTest() done
[11:39:35.599] <TB0> INFO: PixTestTrim::doTest() done, duration: 2462 seconds
[11:39:35.599] <TB0> INFO: Decoding statistics:
[11:39:35.599] <TB0> INFO: General information:
[11:39:35.599] <TB0> INFO: 16bit words read: 0
[11:39:35.599] <TB0> INFO: valid events total: 0
[11:39:35.599] <TB0> INFO: empty events: 0
[11:39:35.599] <TB0> INFO: valid events with pixels: 0
[11:39:35.599] <TB0> INFO: valid pixel hits: 0
[11:39:35.599] <TB0> INFO: Event errors: 0
[11:39:35.599] <TB0> INFO: start marker: 0
[11:39:35.599] <TB0> INFO: stop marker: 0
[11:39:35.599] <TB0> INFO: overflow: 0
[11:39:35.599] <TB0> INFO: invalid 5bit words: 0
[11:39:35.599] <TB0> INFO: invalid XOR eye diagram: 0
[11:39:35.599] <TB0> INFO: frame (failed synchr.): 0
[11:39:35.599] <TB0> INFO: idle data (no TBM trl): 0
[11:39:35.599] <TB0> INFO: no data (only TBM hdr): 0
[11:39:35.599] <TB0> INFO: TBM errors: 0
[11:39:35.599] <TB0> INFO: flawed TBM headers: 0
[11:39:35.599] <TB0> INFO: flawed TBM trailers: 0
[11:39:35.599] <TB0> INFO: event ID mismatches: 0
[11:39:35.599] <TB0> INFO: ROC errors: 0
[11:39:35.599] <TB0> INFO: missing ROC header(s): 0
[11:39:35.599] <TB0> INFO: misplaced readback start: 0
[11:39:35.599] <TB0> INFO: Pixel decoding errors: 0
[11:39:35.599] <TB0> INFO: pixel data incomplete: 0
[11:39:35.599] <TB0> INFO: pixel address: 0
[11:39:35.599] <TB0> INFO: pulse height fill bit: 0
[11:39:35.599] <TB0> INFO: buffer corruption: 0
[11:39:36.233] <TB0> INFO: ######################################################################
[11:39:36.233] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:39:36.233] <TB0> INFO: ######################################################################
[11:39:36.471] <TB0> INFO: Expecting 41600 events.
[11:39:39.990] <TB0> INFO: 41600 events read in total (2927ms).
[11:39:39.991] <TB0> INFO: Test took 3757ms.
[11:39:40.444] <TB0> INFO: Expecting 41600 events.
[11:39:43.977] <TB0> INFO: 41600 events read in total (2941ms).
[11:39:43.978] <TB0> INFO: Test took 3783ms.
[11:39:44.316] <TB0> INFO: Expecting 41600 events.
[11:39:47.845] <TB0> INFO: 41600 events read in total (2937ms).
[11:39:47.846] <TB0> INFO: Test took 3844ms.
[11:39:48.136] <TB0> INFO: Expecting 41600 events.
[11:39:51.842] <TB0> INFO: 41600 events read in total (3115ms).
[11:39:51.844] <TB0> INFO: Test took 3973ms.
[11:39:52.151] <TB0> INFO: Expecting 41600 events.
[11:39:55.739] <TB0> INFO: 41600 events read in total (2997ms).
[11:39:55.740] <TB0> INFO: Test took 3869ms.
[11:39:56.031] <TB0> INFO: Expecting 41600 events.
[11:39:59.758] <TB0> INFO: 41600 events read in total (3135ms).
[11:39:59.759] <TB0> INFO: Test took 3993ms.
[11:40:00.052] <TB0> INFO: Expecting 41600 events.
[11:40:03.661] <TB0> INFO: 41600 events read in total (3018ms).
[11:40:03.662] <TB0> INFO: Test took 3879ms.
[11:40:03.951] <TB0> INFO: Expecting 41600 events.
[11:40:07.514] <TB0> INFO: 41600 events read in total (2972ms).
[11:40:07.515] <TB0> INFO: Test took 3829ms.
[11:40:07.806] <TB0> INFO: Expecting 41600 events.
[11:40:11.460] <TB0> INFO: 41600 events read in total (3062ms).
[11:40:11.461] <TB0> INFO: Test took 3920ms.
[11:40:11.752] <TB0> INFO: Expecting 41600 events.
[11:40:15.373] <TB0> INFO: 41600 events read in total (3029ms).
[11:40:15.375] <TB0> INFO: Test took 3888ms.
[11:40:15.731] <TB0> INFO: Expecting 41600 events.
[11:40:19.293] <TB0> INFO: 41600 events read in total (2970ms).
[11:40:19.294] <TB0> INFO: Test took 3889ms.
[11:40:19.583] <TB0> INFO: Expecting 41600 events.
[11:40:23.200] <TB0> INFO: 41600 events read in total (3024ms).
[11:40:23.201] <TB0> INFO: Test took 3882ms.
[11:40:23.559] <TB0> INFO: Expecting 41600 events.
[11:40:27.241] <TB0> INFO: 41600 events read in total (3091ms).
[11:40:27.242] <TB0> INFO: Test took 4017ms.
[11:40:27.531] <TB0> INFO: Expecting 41600 events.
[11:40:31.104] <TB0> INFO: 41600 events read in total (2981ms).
[11:40:31.104] <TB0> INFO: Test took 3837ms.
[11:40:31.394] <TB0> INFO: Expecting 41600 events.
[11:40:34.947] <TB0> INFO: 41600 events read in total (2962ms).
[11:40:34.948] <TB0> INFO: Test took 3819ms.
[11:40:35.237] <TB0> INFO: Expecting 41600 events.
[11:40:38.723] <TB0> INFO: 41600 events read in total (2895ms).
[11:40:38.724] <TB0> INFO: Test took 3752ms.
[11:40:39.013] <TB0> INFO: Expecting 41600 events.
[11:40:42.602] <TB0> INFO: 41600 events read in total (2997ms).
[11:40:42.603] <TB0> INFO: Test took 3855ms.
[11:40:42.955] <TB0> INFO: Expecting 41600 events.
[11:40:46.736] <TB0> INFO: 41600 events read in total (3189ms).
[11:40:46.737] <TB0> INFO: Test took 4107ms.
[11:40:47.026] <TB0> INFO: Expecting 41600 events.
[11:40:50.582] <TB0> INFO: 41600 events read in total (2964ms).
[11:40:50.583] <TB0> INFO: Test took 3822ms.
[11:40:50.872] <TB0> INFO: Expecting 41600 events.
[11:40:54.387] <TB0> INFO: 41600 events read in total (2923ms).
[11:40:54.388] <TB0> INFO: Test took 3781ms.
[11:40:54.726] <TB0> INFO: Expecting 41600 events.
[11:40:58.302] <TB0> INFO: 41600 events read in total (2984ms).
[11:40:58.303] <TB0> INFO: Test took 3886ms.
[11:40:58.592] <TB0> INFO: Expecting 41600 events.
[11:41:02.092] <TB0> INFO: 41600 events read in total (2908ms).
[11:41:02.093] <TB0> INFO: Test took 3766ms.
[11:41:02.382] <TB0> INFO: Expecting 41600 events.
[11:41:05.912] <TB0> INFO: 41600 events read in total (2938ms).
[11:41:05.913] <TB0> INFO: Test took 3796ms.
[11:41:06.202] <TB0> INFO: Expecting 41600 events.
[11:41:09.692] <TB0> INFO: 41600 events read in total (2898ms).
[11:41:09.693] <TB0> INFO: Test took 3756ms.
[11:41:09.983] <TB0> INFO: Expecting 41600 events.
[11:41:13.482] <TB0> INFO: 41600 events read in total (2908ms).
[11:41:13.483] <TB0> INFO: Test took 3766ms.
[11:41:13.834] <TB0> INFO: Expecting 41600 events.
[11:41:17.349] <TB0> INFO: 41600 events read in total (2923ms).
[11:41:17.350] <TB0> INFO: Test took 3843ms.
[11:41:17.661] <TB0> INFO: Expecting 41600 events.
[11:41:21.143] <TB0> INFO: 41600 events read in total (2890ms).
[11:41:21.143] <TB0> INFO: Test took 3769ms.
[11:41:21.432] <TB0> INFO: Expecting 41600 events.
[11:41:24.939] <TB0> INFO: 41600 events read in total (2915ms).
[11:41:24.940] <TB0> INFO: Test took 3773ms.
[11:41:25.234] <TB0> INFO: Expecting 41600 events.
[11:41:28.761] <TB0> INFO: 41600 events read in total (2936ms).
[11:41:28.762] <TB0> INFO: Test took 3793ms.
[11:41:29.057] <TB0> INFO: Expecting 2560 events.
[11:41:29.956] <TB0> INFO: 2560 events read in total (307ms).
[11:41:29.956] <TB0> INFO: Test took 1178ms.
[11:41:30.263] <TB0> INFO: Expecting 2560 events.
[11:41:31.157] <TB0> INFO: 2560 events read in total (302ms).
[11:41:31.157] <TB0> INFO: Test took 1199ms.
[11:41:31.465] <TB0> INFO: Expecting 2560 events.
[11:41:32.356] <TB0> INFO: 2560 events read in total (299ms).
[11:41:32.356] <TB0> INFO: Test took 1198ms.
[11:41:32.665] <TB0> INFO: Expecting 2560 events.
[11:41:33.551] <TB0> INFO: 2560 events read in total (295ms).
[11:41:33.551] <TB0> INFO: Test took 1194ms.
[11:41:33.859] <TB0> INFO: Expecting 2560 events.
[11:41:34.750] <TB0> INFO: 2560 events read in total (299ms).
[11:41:34.750] <TB0> INFO: Test took 1199ms.
[11:41:35.057] <TB0> INFO: Expecting 2560 events.
[11:41:35.945] <TB0> INFO: 2560 events read in total (296ms).
[11:41:35.945] <TB0> INFO: Test took 1194ms.
[11:41:36.252] <TB0> INFO: Expecting 2560 events.
[11:41:37.131] <TB0> INFO: 2560 events read in total (287ms).
[11:41:37.132] <TB0> INFO: Test took 1186ms.
[11:41:37.440] <TB0> INFO: Expecting 2560 events.
[11:41:38.331] <TB0> INFO: 2560 events read in total (300ms).
[11:41:38.331] <TB0> INFO: Test took 1199ms.
[11:41:38.639] <TB0> INFO: Expecting 2560 events.
[11:41:39.527] <TB0> INFO: 2560 events read in total (296ms).
[11:41:39.527] <TB0> INFO: Test took 1195ms.
[11:41:39.835] <TB0> INFO: Expecting 2560 events.
[11:41:40.713] <TB0> INFO: 2560 events read in total (287ms).
[11:41:40.713] <TB0> INFO: Test took 1185ms.
[11:41:41.024] <TB0> INFO: Expecting 2560 events.
[11:41:41.911] <TB0> INFO: 2560 events read in total (295ms).
[11:41:41.911] <TB0> INFO: Test took 1197ms.
[11:41:42.219] <TB0> INFO: Expecting 2560 events.
[11:41:43.108] <TB0> INFO: 2560 events read in total (297ms).
[11:41:43.108] <TB0> INFO: Test took 1196ms.
[11:41:43.416] <TB0> INFO: Expecting 2560 events.
[11:41:44.302] <TB0> INFO: 2560 events read in total (294ms).
[11:41:44.303] <TB0> INFO: Test took 1193ms.
[11:41:44.610] <TB0> INFO: Expecting 2560 events.
[11:41:45.496] <TB0> INFO: 2560 events read in total (295ms).
[11:41:45.497] <TB0> INFO: Test took 1194ms.
[11:41:45.805] <TB0> INFO: Expecting 2560 events.
[11:41:46.698] <TB0> INFO: 2560 events read in total (301ms).
[11:41:46.698] <TB0> INFO: Test took 1200ms.
[11:41:47.006] <TB0> INFO: Expecting 2560 events.
[11:41:47.896] <TB0> INFO: 2560 events read in total (298ms).
[11:41:47.897] <TB0> INFO: Test took 1199ms.
[11:41:47.901] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:41:48.206] <TB0> INFO: Expecting 655360 events.
[11:42:03.057] <TB0> INFO: 655360 events read in total (14259ms).
[11:42:03.072] <TB0> INFO: Expecting 655360 events.
[11:42:17.798] <TB0> INFO: 655360 events read in total (14323ms).
[11:42:17.818] <TB0> INFO: Expecting 655360 events.
[11:42:32.562] <TB0> INFO: 655360 events read in total (14341ms).
[11:42:32.582] <TB0> INFO: Expecting 655360 events.
[11:42:46.964] <TB0> INFO: 655360 events read in total (13979ms).
[11:42:46.998] <TB0> INFO: Expecting 655360 events.
[11:43:01.488] <TB0> INFO: 655360 events read in total (14087ms).
[11:43:01.524] <TB0> INFO: Expecting 655360 events.
[11:43:16.028] <TB0> INFO: 655360 events read in total (14101ms).
[11:43:16.061] <TB0> INFO: Expecting 655360 events.
[11:43:30.578] <TB0> INFO: 655360 events read in total (14114ms).
[11:43:30.617] <TB0> INFO: Expecting 655360 events.
[11:43:45.140] <TB0> INFO: 655360 events read in total (14120ms).
[11:43:45.184] <TB0> INFO: Expecting 655360 events.
[11:43:59.674] <TB0> INFO: 655360 events read in total (14087ms).
[11:43:59.720] <TB0> INFO: Expecting 655360 events.
[11:44:14.373] <TB0> INFO: 655360 events read in total (14250ms).
[11:44:14.423] <TB0> INFO: Expecting 655360 events.
[11:44:29.077] <TB0> INFO: 655360 events read in total (14251ms).
[11:44:29.131] <TB0> INFO: Expecting 655360 events.
[11:44:43.487] <TB0> INFO: 655360 events read in total (13953ms).
[11:44:43.564] <TB0> INFO: Expecting 655360 events.
[11:44:58.084] <TB0> INFO: 655360 events read in total (14116ms).
[11:44:58.151] <TB0> INFO: Expecting 655360 events.
[11:45:12.721] <TB0> INFO: 655360 events read in total (14167ms).
[11:45:12.803] <TB0> INFO: Expecting 655360 events.
[11:45:27.233] <TB0> INFO: 655360 events read in total (14026ms).
[11:45:27.307] <TB0> INFO: Expecting 655360 events.
[11:45:41.886] <TB0> INFO: 655360 events read in total (14176ms).
[11:45:42.009] <TB0> INFO: Test took 234108ms.
[11:45:42.106] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:45:42.364] <TB0> INFO: Expecting 655360 events.
[11:45:56.887] <TB0> INFO: 655360 events read in total (13931ms).
[11:45:56.899] <TB0> INFO: Expecting 655360 events.
[11:46:11.170] <TB0> INFO: 655360 events read in total (13867ms).
[11:46:11.186] <TB0> INFO: Expecting 655360 events.
[11:46:25.562] <TB0> INFO: 655360 events read in total (13973ms).
[11:46:25.582] <TB0> INFO: Expecting 655360 events.
[11:46:39.903] <TB0> INFO: 655360 events read in total (13918ms).
[11:46:39.927] <TB0> INFO: Expecting 655360 events.
[11:46:54.304] <TB0> INFO: 655360 events read in total (13974ms).
[11:46:54.333] <TB0> INFO: Expecting 655360 events.
[11:47:08.825] <TB0> INFO: 655360 events read in total (14089ms).
[11:47:08.859] <TB0> INFO: Expecting 655360 events.
[11:47:23.375] <TB0> INFO: 655360 events read in total (14113ms).
[11:47:23.424] <TB0> INFO: Expecting 655360 events.
[11:47:37.800] <TB0> INFO: 655360 events read in total (13973ms).
[11:47:37.842] <TB0> INFO: Expecting 655360 events.
[11:47:52.115] <TB0> INFO: 655360 events read in total (13870ms).
[11:47:52.162] <TB0> INFO: Expecting 655360 events.
[11:48:06.570] <TB0> INFO: 655360 events read in total (14005ms).
[11:48:06.619] <TB0> INFO: Expecting 655360 events.
[11:48:21.166] <TB0> INFO: 655360 events read in total (14144ms).
[11:48:21.242] <TB0> INFO: Expecting 655360 events.
[11:48:35.662] <TB0> INFO: 655360 events read in total (14017ms).
[11:48:35.733] <TB0> INFO: Expecting 655360 events.
[11:48:50.177] <TB0> INFO: 655360 events read in total (14041ms).
[11:48:50.246] <TB0> INFO: Expecting 655360 events.
[11:49:04.671] <TB0> INFO: 655360 events read in total (14022ms).
[11:49:04.783] <TB0> INFO: Expecting 655360 events.
[11:49:19.534] <TB0> INFO: 655360 events read in total (14348ms).
[11:49:19.610] <TB0> INFO: Expecting 655360 events.
[11:49:34.129] <TB0> INFO: 655360 events read in total (14117ms).
[11:49:34.265] <TB0> INFO: Test took 232159ms.
[11:49:34.439] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.444] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.450] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.456] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:49:34.462] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.468] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.474] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.480] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.486] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:49:34.492] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.498] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.504] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.510] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.516] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:49:34.522] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:49:34.528] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:49:34.534] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[11:49:34.540] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.546] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.552] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.558] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.564] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.570] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.576] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.581] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.588] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:49:34.593] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[11:49:34.599] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[11:49:34.606] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[11:49:34.611] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.618] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:49:34.660] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C0.dat
[11:49:34.660] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C1.dat
[11:49:34.661] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C2.dat
[11:49:34.661] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C3.dat
[11:49:34.661] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C4.dat
[11:49:34.661] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C5.dat
[11:49:34.661] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C6.dat
[11:49:34.662] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C7.dat
[11:49:34.662] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C8.dat
[11:49:34.662] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C9.dat
[11:49:34.662] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C10.dat
[11:49:34.662] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C11.dat
[11:49:34.663] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C12.dat
[11:49:34.663] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C13.dat
[11:49:34.663] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C14.dat
[11:49:34.663] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//dacParameters35_C15.dat
[11:49:34.910] <TB0> INFO: Expecting 41600 events.
[11:49:38.062] <TB0> INFO: 41600 events read in total (2561ms).
[11:49:38.063] <TB0> INFO: Test took 3396ms.
[11:49:38.518] <TB0> INFO: Expecting 41600 events.
[11:49:41.570] <TB0> INFO: 41600 events read in total (2461ms).
[11:49:41.571] <TB0> INFO: Test took 3295ms.
[11:49:42.063] <TB0> INFO: Expecting 41600 events.
[11:49:45.208] <TB0> INFO: 41600 events read in total (2553ms).
[11:49:45.209] <TB0> INFO: Test took 3425ms.
[11:49:45.433] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:45.524] <TB0> INFO: Expecting 2560 events.
[11:49:46.418] <TB0> INFO: 2560 events read in total (303ms).
[11:49:46.418] <TB0> INFO: Test took 985ms.
[11:49:46.422] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:46.726] <TB0> INFO: Expecting 2560 events.
[11:49:47.618] <TB0> INFO: 2560 events read in total (300ms).
[11:49:47.619] <TB0> INFO: Test took 1197ms.
[11:49:47.621] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:47.927] <TB0> INFO: Expecting 2560 events.
[11:49:48.813] <TB0> INFO: 2560 events read in total (294ms).
[11:49:48.813] <TB0> INFO: Test took 1192ms.
[11:49:48.817] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:49.122] <TB0> INFO: Expecting 2560 events.
[11:49:50.012] <TB0> INFO: 2560 events read in total (299ms).
[11:49:50.012] <TB0> INFO: Test took 1196ms.
[11:49:50.014] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:50.321] <TB0> INFO: Expecting 2560 events.
[11:49:51.203] <TB0> INFO: 2560 events read in total (291ms).
[11:49:51.203] <TB0> INFO: Test took 1189ms.
[11:49:51.205] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:51.513] <TB0> INFO: Expecting 2560 events.
[11:49:52.405] <TB0> INFO: 2560 events read in total (300ms).
[11:49:52.405] <TB0> INFO: Test took 1200ms.
[11:49:52.408] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:52.716] <TB0> INFO: Expecting 2560 events.
[11:49:53.605] <TB0> INFO: 2560 events read in total (297ms).
[11:49:53.606] <TB0> INFO: Test took 1198ms.
[11:49:53.609] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:53.913] <TB0> INFO: Expecting 2560 events.
[11:49:54.808] <TB0> INFO: 2560 events read in total (303ms).
[11:49:54.809] <TB0> INFO: Test took 1200ms.
[11:49:54.811] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:55.117] <TB0> INFO: Expecting 2560 events.
[11:49:56.010] <TB0> INFO: 2560 events read in total (301ms).
[11:49:56.010] <TB0> INFO: Test took 1199ms.
[11:49:56.014] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:56.317] <TB0> INFO: Expecting 2560 events.
[11:49:57.195] <TB0> INFO: 2560 events read in total (286ms).
[11:49:57.196] <TB0> INFO: Test took 1182ms.
[11:49:57.198] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:57.504] <TB0> INFO: Expecting 2560 events.
[11:49:58.389] <TB0> INFO: 2560 events read in total (293ms).
[11:49:58.390] <TB0> INFO: Test took 1192ms.
[11:49:58.392] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:58.698] <TB0> INFO: Expecting 2560 events.
[11:49:59.587] <TB0> INFO: 2560 events read in total (297ms).
[11:49:59.587] <TB0> INFO: Test took 1195ms.
[11:49:59.591] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:49:59.901] <TB0> INFO: Expecting 2560 events.
[11:50:00.785] <TB0> INFO: 2560 events read in total (292ms).
[11:50:00.785] <TB0> INFO: Test took 1194ms.
[11:50:00.787] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:01.094] <TB0> INFO: Expecting 2560 events.
[11:50:01.975] <TB0> INFO: 2560 events read in total (289ms).
[11:50:01.976] <TB0> INFO: Test took 1189ms.
[11:50:01.979] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:02.284] <TB0> INFO: Expecting 2560 events.
[11:50:03.176] <TB0> INFO: 2560 events read in total (300ms).
[11:50:03.176] <TB0> INFO: Test took 1198ms.
[11:50:03.180] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:03.483] <TB0> INFO: Expecting 2560 events.
[11:50:04.372] <TB0> INFO: 2560 events read in total (297ms).
[11:50:04.373] <TB0> INFO: Test took 1193ms.
[11:50:04.378] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:04.681] <TB0> INFO: Expecting 2560 events.
[11:50:05.574] <TB0> INFO: 2560 events read in total (295ms).
[11:50:05.574] <TB0> INFO: Test took 1197ms.
[11:50:05.577] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:05.881] <TB0> INFO: Expecting 2560 events.
[11:50:06.773] <TB0> INFO: 2560 events read in total (300ms).
[11:50:06.774] <TB0> INFO: Test took 1197ms.
[11:50:06.778] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:07.082] <TB0> INFO: Expecting 2560 events.
[11:50:07.963] <TB0> INFO: 2560 events read in total (290ms).
[11:50:07.963] <TB0> INFO: Test took 1185ms.
[11:50:07.968] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:08.271] <TB0> INFO: Expecting 2560 events.
[11:50:09.159] <TB0> INFO: 2560 events read in total (296ms).
[11:50:09.159] <TB0> INFO: Test took 1192ms.
[11:50:09.162] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:09.467] <TB0> INFO: Expecting 2560 events.
[11:50:10.351] <TB0> INFO: 2560 events read in total (292ms).
[11:50:10.352] <TB0> INFO: Test took 1190ms.
[11:50:10.354] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:10.663] <TB0> INFO: Expecting 2560 events.
[11:50:11.553] <TB0> INFO: 2560 events read in total (298ms).
[11:50:11.553] <TB0> INFO: Test took 1199ms.
[11:50:11.555] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:11.862] <TB0> INFO: Expecting 2560 events.
[11:50:12.747] <TB0> INFO: 2560 events read in total (294ms).
[11:50:12.748] <TB0> INFO: Test took 1193ms.
[11:50:12.750] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:13.056] <TB0> INFO: Expecting 2560 events.
[11:50:13.945] <TB0> INFO: 2560 events read in total (298ms).
[11:50:13.945] <TB0> INFO: Test took 1195ms.
[11:50:13.948] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:14.255] <TB0> INFO: Expecting 2560 events.
[11:50:15.149] <TB0> INFO: 2560 events read in total (302ms).
[11:50:15.149] <TB0> INFO: Test took 1201ms.
[11:50:15.151] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:15.459] <TB0> INFO: Expecting 2560 events.
[11:50:16.346] <TB0> INFO: 2560 events read in total (296ms).
[11:50:16.346] <TB0> INFO: Test took 1195ms.
[11:50:16.350] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:16.653] <TB0> INFO: Expecting 2560 events.
[11:50:17.539] <TB0> INFO: 2560 events read in total (294ms).
[11:50:17.540] <TB0> INFO: Test took 1190ms.
[11:50:17.542] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:17.848] <TB0> INFO: Expecting 2560 events.
[11:50:18.731] <TB0> INFO: 2560 events read in total (291ms).
[11:50:18.732] <TB0> INFO: Test took 1191ms.
[11:50:18.734] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:19.040] <TB0> INFO: Expecting 2560 events.
[11:50:19.938] <TB0> INFO: 2560 events read in total (306ms).
[11:50:19.938] <TB0> INFO: Test took 1204ms.
[11:50:19.940] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:20.247] <TB0> INFO: Expecting 2560 events.
[11:50:21.138] <TB0> INFO: 2560 events read in total (300ms).
[11:50:21.138] <TB0> INFO: Test took 1198ms.
[11:50:21.141] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:21.447] <TB0> INFO: Expecting 2560 events.
[11:50:22.337] <TB0> INFO: 2560 events read in total (298ms).
[11:50:22.337] <TB0> INFO: Test took 1196ms.
[11:50:22.340] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:50:22.646] <TB0> INFO: Expecting 2560 events.
[11:50:23.532] <TB0> INFO: 2560 events read in total (294ms).
[11:50:23.533] <TB0> INFO: Test took 1194ms.
[11:50:24.009] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 647 seconds
[11:50:24.009] <TB0> INFO: PH scale (per ROC): 46 45 58 70 50 62 45 54 66 61 58 57 50 48 57 38
[11:50:24.009] <TB0> INFO: PH offset (per ROC): 105 106 117 128 106 118 105 112 127 134 119 133 111 125 125 96
[11:50:24.016] <TB0> INFO: Decoding statistics:
[11:50:24.016] <TB0> INFO: General information:
[11:50:24.016] <TB0> INFO: 16bit words read: 127890
[11:50:24.016] <TB0> INFO: valid events total: 20480
[11:50:24.016] <TB0> INFO: empty events: 17975
[11:50:24.016] <TB0> INFO: valid events with pixels: 2505
[11:50:24.016] <TB0> INFO: valid pixel hits: 2505
[11:50:24.016] <TB0> INFO: Event errors: 0
[11:50:24.016] <TB0> INFO: start marker: 0
[11:50:24.016] <TB0> INFO: stop marker: 0
[11:50:24.016] <TB0> INFO: overflow: 0
[11:50:24.016] <TB0> INFO: invalid 5bit words: 0
[11:50:24.016] <TB0> INFO: invalid XOR eye diagram: 0
[11:50:24.016] <TB0> INFO: frame (failed synchr.): 0
[11:50:24.016] <TB0> INFO: idle data (no TBM trl): 0
[11:50:24.016] <TB0> INFO: no data (only TBM hdr): 0
[11:50:24.016] <TB0> INFO: TBM errors: 0
[11:50:24.016] <TB0> INFO: flawed TBM headers: 0
[11:50:24.016] <TB0> INFO: flawed TBM trailers: 0
[11:50:24.016] <TB0> INFO: event ID mismatches: 0
[11:50:24.016] <TB0> INFO: ROC errors: 0
[11:50:24.016] <TB0> INFO: missing ROC header(s): 0
[11:50:24.016] <TB0> INFO: misplaced readback start: 0
[11:50:24.016] <TB0> INFO: Pixel decoding errors: 0
[11:50:24.016] <TB0> INFO: pixel data incomplete: 0
[11:50:24.016] <TB0> INFO: pixel address: 0
[11:50:24.016] <TB0> INFO: pulse height fill bit: 0
[11:50:24.016] <TB0> INFO: buffer corruption: 0
[11:50:24.181] <TB0> INFO: ######################################################################
[11:50:24.181] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:50:24.181] <TB0> INFO: ######################################################################
[11:50:24.195] <TB0> INFO: scanning low vcal = 10
[11:50:24.433] <TB0> INFO: Expecting 41600 events.
[11:50:28.024] <TB0> INFO: 41600 events read in total (2999ms).
[11:50:28.024] <TB0> INFO: Test took 3828ms.
[11:50:28.026] <TB0> INFO: scanning low vcal = 20
[11:50:28.316] <TB0> INFO: Expecting 41600 events.
[11:50:31.921] <TB0> INFO: 41600 events read in total (3013ms).
[11:50:31.922] <TB0> INFO: Test took 3896ms.
[11:50:31.924] <TB0> INFO: scanning low vcal = 30
[11:50:32.222] <TB0> INFO: Expecting 41600 events.
[11:50:35.894] <TB0> INFO: 41600 events read in total (3080ms).
[11:50:35.895] <TB0> INFO: Test took 3971ms.
[11:50:35.897] <TB0> INFO: scanning low vcal = 40
[11:50:36.174] <TB0> INFO: Expecting 41600 events.
[11:50:40.144] <TB0> INFO: 41600 events read in total (3378ms).
[11:50:40.145] <TB0> INFO: Test took 4249ms.
[11:50:40.149] <TB0> INFO: scanning low vcal = 50
[11:50:40.425] <TB0> INFO: Expecting 41600 events.
[11:50:44.428] <TB0> INFO: 41600 events read in total (3411ms).
[11:50:44.429] <TB0> INFO: Test took 4280ms.
[11:50:44.432] <TB0> INFO: scanning low vcal = 60
[11:50:44.714] <TB0> INFO: Expecting 41600 events.
[11:50:48.701] <TB0> INFO: 41600 events read in total (3395ms).
[11:50:48.702] <TB0> INFO: Test took 4269ms.
[11:50:48.705] <TB0> INFO: scanning low vcal = 70
[11:50:48.982] <TB0> INFO: Expecting 41600 events.
[11:50:52.961] <TB0> INFO: 41600 events read in total (3388ms).
[11:50:52.963] <TB0> INFO: Test took 4258ms.
[11:50:52.965] <TB0> INFO: scanning low vcal = 80
[11:50:53.242] <TB0> INFO: Expecting 41600 events.
[11:50:57.223] <TB0> INFO: 41600 events read in total (3389ms).
[11:50:57.224] <TB0> INFO: Test took 4258ms.
[11:50:57.227] <TB0> INFO: scanning low vcal = 90
[11:50:57.506] <TB0> INFO: Expecting 41600 events.
[11:51:01.520] <TB0> INFO: 41600 events read in total (3422ms).
[11:51:01.521] <TB0> INFO: Test took 4293ms.
[11:51:01.525] <TB0> INFO: scanning low vcal = 100
[11:51:01.801] <TB0> INFO: Expecting 41600 events.
[11:51:05.821] <TB0> INFO: 41600 events read in total (3428ms).
[11:51:05.822] <TB0> INFO: Test took 4296ms.
[11:51:05.824] <TB0> INFO: scanning low vcal = 110
[11:51:06.102] <TB0> INFO: Expecting 41600 events.
[11:51:10.154] <TB0> INFO: 41600 events read in total (3461ms).
[11:51:10.154] <TB0> INFO: Test took 4329ms.
[11:51:10.157] <TB0> INFO: scanning low vcal = 120
[11:51:10.434] <TB0> INFO: Expecting 41600 events.
[11:51:14.469] <TB0> INFO: 41600 events read in total (3443ms).
[11:51:14.470] <TB0> INFO: Test took 4313ms.
[11:51:14.473] <TB0> INFO: scanning low vcal = 130
[11:51:14.751] <TB0> INFO: Expecting 41600 events.
[11:51:18.806] <TB0> INFO: 41600 events read in total (3463ms).
[11:51:18.807] <TB0> INFO: Test took 4334ms.
[11:51:18.810] <TB0> INFO: scanning low vcal = 140
[11:51:19.089] <TB0> INFO: Expecting 41600 events.
[11:51:23.069] <TB0> INFO: 41600 events read in total (3388ms).
[11:51:23.070] <TB0> INFO: Test took 4260ms.
[11:51:23.073] <TB0> INFO: scanning low vcal = 150
[11:51:23.349] <TB0> INFO: Expecting 41600 events.
[11:51:27.315] <TB0> INFO: 41600 events read in total (3374ms).
[11:51:27.315] <TB0> INFO: Test took 4242ms.
[11:51:27.318] <TB0> INFO: scanning low vcal = 160
[11:51:27.600] <TB0> INFO: Expecting 41600 events.
[11:51:31.587] <TB0> INFO: 41600 events read in total (3395ms).
[11:51:31.588] <TB0> INFO: Test took 4269ms.
[11:51:31.591] <TB0> INFO: scanning low vcal = 170
[11:51:31.881] <TB0> INFO: Expecting 41600 events.
[11:51:35.924] <TB0> INFO: 41600 events read in total (3451ms).
[11:51:35.924] <TB0> INFO: Test took 4333ms.
[11:51:35.930] <TB0> INFO: scanning low vcal = 180
[11:51:36.204] <TB0> INFO: Expecting 41600 events.
[11:51:40.183] <TB0> INFO: 41600 events read in total (3387ms).
[11:51:40.184] <TB0> INFO: Test took 4254ms.
[11:51:40.187] <TB0> INFO: scanning low vcal = 190
[11:51:40.463] <TB0> INFO: Expecting 41600 events.
[11:51:44.467] <TB0> INFO: 41600 events read in total (3412ms).
[11:51:44.468] <TB0> INFO: Test took 4281ms.
[11:51:44.471] <TB0> INFO: scanning low vcal = 200
[11:51:44.748] <TB0> INFO: Expecting 41600 events.
[11:51:48.700] <TB0> INFO: 41600 events read in total (3361ms).
[11:51:48.701] <TB0> INFO: Test took 4230ms.
[11:51:48.704] <TB0> INFO: scanning low vcal = 210
[11:51:48.980] <TB0> INFO: Expecting 41600 events.
[11:51:52.934] <TB0> INFO: 41600 events read in total (3362ms).
[11:51:52.935] <TB0> INFO: Test took 4231ms.
[11:51:52.938] <TB0> INFO: scanning low vcal = 220
[11:51:53.214] <TB0> INFO: Expecting 41600 events.
[11:51:57.165] <TB0> INFO: 41600 events read in total (3359ms).
[11:51:57.166] <TB0> INFO: Test took 4228ms.
[11:51:57.169] <TB0> INFO: scanning low vcal = 230
[11:51:57.446] <TB0> INFO: Expecting 41600 events.
[11:52:01.406] <TB0> INFO: 41600 events read in total (3369ms).
[11:52:01.407] <TB0> INFO: Test took 4238ms.
[11:52:01.410] <TB0> INFO: scanning low vcal = 240
[11:52:01.686] <TB0> INFO: Expecting 41600 events.
[11:52:05.641] <TB0> INFO: 41600 events read in total (3363ms).
[11:52:05.642] <TB0> INFO: Test took 4232ms.
[11:52:05.646] <TB0> INFO: scanning low vcal = 250
[11:52:05.928] <TB0> INFO: Expecting 41600 events.
[11:52:09.874] <TB0> INFO: 41600 events read in total (3355ms).
[11:52:09.875] <TB0> INFO: Test took 4229ms.
[11:52:09.879] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[11:52:10.155] <TB0> INFO: Expecting 41600 events.
[11:52:14.144] <TB0> INFO: 41600 events read in total (3398ms).
[11:52:14.145] <TB0> INFO: Test took 4266ms.
[11:52:14.149] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[11:52:14.425] <TB0> INFO: Expecting 41600 events.
[11:52:18.403] <TB0> INFO: 41600 events read in total (3387ms).
[11:52:18.404] <TB0> INFO: Test took 4255ms.
[11:52:18.407] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[11:52:18.684] <TB0> INFO: Expecting 41600 events.
[11:52:22.661] <TB0> INFO: 41600 events read in total (3386ms).
[11:52:22.662] <TB0> INFO: Test took 4255ms.
[11:52:22.666] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[11:52:22.942] <TB0> INFO: Expecting 41600 events.
[11:52:26.952] <TB0> INFO: 41600 events read in total (3418ms).
[11:52:26.953] <TB0> INFO: Test took 4287ms.
[11:52:26.956] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:52:27.232] <TB0> INFO: Expecting 41600 events.
[11:52:31.215] <TB0> INFO: 41600 events read in total (3391ms).
[11:52:31.215] <TB0> INFO: Test took 4259ms.
[11:52:31.615] <TB0> INFO: PixTestGainPedestal::measure() done
[11:53:05.515] <TB0> INFO: PixTestGainPedestal::fit() done
[11:53:05.515] <TB0> INFO: non-linearity mean: 0.942 0.908 0.970 0.986 0.960 0.985 0.934 0.963 0.985 0.982 0.980 0.975 0.953 0.949 0.984 0.976
[11:53:05.515] <TB0> INFO: non-linearity RMS: 0.115 0.099 0.013 0.004 0.017 0.005 0.067 0.025 0.003 0.005 0.004 0.006 0.056 0.076 0.003 0.181
[11:53:05.515] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[11:53:05.537] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[11:53:05.559] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[11:53:05.581] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[11:53:05.601] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[11:53:05.615] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[11:53:05.628] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[11:53:05.642] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[11:53:05.655] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[11:53:05.669] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[11:53:05.683] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[11:53:05.696] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[11:53:05.709] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[11:53:05.723] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[11:53:05.736] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[11:53:05.749] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1100_FullQualification_2016-11-02_09h36m_1478075793//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[11:53:05.762] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[11:53:05.762] <TB0> INFO: Decoding statistics:
[11:53:05.762] <TB0> INFO: General information:
[11:53:05.762] <TB0> INFO: 16bit words read: 3327952
[11:53:05.762] <TB0> INFO: valid events total: 332800
[11:53:05.762] <TB0> INFO: empty events: 0
[11:53:05.762] <TB0> INFO: valid events with pixels: 332800
[11:53:05.762] <TB0> INFO: valid pixel hits: 665576
[11:53:05.762] <TB0> INFO: Event errors: 0
[11:53:05.762] <TB0> INFO: start marker: 0
[11:53:05.762] <TB0> INFO: stop marker: 0
[11:53:05.762] <TB0> INFO: overflow: 0
[11:53:05.762] <TB0> INFO: invalid 5bit words: 0
[11:53:05.762] <TB0> INFO: invalid XOR eye diagram: 0
[11:53:05.762] <TB0> INFO: frame (failed synchr.): 0
[11:53:05.762] <TB0> INFO: idle data (no TBM trl): 0
[11:53:05.762] <TB0> INFO: no data (only TBM hdr): 0
[11:53:05.762] <TB0> INFO: TBM errors: 0
[11:53:05.762] <TB0> INFO: flawed TBM headers: 0
[11:53:05.762] <TB0> INFO: flawed TBM trailers: 0
[11:53:05.762] <TB0> INFO: event ID mismatches: 0
[11:53:05.762] <TB0> INFO: ROC errors: 0
[11:53:05.762] <TB0> INFO: missing ROC header(s): 0
[11:53:05.762] <TB0> INFO: misplaced readback start: 0
[11:53:05.762] <TB0> INFO: Pixel decoding errors: 0
[11:53:05.762] <TB0> INFO: pixel data incomplete: 0
[11:53:05.762] <TB0> INFO: pixel address: 0
[11:53:05.762] <TB0> INFO: pulse height fill bit: 0
[11:53:05.762] <TB0> INFO: buffer corruption: 0
[11:53:05.779] <TB0> INFO: Decoding statistics:
[11:53:05.779] <TB0> INFO: General information:
[11:53:05.779] <TB0> INFO: 16bit words read: 3457378
[11:53:05.779] <TB0> INFO: valid events total: 353536
[11:53:05.779] <TB0> INFO: empty events: 18231
[11:53:05.779] <TB0> INFO: valid events with pixels: 335305
[11:53:05.779] <TB0> INFO: valid pixel hits: 668081
[11:53:05.779] <TB0> INFO: Event errors: 0
[11:53:05.779] <TB0> INFO: start marker: 0
[11:53:05.779] <TB0> INFO: stop marker: 0
[11:53:05.779] <TB0> INFO: overflow: 0
[11:53:05.779] <TB0> INFO: invalid 5bit words: 0
[11:53:05.779] <TB0> INFO: invalid XOR eye diagram: 0
[11:53:05.779] <TB0> INFO: frame (failed synchr.): 0
[11:53:05.779] <TB0> INFO: idle data (no TBM trl): 0
[11:53:05.779] <TB0> INFO: no data (only TBM hdr): 0
[11:53:05.779] <TB0> INFO: TBM errors: 0
[11:53:05.779] <TB0> INFO: flawed TBM headers: 0
[11:53:05.779] <TB0> INFO: flawed TBM trailers: 0
[11:53:05.779] <TB0> INFO: event ID mismatches: 0
[11:53:05.779] <TB0> INFO: ROC errors: 0
[11:53:05.779] <TB0> INFO: missing ROC header(s): 0
[11:53:05.779] <TB0> INFO: misplaced readback start: 0
[11:53:05.779] <TB0> INFO: Pixel decoding errors: 0
[11:53:05.779] <TB0> INFO: pixel data incomplete: 0
[11:53:05.779] <TB0> INFO: pixel address: 0
[11:53:05.779] <TB0> INFO: pulse height fill bit: 0
[11:53:05.779] <TB0> INFO: buffer corruption: 0
[11:53:05.779] <TB0> INFO: enter test to run
[11:53:05.779] <TB0> INFO: test: exit no parameter change
[11:53:05.899] <TB0> QUIET: Connection to board 71 closed.
[11:53:05.900] <TB0> INFO: pXar: this is the end, my friend