[13:16:08.063] <TB3> INFO: *** Welcome to pxar ***
[13:16:08.063] <TB3> INFO: *** Today: 2016/10/31
[13:16:08.069] <TB3> INFO: *** Version: c8ba-dirty
[13:16:08.069] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C15.dat
[13:16:08.070] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[13:16:08.070] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//defaultMaskFile.dat
[13:16:08.070] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters_C15.dat
[13:16:08.124] <TB3> INFO: clk: 4
[13:16:08.124] <TB3> INFO: ctr: 4
[13:16:08.124] <TB3> INFO: sda: 19
[13:16:08.124] <TB3> INFO: tin: 9
[13:16:08.124] <TB3> INFO: level: 15
[13:16:08.124] <TB3> INFO: triggerdelay: 0
[13:16:08.124] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[13:16:08.124] <TB3> INFO: Log level: INFO
[13:16:08.132] <TB3> INFO: Found DTB DTB_WZ4I6J
[13:16:08.141] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[13:16:08.143] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[13:16:08.145] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[13:16:09.628] <TB3> INFO: DUT info:
[13:16:09.628] <TB3> INFO: The DUT currently contains the following objects:
[13:16:09.628] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[13:16:09.628] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:16:09.629] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:16:09.629] <TB3> INFO: TBM Core alpha (2): 7 registers set
[13:16:09.629] <TB3> INFO: TBM Core beta (3): 7 registers set
[13:16:09.629] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[13:16:09.629] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:09.629] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:16:10.030] <TB3> INFO: enter 'restricted' command line mode
[13:16:10.030] <TB3> INFO: enter test to run
[13:16:10.030] <TB3> INFO: test: pretest no parameter change
[13:16:10.030] <TB3> INFO: running: pretest
[13:16:10.671] <TB3> INFO: ######################################################################
[13:16:10.671] <TB3> INFO: PixTestPretest::doTest()
[13:16:10.671] <TB3> INFO: ######################################################################
[13:16:10.673] <TB3> INFO: ----------------------------------------------------------------------
[13:16:10.673] <TB3> INFO: PixTestPretest::programROC()
[13:16:10.673] <TB3> INFO: ----------------------------------------------------------------------
[13:16:28.686] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:16:28.686] <TB3> INFO: IA differences per ROC: 19.3 16.9 19.3 19.3 19.3 18.5 19.3 20.1 19.3 19.3 19.3 19.3 19.3 18.5 20.9 18.5
[13:16:28.721] <TB3> INFO: ----------------------------------------------------------------------
[13:16:28.721] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:16:28.721] <TB3> INFO: ----------------------------------------------------------------------
[13:16:36.603] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[13:16:36.603] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 18.5 18.5 19.3 18.5 18.5 18.5 18.5 18.5 19.3 18.5 18.5
[13:16:36.630] <TB3> INFO: ----------------------------------------------------------------------
[13:16:36.631] <TB3> INFO: PixTestPretest::findTiming()
[13:16:36.631] <TB3> INFO: ----------------------------------------------------------------------
[13:16:36.631] <TB3> INFO: PixTestCmd::init()

[13:17:07.777] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[13:17:07.777] <TB3> INFO: (success/tries = 100/100), width = 4
[13:17:09.282] <TB3> INFO: ----------------------------------------------------------------------
[13:17:09.282] <TB3> INFO: PixTestPretest::findWorkingPixel()
[13:17:09.282] <TB3> INFO: ----------------------------------------------------------------------
[13:17:09.373] <TB3> INFO: Expecting 231680 events.
[13:17:19.009] <TB3> INFO: 231680 events read in total (9044ms).
[13:17:19.017] <TB3> INFO: Test took 9733ms.
[13:17:19.262] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:17:19.289] <TB3> INFO: ----------------------------------------------------------------------
[13:17:19.289] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[13:17:19.289] <TB3> INFO: ----------------------------------------------------------------------
[13:17:19.381] <TB3> INFO: Expecting 231680 events.
[13:17:29.009] <TB3> INFO: 231680 events read in total (9036ms).
[13:17:29.017] <TB3> INFO: Test took 9724ms.
[13:17:29.275] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[13:17:29.275] <TB3> INFO: CalDel: 81 86 91 77 92 82 94 89 87 93 89 89 94 87 86 79
[13:17:29.275] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:17:29.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C0.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C1.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C2.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C3.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C4.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C5.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C6.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C7.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C8.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C9.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C10.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C11.dat
[13:17:29.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C12.dat
[13:17:29.279] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C13.dat
[13:17:29.279] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C14.dat
[13:17:29.279] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters_C15.dat
[13:17:29.279] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[13:17:29.279] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[13:17:29.279] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[13:17:29.279] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[13:17:29.279] <TB3> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[13:17:29.378] <TB3> INFO: enter test to run
[13:17:29.378] <TB3> INFO: test: fulltest no parameter change
[13:17:29.378] <TB3> INFO: running: fulltest
[13:17:29.378] <TB3> INFO: ######################################################################
[13:17:29.378] <TB3> INFO: PixTestFullTest::doTest()
[13:17:29.378] <TB3> INFO: ######################################################################
[13:17:29.380] <TB3> INFO: ######################################################################
[13:17:29.380] <TB3> INFO: PixTestAlive::doTest()
[13:17:29.380] <TB3> INFO: ######################################################################
[13:17:29.381] <TB3> INFO: ----------------------------------------------------------------------
[13:17:29.381] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:29.381] <TB3> INFO: ----------------------------------------------------------------------
[13:17:29.616] <TB3> INFO: Expecting 41600 events.
[13:17:33.150] <TB3> INFO: 41600 events read in total (2943ms).
[13:17:33.151] <TB3> INFO: Test took 3769ms.
[13:17:33.377] <TB3> INFO: PixTestAlive::aliveTest() done
[13:17:33.377] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
[13:17:33.379] <TB3> INFO: ----------------------------------------------------------------------
[13:17:33.379] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:33.379] <TB3> INFO: ----------------------------------------------------------------------
[13:17:33.652] <TB3> INFO: Expecting 41600 events.
[13:17:36.629] <TB3> INFO: 41600 events read in total (2386ms).
[13:17:36.629] <TB3> INFO: Test took 3249ms.
[13:17:36.629] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:17:36.869] <TB3> INFO: PixTestAlive::maskTest() done
[13:17:36.869] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:17:36.870] <TB3> INFO: ----------------------------------------------------------------------
[13:17:36.871] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:36.871] <TB3> INFO: ----------------------------------------------------------------------
[13:17:37.112] <TB3> INFO: Expecting 41600 events.
[13:17:40.660] <TB3> INFO: 41600 events read in total (2956ms).
[13:17:40.661] <TB3> INFO: Test took 3789ms.
[13:17:40.888] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[13:17:40.888] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:17:40.888] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[13:17:40.888] <TB3> INFO: Decoding statistics:
[13:17:40.888] <TB3> INFO: General information:
[13:17:40.888] <TB3> INFO: 16bit words read: 0
[13:17:40.888] <TB3> INFO: valid events total: 0
[13:17:40.888] <TB3> INFO: empty events: 0
[13:17:40.888] <TB3> INFO: valid events with pixels: 0
[13:17:40.888] <TB3> INFO: valid pixel hits: 0
[13:17:40.888] <TB3> INFO: Event errors: 0
[13:17:40.888] <TB3> INFO: start marker: 0
[13:17:40.888] <TB3> INFO: stop marker: 0
[13:17:40.888] <TB3> INFO: overflow: 0
[13:17:40.888] <TB3> INFO: invalid 5bit words: 0
[13:17:40.888] <TB3> INFO: invalid XOR eye diagram: 0
[13:17:40.888] <TB3> INFO: frame (failed synchr.): 0
[13:17:40.888] <TB3> INFO: idle data (no TBM trl): 0
[13:17:40.888] <TB3> INFO: no data (only TBM hdr): 0
[13:17:40.888] <TB3> INFO: TBM errors: 0
[13:17:40.888] <TB3> INFO: flawed TBM headers: 0
[13:17:40.888] <TB3> INFO: flawed TBM trailers: 0
[13:17:40.888] <TB3> INFO: event ID mismatches: 0
[13:17:40.888] <TB3> INFO: ROC errors: 0
[13:17:40.888] <TB3> INFO: missing ROC header(s): 0
[13:17:40.888] <TB3> INFO: misplaced readback start: 0
[13:17:40.888] <TB3> INFO: Pixel decoding errors: 0
[13:17:40.888] <TB3> INFO: pixel data incomplete: 0
[13:17:40.888] <TB3> INFO: pixel address: 0
[13:17:40.888] <TB3> INFO: pulse height fill bit: 0
[13:17:40.888] <TB3> INFO: buffer corruption: 0
[13:17:40.896] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C15.dat
[13:17:40.896] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[13:17:40.896] <TB3> INFO: ######################################################################
[13:17:40.896] <TB3> INFO: PixTestReadback::doTest()
[13:17:40.896] <TB3> INFO: ######################################################################
[13:17:40.896] <TB3> INFO: ----------------------------------------------------------------------
[13:17:40.896] <TB3> INFO: PixTestReadback::CalibrateVd()
[13:17:40.896] <TB3> INFO: ----------------------------------------------------------------------
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C0.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C1.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C2.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C3.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C4.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C5.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C6.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C7.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C8.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C9.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C10.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C11.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C12.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C13.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C14.dat
[13:17:50.853] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C15.dat
[13:17:50.881] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:17:50.881] <TB3> INFO: ----------------------------------------------------------------------
[13:17:50.881] <TB3> INFO: PixTestReadback::CalibrateVa()
[13:17:50.881] <TB3> INFO: ----------------------------------------------------------------------
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C0.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C1.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C2.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C3.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C4.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C5.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C6.dat
[13:18:00.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C7.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C8.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C9.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C10.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C11.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C12.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C13.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C14.dat
[13:18:00.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C15.dat
[13:18:00.799] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:18:00.800] <TB3> INFO: ----------------------------------------------------------------------
[13:18:00.800] <TB3> INFO: PixTestReadback::readbackVbg()
[13:18:00.800] <TB3> INFO: ----------------------------------------------------------------------
[13:18:08.439] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:18:08.439] <TB3> INFO: ----------------------------------------------------------------------
[13:18:08.439] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[13:18:08.439] <TB3> INFO: ----------------------------------------------------------------------
[13:18:08.439] <TB3> INFO: Vbg will be calibrated using Vd calibration
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 166.8calibrated Vbg = 1.18037 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.3calibrated Vbg = 1.17816 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 149.4calibrated Vbg = 1.17398 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.3calibrated Vbg = 1.17158 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 147.9calibrated Vbg = 1.17551 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.2calibrated Vbg = 1.17763 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157calibrated Vbg = 1.18304 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 157.4calibrated Vbg = 1.17728 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.7calibrated Vbg = 1.17679 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149calibrated Vbg = 1.1719 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.1calibrated Vbg = 1.17184 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.4calibrated Vbg = 1.16489 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158calibrated Vbg = 1.17397 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 145.8calibrated Vbg = 1.17627 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.8calibrated Vbg = 1.17563 :::*/*/*/*/
[13:18:08.439] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 148.7calibrated Vbg = 1.17324 :::*/*/*/*/
[13:18:08.441] <TB3> INFO: ----------------------------------------------------------------------
[13:18:08.441] <TB3> INFO: PixTestReadback::CalibrateIa()
[13:18:08.441] <TB3> INFO: ----------------------------------------------------------------------
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C0.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C1.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C2.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C3.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C4.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C5.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C6.dat
[13:20:48.771] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C7.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C8.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C9.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C10.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C11.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C12.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C13.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C14.dat
[13:20:48.772] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//readbackCal_C15.dat
[13:20:48.800] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:20:48.801] <TB3> INFO: PixTestReadback::doTest() done
[13:20:48.801] <TB3> INFO: Decoding statistics:
[13:20:48.801] <TB3> INFO: General information:
[13:20:48.801] <TB3> INFO: 16bit words read: 1536
[13:20:48.801] <TB3> INFO: valid events total: 256
[13:20:48.801] <TB3> INFO: empty events: 256
[13:20:48.801] <TB3> INFO: valid events with pixels: 0
[13:20:48.801] <TB3> INFO: valid pixel hits: 0
[13:20:48.801] <TB3> INFO: Event errors: 0
[13:20:48.801] <TB3> INFO: start marker: 0
[13:20:48.801] <TB3> INFO: stop marker: 0
[13:20:48.801] <TB3> INFO: overflow: 0
[13:20:48.801] <TB3> INFO: invalid 5bit words: 0
[13:20:48.801] <TB3> INFO: invalid XOR eye diagram: 0
[13:20:48.801] <TB3> INFO: frame (failed synchr.): 0
[13:20:48.801] <TB3> INFO: idle data (no TBM trl): 0
[13:20:48.801] <TB3> INFO: no data (only TBM hdr): 0
[13:20:48.801] <TB3> INFO: TBM errors: 0
[13:20:48.801] <TB3> INFO: flawed TBM headers: 0
[13:20:48.801] <TB3> INFO: flawed TBM trailers: 0
[13:20:48.801] <TB3> INFO: event ID mismatches: 0
[13:20:48.801] <TB3> INFO: ROC errors: 0
[13:20:48.801] <TB3> INFO: missing ROC header(s): 0
[13:20:48.801] <TB3> INFO: misplaced readback start: 0
[13:20:48.802] <TB3> INFO: Pixel decoding errors: 0
[13:20:48.802] <TB3> INFO: pixel data incomplete: 0
[13:20:48.802] <TB3> INFO: pixel address: 0
[13:20:48.802] <TB3> INFO: pulse height fill bit: 0
[13:20:48.802] <TB3> INFO: buffer corruption: 0
[13:20:48.836] <TB3> INFO: ######################################################################
[13:20:48.836] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:20:48.836] <TB3> INFO: ######################################################################
[13:20:48.838] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[13:20:48.852] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:20:48.852] <TB3> INFO: run 1 of 1
[13:20:49.083] <TB3> INFO: Expecting 3120000 events.
[13:21:19.529] <TB3> INFO: 659315 events read in total (29854ms).











[13:21:49.328] <TB3> INFO: 1316320 events read in total (59653ms).











[13:22:19.083] <TB3> INFO: 1970105 events read in total (89408ms).











[13:22:48.637] <TB3> INFO: 2623590 events read in total (118962ms).











[13:23:11.458] <TB3> INFO: 3120000 events read in total (141783ms).
[13:23:11.526] <TB3> INFO: Test took 142674ms.
[13:23:37.623] <TB3> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 168 seconds
[13:23:37.623] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0
[13:23:37.623] <TB3> INFO: separation cut (per ROC): 105 105 102 107 100 105 95 102 102 107 108 104 97 104 109 108
[13:23:37.623] <TB3> INFO: Decoding statistics:
[13:23:37.623] <TB3> INFO: General information:
[13:23:37.623] <TB3> INFO: 16bit words read: 0
[13:23:37.623] <TB3> INFO: valid events total: 0
[13:23:37.623] <TB3> INFO: empty events: 0
[13:23:37.623] <TB3> INFO: valid events with pixels: 0
[13:23:37.623] <TB3> INFO: valid pixel hits: 0
[13:23:37.623] <TB3> INFO: Event errors: 0
[13:23:37.623] <TB3> INFO: start marker: 0
[13:23:37.623] <TB3> INFO: stop marker: 0
[13:23:37.623] <TB3> INFO: overflow: 0
[13:23:37.623] <TB3> INFO: invalid 5bit words: 0
[13:23:37.623] <TB3> INFO: invalid XOR eye diagram: 0
[13:23:37.623] <TB3> INFO: frame (failed synchr.): 0
[13:23:37.623] <TB3> INFO: idle data (no TBM trl): 0
[13:23:37.623] <TB3> INFO: no data (only TBM hdr): 0
[13:23:37.623] <TB3> INFO: TBM errors: 0
[13:23:37.623] <TB3> INFO: flawed TBM headers: 0
[13:23:37.623] <TB3> INFO: flawed TBM trailers: 0
[13:23:37.623] <TB3> INFO: event ID mismatches: 0
[13:23:37.623] <TB3> INFO: ROC errors: 0
[13:23:37.623] <TB3> INFO: missing ROC header(s): 0
[13:23:37.623] <TB3> INFO: misplaced readback start: 0
[13:23:37.623] <TB3> INFO: Pixel decoding errors: 0
[13:23:37.623] <TB3> INFO: pixel data incomplete: 0
[13:23:37.623] <TB3> INFO: pixel address: 0
[13:23:37.623] <TB3> INFO: pulse height fill bit: 0
[13:23:37.623] <TB3> INFO: buffer corruption: 0
[13:23:37.660] <TB3> INFO: ######################################################################
[13:23:37.660] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:23:37.660] <TB3> INFO: ######################################################################
[13:23:37.660] <TB3> INFO: ----------------------------------------------------------------------
[13:23:37.660] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:23:37.660] <TB3> INFO: ----------------------------------------------------------------------
[13:23:37.660] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:23:37.672] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[13:23:37.672] <TB3> INFO: run 1 of 1
[13:23:37.918] <TB3> INFO: Expecting 36608000 events.
[13:24:01.364] <TB3> INFO: 684850 events read in total (22854ms).
[13:24:24.461] <TB3> INFO: 1357250 events read in total (45951ms).
[13:24:47.175] <TB3> INFO: 2027700 events read in total (68665ms).
[13:25:09.748] <TB3> INFO: 2698350 events read in total (91238ms).
[13:25:32.223] <TB3> INFO: 3366600 events read in total (113713ms).
[13:25:54.765] <TB3> INFO: 4034350 events read in total (136255ms).
[13:26:17.475] <TB3> INFO: 4701750 events read in total (158965ms).
[13:26:40.401] <TB3> INFO: 5367900 events read in total (181891ms).
[13:27:03.694] <TB3> INFO: 6035950 events read in total (205184ms).
[13:27:26.796] <TB3> INFO: 6702950 events read in total (228286ms).
[13:27:49.621] <TB3> INFO: 7368750 events read in total (251111ms).
[13:28:12.490] <TB3> INFO: 8034100 events read in total (273980ms).
[13:28:35.381] <TB3> INFO: 8701250 events read in total (296871ms).
[13:28:58.596] <TB3> INFO: 9368650 events read in total (320086ms).
[13:29:21.867] <TB3> INFO: 10035150 events read in total (343357ms).
[13:29:44.667] <TB3> INFO: 10699450 events read in total (366157ms).
[13:30:07.639] <TB3> INFO: 11365950 events read in total (389129ms).
[13:30:30.290] <TB3> INFO: 12030200 events read in total (411780ms).
[13:30:53.172] <TB3> INFO: 12696300 events read in total (434663ms).
[13:31:16.071] <TB3> INFO: 13360050 events read in total (457561ms).
[13:31:38.815] <TB3> INFO: 14024750 events read in total (480305ms).
[13:32:01.639] <TB3> INFO: 14686700 events read in total (503129ms).
[13:32:24.459] <TB3> INFO: 15350500 events read in total (525949ms).
[13:32:47.371] <TB3> INFO: 16012850 events read in total (548861ms).
[13:33:10.748] <TB3> INFO: 16675600 events read in total (572238ms).
[13:33:34.497] <TB3> INFO: 17340800 events read in total (595987ms).
[13:33:57.353] <TB3> INFO: 18003550 events read in total (618843ms).
[13:34:20.179] <TB3> INFO: 18666150 events read in total (641669ms).
[13:34:43.471] <TB3> INFO: 19328750 events read in total (664961ms).
[13:35:06.513] <TB3> INFO: 19989700 events read in total (688003ms).
[13:35:29.474] <TB3> INFO: 20650200 events read in total (710964ms).
[13:35:52.755] <TB3> INFO: 21311050 events read in total (734245ms).
[13:36:15.504] <TB3> INFO: 21971350 events read in total (756995ms).
[13:36:38.799] <TB3> INFO: 22632450 events read in total (780289ms).
[13:37:02.064] <TB3> INFO: 23291900 events read in total (803554ms).
[13:37:25.074] <TB3> INFO: 23951900 events read in total (826564ms).
[13:37:48.139] <TB3> INFO: 24610600 events read in total (849629ms).
[13:38:11.009] <TB3> INFO: 25269950 events read in total (872499ms).
[13:38:34.164] <TB3> INFO: 25927350 events read in total (895654ms).
[13:38:56.897] <TB3> INFO: 26584300 events read in total (918387ms).
[13:39:20.032] <TB3> INFO: 27242300 events read in total (941522ms).
[13:39:43.250] <TB3> INFO: 27900250 events read in total (964740ms).
[13:40:06.482] <TB3> INFO: 28556300 events read in total (987972ms).
[13:40:29.555] <TB3> INFO: 29214050 events read in total (1011045ms).
[13:40:52.239] <TB3> INFO: 29871250 events read in total (1033729ms).
[13:41:15.418] <TB3> INFO: 30528050 events read in total (1056908ms).
[13:41:38.886] <TB3> INFO: 31184650 events read in total (1080376ms).
[13:42:02.039] <TB3> INFO: 31841300 events read in total (1103529ms).
[13:42:25.361] <TB3> INFO: 32497400 events read in total (1126851ms).
[13:42:48.576] <TB3> INFO: 33153300 events read in total (1150066ms).
[13:43:11.325] <TB3> INFO: 33810650 events read in total (1172815ms).
[13:43:34.573] <TB3> INFO: 34466550 events read in total (1196063ms).
[13:43:57.665] <TB3> INFO: 35121000 events read in total (1219155ms).
[13:44:20.202] <TB3> INFO: 35779150 events read in total (1241692ms).
[13:44:43.628] <TB3> INFO: 36446800 events read in total (1265118ms).
[13:44:49.404] <TB3> INFO: 36608000 events read in total (1270894ms).
[13:44:49.454] <TB3> INFO: Test took 1271783ms.
[13:44:49.871] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:44:51.984] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:44:53.762] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:44:55.256] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:44:57.045] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:44:58.642] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:00.819] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:02.326] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:03.763] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:05.259] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:07.237] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:08.789] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:10.207] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:11.637] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:13.085] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:14.483] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:45:15.941] <TB3> INFO: PixTestScurves::scurves() done
[13:45:15.941] <TB3> INFO: Vcal mean: 118.21 113.82 114.35 124.37 108.78 122.47 113.03 120.01 112.61 112.90 115.52 113.81 114.04 108.61 123.33 120.85
[13:45:15.941] <TB3> INFO: Vcal RMS: 5.74 5.16 4.93 6.16 4.62 5.61 4.79 5.20 4.55 4.47 5.19 4.83 5.32 5.37 6.01 5.96
[13:45:15.941] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1298 seconds
[13:45:15.941] <TB3> INFO: Decoding statistics:
[13:45:15.941] <TB3> INFO: General information:
[13:45:15.941] <TB3> INFO: 16bit words read: 0
[13:45:15.941] <TB3> INFO: valid events total: 0
[13:45:15.941] <TB3> INFO: empty events: 0
[13:45:15.941] <TB3> INFO: valid events with pixels: 0
[13:45:15.941] <TB3> INFO: valid pixel hits: 0
[13:45:15.941] <TB3> INFO: Event errors: 0
[13:45:15.941] <TB3> INFO: start marker: 0
[13:45:15.941] <TB3> INFO: stop marker: 0
[13:45:15.941] <TB3> INFO: overflow: 0
[13:45:15.941] <TB3> INFO: invalid 5bit words: 0
[13:45:15.941] <TB3> INFO: invalid XOR eye diagram: 0
[13:45:15.941] <TB3> INFO: frame (failed synchr.): 0
[13:45:15.941] <TB3> INFO: idle data (no TBM trl): 0
[13:45:15.941] <TB3> INFO: no data (only TBM hdr): 0
[13:45:15.941] <TB3> INFO: TBM errors: 0
[13:45:15.941] <TB3> INFO: flawed TBM headers: 0
[13:45:15.941] <TB3> INFO: flawed TBM trailers: 0
[13:45:15.941] <TB3> INFO: event ID mismatches: 0
[13:45:15.941] <TB3> INFO: ROC errors: 0
[13:45:15.941] <TB3> INFO: missing ROC header(s): 0
[13:45:15.941] <TB3> INFO: misplaced readback start: 0
[13:45:15.941] <TB3> INFO: Pixel decoding errors: 0
[13:45:15.941] <TB3> INFO: pixel data incomplete: 0
[13:45:15.941] <TB3> INFO: pixel address: 0
[13:45:15.941] <TB3> INFO: pulse height fill bit: 0
[13:45:15.941] <TB3> INFO: buffer corruption: 0
[13:45:16.005] <TB3> INFO: ######################################################################
[13:45:16.005] <TB3> INFO: PixTestTrim::doTest()
[13:45:16.005] <TB3> INFO: ######################################################################
[13:45:16.006] <TB3> INFO: ----------------------------------------------------------------------
[13:45:16.007] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:45:16.007] <TB3> INFO: ----------------------------------------------------------------------
[13:45:16.047] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:45:16.047] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:45:16.057] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:45:16.057] <TB3> INFO: run 1 of 1
[13:45:16.289] <TB3> INFO: Expecting 5025280 events.
[13:45:47.907] <TB3> INFO: 824136 events read in total (31025ms).
[13:46:18.650] <TB3> INFO: 1644768 events read in total (61768ms).
[13:46:48.949] <TB3> INFO: 2463304 events read in total (92068ms).
[13:47:19.066] <TB3> INFO: 3279320 events read in total (122184ms).
[13:47:49.722] <TB3> INFO: 4091208 events read in total (152841ms).
[13:48:19.995] <TB3> INFO: 4900968 events read in total (183113ms).
[13:48:25.230] <TB3> INFO: 5025280 events read in total (188348ms).
[13:48:25.286] <TB3> INFO: Test took 189229ms.
[13:48:40.175] <TB3> INFO: ROC 0 VthrComp = 127
[13:48:40.175] <TB3> INFO: ROC 1 VthrComp = 120
[13:48:40.175] <TB3> INFO: ROC 2 VthrComp = 117
[13:48:40.175] <TB3> INFO: ROC 3 VthrComp = 130
[13:48:40.175] <TB3> INFO: ROC 4 VthrComp = 117
[13:48:40.176] <TB3> INFO: ROC 5 VthrComp = 128
[13:48:40.176] <TB3> INFO: ROC 6 VthrComp = 117
[13:48:40.176] <TB3> INFO: ROC 7 VthrComp = 127
[13:48:40.176] <TB3> INFO: ROC 8 VthrComp = 118
[13:48:40.176] <TB3> INFO: ROC 9 VthrComp = 118
[13:48:40.177] <TB3> INFO: ROC 10 VthrComp = 123
[13:48:40.177] <TB3> INFO: ROC 11 VthrComp = 119
[13:48:40.177] <TB3> INFO: ROC 12 VthrComp = 115
[13:48:40.177] <TB3> INFO: ROC 13 VthrComp = 114
[13:48:40.177] <TB3> INFO: ROC 14 VthrComp = 130
[13:48:40.178] <TB3> INFO: ROC 15 VthrComp = 124
[13:48:40.470] <TB3> INFO: Expecting 41600 events.
[13:48:44.032] <TB3> INFO: 41600 events read in total (2971ms).
[13:48:44.033] <TB3> INFO: Test took 3854ms.
[13:48:44.045] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:48:44.045] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:48:44.057] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:48:44.057] <TB3> INFO: run 1 of 1
[13:48:44.334] <TB3> INFO: Expecting 5025280 events.
[13:49:11.368] <TB3> INFO: 589032 events read in total (26442ms).
[13:49:37.112] <TB3> INFO: 1177376 events read in total (52186ms).
[13:50:02.999] <TB3> INFO: 1765808 events read in total (78073ms).
[13:50:28.825] <TB3> INFO: 2353888 events read in total (103899ms).
[13:50:54.382] <TB3> INFO: 2940432 events read in total (129456ms).
[13:51:20.648] <TB3> INFO: 3526032 events read in total (155722ms).
[13:51:46.205] <TB3> INFO: 4110464 events read in total (181279ms).
[13:52:12.297] <TB3> INFO: 4693792 events read in total (207371ms).
[13:52:27.148] <TB3> INFO: 5025280 events read in total (222222ms).
[13:52:27.204] <TB3> INFO: Test took 223147ms.
[13:52:48.795] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.1519 for pixel 3/20 mean/min/max = 45.1798/31.9417/58.4178
[13:52:48.796] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.9437 for pixel 0/11 mean/min/max = 46.4183/32.7688/60.0678
[13:52:48.796] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.5798 for pixel 12/2 mean/min/max = 46.6099/33.6206/59.5993
[13:52:48.796] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.9203 for pixel 17/7 mean/min/max = 47.031/32.0587/62.0032
[13:52:48.797] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.4503 for pixel 8/7 mean/min/max = 45.1297/32.7192/57.5403
[13:52:48.797] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.4368 for pixel 6/4 mean/min/max = 44.922/32.3691/57.4749
[13:52:48.797] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.3663 for pixel 16/6 mean/min/max = 45.9216/33.265/58.5782
[13:52:48.798] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.5917 for pixel 25/5 mean/min/max = 45.3365/32.977/57.696
[13:52:48.798] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 56.7426 for pixel 51/46 mean/min/max = 45.0726/33.3814/56.7639
[13:52:48.799] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 56.5503 for pixel 5/20 mean/min/max = 44.8469/33.1213/56.5725
[13:52:48.799] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.6519 for pixel 45/68 mean/min/max = 45.6844/33.6846/57.6841
[13:52:48.799] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.2187 for pixel 0/73 mean/min/max = 45.0805/32.8587/57.3023
[13:52:48.800] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.919 for pixel 0/49 mean/min/max = 46.4644/32.9725/59.9562
[13:52:48.800] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.8341 for pixel 4/0 mean/min/max = 45.7278/32.5573/58.8982
[13:52:48.800] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.1882 for pixel 25/8 mean/min/max = 44.9999/30.7278/59.272
[13:52:48.801] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 59.1249 for pixel 8/8 mean/min/max = 46.4003/33.5167/59.2839
[13:52:48.801] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:52:48.890] <TB3> INFO: Expecting 411648 events.
[13:52:58.322] <TB3> INFO: 411648 events read in total (8841ms).
[13:52:58.329] <TB3> INFO: Expecting 411648 events.
[13:53:07.520] <TB3> INFO: 411648 events read in total (8788ms).
[13:53:07.529] <TB3> INFO: Expecting 411648 events.
[13:53:16.845] <TB3> INFO: 411648 events read in total (8913ms).
[13:53:16.862] <TB3> INFO: Expecting 411648 events.
[13:53:26.153] <TB3> INFO: 411648 events read in total (8888ms).
[13:53:26.168] <TB3> INFO: Expecting 411648 events.
[13:53:35.364] <TB3> INFO: 411648 events read in total (8793ms).
[13:53:35.381] <TB3> INFO: Expecting 411648 events.
[13:53:44.673] <TB3> INFO: 411648 events read in total (8889ms).
[13:53:44.701] <TB3> INFO: Expecting 411648 events.
[13:53:53.988] <TB3> INFO: 411648 events read in total (8884ms).
[13:53:54.010] <TB3> INFO: Expecting 411648 events.
[13:54:03.168] <TB3> INFO: 411648 events read in total (8755ms).
[13:54:03.192] <TB3> INFO: Expecting 411648 events.
[13:54:12.412] <TB3> INFO: 411648 events read in total (8817ms).
[13:54:12.439] <TB3> INFO: Expecting 411648 events.
[13:54:21.586] <TB3> INFO: 411648 events read in total (8745ms).
[13:54:21.615] <TB3> INFO: Expecting 411648 events.
[13:54:30.853] <TB3> INFO: 411648 events read in total (8835ms).
[13:54:30.885] <TB3> INFO: Expecting 411648 events.
[13:54:40.198] <TB3> INFO: 411648 events read in total (8910ms).
[13:54:40.232] <TB3> INFO: Expecting 411648 events.
[13:54:49.377] <TB3> INFO: 411648 events read in total (8742ms).
[13:54:49.413] <TB3> INFO: Expecting 411648 events.
[13:54:58.542] <TB3> INFO: 411648 events read in total (8726ms).
[13:54:58.581] <TB3> INFO: Expecting 411648 events.
[13:55:07.950] <TB3> INFO: 411648 events read in total (8966ms).
[13:55:07.992] <TB3> INFO: Expecting 411648 events.
[13:55:17.171] <TB3> INFO: 411648 events read in total (8776ms).
[13:55:17.218] <TB3> INFO: Test took 148417ms.
[13:55:17.904] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:55:17.914] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:55:17.914] <TB3> INFO: run 1 of 1
[13:55:18.145] <TB3> INFO: Expecting 5025280 events.
[13:55:45.155] <TB3> INFO: 586784 events read in total (26419ms).
[13:56:10.982] <TB3> INFO: 1172648 events read in total (52246ms).
[13:56:36.856] <TB3> INFO: 1758304 events read in total (78120ms).
[13:57:03.202] <TB3> INFO: 2342128 events read in total (104466ms).
[13:57:29.448] <TB3> INFO: 2927544 events read in total (130712ms).
[13:57:55.564] <TB3> INFO: 3512040 events read in total (156828ms).
[13:58:21.696] <TB3> INFO: 4095768 events read in total (182960ms).
[13:58:47.817] <TB3> INFO: 4680352 events read in total (209081ms).
[13:59:03.525] <TB3> INFO: 5025280 events read in total (224789ms).
[13:59:03.654] <TB3> INFO: Test took 225741ms.
[13:59:31.416] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 7.252679 .. 142.195743
[13:59:31.738] <TB3> INFO: Expecting 208000 events.
[13:59:41.347] <TB3> INFO: 208000 events read in total (9018ms).
[13:59:41.348] <TB3> INFO: Test took 9931ms.
[13:59:41.416] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 7 .. 152 (-1/-1) hits flags = 528 (plus default)
[13:59:41.426] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:59:41.426] <TB3> INFO: run 1 of 1
[13:59:41.704] <TB3> INFO: Expecting 4858880 events.
[14:00:08.542] <TB3> INFO: 577560 events read in total (26246ms).
[14:00:34.096] <TB3> INFO: 1155712 events read in total (51800ms).
[14:00:59.978] <TB3> INFO: 1733864 events read in total (77682ms).
[14:01:24.775] <TB3> INFO: 2312064 events read in total (102479ms).
[14:01:50.726] <TB3> INFO: 2889632 events read in total (128430ms).
[14:02:16.105] <TB3> INFO: 3466312 events read in total (153809ms).
[14:02:41.843] <TB3> INFO: 4042840 events read in total (179547ms).
[14:03:07.898] <TB3> INFO: 4618056 events read in total (205602ms).
[14:03:19.266] <TB3> INFO: 4858880 events read in total (216970ms).
[14:03:19.362] <TB3> INFO: Test took 217935ms.
[14:03:44.086] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 28.417749 .. 47.607530
[14:03:44.319] <TB3> INFO: Expecting 208000 events.
[14:03:54.340] <TB3> INFO: 208000 events read in total (9429ms).
[14:03:54.341] <TB3> INFO: Test took 10253ms.
[14:03:54.390] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 57 (-1/-1) hits flags = 528 (plus default)
[14:03:54.400] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:03:54.401] <TB3> INFO: run 1 of 1
[14:03:54.678] <TB3> INFO: Expecting 1331200 events.
[14:04:22.517] <TB3> INFO: 647592 events read in total (27247ms).
[14:04:50.191] <TB3> INFO: 1293672 events read in total (54921ms).
[14:04:52.256] <TB3> INFO: 1331200 events read in total (56986ms).
[14:04:52.280] <TB3> INFO: Test took 57879ms.
[14:05:03.888] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.100687 .. 46.772633
[14:05:04.121] <TB3> INFO: Expecting 208000 events.
[14:05:13.978] <TB3> INFO: 208000 events read in total (9265ms).
[14:05:13.979] <TB3> INFO: Test took 10090ms.
[14:05:14.052] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[14:05:14.065] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:05:14.065] <TB3> INFO: run 1 of 1
[14:05:14.358] <TB3> INFO: Expecting 1331200 events.
[14:05:43.097] <TB3> INFO: 655840 events read in total (28147ms).
[14:06:10.842] <TB3> INFO: 1310744 events read in total (55892ms).
[14:06:12.177] <TB3> INFO: 1331200 events read in total (57228ms).
[14:06:12.201] <TB3> INFO: Test took 58136ms.
[14:06:23.649] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.763791 .. 44.340618
[14:06:23.883] <TB3> INFO: Expecting 208000 events.
[14:06:33.876] <TB3> INFO: 208000 events read in total (9402ms).
[14:06:33.878] <TB3> INFO: Test took 10227ms.
[14:06:33.945] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 54 (-1/-1) hits flags = 528 (plus default)
[14:06:33.956] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:06:33.956] <TB3> INFO: run 1 of 1
[14:06:34.234] <TB3> INFO: Expecting 1331200 events.
[14:07:02.737] <TB3> INFO: 672296 events read in total (27912ms).
[14:07:30.882] <TB3> INFO: 1331200 events read in total (56057ms).
[14:07:30.914] <TB3> INFO: Test took 56959ms.
[14:07:42.568] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:07:42.568] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[14:07:42.580] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:07:42.580] <TB3> INFO: run 1 of 1
[14:07:42.825] <TB3> INFO: Expecting 1364480 events.
[14:08:11.718] <TB3> INFO: 668464 events read in total (28301ms).
[14:08:40.277] <TB3> INFO: 1336584 events read in total (56860ms).
[14:08:41.810] <TB3> INFO: 1364480 events read in total (58393ms).
[14:08:41.838] <TB3> INFO: Test took 59259ms.
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C0.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C1.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C2.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C3.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C4.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C5.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C6.dat
[14:08:52.900] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C7.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C8.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C9.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C10.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C11.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C12.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C13.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C14.dat
[14:08:52.901] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C15.dat
[14:08:52.901] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C0.dat
[14:08:52.910] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C1.dat
[14:08:52.915] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C2.dat
[14:08:52.920] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C3.dat
[14:08:52.926] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C4.dat
[14:08:52.931] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C5.dat
[14:08:52.937] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C6.dat
[14:08:52.942] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C7.dat
[14:08:52.948] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C8.dat
[14:08:52.953] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C9.dat
[14:08:52.959] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C10.dat
[14:08:52.964] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C11.dat
[14:08:52.970] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C12.dat
[14:08:52.975] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C13.dat
[14:08:52.981] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C14.dat
[14:08:52.986] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters35_C15.dat
[14:08:52.992] <TB3> INFO: PixTestTrim::trimTest() done
[14:08:52.992] <TB3> INFO: vtrim: 138 142 140 151 133 127 145 117 138 117 130 124 119 137 137 138
[14:08:52.992] <TB3> INFO: vthrcomp: 127 120 117 130 117 128 117 127 118 118 123 119 115 114 130 124
[14:08:52.992] <TB3> INFO: vcal mean: 34.94 35.01 35.05 35.04 34.94 34.98 34.98 34.99 34.99 34.97 34.97 35.04 34.99 34.94 35.01 35.08
[14:08:52.992] <TB3> INFO: vcal RMS: 1.03 1.06 1.14 1.15 1.06 1.18 1.05 1.08 1.04 0.97 1.02 1.18 1.04 0.97 1.17 1.16
[14:08:52.992] <TB3> INFO: bits mean: 9.88 9.41 9.86 9.75 10.05 10.44 9.88 9.48 10.08 9.81 9.62 10.27 9.19 9.66 10.50 9.53
[14:08:52.992] <TB3> INFO: bits RMS: 2.68 2.63 2.33 2.55 2.38 2.33 2.44 2.68 2.33 2.50 2.46 2.31 2.69 2.56 2.41 2.52
[14:08:52.998] <TB3> INFO: ----------------------------------------------------------------------
[14:08:52.998] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:08:52.998] <TB3> INFO: ----------------------------------------------------------------------
[14:08:52.001] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:08:53.011] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:08:53.011] <TB3> INFO: run 1 of 1
[14:08:53.243] <TB3> INFO: Expecting 4160000 events.
[14:09:26.358] <TB3> INFO: 755860 events read in total (32523ms).
[14:09:58.851] <TB3> INFO: 1505885 events read in total (65016ms).
[14:10:31.562] <TB3> INFO: 2252235 events read in total (97727ms).
[14:11:03.595] <TB3> INFO: 2993515 events read in total (129760ms).
[14:11:35.375] <TB3> INFO: 3730710 events read in total (161540ms).
[14:11:53.916] <TB3> INFO: 4160000 events read in total (180081ms).
[14:11:53.965] <TB3> INFO: Test took 180954ms.
[14:12:16.355] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[14:12:16.366] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:12:16.366] <TB3> INFO: run 1 of 1
[14:12:16.597] <TB3> INFO: Expecting 4097600 events.
[14:12:48.963] <TB3> INFO: 736950 events read in total (31774ms).
[14:13:21.190] <TB3> INFO: 1468305 events read in total (64001ms).
[14:13:52.742] <TB3> INFO: 2195930 events read in total (95553ms).
[14:14:24.271] <TB3> INFO: 2918815 events read in total (127082ms).
[14:14:56.574] <TB3> INFO: 3637495 events read in total (159385ms).
[14:15:17.101] <TB3> INFO: 4097600 events read in total (179912ms).
[14:15:17.169] <TB3> INFO: Test took 180803ms.
[14:15:47.127] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[14:15:47.137] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:15:47.137] <TB3> INFO: run 1 of 1
[14:15:47.369] <TB3> INFO: Expecting 3806400 events.
[14:16:20.595] <TB3> INFO: 759275 events read in total (32635ms).
[14:16:52.651] <TB3> INFO: 1511745 events read in total (64691ms).
[14:17:24.931] <TB3> INFO: 2259460 events read in total (96972ms).
[14:17:57.338] <TB3> INFO: 3001235 events read in total (129378ms).
[14:18:29.489] <TB3> INFO: 3739850 events read in total (161529ms).
[14:18:32.845] <TB3> INFO: 3806400 events read in total (164885ms).
[14:18:32.887] <TB3> INFO: Test took 165750ms.
[14:18:55.579] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[14:18:55.593] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:18:55.593] <TB3> INFO: run 1 of 1
[14:18:55.828] <TB3> INFO: Expecting 3827200 events.
[14:19:28.525] <TB3> INFO: 757890 events read in total (32106ms).
[14:20:01.143] <TB3> INFO: 1509360 events read in total (64724ms).
[14:20:33.765] <TB3> INFO: 2255830 events read in total (97346ms).
[14:21:05.803] <TB3> INFO: 2996675 events read in total (129384ms).
[14:21:37.611] <TB3> INFO: 3734085 events read in total (161192ms).
[14:21:41.860] <TB3> INFO: 3827200 events read in total (165441ms).
[14:21:41.901] <TB3> INFO: Test took 166308ms.
[14:22:04.534] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[14:22:04.544] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:22:04.544] <TB3> INFO: run 1 of 1
[14:22:04.775] <TB3> INFO: Expecting 3827200 events.
[14:22:37.991] <TB3> INFO: 758210 events read in total (32624ms).
[14:23:10.132] <TB3> INFO: 1509975 events read in total (64765ms).
[14:23:42.393] <TB3> INFO: 2256755 events read in total (97026ms).
[14:24:14.650] <TB3> INFO: 2997840 events read in total (129283ms).
[14:24:46.768] <TB3> INFO: 3735640 events read in total (161401ms).
[14:24:51.140] <TB3> INFO: 3827200 events read in total (165773ms).
[14:24:51.198] <TB3> INFO: Test took 166654ms.
[14:25:13.307] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:25:13.308] <TB3> INFO: PixTestTrim::doTest() done, duration: 2397 seconds
[14:25:13.308] <TB3> INFO: Decoding statistics:
[14:25:13.308] <TB3> INFO: General information:
[14:25:13.308] <TB3> INFO: 16bit words read: 0
[14:25:13.308] <TB3> INFO: valid events total: 0
[14:25:13.308] <TB3> INFO: empty events: 0
[14:25:13.308] <TB3> INFO: valid events with pixels: 0
[14:25:13.308] <TB3> INFO: valid pixel hits: 0
[14:25:13.308] <TB3> INFO: Event errors: 0
[14:25:13.308] <TB3> INFO: start marker: 0
[14:25:13.308] <TB3> INFO: stop marker: 0
[14:25:13.308] <TB3> INFO: overflow: 0
[14:25:13.308] <TB3> INFO: invalid 5bit words: 0
[14:25:13.308] <TB3> INFO: invalid XOR eye diagram: 0
[14:25:13.308] <TB3> INFO: frame (failed synchr.): 0
[14:25:13.308] <TB3> INFO: idle data (no TBM trl): 0
[14:25:13.308] <TB3> INFO: no data (only TBM hdr): 0
[14:25:13.308] <TB3> INFO: TBM errors: 0
[14:25:13.308] <TB3> INFO: flawed TBM headers: 0
[14:25:13.308] <TB3> INFO: flawed TBM trailers: 0
[14:25:13.308] <TB3> INFO: event ID mismatches: 0
[14:25:13.308] <TB3> INFO: ROC errors: 0
[14:25:13.308] <TB3> INFO: missing ROC header(s): 0
[14:25:13.308] <TB3> INFO: misplaced readback start: 0
[14:25:13.308] <TB3> INFO: Pixel decoding errors: 0
[14:25:13.308] <TB3> INFO: pixel data incomplete: 0
[14:25:13.308] <TB3> INFO: pixel address: 0
[14:25:13.308] <TB3> INFO: pulse height fill bit: 0
[14:25:13.308] <TB3> INFO: buffer corruption: 0
[14:25:13.922] <TB3> INFO: ######################################################################
[14:25:13.922] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:25:13.922] <TB3> INFO: ######################################################################
[14:25:14.155] <TB3> INFO: Expecting 41600 events.
[14:25:17.597] <TB3> INFO: 41600 events read in total (2850ms).
[14:25:17.598] <TB3> INFO: Test took 3675ms.
[14:25:18.034] <TB3> INFO: Expecting 41600 events.
[14:25:21.840] <TB3> INFO: 41600 events read in total (3214ms).
[14:25:21.841] <TB3> INFO: Test took 4038ms.
[14:25:22.132] <TB3> INFO: Expecting 41600 events.
[14:25:25.738] <TB3> INFO: 41600 events read in total (3014ms).
[14:25:25.738] <TB3> INFO: Test took 3871ms.
[14:25:26.026] <TB3> INFO: Expecting 41600 events.
[14:25:29.748] <TB3> INFO: 41600 events read in total (3130ms).
[14:25:29.749] <TB3> INFO: Test took 3987ms.
[14:25:30.040] <TB3> INFO: Expecting 41600 events.
[14:25:33.798] <TB3> INFO: 41600 events read in total (3166ms).
[14:25:33.799] <TB3> INFO: Test took 4024ms.
[14:25:34.090] <TB3> INFO: Expecting 41600 events.
[14:25:37.764] <TB3> INFO: 41600 events read in total (3082ms).
[14:25:37.764] <TB3> INFO: Test took 3938ms.
[14:25:38.052] <TB3> INFO: Expecting 41600 events.
[14:25:41.573] <TB3> INFO: 41600 events read in total (2929ms).
[14:25:41.574] <TB3> INFO: Test took 3787ms.
[14:25:41.862] <TB3> INFO: Expecting 41600 events.
[14:25:45.380] <TB3> INFO: 41600 events read in total (2927ms).
[14:25:45.381] <TB3> INFO: Test took 3784ms.
[14:25:45.673] <TB3> INFO: Expecting 41600 events.
[14:25:49.363] <TB3> INFO: 41600 events read in total (3099ms).
[14:25:49.364] <TB3> INFO: Test took 3956ms.
[14:25:49.687] <TB3> INFO: Expecting 41600 events.
[14:25:53.285] <TB3> INFO: 41600 events read in total (3006ms).
[14:25:53.286] <TB3> INFO: Test took 3896ms.
[14:25:53.577] <TB3> INFO: Expecting 41600 events.
[14:25:57.187] <TB3> INFO: 41600 events read in total (3018ms).
[14:25:57.187] <TB3> INFO: Test took 3874ms.
[14:25:57.475] <TB3> INFO: Expecting 41600 events.
[14:26:00.985] <TB3> INFO: 41600 events read in total (2918ms).
[14:26:00.986] <TB3> INFO: Test took 3775ms.
[14:26:01.278] <TB3> INFO: Expecting 41600 events.
[14:26:04.872] <TB3> INFO: 41600 events read in total (3003ms).
[14:26:04.873] <TB3> INFO: Test took 3860ms.
[14:26:05.160] <TB3> INFO: Expecting 41600 events.
[14:26:08.757] <TB3> INFO: 41600 events read in total (3005ms).
[14:26:08.758] <TB3> INFO: Test took 3862ms.
[14:26:09.055] <TB3> INFO: Expecting 41600 events.
[14:26:12.582] <TB3> INFO: 41600 events read in total (2936ms).
[14:26:12.583] <TB3> INFO: Test took 3798ms.
[14:26:12.871] <TB3> INFO: Expecting 41600 events.
[14:26:16.654] <TB3> INFO: 41600 events read in total (3191ms).
[14:26:16.655] <TB3> INFO: Test took 4049ms.
[14:26:16.946] <TB3> INFO: Expecting 41600 events.
[14:26:20.521] <TB3> INFO: 41600 events read in total (2983ms).
[14:26:20.522] <TB3> INFO: Test took 3840ms.
[14:26:20.810] <TB3> INFO: Expecting 41600 events.
[14:26:24.496] <TB3> INFO: 41600 events read in total (3094ms).
[14:26:24.497] <TB3> INFO: Test took 3952ms.
[14:26:24.785] <TB3> INFO: Expecting 41600 events.
[14:26:28.286] <TB3> INFO: 41600 events read in total (2909ms).
[14:26:28.287] <TB3> INFO: Test took 3766ms.
[14:26:28.579] <TB3> INFO: Expecting 41600 events.
[14:26:32.251] <TB3> INFO: 41600 events read in total (3081ms).
[14:26:32.252] <TB3> INFO: Test took 3938ms.
[14:26:32.579] <TB3> INFO: Expecting 41600 events.
[14:26:36.034] <TB3> INFO: 41600 events read in total (2864ms).
[14:26:36.034] <TB3> INFO: Test took 3754ms.
[14:26:36.347] <TB3> INFO: Expecting 41600 events.
[14:26:39.964] <TB3> INFO: 41600 events read in total (3025ms).
[14:26:39.965] <TB3> INFO: Test took 3907ms.
[14:26:40.255] <TB3> INFO: Expecting 41600 events.
[14:26:43.900] <TB3> INFO: 41600 events read in total (3053ms).
[14:26:43.901] <TB3> INFO: Test took 3910ms.
[14:26:44.193] <TB3> INFO: Expecting 41600 events.
[14:26:47.752] <TB3> INFO: 41600 events read in total (2968ms).
[14:26:47.753] <TB3> INFO: Test took 3825ms.
[14:26:48.042] <TB3> INFO: Expecting 41600 events.
[14:26:51.619] <TB3> INFO: 41600 events read in total (2985ms).
[14:26:51.620] <TB3> INFO: Test took 3843ms.
[14:26:51.908] <TB3> INFO: Expecting 41600 events.
[14:26:55.531] <TB3> INFO: 41600 events read in total (3031ms).
[14:26:55.532] <TB3> INFO: Test took 3889ms.
[14:26:55.845] <TB3> INFO: Expecting 41600 events.
[14:26:59.328] <TB3> INFO: 41600 events read in total (2891ms).
[14:26:59.329] <TB3> INFO: Test took 3770ms.
[14:26:59.619] <TB3> INFO: Expecting 41600 events.
[14:27:03.410] <TB3> INFO: 41600 events read in total (3200ms).
[14:27:03.410] <TB3> INFO: Test took 4056ms.
[14:27:03.699] <TB3> INFO: Expecting 2560 events.
[14:27:04.587] <TB3> INFO: 2560 events read in total (296ms).
[14:27:04.587] <TB3> INFO: Test took 1164ms.
[14:27:04.895] <TB3> INFO: Expecting 2560 events.
[14:27:05.776] <TB3> INFO: 2560 events read in total (290ms).
[14:27:05.777] <TB3> INFO: Test took 1189ms.
[14:27:06.084] <TB3> INFO: Expecting 2560 events.
[14:27:06.968] <TB3> INFO: 2560 events read in total (292ms).
[14:27:06.968] <TB3> INFO: Test took 1191ms.
[14:27:07.276] <TB3> INFO: Expecting 2560 events.
[14:27:08.161] <TB3> INFO: 2560 events read in total (293ms).
[14:27:08.161] <TB3> INFO: Test took 1193ms.
[14:27:08.469] <TB3> INFO: Expecting 2560 events.
[14:27:09.352] <TB3> INFO: 2560 events read in total (291ms).
[14:27:09.352] <TB3> INFO: Test took 1190ms.
[14:27:09.660] <TB3> INFO: Expecting 2560 events.
[14:27:10.539] <TB3> INFO: 2560 events read in total (288ms).
[14:27:10.540] <TB3> INFO: Test took 1188ms.
[14:27:10.847] <TB3> INFO: Expecting 2560 events.
[14:27:11.730] <TB3> INFO: 2560 events read in total (291ms).
[14:27:11.730] <TB3> INFO: Test took 1190ms.
[14:27:12.038] <TB3> INFO: Expecting 2560 events.
[14:27:12.918] <TB3> INFO: 2560 events read in total (288ms).
[14:27:12.918] <TB3> INFO: Test took 1187ms.
[14:27:13.226] <TB3> INFO: Expecting 2560 events.
[14:27:14.106] <TB3> INFO: 2560 events read in total (288ms).
[14:27:14.106] <TB3> INFO: Test took 1188ms.
[14:27:14.415] <TB3> INFO: Expecting 2560 events.
[14:27:15.295] <TB3> INFO: 2560 events read in total (289ms).
[14:27:15.295] <TB3> INFO: Test took 1188ms.
[14:27:15.603] <TB3> INFO: Expecting 2560 events.
[14:27:16.487] <TB3> INFO: 2560 events read in total (292ms).
[14:27:16.487] <TB3> INFO: Test took 1191ms.
[14:27:16.795] <TB3> INFO: Expecting 2560 events.
[14:27:17.672] <TB3> INFO: 2560 events read in total (285ms).
[14:27:17.672] <TB3> INFO: Test took 1184ms.
[14:27:17.980] <TB3> INFO: Expecting 2560 events.
[14:27:18.868] <TB3> INFO: 2560 events read in total (296ms).
[14:27:18.868] <TB3> INFO: Test took 1195ms.
[14:27:19.177] <TB3> INFO: Expecting 2560 events.
[14:27:20.059] <TB3> INFO: 2560 events read in total (292ms).
[14:27:20.060] <TB3> INFO: Test took 1191ms.
[14:27:20.368] <TB3> INFO: Expecting 2560 events.
[14:27:21.251] <TB3> INFO: 2560 events read in total (293ms).
[14:27:21.252] <TB3> INFO: Test took 1192ms.
[14:27:21.560] <TB3> INFO: Expecting 2560 events.
[14:27:22.444] <TB3> INFO: 2560 events read in total (293ms).
[14:27:22.444] <TB3> INFO: Test took 1192ms.
[14:27:22.447] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:27:22.753] <TB3> INFO: Expecting 655360 events.
[14:27:37.367] <TB3> INFO: 655360 events read in total (14023ms).
[14:27:37.377] <TB3> INFO: Expecting 655360 events.
[14:27:51.802] <TB3> INFO: 655360 events read in total (14022ms).
[14:27:51.817] <TB3> INFO: Expecting 655360 events.
[14:28:06.276] <TB3> INFO: 655360 events read in total (14056ms).
[14:28:06.295] <TB3> INFO: Expecting 655360 events.
[14:28:20.895] <TB3> INFO: 655360 events read in total (14197ms).
[14:28:20.917] <TB3> INFO: Expecting 655360 events.
[14:28:35.480] <TB3> INFO: 655360 events read in total (14160ms).
[14:28:35.516] <TB3> INFO: Expecting 655360 events.
[14:28:50.192] <TB3> INFO: 655360 events read in total (14273ms).
[14:28:50.223] <TB3> INFO: Expecting 655360 events.
[14:29:04.815] <TB3> INFO: 655360 events read in total (14189ms).
[14:29:04.849] <TB3> INFO: Expecting 655360 events.
[14:29:19.589] <TB3> INFO: 655360 events read in total (14337ms).
[14:29:19.651] <TB3> INFO: Expecting 655360 events.
[14:29:34.065] <TB3> INFO: 655360 events read in total (14011ms).
[14:29:34.108] <TB3> INFO: Expecting 655360 events.
[14:29:48.645] <TB3> INFO: 655360 events read in total (14134ms).
[14:29:48.719] <TB3> INFO: Expecting 655360 events.
[14:30:03.148] <TB3> INFO: 655360 events read in total (14026ms).
[14:30:03.226] <TB3> INFO: Expecting 655360 events.
[14:30:17.757] <TB3> INFO: 655360 events read in total (14128ms).
[14:30:17.841] <TB3> INFO: Expecting 655360 events.
[14:30:32.485] <TB3> INFO: 655360 events read in total (14241ms).
[14:30:32.548] <TB3> INFO: Expecting 655360 events.
[14:30:47.126] <TB3> INFO: 655360 events read in total (14175ms).
[14:30:47.190] <TB3> INFO: Expecting 655360 events.
[14:31:01.739] <TB3> INFO: 655360 events read in total (14146ms).
[14:31:01.843] <TB3> INFO: Expecting 655360 events.
[14:31:16.363] <TB3> INFO: 655360 events read in total (14117ms).
[14:31:16.465] <TB3> INFO: Test took 234018ms.
[14:31:16.543] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:31:16.808] <TB3> INFO: Expecting 655360 events.
[14:31:31.419] <TB3> INFO: 655360 events read in total (14019ms).
[14:31:31.430] <TB3> INFO: Expecting 655360 events.
[14:31:45.787] <TB3> INFO: 655360 events read in total (13954ms).
[14:31:45.801] <TB3> INFO: Expecting 655360 events.
[14:32:00.320] <TB3> INFO: 655360 events read in total (14116ms).
[14:32:00.338] <TB3> INFO: Expecting 655360 events.
[14:32:14.615] <TB3> INFO: 655360 events read in total (13874ms).
[14:32:14.637] <TB3> INFO: Expecting 655360 events.
[14:32:29.130] <TB3> INFO: 655360 events read in total (14090ms).
[14:32:29.160] <TB3> INFO: Expecting 655360 events.
[14:32:43.603] <TB3> INFO: 655360 events read in total (14040ms).
[14:32:43.633] <TB3> INFO: Expecting 655360 events.
[14:32:58.060] <TB3> INFO: 655360 events read in total (14024ms).
[14:32:58.094] <TB3> INFO: Expecting 655360 events.
[14:33:12.561] <TB3> INFO: 655360 events read in total (14064ms).
[14:33:12.601] <TB3> INFO: Expecting 655360 events.
[14:33:27.141] <TB3> INFO: 655360 events read in total (14137ms).
[14:33:27.183] <TB3> INFO: Expecting 655360 events.
[14:33:41.568] <TB3> INFO: 655360 events read in total (13982ms).
[14:33:41.618] <TB3> INFO: Expecting 655360 events.
[14:33:55.891] <TB3> INFO: 655360 events read in total (13871ms).
[14:33:55.967] <TB3> INFO: Expecting 655360 events.
[14:34:10.219] <TB3> INFO: 655360 events read in total (13849ms).
[14:34:10.276] <TB3> INFO: Expecting 655360 events.
[14:34:24.585] <TB3> INFO: 655360 events read in total (13906ms).
[14:34:24.646] <TB3> INFO: Expecting 655360 events.
[14:34:38.930] <TB3> INFO: 655360 events read in total (13881ms).
[14:34:38.995] <TB3> INFO: Expecting 655360 events.
[14:34:53.582] <TB3> INFO: 655360 events read in total (14184ms).
[14:34:53.651] <TB3> INFO: Expecting 655360 events.
[14:35:07.807] <TB3> INFO: 655360 events read in total (13753ms).
[14:35:07.880] <TB3> INFO: Test took 231337ms.
[14:35:08.031] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.036] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.041] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.046] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:35:08.050] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:35:08.055] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:35:08.059] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:35:08.064] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:35:08.068] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:35:08.072] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.077] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.081] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.086] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.090] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.095] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.099] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.104] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.108] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.113] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:35:08.117] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:35:08.121] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:35:08.126] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:35:08.130] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:35:08.135] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:35:08.139] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[14:35:08.144] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.148] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.152] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.157] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.161] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:35:08.166] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:35:08.170] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.175] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.179] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.183] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.188] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.192] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.197] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.201] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.205] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.210] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.214] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.219] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:35:08.223] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:35:08.228] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:35:08.260] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C0.dat
[14:35:08.260] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C1.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C2.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C3.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C4.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C5.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C6.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C7.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C8.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C9.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C10.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C11.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C12.dat
[14:35:08.261] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C13.dat
[14:35:08.262] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C14.dat
[14:35:08.262] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters35_C15.dat
[14:35:08.554] <TB3> INFO: Expecting 41600 events.
[14:35:11.749] <TB3> INFO: 41600 events read in total (2603ms).
[14:35:11.750] <TB3> INFO: Test took 3486ms.
[14:35:12.191] <TB3> INFO: Expecting 41600 events.
[14:35:15.239] <TB3> INFO: 41600 events read in total (2456ms).
[14:35:15.240] <TB3> INFO: Test took 3280ms.
[14:35:15.685] <TB3> INFO: Expecting 41600 events.
[14:35:18.789] <TB3> INFO: 41600 events read in total (2513ms).
[14:35:18.790] <TB3> INFO: Test took 3337ms.
[14:35:19.005] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:19.093] <TB3> INFO: Expecting 2560 events.
[14:35:19.980] <TB3> INFO: 2560 events read in total (295ms).
[14:35:19.981] <TB3> INFO: Test took 976ms.
[14:35:19.983] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:20.289] <TB3> INFO: Expecting 2560 events.
[14:35:21.171] <TB3> INFO: 2560 events read in total (291ms).
[14:35:21.172] <TB3> INFO: Test took 1189ms.
[14:35:21.174] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:21.480] <TB3> INFO: Expecting 2560 events.
[14:35:22.363] <TB3> INFO: 2560 events read in total (292ms).
[14:35:22.363] <TB3> INFO: Test took 1190ms.
[14:35:22.365] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:22.672] <TB3> INFO: Expecting 2560 events.
[14:35:23.560] <TB3> INFO: 2560 events read in total (297ms).
[14:35:23.560] <TB3> INFO: Test took 1195ms.
[14:35:23.562] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:23.868] <TB3> INFO: Expecting 2560 events.
[14:35:24.751] <TB3> INFO: 2560 events read in total (292ms).
[14:35:24.751] <TB3> INFO: Test took 1189ms.
[14:35:24.753] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:25.060] <TB3> INFO: Expecting 2560 events.
[14:35:25.944] <TB3> INFO: 2560 events read in total (293ms).
[14:35:25.944] <TB3> INFO: Test took 1191ms.
[14:35:25.946] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:26.252] <TB3> INFO: Expecting 2560 events.
[14:35:27.141] <TB3> INFO: 2560 events read in total (297ms).
[14:35:27.141] <TB3> INFO: Test took 1195ms.
[14:35:27.143] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:27.449] <TB3> INFO: Expecting 2560 events.
[14:35:28.331] <TB3> INFO: 2560 events read in total (290ms).
[14:35:28.332] <TB3> INFO: Test took 1189ms.
[14:35:28.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:28.640] <TB3> INFO: Expecting 2560 events.
[14:35:29.519] <TB3> INFO: 2560 events read in total (288ms).
[14:35:29.519] <TB3> INFO: Test took 1186ms.
[14:35:29.521] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:29.827] <TB3> INFO: Expecting 2560 events.
[14:35:30.707] <TB3> INFO: 2560 events read in total (288ms).
[14:35:30.707] <TB3> INFO: Test took 1186ms.
[14:35:30.709] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:31.015] <TB3> INFO: Expecting 2560 events.
[14:35:31.898] <TB3> INFO: 2560 events read in total (291ms).
[14:35:31.898] <TB3> INFO: Test took 1189ms.
[14:35:31.900] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:32.207] <TB3> INFO: Expecting 2560 events.
[14:35:33.086] <TB3> INFO: 2560 events read in total (287ms).
[14:35:33.086] <TB3> INFO: Test took 1186ms.
[14:35:33.088] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:33.394] <TB3> INFO: Expecting 2560 events.
[14:35:34.277] <TB3> INFO: 2560 events read in total (291ms).
[14:35:34.277] <TB3> INFO: Test took 1189ms.
[14:35:34.279] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:34.585] <TB3> INFO: Expecting 2560 events.
[14:35:35.463] <TB3> INFO: 2560 events read in total (286ms).
[14:35:35.463] <TB3> INFO: Test took 1184ms.
[14:35:35.465] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:35.772] <TB3> INFO: Expecting 2560 events.
[14:35:36.651] <TB3> INFO: 2560 events read in total (288ms).
[14:35:36.651] <TB3> INFO: Test took 1186ms.
[14:35:36.653] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:36.960] <TB3> INFO: Expecting 2560 events.
[14:35:37.842] <TB3> INFO: 2560 events read in total (290ms).
[14:35:37.842] <TB3> INFO: Test took 1189ms.
[14:35:37.844] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:38.151] <TB3> INFO: Expecting 2560 events.
[14:35:39.034] <TB3> INFO: 2560 events read in total (292ms).
[14:35:39.034] <TB3> INFO: Test took 1190ms.
[14:35:39.036] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:39.343] <TB3> INFO: Expecting 2560 events.
[14:35:40.222] <TB3> INFO: 2560 events read in total (288ms).
[14:35:40.222] <TB3> INFO: Test took 1186ms.
[14:35:40.224] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:40.530] <TB3> INFO: Expecting 2560 events.
[14:35:41.414] <TB3> INFO: 2560 events read in total (292ms).
[14:35:41.415] <TB3> INFO: Test took 1191ms.
[14:35:41.417] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:41.723] <TB3> INFO: Expecting 2560 events.
[14:35:42.606] <TB3> INFO: 2560 events read in total (291ms).
[14:35:42.606] <TB3> INFO: Test took 1189ms.
[14:35:42.608] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:42.914] <TB3> INFO: Expecting 2560 events.
[14:35:43.793] <TB3> INFO: 2560 events read in total (287ms).
[14:35:43.793] <TB3> INFO: Test took 1185ms.
[14:35:43.796] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:44.101] <TB3> INFO: Expecting 2560 events.
[14:35:44.981] <TB3> INFO: 2560 events read in total (288ms).
[14:35:44.981] <TB3> INFO: Test took 1186ms.
[14:35:44.983] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:45.290] <TB3> INFO: Expecting 2560 events.
[14:35:46.173] <TB3> INFO: 2560 events read in total (292ms).
[14:35:46.173] <TB3> INFO: Test took 1190ms.
[14:35:46.175] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:46.482] <TB3> INFO: Expecting 2560 events.
[14:35:47.361] <TB3> INFO: 2560 events read in total (288ms).
[14:35:47.361] <TB3> INFO: Test took 1186ms.
[14:35:47.363] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:47.670] <TB3> INFO: Expecting 2560 events.
[14:35:48.553] <TB3> INFO: 2560 events read in total (292ms).
[14:35:48.554] <TB3> INFO: Test took 1191ms.
[14:35:48.556] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:48.862] <TB3> INFO: Expecting 2560 events.
[14:35:49.749] <TB3> INFO: 2560 events read in total (296ms).
[14:35:49.750] <TB3> INFO: Test took 1194ms.
[14:35:49.752] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:50.058] <TB3> INFO: Expecting 2560 events.
[14:35:50.942] <TB3> INFO: 2560 events read in total (292ms).
[14:35:50.942] <TB3> INFO: Test took 1190ms.
[14:35:50.944] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:51.251] <TB3> INFO: Expecting 2560 events.
[14:35:52.138] <TB3> INFO: 2560 events read in total (296ms).
[14:35:52.138] <TB3> INFO: Test took 1194ms.
[14:35:52.140] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:52.447] <TB3> INFO: Expecting 2560 events.
[14:35:53.330] <TB3> INFO: 2560 events read in total (292ms).
[14:35:53.330] <TB3> INFO: Test took 1190ms.
[14:35:53.332] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:53.638] <TB3> INFO: Expecting 2560 events.
[14:35:54.522] <TB3> INFO: 2560 events read in total (292ms).
[14:35:54.522] <TB3> INFO: Test took 1190ms.
[14:35:54.524] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:54.831] <TB3> INFO: Expecting 2560 events.
[14:35:55.710] <TB3> INFO: 2560 events read in total (289ms).
[14:35:55.711] <TB3> INFO: Test took 1187ms.
[14:35:55.713] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:35:56.019] <TB3> INFO: Expecting 2560 events.
[14:35:56.903] <TB3> INFO: 2560 events read in total (292ms).
[14:35:56.903] <TB3> INFO: Test took 1191ms.
[14:35:57.365] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 643 seconds
[14:35:57.365] <TB3> INFO: PH scale (per ROC): 33 33 60 39 57 32 51 41 48 40 52 46 45 45 40 41
[14:35:57.365] <TB3> INFO: PH offset (per ROC): 109 91 124 102 119 96 127 80 113 97 117 106 101 105 105 97
[14:35:57.373] <TB3> INFO: Decoding statistics:
[14:35:57.373] <TB3> INFO: General information:
[14:35:57.373] <TB3> INFO: 16bit words read: 127878
[14:35:57.373] <TB3> INFO: valid events total: 20480
[14:35:57.373] <TB3> INFO: empty events: 17981
[14:35:57.373] <TB3> INFO: valid events with pixels: 2499
[14:35:57.373] <TB3> INFO: valid pixel hits: 2499
[14:35:57.373] <TB3> INFO: Event errors: 0
[14:35:57.373] <TB3> INFO: start marker: 0
[14:35:57.373] <TB3> INFO: stop marker: 0
[14:35:57.373] <TB3> INFO: overflow: 0
[14:35:57.373] <TB3> INFO: invalid 5bit words: 0
[14:35:57.373] <TB3> INFO: invalid XOR eye diagram: 0
[14:35:57.373] <TB3> INFO: frame (failed synchr.): 0
[14:35:57.373] <TB3> INFO: idle data (no TBM trl): 0
[14:35:57.373] <TB3> INFO: no data (only TBM hdr): 0
[14:35:57.373] <TB3> INFO: TBM errors: 0
[14:35:57.373] <TB3> INFO: flawed TBM headers: 0
[14:35:57.373] <TB3> INFO: flawed TBM trailers: 0
[14:35:57.373] <TB3> INFO: event ID mismatches: 0
[14:35:57.373] <TB3> INFO: ROC errors: 0
[14:35:57.373] <TB3> INFO: missing ROC header(s): 0
[14:35:57.373] <TB3> INFO: misplaced readback start: 0
[14:35:57.373] <TB3> INFO: Pixel decoding errors: 0
[14:35:57.373] <TB3> INFO: pixel data incomplete: 0
[14:35:57.373] <TB3> INFO: pixel address: 0
[14:35:57.373] <TB3> INFO: pulse height fill bit: 0
[14:35:57.373] <TB3> INFO: buffer corruption: 0
[14:35:57.750] <TB3> INFO: ######################################################################
[14:35:57.750] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:35:57.750] <TB3> INFO: ######################################################################
[14:35:57.761] <TB3> INFO: scanning low vcal = 10
[14:35:57.992] <TB3> INFO: Expecting 41600 events.
[14:36:01.617] <TB3> INFO: 41600 events read in total (3033ms).
[14:36:01.618] <TB3> INFO: Test took 3857ms.
[14:36:01.619] <TB3> INFO: scanning low vcal = 20
[14:36:01.915] <TB3> INFO: Expecting 41600 events.
[14:36:05.514] <TB3> INFO: 41600 events read in total (3008ms).
[14:36:05.515] <TB3> INFO: Test took 3896ms.
[14:36:05.516] <TB3> INFO: scanning low vcal = 30
[14:36:05.812] <TB3> INFO: Expecting 41600 events.
[14:36:09.501] <TB3> INFO: 41600 events read in total (3098ms).
[14:36:09.502] <TB3> INFO: Test took 3986ms.
[14:36:09.505] <TB3> INFO: scanning low vcal = 40
[14:36:09.786] <TB3> INFO: Expecting 41600 events.
[14:36:13.742] <TB3> INFO: 41600 events read in total (3364ms).
[14:36:13.743] <TB3> INFO: Test took 4238ms.
[14:36:13.747] <TB3> INFO: scanning low vcal = 50
[14:36:14.023] <TB3> INFO: Expecting 41600 events.
[14:36:18.042] <TB3> INFO: 41600 events read in total (3427ms).
[14:36:18.043] <TB3> INFO: Test took 4296ms.
[14:36:18.045] <TB3> INFO: scanning low vcal = 60
[14:36:18.322] <TB3> INFO: Expecting 41600 events.
[14:36:22.314] <TB3> INFO: 41600 events read in total (3401ms).
[14:36:22.315] <TB3> INFO: Test took 4270ms.
[14:36:22.318] <TB3> INFO: scanning low vcal = 70
[14:36:22.608] <TB3> INFO: Expecting 41600 events.
[14:36:26.577] <TB3> INFO: 41600 events read in total (3378ms).
[14:36:26.578] <TB3> INFO: Test took 4260ms.
[14:36:26.581] <TB3> INFO: scanning low vcal = 80
[14:36:26.874] <TB3> INFO: Expecting 41600 events.
[14:36:30.914] <TB3> INFO: 41600 events read in total (3448ms).
[14:36:30.914] <TB3> INFO: Test took 4333ms.
[14:36:30.917] <TB3> INFO: scanning low vcal = 90
[14:36:31.209] <TB3> INFO: Expecting 41600 events.
[14:36:35.225] <TB3> INFO: 41600 events read in total (3424ms).
[14:36:35.226] <TB3> INFO: Test took 4309ms.
[14:36:35.228] <TB3> INFO: scanning low vcal = 100
[14:36:35.522] <TB3> INFO: Expecting 41600 events.
[14:36:39.474] <TB3> INFO: 41600 events read in total (3360ms).
[14:36:39.475] <TB3> INFO: Test took 4247ms.
[14:36:39.477] <TB3> INFO: scanning low vcal = 110
[14:36:39.772] <TB3> INFO: Expecting 41600 events.
[14:36:43.718] <TB3> INFO: 41600 events read in total (3354ms).
[14:36:43.719] <TB3> INFO: Test took 4241ms.
[14:36:43.722] <TB3> INFO: scanning low vcal = 120
[14:36:43.998] <TB3> INFO: Expecting 41600 events.
[14:36:48.011] <TB3> INFO: 41600 events read in total (3421ms).
[14:36:48.011] <TB3> INFO: Test took 4289ms.
[14:36:48.014] <TB3> INFO: scanning low vcal = 130
[14:36:48.291] <TB3> INFO: Expecting 41600 events.
[14:36:52.261] <TB3> INFO: 41600 events read in total (3379ms).
[14:36:52.261] <TB3> INFO: Test took 4247ms.
[14:36:52.264] <TB3> INFO: scanning low vcal = 140
[14:36:52.554] <TB3> INFO: Expecting 41600 events.
[14:36:56.468] <TB3> INFO: 41600 events read in total (3322ms).
[14:36:56.469] <TB3> INFO: Test took 4205ms.
[14:36:56.472] <TB3> INFO: scanning low vcal = 150
[14:36:56.766] <TB3> INFO: Expecting 41600 events.
[14:37:00.731] <TB3> INFO: 41600 events read in total (3374ms).
[14:37:00.732] <TB3> INFO: Test took 4260ms.
[14:37:00.735] <TB3> INFO: scanning low vcal = 160
[14:37:01.030] <TB3> INFO: Expecting 41600 events.
[14:37:05.048] <TB3> INFO: 41600 events read in total (3426ms).
[14:37:05.049] <TB3> INFO: Test took 4314ms.
[14:37:05.052] <TB3> INFO: scanning low vcal = 170
[14:37:05.329] <TB3> INFO: Expecting 41600 events.
[14:37:09.336] <TB3> INFO: 41600 events read in total (3416ms).
[14:37:09.337] <TB3> INFO: Test took 4285ms.
[14:37:09.339] <TB3> INFO: scanning low vcal = 180
[14:37:09.616] <TB3> INFO: Expecting 41600 events.
[14:37:13.613] <TB3> INFO: 41600 events read in total (3405ms).
[14:37:13.613] <TB3> INFO: Test took 4274ms.
[14:37:13.616] <TB3> INFO: scanning low vcal = 190
[14:37:13.893] <TB3> INFO: Expecting 41600 events.
[14:37:17.940] <TB3> INFO: 41600 events read in total (3456ms).
[14:37:17.940] <TB3> INFO: Test took 4324ms.
[14:37:17.943] <TB3> INFO: scanning low vcal = 200
[14:37:18.220] <TB3> INFO: Expecting 41600 events.
[14:37:22.200] <TB3> INFO: 41600 events read in total (3389ms).
[14:37:22.200] <TB3> INFO: Test took 4257ms.
[14:37:22.203] <TB3> INFO: scanning low vcal = 210
[14:37:22.496] <TB3> INFO: Expecting 41600 events.
[14:37:26.497] <TB3> INFO: 41600 events read in total (3409ms).
[14:37:26.498] <TB3> INFO: Test took 4295ms.
[14:37:26.501] <TB3> INFO: scanning low vcal = 220
[14:37:26.777] <TB3> INFO: Expecting 41600 events.
[14:37:30.759] <TB3> INFO: 41600 events read in total (3390ms).
[14:37:30.759] <TB3> INFO: Test took 4258ms.
[14:37:30.762] <TB3> INFO: scanning low vcal = 230
[14:37:31.038] <TB3> INFO: Expecting 41600 events.
[14:37:34.989] <TB3> INFO: 41600 events read in total (3359ms).
[14:37:34.990] <TB3> INFO: Test took 4228ms.
[14:37:34.992] <TB3> INFO: scanning low vcal = 240
[14:37:35.269] <TB3> INFO: Expecting 41600 events.
[14:37:39.321] <TB3> INFO: 41600 events read in total (3461ms).
[14:37:39.322] <TB3> INFO: Test took 4330ms.
[14:37:39.324] <TB3> INFO: scanning low vcal = 250
[14:37:39.620] <TB3> INFO: Expecting 41600 events.
[14:37:43.594] <TB3> INFO: 41600 events read in total (3382ms).
[14:37:43.595] <TB3> INFO: Test took 4271ms.
[14:37:43.598] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:37:43.874] <TB3> INFO: Expecting 41600 events.
[14:37:47.860] <TB3> INFO: 41600 events read in total (3394ms).
[14:37:47.861] <TB3> INFO: Test took 4262ms.
[14:37:47.863] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:37:48.140] <TB3> INFO: Expecting 41600 events.
[14:37:52.123] <TB3> INFO: 41600 events read in total (3392ms).
[14:37:52.124] <TB3> INFO: Test took 4261ms.
[14:37:52.126] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:37:52.403] <TB3> INFO: Expecting 41600 events.
[14:37:56.451] <TB3> INFO: 41600 events read in total (3457ms).
[14:37:56.452] <TB3> INFO: Test took 4326ms.
[14:37:56.454] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:37:56.731] <TB3> INFO: Expecting 41600 events.
[14:38:00.733] <TB3> INFO: 41600 events read in total (3410ms).
[14:38:00.734] <TB3> INFO: Test took 4280ms.
[14:38:00.736] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:38:01.013] <TB3> INFO: Expecting 41600 events.
[14:38:04.975] <TB3> INFO: 41600 events read in total (3370ms).
[14:38:04.976] <TB3> INFO: Test took 4240ms.
[14:38:05.380] <TB3> INFO: PixTestGainPedestal::measure() done
[14:38:37.319] <TB3> INFO: PixTestGainPedestal::fit() done
[14:38:37.319] <TB3> INFO: non-linearity mean: 1.007 0.991 0.985 0.925 0.982 1.044 0.978 0.933 0.973 0.922 0.978 0.951 0.931 0.906 0.933 0.928
[14:38:37.319] <TB3> INFO: non-linearity RMS: 0.203 0.180 0.003 0.109 0.003 0.184 0.007 0.074 0.005 0.139 0.003 0.070 0.099 0.100 0.079 0.060
[14:38:37.319] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[14:38:37.332] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[14:38:37.346] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[14:38:37.359] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[14:38:37.373] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[14:38:37.386] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[14:38:37.400] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[14:38:37.413] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[14:38:37.427] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[14:38:37.446] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[14:38:37.468] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[14:38:37.489] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[14:38:37.511] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[14:38:37.532] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[14:38:37.554] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[14:38:37.576] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[14:38:37.597] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 159 seconds
[14:38:37.597] <TB3> INFO: Decoding statistics:
[14:38:37.597] <TB3> INFO: General information:
[14:38:37.597] <TB3> INFO: 16bit words read: 3320388
[14:38:37.597] <TB3> INFO: valid events total: 332800
[14:38:37.597] <TB3> INFO: empty events: 91
[14:38:37.597] <TB3> INFO: valid events with pixels: 332709
[14:38:37.597] <TB3> INFO: valid pixel hits: 661794
[14:38:37.597] <TB3> INFO: Event errors: 0
[14:38:37.597] <TB3> INFO: start marker: 0
[14:38:37.597] <TB3> INFO: stop marker: 0
[14:38:37.598] <TB3> INFO: overflow: 0
[14:38:37.598] <TB3> INFO: invalid 5bit words: 0
[14:38:37.598] <TB3> INFO: invalid XOR eye diagram: 0
[14:38:37.598] <TB3> INFO: frame (failed synchr.): 0
[14:38:37.598] <TB3> INFO: idle data (no TBM trl): 0
[14:38:37.598] <TB3> INFO: no data (only TBM hdr): 0
[14:38:37.598] <TB3> INFO: TBM errors: 0
[14:38:37.598] <TB3> INFO: flawed TBM headers: 0
[14:38:37.598] <TB3> INFO: flawed TBM trailers: 0
[14:38:37.598] <TB3> INFO: event ID mismatches: 0
[14:38:37.598] <TB3> INFO: ROC errors: 0
[14:38:37.598] <TB3> INFO: missing ROC header(s): 0
[14:38:37.598] <TB3> INFO: misplaced readback start: 0
[14:38:37.598] <TB3> INFO: Pixel decoding errors: 0
[14:38:37.598] <TB3> INFO: pixel data incomplete: 0
[14:38:37.598] <TB3> INFO: pixel address: 0
[14:38:37.598] <TB3> INFO: pulse height fill bit: 0
[14:38:37.598] <TB3> INFO: buffer corruption: 0
[14:38:37.618] <TB3> INFO: Decoding statistics:
[14:38:37.618] <TB3> INFO: General information:
[14:38:37.618] <TB3> INFO: 16bit words read: 3449802
[14:38:37.618] <TB3> INFO: valid events total: 353536
[14:38:37.618] <TB3> INFO: empty events: 18328
[14:38:37.618] <TB3> INFO: valid events with pixels: 335208
[14:38:37.618] <TB3> INFO: valid pixel hits: 664293
[14:38:37.618] <TB3> INFO: Event errors: 0
[14:38:37.618] <TB3> INFO: start marker: 0
[14:38:37.618] <TB3> INFO: stop marker: 0
[14:38:37.618] <TB3> INFO: overflow: 0
[14:38:37.618] <TB3> INFO: invalid 5bit words: 0
[14:38:37.618] <TB3> INFO: invalid XOR eye diagram: 0
[14:38:37.618] <TB3> INFO: frame (failed synchr.): 0
[14:38:37.618] <TB3> INFO: idle data (no TBM trl): 0
[14:38:37.618] <TB3> INFO: no data (only TBM hdr): 0
[14:38:37.618] <TB3> INFO: TBM errors: 0
[14:38:37.618] <TB3> INFO: flawed TBM headers: 0
[14:38:37.618] <TB3> INFO: flawed TBM trailers: 0
[14:38:37.618] <TB3> INFO: event ID mismatches: 0
[14:38:37.618] <TB3> INFO: ROC errors: 0
[14:38:37.618] <TB3> INFO: missing ROC header(s): 0
[14:38:37.618] <TB3> INFO: misplaced readback start: 0
[14:38:37.619] <TB3> INFO: Pixel decoding errors: 0
[14:38:37.619] <TB3> INFO: pixel data incomplete: 0
[14:38:37.619] <TB3> INFO: pixel address: 0
[14:38:37.619] <TB3> INFO: pulse height fill bit: 0
[14:38:37.619] <TB3> INFO: buffer corruption: 0
[14:38:37.619] <TB3> INFO: enter test to run
[14:38:37.619] <TB3> INFO: test: Trim80 no parameter change
[14:38:37.619] <TB3> INFO: running: trim80
[14:38:37.643] <TB3> INFO: ######################################################################
[14:38:37.643] <TB3> INFO: PixTestTrim80::doTest()
[14:38:37.643] <TB3> INFO: ######################################################################
[14:38:37.644] <TB3> INFO: ----------------------------------------------------------------------
[14:38:37.644] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[14:38:37.644] <TB3> INFO: ----------------------------------------------------------------------
[14:38:37.706] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:38:37.706] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:38:37.718] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:38:37.718] <TB3> INFO: run 1 of 1
[14:38:38.013] <TB3> INFO: Expecting 5025280 events.
[14:39:06.506] <TB3> INFO: 676160 events read in total (27902ms).
[14:39:34.640] <TB3> INFO: 1348576 events read in total (56037ms).
[14:40:02.185] <TB3> INFO: 2018824 events read in total (83581ms).
[14:40:29.927] <TB3> INFO: 2687192 events read in total (111323ms).
[14:40:57.450] <TB3> INFO: 3354408 events read in total (138847ms).
[14:41:25.478] <TB3> INFO: 4020840 events read in total (166874ms).
[14:41:53.022] <TB3> INFO: 4685928 events read in total (194418ms).
[14:42:07.209] <TB3> INFO: 5025280 events read in total (208605ms).
[14:42:07.265] <TB3> INFO: Test took 209547ms.
[14:42:27.036] <TB3> INFO: ROC 0 VthrComp = 73
[14:42:27.036] <TB3> INFO: ROC 1 VthrComp = 71
[14:42:27.036] <TB3> INFO: ROC 2 VthrComp = 71
[14:42:27.036] <TB3> INFO: ROC 3 VthrComp = 78
[14:42:27.036] <TB3> INFO: ROC 4 VthrComp = 67
[14:42:27.036] <TB3> INFO: ROC 5 VthrComp = 76
[14:42:27.036] <TB3> INFO: ROC 6 VthrComp = 70
[14:42:27.036] <TB3> INFO: ROC 7 VthrComp = 75
[14:42:27.037] <TB3> INFO: ROC 8 VthrComp = 70
[14:42:27.037] <TB3> INFO: ROC 9 VthrComp = 70
[14:42:27.037] <TB3> INFO: ROC 10 VthrComp = 72
[14:42:27.037] <TB3> INFO: ROC 11 VthrComp = 71
[14:42:27.037] <TB3> INFO: ROC 12 VthrComp = 70
[14:42:27.038] <TB3> INFO: ROC 13 VthrComp = 67
[14:42:27.038] <TB3> INFO: ROC 14 VthrComp = 76
[14:42:27.038] <TB3> INFO: ROC 15 VthrComp = 74
[14:42:27.271] <TB3> INFO: Expecting 41600 events.
[14:42:30.755] <TB3> INFO: 41600 events read in total (2892ms).
[14:42:30.756] <TB3> INFO: Test took 3717ms.
[14:42:30.765] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:42:30.765] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:42:30.774] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:42:30.774] <TB3> INFO: run 1 of 1
[14:42:31.051] <TB3> INFO: Expecting 5025280 events.
[14:42:59.549] <TB3> INFO: 681896 events read in total (27906ms).
[14:43:27.112] <TB3> INFO: 1360352 events read in total (55469ms).
[14:43:54.848] <TB3> INFO: 2036632 events read in total (83205ms).
[14:44:23.029] <TB3> INFO: 2711712 events read in total (111386ms).
[14:44:50.820] <TB3> INFO: 3383320 events read in total (139177ms).
[14:45:18.383] <TB3> INFO: 4053824 events read in total (166740ms).
[14:45:45.369] <TB3> INFO: 4722896 events read in total (193726ms).
[14:45:57.913] <TB3> INFO: 5025280 events read in total (206270ms).
[14:45:57.958] <TB3> INFO: Test took 207184ms.
[14:46:18.654] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 109.303 for pixel 0/65 mean/min/max = 93.1676/76.847/109.488
[14:46:18.655] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 105.61 for pixel 47/79 mean/min/max = 89.7153/73.4729/105.958
[14:46:18.655] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 104.601 for pixel 22/41 mean/min/max = 89.8077/74.5032/105.112
[14:46:18.655] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 109.5 for pixel 0/64 mean/min/max = 93.6303/77.5599/109.701
[14:46:18.656] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 103.826 for pixel 7/37 mean/min/max = 88.8712/73.7298/104.013
[14:46:18.656] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 106.749 for pixel 0/77 mean/min/max = 93.0984/79.4394/106.757
[14:46:18.657] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 104.939 for pixel 0/3 mean/min/max = 89.5378/73.8578/105.218
[14:46:18.657] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 108.008 for pixel 51/79 mean/min/max = 93.5122/78.9822/108.042
[14:46:18.658] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 103.994 for pixel 14/73 mean/min/max = 89.3734/74.3544/104.392
[14:46:18.658] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 103.305 for pixel 7/79 mean/min/max = 89.0584/74.5084/103.608
[14:46:18.658] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 107.971 for pixel 0/71 mean/min/max = 92.5037/76.9976/108.01
[14:46:18.659] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 102.754 for pixel 25/37 mean/min/max = 88.9849/74.6248/103.345
[14:46:18.659] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 106.43 for pixel 13/59 mean/min/max = 90.3437/74.2046/106.483
[14:46:18.660] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 105.876 for pixel 22/75 mean/min/max = 89.6733/73.2741/106.073
[14:46:18.660] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 108.925 for pixel 27/73 mean/min/max = 94.2302/79.4043/109.056
[14:46:18.661] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 109.076 for pixel 21/69 mean/min/max = 93.6471/78.192/109.102
[14:46:18.661] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:46:18.749] <TB3> INFO: Expecting 411648 events.
[14:46:28.286] <TB3> INFO: 411648 events read in total (8945ms).
[14:46:28.296] <TB3> INFO: Expecting 411648 events.
[14:46:37.682] <TB3> INFO: 411648 events read in total (8983ms).
[14:46:37.694] <TB3> INFO: Expecting 411648 events.
[14:46:47.060] <TB3> INFO: 411648 events read in total (8963ms).
[14:46:47.072] <TB3> INFO: Expecting 411648 events.
[14:46:56.452] <TB3> INFO: 411648 events read in total (8977ms).
[14:46:56.466] <TB3> INFO: Expecting 411648 events.
[14:47:05.868] <TB3> INFO: 411648 events read in total (8999ms).
[14:47:05.891] <TB3> INFO: Expecting 411648 events.
[14:47:15.262] <TB3> INFO: 411648 events read in total (8968ms).
[14:47:15.290] <TB3> INFO: Expecting 411648 events.
[14:47:24.710] <TB3> INFO: 411648 events read in total (9017ms).
[14:47:24.742] <TB3> INFO: Expecting 411648 events.
[14:47:34.093] <TB3> INFO: 411648 events read in total (8948ms).
[14:47:34.119] <TB3> INFO: Expecting 411648 events.
[14:47:43.501] <TB3> INFO: 411648 events read in total (8979ms).
[14:47:43.540] <TB3> INFO: Expecting 411648 events.
[14:47:52.779] <TB3> INFO: 411648 events read in total (8836ms).
[14:47:52.824] <TB3> INFO: Expecting 411648 events.
[14:48:02.229] <TB3> INFO: 411648 events read in total (9002ms).
[14:48:02.262] <TB3> INFO: Expecting 411648 events.
[14:48:11.677] <TB3> INFO: 411648 events read in total (9012ms).
[14:48:11.719] <TB3> INFO: Expecting 411648 events.
[14:48:21.059] <TB3> INFO: 411648 events read in total (8937ms).
[14:48:21.111] <TB3> INFO: Expecting 411648 events.
[14:48:30.468] <TB3> INFO: 411648 events read in total (8954ms).
[14:48:30.509] <TB3> INFO: Expecting 411648 events.
[14:48:39.813] <TB3> INFO: 411648 events read in total (8901ms).
[14:48:39.878] <TB3> INFO: Expecting 411648 events.
[14:48:49.033] <TB3> INFO: 411648 events read in total (8752ms).
[14:48:49.102] <TB3> INFO: Test took 150441ms.
[14:48:50.629] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:48:50.639] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:48:50.639] <TB3> INFO: run 1 of 1
[14:48:50.871] <TB3> INFO: Expecting 5025280 events.
[14:49:18.843] <TB3> INFO: 667408 events read in total (27381ms).
[14:49:46.234] <TB3> INFO: 1331584 events read in total (54772ms).
[14:50:13.398] <TB3> INFO: 1994600 events read in total (81936ms).
[14:50:40.545] <TB3> INFO: 2655616 events read in total (109083ms).
[14:51:08.268] <TB3> INFO: 3313120 events read in total (136806ms).
[14:51:35.557] <TB3> INFO: 3968128 events read in total (164095ms).
[14:52:02.540] <TB3> INFO: 4621432 events read in total (191078ms).
[14:52:19.480] <TB3> INFO: 5025280 events read in total (208018ms).
[14:52:19.549] <TB3> INFO: Test took 208909ms.
[14:52:41.750] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 54.703728 .. 144.295901
[14:52:42.042] <TB3> INFO: Expecting 208000 events.
[14:52:51.693] <TB3> INFO: 208000 events read in total (9060ms).
[14:52:51.694] <TB3> INFO: Test took 9943ms.
[14:52:51.741] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 44 .. 154 (-1/-1) hits flags = 528 (plus default)
[14:52:51.751] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:52:51.751] <TB3> INFO: run 1 of 1
[14:52:52.029] <TB3> INFO: Expecting 3694080 events.
[14:53:19.379] <TB3> INFO: 616152 events read in total (26758ms).
[14:53:46.250] <TB3> INFO: 1231864 events read in total (53629ms).
[14:54:13.494] <TB3> INFO: 1845744 events read in total (80873ms).
[14:54:39.798] <TB3> INFO: 2456696 events read in total (107178ms).
[14:55:06.011] <TB3> INFO: 3065056 events read in total (133390ms).
[14:55:32.408] <TB3> INFO: 3672608 events read in total (159787ms).
[14:55:33.682] <TB3> INFO: 3694080 events read in total (161062ms).
[14:55:33.726] <TB3> INFO: Test took 161975ms.
[14:55:55.369] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 62.363235 .. 133.331910
[14:55:55.602] <TB3> INFO: Expecting 208000 events.
[14:56:05.692] <TB3> INFO: 208000 events read in total (9499ms).
[14:56:05.692] <TB3> INFO: Test took 10322ms.
[14:56:05.739] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 52 .. 143 (-1/-1) hits flags = 528 (plus default)
[14:56:05.750] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:56:05.750] <TB3> INFO: run 1 of 1
[14:56:06.027] <TB3> INFO: Expecting 3061760 events.
[14:56:32.572] <TB3> INFO: 608296 events read in total (25953ms).
[14:56:59.070] <TB3> INFO: 1216904 events read in total (52452ms).
[14:57:25.872] <TB3> INFO: 1825408 events read in total (79253ms).
[14:57:52.546] <TB3> INFO: 2433544 events read in total (105927ms).
[14:58:19.123] <TB3> INFO: 3041024 events read in total (132504ms).
[14:58:20.547] <TB3> INFO: 3061760 events read in total (133928ms).
[14:58:20.583] <TB3> INFO: Test took 134833ms.
[14:58:40.622] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 65.031169 .. 125.989641
[14:58:40.884] <TB3> INFO: Expecting 208000 events.
[14:58:51.185] <TB3> INFO: 208000 events read in total (9710ms).
[14:58:51.186] <TB3> INFO: Test took 10562ms.
[14:58:51.233] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 55 .. 135 (-1/-1) hits flags = 528 (plus default)
[14:58:51.242] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:58:51.242] <TB3> INFO: run 1 of 1
[14:58:51.520] <TB3> INFO: Expecting 2695680 events.
[14:59:18.490] <TB3> INFO: 610024 events read in total (26379ms).
[14:59:44.849] <TB3> INFO: 1220064 events read in total (52738ms).
[15:00:11.731] <TB3> INFO: 1830096 events read in total (79620ms).
[15:00:38.481] <TB3> INFO: 2439584 events read in total (106370ms).
[15:00:49.667] <TB3> INFO: 2695680 events read in total (117556ms).
[15:00:49.710] <TB3> INFO: Test took 118468ms.
[15:01:07.889] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 68.355617 .. 88.339507
[15:01:08.177] <TB3> INFO: Expecting 208000 events.
[15:01:18.431] <TB3> INFO: 208000 events read in total (9662ms).
[15:01:18.432] <TB3> INFO: Test took 10542ms.
[15:01:18.509] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 98 (-1/-1) hits flags = 528 (plus default)
[15:01:18.522] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:01:18.522] <TB3> INFO: run 1 of 1
[15:01:18.800] <TB3> INFO: Expecting 1364480 events.
[15:01:47.949] <TB3> INFO: 687712 events read in total (28558ms).
[15:02:15.969] <TB3> INFO: 1364480 events read in total (56578ms).
[15:02:15.990] <TB3> INFO: Test took 57469ms.
[15:02:30.143] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[15:02:30.143] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[15:02:30.153] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[15:02:30.153] <TB3> INFO: run 1 of 1
[15:02:30.385] <TB3> INFO: Expecting 1364480 events.
[15:02:58.702] <TB3> INFO: 668984 events read in total (27726ms).
[15:03:26.772] <TB3> INFO: 1337576 events read in total (55796ms).
[15:03:28.332] <TB3> INFO: 1364480 events read in total (57356ms).
[15:03:28.353] <TB3> INFO: Test took 58200ms.
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C0.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C1.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C2.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C3.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C4.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C5.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C6.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C7.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C8.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C9.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C10.dat
[15:03:42.412] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C11.dat
[15:03:42.413] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C12.dat
[15:03:42.413] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C13.dat
[15:03:42.413] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C14.dat
[15:03:42.413] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//dacParameters80_C15.dat
[15:03:42.413] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C0.dat
[15:03:42.418] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C1.dat
[15:03:42.424] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C2.dat
[15:03:42.429] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C3.dat
[15:03:42.435] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C4.dat
[15:03:42.440] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C5.dat
[15:03:42.446] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C6.dat
[15:03:42.451] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C7.dat
[15:03:42.456] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C8.dat
[15:03:42.462] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C9.dat
[15:03:42.467] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C10.dat
[15:03:42.473] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C11.dat
[15:03:42.478] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C12.dat
[15:03:42.484] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C13.dat
[15:03:42.489] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C14.dat
[15:03:42.495] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1099_FullQualification_2016-10-31_10h37m_1477906653//003_FulltestTrim80_p17//trimParameters80_C15.dat
[15:03:42.500] <TB3> INFO: PixTestTrim80::trimTest() done
[15:03:42.500] <TB3> INFO: vtrim: 115 107 94 110 85 91 99 103 96 87 101 85 101 105 100 122
[15:03:42.500] <TB3> INFO: vthrcomp: 73 71 71 78 67 76 70 75 70 70 72 71 70 67 76 74
[15:03:42.500] <TB3> INFO: vcal mean: 79.94 79.94 79.99 79.99 79.97 79.99 79.94 79.97 80.00 79.94 79.97 79.92 79.96 79.93 79.97 79.97
[15:03:42.500] <TB3> INFO: vcal RMS: 0.72 0.77 0.72 0.73 0.75 0.71 0.72 0.70 0.73 0.71 0.72 0.76 0.79 0.81 1.47 0.77
[15:03:42.500] <TB3> INFO: bits mean: 9.80 10.90 10.63 9.44 10.73 9.18 10.71 9.44 10.72 10.69 9.84 10.74 10.80 10.92 9.06 10.01
[15:03:42.500] <TB3> INFO: bits RMS: 2.17 2.25 2.23 2.32 2.39 2.20 2.28 2.10 2.25 2.23 2.22 2.24 2.16 2.31 2.23 1.95
[15:03:42.506] <TB3> INFO: ----------------------------------------------------------------------
[15:03:42.506] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:03:42.506] <TB3> INFO: ----------------------------------------------------------------------
[15:03:42.509] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:03:42.521] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:03:42.521] <TB3> INFO: run 1 of 1
[15:03:42.814] <TB3> INFO: Expecting 4160000 events.
[15:04:16.075] <TB3> INFO: 755940 events read in total (32669ms).
[15:04:48.298] <TB3> INFO: 1505930 events read in total (64892ms).
[15:05:20.331] <TB3> INFO: 2252145 events read in total (96925ms).
[15:05:52.001] <TB3> INFO: 2993630 events read in total (129595ms).
[15:06:24.876] <TB3> INFO: 3730990 events read in total (161470ms).
[15:06:43.642] <TB3> INFO: 4160000 events read in total (180236ms).
[15:06:43.697] <TB3> INFO: Test took 181176ms.
[15:07:06.255] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[15:07:06.266] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:07:06.266] <TB3> INFO: run 1 of 1
[15:07:06.544] <TB3> INFO: Expecting 4097600 events.
[15:07:39.501] <TB3> INFO: 736895 events read in total (32366ms).
[15:08:11.894] <TB3> INFO: 1468155 events read in total (64759ms).
[15:08:44.148] <TB3> INFO: 2195950 events read in total (97013ms).
[15:09:16.154] <TB3> INFO: 2919075 events read in total (129019ms).
[15:09:47.767] <TB3> INFO: 3638075 events read in total (160632ms).
[15:10:08.330] <TB3> INFO: 4097600 events read in total (181195ms).
[15:10:08.400] <TB3> INFO: Test took 182134ms.
[15:10:30.966] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[15:10:30.976] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:10:30.977] <TB3> INFO: run 1 of 1
[15:10:31.208] <TB3> INFO: Expecting 3806400 events.
[15:11:04.285] <TB3> INFO: 759415 events read in total (32485ms).
[15:11:36.636] <TB3> INFO: 1512165 events read in total (64836ms).
[15:12:09.005] <TB3> INFO: 2260015 events read in total (97205ms).
[15:12:41.026] <TB3> INFO: 3001990 events read in total (129226ms).
[15:13:13.279] <TB3> INFO: 3740665 events read in total (161479ms).
[15:13:16.482] <TB3> INFO: 3806400 events read in total (164682ms).
[15:13:16.538] <TB3> INFO: Test took 165561ms.
[15:13:42.930] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[15:13:42.943] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:13:42.943] <TB3> INFO: run 1 of 1
[15:13:43.264] <TB3> INFO: Expecting 3806400 events.
[15:14:17.119] <TB3> INFO: 759520 events read in total (33263ms).
[15:14:49.297] <TB3> INFO: 1512395 events read in total (65441ms).
[15:15:21.213] <TB3> INFO: 2260680 events read in total (97357ms).
[15:15:53.620] <TB3> INFO: 3002880 events read in total (129764ms).
[15:16:26.261] <TB3> INFO: 3742000 events read in total (162405ms).
[15:16:29.472] <TB3> INFO: 3806400 events read in total (165616ms).
[15:16:29.512] <TB3> INFO: Test took 166570ms.
[15:16:54.384] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[15:16:54.395] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[15:16:54.395] <TB3> INFO: run 1 of 1
[15:16:54.626] <TB3> INFO: Expecting 3806400 events.
[15:17:27.607] <TB3> INFO: 759870 events read in total (32390ms).
[15:17:59.957] <TB3> INFO: 1513305 events read in total (64740ms).
[15:18:32.766] <TB3> INFO: 2261630 events read in total (97549ms).
[15:19:04.918] <TB3> INFO: 3003835 events read in total (129701ms).
[15:19:36.964] <TB3> INFO: 3743120 events read in total (161747ms).
[15:19:39.916] <TB3> INFO: 3806400 events read in total (164699ms).
[15:19:39.957] <TB3> INFO: Test took 165562ms.
[15:20:04.964] <TB3> INFO: PixTestTrim80::trimBitTest() done
[15:20:04.967] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2487 seconds
[15:20:05.624] <TB3> INFO: enter test to run
[15:20:05.624] <TB3> INFO: test: exit no parameter change
[15:20:05.719] <TB3> QUIET: Connection to board 170 closed.
[15:20:05.720] <TB3> INFO: pXar: this is the end, my friend