[19:47:58.708] <TB3> INFO: *** Welcome to pxar ***
[19:47:58.708] <TB3> INFO: *** Today: 2016/10/26
[19:47:58.715] <TB3> INFO: *** Version: c8ba-dirty
[19:47:58.715] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C15.dat
[19:47:58.716] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[19:47:58.716] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//defaultMaskFile.dat
[19:47:58.716] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters_C15.dat
[19:47:58.778] <TB3> INFO: clk: 4
[19:47:58.778] <TB3> INFO: ctr: 4
[19:47:58.778] <TB3> INFO: sda: 19
[19:47:58.778] <TB3> INFO: tin: 9
[19:47:58.778] <TB3> INFO: level: 15
[19:47:58.778] <TB3> INFO: triggerdelay: 0
[19:47:58.778] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[19:47:58.778] <TB3> INFO: Log level: INFO
[19:47:58.787] <TB3> INFO: Found DTB DTB_WWVASW
[19:47:58.796] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[19:47:58.798] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[19:47:58.800] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[19:48:00.301] <TB3> INFO: DUT info:
[19:48:00.301] <TB3> INFO: The DUT currently contains the following objects:
[19:48:00.301] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[19:48:00.301] <TB3> INFO: TBM Core alpha (0): 7 registers set
[19:48:00.301] <TB3> INFO: TBM Core beta (1): 7 registers set
[19:48:00.302] <TB3> INFO: TBM Core alpha (2): 7 registers set
[19:48:00.302] <TB3> INFO: TBM Core beta (3): 7 registers set
[19:48:00.302] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:48:00.302] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.302] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:48:00.704] <TB3> INFO: enter 'restricted' command line mode
[19:48:00.704] <TB3> INFO: enter test to run
[19:48:00.704] <TB3> INFO: test: pretest no parameter change
[19:48:00.704] <TB3> INFO: running: pretest
[19:48:00.712] <TB3> INFO: ######################################################################
[19:48:00.712] <TB3> INFO: PixTestPretest::doTest()
[19:48:00.712] <TB3> INFO: ######################################################################
[19:48:00.713] <TB3> INFO: ----------------------------------------------------------------------
[19:48:00.713] <TB3> INFO: PixTestPretest::programROC()
[19:48:00.713] <TB3> INFO: ----------------------------------------------------------------------
[19:48:18.729] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:48:18.729] <TB3> INFO: IA differences per ROC: 20.1 22.5 18.5 20.1 19.3 20.1 20.1 20.1 18.5 21.7 18.5 20.1 20.1 19.3 19.3 18.5
[19:48:18.792] <TB3> INFO: ----------------------------------------------------------------------
[19:48:18.792] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:48:18.792] <TB3> INFO: ----------------------------------------------------------------------
[19:48:24.995] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 374.6 mA = 23.4125 mA/ROC
[19:48:24.995] <TB3> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 19.3 19.3 19.3 18.5 18.5 19.3 19.3 19.3 19.3 18.5 18.5
[19:48:25.027] <TB3> INFO: ----------------------------------------------------------------------
[19:48:25.027] <TB3> INFO: PixTestPretest::findTiming()
[19:48:25.027] <TB3> INFO: ----------------------------------------------------------------------
[19:48:25.027] <TB3> INFO: PixTestCmd::init()

[19:48:56.868] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:48:56.868] <TB3> INFO: (success/tries = 100/100), width = 3
[19:48:58.383] <TB3> INFO: ----------------------------------------------------------------------
[19:48:58.383] <TB3> INFO: PixTestPretest::findWorkingPixel()
[19:48:58.383] <TB3> INFO: ----------------------------------------------------------------------
[19:48:58.476] <TB3> INFO: Expecting 231680 events.
[19:49:08.339] <TB3> INFO: 231680 events read in total (9271ms).
[19:49:08.349] <TB3> INFO: Test took 9962ms.
[19:49:08.593] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:49:08.629] <TB3> INFO: ----------------------------------------------------------------------
[19:49:08.629] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[19:49:08.629] <TB3> INFO: ----------------------------------------------------------------------
[19:49:08.723] <TB3> INFO: Expecting 231680 events.
[19:49:18.687] <TB3> INFO: 231680 events read in total (9372ms).
[19:49:18.696] <TB3> INFO: Test took 10062ms.
[19:49:18.963] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[19:49:18.963] <TB3> INFO: CalDel: 73 89 75 77 92 82 73 86 85 80 67 97 98 100 87 72
[19:49:18.963] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[19:49:18.967] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C0.dat
[19:49:18.967] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C1.dat
[19:49:18.967] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C2.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C3.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C4.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C5.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C6.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C7.dat
[19:49:18.968] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C8.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C9.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C10.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C11.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C12.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C13.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C14.dat
[19:49:18.969] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters_C15.dat
[19:49:18.970] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[19:49:18.970] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[19:49:18.970] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[19:49:18.970] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[19:49:18.970] <TB3> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[19:49:19.042] <TB3> INFO: enter test to run
[19:49:19.042] <TB3> INFO: test: fulltest no parameter change
[19:49:19.042] <TB3> INFO: running: fulltest
[19:49:19.042] <TB3> INFO: ######################################################################
[19:49:19.042] <TB3> INFO: PixTestFullTest::doTest()
[19:49:19.042] <TB3> INFO: ######################################################################
[19:49:19.043] <TB3> INFO: ######################################################################
[19:49:19.043] <TB3> INFO: PixTestAlive::doTest()
[19:49:19.043] <TB3> INFO: ######################################################################
[19:49:19.045] <TB3> INFO: ----------------------------------------------------------------------
[19:49:19.045] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:49:19.045] <TB3> INFO: ----------------------------------------------------------------------
[19:49:19.282] <TB3> INFO: Expecting 41600 events.
[19:49:22.822] <TB3> INFO: 41600 events read in total (2948ms).
[19:49:22.824] <TB3> INFO: Test took 3778ms.
[19:49:23.056] <TB3> INFO: PixTestAlive::aliveTest() done
[19:49:23.056] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:49:23.058] <TB3> INFO: ----------------------------------------------------------------------
[19:49:23.058] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:49:23.058] <TB3> INFO: ----------------------------------------------------------------------
[19:49:23.301] <TB3> INFO: Expecting 41600 events.
[19:49:26.293] <TB3> INFO: 41600 events read in total (2400ms).
[19:49:26.293] <TB3> INFO: Test took 3233ms.
[19:49:26.294] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:49:26.535] <TB3> INFO: PixTestAlive::maskTest() done
[19:49:26.535] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:49:26.536] <TB3> INFO: ----------------------------------------------------------------------
[19:49:26.536] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:49:26.536] <TB3> INFO: ----------------------------------------------------------------------
[19:49:26.779] <TB3> INFO: Expecting 41600 events.
[19:49:30.508] <TB3> INFO: 41600 events read in total (3137ms).
[19:49:30.509] <TB3> INFO: Test took 3970ms.
[19:49:30.746] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[19:49:30.746] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:49:30.746] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:49:30.746] <TB3> INFO: Decoding statistics:
[19:49:30.746] <TB3> INFO: General information:
[19:49:30.746] <TB3> INFO: 16bit words read: 0
[19:49:30.746] <TB3> INFO: valid events total: 0
[19:49:30.746] <TB3> INFO: empty events: 0
[19:49:30.746] <TB3> INFO: valid events with pixels: 0
[19:49:30.746] <TB3> INFO: valid pixel hits: 0
[19:49:30.746] <TB3> INFO: Event errors: 0
[19:49:30.746] <TB3> INFO: start marker: 0
[19:49:30.746] <TB3> INFO: stop marker: 0
[19:49:30.746] <TB3> INFO: overflow: 0
[19:49:30.746] <TB3> INFO: invalid 5bit words: 0
[19:49:30.747] <TB3> INFO: invalid XOR eye diagram: 0
[19:49:30.747] <TB3> INFO: frame (failed synchr.): 0
[19:49:30.747] <TB3> INFO: idle data (no TBM trl): 0
[19:49:30.747] <TB3> INFO: no data (only TBM hdr): 0
[19:49:30.747] <TB3> INFO: TBM errors: 0
[19:49:30.747] <TB3> INFO: flawed TBM headers: 0
[19:49:30.747] <TB3> INFO: flawed TBM trailers: 0
[19:49:30.747] <TB3> INFO: event ID mismatches: 0
[19:49:30.747] <TB3> INFO: ROC errors: 0
[19:49:30.747] <TB3> INFO: missing ROC header(s): 0
[19:49:30.747] <TB3> INFO: misplaced readback start: 0
[19:49:30.747] <TB3> INFO: Pixel decoding errors: 0
[19:49:30.747] <TB3> INFO: pixel data incomplete: 0
[19:49:30.747] <TB3> INFO: pixel address: 0
[19:49:30.747] <TB3> INFO: pulse height fill bit: 0
[19:49:30.747] <TB3> INFO: buffer corruption: 0
[19:49:30.753] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:49:30.754] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[19:49:30.754] <TB3> INFO: ######################################################################
[19:49:30.754] <TB3> INFO: PixTestReadback::doTest()
[19:49:30.754] <TB3> INFO: ######################################################################
[19:49:30.754] <TB3> INFO: ----------------------------------------------------------------------
[19:49:30.754] <TB3> INFO: PixTestReadback::CalibrateVd()
[19:49:30.754] <TB3> INFO: ----------------------------------------------------------------------
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:49:40.744] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:49:40.745] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:49:40.746] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:49:40.779] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[19:49:40.779] <TB3> INFO: ----------------------------------------------------------------------
[19:49:40.780] <TB3> INFO: PixTestReadback::CalibrateVa()
[19:49:40.780] <TB3> INFO: ----------------------------------------------------------------------
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:49:50.715] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:49:50.716] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:49:50.716] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:49:50.716] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:49:50.716] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:49:50.746] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[19:49:50.746] <TB3> INFO: ----------------------------------------------------------------------
[19:49:50.746] <TB3> INFO: PixTestReadback::readbackVbg()
[19:49:50.746] <TB3> INFO: ----------------------------------------------------------------------
[19:49:58.417] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[19:49:58.417] <TB3> INFO: ----------------------------------------------------------------------
[19:49:58.417] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[19:49:58.417] <TB3> INFO: ----------------------------------------------------------------------
[19:49:58.417] <TB3> INFO: Vbg will be calibrated using Vd calibration
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.8calibrated Vbg = 1.20656 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.4calibrated Vbg = 1.21125 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.2calibrated Vbg = 1.21302 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.9calibrated Vbg = 1.20853 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.3calibrated Vbg = 1.21448 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 169.5calibrated Vbg = 1.21469 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155calibrated Vbg = 1.2145 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 156.8calibrated Vbg = 1.21235 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.9calibrated Vbg = 1.20318 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.9calibrated Vbg = 1.20658 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 157.5calibrated Vbg = 1.20589 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.5calibrated Vbg = 1.19408 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.9calibrated Vbg = 1.20499 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 146.8calibrated Vbg = 1.2038 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 149calibrated Vbg = 1.20459 :::*/*/*/*/
[19:49:58.417] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160calibrated Vbg = 1.20879 :::*/*/*/*/
[19:49:58.420] <TB3> INFO: ----------------------------------------------------------------------
[19:49:58.420] <TB3> INFO: PixTestReadback::CalibrateIa()
[19:49:58.420] <TB3> INFO: ----------------------------------------------------------------------
[19:52:39.223] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:52:39.223] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:52:39.223] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:52:39.223] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:52:39.223] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:52:39.224] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:52:39.254] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[19:52:39.255] <TB3> INFO: PixTestReadback::doTest() done
[19:52:39.255] <TB3> INFO: Decoding statistics:
[19:52:39.255] <TB3> INFO: General information:
[19:52:39.255] <TB3> INFO: 16bit words read: 1536
[19:52:39.255] <TB3> INFO: valid events total: 256
[19:52:39.255] <TB3> INFO: empty events: 256
[19:52:39.255] <TB3> INFO: valid events with pixels: 0
[19:52:39.255] <TB3> INFO: valid pixel hits: 0
[19:52:39.255] <TB3> INFO: Event errors: 0
[19:52:39.255] <TB3> INFO: start marker: 0
[19:52:39.255] <TB3> INFO: stop marker: 0
[19:52:39.255] <TB3> INFO: overflow: 0
[19:52:39.255] <TB3> INFO: invalid 5bit words: 0
[19:52:39.255] <TB3> INFO: invalid XOR eye diagram: 0
[19:52:39.255] <TB3> INFO: frame (failed synchr.): 0
[19:52:39.255] <TB3> INFO: idle data (no TBM trl): 0
[19:52:39.255] <TB3> INFO: no data (only TBM hdr): 0
[19:52:39.255] <TB3> INFO: TBM errors: 0
[19:52:39.255] <TB3> INFO: flawed TBM headers: 0
[19:52:39.255] <TB3> INFO: flawed TBM trailers: 0
[19:52:39.255] <TB3> INFO: event ID mismatches: 0
[19:52:39.255] <TB3> INFO: ROC errors: 0
[19:52:39.255] <TB3> INFO: missing ROC header(s): 0
[19:52:39.255] <TB3> INFO: misplaced readback start: 0
[19:52:39.255] <TB3> INFO: Pixel decoding errors: 0
[19:52:39.255] <TB3> INFO: pixel data incomplete: 0
[19:52:39.255] <TB3> INFO: pixel address: 0
[19:52:39.255] <TB3> INFO: pulse height fill bit: 0
[19:52:39.255] <TB3> INFO: buffer corruption: 0
[19:52:39.309] <TB3> INFO: ######################################################################
[19:52:39.309] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:52:39.309] <TB3> INFO: ######################################################################
[19:52:39.313] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:52:39.327] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[19:52:39.327] <TB3> INFO: run 1 of 1
[19:52:39.577] <TB3> INFO: Expecting 3120000 events.
[19:53:10.109] <TB3> INFO: 658465 events read in total (29940ms).











[19:53:40.127] <TB3> INFO: 1310550 events read in total (59958ms).











[19:54:10.023] <TB3> INFO: 1958780 events read in total (89854ms).











[19:54:39.631] <TB3> INFO: 2610990 events read in total (119462ms).





















[19:55:03.821] <TB3> INFO: 3120000 events read in total (143652ms).
[19:55:03.901] <TB3> INFO: Test took 144575ms.
[19:55:28.016] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 168 seconds
[19:55:28.016] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[19:55:28.016] <TB3> INFO: separation cut (per ROC): 111 108 97 102 106 104 92 98 106 105 99 95 102 107 105 105
[19:55:28.016] <TB3> INFO: Decoding statistics:
[19:55:28.016] <TB3> INFO: General information:
[19:55:28.016] <TB3> INFO: 16bit words read: 0
[19:55:28.016] <TB3> INFO: valid events total: 0
[19:55:28.016] <TB3> INFO: empty events: 0
[19:55:28.016] <TB3> INFO: valid events with pixels: 0
[19:55:28.016] <TB3> INFO: valid pixel hits: 0
[19:55:28.016] <TB3> INFO: Event errors: 0
[19:55:28.016] <TB3> INFO: start marker: 0
[19:55:28.016] <TB3> INFO: stop marker: 0
[19:55:28.016] <TB3> INFO: overflow: 0
[19:55:28.016] <TB3> INFO: invalid 5bit words: 0
[19:55:28.016] <TB3> INFO: invalid XOR eye diagram: 0
[19:55:28.016] <TB3> INFO: frame (failed synchr.): 0
[19:55:28.016] <TB3> INFO: idle data (no TBM trl): 0
[19:55:28.016] <TB3> INFO: no data (only TBM hdr): 0
[19:55:28.016] <TB3> INFO: TBM errors: 0
[19:55:28.016] <TB3> INFO: flawed TBM headers: 0
[19:55:28.016] <TB3> INFO: flawed TBM trailers: 0
[19:55:28.016] <TB3> INFO: event ID mismatches: 0
[19:55:28.016] <TB3> INFO: ROC errors: 0
[19:55:28.016] <TB3> INFO: missing ROC header(s): 0
[19:55:28.016] <TB3> INFO: misplaced readback start: 0
[19:55:28.016] <TB3> INFO: Pixel decoding errors: 0
[19:55:28.017] <TB3> INFO: pixel data incomplete: 0
[19:55:28.017] <TB3> INFO: pixel address: 0
[19:55:28.017] <TB3> INFO: pulse height fill bit: 0
[19:55:28.017] <TB3> INFO: buffer corruption: 0
[19:55:28.053] <TB3> INFO: ######################################################################
[19:55:28.053] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:55:28.053] <TB3> INFO: ######################################################################
[19:55:28.053] <TB3> INFO: ----------------------------------------------------------------------
[19:55:28.053] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:55:28.053] <TB3> INFO: ----------------------------------------------------------------------
[19:55:28.054] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:55:28.067] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[19:55:28.067] <TB3> INFO: run 1 of 1
[19:55:28.309] <TB3> INFO: Expecting 36608000 events.
[19:55:51.644] <TB3> INFO: 675050 events read in total (22743ms).
[19:56:14.310] <TB3> INFO: 1336600 events read in total (45409ms).
[19:56:36.884] <TB3> INFO: 1998500 events read in total (67983ms).
[19:56:59.686] <TB3> INFO: 2659350 events read in total (90785ms).
[19:57:22.333] <TB3> INFO: 3320250 events read in total (113432ms).
[19:57:45.101] <TB3> INFO: 3979800 events read in total (136200ms).
[19:58:07.980] <TB3> INFO: 4638000 events read in total (159079ms).
[19:58:30.521] <TB3> INFO: 5298250 events read in total (181620ms).
[19:58:53.130] <TB3> INFO: 5957250 events read in total (204229ms).
[19:59:16.035] <TB3> INFO: 6616550 events read in total (227134ms).
[19:59:38.509] <TB3> INFO: 7276950 events read in total (249608ms).
[20:00:01.053] <TB3> INFO: 7935700 events read in total (272152ms).
[20:00:23.750] <TB3> INFO: 8596050 events read in total (294849ms).
[20:00:46.311] <TB3> INFO: 9256600 events read in total (317410ms).
[20:01:08.937] <TB3> INFO: 9917650 events read in total (340036ms).
[20:01:31.434] <TB3> INFO: 10577900 events read in total (362533ms).
[20:01:54.007] <TB3> INFO: 11236900 events read in total (385106ms).
[20:02:16.711] <TB3> INFO: 11894800 events read in total (407810ms).
[20:02:39.162] <TB3> INFO: 12553000 events read in total (430261ms).
[20:03:01.656] <TB3> INFO: 13212200 events read in total (452755ms).
[20:03:24.309] <TB3> INFO: 13871300 events read in total (475408ms).
[20:03:47.126] <TB3> INFO: 14529900 events read in total (498225ms).
[20:04:09.910] <TB3> INFO: 15187750 events read in total (521009ms).
[20:04:32.493] <TB3> INFO: 15846450 events read in total (543592ms).
[20:04:55.247] <TB3> INFO: 16504700 events read in total (566346ms).
[20:05:18.186] <TB3> INFO: 17160600 events read in total (589285ms).
[20:05:41.040] <TB3> INFO: 17818300 events read in total (612140ms).
[20:06:03.673] <TB3> INFO: 18475950 events read in total (634772ms).
[20:06:26.108] <TB3> INFO: 19130050 events read in total (657207ms).
[20:06:48.820] <TB3> INFO: 19784950 events read in total (679919ms).
[20:07:11.280] <TB3> INFO: 20440250 events read in total (702379ms).
[20:07:33.643] <TB3> INFO: 21095050 events read in total (724742ms).
[20:07:56.291] <TB3> INFO: 21750700 events read in total (747390ms).
[20:08:18.865] <TB3> INFO: 22405500 events read in total (769964ms).
[20:08:41.601] <TB3> INFO: 23061700 events read in total (792700ms).
[20:09:04.285] <TB3> INFO: 23715250 events read in total (815384ms).
[20:09:26.954] <TB3> INFO: 24369750 events read in total (838053ms).
[20:09:49.646] <TB3> INFO: 25024400 events read in total (860745ms).
[20:10:12.336] <TB3> INFO: 25677700 events read in total (883435ms).
[20:10:34.894] <TB3> INFO: 26329150 events read in total (905993ms).
[20:10:57.401] <TB3> INFO: 26983450 events read in total (928500ms).
[20:11:19.911] <TB3> INFO: 27636250 events read in total (951010ms).
[20:11:42.691] <TB3> INFO: 28287850 events read in total (973790ms).
[20:12:05.275] <TB3> INFO: 28939550 events read in total (996374ms).
[20:12:27.877] <TB3> INFO: 29591850 events read in total (1018976ms).
[20:12:50.535] <TB3> INFO: 30242350 events read in total (1041634ms).
[20:13:13.023] <TB3> INFO: 30893450 events read in total (1064122ms).
[20:13:35.742] <TB3> INFO: 31542950 events read in total (1086841ms).
[20:13:58.212] <TB3> INFO: 32193400 events read in total (1109311ms).
[20:14:20.835] <TB3> INFO: 32843750 events read in total (1131934ms).
[20:14:43.507] <TB3> INFO: 33495100 events read in total (1154606ms).
[20:15:06.481] <TB3> INFO: 34148650 events read in total (1177580ms).
[20:15:29.312] <TB3> INFO: 34800400 events read in total (1200411ms).
[20:15:51.783] <TB3> INFO: 35452800 events read in total (1222882ms).
[20:16:14.846] <TB3> INFO: 36111000 events read in total (1245945ms).
[20:16:32.297] <TB3> INFO: 36608000 events read in total (1263396ms).
[20:16:32.358] <TB3> INFO: Test took 1264291ms.
[20:16:32.793] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:34.233] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:35.704] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:37.131] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:38.594] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:40.110] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:41.823] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:43.372] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:44.781] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:46.669] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:48.592] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:50.478] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:52.050] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:53.467] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:54.863] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:56.591] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[20:16:58.376] <TB3> INFO: PixTestScurves::scurves() done
[20:16:58.376] <TB3> INFO: Vcal mean: 118.65 116.56 113.20 114.18 121.57 121.17 117.04 119.57 110.57 112.64 105.14 110.93 120.73 117.61 115.92 115.12
[20:16:58.376] <TB3> INFO: Vcal RMS: 5.47 5.60 5.19 6.15 6.45 8.72 5.18 7.39 4.72 5.58 5.22 4.66 5.62 5.57 5.11 5.30
[20:16:58.376] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1290 seconds
[20:16:58.376] <TB3> INFO: Decoding statistics:
[20:16:58.376] <TB3> INFO: General information:
[20:16:58.376] <TB3> INFO: 16bit words read: 0
[20:16:58.376] <TB3> INFO: valid events total: 0
[20:16:58.376] <TB3> INFO: empty events: 0
[20:16:58.376] <TB3> INFO: valid events with pixels: 0
[20:16:58.376] <TB3> INFO: valid pixel hits: 0
[20:16:58.376] <TB3> INFO: Event errors: 0
[20:16:58.376] <TB3> INFO: start marker: 0
[20:16:58.376] <TB3> INFO: stop marker: 0
[20:16:58.376] <TB3> INFO: overflow: 0
[20:16:58.376] <TB3> INFO: invalid 5bit words: 0
[20:16:58.376] <TB3> INFO: invalid XOR eye diagram: 0
[20:16:58.376] <TB3> INFO: frame (failed synchr.): 0
[20:16:58.376] <TB3> INFO: idle data (no TBM trl): 0
[20:16:58.376] <TB3> INFO: no data (only TBM hdr): 0
[20:16:58.376] <TB3> INFO: TBM errors: 0
[20:16:58.376] <TB3> INFO: flawed TBM headers: 0
[20:16:58.376] <TB3> INFO: flawed TBM trailers: 0
[20:16:58.376] <TB3> INFO: event ID mismatches: 0
[20:16:58.376] <TB3> INFO: ROC errors: 0
[20:16:58.376] <TB3> INFO: missing ROC header(s): 0
[20:16:58.376] <TB3> INFO: misplaced readback start: 0
[20:16:58.376] <TB3> INFO: Pixel decoding errors: 0
[20:16:58.376] <TB3> INFO: pixel data incomplete: 0
[20:16:58.376] <TB3> INFO: pixel address: 0
[20:16:58.376] <TB3> INFO: pulse height fill bit: 0
[20:16:58.376] <TB3> INFO: buffer corruption: 0
[20:16:58.442] <TB3> INFO: ######################################################################
[20:16:58.442] <TB3> INFO: PixTestTrim::doTest()
[20:16:58.442] <TB3> INFO: ######################################################################
[20:16:58.443] <TB3> INFO: ----------------------------------------------------------------------
[20:16:58.443] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[20:16:58.443] <TB3> INFO: ----------------------------------------------------------------------
[20:16:58.497] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:16:58.497] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:16:58.511] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:16:58.511] <TB3> INFO: run 1 of 1
[20:16:58.749] <TB3> INFO: Expecting 5025280 events.
[20:17:29.220] <TB3> INFO: 824896 events read in total (29869ms).
[20:17:59.227] <TB3> INFO: 1647624 events read in total (59876ms).
[20:18:29.039] <TB3> INFO: 2467856 events read in total (89688ms).
[20:18:59.513] <TB3> INFO: 3285008 events read in total (120162ms).
[20:19:29.269] <TB3> INFO: 4097904 events read in total (149918ms).
[20:20:00.883] <TB3> INFO: 4908848 events read in total (181532ms).
[20:20:05.410] <TB3> INFO: 5025280 events read in total (186059ms).
[20:20:05.461] <TB3> INFO: Test took 186950ms.
[20:20:22.260] <TB3> INFO: ROC 0 VthrComp = 128
[20:20:22.261] <TB3> INFO: ROC 1 VthrComp = 125
[20:20:22.261] <TB3> INFO: ROC 2 VthrComp = 113
[20:20:22.261] <TB3> INFO: ROC 3 VthrComp = 118
[20:20:22.261] <TB3> INFO: ROC 4 VthrComp = 121
[20:20:22.261] <TB3> INFO: ROC 5 VthrComp = 119
[20:20:22.261] <TB3> INFO: ROC 6 VthrComp = 113
[20:20:22.261] <TB3> INFO: ROC 7 VthrComp = 111
[20:20:22.261] <TB3> INFO: ROC 8 VthrComp = 113
[20:20:22.261] <TB3> INFO: ROC 9 VthrComp = 114
[20:20:22.262] <TB3> INFO: ROC 10 VthrComp = 107
[20:20:22.262] <TB3> INFO: ROC 11 VthrComp = 109
[20:20:22.262] <TB3> INFO: ROC 12 VthrComp = 118
[20:20:22.262] <TB3> INFO: ROC 13 VthrComp = 118
[20:20:22.262] <TB3> INFO: ROC 14 VthrComp = 117
[20:20:22.262] <TB3> INFO: ROC 15 VthrComp = 113
[20:20:22.530] <TB3> INFO: Expecting 41600 events.
[20:20:26.076] <TB3> INFO: 41600 events read in total (2954ms).
[20:20:26.077] <TB3> INFO: Test took 3813ms.
[20:20:26.086] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:20:26.086] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:20:26.098] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:20:26.098] <TB3> INFO: run 1 of 1
[20:20:26.376] <TB3> INFO: Expecting 5025280 events.
[20:20:52.933] <TB3> INFO: 591968 events read in total (25965ms).
[20:21:18.650] <TB3> INFO: 1181848 events read in total (51682ms).
[20:21:44.490] <TB3> INFO: 1771304 events read in total (77522ms).
[20:22:09.974] <TB3> INFO: 2359864 events read in total (103006ms).
[20:22:35.605] <TB3> INFO: 2946040 events read in total (128637ms).
[20:23:01.851] <TB3> INFO: 3530872 events read in total (154883ms).
[20:23:27.707] <TB3> INFO: 4114632 events read in total (180739ms).
[20:23:53.847] <TB3> INFO: 4698000 events read in total (206879ms).
[20:24:08.828] <TB3> INFO: 5025280 events read in total (221860ms).
[20:24:08.898] <TB3> INFO: Test took 222800ms.
[20:24:32.519] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.7219 for pixel 31/69 mean/min/max = 45.0539/32.375/57.7328
[20:24:32.520] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.6854 for pixel 10/52 mean/min/max = 45.1909/32.4847/57.8971
[20:24:32.520] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 60.1268 for pixel 16/78 mean/min/max = 46.8698/33.516/60.2237
[20:24:32.521] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.0472 for pixel 16/74 mean/min/max = 46.7202/32.308/61.1323
[20:24:32.521] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.7503 for pixel 6/71 mean/min/max = 47.3023/33.6679/60.9367
[20:24:32.522] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 64.3234 for pixel 1/77 mean/min/max = 47.0865/29.794/64.3789
[20:24:32.522] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.0726 for pixel 48/72 mean/min/max = 47.1707/34.2264/60.1151
[20:24:32.522] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 68.0205 for pixel 0/65 mean/min/max = 51.1776/34.1177/68.2375
[20:24:32.523] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.0519 for pixel 3/0 mean/min/max = 45.9503/33.8261/58.0744
[20:24:32.523] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.6927 for pixel 16/2 mean/min/max = 46.9015/32.0913/61.7117
[20:24:32.524] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.8453 for pixel 9/79 mean/min/max = 47.4444/34.988/59.9008
[20:24:32.524] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.9675 for pixel 20/77 mean/min/max = 47.8806/35.6604/60.1008
[20:24:32.525] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.6633 for pixel 4/19 mean/min/max = 46.4413/33.1612/59.7215
[20:24:32.525] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 58.6225 for pixel 0/16 mean/min/max = 45.6194/32.4942/58.7447
[20:24:32.525] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.0282 for pixel 13/63 mean/min/max = 45.6137/33.1373/58.0901
[20:24:32.526] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.7585 for pixel 0/16 mean/min/max = 47.0943/33.4119/60.7767
[20:24:32.526] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:24:32.615] <TB3> INFO: Expecting 411648 events.
[20:24:42.261] <TB3> INFO: 411648 events read in total (9054ms).
[20:24:42.269] <TB3> INFO: Expecting 411648 events.
[20:24:51.770] <TB3> INFO: 411648 events read in total (9097ms).
[20:24:51.781] <TB3> INFO: Expecting 411648 events.
[20:25:01.299] <TB3> INFO: 411648 events read in total (9115ms).
[20:25:01.312] <TB3> INFO: Expecting 411648 events.
[20:25:10.902] <TB3> INFO: 411648 events read in total (9187ms).
[20:25:10.923] <TB3> INFO: Expecting 411648 events.
[20:25:20.425] <TB3> INFO: 411648 events read in total (9099ms).
[20:25:20.444] <TB3> INFO: Expecting 411648 events.
[20:25:29.952] <TB3> INFO: 411648 events read in total (9105ms).
[20:25:29.974] <TB3> INFO: Expecting 411648 events.
[20:25:39.502] <TB3> INFO: 411648 events read in total (9124ms).
[20:25:39.527] <TB3> INFO: Expecting 411648 events.
[20:25:48.906] <TB3> INFO: 411648 events read in total (8976ms).
[20:25:48.935] <TB3> INFO: Expecting 411648 events.
[20:25:58.411] <TB3> INFO: 411648 events read in total (9073ms).
[20:25:58.441] <TB3> INFO: Expecting 411648 events.
[20:26:07.891] <TB3> INFO: 411648 events read in total (9047ms).
[20:26:07.925] <TB3> INFO: Expecting 411648 events.
[20:26:17.390] <TB3> INFO: 411648 events read in total (9062ms).
[20:26:17.426] <TB3> INFO: Expecting 411648 events.
[20:26:26.797] <TB3> INFO: 411648 events read in total (8968ms).
[20:26:26.836] <TB3> INFO: Expecting 411648 events.
[20:26:36.211] <TB3> INFO: 411648 events read in total (8972ms).
[20:26:36.257] <TB3> INFO: Expecting 411648 events.
[20:26:45.731] <TB3> INFO: 411648 events read in total (9071ms).
[20:26:45.774] <TB3> INFO: Expecting 411648 events.
[20:26:54.967] <TB3> INFO: 411648 events read in total (8790ms).
[20:26:55.021] <TB3> INFO: Expecting 411648 events.
[20:27:04.229] <TB3> INFO: 411648 events read in total (8805ms).
[20:27:04.314] <TB3> INFO: Test took 151788ms.
[20:27:05.063] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:27:05.076] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:27:05.076] <TB3> INFO: run 1 of 1
[20:27:05.313] <TB3> INFO: Expecting 5025280 events.
[20:27:31.705] <TB3> INFO: 586024 events read in total (25801ms).
[20:27:57.807] <TB3> INFO: 1171120 events read in total (51903ms).
[20:28:24.079] <TB3> INFO: 1757992 events read in total (78175ms).
[20:28:50.643] <TB3> INFO: 2344520 events read in total (104739ms).
[20:29:17.047] <TB3> INFO: 2931840 events read in total (131143ms).
[20:29:43.878] <TB3> INFO: 3518544 events read in total (157974ms).
[20:30:10.357] <TB3> INFO: 4104784 events read in total (184453ms).
[20:30:36.797] <TB3> INFO: 4689512 events read in total (210893ms).
[20:30:52.563] <TB3> INFO: 5025280 events read in total (226659ms).
[20:30:52.772] <TB3> INFO: Test took 227695ms.
[20:31:17.107] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 7.231637 .. 145.610858
[20:31:17.385] <TB3> INFO: Expecting 208000 events.
[20:31:26.984] <TB3> INFO: 208000 events read in total (9007ms).
[20:31:26.986] <TB3> INFO: Test took 9878ms.
[20:31:27.034] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 7 .. 155 (-1/-1) hits flags = 528 (plus default)
[20:31:27.047] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:31:27.047] <TB3> INFO: run 1 of 1
[20:31:27.325] <TB3> INFO: Expecting 4958720 events.
[20:31:53.393] <TB3> INFO: 577128 events read in total (25476ms).
[20:32:19.416] <TB3> INFO: 1153520 events read in total (51499ms).
[20:32:44.881] <TB3> INFO: 1730208 events read in total (76964ms).
[20:33:10.590] <TB3> INFO: 2307184 events read in total (102674ms).
[20:33:36.338] <TB3> INFO: 2883776 events read in total (128421ms).
[20:34:01.548] <TB3> INFO: 3460024 events read in total (153631ms).
[20:34:27.567] <TB3> INFO: 4035104 events read in total (179651ms).
[20:34:53.864] <TB3> INFO: 4610120 events read in total (205947ms).
[20:35:10.165] <TB3> INFO: 4958720 events read in total (222248ms).
[20:35:10.292] <TB3> INFO: Test took 223245ms.
[20:35:35.924] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.558272 .. 46.732014
[20:35:36.187] <TB3> INFO: Expecting 208000 events.
[20:35:46.202] <TB3> INFO: 208000 events read in total (9423ms).
[20:35:46.203] <TB3> INFO: Test took 10278ms.
[20:35:46.251] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[20:35:46.265] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:35:46.265] <TB3> INFO: run 1 of 1
[20:35:46.566] <TB3> INFO: Expecting 1331200 events.
[20:36:15.207] <TB3> INFO: 657480 events read in total (28049ms).
[20:36:42.923] <TB3> INFO: 1313264 events read in total (55766ms).
[20:36:44.115] <TB3> INFO: 1331200 events read in total (56958ms).
[20:36:44.145] <TB3> INFO: Test took 57881ms.
[20:36:57.702] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.195470 .. 47.442077
[20:36:57.970] <TB3> INFO: Expecting 208000 events.
[20:37:07.717] <TB3> INFO: 208000 events read in total (9155ms).
[20:37:07.718] <TB3> INFO: Test took 10014ms.
[20:37:07.766] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 57 (-1/-1) hits flags = 528 (plus default)
[20:37:07.779] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:37:07.779] <TB3> INFO: run 1 of 1
[20:37:08.057] <TB3> INFO: Expecting 1331200 events.
[20:37:36.269] <TB3> INFO: 648856 events read in total (27620ms).
[20:38:04.190] <TB3> INFO: 1296872 events read in total (55542ms).
[20:38:06.102] <TB3> INFO: 1331200 events read in total (57453ms).
[20:38:06.132] <TB3> INFO: Test took 58354ms.
[20:38:18.715] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.101584 .. 47.394495
[20:38:18.952] <TB3> INFO: Expecting 208000 events.
[20:38:28.695] <TB3> INFO: 208000 events read in total (9151ms).
[20:38:28.696] <TB3> INFO: Test took 9979ms.
[20:38:28.758] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[20:38:28.772] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:38:28.772] <TB3> INFO: run 1 of 1
[20:38:29.050] <TB3> INFO: Expecting 1397760 events.
[20:38:57.506] <TB3> INFO: 656304 events read in total (27864ms).
[20:39:26.102] <TB3> INFO: 1313016 events read in total (56460ms).
[20:39:30.206] <TB3> INFO: 1397760 events read in total (60564ms).
[20:39:30.238] <TB3> INFO: Test took 61466ms.
[20:39:42.557] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[20:39:42.557] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:39:42.568] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[20:39:42.568] <TB3> INFO: run 1 of 1
[20:39:42.804] <TB3> INFO: Expecting 1364480 events.
[20:40:11.382] <TB3> INFO: 668128 events read in total (27986ms).
[20:40:39.102] <TB3> INFO: 1336240 events read in total (55707ms).
[20:40:40.691] <TB3> INFO: 1364480 events read in total (57296ms).
[20:40:40.720] <TB3> INFO: Test took 58152ms.
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C0.dat
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C1.dat
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C2.dat
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C3.dat
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C4.dat
[20:40:52.553] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C5.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C6.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C7.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C8.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C9.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C10.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C11.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C12.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C13.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C14.dat
[20:40:52.554] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C15.dat
[20:40:52.554] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C0.dat
[20:40:52.563] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C1.dat
[20:40:52.569] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C2.dat
[20:40:52.574] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C3.dat
[20:40:52.579] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C4.dat
[20:40:52.583] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C5.dat
[20:40:52.588] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C6.dat
[20:40:52.593] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C7.dat
[20:40:52.600] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C8.dat
[20:40:52.606] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C9.dat
[20:40:52.612] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C10.dat
[20:40:52.618] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C11.dat
[20:40:52.624] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C12.dat
[20:40:52.630] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C13.dat
[20:40:52.636] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C14.dat
[20:40:52.640] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters35_C15.dat
[20:40:52.645] <TB3> INFO: PixTestTrim::trimTest() done
[20:40:52.645] <TB3> INFO: vtrim: 115 144 118 139 116 147 138 144 125 144 104 102 121 113 112 108
[20:40:52.645] <TB3> INFO: vthrcomp: 128 125 113 118 121 119 113 111 113 114 107 109 118 118 117 113
[20:40:52.645] <TB3> INFO: vcal mean: 35.00 35.00 35.03 34.99 35.02 35.00 35.14 35.10 34.99 35.00 34.99 35.09 35.03 34.96 34.95 35.10
[20:40:52.645] <TB3> INFO: vcal RMS: 1.09 1.06 1.07 1.18 1.10 1.13 1.27 1.42 0.98 1.08 0.97 1.10 1.13 1.07 1.13 1.17
[20:40:52.645] <TB3> INFO: bits mean: 9.81 9.91 8.97 9.74 8.89 9.60 9.07 8.36 9.47 9.76 8.20 8.47 9.18 9.39 9.75 8.16
[20:40:52.645] <TB3> INFO: bits RMS: 2.64 2.50 2.70 2.55 2.65 2.89 2.67 2.68 2.46 2.54 2.71 2.59 2.71 2.69 2.50 3.05
[20:40:52.653] <TB3> INFO: ----------------------------------------------------------------------
[20:40:52.653] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:40:52.653] <TB3> INFO: ----------------------------------------------------------------------
[20:40:52.655] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:40:52.668] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:40:52.668] <TB3> INFO: run 1 of 1
[20:40:52.911] <TB3> INFO: Expecting 4160000 events.
[20:41:24.936] <TB3> INFO: 745390 events read in total (31433ms).
[20:41:56.610] <TB3> INFO: 1486715 events read in total (63107ms).
[20:42:28.128] <TB3> INFO: 2224825 events read in total (94625ms).
[20:42:59.656] <TB3> INFO: 2959565 events read in total (126153ms).
[20:43:30.991] <TB3> INFO: 3688940 events read in total (157488ms).
[20:43:52.286] <TB3> INFO: 4160000 events read in total (178783ms).
[20:43:52.359] <TB3> INFO: Test took 179691ms.
[20:44:18.608] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[20:44:18.622] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:44:18.622] <TB3> INFO: run 1 of 1
[20:44:18.859] <TB3> INFO: Expecting 4243200 events.
[20:44:50.193] <TB3> INFO: 714600 events read in total (30742ms).
[20:45:21.106] <TB3> INFO: 1426000 events read in total (61655ms).
[20:45:51.943] <TB3> INFO: 2135560 events read in total (92492ms).
[20:46:22.518] <TB3> INFO: 2840775 events read in total (123067ms).
[20:46:53.478] <TB3> INFO: 3542285 events read in total (154027ms).
[20:47:24.433] <TB3> INFO: 4243200 events read in total (184982ms).
[20:47:24.500] <TB3> INFO: Test took 185878ms.
[20:47:53.976] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[20:47:53.990] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:47:53.990] <TB3> INFO: run 1 of 1
[20:47:54.269] <TB3> INFO: Expecting 4097600 events.
[20:48:25.944] <TB3> INFO: 723285 events read in total (31083ms).
[20:48:57.095] <TB3> INFO: 1443730 events read in total (62234ms).
[20:49:27.931] <TB3> INFO: 2160725 events read in total (93071ms).
[20:49:59.066] <TB3> INFO: 2873915 events read in total (124205ms).
[20:50:30.295] <TB3> INFO: 3582800 events read in total (155434ms).
[20:50:52.561] <TB3> INFO: 4097600 events read in total (177700ms).
[20:50:52.621] <TB3> INFO: Test took 178630ms.
[20:51:21.595] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[20:51:21.608] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:51:21.608] <TB3> INFO: run 1 of 1
[20:51:21.845] <TB3> INFO: Expecting 4118400 events.
[20:51:53.300] <TB3> INFO: 722825 events read in total (30863ms).
[20:52:24.073] <TB3> INFO: 1442225 events read in total (61636ms).
[20:52:55.230] <TB3> INFO: 2158065 events read in total (92794ms).
[20:53:26.246] <TB3> INFO: 2870660 events read in total (123809ms).
[20:53:58.234] <TB3> INFO: 3578750 events read in total (155797ms).
[20:54:21.775] <TB3> INFO: 4118400 events read in total (179338ms).
[20:54:21.842] <TB3> INFO: Test took 180234ms.
[20:54:47.061] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[20:54:47.075] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[20:54:47.075] <TB3> INFO: run 1 of 1
[20:54:47.313] <TB3> INFO: Expecting 4076800 events.
[20:55:19.011] <TB3> INFO: 725425 events read in total (31106ms).
[20:55:50.061] <TB3> INFO: 1447170 events read in total (62156ms).
[20:56:20.866] <TB3> INFO: 2165260 events read in total (92961ms).
[20:56:51.701] <TB3> INFO: 2880190 events read in total (123796ms).
[20:57:23.486] <TB3> INFO: 3590390 events read in total (155581ms).
[20:57:44.867] <TB3> INFO: 4076800 events read in total (176962ms).
[20:57:44.944] <TB3> INFO: Test took 177869ms.
[20:58:12.159] <TB3> INFO: PixTestTrim::trimBitTest() done
[20:58:12.160] <TB3> INFO: PixTestTrim::doTest() done, duration: 2473 seconds
[20:58:12.160] <TB3> INFO: Decoding statistics:
[20:58:12.160] <TB3> INFO: General information:
[20:58:12.160] <TB3> INFO: 16bit words read: 0
[20:58:12.160] <TB3> INFO: valid events total: 0
[20:58:12.160] <TB3> INFO: empty events: 0
[20:58:12.160] <TB3> INFO: valid events with pixels: 0
[20:58:12.160] <TB3> INFO: valid pixel hits: 0
[20:58:12.160] <TB3> INFO: Event errors: 0
[20:58:12.160] <TB3> INFO: start marker: 0
[20:58:12.160] <TB3> INFO: stop marker: 0
[20:58:12.161] <TB3> INFO: overflow: 0
[20:58:12.161] <TB3> INFO: invalid 5bit words: 0
[20:58:12.161] <TB3> INFO: invalid XOR eye diagram: 0
[20:58:12.161] <TB3> INFO: frame (failed synchr.): 0
[20:58:12.161] <TB3> INFO: idle data (no TBM trl): 0
[20:58:12.161] <TB3> INFO: no data (only TBM hdr): 0
[20:58:12.161] <TB3> INFO: TBM errors: 0
[20:58:12.161] <TB3> INFO: flawed TBM headers: 0
[20:58:12.161] <TB3> INFO: flawed TBM trailers: 0
[20:58:12.161] <TB3> INFO: event ID mismatches: 0
[20:58:12.161] <TB3> INFO: ROC errors: 0
[20:58:12.161] <TB3> INFO: missing ROC header(s): 0
[20:58:12.161] <TB3> INFO: misplaced readback start: 0
[20:58:12.161] <TB3> INFO: Pixel decoding errors: 0
[20:58:12.161] <TB3> INFO: pixel data incomplete: 0
[20:58:12.161] <TB3> INFO: pixel address: 0
[20:58:12.161] <TB3> INFO: pulse height fill bit: 0
[20:58:12.161] <TB3> INFO: buffer corruption: 0
[20:58:12.788] <TB3> INFO: ######################################################################
[20:58:12.788] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:58:12.788] <TB3> INFO: ######################################################################
[20:58:13.039] <TB3> INFO: Expecting 41600 events.
[20:58:16.519] <TB3> INFO: 41600 events read in total (2888ms).
[20:58:16.520] <TB3> INFO: Test took 3730ms.
[20:58:16.002] <TB3> INFO: Expecting 41600 events.
[20:58:20.495] <TB3> INFO: 41600 events read in total (2901ms).
[20:58:20.496] <TB3> INFO: Test took 3773ms.
[20:58:20.786] <TB3> INFO: Expecting 41600 events.
[20:58:24.288] <TB3> INFO: 41600 events read in total (2911ms).
[20:58:24.289] <TB3> INFO: Test took 3768ms.
[20:58:24.578] <TB3> INFO: Expecting 41600 events.
[20:58:28.076] <TB3> INFO: 41600 events read in total (2906ms).
[20:58:28.077] <TB3> INFO: Test took 3764ms.
[20:58:28.367] <TB3> INFO: Expecting 41600 events.
[20:58:31.907] <TB3> INFO: 41600 events read in total (2949ms).
[20:58:31.907] <TB3> INFO: Test took 3806ms.
[20:58:32.196] <TB3> INFO: Expecting 41600 events.
[20:58:35.720] <TB3> INFO: 41600 events read in total (2932ms).
[20:58:35.720] <TB3> INFO: Test took 3789ms.
[20:58:36.009] <TB3> INFO: Expecting 41600 events.
[20:58:39.528] <TB3> INFO: 41600 events read in total (2927ms).
[20:58:39.528] <TB3> INFO: Test took 3783ms.
[20:58:39.820] <TB3> INFO: Expecting 41600 events.
[20:58:43.323] <TB3> INFO: 41600 events read in total (2912ms).
[20:58:43.324] <TB3> INFO: Test took 3769ms.
[20:58:43.613] <TB3> INFO: Expecting 41600 events.
[20:58:47.100] <TB3> INFO: 41600 events read in total (2895ms).
[20:58:47.101] <TB3> INFO: Test took 3753ms.
[20:58:47.393] <TB3> INFO: Expecting 41600 events.
[20:58:50.884] <TB3> INFO: 41600 events read in total (2899ms).
[20:58:50.884] <TB3> INFO: Test took 3756ms.
[20:58:51.173] <TB3> INFO: Expecting 41600 events.
[20:58:54.667] <TB3> INFO: 41600 events read in total (2902ms).
[20:58:54.668] <TB3> INFO: Test took 3760ms.
[20:58:54.957] <TB3> INFO: Expecting 41600 events.
[20:58:58.464] <TB3> INFO: 41600 events read in total (2916ms).
[20:58:58.465] <TB3> INFO: Test took 3773ms.
[20:58:58.754] <TB3> INFO: Expecting 41600 events.
[20:59:02.255] <TB3> INFO: 41600 events read in total (2909ms).
[20:59:02.256] <TB3> INFO: Test took 3766ms.
[20:59:02.544] <TB3> INFO: Expecting 41600 events.
[20:59:06.122] <TB3> INFO: 41600 events read in total (2986ms).
[20:59:06.123] <TB3> INFO: Test took 3843ms.
[20:59:06.428] <TB3> INFO: Expecting 41600 events.
[20:59:09.938] <TB3> INFO: 41600 events read in total (2919ms).
[20:59:09.939] <TB3> INFO: Test took 3792ms.
[20:59:10.230] <TB3> INFO: Expecting 41600 events.
[20:59:13.726] <TB3> INFO: 41600 events read in total (2905ms).
[20:59:13.726] <TB3> INFO: Test took 3761ms.
[20:59:14.027] <TB3> INFO: Expecting 41600 events.
[20:59:17.646] <TB3> INFO: 41600 events read in total (3026ms).
[20:59:17.646] <TB3> INFO: Test took 3895ms.
[20:59:17.935] <TB3> INFO: Expecting 41600 events.
[20:59:21.484] <TB3> INFO: 41600 events read in total (2957ms).
[20:59:21.484] <TB3> INFO: Test took 3813ms.
[20:59:21.774] <TB3> INFO: Expecting 41600 events.
[20:59:25.309] <TB3> INFO: 41600 events read in total (2944ms).
[20:59:25.310] <TB3> INFO: Test took 3801ms.
[20:59:25.599] <TB3> INFO: Expecting 41600 events.
[20:59:29.144] <TB3> INFO: 41600 events read in total (2953ms).
[20:59:29.145] <TB3> INFO: Test took 3811ms.
[20:59:29.434] <TB3> INFO: Expecting 41600 events.
[20:59:32.980] <TB3> INFO: 41600 events read in total (2954ms).
[20:59:32.981] <TB3> INFO: Test took 3812ms.
[20:59:33.270] <TB3> INFO: Expecting 41600 events.
[20:59:36.887] <TB3> INFO: 41600 events read in total (3025ms).
[20:59:36.888] <TB3> INFO: Test took 3882ms.
[20:59:37.178] <TB3> INFO: Expecting 41600 events.
[20:59:40.677] <TB3> INFO: 41600 events read in total (2908ms).
[20:59:40.678] <TB3> INFO: Test took 3765ms.
[20:59:40.968] <TB3> INFO: Expecting 41600 events.
[20:59:44.501] <TB3> INFO: 41600 events read in total (2941ms).
[20:59:44.502] <TB3> INFO: Test took 3799ms.
[20:59:44.791] <TB3> INFO: Expecting 41600 events.
[20:59:48.346] <TB3> INFO: 41600 events read in total (2963ms).
[20:59:48.347] <TB3> INFO: Test took 3820ms.
[20:59:48.636] <TB3> INFO: Expecting 41600 events.
[20:59:52.177] <TB3> INFO: 41600 events read in total (2949ms).
[20:59:52.177] <TB3> INFO: Test took 3805ms.
[20:59:52.468] <TB3> INFO: Expecting 41600 events.
[20:59:55.970] <TB3> INFO: 41600 events read in total (2910ms).
[20:59:55.971] <TB3> INFO: Test took 3768ms.
[20:59:56.263] <TB3> INFO: Expecting 2560 events.
[20:59:57.150] <TB3> INFO: 2560 events read in total (295ms).
[20:59:57.150] <TB3> INFO: Test took 1165ms.
[20:59:57.458] <TB3> INFO: Expecting 2560 events.
[20:59:58.345] <TB3> INFO: 2560 events read in total (296ms).
[20:59:58.345] <TB3> INFO: Test took 1194ms.
[20:59:58.652] <TB3> INFO: Expecting 2560 events.
[20:59:59.537] <TB3> INFO: 2560 events read in total (293ms).
[20:59:59.537] <TB3> INFO: Test took 1191ms.
[20:59:59.844] <TB3> INFO: Expecting 2560 events.
[21:00:00.730] <TB3> INFO: 2560 events read in total (295ms).
[21:00:00.731] <TB3> INFO: Test took 1193ms.
[21:00:01.039] <TB3> INFO: Expecting 2560 events.
[21:00:01.928] <TB3> INFO: 2560 events read in total (297ms).
[21:00:01.928] <TB3> INFO: Test took 1197ms.
[21:00:02.236] <TB3> INFO: Expecting 2560 events.
[21:00:03.129] <TB3> INFO: 2560 events read in total (302ms).
[21:00:03.129] <TB3> INFO: Test took 1200ms.
[21:00:03.437] <TB3> INFO: Expecting 2560 events.
[21:00:04.317] <TB3> INFO: 2560 events read in total (289ms).
[21:00:04.317] <TB3> INFO: Test took 1187ms.
[21:00:04.625] <TB3> INFO: Expecting 2560 events.
[21:00:05.514] <TB3> INFO: 2560 events read in total (298ms).
[21:00:05.514] <TB3> INFO: Test took 1196ms.
[21:00:05.821] <TB3> INFO: Expecting 2560 events.
[21:00:06.711] <TB3> INFO: 2560 events read in total (298ms).
[21:00:06.711] <TB3> INFO: Test took 1196ms.
[21:00:07.019] <TB3> INFO: Expecting 2560 events.
[21:00:07.899] <TB3> INFO: 2560 events read in total (288ms).
[21:00:07.899] <TB3> INFO: Test took 1187ms.
[21:00:08.206] <TB3> INFO: Expecting 2560 events.
[21:00:09.089] <TB3> INFO: 2560 events read in total (291ms).
[21:00:09.090] <TB3> INFO: Test took 1191ms.
[21:00:09.397] <TB3> INFO: Expecting 2560 events.
[21:00:10.284] <TB3> INFO: 2560 events read in total (296ms).
[21:00:10.284] <TB3> INFO: Test took 1194ms.
[21:00:10.592] <TB3> INFO: Expecting 2560 events.
[21:00:11.485] <TB3> INFO: 2560 events read in total (301ms).
[21:00:11.485] <TB3> INFO: Test took 1200ms.
[21:00:11.793] <TB3> INFO: Expecting 2560 events.
[21:00:12.677] <TB3> INFO: 2560 events read in total (291ms).
[21:00:12.677] <TB3> INFO: Test took 1192ms.
[21:00:12.984] <TB3> INFO: Expecting 2560 events.
[21:00:13.876] <TB3> INFO: 2560 events read in total (300ms).
[21:00:13.877] <TB3> INFO: Test took 1199ms.
[21:00:14.184] <TB3> INFO: Expecting 2560 events.
[21:00:15.075] <TB3> INFO: 2560 events read in total (299ms).
[21:00:15.075] <TB3> INFO: Test took 1197ms.
[21:00:15.079] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:00:15.383] <TB3> INFO: Expecting 655360 events.
[21:00:30.227] <TB3> INFO: 655360 events read in total (14252ms).
[21:00:30.239] <TB3> INFO: Expecting 655360 events.
[21:00:44.710] <TB3> INFO: 655360 events read in total (14068ms).
[21:00:44.727] <TB3> INFO: Expecting 655360 events.
[21:00:59.430] <TB3> INFO: 655360 events read in total (14300ms).
[21:00:59.452] <TB3> INFO: Expecting 655360 events.
[21:01:13.849] <TB3> INFO: 655360 events read in total (13993ms).
[21:01:13.873] <TB3> INFO: Expecting 655360 events.
[21:01:28.409] <TB3> INFO: 655360 events read in total (14133ms).
[21:01:28.439] <TB3> INFO: Expecting 655360 events.
[21:01:42.836] <TB3> INFO: 655360 events read in total (13994ms).
[21:01:42.871] <TB3> INFO: Expecting 655360 events.
[21:01:57.350] <TB3> INFO: 655360 events read in total (14076ms).
[21:01:57.388] <TB3> INFO: Expecting 655360 events.
[21:02:11.804] <TB3> INFO: 655360 events read in total (14012ms).
[21:02:11.858] <TB3> INFO: Expecting 655360 events.
[21:02:26.265] <TB3> INFO: 655360 events read in total (14004ms).
[21:02:26.333] <TB3> INFO: Expecting 655360 events.
[21:02:41.008] <TB3> INFO: 655360 events read in total (14272ms).
[21:02:41.074] <TB3> INFO: Expecting 655360 events.
[21:02:55.714] <TB3> INFO: 655360 events read in total (14237ms).
[21:02:55.769] <TB3> INFO: Expecting 655360 events.
[21:03:10.184] <TB3> INFO: 655360 events read in total (14012ms).
[21:03:10.281] <TB3> INFO: Expecting 655360 events.
[21:03:24.852] <TB3> INFO: 655360 events read in total (14168ms).
[21:03:24.921] <TB3> INFO: Expecting 655360 events.
[21:03:39.539] <TB3> INFO: 655360 events read in total (14215ms).
[21:03:39.803] <TB3> INFO: Expecting 655360 events.
[21:03:54.282] <TB3> INFO: 655360 events read in total (14076ms).
[21:03:54.551] <TB3> INFO: Expecting 655360 events.
[21:04:09.029] <TB3> INFO: 655360 events read in total (14075ms).
[21:04:09.125] <TB3> INFO: Test took 234046ms.
[21:04:09.221] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:04:09.477] <TB3> INFO: Expecting 655360 events.
[21:04:24.056] <TB3> INFO: 655360 events read in total (13988ms).
[21:04:24.070] <TB3> INFO: Expecting 655360 events.
[21:04:38.690] <TB3> INFO: 655360 events read in total (14216ms).
[21:04:38.706] <TB3> INFO: Expecting 655360 events.
[21:04:53.230] <TB3> INFO: 655360 events read in total (14121ms).
[21:04:53.250] <TB3> INFO: Expecting 655360 events.
[21:05:07.716] <TB3> INFO: 655360 events read in total (14062ms).
[21:05:07.740] <TB3> INFO: Expecting 655360 events.
[21:05:22.284] <TB3> INFO: 655360 events read in total (14141ms).
[21:05:22.313] <TB3> INFO: Expecting 655360 events.
[21:05:36.849] <TB3> INFO: 655360 events read in total (14132ms).
[21:05:36.883] <TB3> INFO: Expecting 655360 events.
[21:05:51.185] <TB3> INFO: 655360 events read in total (13899ms).
[21:05:51.223] <TB3> INFO: Expecting 655360 events.
[21:06:05.716] <TB3> INFO: 655360 events read in total (14090ms).
[21:06:05.764] <TB3> INFO: Expecting 655360 events.
[21:06:20.275] <TB3> INFO: 655360 events read in total (14108ms).
[21:06:20.321] <TB3> INFO: Expecting 655360 events.
[21:06:34.893] <TB3> INFO: 655360 events read in total (14169ms).
[21:06:34.945] <TB3> INFO: Expecting 655360 events.
[21:06:49.198] <TB3> INFO: 655360 events read in total (13850ms).
[21:06:49.253] <TB3> INFO: Expecting 655360 events.
[21:07:03.724] <TB3> INFO: 655360 events read in total (14068ms).
[21:07:03.797] <TB3> INFO: Expecting 655360 events.
[21:07:17.767] <TB3> INFO: 655360 events read in total (13567ms).
[21:07:17.834] <TB3> INFO: Expecting 655360 events.
[21:07:32.040] <TB3> INFO: 655360 events read in total (13803ms).
[21:07:32.289] <TB3> INFO: Expecting 655360 events.
[21:07:46.906] <TB3> INFO: 655360 events read in total (14214ms).
[21:07:47.047] <TB3> INFO: Expecting 655360 events.
[21:08:01.622] <TB3> INFO: 655360 events read in total (14172ms).
[21:08:01.725] <TB3> INFO: Test took 232504ms.
[21:08:01.892] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.898] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.904] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.909] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.915] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.921] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.926] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.932] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.940] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.945] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[21:08:01.951] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.957] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[21:08:01.962] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[21:08:01.968] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[21:08:01.974] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.980] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.986] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[21:08:01.991] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:01.997] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:02.003] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:02.009] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[21:08:02.015] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[21:08:02.021] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[21:08:02.027] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[21:08:02.033] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[21:08:02.039] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[21:08:02.045] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[21:08:02.081] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C0.dat
[21:08:02.081] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C1.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C2.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C3.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C4.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C5.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C6.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C7.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C8.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C9.dat
[21:08:02.082] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C10.dat
[21:08:02.083] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C11.dat
[21:08:02.083] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C12.dat
[21:08:02.083] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C13.dat
[21:08:02.083] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C14.dat
[21:08:02.083] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters35_C15.dat
[21:08:02.326] <TB3> INFO: Expecting 41600 events.
[21:08:05.555] <TB3> INFO: 41600 events read in total (2637ms).
[21:08:05.556] <TB3> INFO: Test took 3470ms.
[21:08:06.011] <TB3> INFO: Expecting 41600 events.
[21:08:09.065] <TB3> INFO: 41600 events read in total (2462ms).
[21:08:09.066] <TB3> INFO: Test took 3296ms.
[21:08:09.527] <TB3> INFO: Expecting 41600 events.
[21:08:12.707] <TB3> INFO: 41600 events read in total (2588ms).
[21:08:12.709] <TB3> INFO: Test took 3428ms.
[21:08:12.925] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:13.015] <TB3> INFO: Expecting 2560 events.
[21:08:13.908] <TB3> INFO: 2560 events read in total (302ms).
[21:08:13.909] <TB3> INFO: Test took 984ms.
[21:08:13.911] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:14.216] <TB3> INFO: Expecting 2560 events.
[21:08:15.099] <TB3> INFO: 2560 events read in total (291ms).
[21:08:15.099] <TB3> INFO: Test took 1188ms.
[21:08:15.102] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:15.407] <TB3> INFO: Expecting 2560 events.
[21:08:16.298] <TB3> INFO: 2560 events read in total (299ms).
[21:08:16.298] <TB3> INFO: Test took 1196ms.
[21:08:16.300] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:16.606] <TB3> INFO: Expecting 2560 events.
[21:08:17.493] <TB3> INFO: 2560 events read in total (295ms).
[21:08:17.493] <TB3> INFO: Test took 1193ms.
[21:08:17.495] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:17.802] <TB3> INFO: Expecting 2560 events.
[21:08:18.689] <TB3> INFO: 2560 events read in total (296ms).
[21:08:18.690] <TB3> INFO: Test took 1195ms.
[21:08:18.693] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:18.998] <TB3> INFO: Expecting 2560 events.
[21:08:19.883] <TB3> INFO: 2560 events read in total (293ms).
[21:08:19.884] <TB3> INFO: Test took 1191ms.
[21:08:19.886] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:20.193] <TB3> INFO: Expecting 2560 events.
[21:08:21.077] <TB3> INFO: 2560 events read in total (293ms).
[21:08:21.077] <TB3> INFO: Test took 1191ms.
[21:08:21.080] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:21.386] <TB3> INFO: Expecting 2560 events.
[21:08:22.273] <TB3> INFO: 2560 events read in total (295ms).
[21:08:22.273] <TB3> INFO: Test took 1193ms.
[21:08:22.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:22.580] <TB3> INFO: Expecting 2560 events.
[21:08:23.463] <TB3> INFO: 2560 events read in total (291ms).
[21:08:23.463] <TB3> INFO: Test took 1186ms.
[21:08:23.466] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:23.771] <TB3> INFO: Expecting 2560 events.
[21:08:24.652] <TB3> INFO: 2560 events read in total (289ms).
[21:08:24.653] <TB3> INFO: Test took 1187ms.
[21:08:24.655] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:24.961] <TB3> INFO: Expecting 2560 events.
[21:08:25.841] <TB3> INFO: 2560 events read in total (288ms).
[21:08:25.841] <TB3> INFO: Test took 1186ms.
[21:08:25.844] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:26.149] <TB3> INFO: Expecting 2560 events.
[21:08:27.029] <TB3> INFO: 2560 events read in total (288ms).
[21:08:27.029] <TB3> INFO: Test took 1185ms.
[21:08:27.033] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:27.338] <TB3> INFO: Expecting 2560 events.
[21:08:28.224] <TB3> INFO: 2560 events read in total (294ms).
[21:08:28.225] <TB3> INFO: Test took 1192ms.
[21:08:28.228] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:28.532] <TB3> INFO: Expecting 2560 events.
[21:08:29.415] <TB3> INFO: 2560 events read in total (291ms).
[21:08:29.415] <TB3> INFO: Test took 1187ms.
[21:08:29.418] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:29.723] <TB3> INFO: Expecting 2560 events.
[21:08:30.606] <TB3> INFO: 2560 events read in total (292ms).
[21:08:30.606] <TB3> INFO: Test took 1188ms.
[21:08:30.609] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:30.913] <TB3> INFO: Expecting 2560 events.
[21:08:31.795] <TB3> INFO: 2560 events read in total (290ms).
[21:08:31.795] <TB3> INFO: Test took 1186ms.
[21:08:31.797] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:32.103] <TB3> INFO: Expecting 2560 events.
[21:08:32.984] <TB3> INFO: 2560 events read in total (289ms).
[21:08:32.984] <TB3> INFO: Test took 1187ms.
[21:08:32.988] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:33.292] <TB3> INFO: Expecting 2560 events.
[21:08:34.178] <TB3> INFO: 2560 events read in total (294ms).
[21:08:34.179] <TB3> INFO: Test took 1191ms.
[21:08:34.183] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:34.487] <TB3> INFO: Expecting 2560 events.
[21:08:35.370] <TB3> INFO: 2560 events read in total (291ms).
[21:08:35.370] <TB3> INFO: Test took 1188ms.
[21:08:35.373] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:35.678] <TB3> INFO: Expecting 2560 events.
[21:08:36.568] <TB3> INFO: 2560 events read in total (298ms).
[21:08:36.568] <TB3> INFO: Test took 1195ms.
[21:08:36.571] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:36.876] <TB3> INFO: Expecting 2560 events.
[21:08:37.757] <TB3> INFO: 2560 events read in total (289ms).
[21:08:37.757] <TB3> INFO: Test took 1187ms.
[21:08:37.760] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:38.065] <TB3> INFO: Expecting 2560 events.
[21:08:38.950] <TB3> INFO: 2560 events read in total (293ms).
[21:08:38.951] <TB3> INFO: Test took 1191ms.
[21:08:38.954] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:39.258] <TB3> INFO: Expecting 2560 events.
[21:08:40.142] <TB3> INFO: 2560 events read in total (292ms).
[21:08:40.142] <TB3> INFO: Test took 1189ms.
[21:08:40.146] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:40.449] <TB3> INFO: Expecting 2560 events.
[21:08:41.328] <TB3> INFO: 2560 events read in total (287ms).
[21:08:41.328] <TB3> INFO: Test took 1182ms.
[21:08:41.330] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:41.637] <TB3> INFO: Expecting 2560 events.
[21:08:42.533] <TB3> INFO: 2560 events read in total (304ms).
[21:08:42.533] <TB3> INFO: Test took 1203ms.
[21:08:42.537] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:42.842] <TB3> INFO: Expecting 2560 events.
[21:08:43.732] <TB3> INFO: 2560 events read in total (298ms).
[21:08:43.733] <TB3> INFO: Test took 1197ms.
[21:08:43.736] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:44.040] <TB3> INFO: Expecting 2560 events.
[21:08:44.927] <TB3> INFO: 2560 events read in total (296ms).
[21:08:44.927] <TB3> INFO: Test took 1191ms.
[21:08:44.931] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:45.236] <TB3> INFO: Expecting 2560 events.
[21:08:46.123] <TB3> INFO: 2560 events read in total (295ms).
[21:08:46.123] <TB3> INFO: Test took 1192ms.
[21:08:46.125] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:46.432] <TB3> INFO: Expecting 2560 events.
[21:08:47.316] <TB3> INFO: 2560 events read in total (293ms).
[21:08:47.317] <TB3> INFO: Test took 1192ms.
[21:08:47.319] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:47.625] <TB3> INFO: Expecting 2560 events.
[21:08:48.515] <TB3> INFO: 2560 events read in total (298ms).
[21:08:48.516] <TB3> INFO: Test took 1197ms.
[21:08:48.518] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:48.824] <TB3> INFO: Expecting 2560 events.
[21:08:49.709] <TB3> INFO: 2560 events read in total (293ms).
[21:08:49.709] <TB3> INFO: Test took 1191ms.
[21:08:49.711] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:08:50.017] <TB3> INFO: Expecting 2560 events.
[21:08:50.907] <TB3> INFO: 2560 events read in total (298ms).
[21:08:50.907] <TB3> INFO: Test took 1196ms.
[21:08:51.377] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 638 seconds
[21:08:51.377] <TB3> INFO: PH scale (per ROC): 47 55 45 54 37 35 53 36 45 48 48 35 34 43 31 36
[21:08:51.377] <TB3> INFO: PH offset (per ROC): 112 115 83 122 110 96 133 94 99 129 104 82 118 95 110 110
[21:08:51.384] <TB3> INFO: Decoding statistics:
[21:08:51.384] <TB3> INFO: General information:
[21:08:51.384] <TB3> INFO: 16bit words read: 127876
[21:08:51.384] <TB3> INFO: valid events total: 20480
[21:08:51.384] <TB3> INFO: empty events: 17982
[21:08:51.384] <TB3> INFO: valid events with pixels: 2498
[21:08:51.384] <TB3> INFO: valid pixel hits: 2498
[21:08:51.384] <TB3> INFO: Event errors: 0
[21:08:51.384] <TB3> INFO: start marker: 0
[21:08:51.384] <TB3> INFO: stop marker: 0
[21:08:51.384] <TB3> INFO: overflow: 0
[21:08:51.384] <TB3> INFO: invalid 5bit words: 0
[21:08:51.384] <TB3> INFO: invalid XOR eye diagram: 0
[21:08:51.384] <TB3> INFO: frame (failed synchr.): 0
[21:08:51.384] <TB3> INFO: idle data (no TBM trl): 0
[21:08:51.384] <TB3> INFO: no data (only TBM hdr): 0
[21:08:51.384] <TB3> INFO: TBM errors: 0
[21:08:51.384] <TB3> INFO: flawed TBM headers: 0
[21:08:51.384] <TB3> INFO: flawed TBM trailers: 0
[21:08:51.384] <TB3> INFO: event ID mismatches: 0
[21:08:51.384] <TB3> INFO: ROC errors: 0
[21:08:51.384] <TB3> INFO: missing ROC header(s): 0
[21:08:51.384] <TB3> INFO: misplaced readback start: 0
[21:08:51.384] <TB3> INFO: Pixel decoding errors: 0
[21:08:51.385] <TB3> INFO: pixel data incomplete: 0
[21:08:51.385] <TB3> INFO: pixel address: 0
[21:08:51.385] <TB3> INFO: pulse height fill bit: 0
[21:08:51.385] <TB3> INFO: buffer corruption: 0
[21:08:51.550] <TB3> INFO: ######################################################################
[21:08:51.550] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[21:08:51.550] <TB3> INFO: ######################################################################
[21:08:51.564] <TB3> INFO: scanning low vcal = 10
[21:08:51.801] <TB3> INFO: Expecting 41600 events.
[21:08:55.386] <TB3> INFO: 41600 events read in total (2993ms).
[21:08:55.386] <TB3> INFO: Test took 3822ms.
[21:08:55.388] <TB3> INFO: scanning low vcal = 20
[21:08:55.682] <TB3> INFO: Expecting 41600 events.
[21:08:59.265] <TB3> INFO: 41600 events read in total (2992ms).
[21:08:59.266] <TB3> INFO: Test took 3878ms.
[21:08:59.268] <TB3> INFO: scanning low vcal = 30
[21:08:59.561] <TB3> INFO: Expecting 41600 events.
[21:09:03.238] <TB3> INFO: 41600 events read in total (3087ms).
[21:09:03.240] <TB3> INFO: Test took 3972ms.
[21:09:03.242] <TB3> INFO: scanning low vcal = 40
[21:09:03.520] <TB3> INFO: Expecting 41600 events.
[21:09:07.492] <TB3> INFO: 41600 events read in total (3380ms).
[21:09:07.493] <TB3> INFO: Test took 4250ms.
[21:09:07.496] <TB3> INFO: scanning low vcal = 50
[21:09:07.773] <TB3> INFO: Expecting 41600 events.
[21:09:11.741] <TB3> INFO: 41600 events read in total (3376ms).
[21:09:11.742] <TB3> INFO: Test took 4245ms.
[21:09:11.746] <TB3> INFO: scanning low vcal = 60
[21:09:12.022] <TB3> INFO: Expecting 41600 events.
[21:09:15.984] <TB3> INFO: 41600 events read in total (3370ms).
[21:09:15.986] <TB3> INFO: Test took 4239ms.
[21:09:15.989] <TB3> INFO: scanning low vcal = 70
[21:09:16.266] <TB3> INFO: Expecting 41600 events.
[21:09:20.229] <TB3> INFO: 41600 events read in total (3372ms).
[21:09:20.230] <TB3> INFO: Test took 4241ms.
[21:09:20.234] <TB3> INFO: scanning low vcal = 80
[21:09:20.510] <TB3> INFO: Expecting 41600 events.
[21:09:24.490] <TB3> INFO: 41600 events read in total (3388ms).
[21:09:24.491] <TB3> INFO: Test took 4257ms.
[21:09:24.495] <TB3> INFO: scanning low vcal = 90
[21:09:24.771] <TB3> INFO: Expecting 41600 events.
[21:09:28.767] <TB3> INFO: 41600 events read in total (3404ms).
[21:09:28.768] <TB3> INFO: Test took 4273ms.
[21:09:28.773] <TB3> INFO: scanning low vcal = 100
[21:09:29.048] <TB3> INFO: Expecting 41600 events.
[21:09:33.028] <TB3> INFO: 41600 events read in total (3388ms).
[21:09:33.029] <TB3> INFO: Test took 4256ms.
[21:09:33.032] <TB3> INFO: scanning low vcal = 110
[21:09:33.309] <TB3> INFO: Expecting 41600 events.
[21:09:37.279] <TB3> INFO: 41600 events read in total (3378ms).
[21:09:37.280] <TB3> INFO: Test took 4248ms.
[21:09:37.283] <TB3> INFO: scanning low vcal = 120
[21:09:37.560] <TB3> INFO: Expecting 41600 events.
[21:09:41.538] <TB3> INFO: 41600 events read in total (3387ms).
[21:09:41.539] <TB3> INFO: Test took 4255ms.
[21:09:41.543] <TB3> INFO: scanning low vcal = 130
[21:09:41.820] <TB3> INFO: Expecting 41600 events.
[21:09:45.782] <TB3> INFO: 41600 events read in total (3371ms).
[21:09:45.783] <TB3> INFO: Test took 4240ms.
[21:09:45.787] <TB3> INFO: scanning low vcal = 140
[21:09:46.063] <TB3> INFO: Expecting 41600 events.
[21:09:50.046] <TB3> INFO: 41600 events read in total (3392ms).
[21:09:50.047] <TB3> INFO: Test took 4260ms.
[21:09:50.050] <TB3> INFO: scanning low vcal = 150
[21:09:50.327] <TB3> INFO: Expecting 41600 events.
[21:09:54.331] <TB3> INFO: 41600 events read in total (3412ms).
[21:09:54.333] <TB3> INFO: Test took 4283ms.
[21:09:54.337] <TB3> INFO: scanning low vcal = 160
[21:09:54.613] <TB3> INFO: Expecting 41600 events.
[21:09:58.570] <TB3> INFO: 41600 events read in total (3365ms).
[21:09:58.571] <TB3> INFO: Test took 4233ms.
[21:09:58.574] <TB3> INFO: scanning low vcal = 170
[21:09:58.852] <TB3> INFO: Expecting 41600 events.
[21:10:02.828] <TB3> INFO: 41600 events read in total (3384ms).
[21:10:02.829] <TB3> INFO: Test took 4254ms.
[21:10:02.836] <TB3> INFO: scanning low vcal = 180
[21:10:03.109] <TB3> INFO: Expecting 41600 events.
[21:10:07.064] <TB3> INFO: 41600 events read in total (3363ms).
[21:10:07.065] <TB3> INFO: Test took 4229ms.
[21:10:07.068] <TB3> INFO: scanning low vcal = 190
[21:10:07.344] <TB3> INFO: Expecting 41600 events.
[21:10:11.331] <TB3> INFO: 41600 events read in total (3395ms).
[21:10:11.332] <TB3> INFO: Test took 4264ms.
[21:10:11.335] <TB3> INFO: scanning low vcal = 200
[21:10:11.612] <TB3> INFO: Expecting 41600 events.
[21:10:15.564] <TB3> INFO: 41600 events read in total (3361ms).
[21:10:15.565] <TB3> INFO: Test took 4229ms.
[21:10:15.569] <TB3> INFO: scanning low vcal = 210
[21:10:15.845] <TB3> INFO: Expecting 41600 events.
[21:10:19.820] <TB3> INFO: 41600 events read in total (3383ms).
[21:10:19.822] <TB3> INFO: Test took 4253ms.
[21:10:19.826] <TB3> INFO: scanning low vcal = 220
[21:10:20.103] <TB3> INFO: Expecting 41600 events.
[21:10:24.038] <TB3> INFO: 41600 events read in total (3344ms).
[21:10:24.038] <TB3> INFO: Test took 4211ms.
[21:10:24.042] <TB3> INFO: scanning low vcal = 230
[21:10:24.318] <TB3> INFO: Expecting 41600 events.
[21:10:28.277] <TB3> INFO: 41600 events read in total (3367ms).
[21:10:28.277] <TB3> INFO: Test took 4235ms.
[21:10:28.281] <TB3> INFO: scanning low vcal = 240
[21:10:28.557] <TB3> INFO: Expecting 41600 events.
[21:10:32.529] <TB3> INFO: 41600 events read in total (3381ms).
[21:10:32.530] <TB3> INFO: Test took 4249ms.
[21:10:32.533] <TB3> INFO: scanning low vcal = 250
[21:10:32.810] <TB3> INFO: Expecting 41600 events.
[21:10:36.775] <TB3> INFO: 41600 events read in total (3374ms).
[21:10:36.776] <TB3> INFO: Test took 4242ms.
[21:10:36.782] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[21:10:37.056] <TB3> INFO: Expecting 41600 events.
[21:10:41.011] <TB3> INFO: 41600 events read in total (3363ms).
[21:10:41.012] <TB3> INFO: Test took 4230ms.
[21:10:41.015] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[21:10:41.291] <TB3> INFO: Expecting 41600 events.
[21:10:45.277] <TB3> INFO: 41600 events read in total (3394ms).
[21:10:45.278] <TB3> INFO: Test took 4263ms.
[21:10:45.283] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[21:10:45.558] <TB3> INFO: Expecting 41600 events.
[21:10:49.527] <TB3> INFO: 41600 events read in total (3377ms).
[21:10:49.528] <TB3> INFO: Test took 4245ms.
[21:10:49.533] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[21:10:49.808] <TB3> INFO: Expecting 41600 events.
[21:10:53.745] <TB3> INFO: 41600 events read in total (3345ms).
[21:10:53.746] <TB3> INFO: Test took 4213ms.
[21:10:53.749] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[21:10:54.025] <TB3> INFO: Expecting 41600 events.
[21:10:57.987] <TB3> INFO: 41600 events read in total (3371ms).
[21:10:57.988] <TB3> INFO: Test took 4239ms.
[21:10:58.408] <TB3> INFO: PixTestGainPedestal::measure() done
[21:11:31.657] <TB3> INFO: PixTestGainPedestal::fit() done
[21:11:31.657] <TB3> INFO: non-linearity mean: 0.963 0.982 0.937 0.981 0.930 0.900 0.983 0.932 0.936 0.980 0.953 0.923 0.920 0.935 0.914 0.935
[21:11:31.657] <TB3> INFO: non-linearity RMS: 0.015 0.004 0.130 0.003 0.095 0.148 0.005 0.147 0.052 0.004 0.061 0.153 0.128 0.086 0.142 0.113
[21:11:31.657] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[21:11:31.671] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[21:11:31.684] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[21:11:31.698] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[21:11:31.711] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[21:11:31.724] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[21:11:31.738] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[21:11:31.751] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[21:11:31.764] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[21:11:31.777] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[21:11:31.791] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[21:11:31.804] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[21:11:31.817] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[21:11:31.831] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[21:11:31.844] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[21:11:31.857] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[21:11:31.871] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[21:11:31.871] <TB3> INFO: Decoding statistics:
[21:11:31.871] <TB3> INFO: General information:
[21:11:31.871] <TB3> INFO: 16bit words read: 3320792
[21:11:31.871] <TB3> INFO: valid events total: 332800
[21:11:31.871] <TB3> INFO: empty events: 184
[21:11:31.871] <TB3> INFO: valid events with pixels: 332616
[21:11:31.871] <TB3> INFO: valid pixel hits: 661996
[21:11:31.871] <TB3> INFO: Event errors: 0
[21:11:31.871] <TB3> INFO: start marker: 0
[21:11:31.871] <TB3> INFO: stop marker: 0
[21:11:31.871] <TB3> INFO: overflow: 0
[21:11:31.871] <TB3> INFO: invalid 5bit words: 0
[21:11:31.871] <TB3> INFO: invalid XOR eye diagram: 0
[21:11:31.871] <TB3> INFO: frame (failed synchr.): 0
[21:11:31.871] <TB3> INFO: idle data (no TBM trl): 0
[21:11:31.871] <TB3> INFO: no data (only TBM hdr): 0
[21:11:31.871] <TB3> INFO: TBM errors: 0
[21:11:31.871] <TB3> INFO: flawed TBM headers: 0
[21:11:31.871] <TB3> INFO: flawed TBM trailers: 0
[21:11:31.871] <TB3> INFO: event ID mismatches: 0
[21:11:31.871] <TB3> INFO: ROC errors: 0
[21:11:31.871] <TB3> INFO: missing ROC header(s): 0
[21:11:31.871] <TB3> INFO: misplaced readback start: 0
[21:11:31.871] <TB3> INFO: Pixel decoding errors: 0
[21:11:31.871] <TB3> INFO: pixel data incomplete: 0
[21:11:31.871] <TB3> INFO: pixel address: 0
[21:11:31.871] <TB3> INFO: pulse height fill bit: 0
[21:11:31.871] <TB3> INFO: buffer corruption: 0
[21:11:31.889] <TB3> INFO: Decoding statistics:
[21:11:31.889] <TB3> INFO: General information:
[21:11:31.889] <TB3> INFO: 16bit words read: 3450204
[21:11:31.889] <TB3> INFO: valid events total: 353536
[21:11:31.889] <TB3> INFO: empty events: 18422
[21:11:31.889] <TB3> INFO: valid events with pixels: 335114
[21:11:31.889] <TB3> INFO: valid pixel hits: 664494
[21:11:31.889] <TB3> INFO: Event errors: 0
[21:11:31.889] <TB3> INFO: start marker: 0
[21:11:31.889] <TB3> INFO: stop marker: 0
[21:11:31.889] <TB3> INFO: overflow: 0
[21:11:31.889] <TB3> INFO: invalid 5bit words: 0
[21:11:31.889] <TB3> INFO: invalid XOR eye diagram: 0
[21:11:31.889] <TB3> INFO: frame (failed synchr.): 0
[21:11:31.889] <TB3> INFO: idle data (no TBM trl): 0
[21:11:31.889] <TB3> INFO: no data (only TBM hdr): 0
[21:11:31.889] <TB3> INFO: TBM errors: 0
[21:11:31.889] <TB3> INFO: flawed TBM headers: 0
[21:11:31.889] <TB3> INFO: flawed TBM trailers: 0
[21:11:31.889] <TB3> INFO: event ID mismatches: 0
[21:11:31.889] <TB3> INFO: ROC errors: 0
[21:11:31.889] <TB3> INFO: missing ROC header(s): 0
[21:11:31.889] <TB3> INFO: misplaced readback start: 0
[21:11:31.889] <TB3> INFO: Pixel decoding errors: 0
[21:11:31.889] <TB3> INFO: pixel data incomplete: 0
[21:11:31.889] <TB3> INFO: pixel address: 0
[21:11:31.889] <TB3> INFO: pulse height fill bit: 0
[21:11:31.889] <TB3> INFO: buffer corruption: 0
[21:11:31.889] <TB3> INFO: enter test to run
[21:11:31.889] <TB3> INFO: test: trim80 no parameter change
[21:11:31.889] <TB3> INFO: running: trim80
[21:11:31.890] <TB3> INFO: ######################################################################
[21:11:31.890] <TB3> INFO: PixTestTrim80::doTest()
[21:11:31.890] <TB3> INFO: ######################################################################
[21:11:31.891] <TB3> INFO: ----------------------------------------------------------------------
[21:11:31.891] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[21:11:31.891] <TB3> INFO: ----------------------------------------------------------------------
[21:11:31.936] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[21:11:31.937] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:11:31.949] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:11:31.949] <TB3> INFO: run 1 of 1
[21:11:32.185] <TB3> INFO: Expecting 5025280 events.
[21:11:59.700] <TB3> INFO: 676192 events read in total (26923ms).
[21:12:26.643] <TB3> INFO: 1348712 events read in total (53866ms).
[21:12:53.868] <TB3> INFO: 2020312 events read in total (81091ms).
[21:13:20.928] <TB3> INFO: 2690088 events read in total (108151ms).
[21:13:48.049] <TB3> INFO: 3360072 events read in total (135272ms).
[21:14:15.498] <TB3> INFO: 4028288 events read in total (162721ms).
[21:14:43.252] <TB3> INFO: 4695544 events read in total (190475ms).
[21:14:56.621] <TB3> INFO: 5025280 events read in total (203844ms).
[21:14:56.693] <TB3> INFO: Test took 204744ms.
[21:15:16.722] <TB3> INFO: ROC 0 VthrComp = 74
[21:15:16.722] <TB3> INFO: ROC 1 VthrComp = 72
[21:15:16.723] <TB3> INFO: ROC 2 VthrComp = 69
[21:15:16.723] <TB3> INFO: ROC 3 VthrComp = 69
[21:15:16.723] <TB3> INFO: ROC 4 VthrComp = 74
[21:15:16.723] <TB3> INFO: ROC 5 VthrComp = 71
[21:15:16.723] <TB3> INFO: ROC 6 VthrComp = 71
[21:15:16.723] <TB3> INFO: ROC 7 VthrComp = 70
[21:15:16.723] <TB3> INFO: ROC 8 VthrComp = 67
[21:15:16.723] <TB3> INFO: ROC 9 VthrComp = 69
[21:15:16.723] <TB3> INFO: ROC 10 VthrComp = 63
[21:15:16.724] <TB3> INFO: ROC 11 VthrComp = 67
[21:15:16.724] <TB3> INFO: ROC 12 VthrComp = 74
[21:15:16.724] <TB3> INFO: ROC 13 VthrComp = 72
[21:15:16.724] <TB3> INFO: ROC 14 VthrComp = 72
[21:15:16.724] <TB3> INFO: ROC 15 VthrComp = 71
[21:15:16.972] <TB3> INFO: Expecting 41600 events.
[21:15:20.451] <TB3> INFO: 41600 events read in total (2888ms).
[21:15:20.452] <TB3> INFO: Test took 3725ms.
[21:15:20.462] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[21:15:20.462] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[21:15:20.472] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:15:20.472] <TB3> INFO: run 1 of 1
[21:15:20.750] <TB3> INFO: Expecting 5025280 events.
[21:15:48.632] <TB3> INFO: 681800 events read in total (27290ms).
[21:16:15.727] <TB3> INFO: 1360328 events read in total (54385ms).
[21:16:42.766] <TB3> INFO: 2038080 events read in total (81424ms).
[21:17:09.883] <TB3> INFO: 2713160 events read in total (108542ms).
[21:17:37.425] <TB3> INFO: 3386232 events read in total (136083ms).
[21:18:04.579] <TB3> INFO: 4056176 events read in total (163237ms).
[21:18:31.633] <TB3> INFO: 4723232 events read in total (190291ms).
[21:18:43.993] <TB3> INFO: 5025280 events read in total (202651ms).
[21:18:44.046] <TB3> INFO: Test took 203573ms.
[21:19:05.853] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 108.719 for pixel 0/50 mean/min/max = 93.6854/78.468/108.903
[21:19:05.854] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 109.197 for pixel 51/77 mean/min/max = 92.7429/76.2817/109.204
[21:19:05.854] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 106.828 for pixel 0/5 mean/min/max = 90.498/74.1249/106.871
[21:19:05.854] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 111.178 for pixel 11/78 mean/min/max = 92.215/73.2249/111.205
[21:19:05.855] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 110.413 for pixel 51/71 mean/min/max = 93.7445/76.9527/110.536
[21:19:05.855] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 116.942 for pixel 6/78 mean/min/max = 95.1778/72.3861/117.969
[21:19:05.855] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 105.15 for pixel 2/79 mean/min/max = 89.7932/74.419/105.167
[21:19:05.856] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 114.684 for pixel 2/70 mean/min/max = 93.9216/73.1065/114.737
[21:19:05.856] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 104.595 for pixel 0/11 mean/min/max = 89.4553/74.1953/104.715
[21:19:05.856] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 107.611 for pixel 0/44 mean/min/max = 90.4293/73.1487/107.71
[21:19:05.857] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 105.034 for pixel 0/69 mean/min/max = 89.7239/74.0371/105.411
[21:19:05.857] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 103.622 for pixel 51/34 mean/min/max = 89.0965/74.1891/104.004
[21:19:05.857] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 108.223 for pixel 4/4 mean/min/max = 92.3004/76.2566/108.344
[21:19:05.858] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 107.818 for pixel 0/77 mean/min/max = 92.2049/76.4421/107.968
[21:19:05.858] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 106.066 for pixel 0/34 mean/min/max = 91.1054/75.9937/106.217
[21:19:05.858] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 104.249 for pixel 0/61 mean/min/max = 88.911/73.5294/104.293
[21:19:05.859] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[21:19:05.949] <TB3> INFO: Expecting 411648 events.
[21:19:15.466] <TB3> INFO: 411648 events read in total (8926ms).
[21:19:15.476] <TB3> INFO: Expecting 411648 events.
[21:19:24.826] <TB3> INFO: 411648 events read in total (8947ms).
[21:19:24.837] <TB3> INFO: Expecting 411648 events.
[21:19:33.996] <TB3> INFO: 411648 events read in total (8756ms).
[21:19:34.013] <TB3> INFO: Expecting 411648 events.
[21:19:43.250] <TB3> INFO: 411648 events read in total (8834ms).
[21:19:43.266] <TB3> INFO: Expecting 411648 events.
[21:19:52.697] <TB3> INFO: 411648 events read in total (9028ms).
[21:19:52.721] <TB3> INFO: Expecting 411648 events.
[21:20:01.911] <TB3> INFO: 411648 events read in total (8787ms).
[21:20:01.938] <TB3> INFO: Expecting 411648 events.
[21:20:11.290] <TB3> INFO: 411648 events read in total (8949ms).
[21:20:11.316] <TB3> INFO: Expecting 411648 events.
[21:20:20.582] <TB3> INFO: 411648 events read in total (8863ms).
[21:20:20.609] <TB3> INFO: Expecting 411648 events.
[21:20:29.874] <TB3> INFO: 411648 events read in total (8862ms).
[21:20:29.903] <TB3> INFO: Expecting 411648 events.
[21:20:39.241] <TB3> INFO: 411648 events read in total (8935ms).
[21:20:39.288] <TB3> INFO: Expecting 411648 events.
[21:20:48.650] <TB3> INFO: 411648 events read in total (8958ms).
[21:20:48.692] <TB3> INFO: Expecting 411648 events.
[21:20:57.917] <TB3> INFO: 411648 events read in total (8822ms).
[21:20:57.959] <TB3> INFO: Expecting 411648 events.
[21:21:07.335] <TB3> INFO: 411648 events read in total (8972ms).
[21:21:07.388] <TB3> INFO: Expecting 411648 events.
[21:21:16.568] <TB3> INFO: 411648 events read in total (8777ms).
[21:21:16.776] <TB3> INFO: Expecting 411648 events.
[21:21:25.952] <TB3> INFO: 411648 events read in total (8773ms).
[21:21:25.003] <TB3> INFO: Expecting 411648 events.
[21:21:35.154] <TB3> INFO: 411648 events read in total (8748ms).
[21:21:35.208] <TB3> INFO: Test took 149349ms.
[21:21:36.640] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[21:21:36.652] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:21:36.653] <TB3> INFO: run 1 of 1
[21:21:36.891] <TB3> INFO: Expecting 5025280 events.
[21:22:04.559] <TB3> INFO: 669016 events read in total (27077ms).
[21:22:31.406] <TB3> INFO: 1336416 events read in total (53925ms).
[21:22:58.460] <TB3> INFO: 2002648 events read in total (80979ms).
[21:23:25.526] <TB3> INFO: 2666264 events read in total (108044ms).
[21:23:52.286] <TB3> INFO: 3325144 events read in total (134804ms).
[21:24:19.350] <TB3> INFO: 3982632 events read in total (161868ms).
[21:24:45.967] <TB3> INFO: 4637312 events read in total (188485ms).
[21:25:02.012] <TB3> INFO: 5025280 events read in total (204530ms).
[21:25:02.070] <TB3> INFO: Test took 205417ms.
[21:25:23.968] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 51.000814 .. 102.551144
[21:25:24.208] <TB3> INFO: Expecting 208000 events.
[21:25:33.933] <TB3> INFO: 208000 events read in total (9133ms).
[21:25:33.934] <TB3> INFO: Test took 9965ms.
[21:25:33.982] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 41 .. 112 (-1/-1) hits flags = 528 (plus default)
[21:25:33.996] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:25:33.996] <TB3> INFO: run 1 of 1
[21:25:34.275] <TB3> INFO: Expecting 2396160 events.
[21:26:02.366] <TB3> INFO: 687072 events read in total (27499ms).
[21:26:30.204] <TB3> INFO: 1372160 events read in total (55337ms).
[21:26:57.989] <TB3> INFO: 2050328 events read in total (83122ms).
[21:27:12.208] <TB3> INFO: 2396160 events read in total (97341ms).
[21:27:12.254] <TB3> INFO: Test took 98257ms.
[21:27:31.405] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 60.563509 .. 91.033362
[21:27:31.646] <TB3> INFO: Expecting 208000 events.
[21:27:41.362] <TB3> INFO: 208000 events read in total (9124ms).
[21:27:41.364] <TB3> INFO: Test took 9957ms.
[21:27:41.418] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 50 .. 101 (-1/-1) hits flags = 528 (plus default)
[21:27:41.431] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:27:41.431] <TB3> INFO: run 1 of 1
[21:27:41.709] <TB3> INFO: Expecting 1730560 events.
[21:28:10.118] <TB3> INFO: 698856 events read in total (27817ms).
[21:28:38.421] <TB3> INFO: 1398240 events read in total (56120ms).
[21:28:52.203] <TB3> INFO: 1730560 events read in total (69902ms).
[21:28:52.244] <TB3> INFO: Test took 70812ms.
[21:29:10.332] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 64.034280 .. 86.863739
[21:29:10.661] <TB3> INFO: Expecting 208000 events.
[21:29:20.832] <TB3> INFO: 208000 events read in total (9580ms).
[21:29:20.833] <TB3> INFO: Test took 10497ms.
[21:29:20.880] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 54 .. 96 (-1/-1) hits flags = 528 (plus default)
[21:29:20.894] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:29:20.894] <TB3> INFO: run 1 of 1
[21:29:21.173] <TB3> INFO: Expecting 1431040 events.
[21:29:49.900] <TB3> INFO: 710688 events read in total (28136ms).
[21:30:18.182] <TB3> INFO: 1420624 events read in total (56418ms).
[21:30:19.053] <TB3> INFO: 1431040 events read in total (57289ms).
[21:30:19.076] <TB3> INFO: Test took 58182ms.
[21:30:35.372] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 66.080945 .. 86.281795
[21:30:35.612] <TB3> INFO: Expecting 208000 events.
[21:30:45.548] <TB3> INFO: 208000 events read in total (9344ms).
[21:30:45.549] <TB3> INFO: Test took 10175ms.
[21:30:45.600] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 56 .. 96 (-1/-1) hits flags = 528 (plus default)
[21:30:45.614] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:30:45.614] <TB3> INFO: run 1 of 1
[21:30:45.900] <TB3> INFO: Expecting 1364480 events.
[21:31:14.994] <TB3> INFO: 705032 events read in total (28502ms).
[21:31:41.599] <TB3> INFO: 1364480 events read in total (55107ms).
[21:31:41.626] <TB3> INFO: Test took 56013ms.
[21:31:58.420] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[21:31:58.420] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[21:31:58.434] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[21:31:58.434] <TB3> INFO: run 1 of 1
[21:31:58.676] <TB3> INFO: Expecting 1364480 events.
[21:32:27.127] <TB3> INFO: 669232 events read in total (27859ms).
[21:32:55.356] <TB3> INFO: 1338168 events read in total (56088ms).
[21:32:56.823] <TB3> INFO: 1364480 events read in total (57555ms).
[21:32:56.851] <TB3> INFO: Test took 58417ms.
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C0.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C1.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C2.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C3.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C4.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C5.dat
[21:33:13.277] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C6.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C7.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C8.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C9.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C10.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C11.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C12.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C13.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C14.dat
[21:33:13.278] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//dacParameters80_C15.dat
[21:33:13.278] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C0.dat
[21:33:13.283] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C1.dat
[21:33:13.288] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C2.dat
[21:33:13.293] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C3.dat
[21:33:13.297] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C4.dat
[21:33:13.302] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C5.dat
[21:33:13.307] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C6.dat
[21:33:13.312] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C7.dat
[21:33:13.316] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C8.dat
[21:33:13.321] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C9.dat
[21:33:13.326] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C10.dat
[21:33:13.330] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C11.dat
[21:33:13.335] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C12.dat
[21:33:13.340] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C13.dat
[21:33:13.345] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C14.dat
[21:33:13.349] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1096_FullQualification_2016-10-26_17h20m_1477495221//003_FulltestTrim80_p17//trimParameters80_C15.dat
[21:33:13.354] <TB3> INFO: PixTestTrim80::trimTest() done
[21:33:13.354] <TB3> INFO: vtrim: 99 112 88 102 99 138 93 118 82 87 73 75 98 87 79 88
[21:33:13.354] <TB3> INFO: vthrcomp: 74 72 69 69 74 71 71 70 67 69 63 67 74 72 72 71
[21:33:13.354] <TB3> INFO: vcal mean: 80.01 80.02 80.00 80.00 80.01 79.99 80.01 79.99 79.94 80.01 79.96 79.97 80.01 80.05 80.00 79.99
[21:33:13.354] <TB3> INFO: vcal RMS: 0.75 0.72 0.74 0.78 0.75 0.81 0.75 0.82 0.73 0.75 0.74 0.76 0.74 0.73 0.71 0.83
[21:33:13.354] <TB3> INFO: bits mean: 9.49 9.85 10.22 10.27 9.55 10.04 10.03 10.24 10.37 10.08 10.11 10.68 9.70 9.49 9.69 10.55
[21:33:13.354] <TB3> INFO: bits RMS: 2.13 2.21 2.44 2.46 2.30 2.56 2.57 2.39 2.43 2.65 2.60 2.33 2.31 2.40 2.39 2.48
[21:33:13.361] <TB3> INFO: ----------------------------------------------------------------------
[21:33:13.361] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[21:33:13.361] <TB3> INFO: ----------------------------------------------------------------------
[21:33:13.364] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:33:13.376] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[21:33:13.376] <TB3> INFO: run 1 of 1
[21:33:13.612] <TB3> INFO: Expecting 4160000 events.
[21:33:45.879] <TB3> INFO: 745345 events read in total (31675ms).
[21:34:17.307] <TB3> INFO: 1486690 events read in total (63103ms).
[21:34:48.282] <TB3> INFO: 2224545 events read in total (94078ms).
[21:35:20.027] <TB3> INFO: 2958980 events read in total (125823ms).
[21:35:51.136] <TB3> INFO: 3688090 events read in total (156932ms).
[21:36:11.129] <TB3> INFO: 4160000 events read in total (176925ms).
[21:36:11.198] <TB3> INFO: Test took 177822ms.
[21:36:35.475] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[21:36:35.489] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[21:36:35.489] <TB3> INFO: run 1 of 1
[21:36:35.727] <TB3> INFO: Expecting 4243200 events.
[21:37:07.220] <TB3> INFO: 714685 events read in total (30901ms).
[21:37:38.290] <TB3> INFO: 1425820 events read in total (61971ms).
[21:38:09.413] <TB3> INFO: 2135085 events read in total (93094ms).
[21:38:40.215] <TB3> INFO: 2840485 events read in total (123896ms).
[21:39:11.310] <TB3> INFO: 3542075 events read in total (154991ms).
[21:39:42.090] <TB3> INFO: 4243200 events read in total (185771ms).
[21:39:42.194] <TB3> INFO: Test took 186705ms.
[21:40:09.095] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[21:40:09.109] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[21:40:09.109] <TB3> INFO: run 1 of 1
[21:40:09.393] <TB3> INFO: Expecting 4160000 events.
[21:40:41.168] <TB3> INFO: 719735 events read in total (31183ms).
[21:41:12.309] <TB3> INFO: 1436610 events read in total (62324ms).
[21:41:43.337] <TB3> INFO: 2150215 events read in total (93352ms).
[21:42:13.938] <TB3> INFO: 2859900 events read in total (123953ms).
[21:42:45.667] <TB3> INFO: 3565735 events read in total (155682ms).
[21:43:11.894] <TB3> INFO: 4160000 events read in total (181909ms).
[21:43:11.994] <TB3> INFO: Test took 182885ms.
[21:43:38.980] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[21:43:38.993] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[21:43:38.993] <TB3> INFO: run 1 of 1
[21:43:39.271] <TB3> INFO: Expecting 4035200 events.
[21:44:11.479] <TB3> INFO: 727315 events read in total (31616ms).
[21:44:42.745] <TB3> INFO: 1451875 events read in total (62882ms).
[21:45:14.273] <TB3> INFO: 2172610 events read in total (94411ms).
[21:45:45.636] <TB3> INFO: 2889590 events read in total (125773ms).
[21:46:16.934] <TB3> INFO: 3602420 events read in total (157071ms).
[21:46:35.820] <TB3> INFO: 4035200 events read in total (175957ms).
[21:46:35.880] <TB3> INFO: Test took 176886ms.
[21:46:58.919] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[21:46:58.932] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[21:46:58.932] <TB3> INFO: run 1 of 1
[21:46:59.170] <TB3> INFO: Expecting 4035200 events.
[21:47:32.116] <TB3> INFO: 728155 events read in total (32355ms).
[21:48:04.434] <TB3> INFO: 1452380 events read in total (64673ms).
[21:48:36.341] <TB3> INFO: 2173665 events read in total (96580ms).
[21:49:08.205] <TB3> INFO: 2891100 events read in total (128444ms).
[21:49:39.425] <TB3> INFO: 3604420 events read in total (159664ms).
[21:49:58.638] <TB3> INFO: 4035200 events read in total (178877ms).
[21:49:58.694] <TB3> INFO: Test took 179761ms.
[21:50:20.899] <TB3> INFO: PixTestTrim80::trimBitTest() done
[21:50:20.900] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2329 seconds
[21:50:21.514] <TB3> INFO: enter test to run
[21:50:21.514] <TB3> INFO: test: exit no parameter change
[21:50:21.698] <TB3> QUIET: Connection to board 126 closed.
[21:50:21.699] <TB3> INFO: pXar: this is the end, my friend