[19:01:56.913] <TB0> INFO: *** Welcome to pxar ***
[19:01:56.913] <TB0> INFO: *** Today: 2016/10/26
[19:01:56.919] <TB0> INFO: *** Version: c8ba-dirty
[19:01:56.919] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C15.dat
[19:01:56.920] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[19:01:56.920] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//defaultMaskFile.dat
[19:01:56.920] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters_C15.dat
[19:01:56.975] <TB0> INFO: clk: 4
[19:01:56.975] <TB0> INFO: ctr: 4
[19:01:56.975] <TB0> INFO: sda: 19
[19:01:56.975] <TB0> INFO: tin: 9
[19:01:56.975] <TB0> INFO: level: 15
[19:01:56.975] <TB0> INFO: triggerdelay: 0
[19:01:56.975] <TB0> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[19:01:56.975] <TB0> INFO: Log level: INFO
[19:01:56.984] <TB0> INFO: Found DTB DTB_WS6AYH
[19:01:56.991] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[19:01:56.993] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
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[19:01:56.995] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[19:01:58.480] <TB0> INFO: DUT info:
[19:01:58.481] <TB0> INFO: The DUT currently contains the following objects:
[19:01:58.481] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[19:01:58.481] <TB0> INFO: TBM Core alpha (0): 7 registers set
[19:01:58.481] <TB0> INFO: TBM Core beta (1): 7 registers set
[19:01:58.481] <TB0> INFO: TBM Core alpha (2): 7 registers set
[19:01:58.481] <TB0> INFO: TBM Core beta (3): 7 registers set
[19:01:58.481] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:01:58.481] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.481] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:01:58.881] <TB0> INFO: enter 'restricted' command line mode
[19:01:58.881] <TB0> INFO: enter test to run
[19:01:58.882] <TB0> INFO: test: pretest no parameter change
[19:01:58.882] <TB0> INFO: running: pretest
[19:01:59.447] <TB0> INFO: ######################################################################
[19:01:59.447] <TB0> INFO: PixTestPretest::doTest()
[19:01:59.447] <TB0> INFO: ######################################################################
[19:01:59.448] <TB0> INFO: ----------------------------------------------------------------------
[19:01:59.448] <TB0> INFO: PixTestPretest::programROC()
[19:01:59.448] <TB0> INFO: ----------------------------------------------------------------------
[19:02:17.462] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:02:17.462] <TB0> INFO: IA differences per ROC: 20.1 20.9 17.7 16.1 17.7 16.9 19.3 16.1 19.3 16.9 17.7 18.5 19.3 17.7 19.3 16.1
[19:02:17.495] <TB0> INFO: ----------------------------------------------------------------------
[19:02:17.495] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:02:17.495] <TB0> INFO: ----------------------------------------------------------------------
[19:02:38.737] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 377 mA = 23.5625 mA/ROC
[19:02:38.738] <TB0> INFO: i(loss) [mA/ROC]: 18.5 19.3 18.5 18.5 17.7 19.3 18.5 18.5 18.5 17.7 18.5 18.5 18.5 18.5 19.3 19.3
[19:02:38.765] <TB0> INFO: ----------------------------------------------------------------------
[19:02:38.765] <TB0> INFO: PixTestPretest::findTiming()
[19:02:38.765] <TB0> INFO: ----------------------------------------------------------------------
[19:02:38.765] <TB0> INFO: PixTestCmd::init()

[19:03:09.856] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:03:09.856] <TB0> INFO: (success/tries = 100/100), width = 3
[19:03:11.360] <TB0> INFO: ----------------------------------------------------------------------
[19:03:11.360] <TB0> INFO: PixTestPretest::findWorkingPixel()
[19:03:11.360] <TB0> INFO: ----------------------------------------------------------------------
[19:03:11.452] <TB0> INFO: Expecting 231680 events.
[19:03:21.141] <TB0> INFO: 231680 events read in total (9098ms).
[19:03:21.150] <TB0> INFO: Test took 9788ms.
[19:03:21.397] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:03:21.431] <TB0> INFO: ----------------------------------------------------------------------
[19:03:21.431] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[19:03:21.431] <TB0> INFO: ----------------------------------------------------------------------
[19:03:21.524] <TB0> INFO: Expecting 231680 events.
[19:03:31.229] <TB0> INFO: 231680 events read in total (9113ms).
[19:03:31.240] <TB0> INFO: Test took 9804ms.
[19:03:31.497] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[19:03:31.498] <TB0> INFO: CalDel: 80 89 68 77 68 82 78 79 112 84 89 72 88 91 92 100
[19:03:31.498] <TB0> INFO: VthrComp: 51 51 54 51 51 51 51 51 51 51 51 52 51 51 51 51
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C0.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C1.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C2.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C3.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C4.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C5.dat
[19:03:31.500] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C6.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C7.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C8.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C9.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C10.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C11.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C12.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C13.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C14.dat
[19:03:31.501] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters_C15.dat
[19:03:31.501] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[19:03:31.502] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[19:03:31.502] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[19:03:31.502] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[19:03:31.502] <TB0> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[19:03:31.599] <TB0> INFO: enter test to run
[19:03:31.599] <TB0> INFO: test: fulltest no parameter change
[19:03:31.599] <TB0> INFO: running: fulltest
[19:03:31.599] <TB0> INFO: ######################################################################
[19:03:31.599] <TB0> INFO: PixTestFullTest::doTest()
[19:03:31.600] <TB0> INFO: ######################################################################
[19:03:31.601] <TB0> INFO: ######################################################################
[19:03:31.601] <TB0> INFO: PixTestAlive::doTest()
[19:03:31.601] <TB0> INFO: ######################################################################
[19:03:31.602] <TB0> INFO: ----------------------------------------------------------------------
[19:03:31.602] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:03:31.602] <TB0> INFO: ----------------------------------------------------------------------
[19:03:31.866] <TB0> INFO: Expecting 41600 events.
[19:03:35.371] <TB0> INFO: 41600 events read in total (2913ms).
[19:03:35.371] <TB0> INFO: Test took 3768ms.
[19:03:35.596] <TB0> INFO: PixTestAlive::aliveTest() done
[19:03:35.596] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:03:35.597] <TB0> INFO: ----------------------------------------------------------------------
[19:03:35.597] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:03:35.597] <TB0> INFO: ----------------------------------------------------------------------
[19:03:35.831] <TB0> INFO: Expecting 41600 events.
[19:03:38.741] <TB0> INFO: 41600 events read in total (2319ms).
[19:03:38.741] <TB0> INFO: Test took 3142ms.
[19:03:38.742] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:03:38.990] <TB0> INFO: PixTestAlive::maskTest() done
[19:03:38.990] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:03:38.991] <TB0> INFO: ----------------------------------------------------------------------
[19:03:38.991] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:03:38.991] <TB0> INFO: ----------------------------------------------------------------------
[19:03:39.247] <TB0> INFO: Expecting 41600 events.
[19:03:42.705] <TB0> INFO: 41600 events read in total (2867ms).
[19:03:42.706] <TB0> INFO: Test took 3713ms.
[19:03:42.932] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[19:03:42.932] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:03:42.932] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:03:42.932] <TB0> INFO: Decoding statistics:
[19:03:42.932] <TB0> INFO: General information:
[19:03:42.933] <TB0> INFO: 16bit words read: 0
[19:03:42.933] <TB0> INFO: valid events total: 0
[19:03:42.933] <TB0> INFO: empty events: 0
[19:03:42.933] <TB0> INFO: valid events with pixels: 0
[19:03:42.933] <TB0> INFO: valid pixel hits: 0
[19:03:42.933] <TB0> INFO: Event errors: 0
[19:03:42.933] <TB0> INFO: start marker: 0
[19:03:42.933] <TB0> INFO: stop marker: 0
[19:03:42.933] <TB0> INFO: overflow: 0
[19:03:42.933] <TB0> INFO: invalid 5bit words: 0
[19:03:42.933] <TB0> INFO: invalid XOR eye diagram: 0
[19:03:42.933] <TB0> INFO: frame (failed synchr.): 0
[19:03:42.933] <TB0> INFO: idle data (no TBM trl): 0
[19:03:42.933] <TB0> INFO: no data (only TBM hdr): 0
[19:03:42.933] <TB0> INFO: TBM errors: 0
[19:03:42.933] <TB0> INFO: flawed TBM headers: 0
[19:03:42.933] <TB0> INFO: flawed TBM trailers: 0
[19:03:42.933] <TB0> INFO: event ID mismatches: 0
[19:03:42.933] <TB0> INFO: ROC errors: 0
[19:03:42.933] <TB0> INFO: missing ROC header(s): 0
[19:03:42.933] <TB0> INFO: misplaced readback start: 0
[19:03:42.933] <TB0> INFO: Pixel decoding errors: 0
[19:03:42.933] <TB0> INFO: pixel data incomplete: 0
[19:03:42.933] <TB0> INFO: pixel address: 0
[19:03:42.933] <TB0> INFO: pulse height fill bit: 0
[19:03:42.933] <TB0> INFO: buffer corruption: 0
[19:03:42.939] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:03:42.940] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[19:03:42.940] <TB0> INFO: ######################################################################
[19:03:42.940] <TB0> INFO: PixTestReadback::doTest()
[19:03:42.940] <TB0> INFO: ######################################################################
[19:03:42.940] <TB0> INFO: ----------------------------------------------------------------------
[19:03:42.940] <TB0> INFO: PixTestReadback::CalibrateVd()
[19:03:42.940] <TB0> INFO: ----------------------------------------------------------------------
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:03:52.896] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:03:52.897] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:03:52.924] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:03:52.924] <TB0> INFO: ----------------------------------------------------------------------
[19:03:52.924] <TB0> INFO: PixTestReadback::CalibrateVa()
[19:03:52.924] <TB0> INFO: ----------------------------------------------------------------------
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:04:02.813] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:04:02.814] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:04:02.841] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:04:02.841] <TB0> INFO: ----------------------------------------------------------------------
[19:04:02.841] <TB0> INFO: PixTestReadback::readbackVbg()
[19:04:02.841] <TB0> INFO: ----------------------------------------------------------------------
[19:04:10.481] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:04:10.481] <TB0> INFO: ----------------------------------------------------------------------
[19:04:10.481] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[19:04:10.481] <TB0> INFO: ----------------------------------------------------------------------
[19:04:10.481] <TB0> INFO: Vbg will be calibrated using Vd calibration
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.2calibrated Vbg = 1.19774 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160.5calibrated Vbg = 1.19342 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.8calibrated Vbg = 1.18634 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.5calibrated Vbg = 1.18287 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.2calibrated Vbg = 1.19325 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.9calibrated Vbg = 1.19134 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 146calibrated Vbg = 1.193 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 150.6calibrated Vbg = 1.19298 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.7calibrated Vbg = 1.19792 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 148.7calibrated Vbg = 1.19136 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 158.4calibrated Vbg = 1.18228 :::*/*/*/*/
[19:04:10.481] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.6calibrated Vbg = 1.18351 :::*/*/*/*/
[19:04:10.482] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.2calibrated Vbg = 1.19036 :::*/*/*/*/
[19:04:10.482] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.5calibrated Vbg = 1.18572 :::*/*/*/*/
[19:04:10.482] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.5calibrated Vbg = 1.18703 :::*/*/*/*/
[19:04:10.482] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146.8calibrated Vbg = 1.19184 :::*/*/*/*/
[19:04:10.483] <TB0> INFO: ----------------------------------------------------------------------
[19:04:10.484] <TB0> INFO: PixTestReadback::CalibrateIa()
[19:04:10.484] <TB0> INFO: ----------------------------------------------------------------------
[19:06:50.806] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C0.dat
[19:06:50.806] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C1.dat
[19:06:50.806] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C2.dat
[19:06:50.806] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C3.dat
[19:06:50.806] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C4.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C5.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C6.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C7.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C8.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C9.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C10.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C11.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C12.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C13.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C14.dat
[19:06:50.807] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//readbackCal_C15.dat
[19:06:50.835] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:06:50.836] <TB0> INFO: PixTestReadback::doTest() done
[19:06:50.836] <TB0> INFO: Decoding statistics:
[19:06:50.836] <TB0> INFO: General information:
[19:06:50.836] <TB0> INFO: 16bit words read: 1536
[19:06:50.836] <TB0> INFO: valid events total: 256
[19:06:50.836] <TB0> INFO: empty events: 256
[19:06:50.836] <TB0> INFO: valid events with pixels: 0
[19:06:50.836] <TB0> INFO: valid pixel hits: 0
[19:06:50.836] <TB0> INFO: Event errors: 0
[19:06:50.836] <TB0> INFO: start marker: 0
[19:06:50.836] <TB0> INFO: stop marker: 0
[19:06:50.836] <TB0> INFO: overflow: 0
[19:06:50.836] <TB0> INFO: invalid 5bit words: 0
[19:06:50.836] <TB0> INFO: invalid XOR eye diagram: 0
[19:06:50.836] <TB0> INFO: frame (failed synchr.): 0
[19:06:50.836] <TB0> INFO: idle data (no TBM trl): 0
[19:06:50.836] <TB0> INFO: no data (only TBM hdr): 0
[19:06:50.836] <TB0> INFO: TBM errors: 0
[19:06:50.836] <TB0> INFO: flawed TBM headers: 0
[19:06:50.836] <TB0> INFO: flawed TBM trailers: 0
[19:06:50.836] <TB0> INFO: event ID mismatches: 0
[19:06:50.836] <TB0> INFO: ROC errors: 0
[19:06:50.836] <TB0> INFO: missing ROC header(s): 0
[19:06:50.836] <TB0> INFO: misplaced readback start: 0
[19:06:50.836] <TB0> INFO: Pixel decoding errors: 0
[19:06:50.836] <TB0> INFO: pixel data incomplete: 0
[19:06:50.836] <TB0> INFO: pixel address: 0
[19:06:50.836] <TB0> INFO: pulse height fill bit: 0
[19:06:50.836] <TB0> INFO: buffer corruption: 0
[19:06:50.871] <TB0> INFO: ######################################################################
[19:06:50.871] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:06:50.871] <TB0> INFO: ######################################################################
[19:06:50.874] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:06:50.888] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:06:50.888] <TB0> INFO: run 1 of 1
[19:06:51.124] <TB0> INFO: Expecting 3120000 events.
[19:07:21.332] <TB0> INFO: 666275 events read in total (29617ms).











[19:07:50.691] <TB0> INFO: 1325335 events read in total (58977ms).











[19:08:20.086] <TB0> INFO: 1981105 events read in total (88371ms).











[19:08:49.425] <TB0> INFO: 2634645 events read in total (117710ms).











[19:09:11.389] <TB0> INFO: 3120000 events read in total (139674ms).
[19:09:11.442] <TB0> INFO: Test took 140555ms.
[19:09:38.872] <TB0> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 168 seconds
[19:09:38.872] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[19:09:38.872] <TB0> INFO: separation cut (per ROC): 109 106 109 106 103 104 102 102 91 102 106 114 107 106 102 105
[19:09:38.872] <TB0> INFO: Decoding statistics:
[19:09:38.872] <TB0> INFO: General information:
[19:09:38.872] <TB0> INFO: 16bit words read: 0
[19:09:38.872] <TB0> INFO: valid events total: 0
[19:09:38.872] <TB0> INFO: empty events: 0
[19:09:38.872] <TB0> INFO: valid events with pixels: 0
[19:09:38.872] <TB0> INFO: valid pixel hits: 0
[19:09:38.872] <TB0> INFO: Event errors: 0
[19:09:38.872] <TB0> INFO: start marker: 0
[19:09:38.872] <TB0> INFO: stop marker: 0
[19:09:38.872] <TB0> INFO: overflow: 0
[19:09:38.872] <TB0> INFO: invalid 5bit words: 0
[19:09:38.872] <TB0> INFO: invalid XOR eye diagram: 0
[19:09:38.872] <TB0> INFO: frame (failed synchr.): 0
[19:09:38.872] <TB0> INFO: idle data (no TBM trl): 0
[19:09:38.872] <TB0> INFO: no data (only TBM hdr): 0
[19:09:38.872] <TB0> INFO: TBM errors: 0
[19:09:38.872] <TB0> INFO: flawed TBM headers: 0
[19:09:38.872] <TB0> INFO: flawed TBM trailers: 0
[19:09:38.872] <TB0> INFO: event ID mismatches: 0
[19:09:38.872] <TB0> INFO: ROC errors: 0
[19:09:38.872] <TB0> INFO: missing ROC header(s): 0
[19:09:38.872] <TB0> INFO: misplaced readback start: 0
[19:09:38.872] <TB0> INFO: Pixel decoding errors: 0
[19:09:38.872] <TB0> INFO: pixel data incomplete: 0
[19:09:38.872] <TB0> INFO: pixel address: 0
[19:09:38.872] <TB0> INFO: pulse height fill bit: 0
[19:09:38.872] <TB0> INFO: buffer corruption: 0
[19:09:38.921] <TB0> INFO: ######################################################################
[19:09:38.921] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:09:38.921] <TB0> INFO: ######################################################################
[19:09:38.921] <TB0> INFO: ----------------------------------------------------------------------
[19:09:38.921] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:09:38.921] <TB0> INFO: ----------------------------------------------------------------------
[19:09:38.921] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:09:38.933] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[19:09:38.933] <TB0> INFO: run 1 of 1
[19:09:39.242] <TB0> INFO: Expecting 36608000 events.
[19:10:02.215] <TB0> INFO: 685350 events read in total (22381ms).
[19:10:24.557] <TB0> INFO: 1356800 events read in total (44723ms).
[19:10:46.879] <TB0> INFO: 2030400 events read in total (67045ms).
[19:11:09.335] <TB0> INFO: 2702200 events read in total (89501ms).
[19:11:32.109] <TB0> INFO: 3375450 events read in total (112276ms).
[19:11:54.679] <TB0> INFO: 4046700 events read in total (134845ms).
[19:12:17.331] <TB0> INFO: 4719350 events read in total (157497ms).
[19:12:39.709] <TB0> INFO: 5392000 events read in total (179875ms).
[19:13:02.193] <TB0> INFO: 6063100 events read in total (202359ms).
[19:13:24.775] <TB0> INFO: 6736950 events read in total (224941ms).
[19:13:47.327] <TB0> INFO: 7407800 events read in total (247493ms).
[19:14:09.743] <TB0> INFO: 8079550 events read in total (269909ms).
[19:14:32.313] <TB0> INFO: 8752050 events read in total (292479ms).
[19:14:54.900] <TB0> INFO: 9423500 events read in total (315066ms).
[19:15:17.417] <TB0> INFO: 10096900 events read in total (337583ms).
[19:15:40.161] <TB0> INFO: 10769750 events read in total (360327ms).
[19:16:02.990] <TB0> INFO: 11442900 events read in total (383156ms).
[19:16:25.585] <TB0> INFO: 12114000 events read in total (405751ms).
[19:16:47.815] <TB0> INFO: 12784500 events read in total (427981ms).
[19:17:10.135] <TB0> INFO: 13454500 events read in total (450301ms).
[19:17:32.594] <TB0> INFO: 14125050 events read in total (472760ms).
[19:17:55.165] <TB0> INFO: 14796550 events read in total (495331ms).
[19:18:17.710] <TB0> INFO: 15467100 events read in total (517876ms).
[19:18:40.101] <TB0> INFO: 16137350 events read in total (540267ms).
[19:19:02.723] <TB0> INFO: 16806400 events read in total (562889ms).
[19:19:25.479] <TB0> INFO: 17476100 events read in total (585645ms).
[19:19:48.099] <TB0> INFO: 18145350 events read in total (608265ms).
[19:20:10.633] <TB0> INFO: 18814150 events read in total (630799ms).
[19:20:33.279] <TB0> INFO: 19482400 events read in total (653445ms).
[19:20:55.769] <TB0> INFO: 20150450 events read in total (675935ms).
[19:21:18.508] <TB0> INFO: 20818750 events read in total (698674ms).
[19:21:41.186] <TB0> INFO: 21486750 events read in total (721352ms).
[19:22:03.945] <TB0> INFO: 22154800 events read in total (744112ms).
[19:22:26.301] <TB0> INFO: 22822150 events read in total (766467ms).
[19:22:48.699] <TB0> INFO: 23488150 events read in total (788865ms).
[19:23:11.376] <TB0> INFO: 24154600 events read in total (811542ms).
[19:23:33.869] <TB0> INFO: 24821600 events read in total (834035ms).
[19:23:56.374] <TB0> INFO: 25487550 events read in total (856540ms).
[19:24:18.889] <TB0> INFO: 26152350 events read in total (879055ms).
[19:24:41.526] <TB0> INFO: 26818250 events read in total (901692ms).
[19:25:04.372] <TB0> INFO: 27482450 events read in total (924538ms).
[19:25:27.170] <TB0> INFO: 28147550 events read in total (947336ms).
[19:25:49.535] <TB0> INFO: 28813150 events read in total (969701ms).
[19:26:11.940] <TB0> INFO: 29478800 events read in total (992106ms).
[19:26:34.249] <TB0> INFO: 30144250 events read in total (1014415ms).
[19:26:56.934] <TB0> INFO: 30809800 events read in total (1037100ms).
[19:27:19.154] <TB0> INFO: 31475550 events read in total (1059320ms).
[19:27:41.727] <TB0> INFO: 32142250 events read in total (1081893ms).
[19:28:04.561] <TB0> INFO: 32809850 events read in total (1104727ms).
[19:28:27.319] <TB0> INFO: 33477850 events read in total (1127485ms).
[19:28:49.599] <TB0> INFO: 34146050 events read in total (1149765ms).
[19:29:12.282] <TB0> INFO: 34813100 events read in total (1172448ms).
[19:29:35.088] <TB0> INFO: 35482650 events read in total (1195254ms).
[19:29:57.497] <TB0> INFO: 36158500 events read in total (1217663ms).
[19:30:12.364] <TB0> INFO: 36608000 events read in total (1232530ms).
[19:30:12.413] <TB0> INFO: Test took 1233479ms.
[19:30:12.781] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:14.467] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:16.313] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:18.287] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:20.237] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:22.039] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:23.721] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:25.628] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:27.581] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:29.516] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:31.269] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:33.152] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:35.101] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:37.097] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:38.914] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:40.745] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[19:30:42.847] <TB0> INFO: PixTestScurves::scurves() done
[19:30:42.847] <TB0> INFO: Vcal mean: 129.50 133.07 131.67 127.62 119.62 119.69 124.58 118.44 111.83 118.18 123.31 129.82 118.24 117.96 122.34 113.51
[19:30:42.847] <TB0> INFO: Vcal RMS: 6.19 6.24 5.95 6.65 5.49 6.21 5.63 5.66 4.32 5.33 6.34 6.10 5.26 5.63 6.21 5.31
[19:30:42.847] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1263 seconds
[19:30:42.847] <TB0> INFO: Decoding statistics:
[19:30:42.847] <TB0> INFO: General information:
[19:30:42.847] <TB0> INFO: 16bit words read: 0
[19:30:42.847] <TB0> INFO: valid events total: 0
[19:30:42.847] <TB0> INFO: empty events: 0
[19:30:42.847] <TB0> INFO: valid events with pixels: 0
[19:30:42.847] <TB0> INFO: valid pixel hits: 0
[19:30:42.847] <TB0> INFO: Event errors: 0
[19:30:42.847] <TB0> INFO: start marker: 0
[19:30:42.847] <TB0> INFO: stop marker: 0
[19:30:42.847] <TB0> INFO: overflow: 0
[19:30:42.847] <TB0> INFO: invalid 5bit words: 0
[19:30:42.847] <TB0> INFO: invalid XOR eye diagram: 0
[19:30:42.847] <TB0> INFO: frame (failed synchr.): 0
[19:30:42.847] <TB0> INFO: idle data (no TBM trl): 0
[19:30:42.847] <TB0> INFO: no data (only TBM hdr): 0
[19:30:42.847] <TB0> INFO: TBM errors: 0
[19:30:42.847] <TB0> INFO: flawed TBM headers: 0
[19:30:42.847] <TB0> INFO: flawed TBM trailers: 0
[19:30:42.847] <TB0> INFO: event ID mismatches: 0
[19:30:42.847] <TB0> INFO: ROC errors: 0
[19:30:42.847] <TB0> INFO: missing ROC header(s): 0
[19:30:42.847] <TB0> INFO: misplaced readback start: 0
[19:30:42.847] <TB0> INFO: Pixel decoding errors: 0
[19:30:42.847] <TB0> INFO: pixel data incomplete: 0
[19:30:42.847] <TB0> INFO: pixel address: 0
[19:30:42.847] <TB0> INFO: pulse height fill bit: 0
[19:30:42.848] <TB0> INFO: buffer corruption: 0
[19:30:42.914] <TB0> INFO: ######################################################################
[19:30:42.914] <TB0> INFO: PixTestTrim::doTest()
[19:30:42.914] <TB0> INFO: ######################################################################
[19:30:42.915] <TB0> INFO: ----------------------------------------------------------------------
[19:30:42.915] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[19:30:42.915] <TB0> INFO: ----------------------------------------------------------------------
[19:30:42.960] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:30:42.960] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:30:42.971] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:30:42.971] <TB0> INFO: run 1 of 1
[19:30:43.235] <TB0> INFO: Expecting 5025280 events.
[19:31:14.642] <TB0> INFO: 829672 events read in total (30812ms).
[19:31:44.718] <TB0> INFO: 1657136 events read in total (60888ms).
[19:32:14.802] <TB0> INFO: 2482032 events read in total (90973ms).
[19:32:44.947] <TB0> INFO: 3303784 events read in total (121117ms).
[19:33:14.522] <TB0> INFO: 4120664 events read in total (150693ms).
[19:33:44.460] <TB0> INFO: 4936584 events read in total (180630ms).
[19:33:48.018] <TB0> INFO: 5025280 events read in total (184188ms).
[19:33:48.058] <TB0> INFO: Test took 185088ms.
[19:34:03.744] <TB0> INFO: ROC 0 VthrComp = 131
[19:34:03.744] <TB0> INFO: ROC 1 VthrComp = 132
[19:34:03.744] <TB0> INFO: ROC 2 VthrComp = 129
[19:34:03.744] <TB0> INFO: ROC 3 VthrComp = 127
[19:34:03.744] <TB0> INFO: ROC 4 VthrComp = 127
[19:34:03.745] <TB0> INFO: ROC 5 VthrComp = 124
[19:34:03.745] <TB0> INFO: ROC 6 VthrComp = 129
[19:34:03.745] <TB0> INFO: ROC 7 VthrComp = 126
[19:34:03.745] <TB0> INFO: ROC 8 VthrComp = 111
[19:34:03.745] <TB0> INFO: ROC 9 VthrComp = 120
[19:34:03.745] <TB0> INFO: ROC 10 VthrComp = 124
[19:34:03.745] <TB0> INFO: ROC 11 VthrComp = 132
[19:34:03.745] <TB0> INFO: ROC 12 VthrComp = 129
[19:34:03.745] <TB0> INFO: ROC 13 VthrComp = 122
[19:34:03.745] <TB0> INFO: ROC 14 VthrComp = 121
[19:34:03.745] <TB0> INFO: ROC 15 VthrComp = 113
[19:34:03.978] <TB0> INFO: Expecting 41600 events.
[19:34:07.591] <TB0> INFO: 41600 events read in total (3021ms).
[19:34:07.592] <TB0> INFO: Test took 3845ms.
[19:34:07.600] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:34:07.600] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:34:07.609] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:34:07.609] <TB0> INFO: run 1 of 1
[19:34:07.887] <TB0> INFO: Expecting 5025280 events.
[19:34:34.680] <TB0> INFO: 591176 events read in total (26201ms).
[19:35:00.193] <TB0> INFO: 1180400 events read in total (51714ms).
[19:35:25.777] <TB0> INFO: 1769600 events read in total (77298ms).
[19:35:51.312] <TB0> INFO: 2358032 events read in total (102833ms).
[19:36:16.784] <TB0> INFO: 2944304 events read in total (128305ms).
[19:36:42.201] <TB0> INFO: 3529384 events read in total (153722ms).
[19:37:07.648] <TB0> INFO: 4113512 events read in total (179169ms).
[19:37:33.511] <TB0> INFO: 4697024 events read in total (205032ms).
[19:37:47.820] <TB0> INFO: 5025280 events read in total (219341ms).
[19:37:47.878] <TB0> INFO: Test took 220269ms.
[19:38:14.821] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 59.5827 for pixel 33/76 mean/min/max = 47.1595/34.6502/59.6689
[19:38:14.822] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 65.2605 for pixel 8/2 mean/min/max = 50.731/36.0032/65.4588
[19:38:14.822] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 67.0083 for pixel 0/74 mean/min/max = 52.3086/37.5684/67.0489
[19:38:14.822] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 62.375 for pixel 10/79 mean/min/max = 47.6929/33.0028/62.383
[19:38:14.823] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 57.2495 for pixel 3/78 mean/min/max = 45.1975/33.0164/57.3787
[19:38:14.823] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.6156 for pixel 14/0 mean/min/max = 46.5164/32.2822/60.7505
[19:38:14.824] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 59.6751 for pixel 13/2 mean/min/max = 46.6346/33.5112/59.758
[19:38:14.824] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 56.5811 for pixel 23/57 mean/min/max = 44.584/32.499/56.6691
[19:38:14.824] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 61.5523 for pixel 47/3 mean/min/max = 48.4244/35.1671/61.6818
[19:38:14.825] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 59.0225 for pixel 9/4 mean/min/max = 46.6084/34.175/59.0419
[19:38:14.825] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.9565 for pixel 18/72 mean/min/max = 47.3104/33.5463/61.0746
[19:38:14.825] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 59.2566 for pixel 23/56 mean/min/max = 45.8763/32.256/59.4967
[19:38:14.826] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 56.3287 for pixel 15/0 mean/min/max = 43.9994/31.6545/56.3442
[19:38:14.826] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.0124 for pixel 0/43 mean/min/max = 45.8984/32.6355/59.1612
[19:38:14.826] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 64.6942 for pixel 15/1 mean/min/max = 48.3313/31.9604/64.7021
[19:38:14.827] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 61.9928 for pixel 0/15 mean/min/max = 47.1215/32.1745/62.0685
[19:38:14.827] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:38:14.916] <TB0> INFO: Expecting 411648 events.
[19:38:24.698] <TB0> INFO: 411648 events read in total (9191ms).
[19:38:24.707] <TB0> INFO: Expecting 411648 events.
[19:38:34.252] <TB0> INFO: 411648 events read in total (9142ms).
[19:38:34.264] <TB0> INFO: Expecting 411648 events.
[19:38:43.428] <TB0> INFO: 411648 events read in total (8761ms).
[19:38:43.442] <TB0> INFO: Expecting 411648 events.
[19:38:52.388] <TB0> INFO: 411648 events read in total (8543ms).
[19:38:52.404] <TB0> INFO: Expecting 411648 events.
[19:39:01.471] <TB0> INFO: 411648 events read in total (8664ms).
[19:39:01.500] <TB0> INFO: Expecting 411648 events.
[19:39:10.585] <TB0> INFO: 411648 events read in total (8682ms).
[19:39:10.607] <TB0> INFO: Expecting 411648 events.
[19:39:19.627] <TB0> INFO: 411648 events read in total (8618ms).
[19:39:19.661] <TB0> INFO: Expecting 411648 events.
[19:39:28.619] <TB0> INFO: 411648 events read in total (8556ms).
[19:39:28.655] <TB0> INFO: Expecting 411648 events.
[19:39:37.816] <TB0> INFO: 411648 events read in total (8758ms).
[19:39:37.843] <TB0> INFO: Expecting 411648 events.
[19:39:46.816] <TB0> INFO: 411648 events read in total (8570ms).
[19:39:46.845] <TB0> INFO: Expecting 411648 events.
[19:39:55.913] <TB0> INFO: 411648 events read in total (8665ms).
[19:39:55.946] <TB0> INFO: Expecting 411648 events.
[19:40:04.972] <TB0> INFO: 411648 events read in total (8623ms).
[19:40:05.015] <TB0> INFO: Expecting 411648 events.
[19:40:14.023] <TB0> INFO: 411648 events read in total (8605ms).
[19:40:14.077] <TB0> INFO: Expecting 411648 events.
[19:40:23.106] <TB0> INFO: 411648 events read in total (8626ms).
[19:40:23.151] <TB0> INFO: Expecting 411648 events.
[19:40:32.235] <TB0> INFO: 411648 events read in total (8682ms).
[19:40:32.297] <TB0> INFO: Expecting 411648 events.
[19:40:41.318] <TB0> INFO: 411648 events read in total (8618ms).
[19:40:41.369] <TB0> INFO: Test took 146542ms.
[19:40:42.065] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:40:42.075] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:40:42.075] <TB0> INFO: run 1 of 1
[19:40:42.308] <TB0> INFO: Expecting 5025280 events.
[19:41:08.069] <TB0> INFO: 586640 events read in total (25170ms).
[19:41:33.575] <TB0> INFO: 1172000 events read in total (50676ms).
[19:41:59.398] <TB0> INFO: 1758120 events read in total (76500ms).
[19:42:24.765] <TB0> INFO: 2342448 events read in total (101866ms).
[19:42:50.673] <TB0> INFO: 2926976 events read in total (127774ms).
[19:43:16.280] <TB0> INFO: 3512992 events read in total (153381ms).
[19:43:42.269] <TB0> INFO: 4100376 events read in total (179370ms).
[19:44:08.261] <TB0> INFO: 4686080 events read in total (205362ms).
[19:44:23.551] <TB0> INFO: 5025280 events read in total (220652ms).
[19:44:23.678] <TB0> INFO: Test took 221604ms.
[19:44:48.938] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.765585 .. 147.369717
[19:44:49.179] <TB0> INFO: Expecting 208000 events.
[19:44:59.508] <TB0> INFO: 208000 events read in total (9737ms).
[19:44:59.510] <TB0> INFO: Test took 10570ms.
[19:44:59.590] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[19:44:59.602] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:44:59.602] <TB0> INFO: run 1 of 1
[19:44:59.882] <TB0> INFO: Expecting 5258240 events.
[19:45:25.949] <TB0> INFO: 585544 events read in total (25475ms).
[19:45:51.643] <TB0> INFO: 1170688 events read in total (51170ms).
[19:46:17.434] <TB0> INFO: 1756088 events read in total (76961ms).
[19:46:43.301] <TB0> INFO: 2341416 events read in total (102827ms).
[19:47:09.306] <TB0> INFO: 2926736 events read in total (128832ms).
[19:47:34.974] <TB0> INFO: 3511232 events read in total (154500ms).
[19:48:00.784] <TB0> INFO: 4095688 events read in total (180310ms).
[19:48:26.295] <TB0> INFO: 4679032 events read in total (205821ms).
[19:48:51.592] <TB0> INFO: 5258240 events read in total (231118ms).
[19:48:51.688] <TB0> INFO: Test took 232086ms.
[19:49:20.276] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.134936 .. 44.906167
[19:49:20.563] <TB0> INFO: Expecting 208000 events.
[19:49:30.628] <TB0> INFO: 208000 events read in total (9473ms).
[19:49:30.629] <TB0> INFO: Test took 10352ms.
[19:49:30.689] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 54 (-1/-1) hits flags = 528 (plus default)
[19:49:30.700] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:49:30.700] <TB0> INFO: run 1 of 1
[19:49:30.978] <TB0> INFO: Expecting 1264640 events.
[19:49:58.786] <TB0> INFO: 664768 events read in total (27213ms).
[19:50:23.872] <TB0> INFO: 1264640 events read in total (52300ms).
[19:50:23.906] <TB0> INFO: Test took 53207ms.
[19:50:36.817] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 28.489215 .. 49.577438
[19:50:37.077] <TB0> INFO: Expecting 208000 events.
[19:50:47.005] <TB0> INFO: 208000 events read in total (9336ms).
[19:50:47.006] <TB0> INFO: Test took 10188ms.
[19:50:47.052] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 59 (-1/-1) hits flags = 528 (plus default)
[19:50:47.060] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:50:47.060] <TB0> INFO: run 1 of 1
[19:50:47.339] <TB0> INFO: Expecting 1397760 events.
[19:51:14.752] <TB0> INFO: 641624 events read in total (26822ms).
[19:51:41.643] <TB0> INFO: 1282392 events read in total (53714ms).
[19:51:46.881] <TB0> INFO: 1397760 events read in total (58951ms).
[19:51:46.920] <TB0> INFO: Test took 59861ms.
[19:52:01.317] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 23.904107 .. 51.880899
[19:52:01.565] <TB0> INFO: Expecting 208000 events.
[19:52:11.649] <TB0> INFO: 208000 events read in total (9492ms).
[19:52:11.650] <TB0> INFO: Test took 10332ms.
[19:52:11.697] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 61 (-1/-1) hits flags = 528 (plus default)
[19:52:11.705] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:52:11.705] <TB0> INFO: run 1 of 1
[19:52:11.984] <TB0> INFO: Expecting 1630720 events.
[19:52:39.707] <TB0> INFO: 654312 events read in total (27132ms).
[19:53:06.757] <TB0> INFO: 1308344 events read in total (54182ms).
[19:53:20.515] <TB0> INFO: 1630720 events read in total (67940ms).
[19:53:20.542] <TB0> INFO: Test took 68838ms.
[19:53:34.629] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[19:53:34.629] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[19:53:34.639] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:53:34.639] <TB0> INFO: run 1 of 1
[19:53:34.873] <TB0> INFO: Expecting 1364480 events.
[19:54:03.380] <TB0> INFO: 668608 events read in total (27916ms).
[19:54:30.939] <TB0> INFO: 1336552 events read in total (55476ms).
[19:54:32.503] <TB0> INFO: 1364480 events read in total (57039ms).
[19:54:32.537] <TB0> INFO: Test took 57898ms.
[19:54:46.246] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C0.dat
[19:54:46.246] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C1.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C2.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C3.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C4.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C5.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C6.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C7.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C8.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C9.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C10.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C11.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C12.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C13.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C14.dat
[19:54:46.247] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C15.dat
[19:54:46.248] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C0.dat
[19:54:46.253] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C1.dat
[19:54:46.260] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C2.dat
[19:54:46.268] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C3.dat
[19:54:46.276] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C4.dat
[19:54:46.284] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C5.dat
[19:54:46.292] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C6.dat
[19:54:46.300] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C7.dat
[19:54:46.309] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C8.dat
[19:54:46.317] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C9.dat
[19:54:46.326] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C10.dat
[19:54:46.334] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C11.dat
[19:54:46.343] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C12.dat
[19:54:46.351] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C13.dat
[19:54:46.360] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C14.dat
[19:54:46.368] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters35_C15.dat
[19:54:46.376] <TB0> INFO: PixTestTrim::trimTest() done
[19:54:46.376] <TB0> INFO: vtrim: 149 162 159 142 130 166 140 128 156 132 152 148 118 122 172 136
[19:54:46.376] <TB0> INFO: vthrcomp: 131 132 129 127 127 124 129 126 111 120 124 132 129 122 121 113
[19:54:46.376] <TB0> INFO: vcal mean: 34.97 35.64 35.55 35.67 34.99 35.10 35.21 34.86 35.12 35.22 35.76 35.48 34.94 34.97 35.38 35.04
[19:54:46.376] <TB0> INFO: vcal RMS: 1.01 1.86 1.80 1.88 1.06 1.28 1.25 1.04 1.18 1.28 1.91 1.65 0.99 1.05 1.51 1.07
[19:54:46.376] <TB0> INFO: bits mean: 9.35 9.33 7.92 10.15 10.16 10.04 9.68 10.25 9.49 9.62 10.11 10.53 10.38 9.08 10.12 9.49
[19:54:46.376] <TB0> INFO: bits RMS: 2.30 2.17 2.46 2.34 2.34 2.41 2.45 2.39 2.25 2.40 2.33 2.28 2.38 2.80 2.38 2.71
[19:54:46.384] <TB0> INFO: ----------------------------------------------------------------------
[19:54:46.384] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:54:46.385] <TB0> INFO: ----------------------------------------------------------------------
[19:54:46.387] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:54:46.399] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:54:46.399] <TB0> INFO: run 1 of 1
[19:54:46.729] <TB0> INFO: Expecting 4160000 events.
[19:55:18.525] <TB0> INFO: 760755 events read in total (31204ms).
[19:55:49.796] <TB0> INFO: 1518320 events read in total (62475ms).
[19:56:21.219] <TB0> INFO: 2271910 events read in total (93898ms).
[19:56:52.303] <TB0> INFO: 3021730 events read in total (124982ms).
[19:57:23.673] <TB0> INFO: 3769380 events read in total (156352ms).
[19:57:40.331] <TB0> INFO: 4160000 events read in total (173010ms).
[19:57:40.390] <TB0> INFO: Test took 173991ms.
[19:58:10.059] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[19:58:10.071] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:58:10.071] <TB0> INFO: run 1 of 1
[19:58:10.347] <TB0> INFO: Expecting 4368000 events.
[19:58:41.379] <TB0> INFO: 722430 events read in total (30440ms).
[19:59:11.789] <TB0> INFO: 1443515 events read in total (60851ms).
[19:59:42.278] <TB0> INFO: 2161895 events read in total (91339ms).
[20:00:12.816] <TB0> INFO: 2877770 events read in total (121877ms).
[20:00:43.364] <TB0> INFO: 3590680 events read in total (152425ms).
[20:01:14.119] <TB0> INFO: 4305450 events read in total (183180ms).
[20:01:17.130] <TB0> INFO: 4368000 events read in total (186191ms).
[20:01:17.202] <TB0> INFO: Test took 187131ms.
[20:01:47.218] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[20:01:47.228] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:01:47.228] <TB0> INFO: run 1 of 1
[20:01:47.487] <TB0> INFO: Expecting 4222400 events.
[20:02:19.209] <TB0> INFO: 732055 events read in total (31130ms).
[20:02:50.025] <TB0> INFO: 1462060 events read in total (61946ms).
[20:03:20.772] <TB0> INFO: 2189210 events read in total (92693ms).
[20:03:51.526] <TB0> INFO: 2913740 events read in total (123447ms).
[20:04:22.099] <TB0> INFO: 3635445 events read in total (154020ms).
[20:04:47.270] <TB0> INFO: 4222400 events read in total (179191ms).
[20:04:47.337] <TB0> INFO: Test took 180109ms.
[20:05:17.259] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[20:05:17.269] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:05:17.269] <TB0> INFO: run 1 of 1
[20:05:17.502] <TB0> INFO: Expecting 4222400 events.
[20:05:48.928] <TB0> INFO: 732265 events read in total (30834ms).
[20:06:19.676] <TB0> INFO: 1462340 events read in total (61582ms).
[20:06:50.593] <TB0> INFO: 2189795 events read in total (92500ms).
[20:07:21.414] <TB0> INFO: 2914375 events read in total (123320ms).
[20:07:52.094] <TB0> INFO: 3636445 events read in total (154000ms).
[20:08:17.170] <TB0> INFO: 4222400 events read in total (179076ms).
[20:08:17.227] <TB0> INFO: Test took 179958ms.
[20:08:45.304] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 201 (-1/-1) hits flags = 528 (plus default)
[20:08:45.313] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:08:45.313] <TB0> INFO: run 1 of 1
[20:08:45.546] <TB0> INFO: Expecting 4201600 events.
[20:09:17.008] <TB0> INFO: 733635 events read in total (30870ms).
[20:09:48.074] <TB0> INFO: 1465260 events read in total (61936ms).
[20:10:19.099] <TB0> INFO: 2194255 events read in total (92962ms).
[20:10:50.070] <TB0> INFO: 2920200 events read in total (123932ms).
[20:11:21.240] <TB0> INFO: 3643600 events read in total (155102ms).
[20:11:45.523] <TB0> INFO: 4201600 events read in total (179385ms).
[20:11:45.587] <TB0> INFO: Test took 180274ms.
[20:12:11.845] <TB0> INFO: PixTestTrim::trimBitTest() done
[20:12:11.847] <TB0> INFO: PixTestTrim::doTest() done, duration: 2488 seconds
[20:12:11.847] <TB0> INFO: Decoding statistics:
[20:12:11.847] <TB0> INFO: General information:
[20:12:11.847] <TB0> INFO: 16bit words read: 0
[20:12:11.847] <TB0> INFO: valid events total: 0
[20:12:11.847] <TB0> INFO: empty events: 0
[20:12:11.847] <TB0> INFO: valid events with pixels: 0
[20:12:11.847] <TB0> INFO: valid pixel hits: 0
[20:12:11.847] <TB0> INFO: Event errors: 0
[20:12:11.847] <TB0> INFO: start marker: 0
[20:12:11.847] <TB0> INFO: stop marker: 0
[20:12:11.847] <TB0> INFO: overflow: 0
[20:12:11.847] <TB0> INFO: invalid 5bit words: 0
[20:12:11.847] <TB0> INFO: invalid XOR eye diagram: 0
[20:12:11.847] <TB0> INFO: frame (failed synchr.): 0
[20:12:11.847] <TB0> INFO: idle data (no TBM trl): 0
[20:12:11.847] <TB0> INFO: no data (only TBM hdr): 0
[20:12:11.847] <TB0> INFO: TBM errors: 0
[20:12:11.847] <TB0> INFO: flawed TBM headers: 0
[20:12:11.847] <TB0> INFO: flawed TBM trailers: 0
[20:12:11.847] <TB0> INFO: event ID mismatches: 0
[20:12:11.847] <TB0> INFO: ROC errors: 0
[20:12:11.847] <TB0> INFO: missing ROC header(s): 0
[20:12:11.847] <TB0> INFO: misplaced readback start: 0
[20:12:11.847] <TB0> INFO: Pixel decoding errors: 0
[20:12:11.847] <TB0> INFO: pixel data incomplete: 0
[20:12:11.847] <TB0> INFO: pixel address: 0
[20:12:11.847] <TB0> INFO: pulse height fill bit: 0
[20:12:11.847] <TB0> INFO: buffer corruption: 0
[20:12:12.638] <TB0> INFO: ######################################################################
[20:12:12.638] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:12:12.638] <TB0> INFO: ######################################################################
[20:12:12.872] <TB0> INFO: Expecting 41600 events.
[20:12:16.386] <TB0> INFO: 41600 events read in total (2923ms).
[20:12:16.386] <TB0> INFO: Test took 3746ms.
[20:12:16.884] <TB0> INFO: Expecting 41600 events.
[20:12:20.363] <TB0> INFO: 41600 events read in total (2888ms).
[20:12:20.364] <TB0> INFO: Test took 3775ms.
[20:12:20.654] <TB0> INFO: Expecting 41600 events.
[20:12:24.134] <TB0> INFO: 41600 events read in total (2888ms).
[20:12:24.135] <TB0> INFO: Test took 3745ms.
[20:12:24.422] <TB0> INFO: Expecting 41600 events.
[20:12:27.888] <TB0> INFO: 41600 events read in total (2874ms).
[20:12:27.889] <TB0> INFO: Test took 3731ms.
[20:12:28.180] <TB0> INFO: Expecting 41600 events.
[20:12:31.653] <TB0> INFO: 41600 events read in total (2881ms).
[20:12:31.654] <TB0> INFO: Test took 3739ms.
[20:12:31.952] <TB0> INFO: Expecting 41600 events.
[20:12:35.411] <TB0> INFO: 41600 events read in total (2868ms).
[20:12:35.412] <TB0> INFO: Test took 3735ms.
[20:12:35.700] <TB0> INFO: Expecting 41600 events.
[20:12:39.173] <TB0> INFO: 41600 events read in total (2881ms).
[20:12:39.174] <TB0> INFO: Test took 3739ms.
[20:12:39.465] <TB0> INFO: Expecting 41600 events.
[20:12:42.941] <TB0> INFO: 41600 events read in total (2885ms).
[20:12:42.942] <TB0> INFO: Test took 3742ms.
[20:12:43.233] <TB0> INFO: Expecting 41600 events.
[20:12:46.775] <TB0> INFO: 41600 events read in total (2951ms).
[20:12:46.777] <TB0> INFO: Test took 3809ms.
[20:12:47.068] <TB0> INFO: Expecting 41600 events.
[20:12:50.500] <TB0> INFO: 41600 events read in total (2840ms).
[20:12:50.500] <TB0> INFO: Test took 3696ms.
[20:12:50.807] <TB0> INFO: Expecting 41600 events.
[20:12:54.280] <TB0> INFO: 41600 events read in total (2882ms).
[20:12:54.281] <TB0> INFO: Test took 3757ms.
[20:12:54.569] <TB0> INFO: Expecting 41600 events.
[20:12:58.272] <TB0> INFO: 41600 events read in total (3111ms).
[20:12:58.273] <TB0> INFO: Test took 3969ms.
[20:12:58.622] <TB0> INFO: Expecting 41600 events.
[20:13:02.179] <TB0> INFO: 41600 events read in total (2965ms).
[20:13:02.180] <TB0> INFO: Test took 3879ms.
[20:13:02.468] <TB0> INFO: Expecting 41600 events.
[20:13:05.937] <TB0> INFO: 41600 events read in total (2877ms).
[20:13:05.937] <TB0> INFO: Test took 3734ms.
[20:13:06.255] <TB0> INFO: Expecting 41600 events.
[20:13:09.706] <TB0> INFO: 41600 events read in total (2859ms).
[20:13:09.706] <TB0> INFO: Test took 3745ms.
[20:13:09.994] <TB0> INFO: Expecting 41600 events.
[20:13:13.481] <TB0> INFO: 41600 events read in total (2895ms).
[20:13:13.481] <TB0> INFO: Test took 3752ms.
[20:13:13.774] <TB0> INFO: Expecting 41600 events.
[20:13:17.263] <TB0> INFO: 41600 events read in total (2898ms).
[20:13:17.264] <TB0> INFO: Test took 3759ms.
[20:13:17.556] <TB0> INFO: Expecting 41600 events.
[20:13:21.061] <TB0> INFO: 41600 events read in total (2913ms).
[20:13:21.061] <TB0> INFO: Test took 3769ms.
[20:13:21.350] <TB0> INFO: Expecting 41600 events.
[20:13:25.203] <TB0> INFO: 41600 events read in total (3261ms).
[20:13:25.205] <TB0> INFO: Test took 4120ms.
[20:13:25.504] <TB0> INFO: Expecting 41600 events.
[20:13:29.051] <TB0> INFO: 41600 events read in total (2955ms).
[20:13:29.052] <TB0> INFO: Test took 3819ms.
[20:13:29.340] <TB0> INFO: Expecting 41600 events.
[20:13:32.883] <TB0> INFO: 41600 events read in total (2952ms).
[20:13:32.884] <TB0> INFO: Test took 3809ms.
[20:13:33.174] <TB0> INFO: Expecting 41600 events.
[20:13:36.708] <TB0> INFO: 41600 events read in total (2942ms).
[20:13:36.709] <TB0> INFO: Test took 3799ms.
[20:13:36.997] <TB0> INFO: Expecting 41600 events.
[20:13:40.519] <TB0> INFO: 41600 events read in total (2930ms).
[20:13:40.520] <TB0> INFO: Test took 3787ms.
[20:13:40.808] <TB0> INFO: Expecting 41600 events.
[20:13:44.274] <TB0> INFO: 41600 events read in total (2875ms).
[20:13:44.275] <TB0> INFO: Test took 3732ms.
[20:13:44.563] <TB0> INFO: Expecting 41600 events.
[20:13:48.042] <TB0> INFO: 41600 events read in total (2888ms).
[20:13:48.043] <TB0> INFO: Test took 3745ms.
[20:13:48.331] <TB0> INFO: Expecting 41600 events.
[20:13:51.961] <TB0> INFO: 41600 events read in total (3039ms).
[20:13:51.962] <TB0> INFO: Test took 3896ms.
[20:13:52.249] <TB0> INFO: Expecting 41600 events.
[20:13:55.692] <TB0> INFO: 41600 events read in total (2851ms).
[20:13:55.693] <TB0> INFO: Test took 3708ms.
[20:13:55.981] <TB0> INFO: Expecting 41600 events.
[20:13:59.443] <TB0> INFO: 41600 events read in total (2870ms).
[20:13:59.444] <TB0> INFO: Test took 3728ms.
[20:13:59.733] <TB0> INFO: Expecting 41600 events.
[20:14:03.231] <TB0> INFO: 41600 events read in total (2906ms).
[20:14:03.232] <TB0> INFO: Test took 3764ms.
[20:14:03.521] <TB0> INFO: Expecting 2560 events.
[20:14:04.405] <TB0> INFO: 2560 events read in total (292ms).
[20:14:04.406] <TB0> INFO: Test took 1162ms.
[20:14:04.713] <TB0> INFO: Expecting 2560 events.
[20:14:05.597] <TB0> INFO: 2560 events read in total (292ms).
[20:14:05.597] <TB0> INFO: Test took 1191ms.
[20:14:05.905] <TB0> INFO: Expecting 2560 events.
[20:14:06.787] <TB0> INFO: 2560 events read in total (290ms).
[20:14:06.787] <TB0> INFO: Test took 1190ms.
[20:14:07.095] <TB0> INFO: Expecting 2560 events.
[20:14:07.978] <TB0> INFO: 2560 events read in total (291ms).
[20:14:07.978] <TB0> INFO: Test took 1190ms.
[20:14:08.286] <TB0> INFO: Expecting 2560 events.
[20:14:09.164] <TB0> INFO: 2560 events read in total (287ms).
[20:14:09.164] <TB0> INFO: Test took 1185ms.
[20:14:09.472] <TB0> INFO: Expecting 2560 events.
[20:14:10.350] <TB0> INFO: 2560 events read in total (287ms).
[20:14:10.350] <TB0> INFO: Test took 1185ms.
[20:14:10.658] <TB0> INFO: Expecting 2560 events.
[20:14:11.537] <TB0> INFO: 2560 events read in total (287ms).
[20:14:11.537] <TB0> INFO: Test took 1186ms.
[20:14:11.844] <TB0> INFO: Expecting 2560 events.
[20:14:12.722] <TB0> INFO: 2560 events read in total (286ms).
[20:14:12.723] <TB0> INFO: Test took 1185ms.
[20:14:13.030] <TB0> INFO: Expecting 2560 events.
[20:14:13.908] <TB0> INFO: 2560 events read in total (286ms).
[20:14:13.908] <TB0> INFO: Test took 1185ms.
[20:14:14.216] <TB0> INFO: Expecting 2560 events.
[20:14:15.094] <TB0> INFO: 2560 events read in total (286ms).
[20:14:15.095] <TB0> INFO: Test took 1186ms.
[20:14:15.403] <TB0> INFO: Expecting 2560 events.
[20:14:16.281] <TB0> INFO: 2560 events read in total (287ms).
[20:14:16.281] <TB0> INFO: Test took 1186ms.
[20:14:16.589] <TB0> INFO: Expecting 2560 events.
[20:14:17.471] <TB0> INFO: 2560 events read in total (290ms).
[20:14:17.472] <TB0> INFO: Test took 1190ms.
[20:14:17.779] <TB0> INFO: Expecting 2560 events.
[20:14:18.664] <TB0> INFO: 2560 events read in total (293ms).
[20:14:18.665] <TB0> INFO: Test took 1193ms.
[20:14:18.973] <TB0> INFO: Expecting 2560 events.
[20:14:19.856] <TB0> INFO: 2560 events read in total (292ms).
[20:14:19.856] <TB0> INFO: Test took 1191ms.
[20:14:20.163] <TB0> INFO: Expecting 2560 events.
[20:14:21.046] <TB0> INFO: 2560 events read in total (291ms).
[20:14:21.046] <TB0> INFO: Test took 1190ms.
[20:14:21.354] <TB0> INFO: Expecting 2560 events.
[20:14:22.237] <TB0> INFO: 2560 events read in total (292ms).
[20:14:22.237] <TB0> INFO: Test took 1191ms.
[20:14:22.240] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:14:22.546] <TB0> INFO: Expecting 655360 events.
[20:14:36.753] <TB0> INFO: 655360 events read in total (13615ms).
[20:14:36.763] <TB0> INFO: Expecting 655360 events.
[20:14:50.819] <TB0> INFO: 655360 events read in total (13653ms).
[20:14:50.839] <TB0> INFO: Expecting 655360 events.
[20:15:04.967] <TB0> INFO: 655360 events read in total (13725ms).
[20:15:04.993] <TB0> INFO: Expecting 655360 events.
[20:15:19.111] <TB0> INFO: 655360 events read in total (13715ms).
[20:15:19.141] <TB0> INFO: Expecting 655360 events.
[20:15:33.173] <TB0> INFO: 655360 events read in total (13629ms).
[20:15:33.200] <TB0> INFO: Expecting 655360 events.
[20:15:47.236] <TB0> INFO: 655360 events read in total (13633ms).
[20:15:47.278] <TB0> INFO: Expecting 655360 events.
[20:16:01.359] <TB0> INFO: 655360 events read in total (13678ms).
[20:16:01.406] <TB0> INFO: Expecting 655360 events.
[20:16:15.398] <TB0> INFO: 655360 events read in total (13589ms).
[20:16:15.446] <TB0> INFO: Expecting 655360 events.
[20:16:29.402] <TB0> INFO: 655360 events read in total (13553ms).
[20:16:29.447] <TB0> INFO: Expecting 655360 events.
[20:16:43.465] <TB0> INFO: 655360 events read in total (13615ms).
[20:16:43.532] <TB0> INFO: Expecting 655360 events.
[20:16:57.653] <TB0> INFO: 655360 events read in total (13718ms).
[20:16:57.708] <TB0> INFO: Expecting 655360 events.
[20:17:11.761] <TB0> INFO: 655360 events read in total (13650ms).
[20:17:11.824] <TB0> INFO: Expecting 655360 events.
[20:17:25.890] <TB0> INFO: 655360 events read in total (13663ms).
[20:17:25.956] <TB0> INFO: Expecting 655360 events.
[20:17:40.017] <TB0> INFO: 655360 events read in total (13658ms).
[20:17:40.107] <TB0> INFO: Expecting 655360 events.
[20:17:54.164] <TB0> INFO: 655360 events read in total (13654ms).
[20:17:54.261] <TB0> INFO: Expecting 655360 events.
[20:18:08.288] <TB0> INFO: 655360 events read in total (13624ms).
[20:18:08.367] <TB0> INFO: Test took 226127ms.
[20:18:08.453] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:18:08.718] <TB0> INFO: Expecting 655360 events.
[20:18:22.764] <TB0> INFO: 655360 events read in total (13454ms).
[20:18:22.775] <TB0> INFO: Expecting 655360 events.
[20:18:36.764] <TB0> INFO: 655360 events read in total (13586ms).
[20:18:36.778] <TB0> INFO: Expecting 655360 events.
[20:18:50.510] <TB0> INFO: 655360 events read in total (13329ms).
[20:18:50.534] <TB0> INFO: Expecting 655360 events.
[20:19:04.328] <TB0> INFO: 655360 events read in total (13391ms).
[20:19:04.351] <TB0> INFO: Expecting 655360 events.
[20:19:18.363] <TB0> INFO: 655360 events read in total (13609ms).
[20:19:18.390] <TB0> INFO: Expecting 655360 events.
[20:19:31.978] <TB0> INFO: 655360 events read in total (13185ms).
[20:19:32.007] <TB0> INFO: Expecting 655360 events.
[20:19:46.024] <TB0> INFO: 655360 events read in total (13614ms).
[20:19:46.058] <TB0> INFO: Expecting 655360 events.
[20:19:59.994] <TB0> INFO: 655360 events read in total (13533ms).
[20:20:00.032] <TB0> INFO: Expecting 655360 events.
[20:20:14.120] <TB0> INFO: 655360 events read in total (13685ms).
[20:20:14.165] <TB0> INFO: Expecting 655360 events.
[20:20:27.979] <TB0> INFO: 655360 events read in total (13411ms).
[20:20:28.028] <TB0> INFO: Expecting 655360 events.
[20:20:41.714] <TB0> INFO: 655360 events read in total (13283ms).
[20:20:41.784] <TB0> INFO: Expecting 655360 events.
[20:20:55.687] <TB0> INFO: 655360 events read in total (13500ms).
[20:20:55.763] <TB0> INFO: Expecting 655360 events.
[20:21:09.788] <TB0> INFO: 655360 events read in total (13622ms).
[20:21:09.849] <TB0> INFO: Expecting 655360 events.
[20:21:23.872] <TB0> INFO: 655360 events read in total (13620ms).
[20:21:23.938] <TB0> INFO: Expecting 655360 events.
[20:21:37.978] <TB0> INFO: 655360 events read in total (13637ms).
[20:21:38.071] <TB0> INFO: Expecting 655360 events.
[20:21:52.363] <TB0> INFO: 655360 events read in total (13889ms).
[20:21:52.458] <TB0> INFO: Test took 224005ms.
[20:21:52.615] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.619] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.624] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.628] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.633] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.639] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.645] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.652] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[20:21:52.658] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[20:21:52.664] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[20:21:52.670] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[20:21:52.676] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.682] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.688] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.694] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.700] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.707] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[20:21:52.713] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[20:21:52.719] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.726] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.732] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[20:21:52.738] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[20:21:52.745] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[20:21:52.751] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[20:21:52.757] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[20:21:52.763] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[20:21:52.770] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.776] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[20:21:52.782] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[20:21:52.789] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[20:21:52.795] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C0.dat
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C1.dat
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C2.dat
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C3.dat
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C4.dat
[20:21:52.830] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C5.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C6.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C7.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C8.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C9.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C10.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C11.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C12.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C13.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C14.dat
[20:21:52.831] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters35_C15.dat
[20:21:53.070] <TB0> INFO: Expecting 41600 events.
[20:21:56.185] <TB0> INFO: 41600 events read in total (2523ms).
[20:21:56.186] <TB0> INFO: Test took 3352ms.
[20:21:56.672] <TB0> INFO: Expecting 41600 events.
[20:21:59.660] <TB0> INFO: 41600 events read in total (2396ms).
[20:21:59.661] <TB0> INFO: Test took 3264ms.
[20:22:00.106] <TB0> INFO: Expecting 41600 events.
[20:22:03.224] <TB0> INFO: 41600 events read in total (2527ms).
[20:22:03.225] <TB0> INFO: Test took 3351ms.
[20:22:03.439] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:03.528] <TB0> INFO: Expecting 2560 events.
[20:22:04.414] <TB0> INFO: 2560 events read in total (295ms).
[20:22:04.414] <TB0> INFO: Test took 975ms.
[20:22:04.416] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:04.722] <TB0> INFO: Expecting 2560 events.
[20:22:05.606] <TB0> INFO: 2560 events read in total (292ms).
[20:22:05.606] <TB0> INFO: Test took 1190ms.
[20:22:05.608] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:05.915] <TB0> INFO: Expecting 2560 events.
[20:22:06.797] <TB0> INFO: 2560 events read in total (291ms).
[20:22:06.798] <TB0> INFO: Test took 1190ms.
[20:22:06.799] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:07.106] <TB0> INFO: Expecting 2560 events.
[20:22:07.990] <TB0> INFO: 2560 events read in total (292ms).
[20:22:07.990] <TB0> INFO: Test took 1191ms.
[20:22:07.992] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:08.298] <TB0> INFO: Expecting 2560 events.
[20:22:09.182] <TB0> INFO: 2560 events read in total (293ms).
[20:22:09.182] <TB0> INFO: Test took 1190ms.
[20:22:09.184] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:09.491] <TB0> INFO: Expecting 2560 events.
[20:22:10.374] <TB0> INFO: 2560 events read in total (292ms).
[20:22:10.374] <TB0> INFO: Test took 1190ms.
[20:22:10.376] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:10.682] <TB0> INFO: Expecting 2560 events.
[20:22:11.566] <TB0> INFO: 2560 events read in total (292ms).
[20:22:11.567] <TB0> INFO: Test took 1191ms.
[20:22:11.569] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:11.875] <TB0> INFO: Expecting 2560 events.
[20:22:12.758] <TB0> INFO: 2560 events read in total (292ms).
[20:22:12.759] <TB0> INFO: Test took 1190ms.
[20:22:12.761] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:13.067] <TB0> INFO: Expecting 2560 events.
[20:22:13.946] <TB0> INFO: 2560 events read in total (287ms).
[20:22:13.947] <TB0> INFO: Test took 1186ms.
[20:22:13.948] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:14.255] <TB0> INFO: Expecting 2560 events.
[20:22:15.137] <TB0> INFO: 2560 events read in total (290ms).
[20:22:15.137] <TB0> INFO: Test took 1189ms.
[20:22:15.139] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:15.446] <TB0> INFO: Expecting 2560 events.
[20:22:16.326] <TB0> INFO: 2560 events read in total (289ms).
[20:22:16.326] <TB0> INFO: Test took 1187ms.
[20:22:16.328] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:16.635] <TB0> INFO: Expecting 2560 events.
[20:22:17.516] <TB0> INFO: 2560 events read in total (290ms).
[20:22:17.516] <TB0> INFO: Test took 1188ms.
[20:22:17.518] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:17.825] <TB0> INFO: Expecting 2560 events.
[20:22:18.706] <TB0> INFO: 2560 events read in total (289ms).
[20:22:18.706] <TB0> INFO: Test took 1188ms.
[20:22:18.708] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:19.015] <TB0> INFO: Expecting 2560 events.
[20:22:19.894] <TB0> INFO: 2560 events read in total (288ms).
[20:22:19.894] <TB0> INFO: Test took 1186ms.
[20:22:19.896] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:20.202] <TB0> INFO: Expecting 2560 events.
[20:22:21.082] <TB0> INFO: 2560 events read in total (288ms).
[20:22:21.082] <TB0> INFO: Test took 1186ms.
[20:22:21.084] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:21.390] <TB0> INFO: Expecting 2560 events.
[20:22:22.272] <TB0> INFO: 2560 events read in total (290ms).
[20:22:22.273] <TB0> INFO: Test took 1189ms.
[20:22:22.274] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:22.581] <TB0> INFO: Expecting 2560 events.
[20:22:23.460] <TB0> INFO: 2560 events read in total (287ms).
[20:22:23.460] <TB0> INFO: Test took 1186ms.
[20:22:23.462] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:23.769] <TB0> INFO: Expecting 2560 events.
[20:22:24.649] <TB0> INFO: 2560 events read in total (288ms).
[20:22:24.649] <TB0> INFO: Test took 1187ms.
[20:22:24.651] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:24.958] <TB0> INFO: Expecting 2560 events.
[20:22:25.836] <TB0> INFO: 2560 events read in total (287ms).
[20:22:25.836] <TB0> INFO: Test took 1185ms.
[20:22:25.838] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:26.145] <TB0> INFO: Expecting 2560 events.
[20:22:27.024] <TB0> INFO: 2560 events read in total (288ms).
[20:22:27.024] <TB0> INFO: Test took 1186ms.
[20:22:27.026] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:27.332] <TB0> INFO: Expecting 2560 events.
[20:22:28.210] <TB0> INFO: 2560 events read in total (286ms).
[20:22:28.210] <TB0> INFO: Test took 1185ms.
[20:22:28.212] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:28.519] <TB0> INFO: Expecting 2560 events.
[20:22:29.398] <TB0> INFO: 2560 events read in total (287ms).
[20:22:29.398] <TB0> INFO: Test took 1186ms.
[20:22:29.400] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:29.706] <TB0> INFO: Expecting 2560 events.
[20:22:30.589] <TB0> INFO: 2560 events read in total (291ms).
[20:22:30.589] <TB0> INFO: Test took 1189ms.
[20:22:30.591] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:30.898] <TB0> INFO: Expecting 2560 events.
[20:22:31.777] <TB0> INFO: 2560 events read in total (288ms).
[20:22:31.777] <TB0> INFO: Test took 1186ms.
[20:22:31.780] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:32.085] <TB0> INFO: Expecting 2560 events.
[20:22:32.969] <TB0> INFO: 2560 events read in total (292ms).
[20:22:32.969] <TB0> INFO: Test took 1190ms.
[20:22:32.971] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:33.278] <TB0> INFO: Expecting 2560 events.
[20:22:34.164] <TB0> INFO: 2560 events read in total (295ms).
[20:22:34.165] <TB0> INFO: Test took 1194ms.
[20:22:34.166] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:34.473] <TB0> INFO: Expecting 2560 events.
[20:22:35.355] <TB0> INFO: 2560 events read in total (291ms).
[20:22:35.355] <TB0> INFO: Test took 1189ms.
[20:22:35.357] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:35.664] <TB0> INFO: Expecting 2560 events.
[20:22:36.547] <TB0> INFO: 2560 events read in total (292ms).
[20:22:36.547] <TB0> INFO: Test took 1190ms.
[20:22:36.549] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:36.855] <TB0> INFO: Expecting 2560 events.
[20:22:37.739] <TB0> INFO: 2560 events read in total (292ms).
[20:22:37.739] <TB0> INFO: Test took 1190ms.
[20:22:37.741] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:38.047] <TB0> INFO: Expecting 2560 events.
[20:22:38.933] <TB0> INFO: 2560 events read in total (294ms).
[20:22:38.934] <TB0> INFO: Test took 1194ms.
[20:22:38.935] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:39.242] <TB0> INFO: Expecting 2560 events.
[20:22:40.125] <TB0> INFO: 2560 events read in total (291ms).
[20:22:40.125] <TB0> INFO: Test took 1190ms.
[20:22:40.127] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:22:40.434] <TB0> INFO: Expecting 2560 events.
[20:22:41.319] <TB0> INFO: 2560 events read in total (293ms).
[20:22:41.320] <TB0> INFO: Test took 1193ms.
[20:22:41.785] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 629 seconds
[20:22:41.785] <TB0> INFO: PH scale (per ROC): 42 50 46 57 36 51 34 56 38 45 39 44 45 43 38 37
[20:22:41.785] <TB0> INFO: PH offset (per ROC): 106 111 110 126 111 115 99 127 87 109 98 108 103 98 101 105
[20:22:41.791] <TB0> INFO: Decoding statistics:
[20:22:41.791] <TB0> INFO: General information:
[20:22:41.791] <TB0> INFO: 16bit words read: 127886
[20:22:41.791] <TB0> INFO: valid events total: 20480
[20:22:41.791] <TB0> INFO: empty events: 17977
[20:22:41.791] <TB0> INFO: valid events with pixels: 2503
[20:22:41.791] <TB0> INFO: valid pixel hits: 2503
[20:22:41.791] <TB0> INFO: Event errors: 0
[20:22:41.791] <TB0> INFO: start marker: 0
[20:22:41.791] <TB0> INFO: stop marker: 0
[20:22:41.791] <TB0> INFO: overflow: 0
[20:22:41.791] <TB0> INFO: invalid 5bit words: 0
[20:22:41.791] <TB0> INFO: invalid XOR eye diagram: 0
[20:22:41.791] <TB0> INFO: frame (failed synchr.): 0
[20:22:41.791] <TB0> INFO: idle data (no TBM trl): 0
[20:22:41.791] <TB0> INFO: no data (only TBM hdr): 0
[20:22:41.791] <TB0> INFO: TBM errors: 0
[20:22:41.791] <TB0> INFO: flawed TBM headers: 0
[20:22:41.791] <TB0> INFO: flawed TBM trailers: 0
[20:22:41.791] <TB0> INFO: event ID mismatches: 0
[20:22:41.791] <TB0> INFO: ROC errors: 0
[20:22:41.791] <TB0> INFO: missing ROC header(s): 0
[20:22:41.791] <TB0> INFO: misplaced readback start: 0
[20:22:41.791] <TB0> INFO: Pixel decoding errors: 0
[20:22:41.791] <TB0> INFO: pixel data incomplete: 0
[20:22:41.791] <TB0> INFO: pixel address: 0
[20:22:41.791] <TB0> INFO: pulse height fill bit: 0
[20:22:41.791] <TB0> INFO: buffer corruption: 0
[20:22:42.063] <TB0> INFO: ######################################################################
[20:22:42.063] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:22:42.063] <TB0> INFO: ######################################################################
[20:22:42.074] <TB0> INFO: scanning low vcal = 10
[20:22:42.307] <TB0> INFO: Expecting 41600 events.
[20:22:45.882] <TB0> INFO: 41600 events read in total (2984ms).
[20:22:45.883] <TB0> INFO: Test took 3808ms.
[20:22:45.884] <TB0> INFO: scanning low vcal = 20
[20:22:46.184] <TB0> INFO: Expecting 41600 events.
[20:22:49.763] <TB0> INFO: 41600 events read in total (2988ms).
[20:22:49.764] <TB0> INFO: Test took 3880ms.
[20:22:49.765] <TB0> INFO: scanning low vcal = 30
[20:22:50.064] <TB0> INFO: Expecting 41600 events.
[20:22:53.711] <TB0> INFO: 41600 events read in total (3055ms).
[20:22:53.713] <TB0> INFO: Test took 3948ms.
[20:22:53.715] <TB0> INFO: scanning low vcal = 40
[20:22:53.994] <TB0> INFO: Expecting 41600 events.
[20:22:57.934] <TB0> INFO: 41600 events read in total (3348ms).
[20:22:57.935] <TB0> INFO: Test took 4220ms.
[20:22:57.937] <TB0> INFO: scanning low vcal = 50
[20:22:58.214] <TB0> INFO: Expecting 41600 events.
[20:23:02.161] <TB0> INFO: 41600 events read in total (3355ms).
[20:23:02.162] <TB0> INFO: Test took 4225ms.
[20:23:02.164] <TB0> INFO: scanning low vcal = 60
[20:23:02.441] <TB0> INFO: Expecting 41600 events.
[20:23:06.415] <TB0> INFO: 41600 events read in total (3382ms).
[20:23:06.416] <TB0> INFO: Test took 4252ms.
[20:23:06.418] <TB0> INFO: scanning low vcal = 70
[20:23:06.697] <TB0> INFO: Expecting 41600 events.
[20:23:10.646] <TB0> INFO: 41600 events read in total (3358ms).
[20:23:10.646] <TB0> INFO: Test took 4227ms.
[20:23:10.649] <TB0> INFO: scanning low vcal = 80
[20:23:10.926] <TB0> INFO: Expecting 41600 events.
[20:23:14.875] <TB0> INFO: 41600 events read in total (3357ms).
[20:23:14.876] <TB0> INFO: Test took 4227ms.
[20:23:14.879] <TB0> INFO: scanning low vcal = 90
[20:23:15.156] <TB0> INFO: Expecting 41600 events.
[20:23:19.102] <TB0> INFO: 41600 events read in total (3355ms).
[20:23:19.102] <TB0> INFO: Test took 4223ms.
[20:23:19.105] <TB0> INFO: scanning low vcal = 100
[20:23:19.382] <TB0> INFO: Expecting 41600 events.
[20:23:23.360] <TB0> INFO: 41600 events read in total (3387ms).
[20:23:23.361] <TB0> INFO: Test took 4256ms.
[20:23:23.363] <TB0> INFO: scanning low vcal = 110
[20:23:23.640] <TB0> INFO: Expecting 41600 events.
[20:23:27.609] <TB0> INFO: 41600 events read in total (3377ms).
[20:23:27.610] <TB0> INFO: Test took 4247ms.
[20:23:27.613] <TB0> INFO: scanning low vcal = 120
[20:23:27.889] <TB0> INFO: Expecting 41600 events.
[20:23:31.843] <TB0> INFO: 41600 events read in total (3363ms).
[20:23:31.843] <TB0> INFO: Test took 4230ms.
[20:23:31.846] <TB0> INFO: scanning low vcal = 130
[20:23:32.122] <TB0> INFO: Expecting 41600 events.
[20:23:36.080] <TB0> INFO: 41600 events read in total (3366ms).
[20:23:36.081] <TB0> INFO: Test took 4235ms.
[20:23:36.083] <TB0> INFO: scanning low vcal = 140
[20:23:36.360] <TB0> INFO: Expecting 41600 events.
[20:23:40.286] <TB0> INFO: 41600 events read in total (3334ms).
[20:23:40.287] <TB0> INFO: Test took 4203ms.
[20:23:40.290] <TB0> INFO: scanning low vcal = 150
[20:23:40.567] <TB0> INFO: Expecting 41600 events.
[20:23:44.536] <TB0> INFO: 41600 events read in total (3378ms).
[20:23:44.537] <TB0> INFO: Test took 4247ms.
[20:23:44.539] <TB0> INFO: scanning low vcal = 160
[20:23:44.816] <TB0> INFO: Expecting 41600 events.
[20:23:48.772] <TB0> INFO: 41600 events read in total (3364ms).
[20:23:48.772] <TB0> INFO: Test took 4233ms.
[20:23:48.775] <TB0> INFO: scanning low vcal = 170
[20:23:49.055] <TB0> INFO: Expecting 41600 events.
[20:23:52.993] <TB0> INFO: 41600 events read in total (3346ms).
[20:23:52.994] <TB0> INFO: Test took 4219ms.
[20:23:52.996] <TB0> INFO: scanning low vcal = 180
[20:23:53.273] <TB0> INFO: Expecting 41600 events.
[20:23:57.263] <TB0> INFO: 41600 events read in total (3398ms).
[20:23:57.264] <TB0> INFO: Test took 4267ms.
[20:23:57.267] <TB0> INFO: scanning low vcal = 190
[20:23:57.544] <TB0> INFO: Expecting 41600 events.
[20:24:01.513] <TB0> INFO: 41600 events read in total (3378ms).
[20:24:01.513] <TB0> INFO: Test took 4246ms.
[20:24:01.516] <TB0> INFO: scanning low vcal = 200
[20:24:01.793] <TB0> INFO: Expecting 41600 events.
[20:24:05.738] <TB0> INFO: 41600 events read in total (3354ms).
[20:24:05.739] <TB0> INFO: Test took 4223ms.
[20:24:05.741] <TB0> INFO: scanning low vcal = 210
[20:24:06.018] <TB0> INFO: Expecting 41600 events.
[20:24:09.984] <TB0> INFO: 41600 events read in total (3374ms).
[20:24:09.984] <TB0> INFO: Test took 4243ms.
[20:24:09.987] <TB0> INFO: scanning low vcal = 220
[20:24:10.263] <TB0> INFO: Expecting 41600 events.
[20:24:14.196] <TB0> INFO: 41600 events read in total (3341ms).
[20:24:14.197] <TB0> INFO: Test took 4210ms.
[20:24:14.199] <TB0> INFO: scanning low vcal = 230
[20:24:14.476] <TB0> INFO: Expecting 41600 events.
[20:24:18.437] <TB0> INFO: 41600 events read in total (3370ms).
[20:24:18.438] <TB0> INFO: Test took 4239ms.
[20:24:18.440] <TB0> INFO: scanning low vcal = 240
[20:24:18.717] <TB0> INFO: Expecting 41600 events.
[20:24:22.674] <TB0> INFO: 41600 events read in total (3365ms).
[20:24:22.674] <TB0> INFO: Test took 4234ms.
[20:24:22.677] <TB0> INFO: scanning low vcal = 250
[20:24:22.954] <TB0> INFO: Expecting 41600 events.
[20:24:26.916] <TB0> INFO: 41600 events read in total (3370ms).
[20:24:26.917] <TB0> INFO: Test took 4240ms.
[20:24:26.921] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[20:24:27.197] <TB0> INFO: Expecting 41600 events.
[20:24:31.162] <TB0> INFO: 41600 events read in total (3374ms).
[20:24:31.164] <TB0> INFO: Test took 4243ms.
[20:24:31.166] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[20:24:31.444] <TB0> INFO: Expecting 41600 events.
[20:24:35.398] <TB0> INFO: 41600 events read in total (3362ms).
[20:24:35.399] <TB0> INFO: Test took 4233ms.
[20:24:35.402] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[20:24:35.679] <TB0> INFO: Expecting 41600 events.
[20:24:39.669] <TB0> INFO: 41600 events read in total (3398ms).
[20:24:39.670] <TB0> INFO: Test took 4268ms.
[20:24:39.672] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[20:24:39.949] <TB0> INFO: Expecting 41600 events.
[20:24:43.894] <TB0> INFO: 41600 events read in total (3353ms).
[20:24:43.895] <TB0> INFO: Test took 4223ms.
[20:24:43.898] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[20:24:44.175] <TB0> INFO: Expecting 41600 events.
[20:24:48.194] <TB0> INFO: 41600 events read in total (3428ms).
[20:24:48.195] <TB0> INFO: Test took 4297ms.
[20:24:48.846] <TB0> INFO: PixTestGainPedestal::measure() done
[20:25:29.760] <TB0> INFO: PixTestGainPedestal::fit() done
[20:25:29.760] <TB0> INFO: non-linearity mean: 0.925 0.971 0.963 0.986 0.927 0.982 0.906 0.982 0.942 0.945 0.925 0.935 0.926 0.946 0.940 0.918
[20:25:29.760] <TB0> INFO: non-linearity RMS: 0.107 0.014 0.022 0.003 0.176 0.004 0.112 0.003 0.154 0.071 0.122 0.078 0.075 0.088 0.166 0.146
[20:25:29.760] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[20:25:29.773] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[20:25:29.787] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[20:25:29.800] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[20:25:29.814] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[20:25:29.827] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[20:25:29.841] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[20:25:29.854] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[20:25:29.868] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[20:25:29.881] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[20:25:29.895] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[20:25:29.908] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[20:25:29.922] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[20:25:29.935] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[20:25:29.949] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[20:25:29.965] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[20:25:29.984] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[20:25:29.984] <TB0> INFO: Decoding statistics:
[20:25:29.984] <TB0> INFO: General information:
[20:25:29.984] <TB0> INFO: 16bit words read: 3291298
[20:25:29.985] <TB0> INFO: valid events total: 332800
[20:25:29.985] <TB0> INFO: empty events: 919
[20:25:29.985] <TB0> INFO: valid events with pixels: 331881
[20:25:29.985] <TB0> INFO: valid pixel hits: 647249
[20:25:29.985] <TB0> INFO: Event errors: 0
[20:25:29.985] <TB0> INFO: start marker: 0
[20:25:29.985] <TB0> INFO: stop marker: 0
[20:25:29.985] <TB0> INFO: overflow: 0
[20:25:29.985] <TB0> INFO: invalid 5bit words: 0
[20:25:29.985] <TB0> INFO: invalid XOR eye diagram: 0
[20:25:29.985] <TB0> INFO: frame (failed synchr.): 0
[20:25:29.985] <TB0> INFO: idle data (no TBM trl): 0
[20:25:29.985] <TB0> INFO: no data (only TBM hdr): 0
[20:25:29.985] <TB0> INFO: TBM errors: 0
[20:25:29.985] <TB0> INFO: flawed TBM headers: 0
[20:25:29.985] <TB0> INFO: flawed TBM trailers: 0
[20:25:29.985] <TB0> INFO: event ID mismatches: 0
[20:25:29.985] <TB0> INFO: ROC errors: 0
[20:25:29.985] <TB0> INFO: missing ROC header(s): 0
[20:25:29.985] <TB0> INFO: misplaced readback start: 0
[20:25:29.985] <TB0> INFO: Pixel decoding errors: 0
[20:25:29.985] <TB0> INFO: pixel data incomplete: 0
[20:25:29.985] <TB0> INFO: pixel address: 0
[20:25:29.985] <TB0> INFO: pulse height fill bit: 0
[20:25:29.985] <TB0> INFO: buffer corruption: 0
[20:25:30.005] <TB0> INFO: Decoding statistics:
[20:25:30.005] <TB0> INFO: General information:
[20:25:30.005] <TB0> INFO: 16bit words read: 3420720
[20:25:30.005] <TB0> INFO: valid events total: 353536
[20:25:30.005] <TB0> INFO: empty events: 19152
[20:25:30.005] <TB0> INFO: valid events with pixels: 334384
[20:25:30.005] <TB0> INFO: valid pixel hits: 649752
[20:25:30.005] <TB0> INFO: Event errors: 0
[20:25:30.005] <TB0> INFO: start marker: 0
[20:25:30.005] <TB0> INFO: stop marker: 0
[20:25:30.005] <TB0> INFO: overflow: 0
[20:25:30.005] <TB0> INFO: invalid 5bit words: 0
[20:25:30.005] <TB0> INFO: invalid XOR eye diagram: 0
[20:25:30.005] <TB0> INFO: frame (failed synchr.): 0
[20:25:30.005] <TB0> INFO: idle data (no TBM trl): 0
[20:25:30.005] <TB0> INFO: no data (only TBM hdr): 0
[20:25:30.005] <TB0> INFO: TBM errors: 0
[20:25:30.005] <TB0> INFO: flawed TBM headers: 0
[20:25:30.005] <TB0> INFO: flawed TBM trailers: 0
[20:25:30.005] <TB0> INFO: event ID mismatches: 0
[20:25:30.005] <TB0> INFO: ROC errors: 0
[20:25:30.005] <TB0> INFO: missing ROC header(s): 0
[20:25:30.005] <TB0> INFO: misplaced readback start: 0
[20:25:30.005] <TB0> INFO: Pixel decoding errors: 0
[20:25:30.005] <TB0> INFO: pixel data incomplete: 0
[20:25:30.005] <TB0> INFO: pixel address: 0
[20:25:30.005] <TB0> INFO: pulse height fill bit: 0
[20:25:30.005] <TB0> INFO: buffer corruption: 0
[20:25:30.005] <TB0> INFO: enter test to run
[20:25:30.005] <TB0> INFO: test: Trim80 no parameter change
[20:25:30.005] <TB0> INFO: running: trim80
[20:25:30.023] <TB0> INFO: ######################################################################
[20:25:30.023] <TB0> INFO: PixTestTrim80::doTest()
[20:25:30.023] <TB0> INFO: ######################################################################
[20:25:30.024] <TB0> INFO: ----------------------------------------------------------------------
[20:25:30.024] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[20:25:30.024] <TB0> INFO: ----------------------------------------------------------------------
[20:25:30.065] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:25:30.065] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:25:30.074] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:25:30.074] <TB0> INFO: run 1 of 1
[20:25:30.306] <TB0> INFO: Expecting 5025280 events.
[20:25:57.905] <TB0> INFO: 678784 events read in total (27007ms).
[20:26:24.744] <TB0> INFO: 1353160 events read in total (53846ms).
[20:26:51.732] <TB0> INFO: 2026312 events read in total (80834ms).
[20:27:18.626] <TB0> INFO: 2698288 events read in total (107728ms).
[20:27:45.456] <TB0> INFO: 3368952 events read in total (134558ms).
[20:28:12.220] <TB0> INFO: 4038488 events read in total (161322ms).
[20:28:39.018] <TB0> INFO: 4707408 events read in total (188120ms).
[20:28:52.050] <TB0> INFO: 5025280 events read in total (201152ms).
[20:28:52.109] <TB0> INFO: Test took 202035ms.
[20:29:15.579] <TB0> INFO: ROC 0 VthrComp = 81
[20:29:15.579] <TB0> INFO: ROC 1 VthrComp = 84
[20:29:15.580] <TB0> INFO: ROC 2 VthrComp = 86
[20:29:15.580] <TB0> INFO: ROC 3 VthrComp = 77
[20:29:15.580] <TB0> INFO: ROC 4 VthrComp = 74
[20:29:15.580] <TB0> INFO: ROC 5 VthrComp = 73
[20:29:15.580] <TB0> INFO: ROC 6 VthrComp = 78
[20:29:15.580] <TB0> INFO: ROC 7 VthrComp = 74
[20:29:15.581] <TB0> INFO: ROC 8 VthrComp = 69
[20:29:15.581] <TB0> INFO: ROC 9 VthrComp = 73
[20:29:15.581] <TB0> INFO: ROC 10 VthrComp = 75
[20:29:15.582] <TB0> INFO: ROC 11 VthrComp = 81
[20:29:15.582] <TB0> INFO: ROC 12 VthrComp = 74
[20:29:15.583] <TB0> INFO: ROC 13 VthrComp = 73
[20:29:15.583] <TB0> INFO: ROC 14 VthrComp = 73
[20:29:15.583] <TB0> INFO: ROC 15 VthrComp = 69
[20:29:15.818] <TB0> INFO: Expecting 41600 events.
[20:29:19.274] <TB0> INFO: 41600 events read in total (2864ms).
[20:29:19.275] <TB0> INFO: Test took 3690ms.
[20:29:19.284] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:29:19.284] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:29:19.293] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:29:19.293] <TB0> INFO: run 1 of 1
[20:29:19.571] <TB0> INFO: Expecting 5025280 events.
[20:29:47.247] <TB0> INFO: 680856 events read in total (27084ms).
[20:30:14.394] <TB0> INFO: 1359712 events read in total (54231ms).
[20:30:41.968] <TB0> INFO: 2038576 events read in total (81805ms).
[20:31:08.770] <TB0> INFO: 2715448 events read in total (108607ms).
[20:31:35.413] <TB0> INFO: 3388768 events read in total (135250ms).
[20:32:01.899] <TB0> INFO: 4061424 events read in total (161736ms).
[20:32:28.610] <TB0> INFO: 4732720 events read in total (188447ms).
[20:32:40.276] <TB0> INFO: 5025280 events read in total (200113ms).
[20:32:40.323] <TB0> INFO: Test took 201030ms.
[20:33:04.495] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 106.285 for pixel 51/79 mean/min/max = 90.651/74.9421/106.36
[20:33:04.496] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 105.993 for pixel 9/79 mean/min/max = 90.4761/74.8164/106.136
[20:33:04.496] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 106.539 for pixel 0/4 mean/min/max = 90.3178/74.0502/106.585
[20:33:04.497] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 112.361 for pixel 18/79 mean/min/max = 95.0513/77.6266/112.476
[20:33:04.497] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 108.092 for pixel 0/24 mean/min/max = 92.7097/77.2843/108.135
[20:33:04.498] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 109.33 for pixel 5/64 mean/min/max = 93.3405/77.0717/109.609
[20:33:04.498] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 109.06 for pixel 0/26 mean/min/max = 93.3211/77.561/109.081
[20:33:04.499] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 107.871 for pixel 51/79 mean/min/max = 92.1185/76.3581/107.879
[20:33:04.499] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 102.181 for pixel 50/8 mean/min/max = 88.5842/74.7025/102.466
[20:33:04.499] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 106.388 for pixel 6/58 mean/min/max = 91.9781/76.9165/107.04
[20:33:04.500] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 110.795 for pixel 12/79 mean/min/max = 94.4005/77.7545/111.047
[20:33:04.500] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 106.73 for pixel 0/57 mean/min/max = 91.3892/75.6513/107.127
[20:33:04.501] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 106.325 for pixel 0/18 mean/min/max = 92.359/78.3154/106.403
[20:33:04.501] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 107.57 for pixel 14/56 mean/min/max = 92.3919/77.1825/107.601
[20:33:04.501] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 113.197 for pixel 0/1 mean/min/max = 95.4654/77.6254/113.305
[20:33:04.502] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 107.432 for pixel 0/3 mean/min/max = 90.8072/74.1772/107.437
[20:33:04.502] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:33:04.590] <TB0> INFO: Expecting 411648 events.
[20:33:13.887] <TB0> INFO: 411648 events read in total (8705ms).
[20:33:13.896] <TB0> INFO: Expecting 411648 events.
[20:33:23.015] <TB0> INFO: 411648 events read in total (8716ms).
[20:33:23.024] <TB0> INFO: Expecting 411648 events.
[20:33:32.113] <TB0> INFO: 411648 events read in total (8686ms).
[20:33:32.125] <TB0> INFO: Expecting 411648 events.
[20:33:41.182] <TB0> INFO: 411648 events read in total (8654ms).
[20:33:41.197] <TB0> INFO: Expecting 411648 events.
[20:33:50.196] <TB0> INFO: 411648 events read in total (8596ms).
[20:33:50.219] <TB0> INFO: Expecting 411648 events.
[20:33:59.251] <TB0> INFO: 411648 events read in total (8629ms).
[20:33:59.272] <TB0> INFO: Expecting 411648 events.
[20:34:08.375] <TB0> INFO: 411648 events read in total (8700ms).
[20:34:08.398] <TB0> INFO: Expecting 411648 events.
[20:34:17.453] <TB0> INFO: 411648 events read in total (8652ms).
[20:34:17.481] <TB0> INFO: Expecting 411648 events.
[20:34:26.536] <TB0> INFO: 411648 events read in total (8652ms).
[20:34:26.577] <TB0> INFO: Expecting 411648 events.
[20:34:35.779] <TB0> INFO: 411648 events read in total (8799ms).
[20:34:35.808] <TB0> INFO: Expecting 411648 events.
[20:34:44.898] <TB0> INFO: 411648 events read in total (8686ms).
[20:34:44.932] <TB0> INFO: Expecting 411648 events.
[20:34:54.029] <TB0> INFO: 411648 events read in total (8695ms).
[20:34:54.067] <TB0> INFO: Expecting 411648 events.
[20:35:03.272] <TB0> INFO: 411648 events read in total (8802ms).
[20:35:03.312] <TB0> INFO: Expecting 411648 events.
[20:35:12.387] <TB0> INFO: 411648 events read in total (8672ms).
[20:35:12.429] <TB0> INFO: Expecting 411648 events.
[20:35:21.578] <TB0> INFO: 411648 events read in total (8746ms).
[20:35:21.625] <TB0> INFO: Expecting 411648 events.
[20:35:30.767] <TB0> INFO: 411648 events read in total (8739ms).
[20:35:30.814] <TB0> INFO: Test took 146312ms.
[20:35:32.500] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:35:32.509] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:35:32.509] <TB0> INFO: run 1 of 1
[20:35:32.741] <TB0> INFO: Expecting 5025280 events.
[20:36:00.131] <TB0> INFO: 666832 events read in total (26798ms).
[20:36:27.155] <TB0> INFO: 1332520 events read in total (53822ms).
[20:36:54.250] <TB0> INFO: 1998496 events read in total (80917ms).
[20:37:20.859] <TB0> INFO: 2661288 events read in total (107526ms).
[20:37:47.742] <TB0> INFO: 3319496 events read in total (134409ms).
[20:38:14.658] <TB0> INFO: 3976272 events read in total (161325ms).
[20:38:41.592] <TB0> INFO: 4630248 events read in total (188259ms).
[20:38:57.836] <TB0> INFO: 5025280 events read in total (204503ms).
[20:38:57.904] <TB0> INFO: Test took 205395ms.
[20:39:24.009] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 54.001790 .. 100.188920
[20:39:24.315] <TB0> INFO: Expecting 208000 events.
[20:39:33.887] <TB0> INFO: 208000 events read in total (8981ms).
[20:39:33.888] <TB0> INFO: Test took 9877ms.
[20:39:33.954] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 44 .. 110 (-1/-1) hits flags = 528 (plus default)
[20:39:33.965] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:39:33.965] <TB0> INFO: run 1 of 1
[20:39:34.243] <TB0> INFO: Expecting 2229760 events.
[20:40:02.448] <TB0> INFO: 683792 events read in total (27614ms).
[20:40:30.113] <TB0> INFO: 1368168 events read in total (55279ms).
[20:40:58.567] <TB0> INFO: 2045184 events read in total (83733ms).
[20:41:06.582] <TB0> INFO: 2229760 events read in total (91748ms).
[20:41:06.615] <TB0> INFO: Test took 92651ms.
[20:41:24.054] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 62.853213 .. 91.305101
[20:41:24.289] <TB0> INFO: Expecting 208000 events.
[20:41:33.819] <TB0> INFO: 208000 events read in total (8938ms).
[20:41:33.820] <TB0> INFO: Test took 9765ms.
[20:41:33.886] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 52 .. 101 (-1/-1) hits flags = 528 (plus default)
[20:41:33.897] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:41:33.897] <TB0> INFO: run 1 of 1
[20:41:34.175] <TB0> INFO: Expecting 1664000 events.
[20:42:02.485] <TB0> INFO: 692576 events read in total (27718ms).
[20:42:30.422] <TB0> INFO: 1385056 events read in total (55655ms).
[20:42:42.390] <TB0> INFO: 1664000 events read in total (67623ms).
[20:42:42.419] <TB0> INFO: Test took 68521ms.
[20:43:00.271] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 66.079181 .. 86.117328
[20:43:00.513] <TB0> INFO: Expecting 208000 events.
[20:43:10.246] <TB0> INFO: 208000 events read in total (9141ms).
[20:43:10.247] <TB0> INFO: Test took 9975ms.
[20:43:10.293] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 56 .. 96 (-1/-1) hits flags = 528 (plus default)
[20:43:10.303] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:43:10.303] <TB0> INFO: run 1 of 1
[20:43:10.581] <TB0> INFO: Expecting 1364480 events.
[20:43:40.138] <TB0> INFO: 703904 events read in total (28965ms).
[20:44:06.564] <TB0> INFO: 1364480 events read in total (55391ms).
[20:44:06.585] <TB0> INFO: Test took 56282ms.
[20:44:23.412] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 68.744504 .. 86.117328
[20:44:23.646] <TB0> INFO: Expecting 208000 events.
[20:44:33.219] <TB0> INFO: 208000 events read in total (8982ms).
[20:44:33.219] <TB0> INFO: Test took 9805ms.
[20:44:33.268] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 96 (-1/-1) hits flags = 528 (plus default)
[20:44:33.278] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:44:33.278] <TB0> INFO: run 1 of 1
[20:44:33.556] <TB0> INFO: Expecting 1297920 events.
[20:45:02.459] <TB0> INFO: 697288 events read in total (28311ms).
[20:45:26.577] <TB0> INFO: 1297920 events read in total (52429ms).
[20:45:26.600] <TB0> INFO: Test took 53323ms.
[20:45:41.905] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[20:45:41.905] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[20:45:41.918] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[20:45:41.918] <TB0> INFO: run 1 of 1
[20:45:42.194] <TB0> INFO: Expecting 1364480 events.
[20:46:09.985] <TB0> INFO: 669120 events read in total (27199ms).
[20:46:37.340] <TB0> INFO: 1337512 events read in total (54555ms).
[20:46:38.884] <TB0> INFO: 1364480 events read in total (56098ms).
[20:46:38.903] <TB0> INFO: Test took 56985ms.
[20:46:55.725] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C0.dat
[20:46:55.725] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C1.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C2.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C3.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C4.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C5.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C6.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C7.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C8.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C9.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C10.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C11.dat
[20:46:55.726] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C12.dat
[20:46:55.727] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C13.dat
[20:46:55.727] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C14.dat
[20:46:55.727] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//dacParameters80_C15.dat
[20:46:55.727] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C0.dat
[20:46:55.735] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C1.dat
[20:46:55.742] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C2.dat
[20:46:55.749] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C3.dat
[20:46:55.756] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C4.dat
[20:46:55.764] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C5.dat
[20:46:55.771] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C6.dat
[20:46:55.778] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C7.dat
[20:46:55.785] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C8.dat
[20:46:55.792] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C9.dat
[20:46:55.798] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C10.dat
[20:46:55.803] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C11.dat
[20:46:55.810] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C12.dat
[20:46:55.825] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C13.dat
[20:46:55.831] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C14.dat
[20:46:55.836] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1093_FullQualification_2016-10-26_16h26m_1477492000//003_FulltestTrim80_p17//trimParameters80_C15.dat
[20:46:55.842] <TB0> INFO: PixTestTrim80::trimTest() done
[20:46:55.842] <TB0> INFO: vtrim: 107 93 102 113 88 117 116 93 92 89 119 110 88 104 120 103
[20:46:55.842] <TB0> INFO: vthrcomp: 81 84 86 77 74 73 78 74 69 73 75 81 74 73 73 69
[20:46:55.842] <TB0> INFO: vcal mean: 79.98 79.98 79.94 79.99 79.95 80.00 79.97 80.04 79.94 80.01 80.00 79.97 80.04 79.98 79.99 79.98
[20:46:55.842] <TB0> INFO: vcal RMS: 0.76 0.79 0.76 0.81 0.69 0.75 0.77 0.72 0.78 0.73 0.78 0.78 0.74 0.74 0.80 0.78
[20:46:55.842] <TB0> INFO: bits mean: 10.27 10.27 10.26 9.83 9.24 9.52 10.09 9.59 10.92 9.36 9.71 10.16 9.27 9.62 9.37 10.78
[20:46:55.842] <TB0> INFO: bits RMS: 2.33 2.40 2.45 2.09 2.38 2.32 2.03 2.40 2.21 2.39 2.14 2.28 2.28 2.31 2.27 2.19
[20:46:55.848] <TB0> INFO: ----------------------------------------------------------------------
[20:46:55.848] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:46:55.848] <TB0> INFO: ----------------------------------------------------------------------
[20:46:55.851] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:46:55.860] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:46:55.860] <TB0> INFO: run 1 of 1
[20:46:56.093] <TB0> INFO: Expecting 4160000 events.
[20:47:27.993] <TB0> INFO: 760690 events read in total (31309ms).
[20:47:59.482] <TB0> INFO: 1518230 events read in total (62798ms).
[20:48:30.997] <TB0> INFO: 2271990 events read in total (94313ms).
[20:49:02.255] <TB0> INFO: 3021745 events read in total (125571ms).
[20:49:33.733] <TB0> INFO: 3769370 events read in total (157049ms).
[20:49:50.069] <TB0> INFO: 4160000 events read in total (173385ms).
[20:49:50.116] <TB0> INFO: Test took 174257ms.
[20:50:18.912] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[20:50:18.923] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:50:18.923] <TB0> INFO: run 1 of 1
[20:50:19.155] <TB0> INFO: Expecting 4284800 events.
[20:50:50.742] <TB0> INFO: 727370 events read in total (30995ms).
[20:51:21.626] <TB0> INFO: 1453105 events read in total (61879ms).
[20:51:52.437] <TB0> INFO: 2176170 events read in total (92690ms).
[20:52:23.332] <TB0> INFO: 2896350 events read in total (123585ms).
[20:52:54.153] <TB0> INFO: 3613950 events read in total (154406ms).
[20:53:22.847] <TB0> INFO: 4284800 events read in total (183100ms).
[20:53:22.917] <TB0> INFO: Test took 183993ms.
[20:53:52.657] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[20:53:52.666] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:53:52.667] <TB0> INFO: run 1 of 1
[20:53:52.898] <TB0> INFO: Expecting 4243200 events.
[20:54:24.921] <TB0> INFO: 730585 events read in total (31432ms).
[20:54:56.233] <TB0> INFO: 1459040 events read in total (62744ms).
[20:55:26.978] <TB0> INFO: 2184910 events read in total (93489ms).
[20:55:58.072] <TB0> INFO: 2908030 events read in total (124583ms).
[20:56:28.955] <TB0> INFO: 3628550 events read in total (155466ms).
[20:56:55.682] <TB0> INFO: 4243200 events read in total (182193ms).
[20:56:55.748] <TB0> INFO: Test took 183081ms.
[20:57:25.064] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[20:57:25.074] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[20:57:25.074] <TB0> INFO: run 1 of 1
[20:57:25.306] <TB0> INFO: Expecting 4243200 events.
[20:57:56.832] <TB0> INFO: 730725 events read in total (30935ms).
[20:58:27.697] <TB0> INFO: 1459445 events read in total (61800ms).
[20:58:58.582] <TB0> INFO: 2185590 events read in total (92686ms).
[20:59:29.393] <TB0> INFO: 2908845 events read in total (123496ms).
[21:00:00.145] <TB0> INFO: 3629435 events read in total (154248ms).
[21:00:26.388] <TB0> INFO: 4243200 events read in total (180491ms).
[21:00:26.442] <TB0> INFO: Test took 181367ms.
[21:00:53.497] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[21:00:53.506] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[21:00:53.506] <TB0> INFO: run 1 of 1
[21:00:53.738] <TB0> INFO: Expecting 4243200 events.
[21:01:25.451] <TB0> INFO: 730810 events read in total (31121ms).
[21:01:56.564] <TB0> INFO: 1459535 events read in total (62234ms).
[21:02:27.383] <TB0> INFO: 2185725 events read in total (93053ms).
[21:02:58.610] <TB0> INFO: 2909120 events read in total (124280ms).
[21:03:30.703] <TB0> INFO: 3629905 events read in total (156373ms).
[21:03:57.419] <TB0> INFO: 4243200 events read in total (183089ms).
[21:03:57.473] <TB0> INFO: Test took 183967ms.
[21:04:20.672] <TB0> INFO: PixTestTrim80::trimBitTest() done
[21:04:20.674] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2330 seconds
[21:04:21.324] <TB0> INFO: enter test to run
[21:04:21.324] <TB0> INFO: test: exit no parameter change
[21:04:21.422] <TB0> QUIET: Connection to board 73 closed.
[21:04:21.423] <TB0> INFO: pXar: this is the end, my friend