[11:16:29.579] <TB3> INFO: *** Welcome to pxar ***
[11:16:29.579] <TB3> INFO: *** Today: 2016/10/31
[11:16:29.586] <TB3> INFO: *** Version: c8ba-dirty
[11:16:29.586] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C15.dat
[11:16:29.586] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1b.dat
[11:16:29.586] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//defaultMaskFile.dat
[11:16:29.586] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters_C15.dat
[11:16:29.674] <TB3> INFO: clk: 4
[11:16:29.674] <TB3> INFO: ctr: 4
[11:16:29.674] <TB3> INFO: sda: 19
[11:16:29.674] <TB3> INFO: tin: 9
[11:16:29.674] <TB3> INFO: level: 15
[11:16:29.674] <TB3> INFO: triggerdelay: 0
[11:16:29.674] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[11:16:29.674] <TB3> INFO: Log level: INFO
[11:16:29.683] <TB3> INFO: Found DTB DTB_WWVASW
[11:16:29.691] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[11:16:29.693] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:16:29.695] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[11:16:31.192] <TB3> INFO: DUT info:
[11:16:31.193] <TB3> INFO: The DUT currently contains the following objects:
[11:16:31.193] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[11:16:31.193] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:16:31.193] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:16:31.193] <TB3> INFO: TBM Core alpha (2): 7 registers set
[11:16:31.193] <TB3> INFO: TBM Core beta (3): 7 registers set
[11:16:31.193] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:16:31.193] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.193] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.194] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.194] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.194] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.194] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:31.595] <TB3> INFO: enter 'restricted' command line mode
[11:16:31.595] <TB3> INFO: enter test to run
[11:16:31.595] <TB3> INFO: test: pretest no parameter change
[11:16:31.595] <TB3> INFO: running: pretest
[11:16:31.604] <TB3> INFO: ######################################################################
[11:16:31.604] <TB3> INFO: PixTestPretest::doTest()
[11:16:31.604] <TB3> INFO: ######################################################################
[11:16:31.605] <TB3> INFO: ----------------------------------------------------------------------
[11:16:31.605] <TB3> INFO: PixTestPretest::programROC()
[11:16:31.605] <TB3> INFO: ----------------------------------------------------------------------
[11:16:49.619] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:16:49.619] <TB3> INFO: IA differences per ROC: 18.5 16.9 19.3 19.3 20.9 19.3 19.3 18.5 20.1 22.5 21.7 20.9 21.7 20.1 19.3 16.9
[11:16:49.683] <TB3> INFO: ----------------------------------------------------------------------
[11:16:49.683] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:16:49.683] <TB3> INFO: ----------------------------------------------------------------------
[11:16:56.689] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[11:16:56.689] <TB3> INFO: i(loss) [mA/ROC]: 20.1 19.3 18.5 18.5 18.5 18.5 19.3 19.3 19.3 19.3 19.3 18.5 19.3 18.5 19.3 18.5
[11:16:56.721] <TB3> INFO: ----------------------------------------------------------------------
[11:16:56.721] <TB3> INFO: PixTestPretest::findTiming()
[11:16:56.721] <TB3> INFO: ----------------------------------------------------------------------
[11:16:56.721] <TB3> INFO: PixTestCmd::init()

[11:17:28.921] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 1, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:17:28.921] <TB3> INFO: (success/tries = 100/100), width = 4
[11:17:30.425] <TB3> INFO: ----------------------------------------------------------------------
[11:17:30.425] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:17:30.425] <TB3> INFO: ----------------------------------------------------------------------
[11:17:30.519] <TB3> INFO: Expecting 231680 events.
[11:17:40.490] <TB3> INFO: 231680 events read in total (9379ms).
[11:17:40.499] <TB3> INFO: Test took 10069ms.
[11:17:40.746] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:17:40.784] <TB3> INFO: ----------------------------------------------------------------------
[11:17:40.784] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:17:40.784] <TB3> INFO: ----------------------------------------------------------------------
[11:17:40.895] <TB3> INFO: Expecting 231680 events.
[11:17:50.889] <TB3> INFO: 231680 events read in total (9402ms).
[11:17:50.900] <TB3> INFO: Test took 10094ms.
[11:17:51.166] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:17:51.166] <TB3> INFO: CalDel: 94 99 94 84 89 99 115 104 93 113 104 80 107 105 107 91
[11:17:51.166] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:17:51.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C0.dat
[11:17:51.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C1.dat
[11:17:51.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C2.dat
[11:17:51.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C3.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C4.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C5.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C6.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C7.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C8.dat
[11:17:51.171] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C9.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C10.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C11.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C12.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C13.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C14.dat
[11:17:51.172] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C15.dat
[11:17:51.173] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0a.dat
[11:17:51.173] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0b.dat
[11:17:51.173] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1a.dat
[11:17:51.173] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1b.dat
[11:17:51.173] <TB3> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[11:17:51.226] <TB3> INFO: enter test to run
[11:17:51.226] <TB3> INFO: test: FullTest no parameter change
[11:17:51.226] <TB3> INFO: running: fulltest
[11:17:51.226] <TB3> INFO: ######################################################################
[11:17:51.226] <TB3> INFO: PixTestFullTest::doTest()
[11:17:51.226] <TB3> INFO: ######################################################################
[11:17:51.228] <TB3> INFO: ######################################################################
[11:17:51.228] <TB3> INFO: PixTestAlive::doTest()
[11:17:51.228] <TB3> INFO: ######################################################################
[11:17:51.230] <TB3> INFO: ----------------------------------------------------------------------
[11:17:51.230] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:51.230] <TB3> INFO: ----------------------------------------------------------------------
[11:17:51.467] <TB3> INFO: Expecting 41600 events.
[11:17:54.949] <TB3> INFO: 41600 events read in total (2891ms).
[11:17:54.950] <TB3> INFO: Test took 3719ms.
[11:17:55.184] <TB3> INFO: PixTestAlive::aliveTest() done
[11:17:55.184] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:17:55.185] <TB3> INFO: ----------------------------------------------------------------------
[11:17:55.185] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:55.185] <TB3> INFO: ----------------------------------------------------------------------
[11:17:55.427] <TB3> INFO: Expecting 41600 events.
[11:17:58.448] <TB3> INFO: 41600 events read in total (2430ms).
[11:17:58.448] <TB3> INFO: Test took 3260ms.
[11:17:58.449] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:17:58.687] <TB3> INFO: PixTestAlive::maskTest() done
[11:17:58.687] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:17:58.688] <TB3> INFO: ----------------------------------------------------------------------
[11:17:58.689] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:58.689] <TB3> INFO: ----------------------------------------------------------------------
[11:17:58.952] <TB3> INFO: Expecting 41600 events.
[11:18:02.537] <TB3> INFO: 41600 events read in total (2993ms).
[11:18:02.538] <TB3> INFO: Test took 3848ms.
[11:18:02.779] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[11:18:02.779] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:18:02.779] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:18:02.779] <TB3> INFO: Decoding statistics:
[11:18:02.779] <TB3> INFO: General information:
[11:18:02.779] <TB3> INFO: 16bit words read: 0
[11:18:02.779] <TB3> INFO: valid events total: 0
[11:18:02.779] <TB3> INFO: empty events: 0
[11:18:02.779] <TB3> INFO: valid events with pixels: 0
[11:18:02.779] <TB3> INFO: valid pixel hits: 0
[11:18:02.779] <TB3> INFO: Event errors: 0
[11:18:02.779] <TB3> INFO: start marker: 0
[11:18:02.779] <TB3> INFO: stop marker: 0
[11:18:02.779] <TB3> INFO: overflow: 0
[11:18:02.779] <TB3> INFO: invalid 5bit words: 0
[11:18:02.779] <TB3> INFO: invalid XOR eye diagram: 0
[11:18:02.779] <TB3> INFO: frame (failed synchr.): 0
[11:18:02.779] <TB3> INFO: idle data (no TBM trl): 0
[11:18:02.779] <TB3> INFO: no data (only TBM hdr): 0
[11:18:02.779] <TB3> INFO: TBM errors: 0
[11:18:02.779] <TB3> INFO: flawed TBM headers: 0
[11:18:02.779] <TB3> INFO: flawed TBM trailers: 0
[11:18:02.779] <TB3> INFO: event ID mismatches: 0
[11:18:02.779] <TB3> INFO: ROC errors: 0
[11:18:02.779] <TB3> INFO: missing ROC header(s): 0
[11:18:02.779] <TB3> INFO: misplaced readback start: 0
[11:18:02.779] <TB3> INFO: Pixel decoding errors: 0
[11:18:02.779] <TB3> INFO: pixel data incomplete: 0
[11:18:02.779] <TB3> INFO: pixel address: 0
[11:18:02.779] <TB3> INFO: pulse height fill bit: 0
[11:18:02.779] <TB3> INFO: buffer corruption: 0
[11:18:02.784] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:18:02.784] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:18:02.784] <TB3> INFO: ######################################################################
[11:18:02.784] <TB3> INFO: PixTestReadback::doTest()
[11:18:02.784] <TB3> INFO: ######################################################################
[11:18:02.784] <TB3> INFO: ----------------------------------------------------------------------
[11:18:02.784] <TB3> INFO: PixTestReadback::CalibrateVd()
[11:18:02.784] <TB3> INFO: ----------------------------------------------------------------------
[11:18:12.754] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:18:12.755] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:18:12.756] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:18:12.756] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:18:12.756] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:18:12.756] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:18:12.787] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:18:12.787] <TB3> INFO: ----------------------------------------------------------------------
[11:18:12.787] <TB3> INFO: PixTestReadback::CalibrateVa()
[11:18:12.787] <TB3> INFO: ----------------------------------------------------------------------
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:18:22.728] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:18:22.729] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:18:22.761] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:18:22.761] <TB3> INFO: ----------------------------------------------------------------------
[11:18:22.762] <TB3> INFO: PixTestReadback::readbackVbg()
[11:18:22.762] <TB3> INFO: ----------------------------------------------------------------------
[11:18:30.438] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:18:30.439] <TB3> INFO: ----------------------------------------------------------------------
[11:18:30.439] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[11:18:30.439] <TB3> INFO: ----------------------------------------------------------------------
[11:18:30.439] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.3calibrated Vbg = 1.19481 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.8calibrated Vbg = 1.19225 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 148.3calibrated Vbg = 1.19113 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 149.9calibrated Vbg = 1.18329 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 148.1calibrated Vbg = 1.19011 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 161.3calibrated Vbg = 1.1968 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 147.9calibrated Vbg = 1.19226 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 164.9calibrated Vbg = 1.19243 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 148.2calibrated Vbg = 1.19448 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.8calibrated Vbg = 1.18673 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.2calibrated Vbg = 1.18445 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 162.5calibrated Vbg = 1.1823 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.1calibrated Vbg = 1.18682 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.5calibrated Vbg = 1.19232 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.9calibrated Vbg = 1.18896 :::*/*/*/*/
[11:18:30.439] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 144.8calibrated Vbg = 1.19137 :::*/*/*/*/
[11:18:30.442] <TB3> INFO: ----------------------------------------------------------------------
[11:18:30.442] <TB3> INFO: PixTestReadback::CalibrateIa()
[11:18:30.442] <TB3> INFO: ----------------------------------------------------------------------
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:21:11.260] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:21:11.261] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:21:11.290] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:21:11.292] <TB3> INFO: PixTestReadback::doTest() done
[11:21:11.292] <TB3> INFO: Decoding statistics:
[11:21:11.292] <TB3> INFO: General information:
[11:21:11.292] <TB3> INFO: 16bit words read: 1536
[11:21:11.292] <TB3> INFO: valid events total: 256
[11:21:11.292] <TB3> INFO: empty events: 256
[11:21:11.292] <TB3> INFO: valid events with pixels: 0
[11:21:11.292] <TB3> INFO: valid pixel hits: 0
[11:21:11.292] <TB3> INFO: Event errors: 0
[11:21:11.292] <TB3> INFO: start marker: 0
[11:21:11.292] <TB3> INFO: stop marker: 0
[11:21:11.292] <TB3> INFO: overflow: 0
[11:21:11.292] <TB3> INFO: invalid 5bit words: 0
[11:21:11.292] <TB3> INFO: invalid XOR eye diagram: 0
[11:21:11.292] <TB3> INFO: frame (failed synchr.): 0
[11:21:11.292] <TB3> INFO: idle data (no TBM trl): 0
[11:21:11.292] <TB3> INFO: no data (only TBM hdr): 0
[11:21:11.292] <TB3> INFO: TBM errors: 0
[11:21:11.292] <TB3> INFO: flawed TBM headers: 0
[11:21:11.292] <TB3> INFO: flawed TBM trailers: 0
[11:21:11.292] <TB3> INFO: event ID mismatches: 0
[11:21:11.292] <TB3> INFO: ROC errors: 0
[11:21:11.292] <TB3> INFO: missing ROC header(s): 0
[11:21:11.292] <TB3> INFO: misplaced readback start: 0
[11:21:11.292] <TB3> INFO: Pixel decoding errors: 0
[11:21:11.292] <TB3> INFO: pixel data incomplete: 0
[11:21:11.292] <TB3> INFO: pixel address: 0
[11:21:11.292] <TB3> INFO: pulse height fill bit: 0
[11:21:11.292] <TB3> INFO: buffer corruption: 0
[11:21:11.347] <TB3> INFO: ######################################################################
[11:21:11.347] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:21:11.347] <TB3> INFO: ######################################################################
[11:21:11.349] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:21:11.371] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:21:11.371] <TB3> INFO: run 1 of 1
[11:21:11.611] <TB3> INFO: Expecting 3120000 events.
[11:21:41.808] <TB3> INFO: 647810 events read in total (29606ms).
[11:22:11.080] <TB3> INFO: 1290875 events read in total (58877ms).











[11:22:40.347] <TB3> INFO: 1931310 events read in total (88144ms).











[11:23:09.762] <TB3> INFO: 2573130 events read in total (117559ms).











[11:23:35.297] <TB3> INFO: 3120000 events read in total (143094ms).
[11:23:35.395] <TB3> INFO: Test took 144025ms.
[11:24:01.985] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 170 seconds
[11:24:01.985] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[11:24:01.986] <TB3> INFO: separation cut (per ROC): 107 105 103 101 103 113 101 105 109 110 112 114 95 100 106 105
[11:24:01.986] <TB3> INFO: Decoding statistics:
[11:24:01.986] <TB3> INFO: General information:
[11:24:01.986] <TB3> INFO: 16bit words read: 0
[11:24:01.986] <TB3> INFO: valid events total: 0
[11:24:01.986] <TB3> INFO: empty events: 0
[11:24:01.986] <TB3> INFO: valid events with pixels: 0
[11:24:01.986] <TB3> INFO: valid pixel hits: 0
[11:24:01.986] <TB3> INFO: Event errors: 0
[11:24:01.986] <TB3> INFO: start marker: 0
[11:24:01.986] <TB3> INFO: stop marker: 0
[11:24:01.986] <TB3> INFO: overflow: 0
[11:24:01.986] <TB3> INFO: invalid 5bit words: 0
[11:24:01.986] <TB3> INFO: invalid XOR eye diagram: 0
[11:24:01.986] <TB3> INFO: frame (failed synchr.): 0
[11:24:01.986] <TB3> INFO: idle data (no TBM trl): 0
[11:24:01.986] <TB3> INFO: no data (only TBM hdr): 0
[11:24:01.986] <TB3> INFO: TBM errors: 0
[11:24:01.986] <TB3> INFO: flawed TBM headers: 0
[11:24:01.986] <TB3> INFO: flawed TBM trailers: 0
[11:24:01.986] <TB3> INFO: event ID mismatches: 0
[11:24:01.986] <TB3> INFO: ROC errors: 0
[11:24:01.986] <TB3> INFO: missing ROC header(s): 0
[11:24:01.986] <TB3> INFO: misplaced readback start: 0
[11:24:01.986] <TB3> INFO: Pixel decoding errors: 0
[11:24:01.986] <TB3> INFO: pixel data incomplete: 0
[11:24:01.986] <TB3> INFO: pixel address: 0
[11:24:01.986] <TB3> INFO: pulse height fill bit: 0
[11:24:01.986] <TB3> INFO: buffer corruption: 0
[11:24:02.025] <TB3> INFO: ######################################################################
[11:24:02.025] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:24:02.025] <TB3> INFO: ######################################################################
[11:24:02.025] <TB3> INFO: ----------------------------------------------------------------------
[11:24:02.025] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:24:02.025] <TB3> INFO: ----------------------------------------------------------------------
[11:24:02.025] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:24:02.039] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:24:02.039] <TB3> INFO: run 1 of 1
[11:24:02.280] <TB3> INFO: Expecting 36608000 events.
[11:24:25.883] <TB3> INFO: 674350 events read in total (23011ms).
[11:24:48.755] <TB3> INFO: 1334700 events read in total (45883ms).
[11:25:11.495] <TB3> INFO: 1994950 events read in total (68623ms).
[11:25:34.120] <TB3> INFO: 2654050 events read in total (91248ms).
[11:25:57.047] <TB3> INFO: 3311500 events read in total (114175ms).
[11:26:19.827] <TB3> INFO: 3967300 events read in total (136955ms).
[11:26:42.646] <TB3> INFO: 4625300 events read in total (159774ms).
[11:27:05.602] <TB3> INFO: 5284050 events read in total (182730ms).
[11:27:28.436] <TB3> INFO: 5939900 events read in total (205564ms).
[11:27:51.208] <TB3> INFO: 6598050 events read in total (228336ms).
[11:28:14.028] <TB3> INFO: 7254000 events read in total (251156ms).
[11:28:36.704] <TB3> INFO: 7908100 events read in total (273832ms).
[11:28:59.548] <TB3> INFO: 8562000 events read in total (296676ms).
[11:29:22.246] <TB3> INFO: 9217800 events read in total (319374ms).
[11:29:45.056] <TB3> INFO: 9872250 events read in total (342184ms).
[11:30:07.715] <TB3> INFO: 10525400 events read in total (364843ms).
[11:30:30.615] <TB3> INFO: 11180100 events read in total (387743ms).
[11:30:53.104] <TB3> INFO: 11832450 events read in total (410232ms).
[11:31:15.699] <TB3> INFO: 12484950 events read in total (432827ms).
[11:31:38.375] <TB3> INFO: 13137800 events read in total (455503ms).
[11:32:00.916] <TB3> INFO: 13790850 events read in total (478044ms).
[11:32:23.480] <TB3> INFO: 14445000 events read in total (500608ms).
[11:32:45.764] <TB3> INFO: 15097150 events read in total (522892ms).
[11:33:08.235] <TB3> INFO: 15749100 events read in total (545363ms).
[11:33:30.904] <TB3> INFO: 16401000 events read in total (568032ms).
[11:33:53.665] <TB3> INFO: 17051750 events read in total (590793ms).
[11:34:16.194] <TB3> INFO: 17702950 events read in total (613322ms).
[11:34:38.769] <TB3> INFO: 18352800 events read in total (635897ms).
[11:35:01.097] <TB3> INFO: 19001500 events read in total (658225ms).
[11:35:23.754] <TB3> INFO: 19647850 events read in total (680882ms).
[11:35:46.318] <TB3> INFO: 20297650 events read in total (703446ms).
[11:36:09.011] <TB3> INFO: 20946300 events read in total (726139ms).
[11:36:31.757] <TB3> INFO: 21594450 events read in total (748886ms).
[11:36:54.234] <TB3> INFO: 22242000 events read in total (771362ms).
[11:37:16.609] <TB3> INFO: 22888000 events read in total (793737ms).
[11:37:39.285] <TB3> INFO: 23536700 events read in total (816413ms).
[11:38:02.026] <TB3> INFO: 24184800 events read in total (839154ms).
[11:38:24.511] <TB3> INFO: 24832650 events read in total (861639ms).
[11:38:47.256] <TB3> INFO: 25480700 events read in total (884384ms).
[11:39:09.950] <TB3> INFO: 26126500 events read in total (907078ms).
[11:39:32.528] <TB3> INFO: 26773500 events read in total (929656ms).
[11:39:54.964] <TB3> INFO: 27419900 events read in total (952092ms).
[11:40:17.618] <TB3> INFO: 28067700 events read in total (974746ms).
[11:40:39.997] <TB3> INFO: 28712600 events read in total (997125ms).
[11:41:02.451] <TB3> INFO: 29357400 events read in total (1019579ms).
[11:41:25.306] <TB3> INFO: 30002800 events read in total (1042434ms).
[11:41:48.098] <TB3> INFO: 30648000 events read in total (1065226ms).
[11:42:10.670] <TB3> INFO: 31292450 events read in total (1087798ms).
[11:42:33.244] <TB3> INFO: 31938550 events read in total (1110372ms).
[11:42:55.667] <TB3> INFO: 32583400 events read in total (1132795ms).
[11:43:18.123] <TB3> INFO: 33228350 events read in total (1155251ms).
[11:43:40.781] <TB3> INFO: 33875700 events read in total (1177909ms).
[11:44:03.453] <TB3> INFO: 34522000 events read in total (1200581ms).
[11:44:25.852] <TB3> INFO: 35168150 events read in total (1222980ms).
[11:44:48.496] <TB3> INFO: 35814850 events read in total (1245624ms).
[11:45:11.222] <TB3> INFO: 36472250 events read in total (1268350ms).
[11:45:16.279] <TB3> INFO: 36608000 events read in total (1273407ms).
[11:45:16.390] <TB3> INFO: Test took 1274351ms.
[11:45:16.838] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:18.970] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:20.689] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:22.715] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:24.821] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:26.472] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:28.241] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:29.983] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:31.988] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:34.266] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:36.305] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:37.976] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:39.944] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:42.029] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:44.191] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:46.762] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:45:48.799] <TB3> INFO: PixTestScurves::scurves() done
[11:45:48.799] <TB3> INFO: Vcal mean: 110.65 112.72 102.53 108.69 110.94 125.27 104.71 116.34 119.63 115.12 119.12 120.00 107.83 102.75 111.98 115.92
[11:45:48.799] <TB3> INFO: Vcal RMS: 4.64 5.62 5.27 5.40 4.62 5.88 5.20 5.75 5.86 5.66 6.14 6.25 6.61 4.74 5.06 5.37
[11:45:48.799] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1306 seconds
[11:45:48.799] <TB3> INFO: Decoding statistics:
[11:45:48.799] <TB3> INFO: General information:
[11:45:48.799] <TB3> INFO: 16bit words read: 0
[11:45:48.799] <TB3> INFO: valid events total: 0
[11:45:48.799] <TB3> INFO: empty events: 0
[11:45:48.799] <TB3> INFO: valid events with pixels: 0
[11:45:48.799] <TB3> INFO: valid pixel hits: 0
[11:45:48.799] <TB3> INFO: Event errors: 0
[11:45:48.799] <TB3> INFO: start marker: 0
[11:45:48.799] <TB3> INFO: stop marker: 0
[11:45:48.799] <TB3> INFO: overflow: 0
[11:45:48.799] <TB3> INFO: invalid 5bit words: 0
[11:45:48.799] <TB3> INFO: invalid XOR eye diagram: 0
[11:45:48.799] <TB3> INFO: frame (failed synchr.): 0
[11:45:48.799] <TB3> INFO: idle data (no TBM trl): 0
[11:45:48.799] <TB3> INFO: no data (only TBM hdr): 0
[11:45:48.799] <TB3> INFO: TBM errors: 0
[11:45:48.799] <TB3> INFO: flawed TBM headers: 0
[11:45:48.799] <TB3> INFO: flawed TBM trailers: 0
[11:45:48.799] <TB3> INFO: event ID mismatches: 0
[11:45:48.799] <TB3> INFO: ROC errors: 0
[11:45:48.799] <TB3> INFO: missing ROC header(s): 0
[11:45:48.799] <TB3> INFO: misplaced readback start: 0
[11:45:48.799] <TB3> INFO: Pixel decoding errors: 0
[11:45:48.799] <TB3> INFO: pixel data incomplete: 0
[11:45:48.799] <TB3> INFO: pixel address: 0
[11:45:48.799] <TB3> INFO: pulse height fill bit: 0
[11:45:48.799] <TB3> INFO: buffer corruption: 0
[11:45:48.876] <TB3> INFO: ######################################################################
[11:45:48.876] <TB3> INFO: PixTestTrim::doTest()
[11:45:48.876] <TB3> INFO: ######################################################################
[11:45:48.878] <TB3> INFO: ----------------------------------------------------------------------
[11:45:48.878] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:45:48.878] <TB3> INFO: ----------------------------------------------------------------------
[11:45:48.922] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:45:48.922] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:45:48.935] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:48.935] <TB3> INFO: run 1 of 1
[11:45:49.175] <TB3> INFO: Expecting 5025280 events.
[11:46:19.704] <TB3> INFO: 815976 events read in total (29927ms).
[11:46:49.490] <TB3> INFO: 1625552 events read in total (59713ms).
[11:47:19.463] <TB3> INFO: 2432496 events read in total (89686ms).
[11:47:49.221] <TB3> INFO: 3234112 events read in total (119444ms).
[11:48:19.242] <TB3> INFO: 4033896 events read in total (149465ms).
[11:48:48.643] <TB3> INFO: 4832344 events read in total (178866ms).
[11:48:56.054] <TB3> INFO: 5025280 events read in total (186277ms).
[11:48:56.108] <TB3> INFO: Test took 187173ms.
[11:49:14.970] <TB3> INFO: ROC 0 VthrComp = 124
[11:49:14.970] <TB3> INFO: ROC 1 VthrComp = 119
[11:49:14.970] <TB3> INFO: ROC 2 VthrComp = 115
[11:49:14.971] <TB3> INFO: ROC 3 VthrComp = 118
[11:49:14.971] <TB3> INFO: ROC 4 VthrComp = 117
[11:49:14.971] <TB3> INFO: ROC 5 VthrComp = 130
[11:49:14.971] <TB3> INFO: ROC 6 VthrComp = 112
[11:49:14.973] <TB3> INFO: ROC 7 VthrComp = 125
[11:49:14.973] <TB3> INFO: ROC 8 VthrComp = 130
[11:49:14.973] <TB3> INFO: ROC 9 VthrComp = 126
[11:49:14.973] <TB3> INFO: ROC 10 VthrComp = 128
[11:49:14.973] <TB3> INFO: ROC 11 VthrComp = 126
[11:49:14.973] <TB3> INFO: ROC 12 VthrComp = 113
[11:49:14.973] <TB3> INFO: ROC 13 VthrComp = 114
[11:49:14.973] <TB3> INFO: ROC 14 VthrComp = 122
[11:49:14.974] <TB3> INFO: ROC 15 VthrComp = 123
[11:49:15.240] <TB3> INFO: Expecting 41600 events.
[11:49:18.696] <TB3> INFO: 41600 events read in total (2865ms).
[11:49:18.697] <TB3> INFO: Test took 3722ms.
[11:49:18.707] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:49:18.707] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:49:18.718] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:49:18.718] <TB3> INFO: run 1 of 1
[11:49:18.996] <TB3> INFO: Expecting 5025280 events.
[11:49:45.482] <TB3> INFO: 590016 events read in total (25895ms).
[11:50:11.571] <TB3> INFO: 1178712 events read in total (51984ms).
[11:50:37.627] <TB3> INFO: 1767944 events read in total (78040ms).
[11:51:04.326] <TB3> INFO: 2356296 events read in total (104739ms).
[11:51:30.483] <TB3> INFO: 2942576 events read in total (130896ms).
[11:51:56.666] <TB3> INFO: 3527336 events read in total (157079ms).
[11:52:22.702] <TB3> INFO: 4110416 events read in total (183115ms).
[11:52:49.317] <TB3> INFO: 4692184 events read in total (209730ms).
[11:53:04.253] <TB3> INFO: 5025280 events read in total (224666ms).
[11:53:04.333] <TB3> INFO: Test took 225615ms.
[11:53:28.978] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.7696 for pixel 32/4 mean/min/max = 44.8389/32.7917/56.8862
[11:53:28.978] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.752 for pixel 16/12 mean/min/max = 45.5717/31.2514/59.8921
[11:53:28.978] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 57.4226 for pixel 0/0 mean/min/max = 44.7575/31.7344/57.7806
[11:53:28.979] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.7677 for pixel 11/77 mean/min/max = 45.3346/30.7702/59.8991
[11:53:28.979] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.837 for pixel 26/58 mean/min/max = 45.0676/32.2473/57.8879
[11:53:28.980] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.2352 for pixel 12/17 mean/min/max = 45.584/31.7403/59.4277
[11:53:28.980] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.7866 for pixel 24/74 mean/min/max = 45.2396/32.6496/57.8296
[11:53:28.981] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 59.5855 for pixel 46/79 mean/min/max = 45.6081/31.6262/59.5899
[11:53:28.982] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.4833 for pixel 10/0 mean/min/max = 45.5475/32.4018/58.6931
[11:53:28.982] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.5946 for pixel 12/17 mean/min/max = 44.9404/30.9155/58.9653
[11:53:28.983] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.7747 for pixel 14/3 mean/min/max = 46.391/31.975/60.8069
[11:53:28.983] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.3231 for pixel 7/1 mean/min/max = 46.0778/32.6352/59.5203
[11:53:28.984] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 65.0228 for pixel 0/3 mean/min/max = 47.5417/30.0222/65.0612
[11:53:28.985] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 55.6519 for pixel 10/49 mean/min/max = 44.1688/32.6756/55.662
[11:53:28.985] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.903 for pixel 17/14 mean/min/max = 45.4338/31.9341/58.9334
[11:53:28.986] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.1346 for pixel 0/79 mean/min/max = 45.0932/31.9162/58.2702
[11:53:28.987] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:53:29.075] <TB3> INFO: Expecting 411648 events.
[11:53:38.542] <TB3> INFO: 411648 events read in total (8875ms).
[11:53:38.550] <TB3> INFO: Expecting 411648 events.
[11:53:47.774] <TB3> INFO: 411648 events read in total (8821ms).
[11:53:47.786] <TB3> INFO: Expecting 411648 events.
[11:53:57.199] <TB3> INFO: 411648 events read in total (9010ms).
[11:53:57.213] <TB3> INFO: Expecting 411648 events.
[11:54:06.570] <TB3> INFO: 411648 events read in total (8954ms).
[11:54:06.587] <TB3> INFO: Expecting 411648 events.
[11:54:15.903] <TB3> INFO: 411648 events read in total (8913ms).
[11:54:15.923] <TB3> INFO: Expecting 411648 events.
[11:54:25.339] <TB3> INFO: 411648 events read in total (9012ms).
[11:54:25.361] <TB3> INFO: Expecting 411648 events.
[11:54:34.718] <TB3> INFO: 411648 events read in total (8954ms).
[11:54:34.750] <TB3> INFO: Expecting 411648 events.
[11:54:44.054] <TB3> INFO: 411648 events read in total (8901ms).
[11:54:44.082] <TB3> INFO: Expecting 411648 events.
[11:54:53.437] <TB3> INFO: 411648 events read in total (8952ms).
[11:54:53.478] <TB3> INFO: Expecting 411648 events.
[11:55:02.871] <TB3> INFO: 411648 events read in total (8990ms).
[11:55:02.905] <TB3> INFO: Expecting 411648 events.
[11:55:12.266] <TB3> INFO: 411648 events read in total (8958ms).
[11:55:12.304] <TB3> INFO: Expecting 411648 events.
[11:55:21.740] <TB3> INFO: 411648 events read in total (9033ms).
[11:55:21.789] <TB3> INFO: Expecting 411648 events.
[11:55:31.148] <TB3> INFO: 411648 events read in total (8956ms).
[11:55:31.208] <TB3> INFO: Expecting 411648 events.
[11:55:40.462] <TB3> INFO: 411648 events read in total (8851ms).
[11:55:40.527] <TB3> INFO: Expecting 411648 events.
[11:55:49.778] <TB3> INFO: 411648 events read in total (8848ms).
[11:55:49.832] <TB3> INFO: Expecting 411648 events.
[11:55:59.170] <TB3> INFO: 411648 events read in total (8935ms).
[11:55:59.301] <TB3> INFO: Test took 150314ms.
[11:56:00.162] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:56:00.174] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[11:56:00.174] <TB3> INFO: run 1 of 1
[11:56:00.417] <TB3> INFO: Expecting 5025280 events.
[11:56:26.827] <TB3> INFO: 585320 events read in total (25819ms).
[11:56:53.477] <TB3> INFO: 1169720 events read in total (52469ms).
[11:57:19.989] <TB3> INFO: 1753464 events read in total (78981ms).
[11:57:46.197] <TB3> INFO: 2335872 events read in total (105189ms).
[11:58:12.599] <TB3> INFO: 2917424 events read in total (131592ms).
[11:58:39.334] <TB3> INFO: 3497896 events read in total (158326ms).
[11:59:05.813] <TB3> INFO: 4080672 events read in total (184805ms).
[11:59:32.203] <TB3> INFO: 4662840 events read in total (211195ms).
[11:59:48.923] <TB3> INFO: 5025280 events read in total (227915ms).
[11:59:49.051] <TB3> INFO: Test took 228878ms.
[12:00:14.793] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 2.484077 .. 141.039885
[12:00:15.034] <TB3> INFO: Expecting 208000 events.
[12:00:25.239] <TB3> INFO: 208000 events read in total (9613ms).
[12:00:25.241] <TB3> INFO: Test took 10446ms.
[12:00:25.305] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 151 (-1/-1) hits flags = 528 (plus default)
[12:00:25.319] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:00:25.319] <TB3> INFO: run 1 of 1
[12:00:25.620] <TB3> INFO: Expecting 4992000 events.
[12:00:52.376] <TB3> INFO: 584096 events read in total (26165ms).
[12:01:18.309] <TB3> INFO: 1168456 events read in total (52098ms).
[12:01:44.637] <TB3> INFO: 1752712 events read in total (78426ms).
[12:02:10.347] <TB3> INFO: 2337368 events read in total (104136ms).
[12:02:36.702] <TB3> INFO: 2921696 events read in total (130491ms).
[12:03:02.170] <TB3> INFO: 3505344 events read in total (155959ms).
[12:03:28.403] <TB3> INFO: 4088264 events read in total (182192ms).
[12:03:54.583] <TB3> INFO: 4670720 events read in total (208372ms).
[12:04:09.095] <TB3> INFO: 4992000 events read in total (222884ms).
[12:04:09.233] <TB3> INFO: Test took 223914ms.
[12:04:36.105] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 28.317874 .. 47.096233
[12:04:36.375] <TB3> INFO: Expecting 208000 events.
[12:04:46.044] <TB3> INFO: 208000 events read in total (9073ms).
[12:04:46.044] <TB3> INFO: Test took 9937ms.
[12:04:46.093] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:04:46.108] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:04:46.108] <TB3> INFO: run 1 of 1
[12:04:46.386] <TB3> INFO: Expecting 1331200 events.
[12:05:14.662] <TB3> INFO: 646456 events read in total (27685ms).
[12:05:41.981] <TB3> INFO: 1290800 events read in total (55004ms).
[12:05:44.072] <TB3> INFO: 1331200 events read in total (57095ms).
[12:05:44.102] <TB3> INFO: Test took 57995ms.
[12:05:59.213] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 25.897644 .. 44.182190
[12:05:59.491] <TB3> INFO: Expecting 208000 events.
[12:06:09.118] <TB3> INFO: 208000 events read in total (9035ms).
[12:06:09.119] <TB3> INFO: Test took 9904ms.
[12:06:09.168] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 54 (-1/-1) hits flags = 528 (plus default)
[12:06:09.181] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:06:09.182] <TB3> INFO: run 1 of 1
[12:06:09.460] <TB3> INFO: Expecting 1331200 events.
[12:06:37.729] <TB3> INFO: 671136 events read in total (27677ms).
[12:07:05.056] <TB3> INFO: 1331200 events read in total (55004ms).
[12:07:05.094] <TB3> INFO: Test took 55913ms.
[12:07:20.370] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.336321 .. 43.176180
[12:07:20.608] <TB3> INFO: Expecting 208000 events.
[12:07:31.356] <TB3> INFO: 208000 events read in total (10156ms).
[12:07:31.357] <TB3> INFO: Test took 10986ms.
[12:07:31.406] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 53 (-1/-1) hits flags = 528 (plus default)
[12:07:31.419] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:07:31.419] <TB3> INFO: run 1 of 1
[12:07:31.697] <TB3> INFO: Expecting 1331200 events.
[12:08:00.320] <TB3> INFO: 679640 events read in total (28032ms).
[12:08:27.190] <TB3> INFO: 1331200 events read in total (54902ms).
[12:08:27.224] <TB3> INFO: Test took 55805ms.
[12:08:40.890] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:08:40.890] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:08:40.907] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:08:40.907] <TB3> INFO: run 1 of 1
[12:08:41.147] <TB3> INFO: Expecting 1364480 events.
[12:09:09.341] <TB3> INFO: 667096 events read in total (27602ms).
[12:09:36.730] <TB3> INFO: 1333016 events read in total (54991ms).
[12:09:38.492] <TB3> INFO: 1364480 events read in total (56754ms).
[12:09:38.522] <TB3> INFO: Test took 57615ms.
[12:09:54.314] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C0.dat
[12:09:54.314] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C1.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C2.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C3.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C4.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C5.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C6.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C7.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C8.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C9.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C10.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C11.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C12.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C13.dat
[12:09:54.315] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C14.dat
[12:09:54.316] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C15.dat
[12:09:54.316] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C0.dat
[12:09:54.322] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C1.dat
[12:09:54.328] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C2.dat
[12:09:54.335] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C3.dat
[12:09:54.342] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C4.dat
[12:09:54.348] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C5.dat
[12:09:54.355] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C6.dat
[12:09:54.361] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C7.dat
[12:09:54.367] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C8.dat
[12:09:54.373] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C9.dat
[12:09:54.379] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C10.dat
[12:09:54.385] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C11.dat
[12:09:54.391] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C12.dat
[12:09:54.397] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C13.dat
[12:09:54.403] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C14.dat
[12:09:54.409] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C15.dat
[12:09:54.415] <TB3> INFO: PixTestTrim::trimTest() done
[12:09:54.415] <TB3> INFO: vtrim: 138 142 116 135 134 120 125 130 140 129 141 127 145 112 141 126
[12:09:54.415] <TB3> INFO: vthrcomp: 124 119 115 118 117 130 112 125 130 126 128 126 113 114 122 123
[12:09:54.415] <TB3> INFO: vcal mean: 34.99 34.94 34.98 34.99 34.97 35.00 35.01 34.99 34.93 34.92 34.96 34.97 35.00 35.02 34.99 34.88
[12:09:54.415] <TB3> INFO: vcal RMS: 0.99 1.05 0.91 1.11 1.01 1.08 0.94 1.11 1.01 1.09 1.03 1.08 1.12 0.93 1.05 1.06
[12:09:54.415] <TB3> INFO: bits mean: 10.09 9.44 9.06 9.97 9.80 9.78 9.62 9.77 9.34 9.67 9.70 9.40 8.70 9.84 9.36 9.15
[12:09:54.415] <TB3> INFO: bits RMS: 2.39 2.84 2.98 2.63 2.58 2.62 2.60 2.61 2.72 2.76 2.54 2.65 3.17 2.50 2.81 2.93
[12:09:54.423] <TB3> INFO: ----------------------------------------------------------------------
[12:09:54.423] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:09:54.423] <TB3> INFO: ----------------------------------------------------------------------
[12:09:54.426] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:09:54.439] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:09:54.439] <TB3> INFO: run 1 of 1
[12:09:54.715] <TB3> INFO: Expecting 4160000 events.
[12:10:27.138] <TB3> INFO: 736720 events read in total (31831ms).
[12:10:58.666] <TB3> INFO: 1465955 events read in total (63359ms).
[12:11:30.097] <TB3> INFO: 2191525 events read in total (94790ms).
[12:12:01.249] <TB3> INFO: 2912805 events read in total (125942ms).
[12:12:32.886] <TB3> INFO: 3631100 events read in total (157579ms).
[12:12:55.820] <TB3> INFO: 4160000 events read in total (180513ms).
[12:12:55.921] <TB3> INFO: Test took 181482ms.
[12:13:27.503] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:13:27.517] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:13:27.517] <TB3> INFO: run 1 of 1
[12:13:27.842] <TB3> INFO: Expecting 4160000 events.
[12:13:59.841] <TB3> INFO: 713905 events read in total (31407ms).
[12:14:30.628] <TB3> INFO: 1421190 events read in total (62194ms).
[12:15:01.451] <TB3> INFO: 2125190 events read in total (93017ms).
[12:15:32.196] <TB3> INFO: 2824830 events read in total (123762ms).
[12:16:02.953] <TB3> INFO: 3522255 events read in total (154519ms).
[12:16:30.829] <TB3> INFO: 4160000 events read in total (182395ms).
[12:16:30.947] <TB3> INFO: Test took 183430ms.
[12:17:01.930] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[12:17:01.944] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:17:01.944] <TB3> INFO: run 1 of 1
[12:17:02.270] <TB3> INFO: Expecting 3848000 events.
[12:17:34.619] <TB3> INFO: 734115 events read in total (31758ms).
[12:18:06.240] <TB3> INFO: 1460050 events read in total (63379ms).
[12:18:37.565] <TB3> INFO: 2181920 events read in total (94704ms).
[12:19:08.823] <TB3> INFO: 2899645 events read in total (125962ms).
[12:19:39.823] <TB3> INFO: 3614795 events read in total (156962ms).
[12:19:50.744] <TB3> INFO: 3848000 events read in total (167883ms).
[12:19:50.825] <TB3> INFO: Test took 168881ms.
[12:20:16.058] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[12:20:16.071] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:20:16.071] <TB3> INFO: run 1 of 1
[12:20:16.347] <TB3> INFO: Expecting 3848000 events.
[12:20:49.045] <TB3> INFO: 734085 events read in total (32107ms).
[12:21:20.589] <TB3> INFO: 1460015 events read in total (63651ms).
[12:21:52.270] <TB3> INFO: 2181885 events read in total (95332ms).
[12:22:23.761] <TB3> INFO: 2899690 events read in total (126823ms).
[12:22:55.010] <TB3> INFO: 3614865 events read in total (158072ms).
[12:23:05.487] <TB3> INFO: 3848000 events read in total (168549ms).
[12:23:05.603] <TB3> INFO: Test took 169531ms.
[12:23:34.002] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[12:23:35.016] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:23:35.016] <TB3> INFO: run 1 of 1
[12:23:35.316] <TB3> INFO: Expecting 3868800 events.
[12:24:07.813] <TB3> INFO: 732565 events read in total (31905ms).
[12:24:39.383] <TB3> INFO: 1457195 events read in total (63475ms).
[12:25:10.859] <TB3> INFO: 2177805 events read in total (94951ms).
[12:25:42.338] <TB3> INFO: 2894110 events read in total (126430ms).
[12:26:13.851] <TB3> INFO: 3608205 events read in total (157943ms).
[12:26:25.637] <TB3> INFO: 3868800 events read in total (169729ms).
[12:26:25.775] <TB3> INFO: Test took 170759ms.
[12:26:57.098] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:26:57.099] <TB3> INFO: PixTestTrim::doTest() done, duration: 2468 seconds
[12:26:57.099] <TB3> INFO: Decoding statistics:
[12:26:57.099] <TB3> INFO: General information:
[12:26:57.099] <TB3> INFO: 16bit words read: 0
[12:26:57.099] <TB3> INFO: valid events total: 0
[12:26:57.099] <TB3> INFO: empty events: 0
[12:26:57.099] <TB3> INFO: valid events with pixels: 0
[12:26:57.099] <TB3> INFO: valid pixel hits: 0
[12:26:57.099] <TB3> INFO: Event errors: 0
[12:26:57.099] <TB3> INFO: start marker: 0
[12:26:57.099] <TB3> INFO: stop marker: 0
[12:26:57.100] <TB3> INFO: overflow: 0
[12:26:57.100] <TB3> INFO: invalid 5bit words: 0
[12:26:57.100] <TB3> INFO: invalid XOR eye diagram: 0
[12:26:57.100] <TB3> INFO: frame (failed synchr.): 0
[12:26:57.100] <TB3> INFO: idle data (no TBM trl): 0
[12:26:57.100] <TB3> INFO: no data (only TBM hdr): 0
[12:26:57.100] <TB3> INFO: TBM errors: 0
[12:26:57.100] <TB3> INFO: flawed TBM headers: 0
[12:26:57.100] <TB3> INFO: flawed TBM trailers: 0
[12:26:57.100] <TB3> INFO: event ID mismatches: 0
[12:26:57.100] <TB3> INFO: ROC errors: 0
[12:26:57.100] <TB3> INFO: missing ROC header(s): 0
[12:26:57.100] <TB3> INFO: misplaced readback start: 0
[12:26:57.100] <TB3> INFO: Pixel decoding errors: 0
[12:26:57.100] <TB3> INFO: pixel data incomplete: 0
[12:26:57.100] <TB3> INFO: pixel address: 0
[12:26:57.100] <TB3> INFO: pulse height fill bit: 0
[12:26:57.100] <TB3> INFO: buffer corruption: 0
[12:26:57.836] <TB3> INFO: ######################################################################
[12:26:57.836] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:26:57.836] <TB3> INFO: ######################################################################
[12:26:58.108] <TB3> INFO: Expecting 41600 events.
[12:27:01.706] <TB3> INFO: 41600 events read in total (3006ms).
[12:27:01.706] <TB3> INFO: Test took 3869ms.
[12:27:02.239] <TB3> INFO: Expecting 41600 events.
[12:27:05.776] <TB3> INFO: 41600 events read in total (2945ms).
[12:27:05.777] <TB3> INFO: Test took 3865ms.
[12:27:06.069] <TB3> INFO: Expecting 41600 events.
[12:27:09.639] <TB3> INFO: 41600 events read in total (2978ms).
[12:27:09.640] <TB3> INFO: Test took 3836ms.
[12:27:09.934] <TB3> INFO: Expecting 41600 events.
[12:27:13.526] <TB3> INFO: 41600 events read in total (3000ms).
[12:27:13.527] <TB3> INFO: Test took 3857ms.
[12:27:13.821] <TB3> INFO: Expecting 41600 events.
[12:27:17.359] <TB3> INFO: 41600 events read in total (2946ms).
[12:27:17.360] <TB3> INFO: Test took 3803ms.
[12:27:17.650] <TB3> INFO: Expecting 41600 events.
[12:27:21.275] <TB3> INFO: 41600 events read in total (3033ms).
[12:27:21.276] <TB3> INFO: Test took 3891ms.
[12:27:21.568] <TB3> INFO: Expecting 41600 events.
[12:27:25.091] <TB3> INFO: 41600 events read in total (2931ms).
[12:27:25.092] <TB3> INFO: Test took 3788ms.
[12:27:25.382] <TB3> INFO: Expecting 41600 events.
[12:27:28.918] <TB3> INFO: 41600 events read in total (2944ms).
[12:27:28.919] <TB3> INFO: Test took 3802ms.
[12:27:29.211] <TB3> INFO: Expecting 41600 events.
[12:27:32.704] <TB3> INFO: 41600 events read in total (2901ms).
[12:27:32.705] <TB3> INFO: Test took 3759ms.
[12:27:33.004] <TB3> INFO: Expecting 41600 events.
[12:27:36.573] <TB3> INFO: 41600 events read in total (2977ms).
[12:27:36.574] <TB3> INFO: Test took 3845ms.
[12:27:36.864] <TB3> INFO: Expecting 41600 events.
[12:27:40.393] <TB3> INFO: 41600 events read in total (2938ms).
[12:27:40.394] <TB3> INFO: Test took 3795ms.
[12:27:40.683] <TB3> INFO: Expecting 41600 events.
[12:27:44.207] <TB3> INFO: 41600 events read in total (2932ms).
[12:27:44.208] <TB3> INFO: Test took 3790ms.
[12:27:44.497] <TB3> INFO: Expecting 41600 events.
[12:27:48.052] <TB3> INFO: 41600 events read in total (2963ms).
[12:27:48.053] <TB3> INFO: Test took 3821ms.
[12:27:48.341] <TB3> INFO: Expecting 41600 events.
[12:27:51.882] <TB3> INFO: 41600 events read in total (2948ms).
[12:27:51.883] <TB3> INFO: Test took 3806ms.
[12:27:52.172] <TB3> INFO: Expecting 41600 events.
[12:27:55.773] <TB3> INFO: 41600 events read in total (3009ms).
[12:27:55.774] <TB3> INFO: Test took 3867ms.
[12:27:56.064] <TB3> INFO: Expecting 41600 events.
[12:27:59.637] <TB3> INFO: 41600 events read in total (2981ms).
[12:27:59.638] <TB3> INFO: Test took 3839ms.
[12:27:59.950] <TB3> INFO: Expecting 41600 events.
[12:28:03.475] <TB3> INFO: 41600 events read in total (2933ms).
[12:28:03.476] <TB3> INFO: Test took 3811ms.
[12:28:03.766] <TB3> INFO: Expecting 41600 events.
[12:28:07.315] <TB3> INFO: 41600 events read in total (2958ms).
[12:28:07.315] <TB3> INFO: Test took 3815ms.
[12:28:07.608] <TB3> INFO: Expecting 41600 events.
[12:28:11.122] <TB3> INFO: 41600 events read in total (2923ms).
[12:28:11.123] <TB3> INFO: Test took 3780ms.
[12:28:11.415] <TB3> INFO: Expecting 41600 events.
[12:28:15.009] <TB3> INFO: 41600 events read in total (3002ms).
[12:28:15.009] <TB3> INFO: Test took 3859ms.
[12:28:15.300] <TB3> INFO: Expecting 41600 events.
[12:28:18.867] <TB3> INFO: 41600 events read in total (2975ms).
[12:28:18.868] <TB3> INFO: Test took 3833ms.
[12:28:19.158] <TB3> INFO: Expecting 41600 events.
[12:28:22.673] <TB3> INFO: 41600 events read in total (2923ms).
[12:28:22.674] <TB3> INFO: Test took 3781ms.
[12:28:22.971] <TB3> INFO: Expecting 41600 events.
[12:28:26.676] <TB3> INFO: 41600 events read in total (3113ms).
[12:28:26.677] <TB3> INFO: Test took 3979ms.
[12:28:26.967] <TB3> INFO: Expecting 41600 events.
[12:28:30.489] <TB3> INFO: 41600 events read in total (2931ms).
[12:28:30.490] <TB3> INFO: Test took 3788ms.
[12:28:30.782] <TB3> INFO: Expecting 41600 events.
[12:28:34.313] <TB3> INFO: 41600 events read in total (2939ms).
[12:28:34.313] <TB3> INFO: Test took 3795ms.
[12:28:34.609] <TB3> INFO: Expecting 41600 events.
[12:28:38.173] <TB3> INFO: 41600 events read in total (2972ms).
[12:28:38.174] <TB3> INFO: Test took 3837ms.
[12:28:38.464] <TB3> INFO: Expecting 41600 events.
[12:28:42.008] <TB3> INFO: 41600 events read in total (2953ms).
[12:28:42.009] <TB3> INFO: Test took 3811ms.
[12:28:42.312] <TB3> INFO: Expecting 41600 events.
[12:28:46.078] <TB3> INFO: 41600 events read in total (3174ms).
[12:28:46.079] <TB3> INFO: Test took 4046ms.
[12:28:46.373] <TB3> INFO: Expecting 41600 events.
[12:28:49.936] <TB3> INFO: 41600 events read in total (2971ms).
[12:28:49.937] <TB3> INFO: Test took 3829ms.
[12:28:50.228] <TB3> INFO: Expecting 2560 events.
[12:28:51.121] <TB3> INFO: 2560 events read in total (301ms).
[12:28:51.122] <TB3> INFO: Test took 1169ms.
[12:28:51.437] <TB3> INFO: Expecting 2560 events.
[12:28:52.324] <TB3> INFO: 2560 events read in total (295ms).
[12:28:52.324] <TB3> INFO: Test took 1202ms.
[12:28:52.630] <TB3> INFO: Expecting 2560 events.
[12:28:53.522] <TB3> INFO: 2560 events read in total (300ms).
[12:28:53.522] <TB3> INFO: Test took 1197ms.
[12:28:53.831] <TB3> INFO: Expecting 2560 events.
[12:28:54.717] <TB3> INFO: 2560 events read in total (294ms).
[12:28:54.717] <TB3> INFO: Test took 1195ms.
[12:28:55.023] <TB3> INFO: Expecting 2560 events.
[12:28:55.911] <TB3> INFO: 2560 events read in total (296ms).
[12:28:55.911] <TB3> INFO: Test took 1193ms.
[12:28:56.220] <TB3> INFO: Expecting 2560 events.
[12:28:57.104] <TB3> INFO: 2560 events read in total (292ms).
[12:28:57.104] <TB3> INFO: Test took 1193ms.
[12:28:57.411] <TB3> INFO: Expecting 2560 events.
[12:28:58.298] <TB3> INFO: 2560 events read in total (296ms).
[12:28:58.298] <TB3> INFO: Test took 1193ms.
[12:28:58.607] <TB3> INFO: Expecting 2560 events.
[12:28:59.488] <TB3> INFO: 2560 events read in total (289ms).
[12:28:59.489] <TB3> INFO: Test took 1191ms.
[12:28:59.796] <TB3> INFO: Expecting 2560 events.
[12:29:00.685] <TB3> INFO: 2560 events read in total (297ms).
[12:29:00.686] <TB3> INFO: Test took 1197ms.
[12:29:00.994] <TB3> INFO: Expecting 2560 events.
[12:29:01.880] <TB3> INFO: 2560 events read in total (294ms).
[12:29:01.880] <TB3> INFO: Test took 1194ms.
[12:29:02.189] <TB3> INFO: Expecting 2560 events.
[12:29:03.076] <TB3> INFO: 2560 events read in total (297ms).
[12:29:03.077] <TB3> INFO: Test took 1196ms.
[12:29:03.384] <TB3> INFO: Expecting 2560 events.
[12:29:04.273] <TB3> INFO: 2560 events read in total (297ms).
[12:29:04.273] <TB3> INFO: Test took 1195ms.
[12:29:04.582] <TB3> INFO: Expecting 2560 events.
[12:29:05.466] <TB3> INFO: 2560 events read in total (292ms).
[12:29:05.466] <TB3> INFO: Test took 1193ms.
[12:29:05.775] <TB3> INFO: Expecting 2560 events.
[12:29:06.666] <TB3> INFO: 2560 events read in total (299ms).
[12:29:06.667] <TB3> INFO: Test took 1200ms.
[12:29:06.974] <TB3> INFO: Expecting 2560 events.
[12:29:07.859] <TB3> INFO: 2560 events read in total (293ms).
[12:29:07.859] <TB3> INFO: Test took 1191ms.
[12:29:08.167] <TB3> INFO: Expecting 2560 events.
[12:29:09.061] <TB3> INFO: 2560 events read in total (302ms).
[12:29:09.062] <TB3> INFO: Test took 1202ms.
[12:29:09.066] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:09.371] <TB3> INFO: Expecting 655360 events.
[12:29:24.632] <TB3> INFO: 655360 events read in total (14670ms).
[12:29:24.653] <TB3> INFO: Expecting 655360 events.
[12:29:39.272] <TB3> INFO: 655360 events read in total (14216ms).
[12:29:39.292] <TB3> INFO: Expecting 655360 events.
[12:29:53.880] <TB3> INFO: 655360 events read in total (14184ms).
[12:29:53.902] <TB3> INFO: Expecting 655360 events.
[12:30:08.397] <TB3> INFO: 655360 events read in total (14091ms).
[12:30:08.426] <TB3> INFO: Expecting 655360 events.
[12:30:23.050] <TB3> INFO: 655360 events read in total (14221ms).
[12:30:23.083] <TB3> INFO: Expecting 655360 events.
[12:30:37.612] <TB3> INFO: 655360 events read in total (14126ms).
[12:30:37.658] <TB3> INFO: Expecting 655360 events.
[12:30:52.237] <TB3> INFO: 655360 events read in total (14176ms).
[12:30:52.301] <TB3> INFO: Expecting 655360 events.
[12:31:06.759] <TB3> INFO: 655360 events read in total (14055ms).
[12:31:06.817] <TB3> INFO: Expecting 655360 events.
[12:31:21.614] <TB3> INFO: 655360 events read in total (14394ms).
[12:31:21.727] <TB3> INFO: Expecting 655360 events.
[12:31:36.181] <TB3> INFO: 655360 events read in total (14051ms).
[12:31:36.250] <TB3> INFO: Expecting 655360 events.
[12:31:50.737] <TB3> INFO: 655360 events read in total (14084ms).
[12:31:50.808] <TB3> INFO: Expecting 655360 events.
[12:32:05.364] <TB3> INFO: 655360 events read in total (14152ms).
[12:32:05.475] <TB3> INFO: Expecting 655360 events.
[12:32:20.084] <TB3> INFO: 655360 events read in total (14206ms).
[12:32:20.169] <TB3> INFO: Expecting 655360 events.
[12:32:34.848] <TB3> INFO: 655360 events read in total (14276ms).
[12:32:34.982] <TB3> INFO: Expecting 655360 events.
[12:32:49.588] <TB3> INFO: 655360 events read in total (14203ms).
[12:32:49.684] <TB3> INFO: Expecting 655360 events.
[12:33:04.354] <TB3> INFO: 655360 events read in total (14267ms).
[12:33:04.484] <TB3> INFO: Test took 235418ms.
[12:33:04.579] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:33:04.836] <TB3> INFO: Expecting 655360 events.
[12:33:19.422] <TB3> INFO: 655360 events read in total (13994ms).
[12:33:19.441] <TB3> INFO: Expecting 655360 events.
[12:33:33.001] <TB3> INFO: 655360 events read in total (14157ms).
[12:33:34.020] <TB3> INFO: Expecting 655360 events.
[12:33:48.365] <TB3> INFO: 655360 events read in total (13942ms).
[12:33:48.388] <TB3> INFO: Expecting 655360 events.
[12:34:02.711] <TB3> INFO: 655360 events read in total (13920ms).
[12:34:02.746] <TB3> INFO: Expecting 655360 events.
[12:34:17.302] <TB3> INFO: 655360 events read in total (14153ms).
[12:34:17.344] <TB3> INFO: Expecting 655360 events.
[12:34:31.967] <TB3> INFO: 655360 events read in total (14220ms).
[12:34:32.003] <TB3> INFO: Expecting 655360 events.
[12:34:46.601] <TB3> INFO: 655360 events read in total (14195ms).
[12:34:46.702] <TB3> INFO: Expecting 655360 events.
[12:35:00.966] <TB3> INFO: 655360 events read in total (13861ms).
[12:35:01.077] <TB3> INFO: Expecting 655360 events.
[12:35:15.616] <TB3> INFO: 655360 events read in total (14136ms).
[12:35:15.676] <TB3> INFO: Expecting 655360 events.
[12:35:30.146] <TB3> INFO: 655360 events read in total (14067ms).
[12:35:30.213] <TB3> INFO: Expecting 655360 events.
[12:35:44.733] <TB3> INFO: 655360 events read in total (14116ms).
[12:35:44.855] <TB3> INFO: Expecting 655360 events.
[12:35:59.306] <TB3> INFO: 655360 events read in total (14048ms).
[12:35:59.436] <TB3> INFO: Expecting 655360 events.
[12:36:13.962] <TB3> INFO: 655360 events read in total (14123ms).
[12:36:14.074] <TB3> INFO: Expecting 655360 events.
[12:36:28.744] <TB3> INFO: 655360 events read in total (14267ms).
[12:36:28.833] <TB3> INFO: Expecting 655360 events.
[12:36:43.457] <TB3> INFO: 655360 events read in total (14221ms).
[12:36:43.607] <TB3> INFO: Expecting 655360 events.
[12:36:58.442] <TB3> INFO: 655360 events read in total (14432ms).
[12:36:58.589] <TB3> INFO: Test took 234011ms.
[12:36:58.763] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.770] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:58.775] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.781] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.787] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:58.793] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:58.799] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:36:58.805] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:36:58.811] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:36:58.817] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:36:58.823] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:36:58.828] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:36:58.835] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[12:36:58.841] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[12:36:58.847] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[12:36:58.853] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[12:36:58.859] <TB3> INFO: safety margin for low PH: adding 13, margin is now 33
[12:36:58.865] <TB3> INFO: safety margin for low PH: adding 14, margin is now 34
[12:36:58.871] <TB3> INFO: safety margin for low PH: adding 15, margin is now 35
[12:36:58.877] <TB3> INFO: safety margin for low PH: adding 16, margin is now 36
[12:36:58.883] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.889] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.894] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.900] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:58.906] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:58.912] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.918] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.923] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.929] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.935] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.941] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.946] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.952] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.958] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:58.963] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:58.969] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:36:58.975] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:58.981] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:58.987] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:58.993] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[12:36:58.000] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[12:36:59.007] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[12:36:59.013] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[12:36:59.019] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[12:36:59.026] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[12:36:59.031] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[12:36:59.038] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:59.074] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C0.dat
[12:36:59.075] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C1.dat
[12:36:59.075] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C2.dat
[12:36:59.075] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C3.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C4.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C5.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C6.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C7.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C8.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C9.dat
[12:36:59.076] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C10.dat
[12:36:59.077] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C11.dat
[12:36:59.077] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C12.dat
[12:36:59.077] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C13.dat
[12:36:59.077] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C14.dat
[12:36:59.077] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C15.dat
[12:36:59.325] <TB3> INFO: Expecting 41600 events.
[12:37:02.478] <TB3> INFO: 41600 events read in total (2561ms).
[12:37:02.479] <TB3> INFO: Test took 3397ms.
[12:37:02.938] <TB3> INFO: Expecting 41600 events.
[12:37:06.007] <TB3> INFO: 41600 events read in total (2478ms).
[12:37:06.008] <TB3> INFO: Test took 3315ms.
[12:37:06.466] <TB3> INFO: Expecting 41600 events.
[12:37:09.653] <TB3> INFO: 41600 events read in total (2595ms).
[12:37:09.654] <TB3> INFO: Test took 3433ms.
[12:37:09.879] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:09.968] <TB3> INFO: Expecting 2560 events.
[12:37:10.867] <TB3> INFO: 2560 events read in total (307ms).
[12:37:10.867] <TB3> INFO: Test took 989ms.
[12:37:10.869] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:11.175] <TB3> INFO: Expecting 2560 events.
[12:37:12.066] <TB3> INFO: 2560 events read in total (299ms).
[12:37:12.066] <TB3> INFO: Test took 1197ms.
[12:37:12.069] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:12.373] <TB3> INFO: Expecting 2560 events.
[12:37:13.261] <TB3> INFO: 2560 events read in total (296ms).
[12:37:13.262] <TB3> INFO: Test took 1193ms.
[12:37:13.265] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:13.570] <TB3> INFO: Expecting 2560 events.
[12:37:14.465] <TB3> INFO: 2560 events read in total (303ms).
[12:37:14.466] <TB3> INFO: Test took 1201ms.
[12:37:14.469] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:14.773] <TB3> INFO: Expecting 2560 events.
[12:37:15.662] <TB3> INFO: 2560 events read in total (297ms).
[12:37:15.663] <TB3> INFO: Test took 1194ms.
[12:37:15.665] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:15.971] <TB3> INFO: Expecting 2560 events.
[12:37:16.862] <TB3> INFO: 2560 events read in total (299ms).
[12:37:16.863] <TB3> INFO: Test took 1198ms.
[12:37:16.865] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:17.172] <TB3> INFO: Expecting 2560 events.
[12:37:18.066] <TB3> INFO: 2560 events read in total (302ms).
[12:37:18.066] <TB3> INFO: Test took 1201ms.
[12:37:18.069] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:18.375] <TB3> INFO: Expecting 2560 events.
[12:37:19.260] <TB3> INFO: 2560 events read in total (294ms).
[12:37:19.261] <TB3> INFO: Test took 1192ms.
[12:37:19.265] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:19.573] <TB3> INFO: Expecting 2560 events.
[12:37:20.467] <TB3> INFO: 2560 events read in total (302ms).
[12:37:20.467] <TB3> INFO: Test took 1203ms.
[12:37:20.470] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:20.775] <TB3> INFO: Expecting 2560 events.
[12:37:21.666] <TB3> INFO: 2560 events read in total (298ms).
[12:37:21.666] <TB3> INFO: Test took 1196ms.
[12:37:21.669] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:21.975] <TB3> INFO: Expecting 2560 events.
[12:37:22.865] <TB3> INFO: 2560 events read in total (298ms).
[12:37:22.865] <TB3> INFO: Test took 1196ms.
[12:37:22.868] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:23.173] <TB3> INFO: Expecting 2560 events.
[12:37:24.063] <TB3> INFO: 2560 events read in total (298ms).
[12:37:24.064] <TB3> INFO: Test took 1196ms.
[12:37:24.067] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:24.372] <TB3> INFO: Expecting 2560 events.
[12:37:25.263] <TB3> INFO: 2560 events read in total (299ms).
[12:37:25.263] <TB3> INFO: Test took 1196ms.
[12:37:25.266] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:25.571] <TB3> INFO: Expecting 2560 events.
[12:37:26.463] <TB3> INFO: 2560 events read in total (300ms).
[12:37:26.463] <TB3> INFO: Test took 1197ms.
[12:37:26.467] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:26.771] <TB3> INFO: Expecting 2560 events.
[12:37:27.657] <TB3> INFO: 2560 events read in total (294ms).
[12:37:27.658] <TB3> INFO: Test took 1191ms.
[12:37:27.660] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:27.965] <TB3> INFO: Expecting 2560 events.
[12:37:28.853] <TB3> INFO: 2560 events read in total (296ms).
[12:37:28.854] <TB3> INFO: Test took 1194ms.
[12:37:28.859] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:29.164] <TB3> INFO: Expecting 2560 events.
[12:37:30.053] <TB3> INFO: 2560 events read in total (297ms).
[12:37:30.053] <TB3> INFO: Test took 1194ms.
[12:37:30.057] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:30.362] <TB3> INFO: Expecting 2560 events.
[12:37:31.251] <TB3> INFO: 2560 events read in total (297ms).
[12:37:31.251] <TB3> INFO: Test took 1194ms.
[12:37:31.255] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:31.560] <TB3> INFO: Expecting 2560 events.
[12:37:32.451] <TB3> INFO: 2560 events read in total (300ms).
[12:37:32.451] <TB3> INFO: Test took 1196ms.
[12:37:32.456] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:32.759] <TB3> INFO: Expecting 2560 events.
[12:37:33.643] <TB3> INFO: 2560 events read in total (292ms).
[12:37:33.644] <TB3> INFO: Test took 1189ms.
[12:37:33.646] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:33.952] <TB3> INFO: Expecting 2560 events.
[12:37:34.844] <TB3> INFO: 2560 events read in total (300ms).
[12:37:34.844] <TB3> INFO: Test took 1198ms.
[12:37:34.848] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:35.153] <TB3> INFO: Expecting 2560 events.
[12:37:36.038] <TB3> INFO: 2560 events read in total (293ms).
[12:37:36.038] <TB3> INFO: Test took 1191ms.
[12:37:36.042] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:36.355] <TB3> INFO: Expecting 2560 events.
[12:37:37.245] <TB3> INFO: 2560 events read in total (299ms).
[12:37:37.246] <TB3> INFO: Test took 1204ms.
[12:37:37.249] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:37.554] <TB3> INFO: Expecting 2560 events.
[12:37:38.441] <TB3> INFO: 2560 events read in total (295ms).
[12:37:38.442] <TB3> INFO: Test took 1193ms.
[12:37:38.445] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:38.749] <TB3> INFO: Expecting 2560 events.
[12:37:39.641] <TB3> INFO: 2560 events read in total (300ms).
[12:37:39.642] <TB3> INFO: Test took 1198ms.
[12:37:39.648] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:39.950] <TB3> INFO: Expecting 2560 events.
[12:37:40.843] <TB3> INFO: 2560 events read in total (301ms).
[12:37:40.844] <TB3> INFO: Test took 1197ms.
[12:37:40.849] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:41.152] <TB3> INFO: Expecting 2560 events.
[12:37:42.043] <TB3> INFO: 2560 events read in total (299ms).
[12:37:42.043] <TB3> INFO: Test took 1194ms.
[12:37:42.047] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:42.353] <TB3> INFO: Expecting 2560 events.
[12:37:43.251] <TB3> INFO: 2560 events read in total (306ms).
[12:37:43.251] <TB3> INFO: Test took 1204ms.
[12:37:43.255] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:43.559] <TB3> INFO: Expecting 2560 events.
[12:37:44.454] <TB3> INFO: 2560 events read in total (303ms).
[12:37:44.454] <TB3> INFO: Test took 1199ms.
[12:37:44.458] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:44.763] <TB3> INFO: Expecting 2560 events.
[12:37:45.654] <TB3> INFO: 2560 events read in total (299ms).
[12:37:45.654] <TB3> INFO: Test took 1196ms.
[12:37:45.657] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:45.962] <TB3> INFO: Expecting 2560 events.
[12:37:46.855] <TB3> INFO: 2560 events read in total (301ms).
[12:37:46.856] <TB3> INFO: Test took 1199ms.
[12:37:46.860] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:47.164] <TB3> INFO: Expecting 2560 events.
[12:37:48.058] <TB3> INFO: 2560 events read in total (302ms).
[12:37:48.058] <TB3> INFO: Test took 1199ms.
[12:37:48.537] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 650 seconds
[12:37:48.537] <TB3> INFO: PH scale (per ROC): 53 43 50 53 62 48 52 69 63 39 57 53 46 64 48 57
[12:37:48.537] <TB3> INFO: PH offset (per ROC): 109 81 112 111 119 92 134 126 126 99 137 114 100 130 112 123
[12:37:48.549] <TB3> INFO: Decoding statistics:
[12:37:48.549] <TB3> INFO: General information:
[12:37:48.549] <TB3> INFO: 16bit words read: 127884
[12:37:48.549] <TB3> INFO: valid events total: 20480
[12:37:48.549] <TB3> INFO: empty events: 17978
[12:37:48.549] <TB3> INFO: valid events with pixels: 2502
[12:37:48.549] <TB3> INFO: valid pixel hits: 2502
[12:37:48.549] <TB3> INFO: Event errors: 0
[12:37:48.549] <TB3> INFO: start marker: 0
[12:37:48.549] <TB3> INFO: stop marker: 0
[12:37:48.549] <TB3> INFO: overflow: 0
[12:37:48.549] <TB3> INFO: invalid 5bit words: 0
[12:37:48.549] <TB3> INFO: invalid XOR eye diagram: 0
[12:37:48.549] <TB3> INFO: frame (failed synchr.): 0
[12:37:48.549] <TB3> INFO: idle data (no TBM trl): 0
[12:37:48.549] <TB3> INFO: no data (only TBM hdr): 0
[12:37:48.549] <TB3> INFO: TBM errors: 0
[12:37:48.549] <TB3> INFO: flawed TBM headers: 0
[12:37:48.549] <TB3> INFO: flawed TBM trailers: 0
[12:37:48.549] <TB3> INFO: event ID mismatches: 0
[12:37:48.549] <TB3> INFO: ROC errors: 0
[12:37:48.549] <TB3> INFO: missing ROC header(s): 0
[12:37:48.549] <TB3> INFO: misplaced readback start: 0
[12:37:48.549] <TB3> INFO: Pixel decoding errors: 0
[12:37:48.549] <TB3> INFO: pixel data incomplete: 0
[12:37:48.549] <TB3> INFO: pixel address: 0
[12:37:48.549] <TB3> INFO: pulse height fill bit: 0
[12:37:48.549] <TB3> INFO: buffer corruption: 0
[12:37:48.767] <TB3> INFO: ######################################################################
[12:37:48.767] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:37:48.767] <TB3> INFO: ######################################################################
[12:37:48.782] <TB3> INFO: scanning low vcal = 10
[12:37:49.019] <TB3> INFO: Expecting 41600 events.
[12:37:52.621] <TB3> INFO: 41600 events read in total (3010ms).
[12:37:52.622] <TB3> INFO: Test took 3840ms.
[12:37:52.624] <TB3> INFO: scanning low vcal = 20
[12:37:52.922] <TB3> INFO: Expecting 41600 events.
[12:37:56.544] <TB3> INFO: 41600 events read in total (3030ms).
[12:37:56.545] <TB3> INFO: Test took 3921ms.
[12:37:56.547] <TB3> INFO: scanning low vcal = 30
[12:37:56.836] <TB3> INFO: Expecting 41600 events.
[12:38:00.569] <TB3> INFO: 41600 events read in total (3141ms).
[12:38:00.571] <TB3> INFO: Test took 4024ms.
[12:38:00.574] <TB3> INFO: scanning low vcal = 40
[12:38:00.852] <TB3> INFO: Expecting 41600 events.
[12:38:04.866] <TB3> INFO: 41600 events read in total (3423ms).
[12:38:04.868] <TB3> INFO: Test took 4294ms.
[12:38:04.872] <TB3> INFO: scanning low vcal = 50
[12:38:05.154] <TB3> INFO: Expecting 41600 events.
[12:38:09.216] <TB3> INFO: 41600 events read in total (3470ms).
[12:38:09.217] <TB3> INFO: Test took 4345ms.
[12:38:09.220] <TB3> INFO: scanning low vcal = 60
[12:38:09.497] <TB3> INFO: Expecting 41600 events.
[12:38:13.548] <TB3> INFO: 41600 events read in total (3459ms).
[12:38:13.549] <TB3> INFO: Test took 4329ms.
[12:38:13.553] <TB3> INFO: scanning low vcal = 70
[12:38:13.829] <TB3> INFO: Expecting 41600 events.
[12:38:17.905] <TB3> INFO: 41600 events read in total (3484ms).
[12:38:17.905] <TB3> INFO: Test took 4353ms.
[12:38:17.909] <TB3> INFO: scanning low vcal = 80
[12:38:18.186] <TB3> INFO: Expecting 41600 events.
[12:38:22.244] <TB3> INFO: 41600 events read in total (3466ms).
[12:38:22.245] <TB3> INFO: Test took 4336ms.
[12:38:22.248] <TB3> INFO: scanning low vcal = 90
[12:38:22.525] <TB3> INFO: Expecting 41600 events.
[12:38:26.566] <TB3> INFO: 41600 events read in total (3449ms).
[12:38:26.567] <TB3> INFO: Test took 4319ms.
[12:38:26.571] <TB3> INFO: scanning low vcal = 100
[12:38:26.847] <TB3> INFO: Expecting 41600 events.
[12:38:30.897] <TB3> INFO: 41600 events read in total (3458ms).
[12:38:30.897] <TB3> INFO: Test took 4326ms.
[12:38:30.901] <TB3> INFO: scanning low vcal = 110
[12:38:31.178] <TB3> INFO: Expecting 41600 events.
[12:38:35.236] <TB3> INFO: 41600 events read in total (3466ms).
[12:38:35.237] <TB3> INFO: Test took 4336ms.
[12:38:35.240] <TB3> INFO: scanning low vcal = 120
[12:38:35.517] <TB3> INFO: Expecting 41600 events.
[12:38:39.550] <TB3> INFO: 41600 events read in total (3441ms).
[12:38:39.551] <TB3> INFO: Test took 4311ms.
[12:38:39.554] <TB3> INFO: scanning low vcal = 130
[12:38:39.831] <TB3> INFO: Expecting 41600 events.
[12:38:43.910] <TB3> INFO: 41600 events read in total (3487ms).
[12:38:43.911] <TB3> INFO: Test took 4357ms.
[12:38:43.915] <TB3> INFO: scanning low vcal = 140
[12:38:44.192] <TB3> INFO: Expecting 41600 events.
[12:38:48.288] <TB3> INFO: 41600 events read in total (3505ms).
[12:38:48.289] <TB3> INFO: Test took 4374ms.
[12:38:48.293] <TB3> INFO: scanning low vcal = 150
[12:38:48.570] <TB3> INFO: Expecting 41600 events.
[12:38:52.620] <TB3> INFO: 41600 events read in total (3459ms).
[12:38:52.621] <TB3> INFO: Test took 4328ms.
[12:38:52.625] <TB3> INFO: scanning low vcal = 160
[12:38:52.902] <TB3> INFO: Expecting 41600 events.
[12:38:56.965] <TB3> INFO: 41600 events read in total (3471ms).
[12:38:56.966] <TB3> INFO: Test took 4341ms.
[12:38:56.969] <TB3> INFO: scanning low vcal = 170
[12:38:57.247] <TB3> INFO: Expecting 41600 events.
[12:39:01.273] <TB3> INFO: 41600 events read in total (3435ms).
[12:39:01.274] <TB3> INFO: Test took 4305ms.
[12:39:01.280] <TB3> INFO: scanning low vcal = 180
[12:39:01.557] <TB3> INFO: Expecting 41600 events.
[12:39:05.599] <TB3> INFO: 41600 events read in total (3450ms).
[12:39:05.600] <TB3> INFO: Test took 4320ms.
[12:39:05.604] <TB3> INFO: scanning low vcal = 190
[12:39:05.880] <TB3> INFO: Expecting 41600 events.
[12:39:09.904] <TB3> INFO: 41600 events read in total (3432ms).
[12:39:09.905] <TB3> INFO: Test took 4301ms.
[12:39:09.908] <TB3> INFO: scanning low vcal = 200
[12:39:10.184] <TB3> INFO: Expecting 41600 events.
[12:39:14.203] <TB3> INFO: 41600 events read in total (3427ms).
[12:39:14.204] <TB3> INFO: Test took 4296ms.
[12:39:14.209] <TB3> INFO: scanning low vcal = 210
[12:39:14.484] <TB3> INFO: Expecting 41600 events.
[12:39:18.521] <TB3> INFO: 41600 events read in total (3445ms).
[12:39:18.522] <TB3> INFO: Test took 4313ms.
[12:39:18.525] <TB3> INFO: scanning low vcal = 220
[12:39:18.802] <TB3> INFO: Expecting 41600 events.
[12:39:22.806] <TB3> INFO: 41600 events read in total (3413ms).
[12:39:22.806] <TB3> INFO: Test took 4282ms.
[12:39:22.810] <TB3> INFO: scanning low vcal = 230
[12:39:23.086] <TB3> INFO: Expecting 41600 events.
[12:39:27.112] <TB3> INFO: 41600 events read in total (3434ms).
[12:39:27.113] <TB3> INFO: Test took 4303ms.
[12:39:27.116] <TB3> INFO: scanning low vcal = 240
[12:39:27.393] <TB3> INFO: Expecting 41600 events.
[12:39:31.401] <TB3> INFO: 41600 events read in total (3416ms).
[12:39:31.402] <TB3> INFO: Test took 4285ms.
[12:39:31.406] <TB3> INFO: scanning low vcal = 250
[12:39:31.682] <TB3> INFO: Expecting 41600 events.
[12:39:35.699] <TB3> INFO: 41600 events read in total (3425ms).
[12:39:35.700] <TB3> INFO: Test took 4294ms.
[12:39:35.705] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[12:39:35.981] <TB3> INFO: Expecting 41600 events.
[12:39:39.934] <TB3> INFO: 41600 events read in total (3361ms).
[12:39:39.935] <TB3> INFO: Test took 4230ms.
[12:39:39.939] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[12:39:40.215] <TB3> INFO: Expecting 41600 events.
[12:39:44.155] <TB3> INFO: 41600 events read in total (3348ms).
[12:39:44.156] <TB3> INFO: Test took 4217ms.
[12:39:44.159] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[12:39:44.435] <TB3> INFO: Expecting 41600 events.
[12:39:48.436] <TB3> INFO: 41600 events read in total (3409ms).
[12:39:48.437] <TB3> INFO: Test took 4278ms.
[12:39:48.441] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[12:39:48.765] <TB3> INFO: Expecting 41600 events.
[12:39:52.748] <TB3> INFO: 41600 events read in total (3391ms).
[12:39:52.749] <TB3> INFO: Test took 4308ms.
[12:39:52.752] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:39:53.029] <TB3> INFO: Expecting 41600 events.
[12:39:56.994] <TB3> INFO: 41600 events read in total (3374ms).
[12:39:56.995] <TB3> INFO: Test took 4243ms.
[12:39:57.603] <TB3> INFO: PixTestGainPedestal::measure() done
[12:40:37.385] <TB3> INFO: PixTestGainPedestal::fit() done
[12:40:37.385] <TB3> INFO: non-linearity mean: 0.926 0.914 0.946 0.963 0.979 0.957 0.979 0.980 0.979 0.893 0.978 0.973 1.018 0.982 0.940 0.979
[12:40:37.385] <TB3> INFO: non-linearity RMS: 0.089 0.183 0.056 0.015 0.005 0.026 0.005 0.004 0.004 0.138 0.004 0.004 0.155 0.005 0.050 0.003
[12:40:37.385] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:40:37.407] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:40:37.423] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:40:37.436] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:40:37.450] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:40:37.463] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:40:37.476] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:40:37.490] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:40:37.503] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:40:37.516] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:40:37.530] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:40:37.543] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:40:37.556] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:40:37.571] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:40:37.585] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:40:37.598] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:40:37.612] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 168 seconds
[12:40:37.612] <TB3> INFO: Decoding statistics:
[12:40:37.612] <TB3> INFO: General information:
[12:40:37.612] <TB3> INFO: 16bit words read: 3327918
[12:40:37.612] <TB3> INFO: valid events total: 332800
[12:40:37.612] <TB3> INFO: empty events: 0
[12:40:37.612] <TB3> INFO: valid events with pixels: 332800
[12:40:37.612] <TB3> INFO: valid pixel hits: 665559
[12:40:37.612] <TB3> INFO: Event errors: 0
[12:40:37.612] <TB3> INFO: start marker: 0
[12:40:37.612] <TB3> INFO: stop marker: 0
[12:40:37.612] <TB3> INFO: overflow: 0
[12:40:37.612] <TB3> INFO: invalid 5bit words: 0
[12:40:37.612] <TB3> INFO: invalid XOR eye diagram: 0
[12:40:37.612] <TB3> INFO: frame (failed synchr.): 0
[12:40:37.612] <TB3> INFO: idle data (no TBM trl): 0
[12:40:37.612] <TB3> INFO: no data (only TBM hdr): 0
[12:40:37.612] <TB3> INFO: TBM errors: 0
[12:40:37.612] <TB3> INFO: flawed TBM headers: 0
[12:40:37.612] <TB3> INFO: flawed TBM trailers: 0
[12:40:37.612] <TB3> INFO: event ID mismatches: 0
[12:40:37.612] <TB3> INFO: ROC errors: 0
[12:40:37.612] <TB3> INFO: missing ROC header(s): 0
[12:40:37.612] <TB3> INFO: misplaced readback start: 0
[12:40:37.612] <TB3> INFO: Pixel decoding errors: 0
[12:40:37.612] <TB3> INFO: pixel data incomplete: 0
[12:40:37.612] <TB3> INFO: pixel address: 0
[12:40:37.612] <TB3> INFO: pulse height fill bit: 0
[12:40:37.612] <TB3> INFO: buffer corruption: 0
[12:40:37.631] <TB3> INFO: Decoding statistics:
[12:40:37.631] <TB3> INFO: General information:
[12:40:37.631] <TB3> INFO: 16bit words read: 3457338
[12:40:37.631] <TB3> INFO: valid events total: 353536
[12:40:37.631] <TB3> INFO: empty events: 18234
[12:40:37.631] <TB3> INFO: valid events with pixels: 335302
[12:40:37.631] <TB3> INFO: valid pixel hits: 668061
[12:40:37.631] <TB3> INFO: Event errors: 0
[12:40:37.631] <TB3> INFO: start marker: 0
[12:40:37.631] <TB3> INFO: stop marker: 0
[12:40:37.631] <TB3> INFO: overflow: 0
[12:40:37.631] <TB3> INFO: invalid 5bit words: 0
[12:40:37.631] <TB3> INFO: invalid XOR eye diagram: 0
[12:40:37.631] <TB3> INFO: frame (failed synchr.): 0
[12:40:37.631] <TB3> INFO: idle data (no TBM trl): 0
[12:40:37.631] <TB3> INFO: no data (only TBM hdr): 0
[12:40:37.631] <TB3> INFO: TBM errors: 0
[12:40:37.631] <TB3> INFO: flawed TBM headers: 0
[12:40:37.631] <TB3> INFO: flawed TBM trailers: 0
[12:40:37.631] <TB3> INFO: event ID mismatches: 0
[12:40:37.631] <TB3> INFO: ROC errors: 0
[12:40:37.631] <TB3> INFO: missing ROC header(s): 0
[12:40:37.631] <TB3> INFO: misplaced readback start: 0
[12:40:37.631] <TB3> INFO: Pixel decoding errors: 0
[12:40:37.631] <TB3> INFO: pixel data incomplete: 0
[12:40:37.631] <TB3> INFO: pixel address: 0
[12:40:37.631] <TB3> INFO: pulse height fill bit: 0
[12:40:37.631] <TB3> INFO: buffer corruption: 0
[12:40:37.631] <TB3> INFO: enter test to run
[12:40:37.631] <TB3> INFO: test: exit no parameter change
[12:40:37.759] <TB3> QUIET: Connection to board 126 closed.
[12:40:37.761] <TB3> INFO: pXar: this is the end, my friend