[12:51:01.217] <TB3> INFO: *** Welcome to pxar ***
[12:51:01.218] <TB3> INFO: *** Today: 2016/10/31
[12:51:01.225] <TB3> INFO: *** Version: c8ba-dirty
[12:51:01.225] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C15.dat
[12:51:01.226] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[12:51:01.226] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//defaultMaskFile.dat
[12:51:01.226] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters_C15.dat
[12:51:01.294] <TB3> INFO: clk: 4
[12:51:01.294] <TB3> INFO: ctr: 4
[12:51:01.294] <TB3> INFO: sda: 19
[12:51:01.294] <TB3> INFO: tin: 9
[12:51:01.294] <TB3> INFO: level: 15
[12:51:01.294] <TB3> INFO: triggerdelay: 0
[12:51:01.294] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[12:51:01.294] <TB3> INFO: Log level: INFO
[12:51:01.303] <TB3> INFO: Found DTB DTB_WWVASW
[12:51:01.312] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[12:51:01.314] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:51:01.316] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:51:02.816] <TB3> INFO: DUT info:
[12:51:02.816] <TB3> INFO: The DUT currently contains the following objects:
[12:51:02.816] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:51:02.816] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:51:02.816] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:51:02.816] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:51:02.816] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:51:02.817] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:51:02.817] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:02.817] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:51:03.220] <TB3> INFO: enter 'restricted' command line mode
[12:51:03.220] <TB3> INFO: enter test to run
[12:51:03.220] <TB3> INFO: test: pretest no parameter change
[12:51:03.220] <TB3> INFO: running: pretest
[12:51:03.227] <TB3> INFO: ######################################################################
[12:51:03.227] <TB3> INFO: PixTestPretest::doTest()
[12:51:03.227] <TB3> INFO: ######################################################################
[12:51:03.228] <TB3> INFO: ----------------------------------------------------------------------
[12:51:03.228] <TB3> INFO: PixTestPretest::programROC()
[12:51:03.228] <TB3> INFO: ----------------------------------------------------------------------
[12:51:21.243] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:51:21.243] <TB3> INFO: IA differences per ROC: 16.9 16.1 17.7 18.5 19.3 18.5 18.5 16.9 19.3 20.9 20.1 18.5 20.1 18.5 17.7 16.1
[12:51:21.305] <TB3> INFO: ----------------------------------------------------------------------
[12:51:21.305] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:51:21.305] <TB3> INFO: ----------------------------------------------------------------------
[12:51:27.807] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[12:51:27.807] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1
[12:51:27.842] <TB3> INFO: ----------------------------------------------------------------------
[12:51:27.843] <TB3> INFO: PixTestPretest::findTiming()
[12:51:27.843] <TB3> INFO: ----------------------------------------------------------------------
[12:51:27.843] <TB3> INFO: PixTestCmd::init()

[12:52:00.003] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:52:00.003] <TB3> INFO: (success/tries = 100/100), width = 4
[12:52:01.511] <TB3> INFO: ----------------------------------------------------------------------
[12:52:01.511] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:52:01.511] <TB3> INFO: ----------------------------------------------------------------------
[12:52:01.607] <TB3> INFO: Expecting 231680 events.
[12:52:11.760] <TB3> INFO: 231680 events read in total (9561ms).
[12:52:11.771] <TB3> INFO: Test took 10254ms.
[12:52:12.025] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:52:12.060] <TB3> INFO: ----------------------------------------------------------------------
[12:52:12.060] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:52:12.060] <TB3> INFO: ----------------------------------------------------------------------
[12:52:12.155] <TB3> INFO: Expecting 231680 events.
[12:52:22.178] <TB3> INFO: 231680 events read in total (9431ms).
[12:52:22.189] <TB3> INFO: Test took 10123ms.
[12:52:22.459] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:52:22.459] <TB3> INFO: CalDel: 84 89 82 75 80 86 101 92 82 100 90 73 96 94 92 81
[12:52:22.459] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 53 51 51 51 51
[12:52:22.463] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C0.dat
[12:52:22.463] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C1.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C2.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C3.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C4.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C5.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C6.dat
[12:52:22.464] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C7.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C8.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C9.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C10.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C11.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C12.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C13.dat
[12:52:22.465] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C14.dat
[12:52:22.466] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters_C15.dat
[12:52:22.466] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[12:52:22.466] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[12:52:22.466] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[12:52:22.466] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[12:52:22.466] <TB3> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[12:52:22.519] <TB3> INFO: enter test to run
[12:52:22.519] <TB3> INFO: test: fulltest no parameter change
[12:52:22.519] <TB3> INFO: running: fulltest
[12:52:22.519] <TB3> INFO: ######################################################################
[12:52:22.519] <TB3> INFO: PixTestFullTest::doTest()
[12:52:22.519] <TB3> INFO: ######################################################################
[12:52:22.521] <TB3> INFO: ######################################################################
[12:52:22.521] <TB3> INFO: PixTestAlive::doTest()
[12:52:22.521] <TB3> INFO: ######################################################################
[12:52:22.522] <TB3> INFO: ----------------------------------------------------------------------
[12:52:22.522] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:52:22.522] <TB3> INFO: ----------------------------------------------------------------------
[12:52:22.773] <TB3> INFO: Expecting 41600 events.
[12:52:26.306] <TB3> INFO: 41600 events read in total (2941ms).
[12:52:26.306] <TB3> INFO: Test took 3782ms.
[12:52:26.537] <TB3> INFO: PixTestAlive::aliveTest() done
[12:52:26.537] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:52:26.538] <TB3> INFO: ----------------------------------------------------------------------
[12:52:26.538] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:52:26.538] <TB3> INFO: ----------------------------------------------------------------------
[12:52:26.821] <TB3> INFO: Expecting 41600 events.
[12:52:29.805] <TB3> INFO: 41600 events read in total (2393ms).
[12:52:29.805] <TB3> INFO: Test took 3263ms.
[12:52:29.806] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:52:30.040] <TB3> INFO: PixTestAlive::maskTest() done
[12:52:30.040] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:52:30.041] <TB3> INFO: ----------------------------------------------------------------------
[12:52:30.041] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:52:30.041] <TB3> INFO: ----------------------------------------------------------------------
[12:52:30.279] <TB3> INFO: Expecting 41600 events.
[12:52:33.808] <TB3> INFO: 41600 events read in total (2937ms).
[12:52:33.809] <TB3> INFO: Test took 3765ms.
[12:52:34.044] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:52:34.044] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:52:34.044] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:52:34.044] <TB3> INFO: Decoding statistics:
[12:52:34.044] <TB3> INFO: General information:
[12:52:34.044] <TB3> INFO: 16bit words read: 0
[12:52:34.044] <TB3> INFO: valid events total: 0
[12:52:34.044] <TB3> INFO: empty events: 0
[12:52:34.045] <TB3> INFO: valid events with pixels: 0
[12:52:34.045] <TB3> INFO: valid pixel hits: 0
[12:52:34.045] <TB3> INFO: Event errors: 0
[12:52:34.045] <TB3> INFO: start marker: 0
[12:52:34.045] <TB3> INFO: stop marker: 0
[12:52:34.045] <TB3> INFO: overflow: 0
[12:52:34.045] <TB3> INFO: invalid 5bit words: 0
[12:52:34.045] <TB3> INFO: invalid XOR eye diagram: 0
[12:52:34.045] <TB3> INFO: frame (failed synchr.): 0
[12:52:34.045] <TB3> INFO: idle data (no TBM trl): 0
[12:52:34.045] <TB3> INFO: no data (only TBM hdr): 0
[12:52:34.045] <TB3> INFO: TBM errors: 0
[12:52:34.045] <TB3> INFO: flawed TBM headers: 0
[12:52:34.045] <TB3> INFO: flawed TBM trailers: 0
[12:52:34.045] <TB3> INFO: event ID mismatches: 0
[12:52:34.045] <TB3> INFO: ROC errors: 0
[12:52:34.045] <TB3> INFO: missing ROC header(s): 0
[12:52:34.045] <TB3> INFO: misplaced readback start: 0
[12:52:34.045] <TB3> INFO: Pixel decoding errors: 0
[12:52:34.045] <TB3> INFO: pixel data incomplete: 0
[12:52:34.045] <TB3> INFO: pixel address: 0
[12:52:34.045] <TB3> INFO: pulse height fill bit: 0
[12:52:34.045] <TB3> INFO: buffer corruption: 0
[12:52:34.053] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:52:34.053] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[12:52:34.053] <TB3> INFO: ######################################################################
[12:52:34.053] <TB3> INFO: PixTestReadback::doTest()
[12:52:34.053] <TB3> INFO: ######################################################################
[12:52:34.053] <TB3> INFO: ----------------------------------------------------------------------
[12:52:34.053] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:52:34.053] <TB3> INFO: ----------------------------------------------------------------------
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:52:44.039] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:52:44.040] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:52:44.073] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:52:44.073] <TB3> INFO: ----------------------------------------------------------------------
[12:52:44.073] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:52:44.073] <TB3> INFO: ----------------------------------------------------------------------
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:52:54.010] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:52:54.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:52:54.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:52:54.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:52:54.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:52:54.041] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:52:54.041] <TB3> INFO: ----------------------------------------------------------------------
[12:52:54.041] <TB3> INFO: PixTestReadback::readbackVbg()
[12:52:54.041] <TB3> INFO: ----------------------------------------------------------------------
[12:53:01.723] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:53:01.723] <TB3> INFO: ----------------------------------------------------------------------
[12:53:01.723] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:53:01.723] <TB3> INFO: ----------------------------------------------------------------------
[12:53:01.723] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 160.6calibrated Vbg = 1.2135 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 152.7calibrated Vbg = 1.20965 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 148.5calibrated Vbg = 1.2062 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.3calibrated Vbg = 1.2034 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.1calibrated Vbg = 1.20871 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 160.9calibrated Vbg = 1.21286 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.8calibrated Vbg = 1.20858 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 164.2calibrated Vbg = 1.21064 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149calibrated Vbg = 1.2076 :::*/*/*/*/
[12:53:01.723] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151.2calibrated Vbg = 1.20542 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.7calibrated Vbg = 1.19935 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 161.6calibrated Vbg = 1.1993 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 159.8calibrated Vbg = 1.20317 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.2calibrated Vbg = 1.20888 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158calibrated Vbg = 1.20557 :::*/*/*/*/
[12:53:01.724] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 146.3calibrated Vbg = 1.20904 :::*/*/*/*/
[12:53:01.727] <TB3> INFO: ----------------------------------------------------------------------
[12:53:01.727] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:53:01.727] <TB3> INFO: ----------------------------------------------------------------------
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C0.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C1.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C2.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C3.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C4.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C5.dat
[12:55:42.544] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C6.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C7.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C8.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C9.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C10.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C11.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C12.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C13.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C14.dat
[12:55:42.545] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//readbackCal_C15.dat
[12:55:42.577] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:55:42.579] <TB3> INFO: PixTestReadback::doTest() done
[12:55:42.579] <TB3> INFO: Decoding statistics:
[12:55:42.579] <TB3> INFO: General information:
[12:55:42.579] <TB3> INFO: 16bit words read: 1536
[12:55:42.579] <TB3> INFO: valid events total: 256
[12:55:42.579] <TB3> INFO: empty events: 256
[12:55:42.579] <TB3> INFO: valid events with pixels: 0
[12:55:42.579] <TB3> INFO: valid pixel hits: 0
[12:55:42.579] <TB3> INFO: Event errors: 0
[12:55:42.579] <TB3> INFO: start marker: 0
[12:55:42.579] <TB3> INFO: stop marker: 0
[12:55:42.579] <TB3> INFO: overflow: 0
[12:55:42.579] <TB3> INFO: invalid 5bit words: 0
[12:55:42.579] <TB3> INFO: invalid XOR eye diagram: 0
[12:55:42.579] <TB3> INFO: frame (failed synchr.): 0
[12:55:42.579] <TB3> INFO: idle data (no TBM trl): 0
[12:55:42.579] <TB3> INFO: no data (only TBM hdr): 0
[12:55:42.579] <TB3> INFO: TBM errors: 0
[12:55:42.579] <TB3> INFO: flawed TBM headers: 0
[12:55:42.579] <TB3> INFO: flawed TBM trailers: 0
[12:55:42.579] <TB3> INFO: event ID mismatches: 0
[12:55:42.579] <TB3> INFO: ROC errors: 0
[12:55:42.579] <TB3> INFO: missing ROC header(s): 0
[12:55:42.579] <TB3> INFO: misplaced readback start: 0
[12:55:42.579] <TB3> INFO: Pixel decoding errors: 0
[12:55:42.579] <TB3> INFO: pixel data incomplete: 0
[12:55:42.579] <TB3> INFO: pixel address: 0
[12:55:42.579] <TB3> INFO: pulse height fill bit: 0
[12:55:42.579] <TB3> INFO: buffer corruption: 0
[12:55:42.631] <TB3> INFO: ######################################################################
[12:55:42.631] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:55:42.631] <TB3> INFO: ######################################################################
[12:55:42.634] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:55:42.976] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:55:42.976] <TB3> INFO: run 1 of 1
[12:55:43.214] <TB3> INFO: Expecting 3120000 events.
[12:56:13.626] <TB3> INFO: 660805 events read in total (29821ms).











[12:56:43.295] <TB3> INFO: 1317345 events read in total (59490ms).











[12:57:13.214] <TB3> INFO: 1970045 events read in total (89409ms).
[12:57:43.454] <TB3> INFO: 2624850 events read in total (119649ms).











[12:58:06.027] <TB3> INFO: 3120000 events read in total (142222ms).
[12:58:06.189] <TB3> INFO: Test took 143214ms.
[12:58:32.759] <TB3> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[12:58:32.759] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
[12:58:32.759] <TB3> INFO: separation cut (per ROC): 106 104 106 105 104 122 103 114 116 115 121 124 100 106 109 107
[12:58:32.759] <TB3> INFO: Decoding statistics:
[12:58:32.759] <TB3> INFO: General information:
[12:58:32.759] <TB3> INFO: 16bit words read: 0
[12:58:32.759] <TB3> INFO: valid events total: 0
[12:58:32.759] <TB3> INFO: empty events: 0
[12:58:32.759] <TB3> INFO: valid events with pixels: 0
[12:58:32.759] <TB3> INFO: valid pixel hits: 0
[12:58:32.759] <TB3> INFO: Event errors: 0
[12:58:32.759] <TB3> INFO: start marker: 0
[12:58:32.759] <TB3> INFO: stop marker: 0
[12:58:32.759] <TB3> INFO: overflow: 0
[12:58:32.759] <TB3> INFO: invalid 5bit words: 0
[12:58:32.759] <TB3> INFO: invalid XOR eye diagram: 0
[12:58:32.759] <TB3> INFO: frame (failed synchr.): 0
[12:58:32.759] <TB3> INFO: idle data (no TBM trl): 0
[12:58:32.759] <TB3> INFO: no data (only TBM hdr): 0
[12:58:32.759] <TB3> INFO: TBM errors: 0
[12:58:32.759] <TB3> INFO: flawed TBM headers: 0
[12:58:32.759] <TB3> INFO: flawed TBM trailers: 0
[12:58:32.759] <TB3> INFO: event ID mismatches: 0
[12:58:32.759] <TB3> INFO: ROC errors: 0
[12:58:32.759] <TB3> INFO: missing ROC header(s): 0
[12:58:32.759] <TB3> INFO: misplaced readback start: 0
[12:58:32.759] <TB3> INFO: Pixel decoding errors: 0
[12:58:32.759] <TB3> INFO: pixel data incomplete: 0
[12:58:32.759] <TB3> INFO: pixel address: 0
[12:58:32.759] <TB3> INFO: pulse height fill bit: 0
[12:58:32.759] <TB3> INFO: buffer corruption: 0
[12:58:32.796] <TB3> INFO: ######################################################################
[12:58:32.796] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:58:32.796] <TB3> INFO: ######################################################################
[12:58:32.797] <TB3> INFO: ----------------------------------------------------------------------
[12:58:32.797] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:58:32.797] <TB3> INFO: ----------------------------------------------------------------------
[12:58:32.797] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:58:32.810] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:58:32.810] <TB3> INFO: run 1 of 1
[12:58:33.054] <TB3> INFO: Expecting 36608000 events.
[12:58:57.095] <TB3> INFO: 703850 events read in total (23450ms).
[12:59:19.916] <TB3> INFO: 1390050 events read in total (46271ms).
[12:59:43.176] <TB3> INFO: 2075550 events read in total (69531ms).
[13:00:05.971] <TB3> INFO: 2760300 events read in total (92326ms).
[13:00:29.078] <TB3> INFO: 3440600 events read in total (115433ms).
[13:00:52.163] <TB3> INFO: 4121050 events read in total (138518ms).
[13:01:15.308] <TB3> INFO: 4803700 events read in total (161663ms).
[13:01:38.490] <TB3> INFO: 5486850 events read in total (184845ms).
[13:02:01.379] <TB3> INFO: 6167650 events read in total (207734ms).
[13:02:23.952] <TB3> INFO: 6848000 events read in total (230307ms).
[13:02:46.740] <TB3> INFO: 7524550 events read in total (253095ms).
[13:03:09.560] <TB3> INFO: 8200900 events read in total (275915ms).
[13:03:32.339] <TB3> INFO: 8878900 events read in total (298694ms).
[13:03:55.363] <TB3> INFO: 9556850 events read in total (321718ms).
[13:04:18.463] <TB3> INFO: 10233700 events read in total (344818ms).
[13:04:41.162] <TB3> INFO: 10909350 events read in total (367517ms).
[13:05:04.068] <TB3> INFO: 11586500 events read in total (390423ms).
[13:05:27.110] <TB3> INFO: 12263700 events read in total (413465ms).
[13:05:50.224] <TB3> INFO: 12938250 events read in total (436579ms).
[13:06:13.104] <TB3> INFO: 13612500 events read in total (459459ms).
[13:06:36.296] <TB3> INFO: 14287400 events read in total (482651ms).
[13:06:59.457] <TB3> INFO: 14961700 events read in total (505812ms).
[13:07:22.354] <TB3> INFO: 15635750 events read in total (528709ms).
[13:07:45.156] <TB3> INFO: 16308500 events read in total (551511ms).
[13:08:07.839] <TB3> INFO: 16980850 events read in total (574194ms).
[13:08:30.594] <TB3> INFO: 17652000 events read in total (596949ms).
[13:08:53.578] <TB3> INFO: 18321950 events read in total (619933ms).
[13:09:16.225] <TB3> INFO: 18991050 events read in total (642580ms).
[13:09:38.679] <TB3> INFO: 19658550 events read in total (665034ms).
[13:10:01.593] <TB3> INFO: 20327950 events read in total (687948ms).
[13:10:24.538] <TB3> INFO: 20998350 events read in total (710893ms).
[13:10:47.464] <TB3> INFO: 21667100 events read in total (733819ms).
[13:11:10.308] <TB3> INFO: 22333650 events read in total (756663ms).
[13:11:33.344] <TB3> INFO: 23001000 events read in total (779699ms).
[13:11:56.261] <TB3> INFO: 23668950 events read in total (802616ms).
[13:12:19.095] <TB3> INFO: 24336750 events read in total (825450ms).
[13:12:41.723] <TB3> INFO: 25004750 events read in total (848078ms).
[13:13:04.587] <TB3> INFO: 25670300 events read in total (870942ms).
[13:13:27.478] <TB3> INFO: 26336900 events read in total (893833ms).
[13:13:50.102] <TB3> INFO: 27004150 events read in total (916457ms).
[13:14:12.913] <TB3> INFO: 27671900 events read in total (939268ms).
[13:14:35.839] <TB3> INFO: 28337600 events read in total (962194ms).
[13:14:58.539] <TB3> INFO: 29002600 events read in total (984894ms).
[13:15:21.376] <TB3> INFO: 29666500 events read in total (1007731ms).
[13:15:43.942] <TB3> INFO: 30330650 events read in total (1030297ms).
[13:16:07.024] <TB3> INFO: 30995050 events read in total (1053379ms).
[13:16:29.644] <TB3> INFO: 31658450 events read in total (1075999ms).
[13:16:52.392] <TB3> INFO: 32322050 events read in total (1098747ms).
[13:17:15.038] <TB3> INFO: 32987750 events read in total (1121393ms).
[13:17:37.656] <TB3> INFO: 33652950 events read in total (1144011ms).
[13:18:00.713] <TB3> INFO: 34318700 events read in total (1167068ms).
[13:18:23.418] <TB3> INFO: 34985550 events read in total (1189773ms).
[13:18:46.103] <TB3> INFO: 35652800 events read in total (1212458ms).
[13:19:09.232] <TB3> INFO: 36328300 events read in total (1235587ms).
[13:19:18.620] <TB3> INFO: 36608000 events read in total (1244975ms).
[13:19:18.746] <TB3> INFO: Test took 1245936ms.
[13:19:19.234] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:20.828] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:22.322] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:23.826] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:25.375] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:27.097] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:28.862] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:30.395] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:31.943] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:33.479] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:34.978] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:36.616] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:38.351] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:40.011] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:41.564] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:43.111] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:19:44.708] <TB3> INFO: PixTestScurves::scurves() done
[13:19:44.708] <TB3> INFO: Vcal mean: 121.67 124.67 114.91 124.83 126.67 138.21 119.05 130.62 131.85 127.08 130.89 130.35 117.90 115.20 121.98 129.96
[13:19:44.708] <TB3> INFO: Vcal RMS: 5.79 6.57 5.24 6.17 6.01 5.75 5.56 6.37 6.18 6.42 6.37 6.57 7.51 4.78 5.92 6.17
[13:19:44.708] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1271 seconds
[13:19:44.708] <TB3> INFO: Decoding statistics:
[13:19:44.708] <TB3> INFO: General information:
[13:19:44.708] <TB3> INFO: 16bit words read: 0
[13:19:44.708] <TB3> INFO: valid events total: 0
[13:19:44.708] <TB3> INFO: empty events: 0
[13:19:44.708] <TB3> INFO: valid events with pixels: 0
[13:19:44.708] <TB3> INFO: valid pixel hits: 0
[13:19:44.708] <TB3> INFO: Event errors: 0
[13:19:44.708] <TB3> INFO: start marker: 0
[13:19:44.708] <TB3> INFO: stop marker: 0
[13:19:44.708] <TB3> INFO: overflow: 0
[13:19:44.708] <TB3> INFO: invalid 5bit words: 0
[13:19:44.708] <TB3> INFO: invalid XOR eye diagram: 0
[13:19:44.708] <TB3> INFO: frame (failed synchr.): 0
[13:19:44.708] <TB3> INFO: idle data (no TBM trl): 0
[13:19:44.708] <TB3> INFO: no data (only TBM hdr): 0
[13:19:44.708] <TB3> INFO: TBM errors: 0
[13:19:44.708] <TB3> INFO: flawed TBM headers: 0
[13:19:44.708] <TB3> INFO: flawed TBM trailers: 0
[13:19:44.708] <TB3> INFO: event ID mismatches: 0
[13:19:44.708] <TB3> INFO: ROC errors: 0
[13:19:44.708] <TB3> INFO: missing ROC header(s): 0
[13:19:44.708] <TB3> INFO: misplaced readback start: 0
[13:19:44.708] <TB3> INFO: Pixel decoding errors: 0
[13:19:44.708] <TB3> INFO: pixel data incomplete: 0
[13:19:44.708] <TB3> INFO: pixel address: 0
[13:19:44.708] <TB3> INFO: pulse height fill bit: 0
[13:19:44.708] <TB3> INFO: buffer corruption: 0
[13:19:44.791] <TB3> INFO: ######################################################################
[13:19:44.791] <TB3> INFO: PixTestTrim::doTest()
[13:19:44.791] <TB3> INFO: ######################################################################
[13:19:44.792] <TB3> INFO: ----------------------------------------------------------------------
[13:19:44.793] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:19:44.793] <TB3> INFO: ----------------------------------------------------------------------
[13:19:44.853] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:19:44.853] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:19:44.867] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:19:44.867] <TB3> INFO: run 1 of 1
[13:19:45.119] <TB3> INFO: Expecting 5025280 events.
[13:20:16.828] <TB3> INFO: 830904 events read in total (31112ms).
[13:20:47.614] <TB3> INFO: 1656416 events read in total (61898ms).
[13:21:18.701] <TB3> INFO: 2478856 events read in total (92985ms).
[13:21:49.622] <TB3> INFO: 3295536 events read in total (123906ms).
[13:22:20.416] <TB3> INFO: 4110024 events read in total (154700ms).
[13:22:51.455] <TB3> INFO: 4924120 events read in total (185739ms).
[13:22:55.816] <TB3> INFO: 5025280 events read in total (190100ms).
[13:22:55.865] <TB3> INFO: Test took 190998ms.
[13:23:12.226] <TB3> INFO: ROC 0 VthrComp = 130
[13:23:12.226] <TB3> INFO: ROC 1 VthrComp = 125
[13:23:12.227] <TB3> INFO: ROC 2 VthrComp = 126
[13:23:12.227] <TB3> INFO: ROC 3 VthrComp = 133
[13:23:12.227] <TB3> INFO: ROC 4 VthrComp = 127
[13:23:12.227] <TB3> INFO: ROC 5 VthrComp = 132
[13:23:12.227] <TB3> INFO: ROC 6 VthrComp = 127
[13:23:12.227] <TB3> INFO: ROC 7 VthrComp = 133
[13:23:12.227] <TB3> INFO: ROC 8 VthrComp = 131
[13:23:12.227] <TB3> INFO: ROC 9 VthrComp = 130
[13:23:12.227] <TB3> INFO: ROC 10 VthrComp = 130
[13:23:12.228] <TB3> INFO: ROC 11 VthrComp = 133
[13:23:12.229] <TB3> INFO: ROC 12 VthrComp = 118
[13:23:12.229] <TB3> INFO: ROC 13 VthrComp = 125
[13:23:12.229] <TB3> INFO: ROC 14 VthrComp = 129
[13:23:12.229] <TB3> INFO: ROC 15 VthrComp = 131
[13:23:12.470] <TB3> INFO: Expecting 41600 events.
[13:23:16.029] <TB3> INFO: 41600 events read in total (2968ms).
[13:23:16.030] <TB3> INFO: Test took 3799ms.
[13:23:16.040] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:23:16.040] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:23:16.051] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:23:16.051] <TB3> INFO: run 1 of 1
[13:23:16.329] <TB3> INFO: Expecting 5025280 events.
[13:23:43.563] <TB3> INFO: 592008 events read in total (26643ms).
[13:24:10.137] <TB3> INFO: 1182392 events read in total (53218ms).
[13:24:36.954] <TB3> INFO: 1772936 events read in total (80034ms).
[13:25:03.753] <TB3> INFO: 2362264 events read in total (106833ms).
[13:25:30.502] <TB3> INFO: 2949240 events read in total (133582ms).
[13:25:57.093] <TB3> INFO: 3534400 events read in total (160173ms).
[13:26:23.521] <TB3> INFO: 4118096 events read in total (186601ms).
[13:26:49.848] <TB3> INFO: 4700320 events read in total (212928ms).
[13:27:05.070] <TB3> INFO: 5025280 events read in total (228150ms).
[13:27:05.200] <TB3> INFO: Test took 229150ms.
[13:27:32.021] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.7911 for pixel 16/1 mean/min/max = 44.4518/32.0615/56.8422
[13:27:32.021] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.1243 for pixel 8/53 mean/min/max = 47.0434/32.8687/61.2182
[13:27:32.021] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 57.5934 for pixel 8/42 mean/min/max = 44.7422/31.7912/57.6932
[13:27:32.022] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.2187 for pixel 18/69 mean/min/max = 46.097/31.8263/60.3677
[13:27:32.022] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 58.6788 for pixel 0/1 mean/min/max = 45.6278/32.5341/58.7214
[13:27:32.023] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 63.4487 for pixel 38/78 mean/min/max = 49.9553/36.2761/63.6345
[13:27:32.023] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.5451 for pixel 24/74 mean/min/max = 44.5945/31.5075/57.6815
[13:27:32.024] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.2077 for pixel 3/79 mean/min/max = 46.4173/32.3948/60.4397
[13:27:32.025] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 62.24 for pixel 11/12 mean/min/max = 48.8487/35.4013/62.2961
[13:27:32.025] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 60.3863 for pixel 11/78 mean/min/max = 46.7439/32.9548/60.533
[13:27:32.026] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 64.0643 for pixel 7/76 mean/min/max = 49.4288/34.7833/64.0743
[13:27:32.026] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.9649 for pixel 2/8 mean/min/max = 46.6123/33.2435/59.9811
[13:27:32.026] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 66.4936 for pixel 5/1 mean/min/max = 47.8546/29.1422/66.567
[13:27:32.027] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 55.5162 for pixel 25/15 mean/min/max = 43.9186/32.2332/55.604
[13:27:32.027] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.2443 for pixel 0/13 mean/min/max = 45.8002/32.1326/59.4678
[13:27:32.028] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 58.6135 for pixel 18/8 mean/min/max = 45.5909/32.3621/58.8196
[13:27:32.028] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:27:32.117] <TB3> INFO: Expecting 411648 events.
[13:27:41.515] <TB3> INFO: 411648 events read in total (8807ms).
[13:27:41.524] <TB3> INFO: Expecting 411648 events.
[13:27:50.791] <TB3> INFO: 411648 events read in total (8856ms).
[13:27:50.802] <TB3> INFO: Expecting 411648 events.
[13:28:00.094] <TB3> INFO: 411648 events read in total (8889ms).
[13:28:00.107] <TB3> INFO: Expecting 411648 events.
[13:28:09.414] <TB3> INFO: 411648 events read in total (8903ms).
[13:28:09.430] <TB3> INFO: Expecting 411648 events.
[13:28:18.703] <TB3> INFO: 411648 events read in total (8870ms).
[13:28:18.722] <TB3> INFO: Expecting 411648 events.
[13:28:27.934] <TB3> INFO: 411648 events read in total (8809ms).
[13:28:27.956] <TB3> INFO: Expecting 411648 events.
[13:28:37.184] <TB3> INFO: 411648 events read in total (8825ms).
[13:28:37.208] <TB3> INFO: Expecting 411648 events.
[13:28:46.401] <TB3> INFO: 411648 events read in total (8789ms).
[13:28:46.436] <TB3> INFO: Expecting 411648 events.
[13:28:55.693] <TB3> INFO: 411648 events read in total (8854ms).
[13:28:55.723] <TB3> INFO: Expecting 411648 events.
[13:29:05.131] <TB3> INFO: 411648 events read in total (9005ms).
[13:29:05.165] <TB3> INFO: Expecting 411648 events.
[13:29:14.556] <TB3> INFO: 411648 events read in total (8987ms).
[13:29:14.591] <TB3> INFO: Expecting 411648 events.
[13:29:23.845] <TB3> INFO: 411648 events read in total (8851ms).
[13:29:23.884] <TB3> INFO: Expecting 411648 events.
[13:29:33.094] <TB3> INFO: 411648 events read in total (8807ms).
[13:29:33.141] <TB3> INFO: Expecting 411648 events.
[13:29:42.449] <TB3> INFO: 411648 events read in total (8905ms).
[13:29:42.504] <TB3> INFO: Expecting 411648 events.
[13:29:51.779] <TB3> INFO: 411648 events read in total (8872ms).
[13:29:51.841] <TB3> INFO: Expecting 411648 events.
[13:30:01.129] <TB3> INFO: 411648 events read in total (8885ms).
[13:30:01.193] <TB3> INFO: Test took 149165ms.
[13:30:01.972] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:30:01.985] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:30:01.985] <TB3> INFO: run 1 of 1
[13:30:02.222] <TB3> INFO: Expecting 5025280 events.
[13:30:29.196] <TB3> INFO: 586688 events read in total (26382ms).
[13:30:56.142] <TB3> INFO: 1170872 events read in total (53328ms).
[13:31:23.023] <TB3> INFO: 1754768 events read in total (80209ms).
[13:31:50.004] <TB3> INFO: 2338912 events read in total (107190ms).
[13:32:17.137] <TB3> INFO: 2923224 events read in total (134323ms).
[13:32:44.320] <TB3> INFO: 3507592 events read in total (161506ms).
[13:33:11.777] <TB3> INFO: 4093368 events read in total (188963ms).
[13:33:39.141] <TB3> INFO: 4682552 events read in total (216328ms).
[13:33:54.857] <TB3> INFO: 5025280 events read in total (232043ms).
[13:33:55.029] <TB3> INFO: Test took 233044ms.
[13:34:19.196] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 4.500000 .. 136.027302
[13:34:19.458] <TB3> INFO: Expecting 208000 events.
[13:34:29.564] <TB3> INFO: 208000 events read in total (9515ms).
[13:34:29.565] <TB3> INFO: Test took 10367ms.
[13:34:29.631] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 146 (-1/-1) hits flags = 528 (plus default)
[13:34:29.644] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:34:29.644] <TB3> INFO: run 1 of 1
[13:34:29.922] <TB3> INFO: Expecting 4759040 events.
[13:34:56.375] <TB3> INFO: 583784 events read in total (25861ms).
[13:35:22.483] <TB3> INFO: 1168320 events read in total (51970ms).
[13:35:48.515] <TB3> INFO: 1752608 events read in total (78001ms).
[13:36:14.620] <TB3> INFO: 2336784 events read in total (104106ms).
[13:36:40.615] <TB3> INFO: 2920024 events read in total (130101ms).
[13:37:06.721] <TB3> INFO: 3503016 events read in total (156207ms).
[13:37:32.835] <TB3> INFO: 4084600 events read in total (182321ms).
[13:37:58.890] <TB3> INFO: 4665968 events read in total (208376ms).
[13:38:03.448] <TB3> INFO: 4759040 events read in total (212934ms).
[13:38:03.553] <TB3> INFO: Test took 213909ms.
[13:38:30.040] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.286762 .. 45.411778
[13:38:30.312] <TB3> INFO: Expecting 208000 events.
[13:38:40.557] <TB3> INFO: 208000 events read in total (9654ms).
[13:38:40.558] <TB3> INFO: Test took 10517ms.
[13:38:40.608] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:38:40.621] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:38:40.621] <TB3> INFO: run 1 of 1
[13:38:40.899] <TB3> INFO: Expecting 1297920 events.
[13:39:09.881] <TB3> INFO: 661224 events read in total (28390ms).
[13:39:37.139] <TB3> INFO: 1297920 events read in total (55648ms).
[13:39:37.178] <TB3> INFO: Test took 56558ms.
[13:39:50.558] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 27.746508 .. 47.148281
[13:39:50.819] <TB3> INFO: Expecting 208000 events.
[13:40:00.782] <TB3> INFO: 208000 events read in total (9370ms).
[13:40:00.788] <TB3> INFO: Test took 10229ms.
[13:40:00.866] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[13:40:00.880] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:40:00.880] <TB3> INFO: run 1 of 1
[13:40:01.158] <TB3> INFO: Expecting 1364480 events.
[13:40:29.425] <TB3> INFO: 651704 events read in total (27675ms).
[13:40:56.002] <TB3> INFO: 1303632 events read in total (55252ms).
[13:41:00.006] <TB3> INFO: 1364480 events read in total (58257ms).
[13:41:00.041] <TB3> INFO: Test took 59162ms.
[13:41:12.514] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.827320 .. 48.227530
[13:41:12.750] <TB3> INFO: Expecting 208000 events.
[13:41:22.632] <TB3> INFO: 208000 events read in total (9289ms).
[13:41:22.633] <TB3> INFO: Test took 10118ms.
[13:41:22.682] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:41:22.695] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:41:22.695] <TB3> INFO: run 1 of 1
[13:41:22.973] <TB3> INFO: Expecting 1464320 events.
[13:41:51.855] <TB3> INFO: 656168 events read in total (28291ms).
[13:42:19.315] <TB3> INFO: 1311528 events read in total (55752ms).
[13:42:26.233] <TB3> INFO: 1464320 events read in total (62670ms).
[13:42:26.270] <TB3> INFO: Test took 63577ms.
[13:42:39.116] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:42:39.116] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:42:39.129] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:42:39.129] <TB3> INFO: run 1 of 1
[13:42:39.365] <TB3> INFO: Expecting 1364480 events.
[13:43:08.275] <TB3> INFO: 668984 events read in total (28318ms).
[13:43:37.033] <TB3> INFO: 1335840 events read in total (57076ms).
[13:43:38.781] <TB3> INFO: 1364480 events read in total (58825ms).
[13:43:38.809] <TB3> INFO: Test took 59681ms.
[13:43:51.225] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C0.dat
[13:43:51.225] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C1.dat
[13:43:51.225] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C2.dat
[13:43:51.225] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C3.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C4.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C5.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C6.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C7.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C8.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C9.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C10.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C11.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C12.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C13.dat
[13:43:51.226] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C14.dat
[13:43:51.227] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C15.dat
[13:43:51.227] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C0.dat
[13:43:51.233] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C1.dat
[13:43:51.240] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C2.dat
[13:43:51.247] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C3.dat
[13:43:51.253] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C4.dat
[13:43:51.261] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C5.dat
[13:43:51.268] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C6.dat
[13:43:51.276] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C7.dat
[13:43:51.284] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C8.dat
[13:43:51.292] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C9.dat
[13:43:51.298] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C10.dat
[13:43:51.303] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C11.dat
[13:43:51.308] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C12.dat
[13:43:51.313] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C13.dat
[13:43:51.318] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C14.dat
[13:43:51.323] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters35_C15.dat
[13:43:51.327] <TB3> INFO: PixTestTrim::trimTest() done
[13:43:51.327] <TB3> INFO: vtrim: 117 145 126 133 120 135 124 123 154 132 144 128 169 114 146 138
[13:43:51.327] <TB3> INFO: vthrcomp: 130 125 126 133 127 132 127 133 131 130 130 133 118 125 129 131
[13:43:51.327] <TB3> INFO: vcal mean: 34.99 35.10 34.90 34.95 34.97 35.45 35.02 35.11 35.09 35.02 35.16 35.08 35.02 34.98 35.04 35.14
[13:43:51.327] <TB3> INFO: vcal RMS: 1.02 1.14 0.97 1.06 1.08 1.58 1.04 1.17 1.14 1.07 1.24 1.18 1.19 1.02 1.11 1.21
[13:43:51.327] <TB3> INFO: bits mean: 9.80 9.22 9.63 9.37 9.09 8.62 9.86 9.16 8.61 9.10 8.73 9.33 9.77 10.20 9.60 9.64
[13:43:51.327] <TB3> INFO: bits RMS: 2.72 2.66 2.74 2.79 2.91 2.45 2.72 2.82 2.44 2.69 2.47 2.65 2.79 2.45 2.67 2.69
[13:43:51.335] <TB3> INFO: ----------------------------------------------------------------------
[13:43:51.335] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:43:51.335] <TB3> INFO: ----------------------------------------------------------------------
[13:43:51.338] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:43:51.351] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:43:51.351] <TB3> INFO: run 1 of 1
[13:43:51.604] <TB3> INFO: Expecting 4160000 events.
[13:44:24.646] <TB3> INFO: 769940 events read in total (32451ms).
[13:44:56.971] <TB3> INFO: 1529890 events read in total (64776ms).
[13:45:28.987] <TB3> INFO: 2283240 events read in total (96792ms).
[13:46:01.227] <TB3> INFO: 3031765 events read in total (129032ms).
[13:46:33.012] <TB3> INFO: 3777000 events read in total (160817ms).
[13:46:49.519] <TB3> INFO: 4160000 events read in total (177324ms).
[13:46:49.612] <TB3> INFO: Test took 178261ms.
[13:47:12.872] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[13:47:12.886] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:47:12.886] <TB3> INFO: run 1 of 1
[13:47:13.123] <TB3> INFO: Expecting 4305600 events.
[13:47:45.442] <TB3> INFO: 735405 events read in total (31728ms).
[13:48:16.541] <TB3> INFO: 1463255 events read in total (62827ms).
[13:48:48.123] <TB3> INFO: 2186700 events read in total (94409ms).
[13:49:19.210] <TB3> INFO: 2904445 events read in total (125496ms).
[13:49:50.591] <TB3> INFO: 3619125 events read in total (156877ms).
[13:50:20.545] <TB3> INFO: 4305600 events read in total (186831ms).
[13:50:20.631] <TB3> INFO: Test took 187745ms.
[13:50:45.727] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[13:50:45.741] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:50:45.741] <TB3> INFO: run 1 of 1
[13:50:46.015] <TB3> INFO: Expecting 4222400 events.
[13:51:18.295] <TB3> INFO: 741690 events read in total (31689ms).
[13:51:50.373] <TB3> INFO: 1475145 events read in total (63767ms).
[13:52:21.582] <TB3> INFO: 2203755 events read in total (94976ms).
[13:52:52.984] <TB3> INFO: 2927825 events read in total (126378ms).
[13:53:24.266] <TB3> INFO: 3647675 events read in total (157660ms).
[13:53:48.998] <TB3> INFO: 4222400 events read in total (182392ms).
[13:53:49.127] <TB3> INFO: Test took 183386ms.
[13:54:13.334] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[13:54:13.348] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:54:13.348] <TB3> INFO: run 1 of 1
[13:54:13.621] <TB3> INFO: Expecting 4222400 events.
[13:54:46.034] <TB3> INFO: 741845 events read in total (31821ms).
[13:55:18.113] <TB3> INFO: 1475335 events read in total (63900ms).
[13:55:49.663] <TB3> INFO: 2203555 events read in total (95450ms).
[13:56:21.200] <TB3> INFO: 2926995 events read in total (126987ms).
[13:56:52.746] <TB3> INFO: 3646935 events read in total (158533ms).
[13:57:18.033] <TB3> INFO: 4222400 events read in total (183820ms).
[13:57:18.145] <TB3> INFO: Test took 184796ms.
[13:57:43.903] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:57:43.916] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:57:43.916] <TB3> INFO: run 1 of 1
[13:57:44.155] <TB3> INFO: Expecting 4160000 events.
[13:58:16.505] <TB3> INFO: 746455 events read in total (31758ms).
[13:58:48.755] <TB3> INFO: 1483730 events read in total (64008ms).
[13:59:20.911] <TB3> INFO: 2215905 events read in total (96164ms).
[13:59:53.327] <TB3> INFO: 2943620 events read in total (128580ms).
[14:00:25.772] <TB3> INFO: 3667425 events read in total (161025ms).
[14:00:47.696] <TB3> INFO: 4160000 events read in total (182949ms).
[14:00:47.808] <TB3> INFO: Test took 183892ms.
[14:01:12.039] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:01:12.040] <TB3> INFO: PixTestTrim::doTest() done, duration: 2487 seconds
[14:01:12.040] <TB3> INFO: Decoding statistics:
[14:01:12.040] <TB3> INFO: General information:
[14:01:12.040] <TB3> INFO: 16bit words read: 0
[14:01:12.040] <TB3> INFO: valid events total: 0
[14:01:12.040] <TB3> INFO: empty events: 0
[14:01:12.040] <TB3> INFO: valid events with pixels: 0
[14:01:12.040] <TB3> INFO: valid pixel hits: 0
[14:01:12.040] <TB3> INFO: Event errors: 0
[14:01:12.040] <TB3> INFO: start marker: 0
[14:01:12.040] <TB3> INFO: stop marker: 0
[14:01:12.040] <TB3> INFO: overflow: 0
[14:01:12.040] <TB3> INFO: invalid 5bit words: 0
[14:01:12.040] <TB3> INFO: invalid XOR eye diagram: 0
[14:01:12.040] <TB3> INFO: frame (failed synchr.): 0
[14:01:12.040] <TB3> INFO: idle data (no TBM trl): 0
[14:01:12.040] <TB3> INFO: no data (only TBM hdr): 0
[14:01:12.040] <TB3> INFO: TBM errors: 0
[14:01:12.040] <TB3> INFO: flawed TBM headers: 0
[14:01:12.040] <TB3> INFO: flawed TBM trailers: 0
[14:01:12.040] <TB3> INFO: event ID mismatches: 0
[14:01:12.040] <TB3> INFO: ROC errors: 0
[14:01:12.040] <TB3> INFO: missing ROC header(s): 0
[14:01:12.040] <TB3> INFO: misplaced readback start: 0
[14:01:12.041] <TB3> INFO: Pixel decoding errors: 0
[14:01:12.041] <TB3> INFO: pixel data incomplete: 0
[14:01:12.041] <TB3> INFO: pixel address: 0
[14:01:12.041] <TB3> INFO: pulse height fill bit: 0
[14:01:12.041] <TB3> INFO: buffer corruption: 0
[14:01:12.654] <TB3> INFO: ######################################################################
[14:01:12.654] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:01:12.654] <TB3> INFO: ######################################################################
[14:01:12.893] <TB3> INFO: Expecting 41600 events.
[14:01:16.507] <TB3> INFO: 41600 events read in total (3022ms).
[14:01:16.508] <TB3> INFO: Test took 3853ms.
[14:01:16.958] <TB3> INFO: Expecting 41600 events.
[14:01:20.606] <TB3> INFO: 41600 events read in total (3056ms).
[14:01:20.608] <TB3> INFO: Test took 3894ms.
[14:01:20.902] <TB3> INFO: Expecting 41600 events.
[14:01:24.451] <TB3> INFO: 41600 events read in total (2957ms).
[14:01:24.452] <TB3> INFO: Test took 3815ms.
[14:01:24.750] <TB3> INFO: Expecting 41600 events.
[14:01:28.372] <TB3> INFO: 41600 events read in total (3030ms).
[14:01:28.373] <TB3> INFO: Test took 3895ms.
[14:01:28.662] <TB3> INFO: Expecting 41600 events.
[14:01:32.304] <TB3> INFO: 41600 events read in total (3050ms).
[14:01:32.305] <TB3> INFO: Test took 3908ms.
[14:01:32.597] <TB3> INFO: Expecting 41600 events.
[14:01:36.145] <TB3> INFO: 41600 events read in total (2957ms).
[14:01:36.146] <TB3> INFO: Test took 3814ms.
[14:01:36.442] <TB3> INFO: Expecting 41600 events.
[14:01:40.108] <TB3> INFO: 41600 events read in total (3074ms).
[14:01:40.109] <TB3> INFO: Test took 3938ms.
[14:01:40.413] <TB3> INFO: Expecting 41600 events.
[14:01:43.870] <TB3> INFO: 41600 events read in total (2865ms).
[14:01:43.871] <TB3> INFO: Test took 3738ms.
[14:01:44.159] <TB3> INFO: Expecting 41600 events.
[14:01:47.699] <TB3> INFO: 41600 events read in total (2948ms).
[14:01:47.700] <TB3> INFO: Test took 3805ms.
[14:01:47.992] <TB3> INFO: Expecting 41600 events.
[14:01:51.500] <TB3> INFO: 41600 events read in total (2917ms).
[14:01:51.501] <TB3> INFO: Test took 3774ms.
[14:01:51.791] <TB3> INFO: Expecting 41600 events.
[14:01:55.283] <TB3> INFO: 41600 events read in total (2900ms).
[14:01:55.284] <TB3> INFO: Test took 3758ms.
[14:01:55.574] <TB3> INFO: Expecting 41600 events.
[14:01:59.208] <TB3> INFO: 41600 events read in total (3043ms).
[14:01:59.209] <TB3> INFO: Test took 3901ms.
[14:01:59.506] <TB3> INFO: Expecting 41600 events.
[14:02:03.084] <TB3> INFO: 41600 events read in total (2986ms).
[14:02:03.085] <TB3> INFO: Test took 3849ms.
[14:02:03.375] <TB3> INFO: Expecting 41600 events.
[14:02:06.955] <TB3> INFO: 41600 events read in total (2989ms).
[14:02:06.956] <TB3> INFO: Test took 3846ms.
[14:02:07.248] <TB3> INFO: Expecting 41600 events.
[14:02:10.827] <TB3> INFO: 41600 events read in total (2988ms).
[14:02:10.828] <TB3> INFO: Test took 3846ms.
[14:02:11.128] <TB3> INFO: Expecting 41600 events.
[14:02:14.654] <TB3> INFO: 41600 events read in total (2934ms).
[14:02:14.655] <TB3> INFO: Test took 3799ms.
[14:02:14.944] <TB3> INFO: Expecting 41600 events.
[14:02:18.615] <TB3> INFO: 41600 events read in total (3079ms).
[14:02:18.616] <TB3> INFO: Test took 3936ms.
[14:02:18.905] <TB3> INFO: Expecting 41600 events.
[14:02:22.729] <TB3> INFO: 41600 events read in total (3232ms).
[14:02:22.730] <TB3> INFO: Test took 4089ms.
[14:02:23.022] <TB3> INFO: Expecting 41600 events.
[14:02:26.610] <TB3> INFO: 41600 events read in total (2997ms).
[14:02:26.611] <TB3> INFO: Test took 3854ms.
[14:02:26.902] <TB3> INFO: Expecting 41600 events.
[14:02:30.464] <TB3> INFO: 41600 events read in total (2970ms).
[14:02:30.465] <TB3> INFO: Test took 3827ms.
[14:02:30.755] <TB3> INFO: Expecting 41600 events.
[14:02:34.370] <TB3> INFO: 41600 events read in total (3023ms).
[14:02:34.371] <TB3> INFO: Test took 3881ms.
[14:02:34.660] <TB3> INFO: Expecting 41600 events.
[14:02:38.200] <TB3> INFO: 41600 events read in total (2948ms).
[14:02:38.201] <TB3> INFO: Test took 3806ms.
[14:02:38.490] <TB3> INFO: Expecting 41600 events.
[14:02:42.099] <TB3> INFO: 41600 events read in total (3017ms).
[14:02:42.099] <TB3> INFO: Test took 3874ms.
[14:02:42.389] <TB3> INFO: Expecting 41600 events.
[14:02:45.936] <TB3> INFO: 41600 events read in total (2955ms).
[14:02:45.937] <TB3> INFO: Test took 3814ms.
[14:02:46.227] <TB3> INFO: Expecting 41600 events.
[14:02:49.692] <TB3> INFO: 41600 events read in total (2874ms).
[14:02:49.693] <TB3> INFO: Test took 3732ms.
[14:02:49.002] <TB3> INFO: Expecting 41600 events.
[14:02:53.521] <TB3> INFO: 41600 events read in total (2927ms).
[14:02:53.522] <TB3> INFO: Test took 3805ms.
[14:02:53.811] <TB3> INFO: Expecting 41600 events.
[14:02:57.329] <TB3> INFO: 41600 events read in total (2926ms).
[14:02:57.330] <TB3> INFO: Test took 3784ms.
[14:02:57.622] <TB3> INFO: Expecting 41600 events.
[14:03:01.162] <TB3> INFO: 41600 events read in total (2949ms).
[14:03:01.163] <TB3> INFO: Test took 3807ms.
[14:03:01.459] <TB3> INFO: Expecting 2560 events.
[14:03:02.356] <TB3> INFO: 2560 events read in total (305ms).
[14:03:02.357] <TB3> INFO: Test took 1175ms.
[14:03:02.664] <TB3> INFO: Expecting 2560 events.
[14:03:03.547] <TB3> INFO: 2560 events read in total (292ms).
[14:03:03.548] <TB3> INFO: Test took 1191ms.
[14:03:03.855] <TB3> INFO: Expecting 2560 events.
[14:03:04.743] <TB3> INFO: 2560 events read in total (296ms).
[14:03:04.743] <TB3> INFO: Test took 1195ms.
[14:03:05.051] <TB3> INFO: Expecting 2560 events.
[14:03:05.942] <TB3> INFO: 2560 events read in total (300ms).
[14:03:05.943] <TB3> INFO: Test took 1199ms.
[14:03:06.249] <TB3> INFO: Expecting 2560 events.
[14:03:07.136] <TB3> INFO: 2560 events read in total (295ms).
[14:03:07.136] <TB3> INFO: Test took 1193ms.
[14:03:07.444] <TB3> INFO: Expecting 2560 events.
[14:03:08.327] <TB3> INFO: 2560 events read in total (292ms).
[14:03:08.328] <TB3> INFO: Test took 1192ms.
[14:03:08.634] <TB3> INFO: Expecting 2560 events.
[14:03:09.521] <TB3> INFO: 2560 events read in total (295ms).
[14:03:09.521] <TB3> INFO: Test took 1193ms.
[14:03:09.830] <TB3> INFO: Expecting 2560 events.
[14:03:10.718] <TB3> INFO: 2560 events read in total (296ms).
[14:03:10.718] <TB3> INFO: Test took 1196ms.
[14:03:11.026] <TB3> INFO: Expecting 2560 events.
[14:03:11.908] <TB3> INFO: 2560 events read in total (286ms).
[14:03:11.908] <TB3> INFO: Test took 1189ms.
[14:03:12.218] <TB3> INFO: Expecting 2560 events.
[14:03:13.097] <TB3> INFO: 2560 events read in total (288ms).
[14:03:13.098] <TB3> INFO: Test took 1189ms.
[14:03:13.406] <TB3> INFO: Expecting 2560 events.
[14:03:14.292] <TB3> INFO: 2560 events read in total (294ms).
[14:03:14.292] <TB3> INFO: Test took 1194ms.
[14:03:14.598] <TB3> INFO: Expecting 2560 events.
[14:03:15.486] <TB3> INFO: 2560 events read in total (296ms).
[14:03:15.486] <TB3> INFO: Test took 1193ms.
[14:03:15.794] <TB3> INFO: Expecting 2560 events.
[14:03:16.682] <TB3> INFO: 2560 events read in total (297ms).
[14:03:16.683] <TB3> INFO: Test took 1197ms.
[14:03:16.993] <TB3> INFO: Expecting 2560 events.
[14:03:17.885] <TB3> INFO: 2560 events read in total (300ms).
[14:03:17.885] <TB3> INFO: Test took 1202ms.
[14:03:18.194] <TB3> INFO: Expecting 2560 events.
[14:03:19.080] <TB3> INFO: 2560 events read in total (294ms).
[14:03:19.081] <TB3> INFO: Test took 1195ms.
[14:03:19.387] <TB3> INFO: Expecting 2560 events.
[14:03:20.272] <TB3> INFO: 2560 events read in total (293ms).
[14:03:20.272] <TB3> INFO: Test took 1190ms.
[14:03:20.276] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:03:20.581] <TB3> INFO: Expecting 655360 events.
[14:03:35.729] <TB3> INFO: 655360 events read in total (14556ms).
[14:03:35.744] <TB3> INFO: Expecting 655360 events.
[14:03:50.474] <TB3> INFO: 655360 events read in total (14327ms).
[14:03:50.492] <TB3> INFO: Expecting 655360 events.
[14:04:05.255] <TB3> INFO: 655360 events read in total (14360ms).
[14:04:05.279] <TB3> INFO: Expecting 655360 events.
[14:04:20.168] <TB3> INFO: 655360 events read in total (14485ms).
[14:04:20.196] <TB3> INFO: Expecting 655360 events.
[14:04:35.189] <TB3> INFO: 655360 events read in total (14591ms).
[14:04:35.223] <TB3> INFO: Expecting 655360 events.
[14:04:50.131] <TB3> INFO: 655360 events read in total (14505ms).
[14:04:50.217] <TB3> INFO: Expecting 655360 events.
[14:05:04.824] <TB3> INFO: 655360 events read in total (14204ms).
[14:05:04.874] <TB3> INFO: Expecting 655360 events.
[14:05:19.398] <TB3> INFO: 655360 events read in total (14121ms).
[14:05:19.443] <TB3> INFO: Expecting 655360 events.
[14:05:34.035] <TB3> INFO: 655360 events read in total (14189ms).
[14:05:34.139] <TB3> INFO: Expecting 655360 events.
[14:05:48.678] <TB3> INFO: 655360 events read in total (14136ms).
[14:05:48.733] <TB3> INFO: Expecting 655360 events.
[14:06:03.346] <TB3> INFO: 655360 events read in total (14210ms).
[14:06:03.413] <TB3> INFO: Expecting 655360 events.
[14:06:17.992] <TB3> INFO: 655360 events read in total (14176ms).
[14:06:18.066] <TB3> INFO: Expecting 655360 events.
[14:06:32.560] <TB3> INFO: 655360 events read in total (14091ms).
[14:06:32.667] <TB3> INFO: Expecting 655360 events.
[14:06:47.120] <TB3> INFO: 655360 events read in total (14050ms).
[14:06:47.223] <TB3> INFO: Expecting 655360 events.
[14:07:01.693] <TB3> INFO: 655360 events read in total (14066ms).
[14:07:01.816] <TB3> INFO: Expecting 655360 events.
[14:07:16.339] <TB3> INFO: 655360 events read in total (14120ms).
[14:07:16.461] <TB3> INFO: Test took 236185ms.
[14:07:16.573] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:16.826] <TB3> INFO: Expecting 655360 events.
[14:07:31.506] <TB3> INFO: 655360 events read in total (14089ms).
[14:07:31.519] <TB3> INFO: Expecting 655360 events.
[14:07:45.002] <TB3> INFO: 655360 events read in total (14080ms).
[14:07:46.018] <TB3> INFO: Expecting 655360 events.
[14:08:00.477] <TB3> INFO: 655360 events read in total (14056ms).
[14:08:00.497] <TB3> INFO: Expecting 655360 events.
[14:08:14.961] <TB3> INFO: 655360 events read in total (14061ms).
[14:08:14.993] <TB3> INFO: Expecting 655360 events.
[14:08:29.387] <TB3> INFO: 655360 events read in total (13991ms).
[14:08:29.428] <TB3> INFO: Expecting 655360 events.
[14:08:43.896] <TB3> INFO: 655360 events read in total (14065ms).
[14:08:43.939] <TB3> INFO: Expecting 655360 events.
[14:08:58.435] <TB3> INFO: 655360 events read in total (14093ms).
[14:08:58.494] <TB3> INFO: Expecting 655360 events.
[14:09:12.810] <TB3> INFO: 655360 events read in total (13913ms).
[14:09:12.854] <TB3> INFO: Expecting 655360 events.
[14:09:27.123] <TB3> INFO: 655360 events read in total (13866ms).
[14:09:27.170] <TB3> INFO: Expecting 655360 events.
[14:09:41.583] <TB3> INFO: 655360 events read in total (14010ms).
[14:09:41.675] <TB3> INFO: Expecting 655360 events.
[14:09:55.982] <TB3> INFO: 655360 events read in total (13901ms).
[14:09:56.088] <TB3> INFO: Expecting 655360 events.
[14:10:10.621] <TB3> INFO: 655360 events read in total (14129ms).
[14:10:10.724] <TB3> INFO: Expecting 655360 events.
[14:10:24.850] <TB3> INFO: 655360 events read in total (13723ms).
[14:10:24.932] <TB3> INFO: Expecting 655360 events.
[14:10:39.583] <TB3> INFO: 655360 events read in total (14248ms).
[14:10:39.675] <TB3> INFO: Expecting 655360 events.
[14:10:53.943] <TB3> INFO: 655360 events read in total (13865ms).
[14:10:54.056] <TB3> INFO: Expecting 655360 events.
[14:11:08.513] <TB3> INFO: 655360 events read in total (14054ms).
[14:11:08.632] <TB3> INFO: Test took 232059ms.
[14:11:08.823] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.829] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.835] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:08.841] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:11:08.847] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:11:08.853] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:11:08.858] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:11:08.864] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:11:08.870] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:11:08.876] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:11:08.881] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[14:11:08.887] <TB3> INFO: safety margin for low PH: adding 10, margin is now 30
[14:11:08.893] <TB3> INFO: safety margin for low PH: adding 11, margin is now 31
[14:11:08.898] <TB3> INFO: safety margin for low PH: adding 12, margin is now 32
[14:11:08.904] <TB3> INFO: safety margin for low PH: adding 13, margin is now 33
[14:11:08.910] <TB3> INFO: safety margin for low PH: adding 14, margin is now 34
[14:11:08.916] <TB3> INFO: safety margin for low PH: adding 15, margin is now 35
[14:11:08.922] <TB3> INFO: safety margin for low PH: adding 16, margin is now 36
[14:11:08.927] <TB3> INFO: safety margin for low PH: adding 17, margin is now 37
[14:11:08.933] <TB3> INFO: safety margin for low PH: adding 18, margin is now 38
[14:11:08.939] <TB3> INFO: safety margin for low PH: adding 19, margin is now 39
[14:11:08.945] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.950] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:08.956] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:11:08.962] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:11:08.968] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.974] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.979] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.985] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:08.991] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:08.997] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.003] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:09.009] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:11:09.014] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:11:09.021] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:11:09.026] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.032] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.038] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.044] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:09.050] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:11:09.056] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:11:09.062] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.068] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.074] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:09.080] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:11:09.086] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:11:09.092] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:11:09.100] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:11:09.106] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:11:09.112] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.118] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.124] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:11:09.130] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:11:09.167] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C0.dat
[14:11:09.168] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C1.dat
[14:11:09.168] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C2.dat
[14:11:09.168] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C3.dat
[14:11:09.168] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C4.dat
[14:11:09.168] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C5.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C6.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C7.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C8.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C9.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C10.dat
[14:11:09.169] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C11.dat
[14:11:09.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C12.dat
[14:11:09.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C13.dat
[14:11:09.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C14.dat
[14:11:09.170] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters35_C15.dat
[14:11:09.415] <TB3> INFO: Expecting 41600 events.
[14:11:12.546] <TB3> INFO: 41600 events read in total (2539ms).
[14:11:12.547] <TB3> INFO: Test took 3373ms.
[14:11:12.994] <TB3> INFO: Expecting 41600 events.
[14:11:16.074] <TB3> INFO: 41600 events read in total (2488ms).
[14:11:16.075] <TB3> INFO: Test took 3317ms.
[14:11:16.527] <TB3> INFO: Expecting 41600 events.
[14:11:19.664] <TB3> INFO: 41600 events read in total (2545ms).
[14:11:19.664] <TB3> INFO: Test took 3376ms.
[14:11:19.880] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:19.969] <TB3> INFO: Expecting 2560 events.
[14:11:20.861] <TB3> INFO: 2560 events read in total (300ms).
[14:11:20.861] <TB3> INFO: Test took 981ms.
[14:11:20.865] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:21.169] <TB3> INFO: Expecting 2560 events.
[14:11:22.054] <TB3> INFO: 2560 events read in total (293ms).
[14:11:22.054] <TB3> INFO: Test took 1189ms.
[14:11:22.058] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:22.362] <TB3> INFO: Expecting 2560 events.
[14:11:23.250] <TB3> INFO: 2560 events read in total (297ms).
[14:11:23.251] <TB3> INFO: Test took 1193ms.
[14:11:23.255] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:23.558] <TB3> INFO: Expecting 2560 events.
[14:11:24.449] <TB3> INFO: 2560 events read in total (299ms).
[14:11:24.450] <TB3> INFO: Test took 1195ms.
[14:11:24.452] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:24.757] <TB3> INFO: Expecting 2560 events.
[14:11:25.646] <TB3> INFO: 2560 events read in total (297ms).
[14:11:25.646] <TB3> INFO: Test took 1194ms.
[14:11:25.650] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:25.955] <TB3> INFO: Expecting 2560 events.
[14:11:26.845] <TB3> INFO: 2560 events read in total (299ms).
[14:11:26.845] <TB3> INFO: Test took 1195ms.
[14:11:26.847] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:27.168] <TB3> INFO: Expecting 2560 events.
[14:11:28.060] <TB3> INFO: 2560 events read in total (300ms).
[14:11:28.060] <TB3> INFO: Test took 1213ms.
[14:11:28.065] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:28.367] <TB3> INFO: Expecting 2560 events.
[14:11:29.252] <TB3> INFO: 2560 events read in total (293ms).
[14:11:29.252] <TB3> INFO: Test took 1187ms.
[14:11:29.254] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:29.560] <TB3> INFO: Expecting 2560 events.
[14:11:30.439] <TB3> INFO: 2560 events read in total (287ms).
[14:11:30.440] <TB3> INFO: Test took 1186ms.
[14:11:30.442] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:30.748] <TB3> INFO: Expecting 2560 events.
[14:11:31.631] <TB3> INFO: 2560 events read in total (291ms).
[14:11:31.631] <TB3> INFO: Test took 1189ms.
[14:11:31.634] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:31.940] <TB3> INFO: Expecting 2560 events.
[14:11:32.821] <TB3> INFO: 2560 events read in total (289ms).
[14:11:32.821] <TB3> INFO: Test took 1187ms.
[14:11:32.824] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:33.129] <TB3> INFO: Expecting 2560 events.
[14:11:34.014] <TB3> INFO: 2560 events read in total (293ms).
[14:11:34.015] <TB3> INFO: Test took 1191ms.
[14:11:34.019] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:34.323] <TB3> INFO: Expecting 2560 events.
[14:11:35.209] <TB3> INFO: 2560 events read in total (295ms).
[14:11:35.210] <TB3> INFO: Test took 1191ms.
[14:11:35.214] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:35.518] <TB3> INFO: Expecting 2560 events.
[14:11:36.405] <TB3> INFO: 2560 events read in total (295ms).
[14:11:36.410] <TB3> INFO: Test took 1196ms.
[14:11:36.412] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:36.713] <TB3> INFO: Expecting 2560 events.
[14:11:37.593] <TB3> INFO: 2560 events read in total (288ms).
[14:11:37.594] <TB3> INFO: Test took 1182ms.
[14:11:37.597] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:37.902] <TB3> INFO: Expecting 2560 events.
[14:11:38.784] <TB3> INFO: 2560 events read in total (290ms).
[14:11:38.785] <TB3> INFO: Test took 1188ms.
[14:11:38.788] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:39.092] <TB3> INFO: Expecting 2560 events.
[14:11:39.979] <TB3> INFO: 2560 events read in total (295ms).
[14:11:39.979] <TB3> INFO: Test took 1191ms.
[14:11:39.984] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:40.287] <TB3> INFO: Expecting 2560 events.
[14:11:41.176] <TB3> INFO: 2560 events read in total (297ms).
[14:11:41.176] <TB3> INFO: Test took 1192ms.
[14:11:41.179] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:41.484] <TB3> INFO: Expecting 2560 events.
[14:11:42.372] <TB3> INFO: 2560 events read in total (296ms).
[14:11:42.372] <TB3> INFO: Test took 1193ms.
[14:11:42.377] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:42.681] <TB3> INFO: Expecting 2560 events.
[14:11:43.565] <TB3> INFO: 2560 events read in total (292ms).
[14:11:43.565] <TB3> INFO: Test took 1188ms.
[14:11:43.567] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:43.874] <TB3> INFO: Expecting 2560 events.
[14:11:44.762] <TB3> INFO: 2560 events read in total (296ms).
[14:11:44.763] <TB3> INFO: Test took 1196ms.
[14:11:44.766] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:45.070] <TB3> INFO: Expecting 2560 events.
[14:11:45.954] <TB3> INFO: 2560 events read in total (292ms).
[14:11:45.954] <TB3> INFO: Test took 1188ms.
[14:11:45.958] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:46.262] <TB3> INFO: Expecting 2560 events.
[14:11:47.149] <TB3> INFO: 2560 events read in total (295ms).
[14:11:47.149] <TB3> INFO: Test took 1191ms.
[14:11:47.154] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:47.457] <TB3> INFO: Expecting 2560 events.
[14:11:48.340] <TB3> INFO: 2560 events read in total (291ms).
[14:11:48.341] <TB3> INFO: Test took 1187ms.
[14:11:48.344] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:48.648] <TB3> INFO: Expecting 2560 events.
[14:11:49.542] <TB3> INFO: 2560 events read in total (297ms).
[14:11:49.542] <TB3> INFO: Test took 1198ms.
[14:11:49.545] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:49.851] <TB3> INFO: Expecting 2560 events.
[14:11:50.735] <TB3> INFO: 2560 events read in total (292ms).
[14:11:50.735] <TB3> INFO: Test took 1190ms.
[14:11:50.737] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:51.044] <TB3> INFO: Expecting 2560 events.
[14:11:51.932] <TB3> INFO: 2560 events read in total (296ms).
[14:11:51.932] <TB3> INFO: Test took 1195ms.
[14:11:51.935] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:52.242] <TB3> INFO: Expecting 2560 events.
[14:11:53.127] <TB3> INFO: 2560 events read in total (294ms).
[14:11:53.128] <TB3> INFO: Test took 1193ms.
[14:11:53.132] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:53.436] <TB3> INFO: Expecting 2560 events.
[14:11:54.323] <TB3> INFO: 2560 events read in total (295ms).
[14:11:54.323] <TB3> INFO: Test took 1191ms.
[14:11:54.326] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:54.632] <TB3> INFO: Expecting 2560 events.
[14:11:55.526] <TB3> INFO: 2560 events read in total (303ms).
[14:11:55.526] <TB3> INFO: Test took 1200ms.
[14:11:55.531] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:55.834] <TB3> INFO: Expecting 2560 events.
[14:11:56.726] <TB3> INFO: 2560 events read in total (301ms).
[14:11:56.727] <TB3> INFO: Test took 1196ms.
[14:11:56.729] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:57.036] <TB3> INFO: Expecting 2560 events.
[14:11:57.929] <TB3> INFO: 2560 events read in total (302ms).
[14:11:57.929] <TB3> INFO: Test took 1200ms.
[14:11:58.397] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 645 seconds
[14:11:58.397] <TB3> INFO: PH scale (per ROC): 46 39 45 47 43 41 48 45 39 37 40 37 38 56 35 36
[14:11:58.397] <TB3> INFO: PH offset (per ROC): 102 80 107 103 108 86 126 109 109 91 117 100 95 123 108 106
[14:11:58.406] <TB3> INFO: Decoding statistics:
[14:11:58.406] <TB3> INFO: General information:
[14:11:58.406] <TB3> INFO: 16bit words read: 127884
[14:11:58.406] <TB3> INFO: valid events total: 20480
[14:11:58.406] <TB3> INFO: empty events: 17978
[14:11:58.406] <TB3> INFO: valid events with pixels: 2502
[14:11:58.406] <TB3> INFO: valid pixel hits: 2502
[14:11:58.406] <TB3> INFO: Event errors: 0
[14:11:58.406] <TB3> INFO: start marker: 0
[14:11:58.406] <TB3> INFO: stop marker: 0
[14:11:58.406] <TB3> INFO: overflow: 0
[14:11:58.406] <TB3> INFO: invalid 5bit words: 0
[14:11:58.406] <TB3> INFO: invalid XOR eye diagram: 0
[14:11:58.406] <TB3> INFO: frame (failed synchr.): 0
[14:11:58.406] <TB3> INFO: idle data (no TBM trl): 0
[14:11:58.406] <TB3> INFO: no data (only TBM hdr): 0
[14:11:58.406] <TB3> INFO: TBM errors: 0
[14:11:58.406] <TB3> INFO: flawed TBM headers: 0
[14:11:58.406] <TB3> INFO: flawed TBM trailers: 0
[14:11:58.406] <TB3> INFO: event ID mismatches: 0
[14:11:58.406] <TB3> INFO: ROC errors: 0
[14:11:58.406] <TB3> INFO: missing ROC header(s): 0
[14:11:58.406] <TB3> INFO: misplaced readback start: 0
[14:11:58.406] <TB3> INFO: Pixel decoding errors: 0
[14:11:58.406] <TB3> INFO: pixel data incomplete: 0
[14:11:58.406] <TB3> INFO: pixel address: 0
[14:11:58.406] <TB3> INFO: pulse height fill bit: 0
[14:11:58.406] <TB3> INFO: buffer corruption: 0
[14:11:58.572] <TB3> INFO: ######################################################################
[14:11:58.572] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:11:58.572] <TB3> INFO: ######################################################################
[14:11:58.586] <TB3> INFO: scanning low vcal = 10
[14:11:58.835] <TB3> INFO: Expecting 41600 events.
[14:12:02.445] <TB3> INFO: 41600 events read in total (3019ms).
[14:12:02.445] <TB3> INFO: Test took 3859ms.
[14:12:02.448] <TB3> INFO: scanning low vcal = 20
[14:12:02.742] <TB3> INFO: Expecting 41600 events.
[14:12:06.350] <TB3> INFO: 41600 events read in total (3016ms).
[14:12:06.351] <TB3> INFO: Test took 3903ms.
[14:12:06.352] <TB3> INFO: scanning low vcal = 30
[14:12:06.646] <TB3> INFO: Expecting 41600 events.
[14:12:10.308] <TB3> INFO: 41600 events read in total (3070ms).
[14:12:10.309] <TB3> INFO: Test took 3957ms.
[14:12:10.312] <TB3> INFO: scanning low vcal = 40
[14:12:10.589] <TB3> INFO: Expecting 41600 events.
[14:12:14.533] <TB3> INFO: 41600 events read in total (3352ms).
[14:12:14.535] <TB3> INFO: Test took 4223ms.
[14:12:14.538] <TB3> INFO: scanning low vcal = 50
[14:12:14.815] <TB3> INFO: Expecting 41600 events.
[14:12:18.844] <TB3> INFO: 41600 events read in total (3437ms).
[14:12:18.845] <TB3> INFO: Test took 4307ms.
[14:12:18.849] <TB3> INFO: scanning low vcal = 60
[14:12:19.125] <TB3> INFO: Expecting 41600 events.
[14:12:23.113] <TB3> INFO: 41600 events read in total (3396ms).
[14:12:23.114] <TB3> INFO: Test took 4265ms.
[14:12:23.117] <TB3> INFO: scanning low vcal = 70
[14:12:23.395] <TB3> INFO: Expecting 41600 events.
[14:12:27.405] <TB3> INFO: 41600 events read in total (3419ms).
[14:12:27.406] <TB3> INFO: Test took 4289ms.
[14:12:27.410] <TB3> INFO: scanning low vcal = 80
[14:12:27.686] <TB3> INFO: Expecting 41600 events.
[14:12:31.722] <TB3> INFO: 41600 events read in total (3444ms).
[14:12:31.723] <TB3> INFO: Test took 4313ms.
[14:12:31.727] <TB3> INFO: scanning low vcal = 90
[14:12:32.004] <TB3> INFO: Expecting 41600 events.
[14:12:35.994] <TB3> INFO: 41600 events read in total (3399ms).
[14:12:35.994] <TB3> INFO: Test took 4267ms.
[14:12:35.998] <TB3> INFO: scanning low vcal = 100
[14:12:36.274] <TB3> INFO: Expecting 41600 events.
[14:12:40.299] <TB3> INFO: 41600 events read in total (3433ms).
[14:12:40.300] <TB3> INFO: Test took 4301ms.
[14:12:40.303] <TB3> INFO: scanning low vcal = 110
[14:12:40.580] <TB3> INFO: Expecting 41600 events.
[14:12:44.586] <TB3> INFO: 41600 events read in total (3414ms).
[14:12:44.586] <TB3> INFO: Test took 4283ms.
[14:12:44.590] <TB3> INFO: scanning low vcal = 120
[14:12:44.867] <TB3> INFO: Expecting 41600 events.
[14:12:48.877] <TB3> INFO: 41600 events read in total (3418ms).
[14:12:48.877] <TB3> INFO: Test took 4287ms.
[14:12:48.881] <TB3> INFO: scanning low vcal = 130
[14:12:49.158] <TB3> INFO: Expecting 41600 events.
[14:12:53.226] <TB3> INFO: 41600 events read in total (3476ms).
[14:12:53.227] <TB3> INFO: Test took 4346ms.
[14:12:53.230] <TB3> INFO: scanning low vcal = 140
[14:12:53.508] <TB3> INFO: Expecting 41600 events.
[14:12:57.510] <TB3> INFO: 41600 events read in total (3411ms).
[14:12:57.512] <TB3> INFO: Test took 4282ms.
[14:12:57.515] <TB3> INFO: scanning low vcal = 150
[14:12:57.793] <TB3> INFO: Expecting 41600 events.
[14:13:01.809] <TB3> INFO: 41600 events read in total (3425ms).
[14:13:01.810] <TB3> INFO: Test took 4295ms.
[14:13:01.813] <TB3> INFO: scanning low vcal = 160
[14:13:02.091] <TB3> INFO: Expecting 41600 events.
[14:13:06.114] <TB3> INFO: 41600 events read in total (3431ms).
[14:13:06.115] <TB3> INFO: Test took 4302ms.
[14:13:06.120] <TB3> INFO: scanning low vcal = 170
[14:13:06.403] <TB3> INFO: Expecting 41600 events.
[14:13:10.417] <TB3> INFO: 41600 events read in total (3422ms).
[14:13:10.418] <TB3> INFO: Test took 4298ms.
[14:13:10.423] <TB3> INFO: scanning low vcal = 180
[14:13:10.698] <TB3> INFO: Expecting 41600 events.
[14:13:14.716] <TB3> INFO: 41600 events read in total (3426ms).
[14:13:14.717] <TB3> INFO: Test took 4294ms.
[14:13:14.721] <TB3> INFO: scanning low vcal = 190
[14:13:14.998] <TB3> INFO: Expecting 41600 events.
[14:13:18.991] <TB3> INFO: 41600 events read in total (3401ms).
[14:13:18.992] <TB3> INFO: Test took 4271ms.
[14:13:18.995] <TB3> INFO: scanning low vcal = 200
[14:13:19.273] <TB3> INFO: Expecting 41600 events.
[14:13:23.301] <TB3> INFO: 41600 events read in total (3437ms).
[14:13:23.301] <TB3> INFO: Test took 4305ms.
[14:13:23.306] <TB3> INFO: scanning low vcal = 210
[14:13:23.582] <TB3> INFO: Expecting 41600 events.
[14:13:27.620] <TB3> INFO: 41600 events read in total (3446ms).
[14:13:27.621] <TB3> INFO: Test took 4315ms.
[14:13:27.624] <TB3> INFO: scanning low vcal = 220
[14:13:27.901] <TB3> INFO: Expecting 41600 events.
[14:13:31.894] <TB3> INFO: 41600 events read in total (3401ms).
[14:13:31.895] <TB3> INFO: Test took 4271ms.
[14:13:31.898] <TB3> INFO: scanning low vcal = 230
[14:13:32.180] <TB3> INFO: Expecting 41600 events.
[14:13:36.163] <TB3> INFO: 41600 events read in total (3391ms).
[14:13:36.164] <TB3> INFO: Test took 4266ms.
[14:13:36.167] <TB3> INFO: scanning low vcal = 240
[14:13:36.445] <TB3> INFO: Expecting 41600 events.
[14:13:40.421] <TB3> INFO: 41600 events read in total (3384ms).
[14:13:40.422] <TB3> INFO: Test took 4255ms.
[14:13:40.425] <TB3> INFO: scanning low vcal = 250
[14:13:40.702] <TB3> INFO: Expecting 41600 events.
[14:13:44.740] <TB3> INFO: 41600 events read in total (3446ms).
[14:13:44.741] <TB3> INFO: Test took 4315ms.
[14:13:44.745] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:13:45.022] <TB3> INFO: Expecting 41600 events.
[14:13:49.025] <TB3> INFO: 41600 events read in total (3411ms).
[14:13:49.025] <TB3> INFO: Test took 4280ms.
[14:13:49.030] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:13:49.306] <TB3> INFO: Expecting 41600 events.
[14:13:53.323] <TB3> INFO: 41600 events read in total (3425ms).
[14:13:53.324] <TB3> INFO: Test took 4294ms.
[14:13:53.327] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:13:53.604] <TB3> INFO: Expecting 41600 events.
[14:13:57.600] <TB3> INFO: 41600 events read in total (3404ms).
[14:13:57.601] <TB3> INFO: Test took 4274ms.
[14:13:57.604] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:13:57.880] <TB3> INFO: Expecting 41600 events.
[14:14:01.896] <TB3> INFO: 41600 events read in total (3424ms).
[14:14:01.897] <TB3> INFO: Test took 4293ms.
[14:14:01.900] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:14:02.185] <TB3> INFO: Expecting 41600 events.
[14:14:06.229] <TB3> INFO: 41600 events read in total (3452ms).
[14:14:06.230] <TB3> INFO: Test took 4330ms.
[14:14:06.835] <TB3> INFO: PixTestGainPedestal::measure() done
[14:14:40.267] <TB3> INFO: PixTestGainPedestal::fit() done
[14:14:40.267] <TB3> INFO: non-linearity mean: 0.920 0.921 0.945 0.958 0.939 0.952 0.979 0.922 0.924 0.918 0.924 0.930 1.021 0.978 0.910 0.916
[14:14:40.267] <TB3> INFO: non-linearity RMS: 0.101 0.107 0.066 0.018 0.082 0.035 0.004 0.127 0.139 0.141 0.101 0.072 0.162 0.005 0.089 0.116
[14:14:40.267] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[14:14:40.282] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[14:14:40.295] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[14:14:40.308] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[14:14:40.321] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[14:14:40.334] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[14:14:40.347] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[14:14:40.359] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[14:14:40.372] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[14:14:40.385] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[14:14:40.398] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[14:14:40.412] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[14:14:40.425] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[14:14:40.438] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[14:14:40.450] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[14:14:40.463] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[14:14:40.476] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[14:14:40.476] <TB3> INFO: Decoding statistics:
[14:14:40.476] <TB3> INFO: General information:
[14:14:40.476] <TB3> INFO: 16bit words read: 3309158
[14:14:40.476] <TB3> INFO: valid events total: 332800
[14:14:40.476] <TB3> INFO: empty events: 894
[14:14:40.476] <TB3> INFO: valid events with pixels: 331906
[14:14:40.476] <TB3> INFO: valid pixel hits: 656179
[14:14:40.476] <TB3> INFO: Event errors: 0
[14:14:40.476] <TB3> INFO: start marker: 0
[14:14:40.476] <TB3> INFO: stop marker: 0
[14:14:40.476] <TB3> INFO: overflow: 0
[14:14:40.476] <TB3> INFO: invalid 5bit words: 0
[14:14:40.476] <TB3> INFO: invalid XOR eye diagram: 0
[14:14:40.476] <TB3> INFO: frame (failed synchr.): 0
[14:14:40.476] <TB3> INFO: idle data (no TBM trl): 0
[14:14:40.476] <TB3> INFO: no data (only TBM hdr): 0
[14:14:40.476] <TB3> INFO: TBM errors: 0
[14:14:40.476] <TB3> INFO: flawed TBM headers: 0
[14:14:40.476] <TB3> INFO: flawed TBM trailers: 0
[14:14:40.476] <TB3> INFO: event ID mismatches: 0
[14:14:40.476] <TB3> INFO: ROC errors: 0
[14:14:40.476] <TB3> INFO: missing ROC header(s): 0
[14:14:40.476] <TB3> INFO: misplaced readback start: 0
[14:14:40.476] <TB3> INFO: Pixel decoding errors: 0
[14:14:40.476] <TB3> INFO: pixel data incomplete: 0
[14:14:40.476] <TB3> INFO: pixel address: 0
[14:14:40.476] <TB3> INFO: pulse height fill bit: 0
[14:14:40.476] <TB3> INFO: buffer corruption: 0
[14:14:40.493] <TB3> INFO: Decoding statistics:
[14:14:40.493] <TB3> INFO: General information:
[14:14:40.493] <TB3> INFO: 16bit words read: 3438578
[14:14:40.493] <TB3> INFO: valid events total: 353536
[14:14:40.493] <TB3> INFO: empty events: 19128
[14:14:40.493] <TB3> INFO: valid events with pixels: 334408
[14:14:40.493] <TB3> INFO: valid pixel hits: 658681
[14:14:40.493] <TB3> INFO: Event errors: 0
[14:14:40.493] <TB3> INFO: start marker: 0
[14:14:40.493] <TB3> INFO: stop marker: 0
[14:14:40.493] <TB3> INFO: overflow: 0
[14:14:40.493] <TB3> INFO: invalid 5bit words: 0
[14:14:40.493] <TB3> INFO: invalid XOR eye diagram: 0
[14:14:40.493] <TB3> INFO: frame (failed synchr.): 0
[14:14:40.493] <TB3> INFO: idle data (no TBM trl): 0
[14:14:40.493] <TB3> INFO: no data (only TBM hdr): 0
[14:14:40.493] <TB3> INFO: TBM errors: 0
[14:14:40.493] <TB3> INFO: flawed TBM headers: 0
[14:14:40.493] <TB3> INFO: flawed TBM trailers: 0
[14:14:40.493] <TB3> INFO: event ID mismatches: 0
[14:14:40.493] <TB3> INFO: ROC errors: 0
[14:14:40.493] <TB3> INFO: missing ROC header(s): 0
[14:14:40.493] <TB3> INFO: misplaced readback start: 0
[14:14:40.493] <TB3> INFO: Pixel decoding errors: 0
[14:14:40.493] <TB3> INFO: pixel data incomplete: 0
[14:14:40.493] <TB3> INFO: pixel address: 0
[14:14:40.493] <TB3> INFO: pulse height fill bit: 0
[14:14:40.493] <TB3> INFO: buffer corruption: 0
[14:14:40.493] <TB3> INFO: enter test to run
[14:14:40.493] <TB3> INFO: test: trim80 no parameter change
[14:14:40.493] <TB3> INFO: running: trim80
[14:14:40.494] <TB3> INFO: ######################################################################
[14:14:40.494] <TB3> INFO: PixTestTrim80::doTest()
[14:14:40.494] <TB3> INFO: ######################################################################
[14:14:40.496] <TB3> INFO: ----------------------------------------------------------------------
[14:14:40.496] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[14:14:40.496] <TB3> INFO: ----------------------------------------------------------------------
[14:14:40.559] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:14:40.559] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:14:40.571] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:14:40.571] <TB3> INFO: run 1 of 1
[14:14:40.807] <TB3> INFO: Expecting 5025280 events.
[14:15:08.976] <TB3> INFO: 677896 events read in total (27577ms).
[14:15:36.071] <TB3> INFO: 1350448 events read in total (54672ms).
[14:16:04.168] <TB3> INFO: 2021464 events read in total (82769ms).
[14:16:31.589] <TB3> INFO: 2690864 events read in total (110190ms).
[14:16:58.985] <TB3> INFO: 3358192 events read in total (137586ms).
[14:17:26.397] <TB3> INFO: 4023856 events read in total (164998ms).
[14:17:53.962] <TB3> INFO: 4689032 events read in total (192563ms).
[14:18:07.831] <TB3> INFO: 5025280 events read in total (206432ms).
[14:18:07.909] <TB3> INFO: Test took 207338ms.
[14:18:30.342] <TB3> INFO: ROC 0 VthrComp = 76
[14:18:30.342] <TB3> INFO: ROC 1 VthrComp = 76
[14:18:30.343] <TB3> INFO: ROC 2 VthrComp = 72
[14:18:30.343] <TB3> INFO: ROC 3 VthrComp = 77
[14:18:30.343] <TB3> INFO: ROC 4 VthrComp = 77
[14:18:30.343] <TB3> INFO: ROC 5 VthrComp = 87
[14:18:30.343] <TB3> INFO: ROC 6 VthrComp = 73
[14:18:30.343] <TB3> INFO: ROC 7 VthrComp = 81
[14:18:30.343] <TB3> INFO: ROC 8 VthrComp = 82
[14:18:30.343] <TB3> INFO: ROC 9 VthrComp = 78
[14:18:30.343] <TB3> INFO: ROC 10 VthrComp = 81
[14:18:30.343] <TB3> INFO: ROC 11 VthrComp = 82
[14:18:30.344] <TB3> INFO: ROC 12 VthrComp = 70
[14:18:30.344] <TB3> INFO: ROC 13 VthrComp = 73
[14:18:30.344] <TB3> INFO: ROC 14 VthrComp = 76
[14:18:30.344] <TB3> INFO: ROC 15 VthrComp = 80
[14:18:30.586] <TB3> INFO: Expecting 41600 events.
[14:18:34.119] <TB3> INFO: 41600 events read in total (2941ms).
[14:18:34.120] <TB3> INFO: Test took 3774ms.
[14:18:34.130] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:18:34.130] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[14:18:34.142] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:18:34.142] <TB3> INFO: run 1 of 1
[14:18:34.420] <TB3> INFO: Expecting 5025280 events.
[14:19:02.747] <TB3> INFO: 688448 events read in total (27736ms).
[14:19:30.151] <TB3> INFO: 1372832 events read in total (55140ms).
[14:19:57.519] <TB3> INFO: 2057184 events read in total (82508ms).
[14:20:25.296] <TB3> INFO: 2737624 events read in total (110285ms).
[14:20:52.767] <TB3> INFO: 3413832 events read in total (137756ms).
[14:21:20.213] <TB3> INFO: 4087664 events read in total (165202ms).
[14:21:47.861] <TB3> INFO: 4759328 events read in total (192850ms).
[14:21:58.879] <TB3> INFO: 5025280 events read in total (203868ms).
[14:21:58.976] <TB3> INFO: Test took 204834ms.
[14:22:21.847] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 107.995 for pixel 13/79 mean/min/max = 93.3785/78.6619/108.095
[14:22:21.848] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 111.51 for pixel 0/35 mean/min/max = 94.7093/77.7536/111.665
[14:22:21.848] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 107.493 for pixel 4/52 mean/min/max = 92.3373/77.0109/107.664
[14:22:21.849] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 111.216 for pixel 0/78 mean/min/max = 94.3643/77.4327/111.296
[14:22:21.849] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 109.051 for pixel 51/79 mean/min/max = 93.9833/78.7184/109.248
[14:22:21.850] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 105.677 for pixel 12/78 mean/min/max = 90.0525/74.3987/105.706
[14:22:21.850] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 109.209 for pixel 13/74 mean/min/max = 93.3951/77.5315/109.259
[14:22:21.851] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 107.688 for pixel 18/1 mean/min/max = 91.3347/74.9426/107.727
[14:22:21.851] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 108.007 for pixel 0/20 mean/min/max = 91.7966/75.5149/108.078
[14:22:21.852] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 111.439 for pixel 15/74 mean/min/max = 94.3922/77.3298/111.455
[14:22:21.852] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 108.767 for pixel 3/79 mean/min/max = 91.9999/75.1291/108.871
[14:22:21.853] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 108.157 for pixel 0/64 mean/min/max = 91.5259/74.8009/108.251
[14:22:21.854] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 115.003 for pixel 0/45 mean/min/max = 94.2061/73.2735/115.139
[14:22:21.854] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 104.664 for pixel 18/57 mean/min/max = 90.9098/77.1529/104.667
[14:22:21.855] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 109.763 for pixel 0/76 mean/min/max = 93.6814/77.3546/110.008
[14:22:21.855] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 107.01 for pixel 12/73 mean/min/max = 91.4614/75.8774/107.045
[14:22:21.856] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:22:21.944] <TB3> INFO: Expecting 411648 events.
[14:22:31.479] <TB3> INFO: 411648 events read in total (8943ms).
[14:22:31.486] <TB3> INFO: Expecting 411648 events.
[14:22:40.767] <TB3> INFO: 411648 events read in total (8878ms).
[14:22:40.782] <TB3> INFO: Expecting 411648 events.
[14:22:50.041] <TB3> INFO: 411648 events read in total (8856ms).
[14:22:50.056] <TB3> INFO: Expecting 411648 events.
[14:22:59.364] <TB3> INFO: 411648 events read in total (8905ms).
[14:22:59.385] <TB3> INFO: Expecting 411648 events.
[14:23:08.700] <TB3> INFO: 411648 events read in total (8912ms).
[14:23:08.720] <TB3> INFO: Expecting 411648 events.
[14:23:18.111] <TB3> INFO: 411648 events read in total (8988ms).
[14:23:18.135] <TB3> INFO: Expecting 411648 events.
[14:23:27.520] <TB3> INFO: 411648 events read in total (8982ms).
[14:23:27.544] <TB3> INFO: Expecting 411648 events.
[14:23:36.806] <TB3> INFO: 411648 events read in total (8859ms).
[14:23:36.834] <TB3> INFO: Expecting 411648 events.
[14:23:46.140] <TB3> INFO: 411648 events read in total (8903ms).
[14:23:46.185] <TB3> INFO: Expecting 411648 events.
[14:23:55.474] <TB3> INFO: 411648 events read in total (8880ms).
[14:23:55.518] <TB3> INFO: Expecting 411648 events.
[14:24:04.954] <TB3> INFO: 411648 events read in total (9033ms).
[14:24:05.008] <TB3> INFO: Expecting 411648 events.
[14:24:14.494] <TB3> INFO: 411648 events read in total (9084ms).
[14:24:14.546] <TB3> INFO: Expecting 411648 events.
[14:24:24.099] <TB3> INFO: 411648 events read in total (9150ms).
[14:24:24.171] <TB3> INFO: Expecting 411648 events.
[14:24:33.686] <TB3> INFO: 411648 events read in total (9113ms).
[14:24:33.750] <TB3> INFO: Expecting 411648 events.
[14:24:43.214] <TB3> INFO: 411648 events read in total (9061ms).
[14:24:43.300] <TB3> INFO: Expecting 411648 events.
[14:24:52.792] <TB3> INFO: 411648 events read in total (9089ms).
[14:24:52.868] <TB3> INFO: Test took 151012ms.
[14:24:54.266] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[14:24:54.280] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:24:54.280] <TB3> INFO: run 1 of 1
[14:24:54.516] <TB3> INFO: Expecting 5025280 events.
[14:25:22.309] <TB3> INFO: 671536 events read in total (27201ms).
[14:25:49.488] <TB3> INFO: 1339696 events read in total (54380ms).
[14:26:16.569] <TB3> INFO: 2007808 events read in total (81461ms).
[14:26:43.557] <TB3> INFO: 2672728 events read in total (108449ms).
[14:27:10.897] <TB3> INFO: 3333672 events read in total (135789ms).
[14:27:38.099] <TB3> INFO: 3992928 events read in total (162991ms).
[14:28:05.072] <TB3> INFO: 4650152 events read in total (189964ms).
[14:28:20.705] <TB3> INFO: 5025280 events read in total (205597ms).
[14:28:20.789] <TB3> INFO: Test took 206510ms.
[14:28:42.028] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 52.781896 .. 103.070183
[14:28:42.267] <TB3> INFO: Expecting 208000 events.
[14:28:51.967] <TB3> INFO: 208000 events read in total (9108ms).
[14:28:51.968] <TB3> INFO: Test took 9937ms.
[14:28:52.038] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 113 (-1/-1) hits flags = 528 (plus default)
[14:28:52.052] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:28:52.052] <TB3> INFO: run 1 of 1
[14:28:52.330] <TB3> INFO: Expecting 2396160 events.
[14:29:20.757] <TB3> INFO: 683400 events read in total (27835ms).
[14:29:48.705] <TB3> INFO: 1367000 events read in total (55783ms).
[14:30:17.252] <TB3> INFO: 2043656 events read in total (84330ms).
[14:30:31.961] <TB3> INFO: 2396160 events read in total (99039ms).
[14:30:32.010] <TB3> INFO: Test took 99958ms.
[14:30:49.619] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 60.695530 .. 91.399512
[14:30:49.858] <TB3> INFO: Expecting 208000 events.
[14:30:59.521] <TB3> INFO: 208000 events read in total (9071ms).
[14:30:59.522] <TB3> INFO: Test took 9902ms.
[14:30:59.571] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 50 .. 101 (-1/-1) hits flags = 528 (plus default)
[14:30:59.588] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:30:59.588] <TB3> INFO: run 1 of 1
[14:30:59.866] <TB3> INFO: Expecting 1730560 events.
[14:31:28.576] <TB3> INFO: 699800 events read in total (28118ms).
[14:31:57.314] <TB3> INFO: 1398240 events read in total (56856ms).
[14:32:11.111] <TB3> INFO: 1730560 events read in total (70653ms).
[14:32:11.155] <TB3> INFO: Test took 71568ms.
[14:32:29.102] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 64.114029 .. 88.113427
[14:32:29.386] <TB3> INFO: Expecting 208000 events.
[14:32:39.180] <TB3> INFO: 208000 events read in total (9203ms).
[14:32:39.181] <TB3> INFO: Test took 10078ms.
[14:32:39.229] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 54 .. 98 (-1/-1) hits flags = 528 (plus default)
[14:32:39.242] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:32:39.242] <TB3> INFO: run 1 of 1
[14:32:39.521] <TB3> INFO: Expecting 1497600 events.
[14:33:08.107] <TB3> INFO: 700432 events read in total (27994ms).
[14:33:36.728] <TB3> INFO: 1399864 events read in total (56615ms).
[14:33:41.185] <TB3> INFO: 1497600 events read in total (61072ms).
[14:33:41.218] <TB3> INFO: Test took 61977ms.
[14:33:57.106] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 66.709628 .. 88.113427
[14:33:57.347] <TB3> INFO: Expecting 208000 events.
[14:34:07.419] <TB3> INFO: 208000 events read in total (9480ms).
[14:34:07.420] <TB3> INFO: Test took 10313ms.
[14:34:07.468] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 56 .. 98 (-1/-1) hits flags = 528 (plus default)
[14:34:07.481] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:34:07.481] <TB3> INFO: run 1 of 1
[14:34:07.759] <TB3> INFO: Expecting 1431040 events.
[14:34:36.833] <TB3> INFO: 694264 events read in total (28482ms).
[14:35:05.370] <TB3> INFO: 1388160 events read in total (57019ms).
[14:35:07.507] <TB3> INFO: 1431040 events read in total (59157ms).
[14:35:07.543] <TB3> INFO: Test took 60063ms.
[14:35:26.026] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[14:35:26.026] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[14:35:26.041] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[14:35:26.042] <TB3> INFO: run 1 of 1
[14:35:26.277] <TB3> INFO: Expecting 1364480 events.
[14:35:54.000] <TB3> INFO: 669064 events read in total (28131ms).
[14:36:22.768] <TB3> INFO: 1337696 events read in total (55900ms).
[14:36:24.368] <TB3> INFO: 1364480 events read in total (57499ms).
[14:36:24.402] <TB3> INFO: Test took 58360ms.
[14:36:40.099] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C0.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C1.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C2.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C3.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C4.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C5.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C6.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C7.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C8.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C9.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C10.dat
[14:36:40.100] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C11.dat
[14:36:40.101] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C12.dat
[14:36:40.101] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C13.dat
[14:36:40.101] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C14.dat
[14:36:40.101] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//dacParameters80_C15.dat
[14:36:40.101] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C0.dat
[14:36:40.108] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C1.dat
[14:36:40.114] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C2.dat
[14:36:40.120] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C3.dat
[14:36:40.126] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C4.dat
[14:36:40.133] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C5.dat
[14:36:40.139] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C6.dat
[14:36:40.146] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C7.dat
[14:36:40.152] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C8.dat
[14:36:40.159] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C9.dat
[14:36:40.165] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C10.dat
[14:36:40.171] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C11.dat
[14:36:40.178] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C12.dat
[14:36:40.185] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C13.dat
[14:36:40.191] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C14.dat
[14:36:40.198] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1090_FullQualification_2016-10-31_10h24m_1477905852//003_FulltestTrim80_p17//trimParameters80_C15.dat
[14:36:40.205] <TB3> INFO: PixTestTrim80::trimTest() done
[14:36:40.205] <TB3> INFO: vtrim: 97 119 104 105 112 89 104 100 106 109 96 94 125 88 104 108
[14:36:40.205] <TB3> INFO: vthrcomp: 76 76 72 77 77 87 73 81 82 78 81 82 70 73 76 80
[14:36:40.205] <TB3> INFO: vcal mean: 80.02 80.04 80.04 80.05 79.99 79.99 80.02 79.99 79.99 80.06 80.04 80.00 80.00 80.01 80.03 80.07
[14:36:40.205] <TB3> INFO: vcal RMS: 0.68 0.76 0.72 0.73 0.71 0.76 0.72 0.76 0.74 0.74 0.71 0.71 0.81 0.72 0.72 0.71
[14:36:40.205] <TB3> INFO: bits mean: 8.91 9.11 9.59 8.92 9.29 10.18 9.29 9.97 9.51 9.22 9.51 9.68 9.78 9.85 8.48 9.77
[14:36:40.205] <TB3> INFO: bits RMS: 2.35 2.36 2.33 2.49 2.16 2.47 2.32 2.42 2.57 2.32 2.64 2.58 2.63 2.21 2.67 2.41
[14:36:40.212] <TB3> INFO: ----------------------------------------------------------------------
[14:36:40.212] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[14:36:40.212] <TB3> INFO: ----------------------------------------------------------------------
[14:36:40.215] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[14:36:40.227] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:36:40.227] <TB3> INFO: run 1 of 1
[14:36:40.466] <TB3> INFO: Expecting 4160000 events.
[14:37:13.039] <TB3> INFO: 770350 events read in total (31981ms).
[14:37:44.002] <TB3> INFO: 1530200 events read in total (63944ms).
[14:38:16.953] <TB3> INFO: 2283830 events read in total (95895ms).
[14:38:49.121] <TB3> INFO: 3032440 events read in total (128063ms).
[14:39:21.281] <TB3> INFO: 3777470 events read in total (160223ms).
[14:39:37.794] <TB3> INFO: 4160000 events read in total (176736ms).
[14:39:37.874] <TB3> INFO: Test took 177647ms.
[14:40:00.582] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[14:40:00.596] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:40:00.596] <TB3> INFO: run 1 of 1
[14:40:00.834] <TB3> INFO: Expecting 4264000 events.
[14:40:33.179] <TB3> INFO: 738295 events read in total (31754ms).
[14:41:05.026] <TB3> INFO: 1468755 events read in total (63601ms).
[14:41:36.932] <TB3> INFO: 2194630 events read in total (95507ms).
[14:42:08.354] <TB3> INFO: 2914925 events read in total (126929ms).
[14:42:39.207] <TB3> INFO: 3632250 events read in total (157782ms).
[14:43:06.964] <TB3> INFO: 4264000 events read in total (185539ms).
[14:43:07.062] <TB3> INFO: Test took 186465ms.
[14:43:33.329] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[14:43:33.344] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:43:33.344] <TB3> INFO: run 1 of 1
[14:43:33.607] <TB3> INFO: Expecting 4243200 events.
[14:44:05.893] <TB3> INFO: 740080 events read in total (31694ms).
[14:44:37.313] <TB3> INFO: 1472320 events read in total (63114ms).
[14:45:08.738] <TB3> INFO: 2199415 events read in total (94539ms).
[14:45:40.823] <TB3> INFO: 2921115 events read in total (126624ms).
[14:46:11.779] <TB3> INFO: 3640130 events read in total (157581ms).
[14:46:38.080] <TB3> INFO: 4243200 events read in total (183881ms).
[14:46:38.162] <TB3> INFO: Test took 184818ms.
[14:47:03.464] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[14:47:03.477] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:47:03.477] <TB3> INFO: run 1 of 1
[14:47:03.741] <TB3> INFO: Expecting 4264000 events.
[14:47:35.936] <TB3> INFO: 739345 events read in total (31603ms).
[14:48:07.121] <TB3> INFO: 1469980 events read in total (62788ms).
[14:48:38.389] <TB3> INFO: 2195970 events read in total (94056ms).
[14:49:10.582] <TB3> INFO: 2917375 events read in total (126249ms).
[14:49:41.958] <TB3> INFO: 3635370 events read in total (157625ms).
[14:50:09.643] <TB3> INFO: 4264000 events read in total (185310ms).
[14:50:09.722] <TB3> INFO: Test took 186245ms.
[14:50:34.733] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[14:50:34.746] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:50:34.746] <TB3> INFO: run 1 of 1
[14:50:34.989] <TB3> INFO: Expecting 4222400 events.
[14:51:07.371] <TB3> INFO: 741990 events read in total (31791ms).
[14:51:39.094] <TB3> INFO: 1475235 events read in total (63514ms).
[14:52:10.807] <TB3> INFO: 2203330 events read in total (95227ms).
[14:52:43.047] <TB3> INFO: 2927185 events read in total (127467ms).
[14:53:13.907] <TB3> INFO: 3647135 events read in total (158327ms).
[14:53:39.052] <TB3> INFO: 4222400 events read in total (183472ms).
[14:53:39.134] <TB3> INFO: Test took 184388ms.
[14:54:05.658] <TB3> INFO: PixTestTrim80::trimBitTest() done
[14:54:05.659] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2365 seconds
[14:54:06.346] <TB3> INFO: enter test to run
[14:54:06.346] <TB3> INFO: test: exit no parameter change
[14:54:06.544] <TB3> QUIET: Connection to board 126 closed.
[14:54:06.545] <TB3> INFO: pXar: this is the end, my friend