[12:54:17.302] <TB3> INFO: *** Welcome to pxar ***
[12:54:17.302] <TB3> INFO: *** Today: 2016/10/26
[12:54:17.308] <TB3> INFO: *** Version: c8ba-dirty
[12:54:17.308] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C15.dat
[12:54:17.309] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C1b.dat
[12:54:17.309] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//defaultMaskFile.dat
[12:54:17.309] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters_C15.dat
[12:54:17.371] <TB3> INFO: clk: 4
[12:54:17.371] <TB3> INFO: ctr: 4
[12:54:17.371] <TB3> INFO: sda: 19
[12:54:17.371] <TB3> INFO: tin: 9
[12:54:17.371] <TB3> INFO: level: 15
[12:54:17.371] <TB3> INFO: triggerdelay: 0
[12:54:17.371] <TB3> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[12:54:17.371] <TB3> INFO: Log level: INFO
[12:54:17.379] <TB3> INFO: Found DTB DTB_WWVASW
[12:54:17.388] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[12:54:17.390] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[12:54:17.392] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[12:54:18.887] <TB3> INFO: DUT info:
[12:54:18.887] <TB3> INFO: The DUT currently contains the following objects:
[12:54:18.887] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[12:54:18.887] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:54:18.887] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:54:18.887] <TB3> INFO: TBM Core alpha (2): 7 registers set
[12:54:18.887] <TB3> INFO: TBM Core beta (3): 7 registers set
[12:54:18.887] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[12:54:18.887] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.887] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.887] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.887] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:18.888] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:54:19.289] <TB3> INFO: enter 'restricted' command line mode
[12:54:19.289] <TB3> INFO: enter test to run
[12:54:19.289] <TB3> INFO: test: pretest no parameter change
[12:54:19.289] <TB3> INFO: running: pretest
[12:54:19.295] <TB3> INFO: ######################################################################
[12:54:19.295] <TB3> INFO: PixTestPretest::doTest()
[12:54:19.295] <TB3> INFO: ######################################################################
[12:54:19.297] <TB3> INFO: ----------------------------------------------------------------------
[12:54:19.297] <TB3> INFO: PixTestPretest::programROC()
[12:54:19.297] <TB3> INFO: ----------------------------------------------------------------------
[12:54:37.311] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:54:37.311] <TB3> INFO: IA differences per ROC: 16.9 18.5 22.5 19.3 20.9 16.9 19.3 20.1 19.3 16.1 20.1 20.9 21.7 20.1 20.9 19.3
[12:54:37.375] <TB3> INFO: ----------------------------------------------------------------------
[12:54:37.375] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:54:37.375] <TB3> INFO: ----------------------------------------------------------------------
[12:54:58.677] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[12:54:58.677] <TB3> INFO: i(loss) [mA/ROC]: 20.1 19.3 20.1 19.3 20.1 19.3 20.1 20.1 18.5 19.3 19.3 19.3 19.3 19.3 19.3 18.5
[12:54:58.710] <TB3> INFO: ----------------------------------------------------------------------
[12:54:58.711] <TB3> INFO: PixTestPretest::findTiming()
[12:54:58.711] <TB3> INFO: ----------------------------------------------------------------------
[12:54:58.711] <TB3> INFO: PixTestCmd::init()

[12:55:30.925] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[12:55:30.925] <TB3> INFO: (success/tries = 100/100), width = 4
[12:55:32.430] <TB3> INFO: ----------------------------------------------------------------------
[12:55:32.430] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:55:32.430] <TB3> INFO: ----------------------------------------------------------------------
[12:55:32.525] <TB3> INFO: Expecting 231680 events.
[12:55:42.523] <TB3> INFO: 231680 events read in total (9406ms).
[12:55:42.534] <TB3> INFO: Test took 10099ms.
[12:55:42.785] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:55:42.821] <TB3> INFO: ----------------------------------------------------------------------
[12:55:42.821] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:55:42.821] <TB3> INFO: ----------------------------------------------------------------------
[12:55:42.916] <TB3> INFO: Expecting 231680 events.
[12:55:53.089] <TB3> INFO: 231680 events read in total (9581ms).
[12:55:53.096] <TB3> INFO: Test took 10271ms.
[12:55:53.363] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:55:53.363] <TB3> INFO: CalDel: 95 99 121 103 106 82 102 107 106 103 95 105 101 99 119 114
[12:55:53.363] <TB3> INFO: VthrComp: 51 54 51 51 51 51 51 51 51 51 51 51 51 51 57 51
[12:55:53.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C0.dat
[12:55:53.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C1.dat
[12:55:53.370] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C2.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C3.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C4.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C5.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C6.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C7.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C8.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C9.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C10.dat
[12:55:53.371] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C11.dat
[12:55:53.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C12.dat
[12:55:53.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C13.dat
[12:55:53.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C14.dat
[12:55:53.372] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters_C15.dat
[12:55:53.372] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C0a.dat
[12:55:53.372] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C0b.dat
[12:55:53.372] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C1a.dat
[12:55:53.372] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//tbmParameters_C1b.dat
[12:55:53.372] <TB3> INFO: PixTestPretest::doTest() done, duration: 94 seconds
[12:55:53.423] <TB3> INFO: enter test to run
[12:55:53.423] <TB3> INFO: test: FullTest no parameter change
[12:55:53.423] <TB3> INFO: running: fulltest
[12:55:53.423] <TB3> INFO: ######################################################################
[12:55:53.423] <TB3> INFO: PixTestFullTest::doTest()
[12:55:53.423] <TB3> INFO: ######################################################################
[12:55:53.425] <TB3> INFO: ######################################################################
[12:55:53.425] <TB3> INFO: PixTestAlive::doTest()
[12:55:53.425] <TB3> INFO: ######################################################################
[12:55:53.426] <TB3> INFO: ----------------------------------------------------------------------
[12:55:53.426] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:55:53.426] <TB3> INFO: ----------------------------------------------------------------------
[12:55:53.668] <TB3> INFO: Expecting 41600 events.
[12:55:57.201] <TB3> INFO: 41600 events read in total (2941ms).
[12:55:57.202] <TB3> INFO: Test took 3774ms.
[12:55:57.435] <TB3> INFO: PixTestAlive::aliveTest() done
[12:55:57.435] <TB3> INFO: number of dead pixels (per ROC): 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:55:57.436] <TB3> INFO: ----------------------------------------------------------------------
[12:55:57.436] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:55:57.436] <TB3> INFO: ----------------------------------------------------------------------
[12:55:57.727] <TB3> INFO: Expecting 41600 events.
[12:56:00.745] <TB3> INFO: 41600 events read in total (2426ms).
[12:56:00.745] <TB3> INFO: Test took 3306ms.
[12:56:00.745] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:56:00.986] <TB3> INFO: PixTestAlive::maskTest() done
[12:56:00.986] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:56:00.987] <TB3> INFO: ----------------------------------------------------------------------
[12:56:00.987] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:56:00.987] <TB3> INFO: ----------------------------------------------------------------------
[12:56:01.275] <TB3> INFO: Expecting 41600 events.
[12:56:04.833] <TB3> INFO: 41600 events read in total (2966ms).
[12:56:04.833] <TB3> INFO: Test took 3844ms.
[12:56:05.069] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:56:05.069] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:56:05.069] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:56:05.069] <TB3> INFO: Decoding statistics:
[12:56:05.069] <TB3> INFO: General information:
[12:56:05.069] <TB3> INFO: 16bit words read: 0
[12:56:05.069] <TB3> INFO: valid events total: 0
[12:56:05.069] <TB3> INFO: empty events: 0
[12:56:05.069] <TB3> INFO: valid events with pixels: 0
[12:56:05.069] <TB3> INFO: valid pixel hits: 0
[12:56:05.069] <TB3> INFO: Event errors: 0
[12:56:05.069] <TB3> INFO: start marker: 0
[12:56:05.069] <TB3> INFO: stop marker: 0
[12:56:05.069] <TB3> INFO: overflow: 0
[12:56:05.069] <TB3> INFO: invalid 5bit words: 0
[12:56:05.069] <TB3> INFO: invalid XOR eye diagram: 0
[12:56:05.069] <TB3> INFO: frame (failed synchr.): 0
[12:56:05.070] <TB3> INFO: idle data (no TBM trl): 0
[12:56:05.070] <TB3> INFO: no data (only TBM hdr): 0
[12:56:05.070] <TB3> INFO: TBM errors: 0
[12:56:05.070] <TB3> INFO: flawed TBM headers: 0
[12:56:05.070] <TB3> INFO: flawed TBM trailers: 0
[12:56:05.070] <TB3> INFO: event ID mismatches: 0
[12:56:05.070] <TB3> INFO: ROC errors: 0
[12:56:05.070] <TB3> INFO: missing ROC header(s): 0
[12:56:05.070] <TB3> INFO: misplaced readback start: 0
[12:56:05.070] <TB3> INFO: Pixel decoding errors: 0
[12:56:05.070] <TB3> INFO: pixel data incomplete: 0
[12:56:05.070] <TB3> INFO: pixel address: 0
[12:56:05.070] <TB3> INFO: pulse height fill bit: 0
[12:56:05.070] <TB3> INFO: buffer corruption: 0
[12:56:05.079] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C15.dat
[12:56:05.080] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[12:56:05.080] <TB3> INFO: ######################################################################
[12:56:05.080] <TB3> INFO: PixTestReadback::doTest()
[12:56:05.080] <TB3> INFO: ######################################################################
[12:56:05.080] <TB3> INFO: ----------------------------------------------------------------------
[12:56:05.080] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:56:05.080] <TB3> INFO: ----------------------------------------------------------------------
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C0.dat
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C1.dat
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C2.dat
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C3.dat
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C4.dat
[12:56:15.068] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C5.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C6.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C7.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C8.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C9.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C10.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C11.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C12.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C13.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C14.dat
[12:56:15.069] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C15.dat
[12:56:15.100] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:56:15.100] <TB3> INFO: ----------------------------------------------------------------------
[12:56:15.100] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:56:15.101] <TB3> INFO: ----------------------------------------------------------------------
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C0.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C1.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C2.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C3.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C4.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C5.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C6.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C7.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C8.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C9.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C10.dat
[12:56:25.042] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C11.dat
[12:56:25.043] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C12.dat
[12:56:25.043] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C13.dat
[12:56:25.043] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C14.dat
[12:56:25.043] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C15.dat
[12:56:25.073] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:56:25.073] <TB3> INFO: ----------------------------------------------------------------------
[12:56:25.073] <TB3> INFO: PixTestReadback::readbackVbg()
[12:56:25.073] <TB3> INFO: ----------------------------------------------------------------------
[12:56:32.749] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:56:32.749] <TB3> INFO: ----------------------------------------------------------------------
[12:56:32.750] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:56:32.750] <TB3> INFO: ----------------------------------------------------------------------
[12:56:32.750] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.2calibrated Vbg = 1.19247 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.8calibrated Vbg = 1.18981 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 145calibrated Vbg = 1.18931 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.8calibrated Vbg = 1.18689 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 153calibrated Vbg = 1.1931 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 164.1calibrated Vbg = 1.19526 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157.6calibrated Vbg = 1.20301 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155.9calibrated Vbg = 1.19893 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 166.1calibrated Vbg = 1.1967 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.8calibrated Vbg = 1.1825 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 155.9calibrated Vbg = 1.18736 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.4calibrated Vbg = 1.18675 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.3calibrated Vbg = 1.1902 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 156.3calibrated Vbg = 1.19287 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.9calibrated Vbg = 1.18959 :::*/*/*/*/
[12:56:32.750] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 163.9calibrated Vbg = 1.19513 :::*/*/*/*/
[12:56:32.752] <TB3> INFO: ----------------------------------------------------------------------
[12:56:32.752] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:56:32.752] <TB3> INFO: ----------------------------------------------------------------------
[12:59:13.528] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C0.dat
[12:59:13.528] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C1.dat
[12:59:13.528] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C2.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C3.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C4.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C5.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C6.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C7.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C8.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C9.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C10.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C11.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C12.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C13.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C14.dat
[12:59:13.529] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//readbackCal_C15.dat
[12:59:13.559] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:59:13.561] <TB3> INFO: PixTestReadback::doTest() done
[12:59:13.562] <TB3> INFO: Decoding statistics:
[12:59:13.562] <TB3> INFO: General information:
[12:59:13.562] <TB3> INFO: 16bit words read: 1536
[12:59:13.562] <TB3> INFO: valid events total: 256
[12:59:13.562] <TB3> INFO: empty events: 256
[12:59:13.562] <TB3> INFO: valid events with pixels: 0
[12:59:13.562] <TB3> INFO: valid pixel hits: 0
[12:59:13.562] <TB3> INFO: Event errors: 0
[12:59:13.562] <TB3> INFO: start marker: 0
[12:59:13.562] <TB3> INFO: stop marker: 0
[12:59:13.562] <TB3> INFO: overflow: 0
[12:59:13.562] <TB3> INFO: invalid 5bit words: 0
[12:59:13.562] <TB3> INFO: invalid XOR eye diagram: 0
[12:59:13.562] <TB3> INFO: frame (failed synchr.): 0
[12:59:13.562] <TB3> INFO: idle data (no TBM trl): 0
[12:59:13.562] <TB3> INFO: no data (only TBM hdr): 0
[12:59:13.562] <TB3> INFO: TBM errors: 0
[12:59:13.562] <TB3> INFO: flawed TBM headers: 0
[12:59:13.562] <TB3> INFO: flawed TBM trailers: 0
[12:59:13.562] <TB3> INFO: event ID mismatches: 0
[12:59:13.562] <TB3> INFO: ROC errors: 0
[12:59:13.562] <TB3> INFO: missing ROC header(s): 0
[12:59:13.562] <TB3> INFO: misplaced readback start: 0
[12:59:13.562] <TB3> INFO: Pixel decoding errors: 0
[12:59:13.562] <TB3> INFO: pixel data incomplete: 0
[12:59:13.562] <TB3> INFO: pixel address: 0
[12:59:13.562] <TB3> INFO: pulse height fill bit: 0
[12:59:13.562] <TB3> INFO: buffer corruption: 0
[12:59:13.614] <TB3> INFO: ######################################################################
[12:59:13.615] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:59:13.615] <TB3> INFO: ######################################################################
[12:59:13.618] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:59:13.663] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:59:13.663] <TB3> INFO: run 1 of 1
[12:59:13.899] <TB3> INFO: Expecting 3120000 events.
[12:59:44.229] <TB3> INFO: 652065 events read in total (29738ms).











[13:00:14.266] <TB3> INFO: 1311115 events read in total (59775ms).











[13:00:44.341] <TB3> INFO: 1967645 events read in total (89850ms).











[13:01:14.913] <TB3> INFO: 2623910 events read in total (120422ms).











[13:01:38.119] <TB3> INFO: 3120000 events read in total (143628ms).
[13:01:38.267] <TB3> INFO: Test took 144604ms.
[13:02:04.273] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 170 seconds
[13:02:04.273] <TB3> INFO: number of dead bumps (per ROC): 1 0 0 2 0 2 3 1 0 0 3 1 0 0 0 0
[13:02:04.273] <TB3> INFO: separation cut (per ROC): 106 108 106 108 101 103 103 103 111 105 108 104 110 106 103 97
[13:02:04.273] <TB3> INFO: Decoding statistics:
[13:02:04.273] <TB3> INFO: General information:
[13:02:04.273] <TB3> INFO: 16bit words read: 0
[13:02:04.273] <TB3> INFO: valid events total: 0
[13:02:04.273] <TB3> INFO: empty events: 0
[13:02:04.273] <TB3> INFO: valid events with pixels: 0
[13:02:04.273] <TB3> INFO: valid pixel hits: 0
[13:02:04.273] <TB3> INFO: Event errors: 0
[13:02:04.273] <TB3> INFO: start marker: 0
[13:02:04.273] <TB3> INFO: stop marker: 0
[13:02:04.273] <TB3> INFO: overflow: 0
[13:02:04.273] <TB3> INFO: invalid 5bit words: 0
[13:02:04.274] <TB3> INFO: invalid XOR eye diagram: 0
[13:02:04.274] <TB3> INFO: frame (failed synchr.): 0
[13:02:04.274] <TB3> INFO: idle data (no TBM trl): 0
[13:02:04.274] <TB3> INFO: no data (only TBM hdr): 0
[13:02:04.274] <TB3> INFO: TBM errors: 0
[13:02:04.274] <TB3> INFO: flawed TBM headers: 0
[13:02:04.274] <TB3> INFO: flawed TBM trailers: 0
[13:02:04.274] <TB3> INFO: event ID mismatches: 0
[13:02:04.274] <TB3> INFO: ROC errors: 0
[13:02:04.274] <TB3> INFO: missing ROC header(s): 0
[13:02:04.274] <TB3> INFO: misplaced readback start: 0
[13:02:04.274] <TB3> INFO: Pixel decoding errors: 0
[13:02:04.274] <TB3> INFO: pixel data incomplete: 0
[13:02:04.274] <TB3> INFO: pixel address: 0
[13:02:04.274] <TB3> INFO: pulse height fill bit: 0
[13:02:04.274] <TB3> INFO: buffer corruption: 0
[13:02:04.310] <TB3> INFO: ######################################################################
[13:02:04.310] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:02:04.310] <TB3> INFO: ######################################################################
[13:02:04.310] <TB3> INFO: ----------------------------------------------------------------------
[13:02:04.310] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[13:02:04.310] <TB3> INFO: ----------------------------------------------------------------------
[13:02:04.310] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[13:02:04.324] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[13:02:04.324] <TB3> INFO: run 1 of 1
[13:02:04.560] <TB3> INFO: Expecting 36608000 events.
[13:02:28.149] <TB3> INFO: 675650 events read in total (22997ms).
[13:02:50.796] <TB3> INFO: 1336650 events read in total (45644ms).
[13:03:13.314] <TB3> INFO: 1998650 events read in total (68162ms).
[13:03:35.954] <TB3> INFO: 2657350 events read in total (90802ms).
[13:03:58.690] <TB3> INFO: 3317350 events read in total (113538ms).
[13:04:21.363] <TB3> INFO: 3976750 events read in total (136211ms).
[13:04:44.180] <TB3> INFO: 4636500 events read in total (159028ms).
[13:05:07.025] <TB3> INFO: 5294500 events read in total (181873ms).
[13:05:30.242] <TB3> INFO: 5952350 events read in total (205090ms).
[13:05:52.798] <TB3> INFO: 6610350 events read in total (227646ms).
[13:06:15.317] <TB3> INFO: 7266950 events read in total (250165ms).
[13:06:37.841] <TB3> INFO: 7925500 events read in total (272689ms).
[13:07:00.702] <TB3> INFO: 8582950 events read in total (295550ms).
[13:07:23.468] <TB3> INFO: 9243300 events read in total (318316ms).
[13:07:46.308] <TB3> INFO: 9902000 events read in total (341156ms).
[13:08:09.039] <TB3> INFO: 10560150 events read in total (363887ms).
[13:08:31.954] <TB3> INFO: 11216850 events read in total (386802ms).
[13:08:54.457] <TB3> INFO: 11873750 events read in total (409305ms).
[13:09:17.558] <TB3> INFO: 12530350 events read in total (432406ms).
[13:09:40.288] <TB3> INFO: 13187350 events read in total (455136ms).
[13:10:03.093] <TB3> INFO: 13841400 events read in total (477941ms).
[13:10:25.632] <TB3> INFO: 14497050 events read in total (500480ms).
[13:10:48.165] <TB3> INFO: 15151800 events read in total (523013ms).
[13:11:10.673] <TB3> INFO: 15806800 events read in total (545521ms).
[13:11:33.356] <TB3> INFO: 16461850 events read in total (568204ms).
[13:11:56.010] <TB3> INFO: 17115350 events read in total (590858ms).
[13:12:18.719] <TB3> INFO: 17771250 events read in total (613567ms).
[13:12:40.982] <TB3> INFO: 18423300 events read in total (635830ms).
[13:13:03.589] <TB3> INFO: 19075900 events read in total (658437ms).
[13:13:26.391] <TB3> INFO: 19726600 events read in total (681239ms).
[13:13:49.011] <TB3> INFO: 20377650 events read in total (703859ms).
[13:14:11.978] <TB3> INFO: 21027650 events read in total (726826ms).
[13:14:35.023] <TB3> INFO: 21679100 events read in total (749871ms).
[13:14:57.819] <TB3> INFO: 22331050 events read in total (772667ms).
[13:15:20.834] <TB3> INFO: 22983050 events read in total (795682ms).
[13:15:43.799] <TB3> INFO: 23635250 events read in total (818647ms).
[13:16:06.550] <TB3> INFO: 24286450 events read in total (841398ms).
[13:16:28.985] <TB3> INFO: 24938350 events read in total (863833ms).
[13:16:51.467] <TB3> INFO: 25588750 events read in total (886315ms).
[13:17:14.245] <TB3> INFO: 26240300 events read in total (909093ms).
[13:17:36.610] <TB3> INFO: 26891050 events read in total (931458ms).
[13:17:59.121] <TB3> INFO: 27542950 events read in total (953969ms).
[13:18:21.471] <TB3> INFO: 28192700 events read in total (976319ms).
[13:18:44.008] <TB3> INFO: 28844050 events read in total (998856ms).
[13:19:06.644] <TB3> INFO: 29492700 events read in total (1021492ms).
[13:19:29.231] <TB3> INFO: 30142350 events read in total (1044079ms).
[13:19:51.604] <TB3> INFO: 30791900 events read in total (1066452ms).
[13:20:14.249] <TB3> INFO: 31440650 events read in total (1089097ms).
[13:20:36.949] <TB3> INFO: 32090800 events read in total (1111797ms).
[13:20:59.856] <TB3> INFO: 32741900 events read in total (1134704ms).
[13:21:22.720] <TB3> INFO: 33393900 events read in total (1157568ms).
[13:21:45.207] <TB3> INFO: 34044550 events read in total (1180055ms).
[13:22:08.226] <TB3> INFO: 34695300 events read in total (1203074ms).
[13:22:30.851] <TB3> INFO: 35345050 events read in total (1225699ms).
[13:22:53.771] <TB3> INFO: 35999200 events read in total (1248619ms).
[13:23:14.907] <TB3> INFO: 36608000 events read in total (1269755ms).
[13:23:14.976] <TB3> INFO: Test took 1270652ms.
[13:23:15.378] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:16.862] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:18.338] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:19.949] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:21.607] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:23.054] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:24.535] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:26.478] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:28.567] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:30.444] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:32.414] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:34.505] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:36.614] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:38.688] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:40.702] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:42.704] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:44.803] <TB3> INFO: PixTestScurves::scurves() done
[13:23:44.803] <TB3> INFO: Vcal mean: 123.03 123.04 108.79 117.07 103.51 110.38 111.92 109.10 121.59 112.09 122.59 114.87 120.20 114.72 123.50 111.93
[13:23:44.803] <TB3> INFO: Vcal RMS: 7.34 6.47 5.48 5.47 5.57 5.19 5.30 5.05 6.11 4.76 6.81 6.06 6.03 5.24 8.10 5.09
[13:23:44.804] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1300 seconds
[13:23:44.804] <TB3> INFO: Decoding statistics:
[13:23:44.804] <TB3> INFO: General information:
[13:23:44.804] <TB3> INFO: 16bit words read: 0
[13:23:44.804] <TB3> INFO: valid events total: 0
[13:23:44.804] <TB3> INFO: empty events: 0
[13:23:44.804] <TB3> INFO: valid events with pixels: 0
[13:23:44.804] <TB3> INFO: valid pixel hits: 0
[13:23:44.804] <TB3> INFO: Event errors: 0
[13:23:44.804] <TB3> INFO: start marker: 0
[13:23:44.804] <TB3> INFO: stop marker: 0
[13:23:44.804] <TB3> INFO: overflow: 0
[13:23:44.804] <TB3> INFO: invalid 5bit words: 0
[13:23:44.804] <TB3> INFO: invalid XOR eye diagram: 0
[13:23:44.804] <TB3> INFO: frame (failed synchr.): 0
[13:23:44.804] <TB3> INFO: idle data (no TBM trl): 0
[13:23:44.804] <TB3> INFO: no data (only TBM hdr): 0
[13:23:44.804] <TB3> INFO: TBM errors: 0
[13:23:44.804] <TB3> INFO: flawed TBM headers: 0
[13:23:44.804] <TB3> INFO: flawed TBM trailers: 0
[13:23:44.804] <TB3> INFO: event ID mismatches: 0
[13:23:44.804] <TB3> INFO: ROC errors: 0
[13:23:44.804] <TB3> INFO: missing ROC header(s): 0
[13:23:44.804] <TB3> INFO: misplaced readback start: 0
[13:23:44.804] <TB3> INFO: Pixel decoding errors: 0
[13:23:44.804] <TB3> INFO: pixel data incomplete: 0
[13:23:44.804] <TB3> INFO: pixel address: 0
[13:23:44.804] <TB3> INFO: pulse height fill bit: 0
[13:23:44.804] <TB3> INFO: buffer corruption: 0
[13:23:44.873] <TB3> INFO: ######################################################################
[13:23:44.873] <TB3> INFO: PixTestTrim::doTest()
[13:23:44.873] <TB3> INFO: ######################################################################
[13:23:44.874] <TB3> INFO: ----------------------------------------------------------------------
[13:23:44.874] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[13:23:44.874] <TB3> INFO: ----------------------------------------------------------------------
[13:23:44.918] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:23:44.918] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:23:44.931] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:23:44.931] <TB3> INFO: run 1 of 1
[13:23:45.208] <TB3> INFO: Expecting 5025280 events.
[13:24:16.750] <TB3> INFO: 819512 events read in total (30938ms).
[13:24:47.026] <TB3> INFO: 1635152 events read in total (61214ms).
[13:25:17.026] <TB3> INFO: 2447432 events read in total (91214ms).
[13:25:47.409] <TB3> INFO: 3256728 events read in total (121597ms).
[13:26:17.722] <TB3> INFO: 4063528 events read in total (151910ms).
[13:26:48.498] <TB3> INFO: 4868496 events read in total (182686ms).
[13:26:54.647] <TB3> INFO: 5025280 events read in total (188835ms).
[13:26:54.711] <TB3> INFO: Test took 189780ms.
[13:27:11.825] <TB3> INFO: ROC 0 VthrComp = 125
[13:27:11.825] <TB3> INFO: ROC 1 VthrComp = 130
[13:27:11.826] <TB3> INFO: ROC 2 VthrComp = 117
[13:27:11.826] <TB3> INFO: ROC 3 VthrComp = 125
[13:27:11.826] <TB3> INFO: ROC 4 VthrComp = 109
[13:27:11.826] <TB3> INFO: ROC 5 VthrComp = 112
[13:27:11.826] <TB3> INFO: ROC 6 VthrComp = 114
[13:27:11.827] <TB3> INFO: ROC 7 VthrComp = 112
[13:27:11.828] <TB3> INFO: ROC 8 VthrComp = 121
[13:27:11.828] <TB3> INFO: ROC 9 VthrComp = 114
[13:27:11.828] <TB3> INFO: ROC 10 VthrComp = 120
[13:27:11.828] <TB3> INFO: ROC 11 VthrComp = 118
[13:27:11.828] <TB3> INFO: ROC 12 VthrComp = 128
[13:27:11.828] <TB3> INFO: ROC 13 VthrComp = 117
[13:27:11.828] <TB3> INFO: ROC 14 VthrComp = 118
[13:27:11.828] <TB3> INFO: ROC 15 VthrComp = 110
[13:27:12.071] <TB3> INFO: Expecting 41600 events.
[13:27:15.725] <TB3> INFO: 41600 events read in total (3062ms).
[13:27:15.726] <TB3> INFO: Test took 3896ms.
[13:27:15.735] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:27:15.735] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:27:15.747] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:27:15.747] <TB3> INFO: run 1 of 1
[13:27:16.026] <TB3> INFO: Expecting 5025280 events.
[13:27:42.833] <TB3> INFO: 591296 events read in total (26215ms).
[13:28:09.227] <TB3> INFO: 1182208 events read in total (52609ms).
[13:28:35.034] <TB3> INFO: 1773072 events read in total (78416ms).
[13:29:01.345] <TB3> INFO: 2362736 events read in total (104727ms).
[13:29:27.681] <TB3> INFO: 2950160 events read in total (131063ms).
[13:29:53.728] <TB3> INFO: 3536056 events read in total (157110ms).
[13:30:19.335] <TB3> INFO: 4120952 events read in total (182717ms).
[13:30:45.276] <TB3> INFO: 4705160 events read in total (208658ms).
[13:30:59.248] <TB3> INFO: 5025280 events read in total (222630ms).
[13:30:59.317] <TB3> INFO: Test took 223569ms.
[13:31:23.521] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 62.4011 for pixel 15/79 mean/min/max = 46.8859/31.3528/62.419
[13:31:23.521] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 62.2351 for pixel 21/8 mean/min/max = 46.8496/31.4126/62.2866
[13:31:23.521] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.2845 for pixel 11/1 mean/min/max = 45.5446/31.5754/59.5139
[13:31:23.522] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.7146 for pixel 0/7 mean/min/max = 45.9145/30.8159/61.0132
[13:31:23.523] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.9816 for pixel 1/1 mean/min/max = 47.5738/34.0219/61.1258
[13:31:23.523] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.3073 for pixel 46/79 mean/min/max = 46.0359/32.7016/59.3702
[13:31:23.524] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 62.2126 for pixel 18/3 mean/min/max = 47.0181/31.7405/62.2956
[13:31:23.524] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.2603 for pixel 5/5 mean/min/max = 46.4928/32.6806/60.3051
[13:31:23.525] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 62.5061 for pixel 48/79 mean/min/max = 47.3398/32.0489/62.6307
[13:31:23.525] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 61.2312 for pixel 5/3 mean/min/max = 46.8406/32.1507/61.5305
[13:31:23.526] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 63.5214 for pixel 1/6 mean/min/max = 47.9193/32.0824/63.7562
[13:31:23.526] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.3356 for pixel 14/6 mean/min/max = 46.6466/30.9524/62.3408
[13:31:23.526] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.3699 for pixel 20/1 mean/min/max = 46.0205/31.5928/60.4483
[13:31:23.527] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 60.7659 for pixel 14/3 mean/min/max = 46.298/31.6005/60.9956
[13:31:23.527] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 67.5996 for pixel 15/8 mean/min/max = 48.9909/30.0081/67.9737
[13:31:23.527] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 63.7869 for pixel 44/3 mean/min/max = 49.0248/33.5418/64.5077
[13:31:23.528] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:23.616] <TB3> INFO: Expecting 411648 events.
[13:31:33.125] <TB3> INFO: 411648 events read in total (8917ms).
[13:31:33.134] <TB3> INFO: Expecting 411648 events.
[13:31:42.467] <TB3> INFO: 411648 events read in total (8930ms).
[13:31:42.480] <TB3> INFO: Expecting 411648 events.
[13:31:51.872] <TB3> INFO: 411648 events read in total (8988ms).
[13:31:51.885] <TB3> INFO: Expecting 411648 events.
[13:32:01.091] <TB3> INFO: 411648 events read in total (8803ms).
[13:32:01.111] <TB3> INFO: Expecting 411648 events.
[13:32:10.333] <TB3> INFO: 411648 events read in total (8819ms).
[13:32:10.353] <TB3> INFO: Expecting 411648 events.
[13:32:19.678] <TB3> INFO: 411648 events read in total (8922ms).
[13:32:19.699] <TB3> INFO: Expecting 411648 events.
[13:32:28.970] <TB3> INFO: 411648 events read in total (8868ms).
[13:32:28.994] <TB3> INFO: Expecting 411648 events.
[13:32:38.303] <TB3> INFO: 411648 events read in total (8906ms).
[13:32:38.329] <TB3> INFO: Expecting 411648 events.
[13:32:47.630] <TB3> INFO: 411648 events read in total (8898ms).
[13:32:47.661] <TB3> INFO: Expecting 411648 events.
[13:32:56.864] <TB3> INFO: 411648 events read in total (8800ms).
[13:32:56.896] <TB3> INFO: Expecting 411648 events.
[13:33:06.272] <TB3> INFO: 411648 events read in total (8973ms).
[13:33:06.321] <TB3> INFO: Expecting 411648 events.
[13:33:15.597] <TB3> INFO: 411648 events read in total (8873ms).
[13:33:15.644] <TB3> INFO: Expecting 411648 events.
[13:33:24.894] <TB3> INFO: 411648 events read in total (8847ms).
[13:33:24.944] <TB3> INFO: Expecting 411648 events.
[13:33:34.175] <TB3> INFO: 411648 events read in total (8828ms).
[13:33:34.222] <TB3> INFO: Expecting 411648 events.
[13:33:43.429] <TB3> INFO: 411648 events read in total (8803ms).
[13:33:43.491] <TB3> INFO: Expecting 411648 events.
[13:33:52.899] <TB3> INFO: 411648 events read in total (9005ms).
[13:33:52.948] <TB3> INFO: Test took 149420ms.
[13:33:53.683] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:33:53.697] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:33:53.697] <TB3> INFO: run 1 of 1
[13:33:53.959] <TB3> INFO: Expecting 5025280 events.
[13:34:20.664] <TB3> INFO: 587056 events read in total (26110ms).
[13:34:47.421] <TB3> INFO: 1173576 events read in total (52867ms).
[13:35:14.117] <TB3> INFO: 1760144 events read in total (79563ms).
[13:35:40.995] <TB3> INFO: 2347176 events read in total (106442ms).
[13:36:07.666] <TB3> INFO: 2932264 events read in total (133112ms).
[13:36:34.051] <TB3> INFO: 3516264 events read in total (159497ms).
[13:37:00.835] <TB3> INFO: 4099760 events read in total (186281ms).
[13:37:27.372] <TB3> INFO: 4683672 events read in total (212818ms).
[13:37:43.065] <TB3> INFO: 5025280 events read in total (228511ms).
[13:37:43.240] <TB3> INFO: Test took 229544ms.
[13:38:06.055] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 2.375098 .. 147.362156
[13:38:06.293] <TB3> INFO: Expecting 208000 events.
[13:38:15.945] <TB3> INFO: 208000 events read in total (9060ms).
[13:38:15.947] <TB3> INFO: Test took 9890ms.
[13:38:16.003] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[13:38:16.017] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:38:16.017] <TB3> INFO: run 1 of 1
[13:38:16.295] <TB3> INFO: Expecting 5191680 events.
[13:38:42.715] <TB3> INFO: 582608 events read in total (25829ms).
[13:39:08.358] <TB3> INFO: 1165224 events read in total (51473ms).
[13:39:34.209] <TB3> INFO: 1747504 events read in total (77324ms).
[13:40:00.157] <TB3> INFO: 2330072 events read in total (103271ms).
[13:40:26.079] <TB3> INFO: 2912784 events read in total (129193ms).
[13:40:51.702] <TB3> INFO: 3494200 events read in total (154816ms).
[13:41:17.383] <TB3> INFO: 4075992 events read in total (180497ms).
[13:41:43.851] <TB3> INFO: 4656896 events read in total (206965ms).
[13:42:07.864] <TB3> INFO: 5191680 events read in total (230978ms).
[13:42:07.958] <TB3> INFO: Test took 231942ms.
[13:42:34.126] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.232257 .. 45.526722
[13:42:34.415] <TB3> INFO: Expecting 208000 events.
[13:42:44.256] <TB3> INFO: 208000 events read in total (9247ms).
[13:42:44.256] <TB3> INFO: Test took 10120ms.
[13:42:44.304] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:42:44.316] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:42:44.317] <TB3> INFO: run 1 of 1
[13:42:44.595] <TB3> INFO: Expecting 1297920 events.
[13:43:13.664] <TB3> INFO: 659248 events read in total (28477ms).
[13:43:40.670] <TB3> INFO: 1297920 events read in total (55483ms).
[13:43:40.715] <TB3> INFO: Test took 56399ms.
[13:43:56.665] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.630586 .. 48.795461
[13:43:56.905] <TB3> INFO: Expecting 208000 events.
[13:44:06.484] <TB3> INFO: 208000 events read in total (8987ms).
[13:44:06.485] <TB3> INFO: Test took 9818ms.
[13:44:06.534] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:44:06.547] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:44:06.547] <TB3> INFO: run 1 of 1
[13:44:06.826] <TB3> INFO: Expecting 1431040 events.
[13:44:34.850] <TB3> INFO: 652472 events read in total (27432ms).
[13:45:02.126] <TB3> INFO: 1303944 events read in total (54708ms).
[13:45:07.799] <TB3> INFO: 1431040 events read in total (60381ms).
[13:45:07.830] <TB3> INFO: Test took 61283ms.
[13:45:20.551] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 23.637089 .. 50.313862
[13:45:20.829] <TB3> INFO: Expecting 208000 events.
[13:45:30.605] <TB3> INFO: 208000 events read in total (9184ms).
[13:45:30.605] <TB3> INFO: Test took 10052ms.
[13:45:30.677] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 60 (-1/-1) hits flags = 528 (plus default)
[13:45:30.690] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:45:30.691] <TB3> INFO: run 1 of 1
[13:45:30.969] <TB3> INFO: Expecting 1597440 events.
[13:45:59.002] <TB3> INFO: 656888 events read in total (28442ms).
[13:46:27.112] <TB3> INFO: 1313072 events read in total (55552ms).
[13:46:39.375] <TB3> INFO: 1597440 events read in total (67815ms).
[13:46:39.416] <TB3> INFO: Test took 68726ms.
[13:46:54.604] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:46:54.604] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:46:54.617] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[13:46:54.617] <TB3> INFO: run 1 of 1
[13:46:54.855] <TB3> INFO: Expecting 1364480 events.
[13:47:23.889] <TB3> INFO: 667680 events read in total (28443ms).
[13:47:52.334] <TB3> INFO: 1334544 events read in total (56889ms).
[13:47:54.092] <TB3> INFO: 1364480 events read in total (58647ms).
[13:47:54.135] <TB3> INFO: Test took 59517ms.
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C0.dat
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C1.dat
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C2.dat
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C3.dat
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C4.dat
[13:48:07.090] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C5.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C6.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C7.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C8.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C9.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C10.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C11.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C12.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C13.dat
[13:48:07.091] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C14.dat
[13:48:07.092] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C15.dat
[13:48:07.092] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C0.dat
[13:48:07.100] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C1.dat
[13:48:07.104] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C2.dat
[13:48:07.109] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C3.dat
[13:48:07.114] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C4.dat
[13:48:07.118] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C5.dat
[13:48:07.123] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C6.dat
[13:48:07.128] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C7.dat
[13:48:07.133] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C8.dat
[13:48:07.137] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C9.dat
[13:48:07.142] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C10.dat
[13:48:07.147] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C11.dat
[13:48:07.152] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C12.dat
[13:48:07.157] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C13.dat
[13:48:07.161] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C14.dat
[13:48:07.166] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//trimParameters35_C15.dat
[13:48:07.171] <TB3> INFO: PixTestTrim::trimTest() done
[13:48:07.171] <TB3> INFO: vtrim: 133 133 125 107 127 118 140 138 129 120 119 120 119 133 128 125
[13:48:07.171] <TB3> INFO: vthrcomp: 125 130 117 125 109 112 114 112 121 114 120 118 128 117 118 110
[13:48:07.171] <TB3> INFO: vcal mean: 34.96 35.16 34.95 34.93 34.97 34.99 34.94 34.92 35.03 35.01 35.03 35.07 34.96 34.99 35.35 35.05
[13:48:07.171] <TB3> INFO: vcal RMS: 1.35 1.27 1.04 1.08 0.98 1.02 1.10 1.04 1.09 1.05 1.19 1.28 1.06 1.10 1.75 1.08
[13:48:07.171] <TB3> INFO: bits mean: 9.56 9.66 9.77 9.09 8.70 9.49 9.48 9.61 9.30 8.97 8.92 9.87 9.56 9.76 10.01 8.51
[13:48:07.171] <TB3> INFO: bits RMS: 2.69 2.63 2.65 3.06 2.63 2.60 2.66 2.51 2.70 2.87 2.77 2.60 2.71 2.57 2.54 2.72
[13:48:07.178] <TB3> INFO: ----------------------------------------------------------------------
[13:48:07.178] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[13:48:07.178] <TB3> INFO: ----------------------------------------------------------------------
[13:48:07.181] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:48:07.193] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:48:07.193] <TB3> INFO: run 1 of 1
[13:48:07.430] <TB3> INFO: Expecting 4160000 events.
[13:48:39.643] <TB3> INFO: 741915 events read in total (31622ms).
[13:49:11.409] <TB3> INFO: 1478525 events read in total (63388ms).
[13:49:43.204] <TB3> INFO: 2209245 events read in total (95183ms).
[13:50:14.937] <TB3> INFO: 2936515 events read in total (126916ms).
[13:50:46.679] <TB3> INFO: 3661880 events read in total (158658ms).
[13:51:07.863] <TB3> INFO: 4160000 events read in total (179842ms).
[13:51:07.961] <TB3> INFO: Test took 180768ms.
[13:51:31.226] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 216 (-1/-1) hits flags = 528 (plus default)
[13:51:31.239] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:51:31.239] <TB3> INFO: run 1 of 1
[13:51:31.536] <TB3> INFO: Expecting 4513600 events.
[13:52:02.692] <TB3> INFO: 698545 events read in total (30564ms).
[13:52:33.123] <TB3> INFO: 1392930 events read in total (60995ms).
[13:53:03.648] <TB3> INFO: 2083960 events read in total (91520ms).
[13:53:34.507] <TB3> INFO: 2771180 events read in total (122379ms).
[13:54:04.942] <TB3> INFO: 3457875 events read in total (152814ms).
[13:54:35.729] <TB3> INFO: 4143595 events read in total (183601ms).
[13:54:52.348] <TB3> INFO: 4513600 events read in total (200220ms).
[13:54:52.437] <TB3> INFO: Test took 201197ms.
[13:55:20.459] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 203 (-1/-1) hits flags = 528 (plus default)
[13:55:20.473] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:55:20.473] <TB3> INFO: run 1 of 1
[13:55:20.756] <TB3> INFO: Expecting 4243200 events.
[13:55:52.811] <TB3> INFO: 712635 events read in total (31463ms).
[13:56:24.398] <TB3> INFO: 1420940 events read in total (63050ms).
[13:56:55.559] <TB3> INFO: 2124780 events read in total (94211ms).
[13:57:26.364] <TB3> INFO: 2825185 events read in total (125016ms).
[13:57:56.899] <TB3> INFO: 3524550 events read in total (155551ms).
[13:58:27.358] <TB3> INFO: 4225165 events read in total (186010ms).
[13:58:28.521] <TB3> INFO: 4243200 events read in total (187173ms).
[13:58:28.599] <TB3> INFO: Test took 188125ms.
[13:58:53.289] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:58:53.302] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:58:53.302] <TB3> INFO: run 1 of 1
[13:58:53.565] <TB3> INFO: Expecting 4160000 events.
[13:59:25.043] <TB3> INFO: 717665 events read in total (30887ms).
[13:59:56.069] <TB3> INFO: 1430575 events read in total (61913ms).
[14:00:27.246] <TB3> INFO: 2138755 events read in total (93090ms).
[14:00:58.381] <TB3> INFO: 2843810 events read in total (124225ms).
[14:01:29.180] <TB3> INFO: 3547400 events read in total (155024ms).
[14:01:56.003] <TB3> INFO: 4160000 events read in total (181847ms).
[14:01:56.083] <TB3> INFO: Test took 182780ms.
[14:02:21.790] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[14:02:21.809] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[14:02:21.809] <TB3> INFO: run 1 of 1
[14:02:22.084] <TB3> INFO: Expecting 4222400 events.
[14:02:53.761] <TB3> INFO: 714080 events read in total (31086ms).
[14:03:24.932] <TB3> INFO: 1423695 events read in total (62257ms).
[14:03:55.824] <TB3> INFO: 2128785 events read in total (93149ms).
[14:04:26.239] <TB3> INFO: 2830480 events read in total (123564ms).
[14:04:57.352] <TB3> INFO: 3530905 events read in total (154677ms).
[14:05:27.762] <TB3> INFO: 4222400 events read in total (185087ms).
[14:05:27.847] <TB3> INFO: Test took 186038ms.
[14:05:54.206] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:05:54.207] <TB3> INFO: PixTestTrim::doTest() done, duration: 2529 seconds
[14:05:54.207] <TB3> INFO: Decoding statistics:
[14:05:54.207] <TB3> INFO: General information:
[14:05:54.207] <TB3> INFO: 16bit words read: 0
[14:05:54.207] <TB3> INFO: valid events total: 0
[14:05:54.207] <TB3> INFO: empty events: 0
[14:05:54.207] <TB3> INFO: valid events with pixels: 0
[14:05:54.207] <TB3> INFO: valid pixel hits: 0
[14:05:54.207] <TB3> INFO: Event errors: 0
[14:05:54.207] <TB3> INFO: start marker: 0
[14:05:54.207] <TB3> INFO: stop marker: 0
[14:05:54.208] <TB3> INFO: overflow: 0
[14:05:54.208] <TB3> INFO: invalid 5bit words: 0
[14:05:54.208] <TB3> INFO: invalid XOR eye diagram: 0
[14:05:54.208] <TB3> INFO: frame (failed synchr.): 0
[14:05:54.208] <TB3> INFO: idle data (no TBM trl): 0
[14:05:54.208] <TB3> INFO: no data (only TBM hdr): 0
[14:05:54.208] <TB3> INFO: TBM errors: 0
[14:05:54.208] <TB3> INFO: flawed TBM headers: 0
[14:05:54.208] <TB3> INFO: flawed TBM trailers: 0
[14:05:54.208] <TB3> INFO: event ID mismatches: 0
[14:05:54.208] <TB3> INFO: ROC errors: 0
[14:05:54.208] <TB3> INFO: missing ROC header(s): 0
[14:05:54.208] <TB3> INFO: misplaced readback start: 0
[14:05:54.208] <TB3> INFO: Pixel decoding errors: 0
[14:05:54.208] <TB3> INFO: pixel data incomplete: 0
[14:05:54.208] <TB3> INFO: pixel address: 0
[14:05:54.208] <TB3> INFO: pulse height fill bit: 0
[14:05:54.208] <TB3> INFO: buffer corruption: 0
[14:05:54.913] <TB3> INFO: ######################################################################
[14:05:54.913] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:05:54.913] <TB3> INFO: ######################################################################
[14:05:55.157] <TB3> INFO: Expecting 41600 events.
[14:05:58.660] <TB3> INFO: 41600 events read in total (2911ms).
[14:05:58.661] <TB3> INFO: Test took 3746ms.
[14:05:59.102] <TB3> INFO: Expecting 41600 events.
[14:06:02.590] <TB3> INFO: 41600 events read in total (2896ms).
[14:06:02.591] <TB3> INFO: Test took 3727ms.
[14:06:02.896] <TB3> INFO: Expecting 41600 events.
[14:06:06.448] <TB3> INFO: 41600 events read in total (2961ms).
[14:06:06.449] <TB3> INFO: Test took 3834ms.
[14:06:06.741] <TB3> INFO: Expecting 41600 events.
[14:06:10.249] <TB3> INFO: 41600 events read in total (2916ms).
[14:06:10.250] <TB3> INFO: Test took 3774ms.
[14:06:10.543] <TB3> INFO: Expecting 41600 events.
[14:06:14.080] <TB3> INFO: 41600 events read in total (2945ms).
[14:06:14.081] <TB3> INFO: Test took 3803ms.
[14:06:14.369] <TB3> INFO: Expecting 41600 events.
[14:06:18.140] <TB3> INFO: 41600 events read in total (3179ms).
[14:06:18.141] <TB3> INFO: Test took 4036ms.
[14:06:18.431] <TB3> INFO: Expecting 41600 events.
[14:06:21.924] <TB3> INFO: 41600 events read in total (2902ms).
[14:06:21.925] <TB3> INFO: Test took 3759ms.
[14:06:22.215] <TB3> INFO: Expecting 41600 events.
[14:06:25.698] <TB3> INFO: 41600 events read in total (2891ms).
[14:06:25.699] <TB3> INFO: Test took 3749ms.
[14:06:25.989] <TB3> INFO: Expecting 41600 events.
[14:06:29.483] <TB3> INFO: 41600 events read in total (2903ms).
[14:06:29.484] <TB3> INFO: Test took 3760ms.
[14:06:29.776] <TB3> INFO: Expecting 41600 events.
[14:06:33.296] <TB3> INFO: 41600 events read in total (2929ms).
[14:06:33.297] <TB3> INFO: Test took 3786ms.
[14:06:33.586] <TB3> INFO: Expecting 41600 events.
[14:06:37.107] <TB3> INFO: 41600 events read in total (2929ms).
[14:06:37.108] <TB3> INFO: Test took 3787ms.
[14:06:37.398] <TB3> INFO: Expecting 41600 events.
[14:06:40.915] <TB3> INFO: 41600 events read in total (2925ms).
[14:06:40.916] <TB3> INFO: Test took 3783ms.
[14:06:41.206] <TB3> INFO: Expecting 41600 events.
[14:06:44.841] <TB3> INFO: 41600 events read in total (3043ms).
[14:06:44.842] <TB3> INFO: Test took 3902ms.
[14:06:45.131] <TB3> INFO: Expecting 41600 events.
[14:06:48.802] <TB3> INFO: 41600 events read in total (3079ms).
[14:06:48.803] <TB3> INFO: Test took 3937ms.
[14:06:49.092] <TB3> INFO: Expecting 41600 events.
[14:06:52.614] <TB3> INFO: 41600 events read in total (2930ms).
[14:06:52.614] <TB3> INFO: Test took 3787ms.
[14:06:52.904] <TB3> INFO: Expecting 41600 events.
[14:06:56.391] <TB3> INFO: 41600 events read in total (2896ms).
[14:06:56.391] <TB3> INFO: Test took 3753ms.
[14:06:56.681] <TB3> INFO: Expecting 41600 events.
[14:07:00.199] <TB3> INFO: 41600 events read in total (2927ms).
[14:07:00.199] <TB3> INFO: Test took 3784ms.
[14:07:00.489] <TB3> INFO: Expecting 41600 events.
[14:07:03.974] <TB3> INFO: 41600 events read in total (2893ms).
[14:07:03.975] <TB3> INFO: Test took 3751ms.
[14:07:04.266] <TB3> INFO: Expecting 41600 events.
[14:07:07.778] <TB3> INFO: 41600 events read in total (2920ms).
[14:07:07.779] <TB3> INFO: Test took 3779ms.
[14:07:08.067] <TB3> INFO: Expecting 41600 events.
[14:07:11.667] <TB3> INFO: 41600 events read in total (3008ms).
[14:07:11.668] <TB3> INFO: Test took 3865ms.
[14:07:11.958] <TB3> INFO: Expecting 41600 events.
[14:07:15.524] <TB3> INFO: 41600 events read in total (2975ms).
[14:07:15.525] <TB3> INFO: Test took 3833ms.
[14:07:15.815] <TB3> INFO: Expecting 41600 events.
[14:07:19.419] <TB3> INFO: 41600 events read in total (3012ms).
[14:07:19.420] <TB3> INFO: Test took 3871ms.
[14:07:19.709] <TB3> INFO: Expecting 41600 events.
[14:07:23.231] <TB3> INFO: 41600 events read in total (2931ms).
[14:07:23.232] <TB3> INFO: Test took 3788ms.
[14:07:23.524] <TB3> INFO: Expecting 41600 events.
[14:07:27.051] <TB3> INFO: 41600 events read in total (2935ms).
[14:07:27.053] <TB3> INFO: Test took 3794ms.
[14:07:27.344] <TB3> INFO: Expecting 41600 events.
[14:07:30.848] <TB3> INFO: 41600 events read in total (2913ms).
[14:07:30.849] <TB3> INFO: Test took 3770ms.
[14:07:31.140] <TB3> INFO: Expecting 41600 events.
[14:07:34.708] <TB3> INFO: 41600 events read in total (2977ms).
[14:07:34.709] <TB3> INFO: Test took 3834ms.
[14:07:35.015] <TB3> INFO: Expecting 41600 events.
[14:07:38.621] <TB3> INFO: 41600 events read in total (3014ms).
[14:07:38.622] <TB3> INFO: Test took 3889ms.
[14:07:38.927] <TB3> INFO: Expecting 41600 events.
[14:07:42.667] <TB3> INFO: 41600 events read in total (3148ms).
[14:07:42.667] <TB3> INFO: Test took 4020ms.
[14:07:42.958] <TB3> INFO: Expecting 2560 events.
[14:07:43.845] <TB3> INFO: 2560 events read in total (295ms).
[14:07:43.845] <TB3> INFO: Test took 1165ms.
[14:07:44.152] <TB3> INFO: Expecting 2560 events.
[14:07:45.043] <TB3> INFO: 2560 events read in total (299ms).
[14:07:45.044] <TB3> INFO: Test took 1198ms.
[14:07:45.351] <TB3> INFO: Expecting 2560 events.
[14:07:46.244] <TB3> INFO: 2560 events read in total (301ms).
[14:07:46.244] <TB3> INFO: Test took 1200ms.
[14:07:46.552] <TB3> INFO: Expecting 2560 events.
[14:07:47.438] <TB3> INFO: 2560 events read in total (295ms).
[14:07:47.438] <TB3> INFO: Test took 1193ms.
[14:07:47.747] <TB3> INFO: Expecting 2560 events.
[14:07:48.629] <TB3> INFO: 2560 events read in total (290ms).
[14:07:48.629] <TB3> INFO: Test took 1191ms.
[14:07:48.936] <TB3> INFO: Expecting 2560 events.
[14:07:49.820] <TB3> INFO: 2560 events read in total (292ms).
[14:07:49.820] <TB3> INFO: Test took 1190ms.
[14:07:50.127] <TB3> INFO: Expecting 2560 events.
[14:07:51.007] <TB3> INFO: 2560 events read in total (288ms).
[14:07:51.007] <TB3> INFO: Test took 1186ms.
[14:07:51.315] <TB3> INFO: Expecting 2560 events.
[14:07:52.197] <TB3> INFO: 2560 events read in total (290ms).
[14:07:52.197] <TB3> INFO: Test took 1190ms.
[14:07:52.505] <TB3> INFO: Expecting 2560 events.
[14:07:53.384] <TB3> INFO: 2560 events read in total (287ms).
[14:07:53.384] <TB3> INFO: Test took 1186ms.
[14:07:53.692] <TB3> INFO: Expecting 2560 events.
[14:07:54.575] <TB3> INFO: 2560 events read in total (291ms).
[14:07:54.575] <TB3> INFO: Test took 1190ms.
[14:07:54.883] <TB3> INFO: Expecting 2560 events.
[14:07:55.765] <TB3> INFO: 2560 events read in total (291ms).
[14:07:55.766] <TB3> INFO: Test took 1191ms.
[14:07:56.073] <TB3> INFO: Expecting 2560 events.
[14:07:56.957] <TB3> INFO: 2560 events read in total (292ms).
[14:07:56.957] <TB3> INFO: Test took 1191ms.
[14:07:57.266] <TB3> INFO: Expecting 2560 events.
[14:07:58.155] <TB3> INFO: 2560 events read in total (298ms).
[14:07:58.155] <TB3> INFO: Test took 1197ms.
[14:07:58.463] <TB3> INFO: Expecting 2560 events.
[14:07:59.354] <TB3> INFO: 2560 events read in total (299ms).
[14:07:59.354] <TB3> INFO: Test took 1199ms.
[14:07:59.662] <TB3> INFO: Expecting 2560 events.
[14:08:00.547] <TB3> INFO: 2560 events read in total (293ms).
[14:08:00.547] <TB3> INFO: Test took 1193ms.
[14:08:00.854] <TB3> INFO: Expecting 2560 events.
[14:08:01.743] <TB3> INFO: 2560 events read in total (297ms).
[14:08:01.743] <TB3> INFO: Test took 1196ms.
[14:08:01.747] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:08:02.052] <TB3> INFO: Expecting 655360 events.
[14:08:17.138] <TB3> INFO: 655360 events read in total (14494ms).
[14:08:17.150] <TB3> INFO: Expecting 655360 events.
[14:08:31.677] <TB3> INFO: 655360 events read in total (14124ms).
[14:08:31.693] <TB3> INFO: Expecting 655360 events.
[14:08:46.458] <TB3> INFO: 655360 events read in total (14362ms).
[14:08:46.484] <TB3> INFO: Expecting 655360 events.
[14:09:00.000] <TB3> INFO: 655360 events read in total (14113ms).
[14:09:01.025] <TB3> INFO: Expecting 655360 events.
[14:09:15.480] <TB3> INFO: 655360 events read in total (14052ms).
[14:09:15.510] <TB3> INFO: Expecting 655360 events.
[14:09:30.205] <TB3> INFO: 655360 events read in total (14293ms).
[14:09:30.241] <TB3> INFO: Expecting 655360 events.
[14:09:44.730] <TB3> INFO: 655360 events read in total (14086ms).
[14:09:44.785] <TB3> INFO: Expecting 655360 events.
[14:09:59.456] <TB3> INFO: 655360 events read in total (14268ms).
[14:09:59.528] <TB3> INFO: Expecting 655360 events.
[14:10:13.807] <TB3> INFO: 655360 events read in total (13876ms).
[14:10:13.867] <TB3> INFO: Expecting 655360 events.
[14:10:28.618] <TB3> INFO: 655360 events read in total (14347ms).
[14:10:28.681] <TB3> INFO: Expecting 655360 events.
[14:10:43.469] <TB3> INFO: 655360 events read in total (14385ms).
[14:10:43.563] <TB3> INFO: Expecting 655360 events.
[14:10:58.303] <TB3> INFO: 655360 events read in total (14337ms).
[14:10:58.379] <TB3> INFO: Expecting 655360 events.
[14:11:13.106] <TB3> INFO: 655360 events read in total (14324ms).
[14:11:13.188] <TB3> INFO: Expecting 655360 events.
[14:11:27.887] <TB3> INFO: 655360 events read in total (14297ms).
[14:11:28.015] <TB3> INFO: Expecting 655360 events.
[14:11:42.817] <TB3> INFO: 655360 events read in total (14399ms).
[14:11:42.941] <TB3> INFO: Expecting 655360 events.
[14:11:57.547] <TB3> INFO: 655360 events read in total (14203ms).
[14:11:57.688] <TB3> INFO: Test took 235941ms.
[14:11:57.805] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:11:58.058] <TB3> INFO: Expecting 655360 events.
[14:12:12.710] <TB3> INFO: 655360 events read in total (14060ms).
[14:12:12.722] <TB3> INFO: Expecting 655360 events.
[14:12:27.267] <TB3> INFO: 655360 events read in total (14142ms).
[14:12:27.287] <TB3> INFO: Expecting 655360 events.
[14:12:42.011] <TB3> INFO: 655360 events read in total (14321ms).
[14:12:42.037] <TB3> INFO: Expecting 655360 events.
[14:12:56.738] <TB3> INFO: 655360 events read in total (14298ms).
[14:12:56.764] <TB3> INFO: Expecting 655360 events.
[14:13:11.272] <TB3> INFO: 655360 events read in total (14105ms).
[14:13:11.305] <TB3> INFO: Expecting 655360 events.
[14:13:25.891] <TB3> INFO: 655360 events read in total (14183ms).
[14:13:25.931] <TB3> INFO: Expecting 655360 events.
[14:13:40.319] <TB3> INFO: 655360 events read in total (13985ms).
[14:13:40.369] <TB3> INFO: Expecting 655360 events.
[14:13:54.863] <TB3> INFO: 655360 events read in total (14091ms).
[14:13:54.922] <TB3> INFO: Expecting 655360 events.
[14:14:09.387] <TB3> INFO: 655360 events read in total (14061ms).
[14:14:09.436] <TB3> INFO: Expecting 655360 events.
[14:14:23.902] <TB3> INFO: 655360 events read in total (14063ms).
[14:14:23.968] <TB3> INFO: Expecting 655360 events.
[14:14:38.341] <TB3> INFO: 655360 events read in total (13970ms).
[14:14:38.428] <TB3> INFO: Expecting 655360 events.
[14:14:52.915] <TB3> INFO: 655360 events read in total (14084ms).
[14:14:52.989] <TB3> INFO: Expecting 655360 events.
[14:15:07.549] <TB3> INFO: 655360 events read in total (14157ms).
[14:15:07.635] <TB3> INFO: Expecting 655360 events.
[14:15:22.295] <TB3> INFO: 655360 events read in total (14257ms).
[14:15:22.428] <TB3> INFO: Expecting 655360 events.
[14:15:37.048] <TB3> INFO: 655360 events read in total (14217ms).
[14:15:37.176] <TB3> INFO: Expecting 655360 events.
[14:15:51.659] <TB3> INFO: 655360 events read in total (14080ms).
[14:15:51.755] <TB3> INFO: Test took 233950ms.
[14:15:51.935] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.941] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.947] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.953] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.959] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.965] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:51.970] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:15:51.976] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:15:51.982] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:15:51.988] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:15:51.994] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:15:51.999] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:15:52.005] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[14:15:52.010] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[14:15:52.016] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[14:15:52.022] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.027] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.033] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.039] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.045] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.050] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.056] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.062] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:15:52.067] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:15:52.073] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.079] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.085] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:15:52.090] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:15:52.096] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:15:52.132] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C0.dat
[14:15:52.132] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C1.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C2.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C3.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C4.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C5.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C6.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C7.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C8.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C9.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C10.dat
[14:15:52.133] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C11.dat
[14:15:52.134] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C12.dat
[14:15:52.134] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C13.dat
[14:15:52.134] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C14.dat
[14:15:52.134] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//dacParameters35_C15.dat
[14:15:52.374] <TB3> INFO: Expecting 41600 events.
[14:15:55.527] <TB3> INFO: 41600 events read in total (2561ms).
[14:15:55.528] <TB3> INFO: Test took 3391ms.
[14:15:55.992] <TB3> INFO: Expecting 41600 events.
[14:15:59.090] <TB3> INFO: 41600 events read in total (2506ms).
[14:15:59.091] <TB3> INFO: Test took 3348ms.
[14:15:59.545] <TB3> INFO: Expecting 41600 events.
[14:16:02.680] <TB3> INFO: 41600 events read in total (2543ms).
[14:16:02.681] <TB3> INFO: Test took 3375ms.
[14:16:02.896] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:02.985] <TB3> INFO: Expecting 2560 events.
[14:16:03.879] <TB3> INFO: 2560 events read in total (302ms).
[14:16:03.879] <TB3> INFO: Test took 983ms.
[14:16:03.881] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:04.187] <TB3> INFO: Expecting 2560 events.
[14:16:05.076] <TB3> INFO: 2560 events read in total (297ms).
[14:16:05.076] <TB3> INFO: Test took 1195ms.
[14:16:05.079] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:05.385] <TB3> INFO: Expecting 2560 events.
[14:16:06.275] <TB3> INFO: 2560 events read in total (298ms).
[14:16:06.275] <TB3> INFO: Test took 1196ms.
[14:16:06.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:06.583] <TB3> INFO: Expecting 2560 events.
[14:16:07.468] <TB3> INFO: 2560 events read in total (293ms).
[14:16:07.468] <TB3> INFO: Test took 1191ms.
[14:16:07.471] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:07.778] <TB3> INFO: Expecting 2560 events.
[14:16:08.669] <TB3> INFO: 2560 events read in total (300ms).
[14:16:08.670] <TB3> INFO: Test took 1199ms.
[14:16:08.672] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:08.978] <TB3> INFO: Expecting 2560 events.
[14:16:09.865] <TB3> INFO: 2560 events read in total (296ms).
[14:16:09.866] <TB3> INFO: Test took 1194ms.
[14:16:09.868] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:10.174] <TB3> INFO: Expecting 2560 events.
[14:16:11.061] <TB3> INFO: 2560 events read in total (295ms).
[14:16:11.061] <TB3> INFO: Test took 1193ms.
[14:16:11.064] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:11.371] <TB3> INFO: Expecting 2560 events.
[14:16:12.265] <TB3> INFO: 2560 events read in total (303ms).
[14:16:12.265] <TB3> INFO: Test took 1201ms.
[14:16:12.268] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:12.574] <TB3> INFO: Expecting 2560 events.
[14:16:13.467] <TB3> INFO: 2560 events read in total (302ms).
[14:16:13.467] <TB3> INFO: Test took 1199ms.
[14:16:13.471] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:13.775] <TB3> INFO: Expecting 2560 events.
[14:16:14.659] <TB3> INFO: 2560 events read in total (293ms).
[14:16:14.659] <TB3> INFO: Test took 1188ms.
[14:16:14.664] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:14.966] <TB3> INFO: Expecting 2560 events.
[14:16:15.854] <TB3> INFO: 2560 events read in total (296ms).
[14:16:15.854] <TB3> INFO: Test took 1190ms.
[14:16:15.858] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:16.164] <TB3> INFO: Expecting 2560 events.
[14:16:17.055] <TB3> INFO: 2560 events read in total (300ms).
[14:16:17.056] <TB3> INFO: Test took 1198ms.
[14:16:17.059] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:17.363] <TB3> INFO: Expecting 2560 events.
[14:16:18.247] <TB3> INFO: 2560 events read in total (292ms).
[14:16:18.247] <TB3> INFO: Test took 1188ms.
[14:16:18.250] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:18.555] <TB3> INFO: Expecting 2560 events.
[14:16:19.440] <TB3> INFO: 2560 events read in total (293ms).
[14:16:19.440] <TB3> INFO: Test took 1191ms.
[14:16:19.442] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:19.749] <TB3> INFO: Expecting 2560 events.
[14:16:20.632] <TB3> INFO: 2560 events read in total (291ms).
[14:16:20.633] <TB3> INFO: Test took 1191ms.
[14:16:20.637] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:20.941] <TB3> INFO: Expecting 2560 events.
[14:16:21.827] <TB3> INFO: 2560 events read in total (294ms).
[14:16:21.827] <TB3> INFO: Test took 1190ms.
[14:16:21.830] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:22.135] <TB3> INFO: Expecting 2560 events.
[14:16:23.015] <TB3> INFO: 2560 events read in total (288ms).
[14:16:23.015] <TB3> INFO: Test took 1185ms.
[14:16:23.020] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:23.324] <TB3> INFO: Expecting 2560 events.
[14:16:24.211] <TB3> INFO: 2560 events read in total (296ms).
[14:16:24.211] <TB3> INFO: Test took 1191ms.
[14:16:24.213] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:24.520] <TB3> INFO: Expecting 2560 events.
[14:16:25.401] <TB3> INFO: 2560 events read in total (290ms).
[14:16:25.402] <TB3> INFO: Test took 1189ms.
[14:16:25.406] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:25.709] <TB3> INFO: Expecting 2560 events.
[14:16:26.596] <TB3> INFO: 2560 events read in total (295ms).
[14:16:26.596] <TB3> INFO: Test took 1190ms.
[14:16:26.599] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:26.905] <TB3> INFO: Expecting 2560 events.
[14:16:27.796] <TB3> INFO: 2560 events read in total (299ms).
[14:16:27.797] <TB3> INFO: Test took 1199ms.
[14:16:27.801] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:28.105] <TB3> INFO: Expecting 2560 events.
[14:16:28.996] <TB3> INFO: 2560 events read in total (299ms).
[14:16:28.996] <TB3> INFO: Test took 1195ms.
[14:16:28.001] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:29.305] <TB3> INFO: Expecting 2560 events.
[14:16:30.196] <TB3> INFO: 2560 events read in total (299ms).
[14:16:30.196] <TB3> INFO: Test took 1195ms.
[14:16:30.199] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:30.505] <TB3> INFO: Expecting 2560 events.
[14:16:31.393] <TB3> INFO: 2560 events read in total (297ms).
[14:16:31.393] <TB3> INFO: Test took 1194ms.
[14:16:31.395] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:31.703] <TB3> INFO: Expecting 2560 events.
[14:16:32.596] <TB3> INFO: 2560 events read in total (301ms).
[14:16:32.596] <TB3> INFO: Test took 1201ms.
[14:16:32.601] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:32.905] <TB3> INFO: Expecting 2560 events.
[14:16:33.797] <TB3> INFO: 2560 events read in total (300ms).
[14:16:33.797] <TB3> INFO: Test took 1197ms.
[14:16:33.801] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:34.105] <TB3> INFO: Expecting 2560 events.
[14:16:34.998] <TB3> INFO: 2560 events read in total (301ms).
[14:16:34.998] <TB3> INFO: Test took 1197ms.
[14:16:35.003] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:35.306] <TB3> INFO: Expecting 2560 events.
[14:16:36.197] <TB3> INFO: 2560 events read in total (299ms).
[14:16:36.197] <TB3> INFO: Test took 1194ms.
[14:16:36.201] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:36.504] <TB3> INFO: Expecting 2560 events.
[14:16:37.394] <TB3> INFO: 2560 events read in total (298ms).
[14:16:37.394] <TB3> INFO: Test took 1193ms.
[14:16:37.399] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:37.702] <TB3> INFO: Expecting 2560 events.
[14:16:38.597] <TB3> INFO: 2560 events read in total (303ms).
[14:16:38.598] <TB3> INFO: Test took 1199ms.
[14:16:38.602] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:38.906] <TB3> INFO: Expecting 2560 events.
[14:16:39.789] <TB3> INFO: 2560 events read in total (291ms).
[14:16:39.789] <TB3> INFO: Test took 1187ms.
[14:16:39.791] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:16:40.098] <TB3> INFO: Expecting 2560 events.
[14:16:40.985] <TB3> INFO: 2560 events read in total (295ms).
[14:16:40.985] <TB3> INFO: Test took 1194ms.
[14:16:41.469] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[14:16:41.469] <TB3> INFO: PH scale (per ROC): 57 52 53 62 60 60 69 56 61 41 38 60 60 59 50 62
[14:16:41.469] <TB3> INFO: PH offset (per ROC): 126 121 113 135 130 112 132 126 125 102 110 134 131 131 112 130
[14:16:41.477] <TB3> INFO: Decoding statistics:
[14:16:41.477] <TB3> INFO: General information:
[14:16:41.477] <TB3> INFO: 16bit words read: 127882
[14:16:41.477] <TB3> INFO: valid events total: 20480
[14:16:41.477] <TB3> INFO: empty events: 17979
[14:16:41.477] <TB3> INFO: valid events with pixels: 2501
[14:16:41.477] <TB3> INFO: valid pixel hits: 2501
[14:16:41.477] <TB3> INFO: Event errors: 0
[14:16:41.477] <TB3> INFO: start marker: 0
[14:16:41.477] <TB3> INFO: stop marker: 0
[14:16:41.477] <TB3> INFO: overflow: 0
[14:16:41.477] <TB3> INFO: invalid 5bit words: 0
[14:16:41.477] <TB3> INFO: invalid XOR eye diagram: 0
[14:16:41.477] <TB3> INFO: frame (failed synchr.): 0
[14:16:41.477] <TB3> INFO: idle data (no TBM trl): 0
[14:16:41.477] <TB3> INFO: no data (only TBM hdr): 0
[14:16:41.477] <TB3> INFO: TBM errors: 0
[14:16:41.477] <TB3> INFO: flawed TBM headers: 0
[14:16:41.477] <TB3> INFO: flawed TBM trailers: 0
[14:16:41.477] <TB3> INFO: event ID mismatches: 0
[14:16:41.477] <TB3> INFO: ROC errors: 0
[14:16:41.477] <TB3> INFO: missing ROC header(s): 0
[14:16:41.477] <TB3> INFO: misplaced readback start: 0
[14:16:41.477] <TB3> INFO: Pixel decoding errors: 0
[14:16:41.477] <TB3> INFO: pixel data incomplete: 0
[14:16:41.477] <TB3> INFO: pixel address: 0
[14:16:41.477] <TB3> INFO: pulse height fill bit: 0
[14:16:41.477] <TB3> INFO: buffer corruption: 0
[14:16:41.639] <TB3> INFO: ######################################################################
[14:16:41.640] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:16:41.640] <TB3> INFO: ######################################################################
[14:16:41.654] <TB3> INFO: scanning low vcal = 10
[14:16:41.889] <TB3> INFO: Expecting 41600 events.
[14:16:45.492] <TB3> INFO: 41600 events read in total (3011ms).
[14:16:45.492] <TB3> INFO: Test took 3838ms.
[14:16:45.494] <TB3> INFO: scanning low vcal = 20
[14:16:45.785] <TB3> INFO: Expecting 41600 events.
[14:16:49.354] <TB3> INFO: 41600 events read in total (2977ms).
[14:16:49.355] <TB3> INFO: Test took 3861ms.
[14:16:49.356] <TB3> INFO: scanning low vcal = 30
[14:16:49.655] <TB3> INFO: Expecting 41600 events.
[14:16:53.358] <TB3> INFO: 41600 events read in total (3111ms).
[14:16:53.358] <TB3> INFO: Test took 4002ms.
[14:16:53.361] <TB3> INFO: scanning low vcal = 40
[14:16:53.638] <TB3> INFO: Expecting 41600 events.
[14:16:57.581] <TB3> INFO: 41600 events read in total (3351ms).
[14:16:57.582] <TB3> INFO: Test took 4221ms.
[14:16:57.585] <TB3> INFO: scanning low vcal = 50
[14:16:57.863] <TB3> INFO: Expecting 41600 events.
[14:17:01.819] <TB3> INFO: 41600 events read in total (3365ms).
[14:17:01.820] <TB3> INFO: Test took 4235ms.
[14:17:01.823] <TB3> INFO: scanning low vcal = 60
[14:17:02.102] <TB3> INFO: Expecting 41600 events.
[14:17:06.083] <TB3> INFO: 41600 events read in total (3389ms).
[14:17:06.084] <TB3> INFO: Test took 4261ms.
[14:17:06.087] <TB3> INFO: scanning low vcal = 70
[14:17:06.365] <TB3> INFO: Expecting 41600 events.
[14:17:10.338] <TB3> INFO: 41600 events read in total (3382ms).
[14:17:10.339] <TB3> INFO: Test took 4251ms.
[14:17:10.342] <TB3> INFO: scanning low vcal = 80
[14:17:10.622] <TB3> INFO: Expecting 41600 events.
[14:17:14.608] <TB3> INFO: 41600 events read in total (3394ms).
[14:17:14.609] <TB3> INFO: Test took 4267ms.
[14:17:14.612] <TB3> INFO: scanning low vcal = 90
[14:17:14.893] <TB3> INFO: Expecting 41600 events.
[14:17:18.844] <TB3> INFO: 41600 events read in total (3359ms).
[14:17:18.846] <TB3> INFO: Test took 4234ms.
[14:17:18.851] <TB3> INFO: scanning low vcal = 100
[14:17:19.126] <TB3> INFO: Expecting 41600 events.
[14:17:23.120] <TB3> INFO: 41600 events read in total (3402ms).
[14:17:23.121] <TB3> INFO: Test took 4270ms.
[14:17:23.124] <TB3> INFO: scanning low vcal = 110
[14:17:23.402] <TB3> INFO: Expecting 41600 events.
[14:17:27.427] <TB3> INFO: 41600 events read in total (3434ms).
[14:17:27.428] <TB3> INFO: Test took 4304ms.
[14:17:27.431] <TB3> INFO: scanning low vcal = 120
[14:17:27.708] <TB3> INFO: Expecting 41600 events.
[14:17:31.684] <TB3> INFO: 41600 events read in total (3384ms).
[14:17:31.685] <TB3> INFO: Test took 4254ms.
[14:17:31.689] <TB3> INFO: scanning low vcal = 130
[14:17:31.968] <TB3> INFO: Expecting 41600 events.
[14:17:35.950] <TB3> INFO: 41600 events read in total (3391ms).
[14:17:35.951] <TB3> INFO: Test took 4262ms.
[14:17:35.955] <TB3> INFO: scanning low vcal = 140
[14:17:36.231] <TB3> INFO: Expecting 41600 events.
[14:17:40.229] <TB3> INFO: 41600 events read in total (3406ms).
[14:17:40.230] <TB3> INFO: Test took 4275ms.
[14:17:40.233] <TB3> INFO: scanning low vcal = 150
[14:17:40.510] <TB3> INFO: Expecting 41600 events.
[14:17:44.494] <TB3> INFO: 41600 events read in total (3392ms).
[14:17:44.495] <TB3> INFO: Test took 4262ms.
[14:17:44.498] <TB3> INFO: scanning low vcal = 160
[14:17:44.776] <TB3> INFO: Expecting 41600 events.
[14:17:48.753] <TB3> INFO: 41600 events read in total (3386ms).
[14:17:48.754] <TB3> INFO: Test took 4256ms.
[14:17:48.757] <TB3> INFO: scanning low vcal = 170
[14:17:49.034] <TB3> INFO: Expecting 41600 events.
[14:17:52.986] <TB3> INFO: 41600 events read in total (3361ms).
[14:17:52.987] <TB3> INFO: Test took 4230ms.
[14:17:52.992] <TB3> INFO: scanning low vcal = 180
[14:17:53.266] <TB3> INFO: Expecting 41600 events.
[14:17:57.200] <TB3> INFO: 41600 events read in total (3342ms).
[14:17:57.201] <TB3> INFO: Test took 4209ms.
[14:17:57.204] <TB3> INFO: scanning low vcal = 190
[14:17:57.481] <TB3> INFO: Expecting 41600 events.
[14:18:01.424] <TB3> INFO: 41600 events read in total (3352ms).
[14:18:01.425] <TB3> INFO: Test took 4221ms.
[14:18:01.428] <TB3> INFO: scanning low vcal = 200
[14:18:01.707] <TB3> INFO: Expecting 41600 events.
[14:18:05.693] <TB3> INFO: 41600 events read in total (3392ms).
[14:18:05.695] <TB3> INFO: Test took 4267ms.
[14:18:05.698] <TB3> INFO: scanning low vcal = 210
[14:18:05.974] <TB3> INFO: Expecting 41600 events.
[14:18:09.000] <TB3> INFO: 41600 events read in total (3434ms).
[14:18:09.001] <TB3> INFO: Test took 4302ms.
[14:18:10.005] <TB3> INFO: scanning low vcal = 220
[14:18:10.329] <TB3> INFO: Expecting 41600 events.
[14:18:14.348] <TB3> INFO: 41600 events read in total (3427ms).
[14:18:14.349] <TB3> INFO: Test took 4344ms.
[14:18:14.352] <TB3> INFO: scanning low vcal = 230
[14:18:14.636] <TB3> INFO: Expecting 41600 events.
[14:18:18.597] <TB3> INFO: 41600 events read in total (3369ms).
[14:18:18.598] <TB3> INFO: Test took 4245ms.
[14:18:18.602] <TB3> INFO: scanning low vcal = 240
[14:18:18.878] <TB3> INFO: Expecting 41600 events.
[14:18:22.848] <TB3> INFO: 41600 events read in total (3378ms).
[14:18:22.849] <TB3> INFO: Test took 4247ms.
[14:18:22.854] <TB3> INFO: scanning low vcal = 250
[14:18:23.129] <TB3> INFO: Expecting 41600 events.
[14:18:27.100] <TB3> INFO: 41600 events read in total (3379ms).
[14:18:27.101] <TB3> INFO: Test took 4247ms.
[14:18:27.107] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:18:27.398] <TB3> INFO: Expecting 41600 events.
[14:18:31.393] <TB3> INFO: 41600 events read in total (3403ms).
[14:18:31.394] <TB3> INFO: Test took 4287ms.
[14:18:31.397] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:18:31.673] <TB3> INFO: Expecting 41600 events.
[14:18:35.666] <TB3> INFO: 41600 events read in total (3401ms).
[14:18:35.666] <TB3> INFO: Test took 4269ms.
[14:18:35.669] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:18:35.946] <TB3> INFO: Expecting 41600 events.
[14:18:39.946] <TB3> INFO: 41600 events read in total (3409ms).
[14:18:39.947] <TB3> INFO: Test took 4277ms.
[14:18:39.952] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:18:40.255] <TB3> INFO: Expecting 41600 events.
[14:18:44.234] <TB3> INFO: 41600 events read in total (3388ms).
[14:18:44.234] <TB3> INFO: Test took 4282ms.
[14:18:44.238] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:18:44.514] <TB3> INFO: Expecting 41600 events.
[14:18:48.496] <TB3> INFO: 41600 events read in total (3390ms).
[14:18:48.497] <TB3> INFO: Test took 4259ms.
[14:18:49.031] <TB3> INFO: PixTestGainPedestal::measure() done
[14:19:22.560] <TB3> INFO: PixTestGainPedestal::fit() done
[14:19:22.560] <TB3> INFO: non-linearity mean: 0.981 0.978 0.980 0.986 0.982 0.982 0.985 0.977 0.985 0.995 0.924 0.980 0.978 0.983 0.978 0.984
[14:19:22.560] <TB3> INFO: non-linearity RMS: 0.004 0.003 0.004 0.003 0.003 0.003 0.003 0.006 0.003 0.164 0.128 0.005 0.004 0.004 0.010 0.003
[14:19:22.560] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[14:19:22.573] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[14:19:22.586] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[14:19:22.599] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[14:19:22.612] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[14:19:22.625] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[14:19:22.638] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[14:19:22.652] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[14:19:22.665] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[14:19:22.677] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[14:19:22.690] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[14:19:22.704] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[14:19:22.717] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[14:19:22.731] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[14:19:22.744] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[14:19:22.757] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1089_FullQualification_2016-10-26_12h02m_1477476121//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[14:19:22.770] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[14:19:22.770] <TB3> INFO: Decoding statistics:
[14:19:22.770] <TB3> INFO: General information:
[14:19:22.770] <TB3> INFO: 16bit words read: 3327724
[14:19:22.770] <TB3> INFO: valid events total: 332800
[14:19:22.770] <TB3> INFO: empty events: 0
[14:19:22.770] <TB3> INFO: valid events with pixels: 332800
[14:19:22.770] <TB3> INFO: valid pixel hits: 665462
[14:19:22.770] <TB3> INFO: Event errors: 0
[14:19:22.770] <TB3> INFO: start marker: 0
[14:19:22.770] <TB3> INFO: stop marker: 0
[14:19:22.770] <TB3> INFO: overflow: 0
[14:19:22.770] <TB3> INFO: invalid 5bit words: 0
[14:19:22.770] <TB3> INFO: invalid XOR eye diagram: 0
[14:19:22.770] <TB3> INFO: frame (failed synchr.): 0
[14:19:22.770] <TB3> INFO: idle data (no TBM trl): 0
[14:19:22.770] <TB3> INFO: no data (only TBM hdr): 0
[14:19:22.770] <TB3> INFO: TBM errors: 0
[14:19:22.770] <TB3> INFO: flawed TBM headers: 0
[14:19:22.770] <TB3> INFO: flawed TBM trailers: 0
[14:19:22.770] <TB3> INFO: event ID mismatches: 0
[14:19:22.770] <TB3> INFO: ROC errors: 0
[14:19:22.770] <TB3> INFO: missing ROC header(s): 0
[14:19:22.770] <TB3> INFO: misplaced readback start: 0
[14:19:22.770] <TB3> INFO: Pixel decoding errors: 0
[14:19:22.770] <TB3> INFO: pixel data incomplete: 0
[14:19:22.770] <TB3> INFO: pixel address: 0
[14:19:22.771] <TB3> INFO: pulse height fill bit: 0
[14:19:22.771] <TB3> INFO: buffer corruption: 0
[14:19:22.788] <TB3> INFO: Decoding statistics:
[14:19:22.788] <TB3> INFO: General information:
[14:19:22.788] <TB3> INFO: 16bit words read: 3457142
[14:19:22.788] <TB3> INFO: valid events total: 353536
[14:19:22.788] <TB3> INFO: empty events: 18235
[14:19:22.788] <TB3> INFO: valid events with pixels: 335301
[14:19:22.788] <TB3> INFO: valid pixel hits: 667963
[14:19:22.788] <TB3> INFO: Event errors: 0
[14:19:22.788] <TB3> INFO: start marker: 0
[14:19:22.788] <TB3> INFO: stop marker: 0
[14:19:22.788] <TB3> INFO: overflow: 0
[14:19:22.788] <TB3> INFO: invalid 5bit words: 0
[14:19:22.788] <TB3> INFO: invalid XOR eye diagram: 0
[14:19:22.788] <TB3> INFO: frame (failed synchr.): 0
[14:19:22.788] <TB3> INFO: idle data (no TBM trl): 0
[14:19:22.788] <TB3> INFO: no data (only TBM hdr): 0
[14:19:22.788] <TB3> INFO: TBM errors: 0
[14:19:22.788] <TB3> INFO: flawed TBM headers: 0
[14:19:22.788] <TB3> INFO: flawed TBM trailers: 0
[14:19:22.788] <TB3> INFO: event ID mismatches: 0
[14:19:22.788] <TB3> INFO: ROC errors: 0
[14:19:22.788] <TB3> INFO: missing ROC header(s): 0
[14:19:22.788] <TB3> INFO: misplaced readback start: 0
[14:19:22.788] <TB3> INFO: Pixel decoding errors: 0
[14:19:22.788] <TB3> INFO: pixel data incomplete: 0
[14:19:22.788] <TB3> INFO: pixel address: 0
[14:19:22.788] <TB3> INFO: pulse height fill bit: 0
[14:19:22.788] <TB3> INFO: buffer corruption: 0
[14:19:22.788] <TB3> INFO: enter test to run
[14:19:22.788] <TB3> INFO: test: exit no parameter change
[14:19:22.915] <TB3> QUIET: Connection to board 126 closed.
[14:19:22.916] <TB3> INFO: pXar: this is the end, my friend