[14:34:18.252] <TB0> INFO: *** Welcome to pxar ***
[14:34:18.252] <TB0> INFO: *** Today: 2016/10/26
[14:34:18.258] <TB0> INFO: *** Version: c8ba-dirty
[14:34:18.258] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C15.dat
[14:34:18.259] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[14:34:18.259] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//defaultMaskFile.dat
[14:34:18.259] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters_C15.dat
[14:34:18.319] <TB0> INFO: clk: 4
[14:34:18.319] <TB0> INFO: ctr: 4
[14:34:18.319] <TB0> INFO: sda: 19
[14:34:18.319] <TB0> INFO: tin: 9
[14:34:18.319] <TB0> INFO: level: 15
[14:34:18.319] <TB0> INFO: triggerdelay: 0
[14:34:18.319] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[14:34:18.319] <TB0> INFO: Log level: INFO
[14:34:18.328] <TB0> INFO: Found DTB DTB_WRQ4OZ
[14:34:18.338] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[14:34:18.340] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[14:34:18.342] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[14:34:19.829] <TB0> INFO: DUT info:
[14:34:19.829] <TB0> INFO: The DUT currently contains the following objects:
[14:34:19.829] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[14:34:19.829] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:34:19.829] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:34:19.829] <TB0> INFO: TBM Core alpha (2): 7 registers set
[14:34:19.829] <TB0> INFO: TBM Core beta (3): 7 registers set
[14:34:19.829] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[14:34:19.829] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:19.829] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:34:20.231] <TB0> INFO: enter 'restricted' command line mode
[14:34:20.231] <TB0> INFO: enter test to run
[14:34:20.231] <TB0> INFO: test: pretest no parameter change
[14:34:20.231] <TB0> INFO: running: pretest
[14:34:20.235] <TB0> INFO: ######################################################################
[14:34:20.235] <TB0> INFO: PixTestPretest::doTest()
[14:34:20.236] <TB0> INFO: ######################################################################
[14:34:20.237] <TB0> INFO: ----------------------------------------------------------------------
[14:34:20.237] <TB0> INFO: PixTestPretest::programROC()
[14:34:20.237] <TB0> INFO: ----------------------------------------------------------------------
[14:34:38.250] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:34:38.250] <TB0> INFO: IA differences per ROC: 17.7 20.9 20.1 20.1 18.5 17.7 20.9 20.1 19.3 20.1 20.1 19.3 20.1 17.7 20.1 17.7
[14:34:38.307] <TB0> INFO: ----------------------------------------------------------------------
[14:34:38.307] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:34:38.307] <TB0> INFO: ----------------------------------------------------------------------
[14:34:44.789] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 380.2 mA = 23.7625 mA/ROC
[14:34:44.789] <TB0> INFO: i(loss) [mA/ROC]: 18.4 19.3 19.3 19.3 19.3 18.4 18.4 19.3 18.4 19.3 19.3 18.4 19.3 18.4 18.4 19.3
[14:34:44.819] <TB0> INFO: ----------------------------------------------------------------------
[14:34:44.819] <TB0> INFO: PixTestPretest::findTiming()
[14:34:44.819] <TB0> INFO: ----------------------------------------------------------------------
[14:34:44.819] <TB0> INFO: PixTestCmd::init()

[14:35:17.471] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[14:35:17.471] <TB0> INFO: (success/tries = 100/100), width = 4
[14:35:18.974] <TB0> INFO: ----------------------------------------------------------------------
[14:35:18.974] <TB0> INFO: PixTestPretest::findWorkingPixel()
[14:35:18.974] <TB0> INFO: ----------------------------------------------------------------------
[14:35:19.070] <TB0> INFO: Expecting 231680 events.
[14:35:29.028] <TB0> INFO: 231680 events read in total (9366ms).
[14:35:29.036] <TB0> INFO: Test took 10056ms.
[14:35:29.274] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:35:29.310] <TB0> INFO: ----------------------------------------------------------------------
[14:35:29.310] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[14:35:29.310] <TB0> INFO: ----------------------------------------------------------------------
[14:35:29.410] <TB0> INFO: Expecting 231680 events.
[14:35:39.247] <TB0> INFO: 231680 events read in total (9245ms).
[14:35:39.257] <TB0> INFO: Test took 9936ms.
[14:35:39.516] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[14:35:39.516] <TB0> INFO: CalDel: 83 105 85 97 89 98 83 92 82 82 90 91 100 89 84 99
[14:35:39.516] <TB0> INFO: VthrComp: 51 52 51 54 52 54 52 56 51 51 51 51 51 51 53 51
[14:35:39.518] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C0.dat
[14:35:39.518] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C1.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C2.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C3.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C4.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C5.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C6.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C7.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C8.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C9.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C10.dat
[14:35:39.519] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C11.dat
[14:35:39.520] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C12.dat
[14:35:39.520] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C13.dat
[14:35:39.520] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C14.dat
[14:35:39.520] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters_C15.dat
[14:35:39.520] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C0a.dat
[14:35:39.520] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C0b.dat
[14:35:39.520] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C1a.dat
[14:35:39.520] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//tbmParameters_C1b.dat
[14:35:39.520] <TB0> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[14:35:39.583] <TB0> INFO: enter test to run
[14:35:39.583] <TB0> INFO: test: fulltest no parameter change
[14:35:39.583] <TB0> INFO: running: fulltest
[14:35:39.584] <TB0> INFO: ######################################################################
[14:35:39.584] <TB0> INFO: PixTestFullTest::doTest()
[14:35:39.584] <TB0> INFO: ######################################################################
[14:35:39.585] <TB0> INFO: ######################################################################
[14:35:39.585] <TB0> INFO: PixTestAlive::doTest()
[14:35:39.585] <TB0> INFO: ######################################################################
[14:35:39.586] <TB0> INFO: ----------------------------------------------------------------------
[14:35:39.586] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:35:39.586] <TB0> INFO: ----------------------------------------------------------------------
[14:35:39.827] <TB0> INFO: Expecting 41600 events.
[14:35:43.336] <TB0> INFO: 41600 events read in total (2917ms).
[14:35:43.337] <TB0> INFO: Test took 3750ms.
[14:35:43.568] <TB0> INFO: PixTestAlive::aliveTest() done
[14:35:43.568] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:35:43.570] <TB0> INFO: ----------------------------------------------------------------------
[14:35:43.570] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:35:43.570] <TB0> INFO: ----------------------------------------------------------------------
[14:35:43.814] <TB0> INFO: Expecting 41600 events.
[14:35:46.782] <TB0> INFO: 41600 events read in total (2376ms).
[14:35:46.782] <TB0> INFO: Test took 3209ms.
[14:35:46.782] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:35:47.020] <TB0> INFO: PixTestAlive::maskTest() done
[14:35:47.020] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:35:47.023] <TB0> INFO: ----------------------------------------------------------------------
[14:35:47.023] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:35:47.023] <TB0> INFO: ----------------------------------------------------------------------
[14:35:47.268] <TB0> INFO: Expecting 41600 events.
[14:35:50.785] <TB0> INFO: 41600 events read in total (2926ms).
[14:35:50.786] <TB0> INFO: Test took 3761ms.
[14:35:51.021] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[14:35:51.021] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:35:51.021] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:35:51.021] <TB0> INFO: Decoding statistics:
[14:35:51.021] <TB0> INFO: General information:
[14:35:51.021] <TB0> INFO: 16bit words read: 0
[14:35:51.021] <TB0> INFO: valid events total: 0
[14:35:51.021] <TB0> INFO: empty events: 0
[14:35:51.021] <TB0> INFO: valid events with pixels: 0
[14:35:51.021] <TB0> INFO: valid pixel hits: 0
[14:35:51.021] <TB0> INFO: Event errors: 0
[14:35:51.022] <TB0> INFO: start marker: 0
[14:35:51.022] <TB0> INFO: stop marker: 0
[14:35:51.022] <TB0> INFO: overflow: 0
[14:35:51.022] <TB0> INFO: invalid 5bit words: 0
[14:35:51.022] <TB0> INFO: invalid XOR eye diagram: 0
[14:35:51.022] <TB0> INFO: frame (failed synchr.): 0
[14:35:51.022] <TB0> INFO: idle data (no TBM trl): 0
[14:35:51.022] <TB0> INFO: no data (only TBM hdr): 0
[14:35:51.022] <TB0> INFO: TBM errors: 0
[14:35:51.022] <TB0> INFO: flawed TBM headers: 0
[14:35:51.022] <TB0> INFO: flawed TBM trailers: 0
[14:35:51.022] <TB0> INFO: event ID mismatches: 0
[14:35:51.022] <TB0> INFO: ROC errors: 0
[14:35:51.022] <TB0> INFO: missing ROC header(s): 0
[14:35:51.022] <TB0> INFO: misplaced readback start: 0
[14:35:51.022] <TB0> INFO: Pixel decoding errors: 0
[14:35:51.022] <TB0> INFO: pixel data incomplete: 0
[14:35:51.022] <TB0> INFO: pixel address: 0
[14:35:51.022] <TB0> INFO: pulse height fill bit: 0
[14:35:51.022] <TB0> INFO: buffer corruption: 0
[14:35:51.029] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:35:51.029] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr_C15.dat

[14:35:51.029] <TB0> INFO: ######################################################################
[14:35:51.030] <TB0> INFO: PixTestReadback::doTest()
[14:35:51.030] <TB0> INFO: ######################################################################
[14:35:51.030] <TB0> INFO: ----------------------------------------------------------------------
[14:35:51.030] <TB0> INFO: PixTestReadback::CalibrateVd()
[14:35:51.030] <TB0> INFO: ----------------------------------------------------------------------
[14:36:00.993] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:36:00.993] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:36:00.994] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:36:01.021] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:36:01.021] <TB0> INFO: ----------------------------------------------------------------------
[14:36:01.021] <TB0> INFO: PixTestReadback::CalibrateVa()
[14:36:01.021] <TB0> INFO: ----------------------------------------------------------------------
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:36:10.945] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:36:10.946] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:36:10.946] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:36:10.946] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:36:10.974] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:36:10.974] <TB0> INFO: ----------------------------------------------------------------------
[14:36:10.974] <TB0> INFO: PixTestReadback::readbackVbg()
[14:36:10.974] <TB0> INFO: ----------------------------------------------------------------------
[14:36:18.631] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:36:18.631] <TB0> INFO: ----------------------------------------------------------------------
[14:36:18.631] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[14:36:18.631] <TB0> INFO: ----------------------------------------------------------------------
[14:36:18.631] <TB0> INFO: Vbg will be calibrated using Vd calibration
[14:36:18.631] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 154.9calibrated Vbg = 1.1901 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.5calibrated Vbg = 1.18659 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.3calibrated Vbg = 1.18566 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 156.8calibrated Vbg = 1.18021 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.5calibrated Vbg = 1.18625 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 159.9calibrated Vbg = 1.18495 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151calibrated Vbg = 1.1896 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 165.9calibrated Vbg = 1.19239 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 159calibrated Vbg = 1.17912 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160.5calibrated Vbg = 1.18147 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 155calibrated Vbg = 1.17719 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.1calibrated Vbg = 1.17303 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 160calibrated Vbg = 1.17173 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 151.4calibrated Vbg = 1.17984 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 150.1calibrated Vbg = 1.18803 :::*/*/*/*/
[14:36:18.632] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 167.1calibrated Vbg = 1.18189 :::*/*/*/*/
[14:36:18.634] <TB0> INFO: ----------------------------------------------------------------------
[14:36:18.634] <TB0> INFO: PixTestReadback::CalibrateIa()
[14:36:18.634] <TB0> INFO: ----------------------------------------------------------------------
[14:38:59.496] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C0.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C1.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C2.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C3.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C4.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C5.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C6.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C7.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C8.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C9.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C10.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C11.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C12.dat
[14:38:59.497] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C13.dat
[14:38:59.498] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C14.dat
[14:38:59.498] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//readbackCal_C15.dat
[14:38:59.528] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[14:38:59.530] <TB0> INFO: PixTestReadback::doTest() done
[14:38:59.530] <TB0> INFO: Decoding statistics:
[14:38:59.531] <TB0> INFO: General information:
[14:38:59.531] <TB0> INFO: 16bit words read: 1536
[14:38:59.531] <TB0> INFO: valid events total: 256
[14:38:59.531] <TB0> INFO: empty events: 256
[14:38:59.531] <TB0> INFO: valid events with pixels: 0
[14:38:59.531] <TB0> INFO: valid pixel hits: 0
[14:38:59.531] <TB0> INFO: Event errors: 0
[14:38:59.531] <TB0> INFO: start marker: 0
[14:38:59.531] <TB0> INFO: stop marker: 0
[14:38:59.531] <TB0> INFO: overflow: 0
[14:38:59.531] <TB0> INFO: invalid 5bit words: 0
[14:38:59.531] <TB0> INFO: invalid XOR eye diagram: 0
[14:38:59.531] <TB0> INFO: frame (failed synchr.): 0
[14:38:59.531] <TB0> INFO: idle data (no TBM trl): 0
[14:38:59.531] <TB0> INFO: no data (only TBM hdr): 0
[14:38:59.531] <TB0> INFO: TBM errors: 0
[14:38:59.531] <TB0> INFO: flawed TBM headers: 0
[14:38:59.531] <TB0> INFO: flawed TBM trailers: 0
[14:38:59.531] <TB0> INFO: event ID mismatches: 0
[14:38:59.531] <TB0> INFO: ROC errors: 0
[14:38:59.531] <TB0> INFO: missing ROC header(s): 0
[14:38:59.531] <TB0> INFO: misplaced readback start: 0
[14:38:59.531] <TB0> INFO: Pixel decoding errors: 0
[14:38:59.531] <TB0> INFO: pixel data incomplete: 0
[14:38:59.531] <TB0> INFO: pixel address: 0
[14:38:59.531] <TB0> INFO: pulse height fill bit: 0
[14:38:59.531] <TB0> INFO: buffer corruption: 0
[14:38:59.599] <TB0> INFO: ######################################################################
[14:38:59.599] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:38:59.599] <TB0> INFO: ######################################################################
[14:38:59.602] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[14:38:59.617] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[14:38:59.617] <TB0> INFO: run 1 of 1
[14:38:59.899] <TB0> INFO: Expecting 3120000 events.
[14:39:31.116] <TB0> INFO: 667705 events read in total (30625ms).











[14:40:01.110] <TB0> INFO: 1335405 events read in total (60619ms).











[14:40:31.150] <TB0> INFO: 2002570 events read in total (90659ms).




















[14:41:01.265] <TB0> INFO: 2669120 events read in total (120774ms).











[14:41:21.628] <TB0> INFO: 3120000 events read in total (141138ms).
[14:41:21.702] <TB0> INFO: Test took 142086ms.
[14:41:46.928] <TB0> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[14:41:46.928] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:41:46.928] <TB0> INFO: separation cut (per ROC): 102 128 103 113 120 106 102 128 102 109 122 111 104 101 117 110
[14:41:46.928] <TB0> INFO: Decoding statistics:
[14:41:46.928] <TB0> INFO: General information:
[14:41:46.928] <TB0> INFO: 16bit words read: 0
[14:41:46.928] <TB0> INFO: valid events total: 0
[14:41:46.928] <TB0> INFO: empty events: 0
[14:41:46.928] <TB0> INFO: valid events with pixels: 0
[14:41:46.928] <TB0> INFO: valid pixel hits: 0
[14:41:46.928] <TB0> INFO: Event errors: 0
[14:41:46.929] <TB0> INFO: start marker: 0
[14:41:46.929] <TB0> INFO: stop marker: 0
[14:41:46.929] <TB0> INFO: overflow: 0
[14:41:46.929] <TB0> INFO: invalid 5bit words: 0
[14:41:46.929] <TB0> INFO: invalid XOR eye diagram: 0
[14:41:46.929] <TB0> INFO: frame (failed synchr.): 0
[14:41:46.929] <TB0> INFO: idle data (no TBM trl): 0
[14:41:46.929] <TB0> INFO: no data (only TBM hdr): 0
[14:41:46.929] <TB0> INFO: TBM errors: 0
[14:41:46.929] <TB0> INFO: flawed TBM headers: 0
[14:41:46.929] <TB0> INFO: flawed TBM trailers: 0
[14:41:46.929] <TB0> INFO: event ID mismatches: 0
[14:41:46.929] <TB0> INFO: ROC errors: 0
[14:41:46.929] <TB0> INFO: missing ROC header(s): 0
[14:41:46.929] <TB0> INFO: misplaced readback start: 0
[14:41:46.929] <TB0> INFO: Pixel decoding errors: 0
[14:41:46.929] <TB0> INFO: pixel data incomplete: 0
[14:41:46.929] <TB0> INFO: pixel address: 0
[14:41:46.929] <TB0> INFO: pulse height fill bit: 0
[14:41:46.929] <TB0> INFO: buffer corruption: 0
[14:41:46.965] <TB0> INFO: ######################################################################
[14:41:46.965] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:41:46.965] <TB0> INFO: ######################################################################
[14:41:46.966] <TB0> INFO: ----------------------------------------------------------------------
[14:41:46.966] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[14:41:46.966] <TB0> INFO: ----------------------------------------------------------------------
[14:41:46.966] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[14:41:46.981] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[14:41:46.981] <TB0> INFO: run 1 of 1
[14:41:47.306] <TB0> INFO: Expecting 36608000 events.
[14:42:11.394] <TB0> INFO: 693950 events read in total (23497ms).
[14:42:34.595] <TB0> INFO: 1372050 events read in total (46698ms).
[14:42:57.062] <TB0> INFO: 2048550 events read in total (69165ms).
[14:43:19.847] <TB0> INFO: 2724450 events read in total (91950ms).
[14:43:42.757] <TB0> INFO: 3397700 events read in total (114860ms).
[14:44:05.722] <TB0> INFO: 4073850 events read in total (137825ms).
[14:44:28.758] <TB0> INFO: 4748750 events read in total (160861ms).
[14:44:51.576] <TB0> INFO: 5422450 events read in total (183679ms).
[14:45:14.351] <TB0> INFO: 6096450 events read in total (206454ms).
[14:45:36.980] <TB0> INFO: 6770300 events read in total (229083ms).
[14:45:59.907] <TB0> INFO: 7443850 events read in total (252010ms).
[14:46:22.991] <TB0> INFO: 8119000 events read in total (275094ms).
[14:46:45.870] <TB0> INFO: 8793000 events read in total (297973ms).
[14:47:08.796] <TB0> INFO: 9467050 events read in total (320899ms).
[14:47:31.526] <TB0> INFO: 10140150 events read in total (343629ms).
[14:47:54.389] <TB0> INFO: 10811850 events read in total (366492ms).
[14:48:17.359] <TB0> INFO: 11482750 events read in total (389462ms).
[14:48:40.097] <TB0> INFO: 12154750 events read in total (412200ms).
[14:49:02.964] <TB0> INFO: 12825500 events read in total (435067ms).
[14:49:25.787] <TB0> INFO: 13496650 events read in total (457890ms).
[14:49:48.704] <TB0> INFO: 14166450 events read in total (480807ms).
[14:50:11.736] <TB0> INFO: 14838500 events read in total (503839ms).
[14:50:34.558] <TB0> INFO: 15509300 events read in total (526661ms).
[14:50:57.710] <TB0> INFO: 16178400 events read in total (549813ms).
[14:51:20.415] <TB0> INFO: 16845850 events read in total (572518ms).
[14:51:42.971] <TB0> INFO: 17514100 events read in total (595074ms).
[14:52:05.928] <TB0> INFO: 18181750 events read in total (618031ms).
[14:52:28.771] <TB0> INFO: 18848750 events read in total (640874ms).
[14:52:51.482] <TB0> INFO: 19515250 events read in total (663585ms).
[14:53:13.975] <TB0> INFO: 20182600 events read in total (686078ms).
[14:53:36.700] <TB0> INFO: 20847000 events read in total (708803ms).
[14:53:59.493] <TB0> INFO: 21512450 events read in total (731596ms).
[14:54:22.254] <TB0> INFO: 22176900 events read in total (754357ms).
[14:54:45.072] <TB0> INFO: 22842200 events read in total (777175ms).
[14:55:07.822] <TB0> INFO: 23509500 events read in total (799925ms).
[14:55:30.678] <TB0> INFO: 24174450 events read in total (822781ms).
[14:55:53.856] <TB0> INFO: 24840600 events read in total (845959ms).
[14:56:16.581] <TB0> INFO: 25504950 events read in total (868684ms).
[14:56:39.224] <TB0> INFO: 26169300 events read in total (891327ms).
[14:57:02.150] <TB0> INFO: 26833950 events read in total (914253ms).
[14:57:24.794] <TB0> INFO: 27498450 events read in total (936897ms).
[14:57:47.538] <TB0> INFO: 28160450 events read in total (959641ms).
[14:58:10.267] <TB0> INFO: 28823200 events read in total (982370ms).
[14:58:32.887] <TB0> INFO: 29485150 events read in total (1004990ms).
[14:58:55.467] <TB0> INFO: 30148450 events read in total (1027570ms).
[14:59:18.341] <TB0> INFO: 30814050 events read in total (1050444ms).
[14:59:41.111] <TB0> INFO: 31477050 events read in total (1073214ms).
[15:00:04.113] <TB0> INFO: 32140600 events read in total (1096216ms).
[15:00:26.939] <TB0> INFO: 32803050 events read in total (1119042ms).
[15:00:49.761] <TB0> INFO: 33466450 events read in total (1141864ms).
[15:01:12.426] <TB0> INFO: 34131250 events read in total (1164529ms).
[15:01:35.169] <TB0> INFO: 34794800 events read in total (1187272ms).
[15:01:58.241] <TB0> INFO: 35459350 events read in total (1210344ms).
[15:02:21.015] <TB0> INFO: 36128600 events read in total (1233118ms).
[15:02:36.950] <TB0> INFO: 36608000 events read in total (1249053ms).
[15:02:37.033] <TB0> INFO: Test took 1250052ms.
[15:02:37.737] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:39.640] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:41.507] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:43.245] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:44.826] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:46.379] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:47.945] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:50.045] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:51.647] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:53.564] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:55.552] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:57.709] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:59.748] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:03:01.723] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:03:03.770] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:03:05.801] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:03:08.028] <TB0> INFO: PixTestScurves::scurves() done
[15:03:08.028] <TB0> INFO: Vcal mean: 116.72 130.43 118.71 128.20 130.71 122.00 120.68 137.15 124.55 126.48 132.92 126.83 116.04 113.24 126.85 127.59
[15:03:08.028] <TB0> INFO: Vcal RMS: 6.05 7.00 5.44 6.30 6.19 6.04 6.17 6.03 5.98 6.18 6.90 6.07 5.21 5.43 5.99 7.20
[15:03:08.028] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1281 seconds
[15:03:08.028] <TB0> INFO: Decoding statistics:
[15:03:08.028] <TB0> INFO: General information:
[15:03:08.028] <TB0> INFO: 16bit words read: 0
[15:03:08.028] <TB0> INFO: valid events total: 0
[15:03:08.028] <TB0> INFO: empty events: 0
[15:03:08.028] <TB0> INFO: valid events with pixels: 0
[15:03:08.028] <TB0> INFO: valid pixel hits: 0
[15:03:08.028] <TB0> INFO: Event errors: 0
[15:03:08.028] <TB0> INFO: start marker: 0
[15:03:08.028] <TB0> INFO: stop marker: 0
[15:03:08.028] <TB0> INFO: overflow: 0
[15:03:08.028] <TB0> INFO: invalid 5bit words: 0
[15:03:08.028] <TB0> INFO: invalid XOR eye diagram: 0
[15:03:08.028] <TB0> INFO: frame (failed synchr.): 0
[15:03:08.028] <TB0> INFO: idle data (no TBM trl): 0
[15:03:08.028] <TB0> INFO: no data (only TBM hdr): 0
[15:03:08.028] <TB0> INFO: TBM errors: 0
[15:03:08.028] <TB0> INFO: flawed TBM headers: 0
[15:03:08.028] <TB0> INFO: flawed TBM trailers: 0
[15:03:08.028] <TB0> INFO: event ID mismatches: 0
[15:03:08.028] <TB0> INFO: ROC errors: 0
[15:03:08.028] <TB0> INFO: missing ROC header(s): 0
[15:03:08.028] <TB0> INFO: misplaced readback start: 0
[15:03:08.028] <TB0> INFO: Pixel decoding errors: 0
[15:03:08.028] <TB0> INFO: pixel data incomplete: 0
[15:03:08.028] <TB0> INFO: pixel address: 0
[15:03:08.028] <TB0> INFO: pulse height fill bit: 0
[15:03:08.028] <TB0> INFO: buffer corruption: 0
[15:03:08.100] <TB0> INFO: ######################################################################
[15:03:08.100] <TB0> INFO: PixTestTrim::doTest()
[15:03:08.100] <TB0> INFO: ######################################################################
[15:03:08.101] <TB0> INFO: ----------------------------------------------------------------------
[15:03:08.101] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[15:03:08.101] <TB0> INFO: ----------------------------------------------------------------------
[15:03:08.148] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:03:08.148] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:03:08.161] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:03:08.161] <TB0> INFO: run 1 of 1
[15:03:08.414] <TB0> INFO: Expecting 5025280 events.
[15:03:39.193] <TB0> INFO: 829680 events read in total (30176ms).
[15:04:09.088] <TB0> INFO: 1656488 events read in total (60072ms).
[15:04:39.105] <TB0> INFO: 2481016 events read in total (90088ms).
[15:05:08.972] <TB0> INFO: 3303352 events read in total (119955ms).
[15:05:39.044] <TB0> INFO: 4121328 events read in total (150027ms).
[15:06:09.086] <TB0> INFO: 4938672 events read in total (180069ms).
[15:06:12.547] <TB0> INFO: 5025280 events read in total (183530ms).
[15:06:12.608] <TB0> INFO: Test took 184447ms.
[15:06:31.207] <TB0> INFO: ROC 0 VthrComp = 115
[15:06:31.207] <TB0> INFO: ROC 1 VthrComp = 130
[15:06:31.207] <TB0> INFO: ROC 2 VthrComp = 122
[15:06:31.207] <TB0> INFO: ROC 3 VthrComp = 132
[15:06:31.207] <TB0> INFO: ROC 4 VthrComp = 128
[15:06:31.207] <TB0> INFO: ROC 5 VthrComp = 115
[15:06:31.207] <TB0> INFO: ROC 6 VthrComp = 118
[15:06:31.209] <TB0> INFO: ROC 7 VthrComp = 133
[15:06:31.209] <TB0> INFO: ROC 8 VthrComp = 122
[15:06:31.209] <TB0> INFO: ROC 9 VthrComp = 127
[15:06:31.209] <TB0> INFO: ROC 10 VthrComp = 129
[15:06:31.209] <TB0> INFO: ROC 11 VthrComp = 120
[15:06:31.210] <TB0> INFO: ROC 12 VthrComp = 117
[15:06:31.210] <TB0> INFO: ROC 13 VthrComp = 113
[15:06:31.210] <TB0> INFO: ROC 14 VthrComp = 123
[15:06:31.210] <TB0> INFO: ROC 15 VthrComp = 115
[15:06:31.449] <TB0> INFO: Expecting 41600 events.
[15:06:35.023] <TB0> INFO: 41600 events read in total (2982ms).
[15:06:35.023] <TB0> INFO: Test took 3811ms.
[15:06:35.033] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:06:35.033] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:06:35.045] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:06:35.045] <TB0> INFO: run 1 of 1
[15:06:35.323] <TB0> INFO: Expecting 5025280 events.
[15:07:01.924] <TB0> INFO: 592712 events read in total (26010ms).
[15:07:28.112] <TB0> INFO: 1183744 events read in total (52198ms).
[15:07:53.796] <TB0> INFO: 1774776 events read in total (77882ms).
[15:08:19.485] <TB0> INFO: 2364696 events read in total (103571ms).
[15:08:45.057] <TB0> INFO: 2952760 events read in total (129143ms).
[15:09:10.843] <TB0> INFO: 3539152 events read in total (154929ms).
[15:09:36.265] <TB0> INFO: 4124616 events read in total (180351ms).
[15:10:02.307] <TB0> INFO: 4709000 events read in total (206393ms).
[15:10:16.433] <TB0> INFO: 5025280 events read in total (220519ms).
[15:10:16.512] <TB0> INFO: Test took 221467ms.
[15:10:45.529] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.9253 for pixel 2/78 mean/min/max = 46.4331/31.9125/60.9537
[15:10:45.530] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.7073 for pixel 14/1 mean/min/max = 45.2066/31.534/58.8792
[15:10:45.530] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.8082 for pixel 40/10 mean/min/max = 46.3817/32.8923/59.8711
[15:10:45.531] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.6332 for pixel 1/15 mean/min/max = 46.9517/32.1057/61.7976
[15:10:45.531] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.6527 for pixel 3/3 mean/min/max = 46.0318/31.2/60.8636
[15:10:45.532] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 64.2692 for pixel 9/2 mean/min/max = 48.3844/32.495/64.2738
[15:10:45.532] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.9531 for pixel 4/57 mean/min/max = 47.3653/32.6141/62.1164
[15:10:45.533] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 64.0936 for pixel 20/5 mean/min/max = 48.8027/33.2485/64.3569
[15:10:45.533] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 59.9449 for pixel 20/3 mean/min/max = 46.2413/32.461/60.0217
[15:10:45.534] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 62.7405 for pixel 18/0 mean/min/max = 47.6387/32.4634/62.814
[15:10:45.534] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.2874 for pixel 0/1 mean/min/max = 45.9122/31.4729/60.3515
[15:10:45.535] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 64.2542 for pixel 7/1 mean/min/max = 49.2276/34.0776/64.3776
[15:10:45.535] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 59.3536 for pixel 32/1 mean/min/max = 46.0444/32.7271/59.3617
[15:10:45.536] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.2395 for pixel 2/57 mean/min/max = 46.8896/32.4979/61.2813
[15:10:45.536] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.858 for pixel 8/42 mean/min/max = 47.1138/32.3447/61.883
[15:10:45.537] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 66.8622 for pixel 10/0 mean/min/max = 49.1877/31.3908/66.9845
[15:10:45.537] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:10:45.626] <TB0> INFO: Expecting 411648 events.
[15:10:55.059] <TB0> INFO: 411648 events read in total (8842ms).
[15:10:55.065] <TB0> INFO: Expecting 411648 events.
[15:11:04.360] <TB0> INFO: 411648 events read in total (8892ms).
[15:11:04.369] <TB0> INFO: Expecting 411648 events.
[15:11:13.754] <TB0> INFO: 411648 events read in total (8981ms).
[15:11:13.769] <TB0> INFO: Expecting 411648 events.
[15:11:23.150] <TB0> INFO: 411648 events read in total (8978ms).
[15:11:23.165] <TB0> INFO: Expecting 411648 events.
[15:11:32.525] <TB0> INFO: 411648 events read in total (8957ms).
[15:11:32.542] <TB0> INFO: Expecting 411648 events.
[15:11:41.936] <TB0> INFO: 411648 events read in total (8991ms).
[15:11:41.957] <TB0> INFO: Expecting 411648 events.
[15:11:51.356] <TB0> INFO: 411648 events read in total (8996ms).
[15:11:51.379] <TB0> INFO: Expecting 411648 events.
[15:12:00.748] <TB0> INFO: 411648 events read in total (8966ms).
[15:12:00.774] <TB0> INFO: Expecting 411648 events.
[15:12:10.077] <TB0> INFO: 411648 events read in total (8900ms).
[15:12:10.105] <TB0> INFO: Expecting 411648 events.
[15:12:19.484] <TB0> INFO: 411648 events read in total (8976ms).
[15:12:19.516] <TB0> INFO: Expecting 411648 events.
[15:12:28.873] <TB0> INFO: 411648 events read in total (8954ms).
[15:12:28.911] <TB0> INFO: Expecting 411648 events.
[15:12:38.334] <TB0> INFO: 411648 events read in total (9020ms).
[15:12:38.377] <TB0> INFO: Expecting 411648 events.
[15:12:47.782] <TB0> INFO: 411648 events read in total (9002ms).
[15:12:47.823] <TB0> INFO: Expecting 411648 events.
[15:12:57.267] <TB0> INFO: 411648 events read in total (9041ms).
[15:12:57.317] <TB0> INFO: Expecting 411648 events.
[15:13:06.680] <TB0> INFO: 411648 events read in total (8960ms).
[15:13:06.725] <TB0> INFO: Expecting 411648 events.
[15:13:15.958] <TB0> INFO: 411648 events read in total (8830ms).
[15:13:16.013] <TB0> INFO: Test took 150476ms.
[15:13:16.665] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[15:13:16.683] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:13:16.683] <TB0> INFO: run 1 of 1
[15:13:16.964] <TB0> INFO: Expecting 5025280 events.
[15:13:43.482] <TB0> INFO: 591720 events read in total (25926ms).
[15:14:09.707] <TB0> INFO: 1182224 events read in total (52153ms).
[15:14:36.411] <TB0> INFO: 1772096 events read in total (78855ms).
[15:15:03.337] <TB0> INFO: 2361016 events read in total (105781ms).
[15:15:31.159] <TB0> INFO: 2954584 events read in total (133603ms).
[15:15:58.205] <TB0> INFO: 3547712 events read in total (160649ms).
[15:16:25.387] <TB0> INFO: 4141400 events read in total (187831ms).
[15:16:51.737] <TB0> INFO: 4732904 events read in total (214181ms).
[15:17:04.968] <TB0> INFO: 5025280 events read in total (227412ms).
[15:17:05.160] <TB0> INFO: Test took 228478ms.
[15:17:31.071] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.190721 .. 147.389254
[15:17:31.310] <TB0> INFO: Expecting 208000 events.
[15:17:40.983] <TB0> INFO: 208000 events read in total (9081ms).
[15:17:40.984] <TB0> INFO: Test took 9911ms.
[15:17:41.033] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[15:17:41.046] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:17:41.046] <TB0> INFO: run 1 of 1
[15:17:41.324] <TB0> INFO: Expecting 5258240 events.
[15:18:07.742] <TB0> INFO: 586112 events read in total (25826ms).
[15:18:33.482] <TB0> INFO: 1171440 events read in total (51567ms).
[15:18:59.440] <TB0> INFO: 1756888 events read in total (77524ms).
[15:19:25.384] <TB0> INFO: 2342544 events read in total (103468ms).
[15:19:51.280] <TB0> INFO: 2928232 events read in total (129364ms).
[15:20:17.211] <TB0> INFO: 3513144 events read in total (155295ms).
[15:20:43.097] <TB0> INFO: 4097704 events read in total (181181ms).
[15:21:08.815] <TB0> INFO: 4682320 events read in total (206899ms).
[15:21:35.189] <TB0> INFO: 5258240 events read in total (233273ms).
[15:21:35.360] <TB0> INFO: Test took 234315ms.
[15:22:05.947] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.951471 .. 46.087557
[15:22:06.229] <TB0> INFO: Expecting 208000 events.
[15:22:16.160] <TB0> INFO: 208000 events read in total (9339ms).
[15:22:16.161] <TB0> INFO: Test took 10212ms.
[15:22:16.209] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[15:22:16.221] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:22:16.221] <TB0> INFO: run 1 of 1
[15:22:16.500] <TB0> INFO: Expecting 1364480 events.
[15:22:45.318] <TB0> INFO: 664344 events read in total (28226ms).
[15:23:13.399] <TB0> INFO: 1324176 events read in total (56307ms).
[15:23:15.586] <TB0> INFO: 1364480 events read in total (58494ms).
[15:23:15.619] <TB0> INFO: Test took 59399ms.
[15:23:31.950] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 29.101113 .. 48.859293
[15:23:32.188] <TB0> INFO: Expecting 208000 events.
[15:23:42.026] <TB0> INFO: 208000 events read in total (9246ms).
[15:23:42.027] <TB0> INFO: Test took 10075ms.
[15:23:42.076] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 19 .. 58 (-1/-1) hits flags = 528 (plus default)
[15:23:42.089] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:23:42.089] <TB0> INFO: run 1 of 1
[15:23:42.368] <TB0> INFO: Expecting 1331200 events.
[15:24:10.627] <TB0> INFO: 643160 events read in total (27667ms).
[15:24:38.206] <TB0> INFO: 1283480 events read in total (55246ms).
[15:24:40.621] <TB0> INFO: 1331200 events read in total (57662ms).
[15:24:40.660] <TB0> INFO: Test took 58572ms.
[15:24:56.613] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.920359 .. 49.553610
[15:24:56.865] <TB0> INFO: Expecting 208000 events.
[15:25:06.761] <TB0> INFO: 208000 events read in total (9304ms).
[15:25:06.762] <TB0> INFO: Test took 10147ms.
[15:25:06.831] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 59 (-1/-1) hits flags = 528 (plus default)
[15:25:06.846] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:25:06.846] <TB0> INFO: run 1 of 1
[15:25:07.126] <TB0> INFO: Expecting 1464320 events.
[15:25:35.343] <TB0> INFO: 649792 events read in total (27625ms).
[15:26:03.325] <TB0> INFO: 1299144 events read in total (55607ms).
[15:26:10.614] <TB0> INFO: 1464320 events read in total (62896ms).
[15:26:10.653] <TB0> INFO: Test took 63807ms.
[15:26:26.367] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:26:26.367] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[15:26:26.381] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:26:26.381] <TB0> INFO: run 1 of 1
[15:26:26.706] <TB0> INFO: Expecting 1364480 events.
[15:26:55.456] <TB0> INFO: 668560 events read in total (28158ms).
[15:27:23.356] <TB0> INFO: 1335904 events read in total (56058ms).
[15:27:25.036] <TB0> INFO: 1364480 events read in total (57738ms).
[15:27:25.065] <TB0> INFO: Test took 58684ms.
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C0.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C1.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C2.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C3.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C4.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C5.dat
[15:27:40.384] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C6.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C7.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C8.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C9.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C10.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C11.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C12.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C13.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C14.dat
[15:27:40.385] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C15.dat
[15:27:40.385] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C0.dat
[15:27:40.392] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C1.dat
[15:27:40.399] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C2.dat
[15:27:40.406] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C3.dat
[15:27:40.413] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C4.dat
[15:27:40.420] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C5.dat
[15:27:40.427] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C6.dat
[15:27:40.434] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C7.dat
[15:27:40.442] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C8.dat
[15:27:40.448] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C9.dat
[15:27:40.455] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C10.dat
[15:27:40.462] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C11.dat
[15:27:40.468] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C12.dat
[15:27:40.474] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C13.dat
[15:27:40.479] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C14.dat
[15:27:40.484] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters35_C15.dat
[15:27:40.489] <TB0> INFO: PixTestTrim::trimTest() done
[15:27:40.489] <TB0> INFO: vtrim: 120 114 126 133 121 123 129 137 114 143 119 129 114 123 120 138
[15:27:40.489] <TB0> INFO: vthrcomp: 115 130 122 132 128 115 118 133 122 127 129 120 117 113 123 115
[15:27:40.489] <TB0> INFO: vcal mean: 34.98 34.89 35.00 35.24 35.27 35.50 35.04 35.31 34.97 35.03 34.97 35.60 34.95 35.12 35.41 35.51
[15:27:40.489] <TB0> INFO: vcal RMS: 1.11 1.04 0.99 1.39 1.52 1.79 1.23 1.53 1.16 1.23 1.23 1.82 1.05 1.28 1.71 1.80
[15:27:40.489] <TB0> INFO: bits mean: 9.29 9.86 9.24 9.40 9.65 9.75 9.25 8.82 9.14 9.25 9.26 8.88 9.61 9.54 9.65 9.37
[15:27:40.489] <TB0> INFO: bits RMS: 2.79 2.65 2.65 2.76 2.84 2.56 2.68 2.80 2.78 2.69 2.93 2.74 2.60 2.62 2.66 2.81
[15:27:40.497] <TB0> INFO: ----------------------------------------------------------------------
[15:27:40.497] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[15:27:40.497] <TB0> INFO: ----------------------------------------------------------------------
[15:27:40.499] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[15:27:40.514] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:27:40.514] <TB0> INFO: run 1 of 1
[15:27:40.751] <TB0> INFO: Expecting 4160000 events.
[15:28:13.634] <TB0> INFO: 763445 events read in total (32292ms).
[15:28:45.776] <TB0> INFO: 1520075 events read in total (64434ms).
[15:29:17.676] <TB0> INFO: 2272365 events read in total (96334ms).
[15:29:49.390] <TB0> INFO: 3019940 events read in total (128048ms).
[15:30:21.176] <TB0> INFO: 3764945 events read in total (159834ms).
[15:30:38.208] <TB0> INFO: 4160000 events read in total (176866ms).
[15:30:38.277] <TB0> INFO: Test took 177763ms.
[15:31:06.057] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[15:31:06.071] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:31:06.071] <TB0> INFO: run 1 of 1
[15:31:06.328] <TB0> INFO: Expecting 5324800 events.
[15:31:37.098] <TB0> INFO: 680990 events read in total (30174ms).
[15:32:07.391] <TB0> INFO: 1358820 events read in total (60467ms).
[15:32:37.565] <TB0> INFO: 2034545 events read in total (90641ms).
[15:33:07.698] <TB0> INFO: 2708090 events read in total (120774ms).
[15:33:37.918] <TB0> INFO: 3378760 events read in total (150994ms).
[15:34:08.118] <TB0> INFO: 4048675 events read in total (181194ms).
[15:34:38.272] <TB0> INFO: 4717550 events read in total (211348ms).
[15:35:05.134] <TB0> INFO: 5324800 events read in total (238210ms).
[15:35:05.240] <TB0> INFO: Test took 239169ms.
[15:35:38.729] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[15:35:38.743] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:35:38.743] <TB0> INFO: run 1 of 1
[15:35:39.022] <TB0> INFO: Expecting 4326400 events.
[15:36:10.712] <TB0> INFO: 727550 events read in total (31098ms).
[15:36:41.848] <TB0> INFO: 1450440 events read in total (62234ms).
[15:37:12.940] <TB0> INFO: 2169895 events read in total (93326ms).
[15:37:43.934] <TB0> INFO: 2884040 events read in total (124320ms).
[15:38:15.125] <TB0> INFO: 3596000 events read in total (155511ms).
[15:38:45.670] <TB0> INFO: 4309555 events read in total (186056ms).
[15:38:46.784] <TB0> INFO: 4326400 events read in total (187170ms).
[15:38:46.868] <TB0> INFO: Test took 188125ms.
[15:39:14.114] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[15:39:14.130] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:39:14.130] <TB0> INFO: run 1 of 1
[15:39:14.460] <TB0> INFO: Expecting 4284800 events.
[15:39:46.063] <TB0> INFO: 730060 events read in total (31011ms).
[15:40:16.896] <TB0> INFO: 1455785 events read in total (61844ms).
[15:40:48.181] <TB0> INFO: 2177285 events read in total (93129ms).
[15:41:19.086] <TB0> INFO: 2894280 events read in total (124034ms).
[15:41:50.269] <TB0> INFO: 3608890 events read in total (155217ms).
[15:42:19.022] <TB0> INFO: 4284800 events read in total (183970ms).
[15:42:19.134] <TB0> INFO: Test took 185001ms.
[15:42:47.605] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[15:42:47.620] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[15:42:47.620] <TB0> INFO: run 1 of 1
[15:42:47.856] <TB0> INFO: Expecting 4264000 events.
[15:43:19.518] <TB0> INFO: 731850 events read in total (31070ms).
[15:43:50.670] <TB0> INFO: 1458525 events read in total (62222ms).
[15:44:21.910] <TB0> INFO: 2181140 events read in total (93462ms).
[15:44:53.025] <TB0> INFO: 2899635 events read in total (124577ms).
[15:45:24.118] <TB0> INFO: 3615520 events read in total (155670ms).
[15:45:52.141] <TB0> INFO: 4264000 events read in total (183693ms).
[15:45:52.229] <TB0> INFO: Test took 184609ms.
[15:46:18.647] <TB0> INFO: PixTestTrim::trimBitTest() done
[15:46:18.648] <TB0> INFO: PixTestTrim::doTest() done, duration: 2590 seconds
[15:46:18.648] <TB0> INFO: Decoding statistics:
[15:46:18.648] <TB0> INFO: General information:
[15:46:18.648] <TB0> INFO: 16bit words read: 0
[15:46:18.648] <TB0> INFO: valid events total: 0
[15:46:18.648] <TB0> INFO: empty events: 0
[15:46:18.648] <TB0> INFO: valid events with pixels: 0
[15:46:18.648] <TB0> INFO: valid pixel hits: 0
[15:46:18.648] <TB0> INFO: Event errors: 0
[15:46:18.648] <TB0> INFO: start marker: 0
[15:46:18.648] <TB0> INFO: stop marker: 0
[15:46:18.648] <TB0> INFO: overflow: 0
[15:46:18.648] <TB0> INFO: invalid 5bit words: 0
[15:46:18.648] <TB0> INFO: invalid XOR eye diagram: 0
[15:46:18.648] <TB0> INFO: frame (failed synchr.): 0
[15:46:18.648] <TB0> INFO: idle data (no TBM trl): 0
[15:46:18.648] <TB0> INFO: no data (only TBM hdr): 0
[15:46:18.648] <TB0> INFO: TBM errors: 0
[15:46:18.648] <TB0> INFO: flawed TBM headers: 0
[15:46:18.648] <TB0> INFO: flawed TBM trailers: 0
[15:46:18.648] <TB0> INFO: event ID mismatches: 0
[15:46:18.648] <TB0> INFO: ROC errors: 0
[15:46:18.648] <TB0> INFO: missing ROC header(s): 0
[15:46:18.648] <TB0> INFO: misplaced readback start: 0
[15:46:18.648] <TB0> INFO: Pixel decoding errors: 0
[15:46:18.648] <TB0> INFO: pixel data incomplete: 0
[15:46:18.648] <TB0> INFO: pixel address: 0
[15:46:18.648] <TB0> INFO: pulse height fill bit: 0
[15:46:18.648] <TB0> INFO: buffer corruption: 0
[15:46:19.356] <TB0> INFO: ######################################################################
[15:46:19.356] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:46:19.356] <TB0> INFO: ######################################################################
[15:46:19.599] <TB0> INFO: Expecting 41600 events.
[15:46:23.044] <TB0> INFO: 41600 events read in total (2853ms).
[15:46:23.045] <TB0> INFO: Test took 3688ms.
[15:46:23.486] <TB0> INFO: Expecting 41600 events.
[15:46:26.984] <TB0> INFO: 41600 events read in total (2906ms).
[15:46:26.985] <TB0> INFO: Test took 3737ms.
[15:46:27.275] <TB0> INFO: Expecting 41600 events.
[15:46:30.851] <TB0> INFO: 41600 events read in total (2985ms).
[15:46:30.852] <TB0> INFO: Test took 3843ms.
[15:46:31.145] <TB0> INFO: Expecting 41600 events.
[15:46:34.692] <TB0> INFO: 41600 events read in total (2956ms).
[15:46:34.693] <TB0> INFO: Test took 3814ms.
[15:46:34.984] <TB0> INFO: Expecting 41600 events.
[15:46:38.464] <TB0> INFO: 41600 events read in total (2888ms).
[15:46:38.465] <TB0> INFO: Test took 3746ms.
[15:46:38.757] <TB0> INFO: Expecting 41600 events.
[15:46:42.311] <TB0> INFO: 41600 events read in total (2963ms).
[15:46:42.311] <TB0> INFO: Test took 3819ms.
[15:46:42.600] <TB0> INFO: Expecting 41600 events.
[15:46:46.099] <TB0> INFO: 41600 events read in total (2907ms).
[15:46:46.100] <TB0> INFO: Test took 3765ms.
[15:46:46.391] <TB0> INFO: Expecting 41600 events.
[15:46:49.921] <TB0> INFO: 41600 events read in total (2939ms).
[15:46:49.922] <TB0> INFO: Test took 3796ms.
[15:46:50.211] <TB0> INFO: Expecting 41600 events.
[15:46:53.713] <TB0> INFO: 41600 events read in total (2910ms).
[15:46:53.714] <TB0> INFO: Test took 3767ms.
[15:46:53.003] <TB0> INFO: Expecting 41600 events.
[15:46:57.519] <TB0> INFO: 41600 events read in total (2925ms).
[15:46:57.520] <TB0> INFO: Test took 3782ms.
[15:46:57.809] <TB0> INFO: Expecting 41600 events.
[15:47:01.370] <TB0> INFO: 41600 events read in total (2967ms).
[15:47:01.371] <TB0> INFO: Test took 3827ms.
[15:47:01.661] <TB0> INFO: Expecting 41600 events.
[15:47:05.180] <TB0> INFO: 41600 events read in total (2927ms).
[15:47:05.180] <TB0> INFO: Test took 3783ms.
[15:47:05.469] <TB0> INFO: Expecting 41600 events.
[15:47:08.948] <TB0> INFO: 41600 events read in total (2887ms).
[15:47:08.949] <TB0> INFO: Test took 3745ms.
[15:47:09.238] <TB0> INFO: Expecting 41600 events.
[15:47:12.728] <TB0> INFO: 41600 events read in total (2899ms).
[15:47:12.729] <TB0> INFO: Test took 3756ms.
[15:47:13.018] <TB0> INFO: Expecting 41600 events.
[15:47:16.520] <TB0> INFO: 41600 events read in total (2910ms).
[15:47:16.521] <TB0> INFO: Test took 3768ms.
[15:47:16.814] <TB0> INFO: Expecting 41600 events.
[15:47:20.368] <TB0> INFO: 41600 events read in total (2962ms).
[15:47:20.368] <TB0> INFO: Test took 3820ms.
[15:47:20.657] <TB0> INFO: Expecting 41600 events.
[15:47:24.171] <TB0> INFO: 41600 events read in total (2922ms).
[15:47:24.172] <TB0> INFO: Test took 3780ms.
[15:47:24.463] <TB0> INFO: Expecting 41600 events.
[15:47:27.954] <TB0> INFO: 41600 events read in total (2900ms).
[15:47:27.954] <TB0> INFO: Test took 3756ms.
[15:47:28.244] <TB0> INFO: Expecting 41600 events.
[15:47:31.743] <TB0> INFO: 41600 events read in total (2907ms).
[15:47:31.744] <TB0> INFO: Test took 3766ms.
[15:47:32.034] <TB0> INFO: Expecting 41600 events.
[15:47:35.537] <TB0> INFO: 41600 events read in total (2911ms).
[15:47:35.538] <TB0> INFO: Test took 3770ms.
[15:47:35.827] <TB0> INFO: Expecting 41600 events.
[15:47:39.447] <TB0> INFO: 41600 events read in total (3028ms).
[15:47:39.448] <TB0> INFO: Test took 3886ms.
[15:47:39.738] <TB0> INFO: Expecting 41600 events.
[15:47:43.350] <TB0> INFO: 41600 events read in total (3020ms).
[15:47:43.351] <TB0> INFO: Test took 3878ms.
[15:47:43.657] <TB0> INFO: Expecting 41600 events.
[15:47:47.238] <TB0> INFO: 41600 events read in total (2989ms).
[15:47:47.239] <TB0> INFO: Test took 3862ms.
[15:47:47.530] <TB0> INFO: Expecting 41600 events.
[15:47:51.076] <TB0> INFO: 41600 events read in total (2954ms).
[15:47:51.077] <TB0> INFO: Test took 3813ms.
[15:47:51.371] <TB0> INFO: Expecting 41600 events.
[15:47:55.035] <TB0> INFO: 41600 events read in total (3072ms).
[15:47:55.036] <TB0> INFO: Test took 3931ms.
[15:47:55.349] <TB0> INFO: Expecting 41600 events.
[15:47:58.932] <TB0> INFO: 41600 events read in total (2991ms).
[15:47:58.933] <TB0> INFO: Test took 3870ms.
[15:47:59.222] <TB0> INFO: Expecting 41600 events.
[15:48:02.766] <TB0> INFO: 41600 events read in total (2952ms).
[15:48:02.767] <TB0> INFO: Test took 3810ms.
[15:48:03.062] <TB0> INFO: Expecting 41600 events.
[15:48:06.580] <TB0> INFO: 41600 events read in total (2926ms).
[15:48:06.581] <TB0> INFO: Test took 3790ms.
[15:48:06.877] <TB0> INFO: Expecting 41600 events.
[15:48:10.422] <TB0> INFO: 41600 events read in total (2953ms).
[15:48:10.423] <TB0> INFO: Test took 3817ms.
[15:48:10.714] <TB0> INFO: Expecting 2560 events.
[15:48:11.607] <TB0> INFO: 2560 events read in total (302ms).
[15:48:11.607] <TB0> INFO: Test took 1171ms.
[15:48:11.916] <TB0> INFO: Expecting 2560 events.
[15:48:12.809] <TB0> INFO: 2560 events read in total (301ms).
[15:48:12.809] <TB0> INFO: Test took 1202ms.
[15:48:13.117] <TB0> INFO: Expecting 2560 events.
[15:48:14.010] <TB0> INFO: 2560 events read in total (301ms).
[15:48:14.010] <TB0> INFO: Test took 1200ms.
[15:48:14.317] <TB0> INFO: Expecting 2560 events.
[15:48:15.208] <TB0> INFO: 2560 events read in total (299ms).
[15:48:15.208] <TB0> INFO: Test took 1197ms.
[15:48:15.516] <TB0> INFO: Expecting 2560 events.
[15:48:16.396] <TB0> INFO: 2560 events read in total (289ms).
[15:48:16.396] <TB0> INFO: Test took 1188ms.
[15:48:16.704] <TB0> INFO: Expecting 2560 events.
[15:48:17.591] <TB0> INFO: 2560 events read in total (295ms).
[15:48:17.592] <TB0> INFO: Test took 1195ms.
[15:48:17.899] <TB0> INFO: Expecting 2560 events.
[15:48:18.778] <TB0> INFO: 2560 events read in total (287ms).
[15:48:18.779] <TB0> INFO: Test took 1187ms.
[15:48:19.085] <TB0> INFO: Expecting 2560 events.
[15:48:19.969] <TB0> INFO: 2560 events read in total (292ms).
[15:48:19.970] <TB0> INFO: Test took 1191ms.
[15:48:20.278] <TB0> INFO: Expecting 2560 events.
[15:48:21.167] <TB0> INFO: 2560 events read in total (297ms).
[15:48:21.167] <TB0> INFO: Test took 1196ms.
[15:48:21.476] <TB0> INFO: Expecting 2560 events.
[15:48:22.362] <TB0> INFO: 2560 events read in total (294ms).
[15:48:22.362] <TB0> INFO: Test took 1194ms.
[15:48:22.669] <TB0> INFO: Expecting 2560 events.
[15:48:23.553] <TB0> INFO: 2560 events read in total (293ms).
[15:48:23.553] <TB0> INFO: Test took 1189ms.
[15:48:23.862] <TB0> INFO: Expecting 2560 events.
[15:48:24.743] <TB0> INFO: 2560 events read in total (290ms).
[15:48:24.744] <TB0> INFO: Test took 1190ms.
[15:48:25.051] <TB0> INFO: Expecting 2560 events.
[15:48:25.947] <TB0> INFO: 2560 events read in total (305ms).
[15:48:25.947] <TB0> INFO: Test took 1202ms.
[15:48:26.255] <TB0> INFO: Expecting 2560 events.
[15:48:27.140] <TB0> INFO: 2560 events read in total (293ms).
[15:48:27.140] <TB0> INFO: Test took 1192ms.
[15:48:27.447] <TB0> INFO: Expecting 2560 events.
[15:48:28.337] <TB0> INFO: 2560 events read in total (298ms).
[15:48:28.337] <TB0> INFO: Test took 1196ms.
[15:48:28.645] <TB0> INFO: Expecting 2560 events.
[15:48:29.538] <TB0> INFO: 2560 events read in total (301ms).
[15:48:29.538] <TB0> INFO: Test took 1200ms.
[15:48:29.542] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:48:29.846] <TB0> INFO: Expecting 655360 events.
[15:48:44.783] <TB0> INFO: 655360 events read in total (14345ms).
[15:48:44.803] <TB0> INFO: Expecting 655360 events.
[15:48:59.695] <TB0> INFO: 655360 events read in total (14489ms).
[15:48:59.715] <TB0> INFO: Expecting 655360 events.
[15:49:14.629] <TB0> INFO: 655360 events read in total (14511ms).
[15:49:14.653] <TB0> INFO: Expecting 655360 events.
[15:49:29.229] <TB0> INFO: 655360 events read in total (14173ms).
[15:49:29.259] <TB0> INFO: Expecting 655360 events.
[15:49:43.841] <TB0> INFO: 655360 events read in total (14179ms).
[15:49:43.878] <TB0> INFO: Expecting 655360 events.
[15:49:58.597] <TB0> INFO: 655360 events read in total (14316ms).
[15:49:58.637] <TB0> INFO: Expecting 655360 events.
[15:50:13.296] <TB0> INFO: 655360 events read in total (14256ms).
[15:50:13.349] <TB0> INFO: Expecting 655360 events.
[15:50:28.056] <TB0> INFO: 655360 events read in total (14304ms).
[15:50:28.132] <TB0> INFO: Expecting 655360 events.
[15:50:42.700] <TB0> INFO: 655360 events read in total (14165ms).
[15:50:42.841] <TB0> INFO: Expecting 655360 events.
[15:50:57.432] <TB0> INFO: 655360 events read in total (14188ms).
[15:50:57.502] <TB0> INFO: Expecting 655360 events.
[15:51:12.170] <TB0> INFO: 655360 events read in total (14265ms).
[15:51:12.248] <TB0> INFO: Expecting 655360 events.
[15:51:26.736] <TB0> INFO: 655360 events read in total (14085ms).
[15:51:26.817] <TB0> INFO: Expecting 655360 events.
[15:51:41.359] <TB0> INFO: 655360 events read in total (14139ms).
[15:51:41.447] <TB0> INFO: Expecting 655360 events.
[15:51:56.076] <TB0> INFO: 655360 events read in total (14226ms).
[15:51:56.170] <TB0> INFO: Expecting 655360 events.
[15:52:10.706] <TB0> INFO: 655360 events read in total (14132ms).
[15:52:10.823] <TB0> INFO: Expecting 655360 events.
[15:52:25.498] <TB0> INFO: 655360 events read in total (14272ms).
[15:52:25.608] <TB0> INFO: Test took 236066ms.
[15:52:25.702] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:25.961] <TB0> INFO: Expecting 655360 events.
[15:52:40.653] <TB0> INFO: 655360 events read in total (14100ms).
[15:52:40.672] <TB0> INFO: Expecting 655360 events.
[15:52:55.262] <TB0> INFO: 655360 events read in total (14187ms).
[15:52:55.282] <TB0> INFO: Expecting 655360 events.
[15:53:09.928] <TB0> INFO: 655360 events read in total (14243ms).
[15:53:09.953] <TB0> INFO: Expecting 655360 events.
[15:53:24.513] <TB0> INFO: 655360 events read in total (14157ms).
[15:53:24.543] <TB0> INFO: Expecting 655360 events.
[15:53:39.127] <TB0> INFO: 655360 events read in total (14181ms).
[15:53:39.163] <TB0> INFO: Expecting 655360 events.
[15:53:53.752] <TB0> INFO: 655360 events read in total (14186ms).
[15:53:53.790] <TB0> INFO: Expecting 655360 events.
[15:54:08.670] <TB0> INFO: 655360 events read in total (14477ms).
[15:54:08.717] <TB0> INFO: Expecting 655360 events.
[15:54:23.202] <TB0> INFO: 655360 events read in total (14082ms).
[15:54:23.256] <TB0> INFO: Expecting 655360 events.
[15:54:37.815] <TB0> INFO: 655360 events read in total (14156ms).
[15:54:37.880] <TB0> INFO: Expecting 655360 events.
[15:54:52.107] <TB0> INFO: 655360 events read in total (13824ms).
[15:54:52.196] <TB0> INFO: Expecting 655360 events.
[15:55:06.739] <TB0> INFO: 655360 events read in total (14140ms).
[15:55:06.816] <TB0> INFO: Expecting 655360 events.
[15:55:21.264] <TB0> INFO: 655360 events read in total (14045ms).
[15:55:21.344] <TB0> INFO: Expecting 655360 events.
[15:55:35.905] <TB0> INFO: 655360 events read in total (14158ms).
[15:55:35.994] <TB0> INFO: Expecting 655360 events.
[15:55:50.590] <TB0> INFO: 655360 events read in total (14193ms).
[15:55:50.716] <TB0> INFO: Expecting 655360 events.
[15:56:05.293] <TB0> INFO: 655360 events read in total (14174ms).
[15:56:05.394] <TB0> INFO: Expecting 655360 events.
[15:56:19.963] <TB0> INFO: 655360 events read in total (14166ms).
[15:56:20.079] <TB0> INFO: Test took 234377ms.
[15:56:20.248] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.254] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.260] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.265] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.271] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.276] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.282] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:56:20.287] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:56:20.293] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:56:20.299] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[15:56:20.304] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.310] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.315] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.321] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.326] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.332] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.337] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:56:20.343] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:56:20.348] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:56:20.354] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[15:56:20.360] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[15:56:20.366] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[15:56:20.372] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[15:56:20.378] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[15:56:20.384] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[15:56:20.390] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[15:56:20.396] <TB0> INFO: safety margin for low PH: adding 13, margin is now 33
[15:56:20.402] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.408] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.414] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.420] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.426] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.432] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.438] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:56:20.444] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.450] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.456] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.462] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.468] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.474] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.480] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.486] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.492] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.498] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:56:20.504] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:56:20.511] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:56:20.517] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[15:56:20.523] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[15:56:20.529] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[15:56:20.535] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.541] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:56:20.547] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:56:20.553] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:56:20.561] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:56:20.569] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:56:20.577] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[15:56:20.585] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[15:56:20.593] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[15:56:20.601] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[15:56:20.610] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[15:56:20.618] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C0.dat
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C1.dat
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C2.dat
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C3.dat
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C4.dat
[15:56:20.656] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C5.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C6.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C7.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C8.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C9.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C10.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C11.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C12.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C13.dat
[15:56:20.657] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C14.dat
[15:56:20.658] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters35_C15.dat
[15:56:20.903] <TB0> INFO: Expecting 41600 events.
[15:56:24.056] <TB0> INFO: 41600 events read in total (2561ms).
[15:56:24.057] <TB0> INFO: Test took 3395ms.
[15:56:24.550] <TB0> INFO: Expecting 41600 events.
[15:56:27.665] <TB0> INFO: 41600 events read in total (2523ms).
[15:56:27.666] <TB0> INFO: Test took 3397ms.
[15:56:28.125] <TB0> INFO: Expecting 41600 events.
[15:56:31.276] <TB0> INFO: 41600 events read in total (2558ms).
[15:56:31.276] <TB0> INFO: Test took 3394ms.
[15:56:31.499] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:31.589] <TB0> INFO: Expecting 2560 events.
[15:56:32.480] <TB0> INFO: 2560 events read in total (299ms).
[15:56:32.480] <TB0> INFO: Test took 981ms.
[15:56:32.484] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:32.789] <TB0> INFO: Expecting 2560 events.
[15:56:33.684] <TB0> INFO: 2560 events read in total (304ms).
[15:56:33.684] <TB0> INFO: Test took 1200ms.
[15:56:33.687] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:33.992] <TB0> INFO: Expecting 2560 events.
[15:56:34.887] <TB0> INFO: 2560 events read in total (304ms).
[15:56:34.887] <TB0> INFO: Test took 1200ms.
[15:56:34.893] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:35.196] <TB0> INFO: Expecting 2560 events.
[15:56:36.089] <TB0> INFO: 2560 events read in total (301ms).
[15:56:36.090] <TB0> INFO: Test took 1198ms.
[15:56:36.094] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:36.398] <TB0> INFO: Expecting 2560 events.
[15:56:37.291] <TB0> INFO: 2560 events read in total (302ms).
[15:56:37.292] <TB0> INFO: Test took 1198ms.
[15:56:37.295] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:37.599] <TB0> INFO: Expecting 2560 events.
[15:56:38.491] <TB0> INFO: 2560 events read in total (301ms).
[15:56:38.491] <TB0> INFO: Test took 1196ms.
[15:56:38.496] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:38.802] <TB0> INFO: Expecting 2560 events.
[15:56:39.700] <TB0> INFO: 2560 events read in total (306ms).
[15:56:39.700] <TB0> INFO: Test took 1204ms.
[15:56:39.702] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:40.008] <TB0> INFO: Expecting 2560 events.
[15:56:40.898] <TB0> INFO: 2560 events read in total (298ms).
[15:56:40.898] <TB0> INFO: Test took 1196ms.
[15:56:40.902] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:41.207] <TB0> INFO: Expecting 2560 events.
[15:56:42.087] <TB0> INFO: 2560 events read in total (288ms).
[15:56:42.087] <TB0> INFO: Test took 1185ms.
[15:56:42.089] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:42.397] <TB0> INFO: Expecting 2560 events.
[15:56:43.279] <TB0> INFO: 2560 events read in total (291ms).
[15:56:43.280] <TB0> INFO: Test took 1191ms.
[15:56:43.283] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:43.587] <TB0> INFO: Expecting 2560 events.
[15:56:44.476] <TB0> INFO: 2560 events read in total (297ms).
[15:56:44.477] <TB0> INFO: Test took 1194ms.
[15:56:44.481] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:44.785] <TB0> INFO: Expecting 2560 events.
[15:56:45.665] <TB0> INFO: 2560 events read in total (288ms).
[15:56:45.665] <TB0> INFO: Test took 1184ms.
[15:56:45.670] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:45.975] <TB0> INFO: Expecting 2560 events.
[15:56:46.864] <TB0> INFO: 2560 events read in total (298ms).
[15:56:46.865] <TB0> INFO: Test took 1196ms.
[15:56:46.869] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:47.173] <TB0> INFO: Expecting 2560 events.
[15:56:48.062] <TB0> INFO: 2560 events read in total (297ms).
[15:56:48.062] <TB0> INFO: Test took 1193ms.
[15:56:48.065] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:48.371] <TB0> INFO: Expecting 2560 events.
[15:56:49.264] <TB0> INFO: 2560 events read in total (301ms).
[15:56:49.264] <TB0> INFO: Test took 1199ms.
[15:56:49.269] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:49.572] <TB0> INFO: Expecting 2560 events.
[15:56:50.463] <TB0> INFO: 2560 events read in total (299ms).
[15:56:50.464] <TB0> INFO: Test took 1195ms.
[15:56:50.467] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:50.772] <TB0> INFO: Expecting 2560 events.
[15:56:51.662] <TB0> INFO: 2560 events read in total (298ms).
[15:56:51.663] <TB0> INFO: Test took 1196ms.
[15:56:51.667] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:51.971] <TB0> INFO: Expecting 2560 events.
[15:56:52.855] <TB0> INFO: 2560 events read in total (292ms).
[15:56:52.855] <TB0> INFO: Test took 1189ms.
[15:56:52.857] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:53.164] <TB0> INFO: Expecting 2560 events.
[15:56:54.043] <TB0> INFO: 2560 events read in total (287ms).
[15:56:54.044] <TB0> INFO: Test took 1187ms.
[15:56:54.046] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:54.353] <TB0> INFO: Expecting 2560 events.
[15:56:55.236] <TB0> INFO: 2560 events read in total (291ms).
[15:56:55.237] <TB0> INFO: Test took 1191ms.
[15:56:55.243] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:55.545] <TB0> INFO: Expecting 2560 events.
[15:56:56.429] <TB0> INFO: 2560 events read in total (292ms).
[15:56:56.430] <TB0> INFO: Test took 1187ms.
[15:56:56.434] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:56.737] <TB0> INFO: Expecting 2560 events.
[15:56:57.627] <TB0> INFO: 2560 events read in total (298ms).
[15:56:57.627] <TB0> INFO: Test took 1193ms.
[15:56:57.631] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:57.935] <TB0> INFO: Expecting 2560 events.
[15:56:58.821] <TB0> INFO: 2560 events read in total (294ms).
[15:56:58.822] <TB0> INFO: Test took 1191ms.
[15:56:58.824] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:56:59.131] <TB0> INFO: Expecting 2560 events.
[15:57:00.012] <TB0> INFO: 2560 events read in total (289ms).
[15:57:00.013] <TB0> INFO: Test took 1189ms.
[15:57:00.018] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:00.320] <TB0> INFO: Expecting 2560 events.
[15:57:01.211] <TB0> INFO: 2560 events read in total (299ms).
[15:57:01.211] <TB0> INFO: Test took 1193ms.
[15:57:01.213] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:01.519] <TB0> INFO: Expecting 2560 events.
[15:57:02.412] <TB0> INFO: 2560 events read in total (302ms).
[15:57:02.412] <TB0> INFO: Test took 1199ms.
[15:57:02.417] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:02.720] <TB0> INFO: Expecting 2560 events.
[15:57:03.616] <TB0> INFO: 2560 events read in total (304ms).
[15:57:03.616] <TB0> INFO: Test took 1200ms.
[15:57:03.619] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:03.924] <TB0> INFO: Expecting 2560 events.
[15:57:04.819] <TB0> INFO: 2560 events read in total (303ms).
[15:57:04.819] <TB0> INFO: Test took 1200ms.
[15:57:04.823] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:05.128] <TB0> INFO: Expecting 2560 events.
[15:57:06.021] <TB0> INFO: 2560 events read in total (302ms).
[15:57:06.021] <TB0> INFO: Test took 1199ms.
[15:57:06.024] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:06.329] <TB0> INFO: Expecting 2560 events.
[15:57:07.225] <TB0> INFO: 2560 events read in total (303ms).
[15:57:07.225] <TB0> INFO: Test took 1201ms.
[15:57:07.229] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:07.534] <TB0> INFO: Expecting 2560 events.
[15:57:08.428] <TB0> INFO: 2560 events read in total (302ms).
[15:57:08.428] <TB0> INFO: Test took 1199ms.
[15:57:08.430] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:57:08.736] <TB0> INFO: Expecting 2560 events.
[15:57:09.629] <TB0> INFO: 2560 events read in total (301ms).
[15:57:09.630] <TB0> INFO: Test took 1200ms.
[15:57:10.108] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 650 seconds
[15:57:10.108] <TB0> INFO: PH scale (per ROC): 35 48 52 35 39 30 38 49 50 39 35 32 49 48 31 46
[15:57:10.108] <TB0> INFO: PH offset (per ROC): 103 130 120 107 98 112 95 115 129 98 97 101 125 128 103 125
[15:57:10.115] <TB0> INFO: Decoding statistics:
[15:57:10.115] <TB0> INFO: General information:
[15:57:10.115] <TB0> INFO: 16bit words read: 127878
[15:57:10.115] <TB0> INFO: valid events total: 20480
[15:57:10.115] <TB0> INFO: empty events: 17981
[15:57:10.115] <TB0> INFO: valid events with pixels: 2499
[15:57:10.115] <TB0> INFO: valid pixel hits: 2499
[15:57:10.115] <TB0> INFO: Event errors: 0
[15:57:10.115] <TB0> INFO: start marker: 0
[15:57:10.115] <TB0> INFO: stop marker: 0
[15:57:10.115] <TB0> INFO: overflow: 0
[15:57:10.115] <TB0> INFO: invalid 5bit words: 0
[15:57:10.115] <TB0> INFO: invalid XOR eye diagram: 0
[15:57:10.115] <TB0> INFO: frame (failed synchr.): 0
[15:57:10.115] <TB0> INFO: idle data (no TBM trl): 0
[15:57:10.115] <TB0> INFO: no data (only TBM hdr): 0
[15:57:10.115] <TB0> INFO: TBM errors: 0
[15:57:10.115] <TB0> INFO: flawed TBM headers: 0
[15:57:10.115] <TB0> INFO: flawed TBM trailers: 0
[15:57:10.115] <TB0> INFO: event ID mismatches: 0
[15:57:10.115] <TB0> INFO: ROC errors: 0
[15:57:10.115] <TB0> INFO: missing ROC header(s): 0
[15:57:10.115] <TB0> INFO: misplaced readback start: 0
[15:57:10.115] <TB0> INFO: Pixel decoding errors: 0
[15:57:10.115] <TB0> INFO: pixel data incomplete: 0
[15:57:10.115] <TB0> INFO: pixel address: 0
[15:57:10.115] <TB0> INFO: pulse height fill bit: 0
[15:57:10.115] <TB0> INFO: buffer corruption: 0
[15:57:10.280] <TB0> INFO: ######################################################################
[15:57:10.280] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:57:10.280] <TB0> INFO: ######################################################################
[15:57:10.294] <TB0> INFO: scanning low vcal = 10
[15:57:10.535] <TB0> INFO: Expecting 41600 events.
[15:57:14.133] <TB0> INFO: 41600 events read in total (3007ms).
[15:57:14.133] <TB0> INFO: Test took 3839ms.
[15:57:14.136] <TB0> INFO: scanning low vcal = 20
[15:57:14.427] <TB0> INFO: Expecting 41600 events.
[15:57:18.073] <TB0> INFO: 41600 events read in total (3055ms).
[15:57:18.074] <TB0> INFO: Test took 3938ms.
[15:57:18.076] <TB0> INFO: scanning low vcal = 30
[15:57:18.373] <TB0> INFO: Expecting 41600 events.
[15:57:22.076] <TB0> INFO: 41600 events read in total (3111ms).
[15:57:22.077] <TB0> INFO: Test took 4001ms.
[15:57:22.081] <TB0> INFO: scanning low vcal = 40
[15:57:22.357] <TB0> INFO: Expecting 41600 events.
[15:57:26.363] <TB0> INFO: 41600 events read in total (3414ms).
[15:57:26.364] <TB0> INFO: Test took 4283ms.
[15:57:26.368] <TB0> INFO: scanning low vcal = 50
[15:57:26.645] <TB0> INFO: Expecting 41600 events.
[15:57:30.717] <TB0> INFO: 41600 events read in total (3480ms).
[15:57:30.718] <TB0> INFO: Test took 4350ms.
[15:57:30.721] <TB0> INFO: scanning low vcal = 60
[15:57:30.998] <TB0> INFO: Expecting 41600 events.
[15:57:35.081] <TB0> INFO: 41600 events read in total (3491ms).
[15:57:35.081] <TB0> INFO: Test took 4360ms.
[15:57:35.084] <TB0> INFO: scanning low vcal = 70
[15:57:35.362] <TB0> INFO: Expecting 41600 events.
[15:57:39.415] <TB0> INFO: 41600 events read in total (3461ms).
[15:57:39.416] <TB0> INFO: Test took 4331ms.
[15:57:39.419] <TB0> INFO: scanning low vcal = 80
[15:57:39.696] <TB0> INFO: Expecting 41600 events.
[15:57:43.756] <TB0> INFO: 41600 events read in total (3468ms).
[15:57:43.756] <TB0> INFO: Test took 4337ms.
[15:57:43.760] <TB0> INFO: scanning low vcal = 90
[15:57:44.036] <TB0> INFO: Expecting 41600 events.
[15:57:48.079] <TB0> INFO: 41600 events read in total (3451ms).
[15:57:48.080] <TB0> INFO: Test took 4320ms.
[15:57:48.085] <TB0> INFO: scanning low vcal = 100
[15:57:48.360] <TB0> INFO: Expecting 41600 events.
[15:57:52.403] <TB0> INFO: 41600 events read in total (3451ms).
[15:57:52.404] <TB0> INFO: Test took 4319ms.
[15:57:52.407] <TB0> INFO: scanning low vcal = 110
[15:57:52.684] <TB0> INFO: Expecting 41600 events.
[15:57:56.760] <TB0> INFO: 41600 events read in total (3484ms).
[15:57:56.761] <TB0> INFO: Test took 4354ms.
[15:57:56.765] <TB0> INFO: scanning low vcal = 120
[15:57:57.042] <TB0> INFO: Expecting 41600 events.
[15:58:01.088] <TB0> INFO: 41600 events read in total (3454ms).
[15:58:01.089] <TB0> INFO: Test took 4324ms.
[15:58:01.091] <TB0> INFO: scanning low vcal = 130
[15:58:01.369] <TB0> INFO: Expecting 41600 events.
[15:58:05.417] <TB0> INFO: 41600 events read in total (3456ms).
[15:58:05.418] <TB0> INFO: Test took 4326ms.
[15:58:05.421] <TB0> INFO: scanning low vcal = 140
[15:58:05.698] <TB0> INFO: Expecting 41600 events.
[15:58:09.750] <TB0> INFO: 41600 events read in total (3461ms).
[15:58:09.750] <TB0> INFO: Test took 4329ms.
[15:58:09.753] <TB0> INFO: scanning low vcal = 150
[15:58:10.031] <TB0> INFO: Expecting 41600 events.
[15:58:14.080] <TB0> INFO: 41600 events read in total (3457ms).
[15:58:14.080] <TB0> INFO: Test took 4327ms.
[15:58:14.083] <TB0> INFO: scanning low vcal = 160
[15:58:14.361] <TB0> INFO: Expecting 41600 events.
[15:58:18.406] <TB0> INFO: 41600 events read in total (3453ms).
[15:58:18.406] <TB0> INFO: Test took 4323ms.
[15:58:18.410] <TB0> INFO: scanning low vcal = 170
[15:58:18.687] <TB0> INFO: Expecting 41600 events.
[15:58:22.729] <TB0> INFO: 41600 events read in total (3450ms).
[15:58:22.729] <TB0> INFO: Test took 4319ms.
[15:58:22.735] <TB0> INFO: scanning low vcal = 180
[15:58:23.010] <TB0> INFO: Expecting 41600 events.
[15:58:27.065] <TB0> INFO: 41600 events read in total (3463ms).
[15:58:27.066] <TB0> INFO: Test took 4331ms.
[15:58:27.069] <TB0> INFO: scanning low vcal = 190
[15:58:27.347] <TB0> INFO: Expecting 41600 events.
[15:58:31.371] <TB0> INFO: 41600 events read in total (3432ms).
[15:58:31.372] <TB0> INFO: Test took 4302ms.
[15:58:31.375] <TB0> INFO: scanning low vcal = 200
[15:58:31.652] <TB0> INFO: Expecting 41600 events.
[15:58:35.703] <TB0> INFO: 41600 events read in total (3460ms).
[15:58:35.704] <TB0> INFO: Test took 4329ms.
[15:58:35.707] <TB0> INFO: scanning low vcal = 210
[15:58:35.984] <TB0> INFO: Expecting 41600 events.
[15:58:40.021] <TB0> INFO: 41600 events read in total (3445ms).
[15:58:40.022] <TB0> INFO: Test took 4315ms.
[15:58:40.027] <TB0> INFO: scanning low vcal = 220
[15:58:40.302] <TB0> INFO: Expecting 41600 events.
[15:58:44.236] <TB0> INFO: 41600 events read in total (3342ms).
[15:58:44.237] <TB0> INFO: Test took 4210ms.
[15:58:44.242] <TB0> INFO: scanning low vcal = 230
[15:58:44.517] <TB0> INFO: Expecting 41600 events.
[15:58:48.454] <TB0> INFO: 41600 events read in total (3346ms).
[15:58:48.454] <TB0> INFO: Test took 4212ms.
[15:58:48.458] <TB0> INFO: scanning low vcal = 240
[15:58:48.734] <TB0> INFO: Expecting 41600 events.
[15:58:52.695] <TB0> INFO: 41600 events read in total (3369ms).
[15:58:52.695] <TB0> INFO: Test took 4237ms.
[15:58:52.700] <TB0> INFO: scanning low vcal = 250
[15:58:52.978] <TB0> INFO: Expecting 41600 events.
[15:58:56.924] <TB0> INFO: 41600 events read in total (3353ms).
[15:58:56.924] <TB0> INFO: Test took 4224ms.
[15:58:56.930] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[15:58:57.204] <TB0> INFO: Expecting 41600 events.
[15:59:01.166] <TB0> INFO: 41600 events read in total (3370ms).
[15:59:01.168] <TB0> INFO: Test took 4237ms.
[15:59:01.171] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[15:59:01.447] <TB0> INFO: Expecting 41600 events.
[15:59:05.404] <TB0> INFO: 41600 events read in total (3365ms).
[15:59:05.404] <TB0> INFO: Test took 4233ms.
[15:59:05.408] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[15:59:05.684] <TB0> INFO: Expecting 41600 events.
[15:59:09.724] <TB0> INFO: 41600 events read in total (3448ms).
[15:59:09.725] <TB0> INFO: Test took 4317ms.
[15:59:09.729] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[15:59:10.005] <TB0> INFO: Expecting 41600 events.
[15:59:13.990] <TB0> INFO: 41600 events read in total (3393ms).
[15:59:13.991] <TB0> INFO: Test took 4262ms.
[15:59:13.995] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:59:14.271] <TB0> INFO: Expecting 41600 events.
[15:59:18.231] <TB0> INFO: 41600 events read in total (3368ms).
[15:59:18.232] <TB0> INFO: Test took 4237ms.
[15:59:18.643] <TB0> INFO: PixTestGainPedestal::measure() done
[15:59:56.731] <TB0> INFO: PixTestGainPedestal::fit() done
[15:59:56.731] <TB0> INFO: non-linearity mean: 0.931 0.979 0.982 0.979 0.956 0.954 0.945 0.983 0.983 0.936 0.983 0.959 0.980 0.983 0.940 0.979
[15:59:56.731] <TB0> INFO: non-linearity RMS: 0.165 0.006 0.003 0.169 0.034 0.173 0.057 0.003 0.003 0.128 0.200 0.154 0.004 0.002 0.158 0.004
[15:59:56.731] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C0.dat
[15:59:56.746] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C1.dat
[15:59:56.759] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C2.dat
[15:59:56.772] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C3.dat
[15:59:56.785] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C4.dat
[15:59:56.798] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C5.dat
[15:59:56.811] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C6.dat
[15:59:56.824] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C7.dat
[15:59:56.837] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C8.dat
[15:59:56.850] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C9.dat
[15:59:56.863] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C10.dat
[15:59:56.876] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C11.dat
[15:59:56.889] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C12.dat
[15:59:56.903] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C13.dat
[15:59:56.916] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C14.dat
[15:59:56.929] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//phCalibrationFitErr35_C15.dat
[15:59:56.942] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 166 seconds
[15:59:56.942] <TB0> INFO: Decoding statistics:
[15:59:56.942] <TB0> INFO: General information:
[15:59:56.942] <TB0> INFO: 16bit words read: 3260650
[15:59:56.942] <TB0> INFO: valid events total: 332800
[15:59:56.942] <TB0> INFO: empty events: 885
[15:59:56.942] <TB0> INFO: valid events with pixels: 331915
[15:59:56.942] <TB0> INFO: valid pixel hits: 631925
[15:59:56.942] <TB0> INFO: Event errors: 0
[15:59:56.942] <TB0> INFO: start marker: 0
[15:59:56.942] <TB0> INFO: stop marker: 0
[15:59:56.942] <TB0> INFO: overflow: 0
[15:59:56.942] <TB0> INFO: invalid 5bit words: 0
[15:59:56.942] <TB0> INFO: invalid XOR eye diagram: 0
[15:59:56.942] <TB0> INFO: frame (failed synchr.): 0
[15:59:56.942] <TB0> INFO: idle data (no TBM trl): 0
[15:59:56.942] <TB0> INFO: no data (only TBM hdr): 0
[15:59:56.942] <TB0> INFO: TBM errors: 0
[15:59:56.942] <TB0> INFO: flawed TBM headers: 0
[15:59:56.942] <TB0> INFO: flawed TBM trailers: 0
[15:59:56.942] <TB0> INFO: event ID mismatches: 0
[15:59:56.942] <TB0> INFO: ROC errors: 0
[15:59:56.942] <TB0> INFO: missing ROC header(s): 0
[15:59:56.942] <TB0> INFO: misplaced readback start: 0
[15:59:56.942] <TB0> INFO: Pixel decoding errors: 0
[15:59:56.942] <TB0> INFO: pixel data incomplete: 0
[15:59:56.942] <TB0> INFO: pixel address: 0
[15:59:56.942] <TB0> INFO: pulse height fill bit: 0
[15:59:56.942] <TB0> INFO: buffer corruption: 0
[15:59:56.959] <TB0> INFO: Decoding statistics:
[15:59:56.959] <TB0> INFO: General information:
[15:59:56.959] <TB0> INFO: 16bit words read: 3390064
[15:59:56.959] <TB0> INFO: valid events total: 353536
[15:59:56.959] <TB0> INFO: empty events: 19122
[15:59:56.959] <TB0> INFO: valid events with pixels: 334414
[15:59:56.959] <TB0> INFO: valid pixel hits: 634424
[15:59:56.959] <TB0> INFO: Event errors: 0
[15:59:56.959] <TB0> INFO: start marker: 0
[15:59:56.959] <TB0> INFO: stop marker: 0
[15:59:56.959] <TB0> INFO: overflow: 0
[15:59:56.959] <TB0> INFO: invalid 5bit words: 0
[15:59:56.959] <TB0> INFO: invalid XOR eye diagram: 0
[15:59:56.959] <TB0> INFO: frame (failed synchr.): 0
[15:59:56.959] <TB0> INFO: idle data (no TBM trl): 0
[15:59:56.959] <TB0> INFO: no data (only TBM hdr): 0
[15:59:56.959] <TB0> INFO: TBM errors: 0
[15:59:56.959] <TB0> INFO: flawed TBM headers: 0
[15:59:56.959] <TB0> INFO: flawed TBM trailers: 0
[15:59:56.959] <TB0> INFO: event ID mismatches: 0
[15:59:56.959] <TB0> INFO: ROC errors: 0
[15:59:56.959] <TB0> INFO: missing ROC header(s): 0
[15:59:56.959] <TB0> INFO: misplaced readback start: 0
[15:59:56.959] <TB0> INFO: Pixel decoding errors: 0
[15:59:56.959] <TB0> INFO: pixel data incomplete: 0
[15:59:56.959] <TB0> INFO: pixel address: 0
[15:59:56.959] <TB0> INFO: pulse height fill bit: 0
[15:59:56.959] <TB0> INFO: buffer corruption: 0
[15:59:56.959] <TB0> INFO: enter test to run
[15:59:56.959] <TB0> INFO: test: trim80 no parameter change
[15:59:56.959] <TB0> INFO: running: trim80
[15:59:56.960] <TB0> INFO: ######################################################################
[15:59:56.960] <TB0> INFO: PixTestTrim80::doTest()
[15:59:56.960] <TB0> INFO: ######################################################################
[15:59:56.962] <TB0> INFO: ----------------------------------------------------------------------
[15:59:56.962] <TB0> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[15:59:56.962] <TB0> INFO: ----------------------------------------------------------------------
[15:59:57.006] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:59:57.006] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[15:59:57.018] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[15:59:57.018] <TB0> INFO: run 1 of 1
[15:59:57.297] <TB0> INFO: Expecting 5025280 events.
[16:00:24.962] <TB0> INFO: 682616 events read in total (27074ms).
[16:00:52.651] <TB0> INFO: 1363344 events read in total (54763ms).
[16:01:20.868] <TB0> INFO: 2041784 events read in total (82980ms).
[16:01:48.783] <TB0> INFO: 2719928 events read in total (110895ms).
[16:02:16.733] <TB0> INFO: 3399144 events read in total (138845ms).
[16:02:44.541] <TB0> INFO: 4076608 events read in total (166653ms).
[16:03:12.255] <TB0> INFO: 4753360 events read in total (194367ms).
[16:03:23.767] <TB0> INFO: 5025280 events read in total (205879ms).
[16:03:23.884] <TB0> INFO: Test took 206867ms.
[16:03:46.316] <TB0> INFO: ROC 0 VthrComp = 71
[16:03:46.316] <TB0> INFO: ROC 1 VthrComp = 79
[16:03:46.316] <TB0> INFO: ROC 2 VthrComp = 73
[16:03:46.316] <TB0> INFO: ROC 3 VthrComp = 82
[16:03:46.316] <TB0> INFO: ROC 4 VthrComp = 79
[16:03:46.316] <TB0> INFO: ROC 5 VthrComp = 75
[16:03:46.316] <TB0> INFO: ROC 6 VthrComp = 73
[16:03:46.316] <TB0> INFO: ROC 7 VthrComp = 89
[16:03:46.316] <TB0> INFO: ROC 8 VthrComp = 75
[16:03:46.316] <TB0> INFO: ROC 9 VthrComp = 77
[16:03:46.316] <TB0> INFO: ROC 10 VthrComp = 81
[16:03:46.317] <TB0> INFO: ROC 11 VthrComp = 76
[16:03:46.317] <TB0> INFO: ROC 12 VthrComp = 72
[16:03:46.317] <TB0> INFO: ROC 13 VthrComp = 68
[16:03:46.317] <TB0> INFO: ROC 14 VthrComp = 78
[16:03:46.317] <TB0> INFO: ROC 15 VthrComp = 75
[16:03:46.563] <TB0> INFO: Expecting 41600 events.
[16:03:50.133] <TB0> INFO: 41600 events read in total (2978ms).
[16:03:50.135] <TB0> INFO: Test took 3816ms.
[16:03:50.144] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:03:50.144] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:03:50.155] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:03:50.156] <TB0> INFO: run 1 of 1
[16:03:50.433] <TB0> INFO: Expecting 5025280 events.
[16:04:18.595] <TB0> INFO: 690240 events read in total (27570ms).
[16:04:46.221] <TB0> INFO: 1375464 events read in total (55196ms).
[16:05:13.885] <TB0> INFO: 2058072 events read in total (82860ms).
[16:05:41.330] <TB0> INFO: 2737216 events read in total (110306ms).
[16:06:09.142] <TB0> INFO: 3412808 events read in total (138117ms).
[16:06:36.302] <TB0> INFO: 4086304 events read in total (165277ms).
[16:07:03.269] <TB0> INFO: 4759736 events read in total (192244ms).
[16:07:14.290] <TB0> INFO: 5025280 events read in total (203265ms).
[16:07:14.356] <TB0> INFO: Test took 204200ms.
[16:07:36.592] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 108.417 for pixel 9/23 mean/min/max = 91.2335/74.0466/108.42
[16:07:36.592] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 112.01 for pixel 3/79 mean/min/max = 94.6951/77.0842/112.306
[16:07:36.593] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 107.76 for pixel 30/6 mean/min/max = 93.037/78.2272/107.847
[16:07:36.594] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 108.527 for pixel 1/24 mean/min/max = 91.6813/74.6856/108.677
[16:07:36.594] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 110.999 for pixel 7/19 mean/min/max = 94.6175/78.1706/111.064
[16:07:36.595] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 111.128 for pixel 0/76 mean/min/max = 94.5935/77.9056/111.281
[16:07:36.596] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 112.49 for pixel 0/78 mean/min/max = 95.0888/77.6622/112.515
[16:07:36.596] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 109.171 for pixel 20/7 mean/min/max = 92.6321/75.8983/109.366
[16:07:36.597] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 109.041 for pixel 51/57 mean/min/max = 93.6412/78.1796/109.103
[16:07:36.598] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 113.152 for pixel 0/46 mean/min/max = 95.7851/78.0914/113.479
[16:07:36.598] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 107.478 for pixel 17/79 mean/min/max = 91.2754/74.7421/107.809
[16:07:36.599] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 110.608 for pixel 4/73 mean/min/max = 94.8947/78.8816/110.908
[16:07:36.600] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 106.61 for pixel 0/2 mean/min/max = 91.449/76.2006/106.697
[16:07:36.600] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 108.443 for pixel 0/15 mean/min/max = 91.4401/74.2805/108.6
[16:07:36.601] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 110.769 for pixel 0/65 mean/min/max = 94.4455/78.025/110.866
[16:07:36.601] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 115.651 for pixel 0/1 mean/min/max = 95.8255/75.9926/115.658
[16:07:36.602] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:07:36.690] <TB0> INFO: Expecting 411648 events.
[16:07:46.197] <TB0> INFO: 411648 events read in total (8915ms).
[16:07:46.204] <TB0> INFO: Expecting 411648 events.
[16:07:55.563] <TB0> INFO: 411648 events read in total (8956ms).
[16:07:55.576] <TB0> INFO: Expecting 411648 events.
[16:08:04.734] <TB0> INFO: 411648 events read in total (8755ms).
[16:08:04.751] <TB0> INFO: Expecting 411648 events.
[16:08:14.103] <TB0> INFO: 411648 events read in total (8949ms).
[16:08:14.125] <TB0> INFO: Expecting 411648 events.
[16:08:23.523] <TB0> INFO: 411648 events read in total (8995ms).
[16:08:23.543] <TB0> INFO: Expecting 411648 events.
[16:08:32.871] <TB0> INFO: 411648 events read in total (8925ms).
[16:08:32.893] <TB0> INFO: Expecting 411648 events.
[16:08:42.255] <TB0> INFO: 411648 events read in total (8959ms).
[16:08:42.281] <TB0> INFO: Expecting 411648 events.
[16:08:51.639] <TB0> INFO: 411648 events read in total (8955ms).
[16:08:51.670] <TB0> INFO: Expecting 411648 events.
[16:09:01.060] <TB0> INFO: 411648 events read in total (8986ms).
[16:09:01.096] <TB0> INFO: Expecting 411648 events.
[16:09:10.370] <TB0> INFO: 411648 events read in total (8871ms).
[16:09:10.448] <TB0> INFO: Expecting 411648 events.
[16:09:19.839] <TB0> INFO: 411648 events read in total (8988ms).
[16:09:19.887] <TB0> INFO: Expecting 411648 events.
[16:09:29.161] <TB0> INFO: 411648 events read in total (8871ms).
[16:09:29.230] <TB0> INFO: Expecting 411648 events.
[16:09:38.642] <TB0> INFO: 411648 events read in total (9009ms).
[16:09:38.718] <TB0> INFO: Expecting 411648 events.
[16:09:48.097] <TB0> INFO: 411648 events read in total (8976ms).
[16:09:48.165] <TB0> INFO: Expecting 411648 events.
[16:09:57.428] <TB0> INFO: 411648 events read in total (8860ms).
[16:09:57.519] <TB0> INFO: Expecting 411648 events.
[16:10:06.997] <TB0> INFO: 411648 events read in total (9075ms).
[16:10:07.063] <TB0> INFO: Test took 150461ms.
[16:10:08.498] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:10:08.511] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:10:08.511] <TB0> INFO: run 1 of 1
[16:10:08.748] <TB0> INFO: Expecting 5025280 events.
[16:10:36.749] <TB0> INFO: 672336 events read in total (27409ms).
[16:11:03.981] <TB0> INFO: 1341320 events read in total (54641ms).
[16:11:31.465] <TB0> INFO: 2008736 events read in total (82125ms).
[16:11:58.683] <TB0> INFO: 2674072 events read in total (109343ms).
[16:12:25.515] <TB0> INFO: 3335648 events read in total (136175ms).
[16:12:52.964] <TB0> INFO: 3995928 events read in total (163624ms).
[16:13:19.722] <TB0> INFO: 4654152 events read in total (190382ms).
[16:13:34.747] <TB0> INFO: 5025280 events read in total (205407ms).
[16:13:34.822] <TB0> INFO: Test took 206312ms.
[16:13:58.976] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 52.041325 .. 98.766314
[16:13:59.213] <TB0> INFO: Expecting 208000 events.
[16:14:09.035] <TB0> INFO: 208000 events read in total (9230ms).
[16:14:09.035] <TB0> INFO: Test took 10058ms.
[16:14:09.087] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 42 .. 108 (-1/-1) hits flags = 528 (plus default)
[16:14:09.101] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:14:09.101] <TB0> INFO: run 1 of 1
[16:14:09.379] <TB0> INFO: Expecting 2229760 events.
[16:15:15.174] <TB0> INFO: 700312 events read in total (65204ms).
[16:15:48.831] <TB0> INFO: 1398328 events read in total (98862ms).
[16:17:11.240] <TB0> INFO: 2089808 events read in total (181270ms).
[16:17:17.664] <TB0> INFO: 2229760 events read in total (187694ms).
[16:17:17.715] <TB0> INFO: Test took 188615ms.
[16:17:44.993] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 62.260384 .. 90.172038
[16:17:46.132] <TB0> INFO: Expecting 208000 events.
[16:18:33.361] <TB0> INFO: 208000 events read in total (46546ms).
[16:18:33.362] <TB0> INFO: Test took 48211ms.
[16:18:33.411] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 52 .. 100 (-1/-1) hits flags = 528 (plus default)
[16:18:33.428] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:18:33.428] <TB0> INFO: run 1 of 1
[16:18:33.706] <TB0> INFO: Expecting 1630720 events.
[16:19:16.296] <TB0> INFO: 698008 events read in total (41998ms).
[16:20:17.205] <TB0> INFO: 1395120 events read in total (102907ms).
[16:20:27.966] <TB0> INFO: 1630720 events read in total (113668ms).
[16:20:28.009] <TB0> INFO: Test took 114582ms.
[16:21:09.953] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 67.678504 .. 85.705802
[16:21:10.435] <TB0> INFO: Expecting 208000 events.
[16:21:40.715] <TB0> INFO: 208000 events read in total (29644ms).
[16:21:40.716] <TB0> INFO: Test took 30762ms.
[16:21:40.790] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 57 .. 95 (-1/-1) hits flags = 528 (plus default)
[16:21:40.804] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:21:40.804] <TB0> INFO: run 1 of 1
[16:21:41.114] <TB0> INFO: Expecting 1297920 events.
[16:22:23.255] <TB0> INFO: 705872 events read in total (41549ms).
[16:23:19.874] <TB0> INFO: 1297920 events read in total (98168ms).
[16:23:19.913] <TB0> INFO: Test took 99110ms.
[16:23:46.673] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 70.364689 .. 85.548927
[16:23:46.916] <TB0> INFO: Expecting 208000 events.
[16:24:16.809] <TB0> INFO: 208000 events read in total (29299ms).
[16:24:16.810] <TB0> INFO: Test took 30136ms.
[16:24:16.858] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 60 .. 95 (-1/-1) hits flags = 528 (plus default)
[16:24:16.871] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:24:16.871] <TB0> INFO: run 1 of 1
[16:24:17.149] <TB0> INFO: Expecting 1198080 events.
[16:24:57.079] <TB0> INFO: 695088 events read in total (39338ms).
[16:25:17.749] <TB0> INFO: 1198080 events read in total (60008ms).
[16:25:17.792] <TB0> INFO: Test took 60921ms.
[16:25:33.942] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[16:25:33.942] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[16:25:33.956] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:25:33.956] <TB0> INFO: run 1 of 1
[16:25:34.193] <TB0> INFO: Expecting 1364480 events.
[16:26:02.573] <TB0> INFO: 668792 events read in total (27788ms).
[16:26:30.493] <TB0> INFO: 1337728 events read in total (55709ms).
[16:26:32.044] <TB0> INFO: 1364480 events read in total (57259ms).
[16:26:32.080] <TB0> INFO: Test took 58125ms.
[16:26:50.054] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C0.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C1.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C2.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C3.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C4.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C5.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C6.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C7.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C8.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C9.dat
[16:26:50.055] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C10.dat
[16:26:50.056] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C11.dat
[16:26:50.056] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C12.dat
[16:26:50.056] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C13.dat
[16:26:50.056] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C14.dat
[16:26:50.056] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//dacParameters80_C15.dat
[16:26:50.056] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C0.dat
[16:26:50.063] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C1.dat
[16:26:50.070] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C2.dat
[16:26:50.077] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C3.dat
[16:26:50.084] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C4.dat
[16:26:50.091] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C5.dat
[16:26:50.098] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C6.dat
[16:26:50.105] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C7.dat
[16:26:50.112] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C8.dat
[16:26:50.119] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C9.dat
[16:26:50.126] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C10.dat
[16:26:50.133] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C11.dat
[16:26:50.140] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C12.dat
[16:26:50.146] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C13.dat
[16:26:50.153] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C14.dat
[16:26:50.160] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1086_FullQualification_2016-10-26_12h02m_1477476121//003_FulltestTrim80_p17//trimParameters80_C15.dat
[16:26:50.167] <TB0> INFO: PixTestTrim80::trimTest() done
[16:26:50.167] <TB0> INFO: vtrim: 98 98 98 97 103 86 102 114 99 109 102 103 80 87 93 120
[16:26:50.167] <TB0> INFO: vthrcomp: 71 79 73 82 79 75 73 89 75 77 81 76 72 68 78 75
[16:26:50.167] <TB0> INFO: vcal mean: 80.05 80.01 80.06 80.03 79.99 80.07 80.02 80.00 80.03 80.06 79.96 80.07 80.01 80.04 80.02 80.00
[16:26:50.167] <TB0> INFO: vcal RMS: 0.76 0.72 0.73 0.77 0.76 0.76 0.75 0.80 0.76 0.77 0.76 0.77 0.72 0.77 0.74 0.81
[16:26:50.167] <TB0> INFO: bits mean: 10.36 9.17 9.36 9.70 9.14 9.02 8.98 10.03 9.32 8.62 9.94 9.06 9.61 9.98 8.94 9.65
[16:26:50.167] <TB0> INFO: bits RMS: 2.37 2.36 2.21 2.58 2.22 2.35 2.35 2.20 2.21 2.44 2.47 2.23 2.40 2.44 2.33 2.27
[16:26:50.175] <TB0> INFO: ----------------------------------------------------------------------
[16:26:50.175] <TB0> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:26:50.175] <TB0> INFO: ----------------------------------------------------------------------
[16:26:50.177] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:26:50.190] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:26:50.190] <TB0> INFO: run 1 of 1
[16:26:50.508] <TB0> INFO: Expecting 4160000 events.
[16:27:22.958] <TB0> INFO: 764065 events read in total (31859ms).
[16:27:54.691] <TB0> INFO: 1521045 events read in total (63592ms).
[16:28:26.417] <TB0> INFO: 2272650 events read in total (95319ms).
[16:28:58.262] <TB0> INFO: 3019345 events read in total (127163ms).
[16:29:30.380] <TB0> INFO: 3763550 events read in total (159281ms).
[16:29:47.780] <TB0> INFO: 4160000 events read in total (176681ms).
[16:29:47.849] <TB0> INFO: Test took 177659ms.
[16:30:15.502] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[16:30:15.516] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:30:15.516] <TB0> INFO: run 1 of 1
[16:30:15.808] <TB0> INFO: Expecting 5324800 events.
[16:30:47.088] <TB0> INFO: 680815 events read in total (30688ms).
[16:31:17.260] <TB0> INFO: 1358855 events read in total (60860ms).
[16:31:47.395] <TB0> INFO: 2034530 events read in total (90995ms).
[16:32:17.408] <TB0> INFO: 2708175 events read in total (121008ms).
[16:32:47.387] <TB0> INFO: 3379020 events read in total (150987ms).
[16:33:17.227] <TB0> INFO: 4049290 events read in total (180827ms).
[16:33:46.837] <TB0> INFO: 4718180 events read in total (210437ms).
[16:34:13.708] <TB0> INFO: 5324800 events read in total (237308ms).
[16:34:13.822] <TB0> INFO: Test took 238305ms.
[16:34:49.353] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[16:34:49.370] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:34:49.370] <TB0> INFO: run 1 of 1
[16:34:49.645] <TB0> INFO: Expecting 4326400 events.
[16:35:21.488] <TB0> INFO: 727930 events read in total (31252ms).
[16:35:52.853] <TB0> INFO: 1450895 events read in total (62617ms).
[16:36:24.180] <TB0> INFO: 2170470 events read in total (93944ms).
[16:36:55.297] <TB0> INFO: 2884960 events read in total (125061ms).
[16:37:26.499] <TB0> INFO: 3597055 events read in total (156263ms).
[16:37:58.174] <TB0> INFO: 4310610 events read in total (187938ms).
[16:37:59.270] <TB0> INFO: 4326400 events read in total (189034ms).
[16:37:59.360] <TB0> INFO: Test took 189990ms.
[16:38:28.052] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[16:38:28.066] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:38:28.066] <TB0> INFO: run 1 of 1
[16:38:28.344] <TB0> INFO: Expecting 4388800 events.
[16:39:00.223] <TB0> INFO: 723955 events read in total (31287ms).
[16:39:31.421] <TB0> INFO: 1443215 events read in total (62485ms).
[16:40:02.230] <TB0> INFO: 2159350 events read in total (93294ms).
[16:40:33.058] <TB0> INFO: 2871180 events read in total (124122ms).
[16:41:04.068] <TB0> INFO: 3579835 events read in total (155132ms).
[16:41:34.887] <TB0> INFO: 4289290 events read in total (185951ms).
[16:41:39.556] <TB0> INFO: 4388800 events read in total (190620ms).
[16:41:39.682] <TB0> INFO: Test took 191616ms.
[16:42:10.272] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[16:42:10.287] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:42:10.287] <TB0> INFO: run 1 of 1
[16:42:10.562] <TB0> INFO: Expecting 4388800 events.
[16:42:42.339] <TB0> INFO: 724560 events read in total (31185ms).
[16:43:13.450] <TB0> INFO: 1444465 events read in total (62296ms).
[16:43:44.901] <TB0> INFO: 2161240 events read in total (93747ms).
[16:44:16.004] <TB0> INFO: 2873620 events read in total (124850ms).
[16:44:47.248] <TB0> INFO: 3582985 events read in total (156094ms).
[16:45:18.238] <TB0> INFO: 4293170 events read in total (187084ms).
[16:45:22.728] <TB0> INFO: 4388800 events read in total (191574ms).
[16:45:22.803] <TB0> INFO: Test took 192516ms.
[16:45:48.374] <TB0> INFO: PixTestTrim80::trimBitTest() done
[16:45:48.376] <TB0> INFO: PixTestTrim80::doTest() done, duration: 2751 seconds
[16:45:49.009] <TB0> INFO: enter test to run
[16:45:49.009] <TB0> INFO: test: exit no parameter change
[16:45:49.225] <TB0> QUIET: Connection to board 71 closed.
[16:45:49.227] <TB0> INFO: pXar: this is the end, my friend