[11:58:35.903] <TB3> INFO: *** Welcome to pxar ***
[11:58:35.903] <TB3> INFO: *** Today: 2016/10/26
[11:58:35.909] <TB3> INFO: *** Version: c8ba-dirty
[11:58:35.909] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C15.dat
[11:58:35.910] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C1b.dat
[11:58:35.910] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//defaultMaskFile.dat
[11:58:35.910] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters_C15.dat
[11:58:35.969] <TB3> INFO: clk: 4
[11:58:35.969] <TB3> INFO: ctr: 4
[11:58:35.969] <TB3> INFO: sda: 19
[11:58:35.969] <TB3> INFO: tin: 9
[11:58:35.969] <TB3> INFO: level: 15
[11:58:35.969] <TB3> INFO: triggerdelay: 0
[11:58:35.969] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[11:58:35.969] <TB3> INFO: Log level: INFO
[11:58:35.977] <TB3> INFO: Found DTB DTB_WZ4I6J
[11:58:35.986] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[11:58:35.988] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[11:58:35.990] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[11:58:37.474] <TB3> INFO: DUT info:
[11:58:37.474] <TB3> INFO: The DUT currently contains the following objects:
[11:58:37.474] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[11:58:37.474] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:58:37.474] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:58:37.474] <TB3> INFO: TBM Core alpha (2): 7 registers set
[11:58:37.474] <TB3> INFO: TBM Core beta (3): 7 registers set
[11:58:37.474] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:58:37.474] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.474] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.475] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:58:37.875] <TB3> INFO: enter 'restricted' command line mode
[11:58:37.875] <TB3> INFO: enter test to run
[11:58:37.875] <TB3> INFO: test: pretest no parameter change
[11:58:37.875] <TB3> INFO: running: pretest
[11:58:38.454] <TB3> INFO: ######################################################################
[11:58:38.455] <TB3> INFO: PixTestPretest::doTest()
[11:58:38.455] <TB3> INFO: ######################################################################
[11:58:38.456] <TB3> INFO: ----------------------------------------------------------------------
[11:58:38.456] <TB3> INFO: PixTestPretest::programROC()
[11:58:38.456] <TB3> INFO: ----------------------------------------------------------------------
[11:58:56.469] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:58:56.469] <TB3> INFO: IA differences per ROC: 18.5 17.7 19.3 17.7 17.7 20.1 20.9 17.7 20.9 21.7 18.5 19.3 21.7 19.3 22.5 18.5
[11:58:56.504] <TB3> INFO: ----------------------------------------------------------------------
[11:58:56.504] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:58:56.504] <TB3> INFO: ----------------------------------------------------------------------
[11:59:03.685] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[11:59:03.685] <TB3> INFO: i(loss) [mA/ROC]: 18.4 19.2 18.4 18.4 19.2 18.4 19.2 18.4 18.4 17.6 17.6 18.4 19.2 18.4 19.2 17.6
[11:59:03.713] <TB3> INFO: ----------------------------------------------------------------------
[11:59:03.713] <TB3> INFO: PixTestPretest::findTiming()
[11:59:03.713] <TB3> INFO: ----------------------------------------------------------------------
[11:59:03.713] <TB3> INFO: PixTestCmd::init()

[11:59:34.762] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:59:34.762] <TB3> INFO: (success/tries = 100/100), width = 4
[11:59:36.263] <TB3> INFO: ----------------------------------------------------------------------
[11:59:36.263] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:59:36.263] <TB3> INFO: ----------------------------------------------------------------------
[11:59:36.354] <TB3> INFO: Expecting 231680 events.
[11:59:46.073] <TB3> INFO: 231680 events read in total (9127ms).
[11:59:46.079] <TB3> INFO: Test took 9814ms.
[11:59:46.322] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:59:46.350] <TB3> INFO: ----------------------------------------------------------------------
[11:59:46.350] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:59:46.350] <TB3> INFO: ----------------------------------------------------------------------
[11:59:46.443] <TB3> INFO: Expecting 231680 events.
[11:59:56.195] <TB3> INFO: 231680 events read in total (9160ms).
[11:59:56.202] <TB3> INFO: Test took 9848ms.
[11:59:56.458] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:59:56.459] <TB3> INFO: CalDel: 88 86 92 105 91 94 103 86 101 100 99 121 112 100 100 94
[11:59:56.459] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 53 53 51 51 51 51 51 51
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C0.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C1.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C2.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C3.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C4.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C5.dat
[11:59:56.461] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C6.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C7.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C8.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C9.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C10.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C11.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C12.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C13.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C14.dat
[11:59:56.462] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters_C15.dat
[11:59:56.463] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C0a.dat
[11:59:56.463] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C0b.dat
[11:59:56.463] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C1a.dat
[11:59:56.463] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//tbmParameters_C1b.dat
[11:59:56.463] <TB3> INFO: PixTestPretest::doTest() done, duration: 78 seconds
[11:59:56.595] <TB3> INFO: enter test to run
[11:59:56.595] <TB3> INFO: test: FullTest no parameter change
[11:59:56.595] <TB3> INFO: running: fulltest
[11:59:56.595] <TB3> INFO: ######################################################################
[11:59:56.595] <TB3> INFO: PixTestFullTest::doTest()
[11:59:56.595] <TB3> INFO: ######################################################################
[11:59:56.596] <TB3> INFO: ######################################################################
[11:59:56.596] <TB3> INFO: PixTestAlive::doTest()
[11:59:56.596] <TB3> INFO: ######################################################################
[11:59:56.597] <TB3> INFO: ----------------------------------------------------------------------
[11:59:56.597] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:59:56.597] <TB3> INFO: ----------------------------------------------------------------------
[11:59:56.830] <TB3> INFO: Expecting 41600 events.
[12:00:00.388] <TB3> INFO: 41600 events read in total (2966ms).
[12:00:00.389] <TB3> INFO: Test took 3791ms.
[12:00:00.614] <TB3> INFO: PixTestAlive::aliveTest() done
[12:00:00.614] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:00:00.615] <TB3> INFO: ----------------------------------------------------------------------
[12:00:00.615] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:00:00.615] <TB3> INFO: ----------------------------------------------------------------------
[12:00:00.849] <TB3> INFO: Expecting 41600 events.
[12:00:03.935] <TB3> INFO: 41600 events read in total (2494ms).
[12:00:03.935] <TB3> INFO: Test took 3318ms.
[12:00:03.936] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:00:04.175] <TB3> INFO: PixTestAlive::maskTest() done
[12:00:04.175] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:00:04.176] <TB3> INFO: ----------------------------------------------------------------------
[12:00:04.176] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:00:04.176] <TB3> INFO: ----------------------------------------------------------------------
[12:00:04.409] <TB3> INFO: Expecting 41600 events.
[12:00:07.903] <TB3> INFO: 41600 events read in total (2902ms).
[12:00:07.903] <TB3> INFO: Test took 3726ms.
[12:00:08.130] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:00:08.130] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:00:08.130] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:00:08.130] <TB3> INFO: Decoding statistics:
[12:00:08.130] <TB3> INFO: General information:
[12:00:08.130] <TB3> INFO: 16bit words read: 0
[12:00:08.130] <TB3> INFO: valid events total: 0
[12:00:08.130] <TB3> INFO: empty events: 0
[12:00:08.130] <TB3> INFO: valid events with pixels: 0
[12:00:08.130] <TB3> INFO: valid pixel hits: 0
[12:00:08.130] <TB3> INFO: Event errors: 0
[12:00:08.130] <TB3> INFO: start marker: 0
[12:00:08.130] <TB3> INFO: stop marker: 0
[12:00:08.130] <TB3> INFO: overflow: 0
[12:00:08.130] <TB3> INFO: invalid 5bit words: 0
[12:00:08.130] <TB3> INFO: invalid XOR eye diagram: 0
[12:00:08.130] <TB3> INFO: frame (failed synchr.): 0
[12:00:08.130] <TB3> INFO: idle data (no TBM trl): 0
[12:00:08.130] <TB3> INFO: no data (only TBM hdr): 0
[12:00:08.130] <TB3> INFO: TBM errors: 0
[12:00:08.130] <TB3> INFO: flawed TBM headers: 0
[12:00:08.130] <TB3> INFO: flawed TBM trailers: 0
[12:00:08.130] <TB3> INFO: event ID mismatches: 0
[12:00:08.130] <TB3> INFO: ROC errors: 0
[12:00:08.130] <TB3> INFO: missing ROC header(s): 0
[12:00:08.130] <TB3> INFO: misplaced readback start: 0
[12:00:08.130] <TB3> INFO: Pixel decoding errors: 0
[12:00:08.130] <TB3> INFO: pixel data incomplete: 0
[12:00:08.130] <TB3> INFO: pixel address: 0
[12:00:08.130] <TB3> INFO: pulse height fill bit: 0
[12:00:08.130] <TB3> INFO: buffer corruption: 0
[12:00:08.137] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C15.dat
[12:00:08.137] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[12:00:08.137] <TB3> INFO: ######################################################################
[12:00:08.137] <TB3> INFO: PixTestReadback::doTest()
[12:00:08.137] <TB3> INFO: ######################################################################
[12:00:08.137] <TB3> INFO: ----------------------------------------------------------------------
[12:00:08.137] <TB3> INFO: PixTestReadback::CalibrateVd()
[12:00:08.137] <TB3> INFO: ----------------------------------------------------------------------
[12:00:18.097] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C0.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C1.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C2.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C3.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C4.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C5.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C6.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C7.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C8.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C9.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C10.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C11.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C12.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C13.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C14.dat
[12:00:18.098] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C15.dat
[12:00:18.126] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:00:18.126] <TB3> INFO: ----------------------------------------------------------------------
[12:00:18.126] <TB3> INFO: PixTestReadback::CalibrateVa()
[12:00:18.126] <TB3> INFO: ----------------------------------------------------------------------
[12:00:28.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C0.dat
[12:00:28.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C1.dat
[12:00:28.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C2.dat
[12:00:28.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C3.dat
[12:00:28.011] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C4.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C5.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C6.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C7.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C8.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C9.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C10.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C11.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C12.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C13.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C14.dat
[12:00:28.012] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C15.dat
[12:00:28.040] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:00:28.040] <TB3> INFO: ----------------------------------------------------------------------
[12:00:28.040] <TB3> INFO: PixTestReadback::readbackVbg()
[12:00:28.040] <TB3> INFO: ----------------------------------------------------------------------
[12:00:35.679] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:00:35.679] <TB3> INFO: ----------------------------------------------------------------------
[12:00:35.679] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[12:00:35.679] <TB3> INFO: ----------------------------------------------------------------------
[12:00:35.679] <TB3> INFO: Vbg will be calibrated using Vd calibration
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.4calibrated Vbg = 1.15828 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.5calibrated Vbg = 1.15688 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.5calibrated Vbg = 1.15418 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 153.8calibrated Vbg = 1.1456 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.6calibrated Vbg = 1.15397 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 157.8calibrated Vbg = 1.15465 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157.6calibrated Vbg = 1.15154 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 155calibrated Vbg = 1.15742 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 160calibrated Vbg = 1.14967 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.3calibrated Vbg = 1.15139 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 147.7calibrated Vbg = 1.14071 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 148.1calibrated Vbg = 1.14896 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 160.2calibrated Vbg = 1.15523 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.2calibrated Vbg = 1.15373 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 163.8calibrated Vbg = 1.16325 :::*/*/*/*/
[12:00:35.679] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 160.5calibrated Vbg = 1.15442 :::*/*/*/*/
[12:00:35.681] <TB3> INFO: ----------------------------------------------------------------------
[12:00:35.681] <TB3> INFO: PixTestReadback::CalibrateIa()
[12:00:35.681] <TB3> INFO: ----------------------------------------------------------------------
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C0.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C1.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C2.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C3.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C4.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C5.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C6.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C7.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C8.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C9.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C10.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C11.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C12.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C13.dat
[12:03:15.964] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C14.dat
[12:03:15.965] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//readbackCal_C15.dat
[12:03:15.991] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[12:03:15.992] <TB3> INFO: PixTestReadback::doTest() done
[12:03:15.992] <TB3> INFO: Decoding statistics:
[12:03:15.992] <TB3> INFO: General information:
[12:03:15.992] <TB3> INFO: 16bit words read: 1536
[12:03:15.992] <TB3> INFO: valid events total: 256
[12:03:15.992] <TB3> INFO: empty events: 256
[12:03:15.992] <TB3> INFO: valid events with pixels: 0
[12:03:15.992] <TB3> INFO: valid pixel hits: 0
[12:03:15.992] <TB3> INFO: Event errors: 0
[12:03:15.992] <TB3> INFO: start marker: 0
[12:03:15.992] <TB3> INFO: stop marker: 0
[12:03:15.992] <TB3> INFO: overflow: 0
[12:03:15.992] <TB3> INFO: invalid 5bit words: 0
[12:03:15.992] <TB3> INFO: invalid XOR eye diagram: 0
[12:03:15.992] <TB3> INFO: frame (failed synchr.): 0
[12:03:15.992] <TB3> INFO: idle data (no TBM trl): 0
[12:03:15.992] <TB3> INFO: no data (only TBM hdr): 0
[12:03:15.992] <TB3> INFO: TBM errors: 0
[12:03:15.992] <TB3> INFO: flawed TBM headers: 0
[12:03:15.993] <TB3> INFO: flawed TBM trailers: 0
[12:03:15.993] <TB3> INFO: event ID mismatches: 0
[12:03:15.993] <TB3> INFO: ROC errors: 0
[12:03:15.993] <TB3> INFO: missing ROC header(s): 0
[12:03:15.993] <TB3> INFO: misplaced readback start: 0
[12:03:15.993] <TB3> INFO: Pixel decoding errors: 0
[12:03:15.993] <TB3> INFO: pixel data incomplete: 0
[12:03:15.993] <TB3> INFO: pixel address: 0
[12:03:15.993] <TB3> INFO: pulse height fill bit: 0
[12:03:15.993] <TB3> INFO: buffer corruption: 0
[12:03:16.043] <TB3> INFO: ######################################################################
[12:03:16.043] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:03:16.043] <TB3> INFO: ######################################################################
[12:03:16.045] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:03:16.056] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:03:16.056] <TB3> INFO: run 1 of 1
[12:03:16.340] <TB3> INFO: Expecting 3120000 events.
[12:03:47.598] <TB3> INFO: 657905 events read in total (30666ms).











[12:04:17.744] <TB3> INFO: 1311495 events read in total (60812ms).











[12:04:48.108] <TB3> INFO: 1963465 events read in total (91176ms).











[12:05:18.352] <TB3> INFO: 2616385 events read in total (121420ms).











[12:05:41.496] <TB3> INFO: 3120000 events read in total (144564ms).
[12:05:41.574] <TB3> INFO: Test took 145519ms.
[12:06:04.977] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 168 seconds
[12:06:04.977] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 9 3 0 0 0 0 1 0 0
[12:06:04.977] <TB3> INFO: separation cut (per ROC): 105 102 106 107 105 101 106 95 105 106 92 99 97 102 108 101
[12:06:04.978] <TB3> INFO: Decoding statistics:
[12:06:04.978] <TB3> INFO: General information:
[12:06:04.978] <TB3> INFO: 16bit words read: 0
[12:06:04.978] <TB3> INFO: valid events total: 0
[12:06:04.978] <TB3> INFO: empty events: 0
[12:06:04.978] <TB3> INFO: valid events with pixels: 0
[12:06:04.978] <TB3> INFO: valid pixel hits: 0
[12:06:04.978] <TB3> INFO: Event errors: 0
[12:06:04.978] <TB3> INFO: start marker: 0
[12:06:04.978] <TB3> INFO: stop marker: 0
[12:06:04.978] <TB3> INFO: overflow: 0
[12:06:04.978] <TB3> INFO: invalid 5bit words: 0
[12:06:04.978] <TB3> INFO: invalid XOR eye diagram: 0
[12:06:04.978] <TB3> INFO: frame (failed synchr.): 0
[12:06:04.978] <TB3> INFO: idle data (no TBM trl): 0
[12:06:04.978] <TB3> INFO: no data (only TBM hdr): 0
[12:06:04.978] <TB3> INFO: TBM errors: 0
[12:06:04.978] <TB3> INFO: flawed TBM headers: 0
[12:06:04.978] <TB3> INFO: flawed TBM trailers: 0
[12:06:04.978] <TB3> INFO: event ID mismatches: 0
[12:06:04.978] <TB3> INFO: ROC errors: 0
[12:06:04.978] <TB3> INFO: missing ROC header(s): 0
[12:06:04.978] <TB3> INFO: misplaced readback start: 0
[12:06:04.978] <TB3> INFO: Pixel decoding errors: 0
[12:06:04.978] <TB3> INFO: pixel data incomplete: 0
[12:06:04.978] <TB3> INFO: pixel address: 0
[12:06:04.978] <TB3> INFO: pulse height fill bit: 0
[12:06:04.978] <TB3> INFO: buffer corruption: 0
[12:06:05.021] <TB3> INFO: ######################################################################
[12:06:05.021] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:06:05.021] <TB3> INFO: ######################################################################
[12:06:05.021] <TB3> INFO: ----------------------------------------------------------------------
[12:06:05.021] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:06:05.021] <TB3> INFO: ----------------------------------------------------------------------
[12:06:05.021] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[12:06:05.030] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[12:06:05.030] <TB3> INFO: run 1 of 1
[12:06:05.263] <TB3> INFO: Expecting 36608000 events.
[12:06:29.052] <TB3> INFO: 665000 events read in total (23197ms).
[12:06:51.947] <TB3> INFO: 1318450 events read in total (46092ms).
[12:07:14.714] <TB3> INFO: 1973050 events read in total (68859ms).
[12:07:37.730] <TB3> INFO: 2627550 events read in total (91875ms).
[12:08:00.534] <TB3> INFO: 3280100 events read in total (114679ms).
[12:08:23.175] <TB3> INFO: 3931800 events read in total (137320ms).
[12:08:46.237] <TB3> INFO: 4584150 events read in total (160382ms).
[12:09:08.888] <TB3> INFO: 5237200 events read in total (183033ms).
[12:09:31.959] <TB3> INFO: 5890750 events read in total (206104ms).
[12:09:55.378] <TB3> INFO: 6544350 events read in total (229523ms).
[12:10:18.099] <TB3> INFO: 7196300 events read in total (252244ms).
[12:10:41.405] <TB3> INFO: 7848700 events read in total (275550ms).
[12:11:04.335] <TB3> INFO: 8500450 events read in total (298480ms).
[12:11:27.216] <TB3> INFO: 9150750 events read in total (321361ms).
[12:11:50.015] <TB3> INFO: 9800300 events read in total (344160ms).
[12:12:12.725] <TB3> INFO: 10449850 events read in total (366870ms).
[12:12:35.789] <TB3> INFO: 11099100 events read in total (389934ms).
[12:12:58.518] <TB3> INFO: 11748150 events read in total (412663ms).
[12:13:21.285] <TB3> INFO: 12396850 events read in total (435430ms).
[12:13:43.923] <TB3> INFO: 13046500 events read in total (458068ms).
[12:14:06.942] <TB3> INFO: 13697500 events read in total (481087ms).
[12:14:29.780] <TB3> INFO: 14347500 events read in total (503925ms).
[12:14:52.492] <TB3> INFO: 14994950 events read in total (526637ms).
[12:15:15.226] <TB3> INFO: 15643900 events read in total (549371ms).
[12:15:37.890] <TB3> INFO: 16292200 events read in total (572035ms).
[12:16:00.473] <TB3> INFO: 16939900 events read in total (594618ms).
[12:16:23.328] <TB3> INFO: 17589050 events read in total (617473ms).
[12:16:46.093] <TB3> INFO: 18236450 events read in total (640238ms).
[12:17:08.838] <TB3> INFO: 18884400 events read in total (662983ms).
[12:17:31.706] <TB3> INFO: 19531450 events read in total (685851ms).
[12:17:54.060] <TB3> INFO: 20176750 events read in total (708205ms).
[12:18:17.398] <TB3> INFO: 20823950 events read in total (731543ms).
[12:18:40.286] <TB3> INFO: 21469000 events read in total (754431ms).
[12:19:02.961] <TB3> INFO: 22113700 events read in total (777106ms).
[12:19:25.924] <TB3> INFO: 22759500 events read in total (800069ms).
[12:19:48.389] <TB3> INFO: 23406450 events read in total (822534ms).
[12:20:11.086] <TB3> INFO: 24049850 events read in total (845231ms).
[12:20:33.883] <TB3> INFO: 24696500 events read in total (868028ms).
[12:20:56.415] <TB3> INFO: 25342650 events read in total (890560ms).
[12:21:18.788] <TB3> INFO: 25988250 events read in total (912933ms).
[12:21:41.734] <TB3> INFO: 26632500 events read in total (935879ms).
[12:22:04.509] <TB3> INFO: 27275650 events read in total (958654ms).
[12:22:26.876] <TB3> INFO: 27917850 events read in total (981021ms).
[12:22:49.522] <TB3> INFO: 28561200 events read in total (1003667ms).
[12:23:11.720] <TB3> INFO: 29204050 events read in total (1025865ms).
[12:23:34.453] <TB3> INFO: 29847350 events read in total (1048598ms).
[12:23:56.881] <TB3> INFO: 30491300 events read in total (1071026ms).
[12:24:19.136] <TB3> INFO: 31134600 events read in total (1093281ms).
[12:24:41.838] <TB3> INFO: 31778950 events read in total (1115983ms).
[12:25:04.494] <TB3> INFO: 32423250 events read in total (1138639ms).
[12:25:27.126] <TB3> INFO: 33067850 events read in total (1161271ms).
[12:25:49.935] <TB3> INFO: 33713300 events read in total (1184080ms).
[12:26:12.774] <TB3> INFO: 34360350 events read in total (1206919ms).
[12:26:35.321] <TB3> INFO: 35004050 events read in total (1229466ms).
[12:26:58.108] <TB3> INFO: 35650300 events read in total (1252253ms).
[12:27:21.255] <TB3> INFO: 36304050 events read in total (1275400ms).
[12:27:31.845] <TB3> INFO: 36608000 events read in total (1285990ms).
[12:27:31.920] <TB3> INFO: Test took 1286890ms.
[12:27:32.399] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:34.176] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:36.480] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:38.766] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:41.176] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:43.028] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:44.711] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:46.463] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:48.047] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:49.524] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:50.998] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:52.449] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:53.962] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:55.414] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:56.916] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:58.355] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:27:59.927] <TB3> INFO: PixTestScurves::scurves() done
[12:27:59.927] <TB3> INFO: Vcal mean: 112.12 122.52 108.01 119.79 105.70 109.68 112.17 99.77 116.63 120.63 96.32 110.64 114.91 109.80 121.72 107.95
[12:27:59.927] <TB3> INFO: Vcal RMS: 5.32 7.11 5.08 5.92 5.80 5.26 4.82 5.56 7.40 7.15 5.45 5.24 5.31 4.70 7.53 5.56
[12:27:59.927] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1314 seconds
[12:27:59.927] <TB3> INFO: Decoding statistics:
[12:27:59.927] <TB3> INFO: General information:
[12:27:59.927] <TB3> INFO: 16bit words read: 0
[12:27:59.927] <TB3> INFO: valid events total: 0
[12:27:59.927] <TB3> INFO: empty events: 0
[12:27:59.927] <TB3> INFO: valid events with pixels: 0
[12:27:59.928] <TB3> INFO: valid pixel hits: 0
[12:27:59.928] <TB3> INFO: Event errors: 0
[12:27:59.928] <TB3> INFO: start marker: 0
[12:27:59.928] <TB3> INFO: stop marker: 0
[12:27:59.928] <TB3> INFO: overflow: 0
[12:27:59.928] <TB3> INFO: invalid 5bit words: 0
[12:27:59.928] <TB3> INFO: invalid XOR eye diagram: 0
[12:27:59.928] <TB3> INFO: frame (failed synchr.): 0
[12:27:59.928] <TB3> INFO: idle data (no TBM trl): 0
[12:27:59.928] <TB3> INFO: no data (only TBM hdr): 0
[12:27:59.928] <TB3> INFO: TBM errors: 0
[12:27:59.928] <TB3> INFO: flawed TBM headers: 0
[12:27:59.928] <TB3> INFO: flawed TBM trailers: 0
[12:27:59.928] <TB3> INFO: event ID mismatches: 0
[12:27:59.928] <TB3> INFO: ROC errors: 0
[12:27:59.928] <TB3> INFO: missing ROC header(s): 0
[12:27:59.928] <TB3> INFO: misplaced readback start: 0
[12:27:59.928] <TB3> INFO: Pixel decoding errors: 0
[12:27:59.928] <TB3> INFO: pixel data incomplete: 0
[12:27:59.928] <TB3> INFO: pixel address: 0
[12:27:59.928] <TB3> INFO: pulse height fill bit: 0
[12:27:59.928] <TB3> INFO: buffer corruption: 0
[12:28:00.010] <TB3> INFO: ######################################################################
[12:28:00.010] <TB3> INFO: PixTestTrim::doTest()
[12:28:00.010] <TB3> INFO: ######################################################################
[12:28:00.011] <TB3> INFO: ----------------------------------------------------------------------
[12:28:00.011] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[12:28:00.011] <TB3> INFO: ----------------------------------------------------------------------
[12:28:00.077] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:28:00.077] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:28:00.089] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:28:00.089] <TB3> INFO: run 1 of 1
[12:28:00.381] <TB3> INFO: Expecting 5025280 events.
[12:28:31.821] <TB3> INFO: 823976 events read in total (30847ms).
[12:29:02.584] <TB3> INFO: 1642800 events read in total (61610ms).
[12:29:33.120] <TB3> INFO: 2458584 events read in total (92147ms).
[12:30:03.666] <TB3> INFO: 3271824 events read in total (122692ms).
[12:30:33.845] <TB3> INFO: 4081888 events read in total (152871ms).
[12:31:04.754] <TB3> INFO: 4892216 events read in total (183780ms).
[12:31:10.222] <TB3> INFO: 5025280 events read in total (189248ms).
[12:31:10.272] <TB3> INFO: Test took 190183ms.
[12:31:27.857] <TB3> INFO: ROC 0 VthrComp = 118
[12:31:27.857] <TB3> INFO: ROC 1 VthrComp = 123
[12:31:27.857] <TB3> INFO: ROC 2 VthrComp = 116
[12:31:27.858] <TB3> INFO: ROC 3 VthrComp = 125
[12:31:27.858] <TB3> INFO: ROC 4 VthrComp = 109
[12:31:27.859] <TB3> INFO: ROC 5 VthrComp = 110
[12:31:27.859] <TB3> INFO: ROC 6 VthrComp = 120
[12:31:27.859] <TB3> INFO: ROC 7 VthrComp = 102
[12:31:27.859] <TB3> INFO: ROC 8 VthrComp = 113
[12:31:27.860] <TB3> INFO: ROC 9 VthrComp = 123
[12:31:27.860] <TB3> INFO: ROC 10 VthrComp = 99
[12:31:27.860] <TB3> INFO: ROC 11 VthrComp = 113
[12:31:27.860] <TB3> INFO: ROC 12 VthrComp = 120
[12:31:27.860] <TB3> INFO: ROC 13 VthrComp = 111
[12:31:27.861] <TB3> INFO: ROC 14 VthrComp = 129
[12:31:27.861] <TB3> INFO: ROC 15 VthrComp = 107
[12:31:28.095] <TB3> INFO: Expecting 41600 events.
[12:31:31.728] <TB3> INFO: 41600 events read in total (3042ms).
[12:31:31.729] <TB3> INFO: Test took 3867ms.
[12:31:31.737] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:31:31.737] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:31:31.745] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:31:31.745] <TB3> INFO: run 1 of 1
[12:31:32.023] <TB3> INFO: Expecting 5025280 events.
[12:31:58.914] <TB3> INFO: 591224 events read in total (26299ms).
[12:32:25.423] <TB3> INFO: 1180680 events read in total (52808ms).
[12:32:51.499] <TB3> INFO: 1770488 events read in total (78884ms).
[12:33:17.360] <TB3> INFO: 2359856 events read in total (104745ms).
[12:33:43.057] <TB3> INFO: 2947424 events read in total (130442ms).
[12:34:09.046] <TB3> INFO: 3532688 events read in total (156431ms).
[12:34:34.615] <TB3> INFO: 4117312 events read in total (182000ms).
[12:35:00.967] <TB3> INFO: 4701448 events read in total (208352ms).
[12:35:15.622] <TB3> INFO: 5025280 events read in total (223007ms).
[12:35:15.681] <TB3> INFO: Test took 223935ms.
[12:35:39.457] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.3465 for pixel 6/1 mean/min/max = 45.7945/31.2271/60.3619
[12:35:39.457] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 62.3137 for pixel 19/1 mean/min/max = 46.3346/30.276/62.3931
[12:35:39.458] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.4859 for pixel 0/28 mean/min/max = 45.1813/31.7897/58.5728
[12:35:39.458] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.7855 for pixel 18/0 mean/min/max = 45.628/30.2662/60.9897
[12:35:39.458] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 62.1455 for pixel 14/71 mean/min/max = 48.19/34.2216/62.1585
[12:35:39.459] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 63.5276 for pixel 29/14 mean/min/max = 48.9261/34.108/63.7443
[12:35:39.459] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.1336 for pixel 0/13 mean/min/max = 45.247/32.2793/58.2146
[12:35:39.459] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 60.3171 for pixel 0/5 mean/min/max = 46.6044/32.5495/60.6592
[12:35:39.460] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 63.9817 for pixel 4/43 mean/min/max = 47.8791/31.3829/64.3752
[12:35:39.460] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.5208 for pixel 6/79 mean/min/max = 46.6976/30.6827/62.7125
[12:35:39.460] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.8906 for pixel 2/1 mean/min/max = 46.292/32.5545/60.0296
[12:35:39.461] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.9258 for pixel 23/37 mean/min/max = 46.112/32.2423/59.9816
[12:35:39.461] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 59.21 for pixel 3/17 mean/min/max = 45.7687/31.7638/59.7737
[12:35:39.462] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 60.7073 for pixel 8/18 mean/min/max = 47.6949/34.2872/61.1025
[12:35:39.462] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 59.1928 for pixel 6/58 mean/min/max = 45.3896/31.5221/59.257
[12:35:39.462] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 63.2877 for pixel 9/16 mean/min/max = 48.851/34.3914/63.3105
[12:35:39.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:35:39.551] <TB3> INFO: Expecting 411648 events.
[12:35:49.073] <TB3> INFO: 411648 events read in total (8930ms).
[12:35:49.079] <TB3> INFO: Expecting 411648 events.
[12:35:58.366] <TB3> INFO: 411648 events read in total (8884ms).
[12:35:58.378] <TB3> INFO: Expecting 411648 events.
[12:36:07.596] <TB3> INFO: 411648 events read in total (8815ms).
[12:36:07.612] <TB3> INFO: Expecting 411648 events.
[12:36:16.945] <TB3> INFO: 411648 events read in total (8930ms).
[12:36:16.960] <TB3> INFO: Expecting 411648 events.
[12:36:26.200] <TB3> INFO: 411648 events read in total (8837ms).
[12:36:26.216] <TB3> INFO: Expecting 411648 events.
[12:36:35.507] <TB3> INFO: 411648 events read in total (8888ms).
[12:36:35.534] <TB3> INFO: Expecting 411648 events.
[12:36:44.707] <TB3> INFO: 411648 events read in total (8770ms).
[12:36:44.728] <TB3> INFO: Expecting 411648 events.
[12:36:53.861] <TB3> INFO: 411648 events read in total (8730ms).
[12:36:53.885] <TB3> INFO: Expecting 411648 events.
[12:37:03.188] <TB3> INFO: 411648 events read in total (8901ms).
[12:37:03.225] <TB3> INFO: Expecting 411648 events.
[12:37:12.432] <TB3> INFO: 411648 events read in total (8804ms).
[12:37:12.459] <TB3> INFO: Expecting 411648 events.
[12:37:21.683] <TB3> INFO: 411648 events read in total (8821ms).
[12:37:21.714] <TB3> INFO: Expecting 411648 events.
[12:37:31.081] <TB3> INFO: 411648 events read in total (8964ms).
[12:37:31.114] <TB3> INFO: Expecting 411648 events.
[12:37:40.388] <TB3> INFO: 411648 events read in total (8871ms).
[12:37:40.440] <TB3> INFO: Expecting 411648 events.
[12:37:49.770] <TB3> INFO: 411648 events read in total (8927ms).
[12:37:49.830] <TB3> INFO: Expecting 411648 events.
[12:37:59.151] <TB3> INFO: 411648 events read in total (8918ms).
[12:37:59.213] <TB3> INFO: Expecting 411648 events.
[12:38:08.507] <TB3> INFO: 411648 events read in total (8891ms).
[12:38:08.553] <TB3> INFO: Test took 149090ms.
[12:38:09.354] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:38:09.366] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:38:09.366] <TB3> INFO: run 1 of 1
[12:38:09.655] <TB3> INFO: Expecting 5025280 events.
[12:38:36.891] <TB3> INFO: 591496 events read in total (26644ms).
[12:39:03.129] <TB3> INFO: 1181824 events read in total (52882ms).
[12:39:29.139] <TB3> INFO: 1768416 events read in total (78892ms).
[12:39:55.380] <TB3> INFO: 2353136 events read in total (105133ms).
[12:40:21.764] <TB3> INFO: 2937200 events read in total (131518ms).
[12:40:47.896] <TB3> INFO: 3521992 events read in total (157649ms).
[12:41:14.283] <TB3> INFO: 4107448 events read in total (184037ms).
[12:41:40.357] <TB3> INFO: 4692584 events read in total (210110ms).
[12:41:55.271] <TB3> INFO: 5025280 events read in total (225025ms).
[12:41:55.364] <TB3> INFO: Test took 225999ms.
[12:42:16.259] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 147.603430
[12:42:16.492] <TB3> INFO: Expecting 208000 events.
[12:42:26.184] <TB3> INFO: 208000 events read in total (9100ms).
[12:42:26.185] <TB3> INFO: Test took 9925ms.
[12:42:26.260] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 157 (-1/-1) hits flags = 528 (plus default)
[12:42:26.272] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:42:26.272] <TB3> INFO: run 1 of 1
[12:42:26.561] <TB3> INFO: Expecting 5224960 events.
[12:42:52.904] <TB3> INFO: 583872 events read in total (25751ms).
[12:43:18.339] <TB3> INFO: 1167648 events read in total (51186ms).
[12:43:44.384] <TB3> INFO: 1751376 events read in total (77231ms).
[12:44:09.676] <TB3> INFO: 2335080 events read in total (102523ms).
[12:44:35.695] <TB3> INFO: 2919168 events read in total (128542ms).
[12:45:01.556] <TB3> INFO: 3502536 events read in total (154403ms).
[12:45:27.631] <TB3> INFO: 4085744 events read in total (180478ms).
[12:45:53.701] <TB3> INFO: 4667984 events read in total (206548ms).
[12:46:19.029] <TB3> INFO: 5224960 events read in total (231876ms).
[12:46:19.101] <TB3> INFO: Test took 232829ms.
[12:46:46.257] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.466156 .. 46.394388
[12:46:46.551] <TB3> INFO: Expecting 208000 events.
[12:46:56.714] <TB3> INFO: 208000 events read in total (9572ms).
[12:46:56.715] <TB3> INFO: Test took 10456ms.
[12:46:56.761] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:46:56.770] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:46:56.770] <TB3> INFO: run 1 of 1
[12:46:57.048] <TB3> INFO: Expecting 1331200 events.
[12:47:25.890] <TB3> INFO: 655024 events read in total (28251ms).
[12:47:53.594] <TB3> INFO: 1308040 events read in total (55955ms).
[12:47:55.069] <TB3> INFO: 1331200 events read in total (57430ms).
[12:47:55.095] <TB3> INFO: Test took 58326ms.
[12:48:09.337] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 26.015044 .. 47.100742
[12:48:09.571] <TB3> INFO: Expecting 208000 events.
[12:48:19.507] <TB3> INFO: 208000 events read in total (9345ms).
[12:48:19.508] <TB3> INFO: Test took 10169ms.
[12:48:19.584] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[12:48:19.595] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:48:19.595] <TB3> INFO: run 1 of 1
[12:48:19.884] <TB3> INFO: Expecting 1397760 events.
[12:48:48.005] <TB3> INFO: 655864 events read in total (27530ms).
[12:49:15.604] <TB3> INFO: 1311016 events read in total (55130ms).
[12:49:19.497] <TB3> INFO: 1397760 events read in total (59022ms).
[12:49:19.521] <TB3> INFO: Test took 59926ms.
[12:49:31.724] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 25.499442 .. 48.082613
[12:49:32.021] <TB3> INFO: Expecting 208000 events.
[12:49:42.121] <TB3> INFO: 208000 events read in total (9509ms).
[12:49:42.122] <TB3> INFO: Test took 10397ms.
[12:49:42.168] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:49:42.177] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:49:42.177] <TB3> INFO: run 1 of 1
[12:49:42.454] <TB3> INFO: Expecting 1464320 events.
[12:50:10.529] <TB3> INFO: 656176 events read in total (27483ms).
[12:50:38.221] <TB3> INFO: 1311744 events read in total (55175ms).
[12:50:44.942] <TB3> INFO: 1464320 events read in total (61896ms).
[12:50:44.977] <TB3> INFO: Test took 62801ms.
[12:50:57.371] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:50:57.371] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:50:57.380] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[12:50:57.380] <TB3> INFO: run 1 of 1
[12:50:57.612] <TB3> INFO: Expecting 1364480 events.
[12:51:26.345] <TB3> INFO: 667528 events read in total (28141ms).
[12:51:55.057] <TB3> INFO: 1334608 events read in total (56853ms).
[12:51:56.849] <TB3> INFO: 1364480 events read in total (58645ms).
[12:51:56.873] <TB3> INFO: Test took 59493ms.
[12:52:07.897] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C0.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C1.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C2.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C3.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C4.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C5.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C6.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C7.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C8.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C9.dat
[12:52:07.898] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C10.dat
[12:52:07.899] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C11.dat
[12:52:07.899] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C12.dat
[12:52:07.899] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C13.dat
[12:52:07.899] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C14.dat
[12:52:07.899] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C15.dat
[12:52:07.899] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C0.dat
[12:52:07.907] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C1.dat
[12:52:07.915] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C2.dat
[12:52:07.923] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C3.dat
[12:52:07.931] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C4.dat
[12:52:07.940] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C5.dat
[12:52:07.948] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C6.dat
[12:52:07.956] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C7.dat
[12:52:07.964] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C8.dat
[12:52:07.972] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C9.dat
[12:52:07.981] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C10.dat
[12:52:07.989] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C11.dat
[12:52:07.997] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C12.dat
[12:52:08.005] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C13.dat
[12:52:08.012] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C14.dat
[12:52:08.018] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//trimParameters35_C15.dat
[12:52:08.023] <TB3> INFO: PixTestTrim::trimTest() done
[12:52:08.023] <TB3> INFO: vtrim: 151 147 103 152 137 136 136 123 124 125 137 135 126 122 120 128
[12:52:08.023] <TB3> INFO: vthrcomp: 118 123 116 125 109 110 120 102 113 123 99 113 120 111 129 107
[12:52:08.023] <TB3> INFO: vcal mean: 34.88 35.21 34.96 35.01 34.97 35.04 34.95 34.96 34.99 34.97 34.92 34.97 34.94 34.95 34.94 35.00
[12:52:08.023] <TB3> INFO: vcal RMS: 1.16 1.43 1.01 1.31 1.07 1.17 0.98 1.04 1.19 1.19 1.10 1.10 1.14 1.04 1.05 1.13
[12:52:08.023] <TB3> INFO: bits mean: 10.31 10.33 9.29 10.55 9.02 9.18 9.67 9.23 9.64 9.44 10.23 10.03 10.06 9.35 9.72 9.23
[12:52:08.023] <TB3> INFO: bits RMS: 2.41 2.50 2.88 2.42 2.45 2.42 2.65 2.64 2.58 2.80 2.28 2.38 2.47 2.30 2.65 2.33
[12:52:08.030] <TB3> INFO: ----------------------------------------------------------------------
[12:52:08.030] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:52:08.030] <TB3> INFO: ----------------------------------------------------------------------
[12:52:08.033] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:52:08.041] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:52:08.041] <TB3> INFO: run 1 of 1
[12:52:08.277] <TB3> INFO: Expecting 4160000 events.
[12:52:40.580] <TB3> INFO: 734795 events read in total (31711ms).
[12:53:12.421] <TB3> INFO: 1463445 events read in total (63552ms).
[12:53:43.992] <TB3> INFO: 2189515 events read in total (95123ms).
[12:54:15.482] <TB3> INFO: 2911950 events read in total (126613ms).
[12:54:47.079] <TB3> INFO: 3631285 events read in total (158210ms).
[12:55:10.524] <TB3> INFO: 4160000 events read in total (181655ms).
[12:55:10.579] <TB3> INFO: Test took 182534ms.
[12:55:35.317] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[12:55:35.329] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:55:35.329] <TB3> INFO: run 1 of 1
[12:55:35.627] <TB3> INFO: Expecting 4222400 events.
[12:56:07.199] <TB3> INFO: 707205 events read in total (30981ms).
[12:56:38.323] <TB3> INFO: 1409895 events read in total (62105ms).
[12:57:09.262] <TB3> INFO: 2110145 events read in total (93044ms).
[12:57:40.283] <TB3> INFO: 2807715 events read in total (124065ms).
[12:58:11.084] <TB3> INFO: 3503265 events read in total (154866ms).
[12:58:41.900] <TB3> INFO: 4201020 events read in total (185682ms).
[12:58:43.207] <TB3> INFO: 4222400 events read in total (186989ms).
[12:58:43.266] <TB3> INFO: Test took 187937ms.
[12:59:12.350] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[12:59:12.360] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[12:59:12.360] <TB3> INFO: run 1 of 1
[12:59:12.591] <TB3> INFO: Expecting 3931200 events.
[12:59:44.657] <TB3> INFO: 725145 events read in total (31474ms).
[13:00:15.976] <TB3> INFO: 1444750 events read in total (62793ms).
[13:00:46.859] <TB3> INFO: 2161050 events read in total (93676ms).
[13:01:18.043] <TB3> INFO: 2874970 events read in total (124860ms).
[13:01:49.550] <TB3> INFO: 3586090 events read in total (156367ms).
[13:02:04.860] <TB3> INFO: 3931200 events read in total (171677ms).
[13:02:04.930] <TB3> INFO: Test took 172569ms.
[13:02:29.737] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[13:02:29.748] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:02:29.748] <TB3> INFO: run 1 of 1
[13:02:29.003] <TB3> INFO: Expecting 3868800 events.
[13:03:02.646] <TB3> INFO: 729030 events read in total (32052ms).
[13:03:34.175] <TB3> INFO: 1452260 events read in total (63581ms).
[13:04:05.752] <TB3> INFO: 2172405 events read in total (95158ms).
[13:04:37.037] <TB3> INFO: 2889400 events read in total (126443ms).
[13:05:08.887] <TB3> INFO: 3604985 events read in total (158293ms).
[13:05:20.666] <TB3> INFO: 3868800 events read in total (170072ms).
[13:05:20.722] <TB3> INFO: Test took 170974ms.
[13:05:43.759] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 188 (-1/-1) hits flags = 528 (plus default)
[13:05:43.768] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[13:05:43.768] <TB3> INFO: run 1 of 1
[13:05:43.999] <TB3> INFO: Expecting 3931200 events.
[13:06:16.373] <TB3> INFO: 724935 events read in total (31782ms).
[13:06:47.710] <TB3> INFO: 1444365 events read in total (63119ms).
[13:07:18.970] <TB3> INFO: 2160410 events read in total (94379ms).
[13:07:50.123] <TB3> INFO: 2874170 events read in total (125532ms).
[13:08:21.259] <TB3> INFO: 3585030 events read in total (156668ms).
[13:08:36.732] <TB3> INFO: 3931200 events read in total (172141ms).
[13:08:36.781] <TB3> INFO: Test took 173013ms.
[13:09:02.114] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:09:02.115] <TB3> INFO: PixTestTrim::doTest() done, duration: 2462 seconds
[13:09:02.115] <TB3> INFO: Decoding statistics:
[13:09:02.115] <TB3> INFO: General information:
[13:09:02.115] <TB3> INFO: 16bit words read: 0
[13:09:02.115] <TB3> INFO: valid events total: 0
[13:09:02.115] <TB3> INFO: empty events: 0
[13:09:02.115] <TB3> INFO: valid events with pixels: 0
[13:09:02.115] <TB3> INFO: valid pixel hits: 0
[13:09:02.115] <TB3> INFO: Event errors: 0
[13:09:02.115] <TB3> INFO: start marker: 0
[13:09:02.115] <TB3> INFO: stop marker: 0
[13:09:02.115] <TB3> INFO: overflow: 0
[13:09:02.115] <TB3> INFO: invalid 5bit words: 0
[13:09:02.115] <TB3> INFO: invalid XOR eye diagram: 0
[13:09:02.115] <TB3> INFO: frame (failed synchr.): 0
[13:09:02.115] <TB3> INFO: idle data (no TBM trl): 0
[13:09:02.115] <TB3> INFO: no data (only TBM hdr): 0
[13:09:02.115] <TB3> INFO: TBM errors: 0
[13:09:02.115] <TB3> INFO: flawed TBM headers: 0
[13:09:02.115] <TB3> INFO: flawed TBM trailers: 0
[13:09:02.115] <TB3> INFO: event ID mismatches: 0
[13:09:02.115] <TB3> INFO: ROC errors: 0
[13:09:02.115] <TB3> INFO: missing ROC header(s): 0
[13:09:02.115] <TB3> INFO: misplaced readback start: 0
[13:09:02.115] <TB3> INFO: Pixel decoding errors: 0
[13:09:02.115] <TB3> INFO: pixel data incomplete: 0
[13:09:02.115] <TB3> INFO: pixel address: 0
[13:09:02.115] <TB3> INFO: pulse height fill bit: 0
[13:09:02.115] <TB3> INFO: buffer corruption: 0
[13:09:02.732] <TB3> INFO: ######################################################################
[13:09:02.732] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:09:02.732] <TB3> INFO: ######################################################################
[13:09:02.988] <TB3> INFO: Expecting 41600 events.
[13:09:06.500] <TB3> INFO: 41600 events read in total (2920ms).
[13:09:06.501] <TB3> INFO: Test took 3768ms.
[13:09:06.936] <TB3> INFO: Expecting 41600 events.
[13:09:10.555] <TB3> INFO: 41600 events read in total (3028ms).
[13:09:10.556] <TB3> INFO: Test took 3853ms.
[13:09:10.844] <TB3> INFO: Expecting 41600 events.
[13:09:14.533] <TB3> INFO: 41600 events read in total (3098ms).
[13:09:14.534] <TB3> INFO: Test took 3955ms.
[13:09:14.825] <TB3> INFO: Expecting 41600 events.
[13:09:18.321] <TB3> INFO: 41600 events read in total (2904ms).
[13:09:18.321] <TB3> INFO: Test took 3760ms.
[13:09:18.609] <TB3> INFO: Expecting 41600 events.
[13:09:22.196] <TB3> INFO: 41600 events read in total (2995ms).
[13:09:22.197] <TB3> INFO: Test took 3852ms.
[13:09:22.508] <TB3> INFO: Expecting 41600 events.
[13:09:26.055] <TB3> INFO: 41600 events read in total (2956ms).
[13:09:26.056] <TB3> INFO: Test took 3836ms.
[13:09:26.371] <TB3> INFO: Expecting 41600 events.
[13:09:30.069] <TB3> INFO: 41600 events read in total (3106ms).
[13:09:30.070] <TB3> INFO: Test took 3986ms.
[13:09:30.384] <TB3> INFO: Expecting 41600 events.
[13:09:33.992] <TB3> INFO: 41600 events read in total (3017ms).
[13:09:33.992] <TB3> INFO: Test took 3899ms.
[13:09:34.282] <TB3> INFO: Expecting 41600 events.
[13:09:37.935] <TB3> INFO: 41600 events read in total (3061ms).
[13:09:37.936] <TB3> INFO: Test took 3919ms.
[13:09:38.224] <TB3> INFO: Expecting 41600 events.
[13:09:41.818] <TB3> INFO: 41600 events read in total (3002ms).
[13:09:41.818] <TB3> INFO: Test took 3859ms.
[13:09:42.132] <TB3> INFO: Expecting 41600 events.
[13:09:45.683] <TB3> INFO: 41600 events read in total (2959ms).
[13:09:45.684] <TB3> INFO: Test took 3842ms.
[13:09:45.972] <TB3> INFO: Expecting 41600 events.
[13:09:49.556] <TB3> INFO: 41600 events read in total (2992ms).
[13:09:49.557] <TB3> INFO: Test took 3850ms.
[13:09:49.845] <TB3> INFO: Expecting 41600 events.
[13:09:53.315] <TB3> INFO: 41600 events read in total (2879ms).
[13:09:53.316] <TB3> INFO: Test took 3736ms.
[13:09:53.635] <TB3> INFO: Expecting 41600 events.
[13:09:57.242] <TB3> INFO: 41600 events read in total (3015ms).
[13:09:57.243] <TB3> INFO: Test took 3904ms.
[13:09:57.534] <TB3> INFO: Expecting 41600 events.
[13:10:01.156] <TB3> INFO: 41600 events read in total (3030ms).
[13:10:01.157] <TB3> INFO: Test took 3887ms.
[13:10:01.445] <TB3> INFO: Expecting 41600 events.
[13:10:05.073] <TB3> INFO: 41600 events read in total (3037ms).
[13:10:05.074] <TB3> INFO: Test took 3894ms.
[13:10:05.362] <TB3> INFO: Expecting 41600 events.
[13:10:08.989] <TB3> INFO: 41600 events read in total (3036ms).
[13:10:08.990] <TB3> INFO: Test took 3893ms.
[13:10:09.278] <TB3> INFO: Expecting 41600 events.
[13:10:12.790] <TB3> INFO: 41600 events read in total (2921ms).
[13:10:12.790] <TB3> INFO: Test took 3777ms.
[13:10:13.082] <TB3> INFO: Expecting 41600 events.
[13:10:16.543] <TB3> INFO: 41600 events read in total (2869ms).
[13:10:16.544] <TB3> INFO: Test took 3727ms.
[13:10:16.831] <TB3> INFO: Expecting 41600 events.
[13:10:20.431] <TB3> INFO: 41600 events read in total (3008ms).
[13:10:20.432] <TB3> INFO: Test took 3865ms.
[13:10:20.751] <TB3> INFO: Expecting 41600 events.
[13:10:24.416] <TB3> INFO: 41600 events read in total (3073ms).
[13:10:24.416] <TB3> INFO: Test took 3961ms.
[13:10:24.734] <TB3> INFO: Expecting 41600 events.
[13:10:28.337] <TB3> INFO: 41600 events read in total (3011ms).
[13:10:28.338] <TB3> INFO: Test took 3898ms.
[13:10:28.658] <TB3> INFO: Expecting 41600 events.
[13:10:32.173] <TB3> INFO: 41600 events read in total (2924ms).
[13:10:32.173] <TB3> INFO: Test took 3812ms.
[13:10:32.461] <TB3> INFO: Expecting 41600 events.
[13:10:35.958] <TB3> INFO: 41600 events read in total (2905ms).
[13:10:35.960] <TB3> INFO: Test took 3763ms.
[13:10:36.248] <TB3> INFO: Expecting 41600 events.
[13:10:39.846] <TB3> INFO: 41600 events read in total (3007ms).
[13:10:39.847] <TB3> INFO: Test took 3864ms.
[13:10:40.135] <TB3> INFO: Expecting 41600 events.
[13:10:43.619] <TB3> INFO: 41600 events read in total (2892ms).
[13:10:43.620] <TB3> INFO: Test took 3750ms.
[13:10:43.935] <TB3> INFO: Expecting 41600 events.
[13:10:47.654] <TB3> INFO: 41600 events read in total (3127ms).
[13:10:47.654] <TB3> INFO: Test took 4011ms.
[13:10:47.944] <TB3> INFO: Expecting 41600 events.
[13:10:51.660] <TB3> INFO: 41600 events read in total (3125ms).
[13:10:51.660] <TB3> INFO: Test took 3981ms.
[13:10:51.949] <TB3> INFO: Expecting 2560 events.
[13:10:52.831] <TB3> INFO: 2560 events read in total (291ms).
[13:10:52.831] <TB3> INFO: Test took 1159ms.
[13:10:53.139] <TB3> INFO: Expecting 2560 events.
[13:10:54.024] <TB3> INFO: 2560 events read in total (293ms).
[13:10:54.024] <TB3> INFO: Test took 1192ms.
[13:10:54.332] <TB3> INFO: Expecting 2560 events.
[13:10:55.216] <TB3> INFO: 2560 events read in total (292ms).
[13:10:55.216] <TB3> INFO: Test took 1192ms.
[13:10:55.524] <TB3> INFO: Expecting 2560 events.
[13:10:56.412] <TB3> INFO: 2560 events read in total (296ms).
[13:10:56.412] <TB3> INFO: Test took 1196ms.
[13:10:56.720] <TB3> INFO: Expecting 2560 events.
[13:10:57.600] <TB3> INFO: 2560 events read in total (288ms).
[13:10:57.600] <TB3> INFO: Test took 1188ms.
[13:10:57.908] <TB3> INFO: Expecting 2560 events.
[13:10:58.787] <TB3> INFO: 2560 events read in total (288ms).
[13:10:58.787] <TB3> INFO: Test took 1187ms.
[13:10:59.095] <TB3> INFO: Expecting 2560 events.
[13:10:59.974] <TB3> INFO: 2560 events read in total (287ms).
[13:10:59.974] <TB3> INFO: Test took 1186ms.
[13:11:00.282] <TB3> INFO: Expecting 2560 events.
[13:11:01.165] <TB3> INFO: 2560 events read in total (292ms).
[13:11:01.165] <TB3> INFO: Test took 1191ms.
[13:11:01.473] <TB3> INFO: Expecting 2560 events.
[13:11:02.352] <TB3> INFO: 2560 events read in total (287ms).
[13:11:02.352] <TB3> INFO: Test took 1186ms.
[13:11:02.661] <TB3> INFO: Expecting 2560 events.
[13:11:03.540] <TB3> INFO: 2560 events read in total (288ms).
[13:11:03.540] <TB3> INFO: Test took 1187ms.
[13:11:03.848] <TB3> INFO: Expecting 2560 events.
[13:11:04.728] <TB3> INFO: 2560 events read in total (288ms).
[13:11:04.728] <TB3> INFO: Test took 1187ms.
[13:11:05.037] <TB3> INFO: Expecting 2560 events.
[13:11:05.921] <TB3> INFO: 2560 events read in total (292ms).
[13:11:05.921] <TB3> INFO: Test took 1192ms.
[13:11:06.229] <TB3> INFO: Expecting 2560 events.
[13:11:07.113] <TB3> INFO: 2560 events read in total (293ms).
[13:11:07.113] <TB3> INFO: Test took 1192ms.
[13:11:07.421] <TB3> INFO: Expecting 2560 events.
[13:11:08.305] <TB3> INFO: 2560 events read in total (292ms).
[13:11:08.305] <TB3> INFO: Test took 1192ms.
[13:11:08.613] <TB3> INFO: Expecting 2560 events.
[13:11:09.497] <TB3> INFO: 2560 events read in total (292ms).
[13:11:09.497] <TB3> INFO: Test took 1191ms.
[13:11:09.806] <TB3> INFO: Expecting 2560 events.
[13:11:10.693] <TB3> INFO: 2560 events read in total (296ms).
[13:11:10.693] <TB3> INFO: Test took 1195ms.
[13:11:10.696] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:11:10.003] <TB3> INFO: Expecting 655360 events.
[13:11:25.623] <TB3> INFO: 655360 events read in total (14029ms).
[13:11:25.633] <TB3> INFO: Expecting 655360 events.
[13:11:40.158] <TB3> INFO: 655360 events read in total (14122ms).
[13:11:40.172] <TB3> INFO: Expecting 655360 events.
[13:11:54.775] <TB3> INFO: 655360 events read in total (14200ms).
[13:11:54.793] <TB3> INFO: Expecting 655360 events.
[13:12:09.514] <TB3> INFO: 655360 events read in total (14318ms).
[13:12:09.548] <TB3> INFO: Expecting 655360 events.
[13:12:23.002] <TB3> INFO: 655360 events read in total (14051ms).
[13:12:24.028] <TB3> INFO: Expecting 655360 events.
[13:12:38.642] <TB3> INFO: 655360 events read in total (14211ms).
[13:12:38.688] <TB3> INFO: Expecting 655360 events.
[13:12:53.281] <TB3> INFO: 655360 events read in total (14190ms).
[13:12:53.332] <TB3> INFO: Expecting 655360 events.
[13:13:07.768] <TB3> INFO: 655360 events read in total (14033ms).
[13:13:07.807] <TB3> INFO: Expecting 655360 events.
[13:13:22.230] <TB3> INFO: 655360 events read in total (14020ms).
[13:13:22.271] <TB3> INFO: Expecting 655360 events.
[13:13:36.757] <TB3> INFO: 655360 events read in total (14083ms).
[13:13:36.804] <TB3> INFO: Expecting 655360 events.
[13:13:51.163] <TB3> INFO: 655360 events read in total (13956ms).
[13:13:51.212] <TB3> INFO: Expecting 655360 events.
[13:14:05.582] <TB3> INFO: 655360 events read in total (13967ms).
[13:14:05.639] <TB3> INFO: Expecting 655360 events.
[13:14:20.072] <TB3> INFO: 655360 events read in total (14030ms).
[13:14:20.133] <TB3> INFO: Expecting 655360 events.
[13:14:34.576] <TB3> INFO: 655360 events read in total (14040ms).
[13:14:34.643] <TB3> INFO: Expecting 655360 events.
[13:14:49.097] <TB3> INFO: 655360 events read in total (14051ms).
[13:14:49.201] <TB3> INFO: Expecting 655360 events.
[13:15:03.699] <TB3> INFO: 655360 events read in total (14095ms).
[13:15:03.809] <TB3> INFO: Test took 233113ms.
[13:15:03.910] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:04.175] <TB3> INFO: Expecting 655360 events.
[13:15:18.652] <TB3> INFO: 655360 events read in total (13886ms).
[13:15:18.662] <TB3> INFO: Expecting 655360 events.
[13:15:33.022] <TB3> INFO: 655360 events read in total (13957ms).
[13:15:33.043] <TB3> INFO: Expecting 655360 events.
[13:15:47.558] <TB3> INFO: 655360 events read in total (14112ms).
[13:15:47.576] <TB3> INFO: Expecting 655360 events.
[13:16:01.842] <TB3> INFO: 655360 events read in total (13863ms).
[13:16:01.864] <TB3> INFO: Expecting 655360 events.
[13:16:16.077] <TB3> INFO: 655360 events read in total (13810ms).
[13:16:16.116] <TB3> INFO: Expecting 655360 events.
[13:16:30.177] <TB3> INFO: 655360 events read in total (13658ms).
[13:16:30.206] <TB3> INFO: Expecting 655360 events.
[13:16:44.498] <TB3> INFO: 655360 events read in total (13889ms).
[13:16:44.546] <TB3> INFO: Expecting 655360 events.
[13:16:58.921] <TB3> INFO: 655360 events read in total (13972ms).
[13:16:58.976] <TB3> INFO: Expecting 655360 events.
[13:17:13.148] <TB3> INFO: 655360 events read in total (13769ms).
[13:17:13.191] <TB3> INFO: Expecting 655360 events.
[13:17:27.540] <TB3> INFO: 655360 events read in total (13947ms).
[13:17:27.587] <TB3> INFO: Expecting 655360 events.
[13:17:41.799] <TB3> INFO: 655360 events read in total (13809ms).
[13:17:41.848] <TB3> INFO: Expecting 655360 events.
[13:17:56.178] <TB3> INFO: 655360 events read in total (13927ms).
[13:17:56.234] <TB3> INFO: Expecting 655360 events.
[13:18:10.490] <TB3> INFO: 655360 events read in total (13853ms).
[13:18:10.551] <TB3> INFO: Expecting 655360 events.
[13:18:24.851] <TB3> INFO: 655360 events read in total (13897ms).
[13:18:24.915] <TB3> INFO: Expecting 655360 events.
[13:18:39.243] <TB3> INFO: 655360 events read in total (13925ms).
[13:18:39.312] <TB3> INFO: Expecting 655360 events.
[13:18:53.480] <TB3> INFO: 655360 events read in total (13765ms).
[13:18:53.553] <TB3> INFO: Test took 229643ms.
[13:18:53.710] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.715] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.720] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.724] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.729] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.734] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.739] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.744] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.748] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.753] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.758] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:18:53.763] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:18:53.768] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:18:53.773] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:18:53.778] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[13:18:53.783] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[13:18:53.787] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[13:18:53.792] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.797] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.802] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.807] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.811] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:18:53.816] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:18:53.822] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:18:53.827] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:18:53.833] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.839] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:18:53.846] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:18:53.853] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:18:53.859] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:18:53.893] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C0.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C1.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C2.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C3.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C4.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C5.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C6.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C7.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C8.dat
[13:18:53.894] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C9.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C10.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C11.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C12.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C13.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C14.dat
[13:18:53.895] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//dacParameters35_C15.dat
[13:18:54.135] <TB3> INFO: Expecting 41600 events.
[13:18:57.241] <TB3> INFO: 41600 events read in total (2514ms).
[13:18:57.241] <TB3> INFO: Test took 3343ms.
[13:18:57.745] <TB3> INFO: Expecting 41600 events.
[13:19:00.815] <TB3> INFO: 41600 events read in total (2479ms).
[13:19:00.816] <TB3> INFO: Test took 3361ms.
[13:19:01.262] <TB3> INFO: Expecting 41600 events.
[13:19:04.416] <TB3> INFO: 41600 events read in total (2562ms).
[13:19:04.416] <TB3> INFO: Test took 3386ms.
[13:19:04.636] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:04.725] <TB3> INFO: Expecting 2560 events.
[13:19:05.608] <TB3> INFO: 2560 events read in total (292ms).
[13:19:05.608] <TB3> INFO: Test took 972ms.
[13:19:05.609] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:05.916] <TB3> INFO: Expecting 2560 events.
[13:19:06.803] <TB3> INFO: 2560 events read in total (295ms).
[13:19:06.804] <TB3> INFO: Test took 1195ms.
[13:19:06.805] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:07.112] <TB3> INFO: Expecting 2560 events.
[13:19:07.999] <TB3> INFO: 2560 events read in total (296ms).
[13:19:07.999] <TB3> INFO: Test took 1194ms.
[13:19:07.001] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:08.307] <TB3> INFO: Expecting 2560 events.
[13:19:09.192] <TB3> INFO: 2560 events read in total (293ms).
[13:19:09.192] <TB3> INFO: Test took 1191ms.
[13:19:09.194] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:09.500] <TB3> INFO: Expecting 2560 events.
[13:19:10.386] <TB3> INFO: 2560 events read in total (296ms).
[13:19:10.387] <TB3> INFO: Test took 1193ms.
[13:19:10.389] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:10.695] <TB3> INFO: Expecting 2560 events.
[13:19:11.578] <TB3> INFO: 2560 events read in total (291ms).
[13:19:11.579] <TB3> INFO: Test took 1190ms.
[13:19:11.581] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:11.887] <TB3> INFO: Expecting 2560 events.
[13:19:12.777] <TB3> INFO: 2560 events read in total (298ms).
[13:19:12.777] <TB3> INFO: Test took 1196ms.
[13:19:12.779] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:13.085] <TB3> INFO: Expecting 2560 events.
[13:19:13.969] <TB3> INFO: 2560 events read in total (292ms).
[13:19:13.970] <TB3> INFO: Test took 1192ms.
[13:19:13.971] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:14.278] <TB3> INFO: Expecting 2560 events.
[13:19:15.161] <TB3> INFO: 2560 events read in total (291ms).
[13:19:15.161] <TB3> INFO: Test took 1190ms.
[13:19:15.163] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:15.469] <TB3> INFO: Expecting 2560 events.
[13:19:16.347] <TB3> INFO: 2560 events read in total (287ms).
[13:19:16.348] <TB3> INFO: Test took 1185ms.
[13:19:16.349] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:16.656] <TB3> INFO: Expecting 2560 events.
[13:19:17.539] <TB3> INFO: 2560 events read in total (291ms).
[13:19:17.539] <TB3> INFO: Test took 1190ms.
[13:19:17.541] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:17.847] <TB3> INFO: Expecting 2560 events.
[13:19:18.726] <TB3> INFO: 2560 events read in total (287ms).
[13:19:18.727] <TB3> INFO: Test took 1186ms.
[13:19:18.728] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:19.035] <TB3> INFO: Expecting 2560 events.
[13:19:19.914] <TB3> INFO: 2560 events read in total (288ms).
[13:19:19.914] <TB3> INFO: Test took 1186ms.
[13:19:19.916] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:20.223] <TB3> INFO: Expecting 2560 events.
[13:19:21.101] <TB3> INFO: 2560 events read in total (287ms).
[13:19:21.101] <TB3> INFO: Test took 1185ms.
[13:19:21.103] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:21.410] <TB3> INFO: Expecting 2560 events.
[13:19:22.290] <TB3> INFO: 2560 events read in total (288ms).
[13:19:22.291] <TB3> INFO: Test took 1188ms.
[13:19:22.292] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:22.599] <TB3> INFO: Expecting 2560 events.
[13:19:23.479] <TB3> INFO: 2560 events read in total (288ms).
[13:19:23.479] <TB3> INFO: Test took 1187ms.
[13:19:23.481] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:23.788] <TB3> INFO: Expecting 2560 events.
[13:19:24.666] <TB3> INFO: 2560 events read in total (287ms).
[13:19:24.666] <TB3> INFO: Test took 1185ms.
[13:19:24.668] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:24.975] <TB3> INFO: Expecting 2560 events.
[13:19:25.853] <TB3> INFO: 2560 events read in total (287ms).
[13:19:25.853] <TB3> INFO: Test took 1185ms.
[13:19:25.855] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:26.161] <TB3> INFO: Expecting 2560 events.
[13:19:27.040] <TB3> INFO: 2560 events read in total (287ms).
[13:19:27.040] <TB3> INFO: Test took 1185ms.
[13:19:27.042] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:27.348] <TB3> INFO: Expecting 2560 events.
[13:19:28.232] <TB3> INFO: 2560 events read in total (292ms).
[13:19:28.233] <TB3> INFO: Test took 1191ms.
[13:19:28.235] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:28.541] <TB3> INFO: Expecting 2560 events.
[13:19:29.426] <TB3> INFO: 2560 events read in total (293ms).
[13:19:29.426] <TB3> INFO: Test took 1191ms.
[13:19:29.428] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:29.734] <TB3> INFO: Expecting 2560 events.
[13:19:30.614] <TB3> INFO: 2560 events read in total (288ms).
[13:19:30.614] <TB3> INFO: Test took 1186ms.
[13:19:30.616] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:30.922] <TB3> INFO: Expecting 2560 events.
[13:19:31.805] <TB3> INFO: 2560 events read in total (291ms).
[13:19:31.805] <TB3> INFO: Test took 1189ms.
[13:19:31.807] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:32.113] <TB3> INFO: Expecting 2560 events.
[13:19:32.993] <TB3> INFO: 2560 events read in total (288ms).
[13:19:32.993] <TB3> INFO: Test took 1186ms.
[13:19:32.995] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:33.301] <TB3> INFO: Expecting 2560 events.
[13:19:34.186] <TB3> INFO: 2560 events read in total (293ms).
[13:19:34.186] <TB3> INFO: Test took 1191ms.
[13:19:34.188] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:34.495] <TB3> INFO: Expecting 2560 events.
[13:19:35.382] <TB3> INFO: 2560 events read in total (295ms).
[13:19:35.382] <TB3> INFO: Test took 1194ms.
[13:19:35.384] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:35.691] <TB3> INFO: Expecting 2560 events.
[13:19:36.575] <TB3> INFO: 2560 events read in total (293ms).
[13:19:36.575] <TB3> INFO: Test took 1191ms.
[13:19:36.577] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:36.884] <TB3> INFO: Expecting 2560 events.
[13:19:37.767] <TB3> INFO: 2560 events read in total (292ms).
[13:19:37.767] <TB3> INFO: Test took 1190ms.
[13:19:37.769] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:38.076] <TB3> INFO: Expecting 2560 events.
[13:19:38.962] <TB3> INFO: 2560 events read in total (295ms).
[13:19:38.962] <TB3> INFO: Test took 1193ms.
[13:19:38.964] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:39.271] <TB3> INFO: Expecting 2560 events.
[13:19:40.154] <TB3> INFO: 2560 events read in total (292ms).
[13:19:40.154] <TB3> INFO: Test took 1191ms.
[13:19:40.156] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:40.462] <TB3> INFO: Expecting 2560 events.
[13:19:41.350] <TB3> INFO: 2560 events read in total (296ms).
[13:19:41.350] <TB3> INFO: Test took 1194ms.
[13:19:41.352] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:41.659] <TB3> INFO: Expecting 2560 events.
[13:19:42.541] <TB3> INFO: 2560 events read in total (290ms).
[13:19:42.542] <TB3> INFO: Test took 1190ms.
[13:19:43.005] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 640 seconds
[13:19:43.005] <TB3> INFO: PH scale (per ROC): 62 54 58 64 46 64 66 39 36 37 63 49 60 54 66 38
[13:19:43.005] <TB3> INFO: PH offset (per ROC): 122 107 114 130 105 133 113 107 100 95 124 103 124 121 128 86
[13:19:43.011] <TB3> INFO: Decoding statistics:
[13:19:43.011] <TB3> INFO: General information:
[13:19:43.011] <TB3> INFO: 16bit words read: 127884
[13:19:43.011] <TB3> INFO: valid events total: 20480
[13:19:43.011] <TB3> INFO: empty events: 17978
[13:19:43.011] <TB3> INFO: valid events with pixels: 2502
[13:19:43.011] <TB3> INFO: valid pixel hits: 2502
[13:19:43.011] <TB3> INFO: Event errors: 0
[13:19:43.011] <TB3> INFO: start marker: 0
[13:19:43.011] <TB3> INFO: stop marker: 0
[13:19:43.011] <TB3> INFO: overflow: 0
[13:19:43.011] <TB3> INFO: invalid 5bit words: 0
[13:19:43.011] <TB3> INFO: invalid XOR eye diagram: 0
[13:19:43.011] <TB3> INFO: frame (failed synchr.): 0
[13:19:43.011] <TB3> INFO: idle data (no TBM trl): 0
[13:19:43.012] <TB3> INFO: no data (only TBM hdr): 0
[13:19:43.012] <TB3> INFO: TBM errors: 0
[13:19:43.012] <TB3> INFO: flawed TBM headers: 0
[13:19:43.012] <TB3> INFO: flawed TBM trailers: 0
[13:19:43.012] <TB3> INFO: event ID mismatches: 0
[13:19:43.012] <TB3> INFO: ROC errors: 0
[13:19:43.012] <TB3> INFO: missing ROC header(s): 0
[13:19:43.012] <TB3> INFO: misplaced readback start: 0
[13:19:43.012] <TB3> INFO: Pixel decoding errors: 0
[13:19:43.012] <TB3> INFO: pixel data incomplete: 0
[13:19:43.012] <TB3> INFO: pixel address: 0
[13:19:43.012] <TB3> INFO: pulse height fill bit: 0
[13:19:43.012] <TB3> INFO: buffer corruption: 0
[13:19:43.280] <TB3> INFO: ######################################################################
[13:19:43.280] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:19:43.280] <TB3> INFO: ######################################################################
[13:19:43.291] <TB3> INFO: scanning low vcal = 10
[13:19:43.524] <TB3> INFO: Expecting 41600 events.
[13:19:47.118] <TB3> INFO: 41600 events read in total (3002ms).
[13:19:47.119] <TB3> INFO: Test took 3828ms.
[13:19:47.120] <TB3> INFO: scanning low vcal = 20
[13:19:47.419] <TB3> INFO: Expecting 41600 events.
[13:19:50.988] <TB3> INFO: 41600 events read in total (2978ms).
[13:19:50.988] <TB3> INFO: Test took 3867ms.
[13:19:50.990] <TB3> INFO: scanning low vcal = 30
[13:19:51.285] <TB3> INFO: Expecting 41600 events.
[13:19:54.955] <TB3> INFO: 41600 events read in total (3078ms).
[13:19:54.956] <TB3> INFO: Test took 3966ms.
[13:19:54.959] <TB3> INFO: scanning low vcal = 40
[13:19:55.236] <TB3> INFO: Expecting 41600 events.
[13:19:59.173] <TB3> INFO: 41600 events read in total (3346ms).
[13:19:59.174] <TB3> INFO: Test took 4215ms.
[13:19:59.177] <TB3> INFO: scanning low vcal = 50
[13:19:59.454] <TB3> INFO: Expecting 41600 events.
[13:20:03.404] <TB3> INFO: 41600 events read in total (3359ms).
[13:20:03.404] <TB3> INFO: Test took 4227ms.
[13:20:03.407] <TB3> INFO: scanning low vcal = 60
[13:20:03.683] <TB3> INFO: Expecting 41600 events.
[13:20:07.691] <TB3> INFO: 41600 events read in total (3416ms).
[13:20:07.692] <TB3> INFO: Test took 4285ms.
[13:20:07.694] <TB3> INFO: scanning low vcal = 70
[13:20:07.971] <TB3> INFO: Expecting 41600 events.
[13:20:11.984] <TB3> INFO: 41600 events read in total (3421ms).
[13:20:11.985] <TB3> INFO: Test took 4291ms.
[13:20:11.988] <TB3> INFO: scanning low vcal = 80
[13:20:12.264] <TB3> INFO: Expecting 41600 events.
[13:20:16.211] <TB3> INFO: 41600 events read in total (3355ms).
[13:20:16.211] <TB3> INFO: Test took 4223ms.
[13:20:16.214] <TB3> INFO: scanning low vcal = 90
[13:20:16.490] <TB3> INFO: Expecting 41600 events.
[13:20:20.500] <TB3> INFO: 41600 events read in total (3418ms).
[13:20:20.500] <TB3> INFO: Test took 4286ms.
[13:20:20.503] <TB3> INFO: scanning low vcal = 100
[13:20:20.780] <TB3> INFO: Expecting 41600 events.
[13:20:24.725] <TB3> INFO: 41600 events read in total (3354ms).
[13:20:24.725] <TB3> INFO: Test took 4222ms.
[13:20:24.728] <TB3> INFO: scanning low vcal = 110
[13:20:25.004] <TB3> INFO: Expecting 41600 events.
[13:20:29.076] <TB3> INFO: 41600 events read in total (3480ms).
[13:20:29.077] <TB3> INFO: Test took 4349ms.
[13:20:29.080] <TB3> INFO: scanning low vcal = 120
[13:20:29.356] <TB3> INFO: Expecting 41600 events.
[13:20:33.363] <TB3> INFO: 41600 events read in total (3415ms).
[13:20:33.363] <TB3> INFO: Test took 4283ms.
[13:20:33.366] <TB3> INFO: scanning low vcal = 130
[13:20:33.643] <TB3> INFO: Expecting 41600 events.
[13:20:37.637] <TB3> INFO: 41600 events read in total (3403ms).
[13:20:37.638] <TB3> INFO: Test took 4272ms.
[13:20:37.640] <TB3> INFO: scanning low vcal = 140
[13:20:37.917] <TB3> INFO: Expecting 41600 events.
[13:20:41.957] <TB3> INFO: 41600 events read in total (3448ms).
[13:20:41.958] <TB3> INFO: Test took 4317ms.
[13:20:41.961] <TB3> INFO: scanning low vcal = 150
[13:20:42.238] <TB3> INFO: Expecting 41600 events.
[13:20:46.277] <TB3> INFO: 41600 events read in total (3448ms).
[13:20:46.278] <TB3> INFO: Test took 4317ms.
[13:20:46.280] <TB3> INFO: scanning low vcal = 160
[13:20:46.557] <TB3> INFO: Expecting 41600 events.
[13:20:50.564] <TB3> INFO: 41600 events read in total (3415ms).
[13:20:50.565] <TB3> INFO: Test took 4285ms.
[13:20:50.568] <TB3> INFO: scanning low vcal = 170
[13:20:50.844] <TB3> INFO: Expecting 41600 events.
[13:20:54.813] <TB3> INFO: 41600 events read in total (3377ms).
[13:20:54.814] <TB3> INFO: Test took 4246ms.
[13:20:54.817] <TB3> INFO: scanning low vcal = 180
[13:20:55.110] <TB3> INFO: Expecting 41600 events.
[13:20:59.129] <TB3> INFO: 41600 events read in total (3427ms).
[13:20:59.129] <TB3> INFO: Test took 4312ms.
[13:20:59.132] <TB3> INFO: scanning low vcal = 190
[13:20:59.409] <TB3> INFO: Expecting 41600 events.
[13:21:03.433] <TB3> INFO: 41600 events read in total (3433ms).
[13:21:03.434] <TB3> INFO: Test took 4302ms.
[13:21:03.436] <TB3> INFO: scanning low vcal = 200
[13:21:03.713] <TB3> INFO: Expecting 41600 events.
[13:21:07.687] <TB3> INFO: 41600 events read in total (3383ms).
[13:21:07.688] <TB3> INFO: Test took 4252ms.
[13:21:07.690] <TB3> INFO: scanning low vcal = 210
[13:21:07.967] <TB3> INFO: Expecting 41600 events.
[13:21:11.988] <TB3> INFO: 41600 events read in total (3430ms).
[13:21:11.988] <TB3> INFO: Test took 4298ms.
[13:21:11.991] <TB3> INFO: scanning low vcal = 220
[13:21:12.268] <TB3> INFO: Expecting 41600 events.
[13:21:16.270] <TB3> INFO: 41600 events read in total (3411ms).
[13:21:16.271] <TB3> INFO: Test took 4280ms.
[13:21:16.274] <TB3> INFO: scanning low vcal = 230
[13:21:16.550] <TB3> INFO: Expecting 41600 events.
[13:21:20.500] <TB3> INFO: 41600 events read in total (3358ms).
[13:21:20.501] <TB3> INFO: Test took 4227ms.
[13:21:20.504] <TB3> INFO: scanning low vcal = 240
[13:21:20.781] <TB3> INFO: Expecting 41600 events.
[13:21:24.825] <TB3> INFO: 41600 events read in total (3453ms).
[13:21:24.826] <TB3> INFO: Test took 4322ms.
[13:21:24.829] <TB3> INFO: scanning low vcal = 250
[13:21:25.125] <TB3> INFO: Expecting 41600 events.
[13:21:29.112] <TB3> INFO: 41600 events read in total (3395ms).
[13:21:29.113] <TB3> INFO: Test took 4284ms.
[13:21:29.116] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:21:29.392] <TB3> INFO: Expecting 41600 events.
[13:21:33.475] <TB3> INFO: 41600 events read in total (3491ms).
[13:21:33.475] <TB3> INFO: Test took 4358ms.
[13:21:33.478] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:21:33.770] <TB3> INFO: Expecting 41600 events.
[13:21:37.769] <TB3> INFO: 41600 events read in total (3407ms).
[13:21:37.770] <TB3> INFO: Test took 4292ms.
[13:21:37.772] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:21:38.049] <TB3> INFO: Expecting 41600 events.
[13:21:42.044] <TB3> INFO: 41600 events read in total (3404ms).
[13:21:42.045] <TB3> INFO: Test took 4273ms.
[13:21:42.048] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:21:42.324] <TB3> INFO: Expecting 41600 events.
[13:21:46.272] <TB3> INFO: 41600 events read in total (3356ms).
[13:21:46.273] <TB3> INFO: Test took 4225ms.
[13:21:46.275] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:21:46.552] <TB3> INFO: Expecting 41600 events.
[13:21:50.546] <TB3> INFO: 41600 events read in total (3402ms).
[13:21:50.547] <TB3> INFO: Test took 4272ms.
[13:21:50.954] <TB3> INFO: PixTestGainPedestal::measure() done
[13:22:25.004] <TB3> INFO: PixTestGainPedestal::fit() done
[13:22:25.004] <TB3> INFO: non-linearity mean: 0.984 0.959 0.979 0.985 0.937 0.986 0.985 0.942 0.928 0.973 0.984 0.929 0.983 0.981 0.983 1.011
[13:22:25.004] <TB3> INFO: non-linearity RMS: 0.003 0.053 0.004 0.004 0.126 0.003 0.003 0.217 0.135 0.200 0.003 0.084 0.003 0.003 0.003 0.152
[13:22:25.004] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[13:22:25.018] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[13:22:25.032] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[13:22:25.045] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[13:22:25.059] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[13:22:25.072] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[13:22:25.086] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[13:22:25.100] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[13:22:25.113] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[13:22:25.127] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[13:22:25.141] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[13:22:25.154] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[13:22:25.168] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[13:22:25.182] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[13:22:25.196] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[13:22:25.209] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1085_FullQualification_2016-10-26_11h02m_1477472544//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[13:22:25.223] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[13:22:25.223] <TB3> INFO: Decoding statistics:
[13:22:25.223] <TB3> INFO: General information:
[13:22:25.223] <TB3> INFO: 16bit words read: 3327818
[13:22:25.223] <TB3> INFO: valid events total: 332800
[13:22:25.223] <TB3> INFO: empty events: 0
[13:22:25.223] <TB3> INFO: valid events with pixels: 332800
[13:22:25.223] <TB3> INFO: valid pixel hits: 665509
[13:22:25.223] <TB3> INFO: Event errors: 0
[13:22:25.223] <TB3> INFO: start marker: 0
[13:22:25.223] <TB3> INFO: stop marker: 0
[13:22:25.223] <TB3> INFO: overflow: 0
[13:22:25.223] <TB3> INFO: invalid 5bit words: 0
[13:22:25.223] <TB3> INFO: invalid XOR eye diagram: 0
[13:22:25.223] <TB3> INFO: frame (failed synchr.): 0
[13:22:25.223] <TB3> INFO: idle data (no TBM trl): 0
[13:22:25.223] <TB3> INFO: no data (only TBM hdr): 0
[13:22:25.223] <TB3> INFO: TBM errors: 0
[13:22:25.223] <TB3> INFO: flawed TBM headers: 0
[13:22:25.223] <TB3> INFO: flawed TBM trailers: 0
[13:22:25.223] <TB3> INFO: event ID mismatches: 0
[13:22:25.223] <TB3> INFO: ROC errors: 0
[13:22:25.223] <TB3> INFO: missing ROC header(s): 0
[13:22:25.223] <TB3> INFO: misplaced readback start: 0
[13:22:25.223] <TB3> INFO: Pixel decoding errors: 0
[13:22:25.223] <TB3> INFO: pixel data incomplete: 0
[13:22:25.223] <TB3> INFO: pixel address: 0
[13:22:25.223] <TB3> INFO: pulse height fill bit: 0
[13:22:25.223] <TB3> INFO: buffer corruption: 0
[13:22:25.240] <TB3> INFO: Decoding statistics:
[13:22:25.240] <TB3> INFO: General information:
[13:22:25.240] <TB3> INFO: 16bit words read: 3457238
[13:22:25.240] <TB3> INFO: valid events total: 353536
[13:22:25.240] <TB3> INFO: empty events: 18234
[13:22:25.240] <TB3> INFO: valid events with pixels: 335302
[13:22:25.240] <TB3> INFO: valid pixel hits: 668011
[13:22:25.240] <TB3> INFO: Event errors: 0
[13:22:25.240] <TB3> INFO: start marker: 0
[13:22:25.240] <TB3> INFO: stop marker: 0
[13:22:25.240] <TB3> INFO: overflow: 0
[13:22:25.240] <TB3> INFO: invalid 5bit words: 0
[13:22:25.240] <TB3> INFO: invalid XOR eye diagram: 0
[13:22:25.240] <TB3> INFO: frame (failed synchr.): 0
[13:22:25.240] <TB3> INFO: idle data (no TBM trl): 0
[13:22:25.240] <TB3> INFO: no data (only TBM hdr): 0
[13:22:25.240] <TB3> INFO: TBM errors: 0
[13:22:25.240] <TB3> INFO: flawed TBM headers: 0
[13:22:25.240] <TB3> INFO: flawed TBM trailers: 0
[13:22:25.240] <TB3> INFO: event ID mismatches: 0
[13:22:25.240] <TB3> INFO: ROC errors: 0
[13:22:25.240] <TB3> INFO: missing ROC header(s): 0
[13:22:25.240] <TB3> INFO: misplaced readback start: 0
[13:22:25.240] <TB3> INFO: Pixel decoding errors: 0
[13:22:25.240] <TB3> INFO: pixel data incomplete: 0
[13:22:25.240] <TB3> INFO: pixel address: 0
[13:22:25.240] <TB3> INFO: pulse height fill bit: 0
[13:22:25.240] <TB3> INFO: buffer corruption: 0
[13:22:25.240] <TB3> INFO: enter test to run
[13:22:25.240] <TB3> INFO: test: exit no parameter change
[13:22:25.277] <TB3> QUIET: Connection to board 170 closed.
[13:22:25.278] <TB3> INFO: pXar: this is the end, my friend