[11:15:59.539] <TB0> INFO: *** Welcome to pxar ***
[11:15:59.539] <TB0> INFO: *** Today: 2016/10/31
[11:15:59.556] <TB0> INFO: *** Version: c8ba-dirty
[11:15:59.556] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C15.dat
[11:15:59.557] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1b.dat
[11:15:59.557] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//defaultMaskFile.dat
[11:15:59.557] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters_C15.dat
[11:15:59.616] <TB0> INFO: clk: 4
[11:15:59.616] <TB0> INFO: ctr: 4
[11:15:59.616] <TB0> INFO: sda: 19
[11:15:59.616] <TB0> INFO: tin: 9
[11:15:59.616] <TB0> INFO: level: 15
[11:15:59.616] <TB0> INFO: triggerdelay: 0
[11:15:59.616] <TB0> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[11:15:59.616] <TB0> INFO: Log level: INFO
[11:15:59.625] <TB0> INFO: Found DTB DTB_WRQ4OZ
[11:15:59.634] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[11:15:59.636] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
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[11:15:59.638] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[11:16:01.125] <TB0> INFO: DUT info:
[11:16:01.126] <TB0> INFO: The DUT currently contains the following objects:
[11:16:01.126] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[11:16:01.126] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:16:01.126] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:16:01.126] <TB0> INFO: TBM Core alpha (2): 7 registers set
[11:16:01.126] <TB0> INFO: TBM Core beta (3): 7 registers set
[11:16:01.126] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[11:16:01.126] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.126] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:16:01.527] <TB0> INFO: enter 'restricted' command line mode
[11:16:01.527] <TB0> INFO: enter test to run
[11:16:01.527] <TB0> INFO: test: pretest no parameter change
[11:16:01.527] <TB0> INFO: running: pretest
[11:16:01.532] <TB0> INFO: ######################################################################
[11:16:01.532] <TB0> INFO: PixTestPretest::doTest()
[11:16:01.532] <TB0> INFO: ######################################################################
[11:16:01.533] <TB0> INFO: ----------------------------------------------------------------------
[11:16:01.533] <TB0> INFO: PixTestPretest::programROC()
[11:16:01.533] <TB0> INFO: ----------------------------------------------------------------------
[11:16:19.547] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:16:19.547] <TB0> INFO: IA differences per ROC: 15.3 20.1 18.5 18.5 19.3 16.9 20.9 19.3 19.3 20.1 18.5 18.5 19.3 19.3 19.3 20.1
[11:16:19.614] <TB0> INFO: ----------------------------------------------------------------------
[11:16:19.614] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:16:19.614] <TB0> INFO: ----------------------------------------------------------------------
[11:16:40.890] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[11:16:40.890] <TB0> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 20.1 20.1 20.1 20.1 20.1 19.3 20.1 19.3 20.1 19.3 19.3 19.3
[11:16:40.926] <TB0> INFO: ----------------------------------------------------------------------
[11:16:40.926] <TB0> INFO: PixTestPretest::findTiming()
[11:16:40.926] <TB0> INFO: ----------------------------------------------------------------------
[11:16:40.926] <TB0> INFO: PixTestCmd::init()

[11:17:13.203] <TB0> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[11:17:13.203] <TB0> INFO: (success/tries = 100/100), width = 4
[11:17:14.709] <TB0> INFO: ----------------------------------------------------------------------
[11:17:14.709] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:17:14.709] <TB0> INFO: ----------------------------------------------------------------------
[11:17:14.804] <TB0> INFO: Expecting 231680 events.
[11:17:24.830] <TB0> INFO: 231680 events read in total (9434ms).
[11:17:24.842] <TB0> INFO: Test took 10128ms.
[11:17:25.090] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:17:25.124] <TB0> INFO: ----------------------------------------------------------------------
[11:17:25.124] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:17:25.124] <TB0> INFO: ----------------------------------------------------------------------
[11:17:25.220] <TB0> INFO: Expecting 231680 events.
[11:17:35.071] <TB0> INFO: 231680 events read in total (9260ms).
[11:17:35.082] <TB0> INFO: Test took 9952ms.
[11:17:35.355] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:17:35.355] <TB0> INFO: CalDel: 109 90 95 111 104 86 91 119 98 84 99 103 104 137 88 95
[11:17:35.355] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 52 51 53 51 51 51 51 51
[11:17:35.358] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C0.dat
[11:17:35.358] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C1.dat
[11:17:35.358] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C2.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C3.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C4.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C5.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C6.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C7.dat
[11:17:35.359] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C8.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C9.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C10.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C11.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C12.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C13.dat
[11:17:35.360] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C14.dat
[11:17:35.361] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters_C15.dat
[11:17:35.361] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0a.dat
[11:17:35.361] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C0b.dat
[11:17:35.361] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1a.dat
[11:17:35.361] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//tbmParameters_C1b.dat
[11:17:35.361] <TB0> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[11:17:35.414] <TB0> INFO: enter test to run
[11:17:35.414] <TB0> INFO: test: FullTest no parameter change
[11:17:35.415] <TB0> INFO: running: fulltest
[11:17:35.415] <TB0> INFO: ######################################################################
[11:17:35.415] <TB0> INFO: PixTestFullTest::doTest()
[11:17:35.415] <TB0> INFO: ######################################################################
[11:17:35.416] <TB0> INFO: ######################################################################
[11:17:35.416] <TB0> INFO: PixTestAlive::doTest()
[11:17:35.416] <TB0> INFO: ######################################################################
[11:17:35.418] <TB0> INFO: ----------------------------------------------------------------------
[11:17:35.418] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:35.418] <TB0> INFO: ----------------------------------------------------------------------
[11:17:35.661] <TB0> INFO: Expecting 41600 events.
[11:17:39.199] <TB0> INFO: 41600 events read in total (2946ms).
[11:17:39.200] <TB0> INFO: Test took 3780ms.
[11:17:39.430] <TB0> INFO: PixTestAlive::aliveTest() done
[11:17:39.430] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:17:39.431] <TB0> INFO: ----------------------------------------------------------------------
[11:17:39.431] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:39.432] <TB0> INFO: ----------------------------------------------------------------------
[11:17:39.691] <TB0> INFO: Expecting 41600 events.
[11:17:42.621] <TB0> INFO: 41600 events read in total (2334ms).
[11:17:42.621] <TB0> INFO: Test took 3188ms.
[11:17:42.621] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:17:42.861] <TB0> INFO: PixTestAlive::maskTest() done
[11:17:42.861] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:17:42.863] <TB0> INFO: ----------------------------------------------------------------------
[11:17:42.863] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:17:42.863] <TB0> INFO: ----------------------------------------------------------------------
[11:17:43.108] <TB0> INFO: Expecting 41600 events.
[11:17:46.694] <TB0> INFO: 41600 events read in total (2995ms).
[11:17:46.694] <TB0> INFO: Test took 3828ms.
[11:17:46.929] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:17:46.929] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:17:46.929] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[11:17:46.929] <TB0> INFO: Decoding statistics:
[11:17:46.929] <TB0> INFO: General information:
[11:17:46.929] <TB0> INFO: 16bit words read: 0
[11:17:46.929] <TB0> INFO: valid events total: 0
[11:17:46.929] <TB0> INFO: empty events: 0
[11:17:46.929] <TB0> INFO: valid events with pixels: 0
[11:17:46.930] <TB0> INFO: valid pixel hits: 0
[11:17:46.930] <TB0> INFO: Event errors: 0
[11:17:46.930] <TB0> INFO: start marker: 0
[11:17:46.930] <TB0> INFO: stop marker: 0
[11:17:46.930] <TB0> INFO: overflow: 0
[11:17:46.930] <TB0> INFO: invalid 5bit words: 0
[11:17:46.930] <TB0> INFO: invalid XOR eye diagram: 0
[11:17:46.930] <TB0> INFO: frame (failed synchr.): 0
[11:17:46.930] <TB0> INFO: idle data (no TBM trl): 0
[11:17:46.930] <TB0> INFO: no data (only TBM hdr): 0
[11:17:46.930] <TB0> INFO: TBM errors: 0
[11:17:46.930] <TB0> INFO: flawed TBM headers: 0
[11:17:46.930] <TB0> INFO: flawed TBM trailers: 0
[11:17:46.930] <TB0> INFO: event ID mismatches: 0
[11:17:46.930] <TB0> INFO: ROC errors: 0
[11:17:46.930] <TB0> INFO: missing ROC header(s): 0
[11:17:46.930] <TB0> INFO: misplaced readback start: 0
[11:17:46.930] <TB0> INFO: Pixel decoding errors: 0
[11:17:46.930] <TB0> INFO: pixel data incomplete: 0
[11:17:46.930] <TB0> INFO: pixel address: 0
[11:17:46.930] <TB0> INFO: pulse height fill bit: 0
[11:17:46.930] <TB0> INFO: buffer corruption: 0
[11:17:46.939] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:17:46.940] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[11:17:46.940] <TB0> INFO: ######################################################################
[11:17:46.940] <TB0> INFO: PixTestReadback::doTest()
[11:17:46.940] <TB0> INFO: ######################################################################
[11:17:46.940] <TB0> INFO: ----------------------------------------------------------------------
[11:17:46.940] <TB0> INFO: PixTestReadback::CalibrateVd()
[11:17:46.940] <TB0> INFO: ----------------------------------------------------------------------
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:17:56.906] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:17:56.907] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:17:56.935] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:17:56.936] <TB0> INFO: ----------------------------------------------------------------------
[11:17:56.936] <TB0> INFO: PixTestReadback::CalibrateVa()
[11:17:56.936] <TB0> INFO: ----------------------------------------------------------------------
[11:18:06.863] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:18:06.863] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:18:06.863] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:18:06.863] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:18:06.864] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:18:06.866] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:18:06.897] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:18:06.897] <TB0> INFO: ----------------------------------------------------------------------
[11:18:06.897] <TB0> INFO: PixTestReadback::readbackVbg()
[11:18:06.897] <TB0> INFO: ----------------------------------------------------------------------
[11:18:14.568] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:18:14.568] <TB0> INFO: ----------------------------------------------------------------------
[11:18:14.568] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[11:18:14.568] <TB0> INFO: ----------------------------------------------------------------------
[11:18:14.568] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.9calibrated Vbg = 1.17157 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.9calibrated Vbg = 1.17359 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 153.5calibrated Vbg = 1.1692 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 142.6calibrated Vbg = 1.16161 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 162calibrated Vbg = 1.16861 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 145.7calibrated Vbg = 1.16978 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 156calibrated Vbg = 1.17338 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153calibrated Vbg = 1.16992 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 157.8calibrated Vbg = 1.16571 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 155.8calibrated Vbg = 1.16457 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.6calibrated Vbg = 1.15591 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 152.5calibrated Vbg = 1.15964 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 153.4calibrated Vbg = 1.16231 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 150.3calibrated Vbg = 1.17247 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.4calibrated Vbg = 1.16986 :::*/*/*/*/
[11:18:14.568] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 154.1calibrated Vbg = 1.17746 :::*/*/*/*/
[11:18:14.570] <TB0> INFO: ----------------------------------------------------------------------
[11:18:14.570] <TB0> INFO: PixTestReadback::CalibrateIa()
[11:18:14.570] <TB0> INFO: ----------------------------------------------------------------------
[11:20:55.403] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C0.dat
[11:20:55.403] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C1.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C2.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C3.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C4.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C5.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C6.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C7.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C8.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C9.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C10.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C11.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C12.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C13.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C14.dat
[11:20:55.404] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//readbackCal_C15.dat
[11:20:55.437] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:20:55.439] <TB0> INFO: PixTestReadback::doTest() done
[11:20:55.439] <TB0> INFO: Decoding statistics:
[11:20:55.439] <TB0> INFO: General information:
[11:20:55.439] <TB0> INFO: 16bit words read: 1536
[11:20:55.439] <TB0> INFO: valid events total: 256
[11:20:55.439] <TB0> INFO: empty events: 256
[11:20:55.439] <TB0> INFO: valid events with pixels: 0
[11:20:55.439] <TB0> INFO: valid pixel hits: 0
[11:20:55.439] <TB0> INFO: Event errors: 0
[11:20:55.439] <TB0> INFO: start marker: 0
[11:20:55.439] <TB0> INFO: stop marker: 0
[11:20:55.439] <TB0> INFO: overflow: 0
[11:20:55.439] <TB0> INFO: invalid 5bit words: 0
[11:20:55.439] <TB0> INFO: invalid XOR eye diagram: 0
[11:20:55.439] <TB0> INFO: frame (failed synchr.): 0
[11:20:55.439] <TB0> INFO: idle data (no TBM trl): 0
[11:20:55.439] <TB0> INFO: no data (only TBM hdr): 0
[11:20:55.439] <TB0> INFO: TBM errors: 0
[11:20:55.439] <TB0> INFO: flawed TBM headers: 0
[11:20:55.439] <TB0> INFO: flawed TBM trailers: 0
[11:20:55.439] <TB0> INFO: event ID mismatches: 0
[11:20:55.440] <TB0> INFO: ROC errors: 0
[11:20:55.440] <TB0> INFO: missing ROC header(s): 0
[11:20:55.440] <TB0> INFO: misplaced readback start: 0
[11:20:55.440] <TB0> INFO: Pixel decoding errors: 0
[11:20:55.440] <TB0> INFO: pixel data incomplete: 0
[11:20:55.440] <TB0> INFO: pixel address: 0
[11:20:55.440] <TB0> INFO: pulse height fill bit: 0
[11:20:55.440] <TB0> INFO: buffer corruption: 0
[11:20:55.496] <TB0> INFO: ######################################################################
[11:20:55.496] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:20:55.496] <TB0> INFO: ######################################################################
[11:20:55.499] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:20:55.521] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[11:20:55.521] <TB0> INFO: run 1 of 1
[11:20:55.784] <TB0> INFO: Expecting 3120000 events.
[11:21:27.264] <TB0> INFO: 663390 events read in total (30888ms).





















[11:21:57.553] <TB0> INFO: 1323545 events read in total (61177ms).
[11:22:27.972] <TB0> INFO: 1980910 events read in total (91596ms).











[11:22:58.338] <TB0> INFO: 2637335 events read in total (121962ms).











[11:23:20.628] <TB0> INFO: 3120000 events read in total (144252ms).
[11:23:20.734] <TB0> INFO: Test took 145215ms.
[11:23:44.191] <TB0> INFO: PixTestBBMap::doTest() done with 4 decoding errors: , duration: 168 seconds
[11:23:44.191] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 1
[11:23:44.191] <TB0> INFO: separation cut (per ROC): 102 102 102 102 107 96 126 115 113 110 116 112 102 105 117 105
[11:23:44.191] <TB0> INFO: Decoding statistics:
[11:23:44.191] <TB0> INFO: General information:
[11:23:44.191] <TB0> INFO: 16bit words read: 0
[11:23:44.191] <TB0> INFO: valid events total: 0
[11:23:44.191] <TB0> INFO: empty events: 0
[11:23:44.191] <TB0> INFO: valid events with pixels: 0
[11:23:44.191] <TB0> INFO: valid pixel hits: 0
[11:23:44.191] <TB0> INFO: Event errors: 0
[11:23:44.191] <TB0> INFO: start marker: 0
[11:23:44.191] <TB0> INFO: stop marker: 0
[11:23:44.191] <TB0> INFO: overflow: 0
[11:23:44.191] <TB0> INFO: invalid 5bit words: 0
[11:23:44.191] <TB0> INFO: invalid XOR eye diagram: 0
[11:23:44.191] <TB0> INFO: frame (failed synchr.): 0
[11:23:44.191] <TB0> INFO: idle data (no TBM trl): 0
[11:23:44.191] <TB0> INFO: no data (only TBM hdr): 0
[11:23:44.191] <TB0> INFO: TBM errors: 0
[11:23:44.191] <TB0> INFO: flawed TBM headers: 0
[11:23:44.191] <TB0> INFO: flawed TBM trailers: 0
[11:23:44.191] <TB0> INFO: event ID mismatches: 0
[11:23:44.191] <TB0> INFO: ROC errors: 0
[11:23:44.191] <TB0> INFO: missing ROC header(s): 0
[11:23:44.191] <TB0> INFO: misplaced readback start: 0
[11:23:44.191] <TB0> INFO: Pixel decoding errors: 0
[11:23:44.191] <TB0> INFO: pixel data incomplete: 0
[11:23:44.192] <TB0> INFO: pixel address: 0
[11:23:44.192] <TB0> INFO: pulse height fill bit: 0
[11:23:44.192] <TB0> INFO: buffer corruption: 0
[11:23:44.234] <TB0> INFO: ######################################################################
[11:23:44.234] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:23:44.234] <TB0> INFO: ######################################################################
[11:23:44.234] <TB0> INFO: ----------------------------------------------------------------------
[11:23:44.234] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:23:44.234] <TB0> INFO: ----------------------------------------------------------------------
[11:23:44.234] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[11:23:44.249] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[11:23:44.249] <TB0> INFO: run 1 of 1
[11:23:44.494] <TB0> INFO: Expecting 36608000 events.
[11:24:07.812] <TB0> INFO: 665300 events read in total (22727ms).
[11:24:30.366] <TB0> INFO: 1319100 events read in total (45281ms).
[11:24:52.767] <TB0> INFO: 1975450 events read in total (67682ms).
[11:25:15.377] <TB0> INFO: 2630600 events read in total (90292ms).
[11:25:38.006] <TB0> INFO: 3285350 events read in total (112921ms).
[11:26:00.598] <TB0> INFO: 3940250 events read in total (135513ms).
[11:26:23.107] <TB0> INFO: 4592900 events read in total (158022ms).
[11:26:45.444] <TB0> INFO: 5248100 events read in total (180359ms).
[11:27:07.882] <TB0> INFO: 5901350 events read in total (202797ms).
[11:27:30.383] <TB0> INFO: 6553750 events read in total (225298ms).
[11:27:52.857] <TB0> INFO: 7205200 events read in total (247772ms).
[11:28:15.226] <TB0> INFO: 7856450 events read in total (270141ms).
[11:28:37.585] <TB0> INFO: 8507750 events read in total (292500ms).
[11:29:00.191] <TB0> INFO: 9159700 events read in total (315106ms).
[11:29:22.611] <TB0> INFO: 9810400 events read in total (337526ms).
[11:29:45.058] <TB0> INFO: 10461800 events read in total (359973ms).
[11:30:07.548] <TB0> INFO: 11113950 events read in total (382463ms).
[11:30:30.210] <TB0> INFO: 11763850 events read in total (405125ms).
[11:30:52.388] <TB0> INFO: 12413750 events read in total (427303ms).
[11:31:14.765] <TB0> INFO: 13064300 events read in total (449680ms).
[11:31:37.226] <TB0> INFO: 13715800 events read in total (472141ms).
[11:31:59.695] <TB0> INFO: 14366000 events read in total (494610ms).
[11:32:21.972] <TB0> INFO: 15017650 events read in total (516887ms).
[11:32:44.285] <TB0> INFO: 15668050 events read in total (539200ms).
[11:33:06.525] <TB0> INFO: 16314950 events read in total (561440ms).
[11:33:29.096] <TB0> INFO: 16964950 events read in total (584011ms).
[11:33:51.296] <TB0> INFO: 17614500 events read in total (606211ms).
[11:34:13.734] <TB0> INFO: 18261000 events read in total (628649ms).
[11:34:36.014] <TB0> INFO: 18909400 events read in total (650929ms).
[11:34:58.231] <TB0> INFO: 19557950 events read in total (673146ms).
[11:35:20.622] <TB0> INFO: 20204800 events read in total (695537ms).
[11:35:43.046] <TB0> INFO: 20854300 events read in total (717961ms).
[11:36:05.415] <TB0> INFO: 21503150 events read in total (740330ms).
[11:36:27.764] <TB0> INFO: 22149200 events read in total (762679ms).
[11:36:50.255] <TB0> INFO: 22797550 events read in total (785170ms).
[11:37:12.498] <TB0> INFO: 23445850 events read in total (807413ms).
[11:37:35.162] <TB0> INFO: 24094000 events read in total (830077ms).
[11:37:57.619] <TB0> INFO: 24743950 events read in total (852534ms).
[11:38:20.078] <TB0> INFO: 25393800 events read in total (874993ms).
[11:38:42.351] <TB0> INFO: 26038850 events read in total (897266ms).
[11:39:04.840] <TB0> INFO: 26686900 events read in total (919755ms).
[11:39:27.171] <TB0> INFO: 27333150 events read in total (942086ms).
[11:39:49.741] <TB0> INFO: 27982300 events read in total (964656ms).
[11:40:12.353] <TB0> INFO: 28630600 events read in total (987268ms).
[11:40:35.091] <TB0> INFO: 29279000 events read in total (1010006ms).
[11:40:57.724] <TB0> INFO: 29925150 events read in total (1032639ms).
[11:41:20.055] <TB0> INFO: 30568650 events read in total (1054970ms).
[11:41:42.474] <TB0> INFO: 31215250 events read in total (1077389ms).
[11:42:04.816] <TB0> INFO: 31862800 events read in total (1099731ms).
[11:42:27.201] <TB0> INFO: 32511450 events read in total (1122116ms).
[11:42:49.616] <TB0> INFO: 33157250 events read in total (1144531ms).
[11:43:12.222] <TB0> INFO: 33806350 events read in total (1167137ms).
[11:43:34.566] <TB0> INFO: 34452050 events read in total (1189481ms).
[11:43:57.241] <TB0> INFO: 35101350 events read in total (1212156ms).
[11:44:19.674] <TB0> INFO: 35750550 events read in total (1234589ms).
[11:44:42.184] <TB0> INFO: 36408900 events read in total (1257099ms).
[11:44:49.417] <TB0> INFO: 36608000 events read in total (1264332ms).
[11:44:49.505] <TB0> INFO: Test took 1265256ms.
[11:44:49.948] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:51.477] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:53.047] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:54.693] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:56.303] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:57.953] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:44:59.630] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:01.745] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:03.575] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:05.261] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:07.202] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:09.038] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:11.068] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:12.928] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:14.957] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:16.881] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:45:18.520] <TB0> INFO: PixTestScurves::scurves() done
[11:45:18.520] <TB0> INFO: Vcal mean: 120.35 111.31 109.27 99.75 112.41 106.65 127.51 122.50 119.56 120.28 123.22 127.57 112.24 109.96 118.20 112.20
[11:45:18.520] <TB0> INFO: Vcal RMS: 6.45 4.83 5.37 5.43 5.46 5.69 7.22 6.13 5.95 6.47 7.21 7.06 5.58 4.84 5.88 5.02
[11:45:18.520] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1294 seconds
[11:45:18.520] <TB0> INFO: Decoding statistics:
[11:45:18.520] <TB0> INFO: General information:
[11:45:18.520] <TB0> INFO: 16bit words read: 0
[11:45:18.520] <TB0> INFO: valid events total: 0
[11:45:18.520] <TB0> INFO: empty events: 0
[11:45:18.520] <TB0> INFO: valid events with pixels: 0
[11:45:18.520] <TB0> INFO: valid pixel hits: 0
[11:45:18.520] <TB0> INFO: Event errors: 0
[11:45:18.520] <TB0> INFO: start marker: 0
[11:45:18.520] <TB0> INFO: stop marker: 0
[11:45:18.520] <TB0> INFO: overflow: 0
[11:45:18.520] <TB0> INFO: invalid 5bit words: 0
[11:45:18.520] <TB0> INFO: invalid XOR eye diagram: 0
[11:45:18.520] <TB0> INFO: frame (failed synchr.): 0
[11:45:18.520] <TB0> INFO: idle data (no TBM trl): 0
[11:45:18.520] <TB0> INFO: no data (only TBM hdr): 0
[11:45:18.520] <TB0> INFO: TBM errors: 0
[11:45:18.520] <TB0> INFO: flawed TBM headers: 0
[11:45:18.520] <TB0> INFO: flawed TBM trailers: 0
[11:45:18.520] <TB0> INFO: event ID mismatches: 0
[11:45:18.520] <TB0> INFO: ROC errors: 0
[11:45:18.520] <TB0> INFO: missing ROC header(s): 0
[11:45:18.520] <TB0> INFO: misplaced readback start: 0
[11:45:18.520] <TB0> INFO: Pixel decoding errors: 0
[11:45:18.520] <TB0> INFO: pixel data incomplete: 0
[11:45:18.520] <TB0> INFO: pixel address: 0
[11:45:18.520] <TB0> INFO: pulse height fill bit: 0
[11:45:18.520] <TB0> INFO: buffer corruption: 0
[11:45:18.596] <TB0> INFO: ######################################################################
[11:45:18.596] <TB0> INFO: PixTestTrim::doTest()
[11:45:18.596] <TB0> INFO: ######################################################################
[11:45:18.597] <TB0> INFO: ----------------------------------------------------------------------
[11:45:18.597] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[11:45:18.597] <TB0> INFO: ----------------------------------------------------------------------
[11:45:18.640] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:45:18.640] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:45:18.653] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:45:18.653] <TB0> INFO: run 1 of 1
[11:45:18.891] <TB0> INFO: Expecting 5025280 events.
[11:45:50.538] <TB0> INFO: 825640 events read in total (31044ms).
[11:46:20.756] <TB0> INFO: 1648208 events read in total (61262ms).
[11:46:51.219] <TB0> INFO: 2467544 events read in total (91726ms).
[11:47:21.531] <TB0> INFO: 3284688 events read in total (122037ms).
[11:47:51.783] <TB0> INFO: 4098424 events read in total (152290ms).
[11:48:21.910] <TB0> INFO: 4910616 events read in total (182416ms).
[11:48:26.542] <TB0> INFO: 5025280 events read in total (187048ms).
[11:48:26.622] <TB0> INFO: Test took 187969ms.
[11:48:43.557] <TB0> INFO: ROC 0 VthrComp = 120
[11:48:43.557] <TB0> INFO: ROC 1 VthrComp = 118
[11:48:43.557] <TB0> INFO: ROC 2 VthrComp = 108
[11:48:43.557] <TB0> INFO: ROC 3 VthrComp = 104
[11:48:43.557] <TB0> INFO: ROC 4 VthrComp = 118
[11:48:43.558] <TB0> INFO: ROC 5 VthrComp = 108
[11:48:43.558] <TB0> INFO: ROC 6 VthrComp = 131
[11:48:43.558] <TB0> INFO: ROC 7 VthrComp = 128
[11:48:43.558] <TB0> INFO: ROC 8 VthrComp = 130
[11:48:43.558] <TB0> INFO: ROC 9 VthrComp = 125
[11:48:43.558] <TB0> INFO: ROC 10 VthrComp = 124
[11:48:43.558] <TB0> INFO: ROC 11 VthrComp = 122
[11:48:43.558] <TB0> INFO: ROC 12 VthrComp = 110
[11:48:43.558] <TB0> INFO: ROC 13 VthrComp = 110
[11:48:43.558] <TB0> INFO: ROC 14 VthrComp = 121
[11:48:43.558] <TB0> INFO: ROC 15 VthrComp = 116
[11:48:43.802] <TB0> INFO: Expecting 41600 events.
[11:48:47.345] <TB0> INFO: 41600 events read in total (2951ms).
[11:48:47.346] <TB0> INFO: Test took 3784ms.
[11:48:47.356] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:48:47.356] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[11:48:47.368] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:48:47.368] <TB0> INFO: run 1 of 1
[11:48:47.649] <TB0> INFO: Expecting 5025280 events.
[11:49:14.747] <TB0> INFO: 590336 events read in total (26506ms).
[11:49:40.089] <TB0> INFO: 1178952 events read in total (51848ms).
[11:50:05.939] <TB0> INFO: 1768040 events read in total (77698ms).
[11:50:32.085] <TB0> INFO: 2357400 events read in total (103844ms).
[11:50:57.857] <TB0> INFO: 2945192 events read in total (129616ms).
[11:51:23.831] <TB0> INFO: 3531832 events read in total (155590ms).
[11:51:49.517] <TB0> INFO: 4117896 events read in total (181276ms).
[11:52:15.590] <TB0> INFO: 4703088 events read in total (207349ms).
[11:52:29.833] <TB0> INFO: 5025280 events read in total (221592ms).
[11:52:29.974] <TB0> INFO: Test took 222606ms.
[11:52:56.014] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 63.1086 for pixel 18/8 mean/min/max = 47.5927/31.9063/63.2792
[11:52:56.014] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 60.2948 for pixel 12/2 mean/min/max = 46.1927/32.0889/60.2965
[11:52:56.015] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 63.9561 for pixel 12/14 mean/min/max = 48.9493/33.7852/64.1133
[11:52:56.016] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 59.8745 for pixel 3/16 mean/min/max = 47.2553/34.5615/59.9491
[11:52:56.016] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 60.1082 for pixel 12/5 mean/min/max = 45.6849/31.1798/60.1899
[11:52:56.017] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 64.6279 for pixel 17/10 mean/min/max = 49.4288/34.0504/64.8071
[11:52:56.017] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 61.2244 for pixel 0/47 mean/min/max = 46.403/31.3578/61.4481
[11:52:56.018] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 59.1621 for pixel 3/4 mean/min/max = 45.5433/31.6788/59.4078
[11:52:56.018] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 59.7589 for pixel 0/13 mean/min/max = 45.7689/31.6069/59.931
[11:52:56.019] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.9311 for pixel 5/17 mean/min/max = 46.8488/31.6983/61.9993
[11:52:56.019] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 63.9987 for pixel 4/6 mean/min/max = 47.39/30.7364/64.0436
[11:52:56.020] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 67.0488 for pixel 7/23 mean/min/max = 48.7164/30.2971/67.1356
[11:52:56.020] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 63.1873 for pixel 1/1 mean/min/max = 48.6269/33.9243/63.3294
[11:52:56.021] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.7983 for pixel 9/13 mean/min/max = 47.968/34.0702/61.8659
[11:52:56.021] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 59.7406 for pixel 6/78 mean/min/max = 45.985/32.2124/59.7577
[11:52:56.022] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 58.0163 for pixel 0/35 mean/min/max = 45.5123/32.3366/58.6881
[11:52:56.022] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:52:56.111] <TB0> INFO: Expecting 411648 events.
[11:53:05.531] <TB0> INFO: 411648 events read in total (8828ms).
[11:53:05.540] <TB0> INFO: Expecting 411648 events.
[11:53:14.830] <TB0> INFO: 411648 events read in total (8887ms).
[11:53:14.844] <TB0> INFO: Expecting 411648 events.
[11:53:24.336] <TB0> INFO: 411648 events read in total (9089ms).
[11:53:24.351] <TB0> INFO: Expecting 411648 events.
[11:53:33.653] <TB0> INFO: 411648 events read in total (8899ms).
[11:53:33.679] <TB0> INFO: Expecting 411648 events.
[11:53:43.009] <TB0> INFO: 411648 events read in total (8927ms).
[11:53:43.029] <TB0> INFO: Expecting 411648 events.
[11:53:52.470] <TB0> INFO: 411648 events read in total (9038ms).
[11:53:52.492] <TB0> INFO: Expecting 411648 events.
[11:54:02.007] <TB0> INFO: 411648 events read in total (9112ms).
[11:54:02.031] <TB0> INFO: Expecting 411648 events.
[11:54:11.535] <TB0> INFO: 411648 events read in total (9101ms).
[11:54:11.563] <TB0> INFO: Expecting 411648 events.
[11:54:21.082] <TB0> INFO: 411648 events read in total (9116ms).
[11:54:21.122] <TB0> INFO: Expecting 411648 events.
[11:54:30.615] <TB0> INFO: 411648 events read in total (9089ms).
[11:54:30.657] <TB0> INFO: Expecting 411648 events.
[11:54:40.125] <TB0> INFO: 411648 events read in total (9065ms).
[11:54:40.166] <TB0> INFO: Expecting 411648 events.
[11:54:49.563] <TB0> INFO: 411648 events read in total (8994ms).
[11:54:49.682] <TB0> INFO: Expecting 411648 events.
[11:54:59.117] <TB0> INFO: 411648 events read in total (9026ms).
[11:54:59.162] <TB0> INFO: Expecting 411648 events.
[11:55:08.650] <TB0> INFO: 411648 events read in total (9085ms).
[11:55:08.711] <TB0> INFO: Expecting 411648 events.
[11:55:18.060] <TB0> INFO: 411648 events read in total (8946ms).
[11:55:18.122] <TB0> INFO: Expecting 411648 events.
[11:55:27.558] <TB0> INFO: 411648 events read in total (9033ms).
[11:55:27.701] <TB0> INFO: Test took 151679ms.
[11:55:28.445] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:55:28.459] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:55:28.459] <TB0> INFO: run 1 of 1
[11:55:28.696] <TB0> INFO: Expecting 5025280 events.
[11:55:55.504] <TB0> INFO: 590152 events read in total (26216ms).
[11:56:21.823] <TB0> INFO: 1178168 events read in total (52535ms).
[11:56:48.240] <TB0> INFO: 1765992 events read in total (78952ms).
[11:57:14.491] <TB0> INFO: 2353368 events read in total (105203ms).
[11:57:40.969] <TB0> INFO: 2939560 events read in total (131681ms).
[11:58:06.821] <TB0> INFO: 3526232 events read in total (157533ms).
[11:58:32.735] <TB0> INFO: 4110760 events read in total (183447ms).
[11:58:58.669] <TB0> INFO: 4695104 events read in total (209381ms).
[11:59:13.541] <TB0> INFO: 5025280 events read in total (224253ms).
[11:59:13.765] <TB0> INFO: Test took 225307ms.
[11:59:35.098] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 4.654340 .. 146.218838
[11:59:35.337] <TB0> INFO: Expecting 208000 events.
[11:59:44.920] <TB0> INFO: 208000 events read in total (8992ms).
[11:59:44.922] <TB0> INFO: Test took 9823ms.
[11:59:44.983] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 4 .. 156 (-1/-1) hits flags = 528 (plus default)
[11:59:44.997] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[11:59:44.997] <TB0> INFO: run 1 of 1
[11:59:45.275] <TB0> INFO: Expecting 5091840 events.
[12:00:13.032] <TB0> INFO: 579968 events read in total (27165ms).
[12:00:39.047] <TB0> INFO: 1160040 events read in total (53180ms).
[12:01:04.763] <TB0> INFO: 1740232 events read in total (78897ms).
[12:01:30.706] <TB0> INFO: 2320560 events read in total (104840ms).
[12:01:56.946] <TB0> INFO: 2900912 events read in total (131079ms).
[12:02:22.577] <TB0> INFO: 3480592 events read in total (156711ms).
[12:02:48.576] <TB0> INFO: 4060248 events read in total (182709ms).
[12:03:14.456] <TB0> INFO: 4638584 events read in total (208589ms).
[12:03:34.675] <TB0> INFO: 5091840 events read in total (228808ms).
[12:03:34.792] <TB0> INFO: Test took 229795ms.
[12:03:57.641] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.405987 .. 49.339675
[12:03:57.884] <TB0> INFO: Expecting 208000 events.
[12:04:07.643] <TB0> INFO: 208000 events read in total (9168ms).
[12:04:07.644] <TB0> INFO: Test took 10001ms.
[12:04:07.704] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 59 (-1/-1) hits flags = 528 (plus default)
[12:04:07.718] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:04:07.718] <TB0> INFO: run 1 of 1
[12:04:07.996] <TB0> INFO: Expecting 1431040 events.
[12:04:37.181] <TB0> INFO: 643824 events read in total (28593ms).
[12:05:04.614] <TB0> INFO: 1287384 events read in total (56026ms).
[12:05:11.129] <TB0> INFO: 1431040 events read in total (62541ms).
[12:05:11.174] <TB0> INFO: Test took 63457ms.
[12:05:23.871] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 25.806041 .. 48.169346
[12:05:24.110] <TB0> INFO: Expecting 208000 events.
[12:05:33.003] <TB0> INFO: 208000 events read in total (9301ms).
[12:05:34.004] <TB0> INFO: Test took 10132ms.
[12:05:34.052] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 58 (-1/-1) hits flags = 528 (plus default)
[12:05:34.065] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:05:34.065] <TB0> INFO: run 1 of 1
[12:05:34.343] <TB0> INFO: Expecting 1464320 events.
[12:06:03.211] <TB0> INFO: 655632 events read in total (28276ms).
[12:06:30.659] <TB0> INFO: 1311072 events read in total (55725ms).
[12:06:37.563] <TB0> INFO: 1464320 events read in total (62628ms).
[12:06:37.603] <TB0> INFO: Test took 63538ms.
[12:06:50.564] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 25.619864 .. 45.942808
[12:06:50.886] <TB0> INFO: Expecting 208000 events.
[12:07:00.616] <TB0> INFO: 208000 events read in total (9138ms).
[12:07:00.617] <TB0> INFO: Test took 10052ms.
[12:07:00.672] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:07:00.686] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:07:00.686] <TB0> INFO: run 1 of 1
[12:07:00.965] <TB0> INFO: Expecting 1364480 events.
[12:07:29.414] <TB0> INFO: 666824 events read in total (27858ms).
[12:07:57.244] <TB0> INFO: 1333944 events read in total (55689ms).
[12:07:58.925] <TB0> INFO: 1364480 events read in total (57370ms).
[12:07:58.953] <TB0> INFO: Test took 58268ms.
[12:08:11.430] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:08:11.430] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:08:11.443] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[12:08:11.443] <TB0> INFO: run 1 of 1
[12:08:11.703] <TB0> INFO: Expecting 1364480 events.
[12:08:41.149] <TB0> INFO: 667352 events read in total (28855ms).
[12:09:09.476] <TB0> INFO: 1334040 events read in total (57182ms).
[12:09:11.240] <TB0> INFO: 1364480 events read in total (58946ms).
[12:09:11.267] <TB0> INFO: Test took 59824ms.
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C0.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C1.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C2.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C3.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C4.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C5.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C6.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C7.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C8.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C9.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C10.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C11.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C12.dat
[12:09:23.205] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C13.dat
[12:09:23.206] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C14.dat
[12:09:23.206] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C15.dat
[12:09:23.206] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C0.dat
[12:09:23.211] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C1.dat
[12:09:23.215] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C2.dat
[12:09:23.220] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C3.dat
[12:09:23.225] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C4.dat
[12:09:23.230] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C5.dat
[12:09:23.234] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C6.dat
[12:09:23.239] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C7.dat
[12:09:23.244] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C8.dat
[12:09:23.249] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C9.dat
[12:09:23.253] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C10.dat
[12:09:23.258] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C11.dat
[12:09:23.263] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C12.dat
[12:09:23.268] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C13.dat
[12:09:23.272] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C14.dat
[12:09:23.277] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//trimParameters35_C15.dat
[12:09:23.282] <TB0> INFO: PixTestTrim::trimTest() done
[12:09:23.282] <TB0> INFO: vtrim: 143 122 142 132 138 145 133 138 134 145 128 137 120 129 133 124
[12:09:23.282] <TB0> INFO: vthrcomp: 120 118 108 104 118 108 131 128 130 125 124 122 110 110 121 116
[12:09:23.282] <TB0> INFO: vcal mean: 34.98 35.00 35.17 34.97 34.93 35.08 34.96 34.98 34.90 34.94 35.01 35.52 34.98 35.04 35.03 35.02
[12:09:23.282] <TB0> INFO: vcal RMS: 1.23 1.07 1.12 0.99 1.10 1.12 1.07 1.02 1.06 1.13 1.25 1.81 1.04 1.00 0.99 0.93
[12:09:23.282] <TB0> INFO: bits mean: 9.34 9.43 9.13 8.99 9.82 9.00 9.22 9.75 9.41 9.58 9.51 9.47 8.31 8.69 9.59 9.21
[12:09:23.282] <TB0> INFO: bits RMS: 2.67 2.72 2.45 2.46 2.67 2.46 2.86 2.61 2.80 2.62 2.73 2.86 2.76 2.60 2.61 2.84
[12:09:23.289] <TB0> INFO: ----------------------------------------------------------------------
[12:09:23.289] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[12:09:23.289] <TB0> INFO: ----------------------------------------------------------------------
[12:09:23.293] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:09:23.307] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:09:23.307] <TB0> INFO: run 1 of 1
[12:09:23.543] <TB0> INFO: Expecting 4160000 events.
[12:09:55.963] <TB0> INFO: 736425 events read in total (31828ms).
[12:10:27.169] <TB0> INFO: 1466350 events read in total (63034ms).
[12:10:58.461] <TB0> INFO: 2194135 events read in total (94326ms).
[12:11:29.703] <TB0> INFO: 2920885 events read in total (125568ms).
[12:12:00.980] <TB0> INFO: 3646380 events read in total (156845ms).
[12:12:23.082] <TB0> INFO: 4160000 events read in total (178947ms).
[12:12:23.184] <TB0> INFO: Test took 179877ms.
[12:12:49.538] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[12:12:49.551] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:12:49.551] <TB0> INFO: run 1 of 1
[12:12:49.827] <TB0> INFO: Expecting 4284800 events.
[12:13:22.770] <TB0> INFO: 706400 events read in total (32351ms).
[12:13:53.428] <TB0> INFO: 1407810 events read in total (63009ms).
[12:14:24.186] <TB0> INFO: 2106975 events read in total (93767ms).
[12:14:54.939] <TB0> INFO: 2804985 events read in total (124520ms).
[12:15:25.958] <TB0> INFO: 3502865 events read in total (155539ms).
[12:15:56.520] <TB0> INFO: 4200120 events read in total (186101ms).
[12:16:00.485] <TB0> INFO: 4284800 events read in total (190066ms).
[12:16:00.599] <TB0> INFO: Test took 191047ms.
[12:16:28.083] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:16:28.097] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:16:28.097] <TB0> INFO: run 1 of 1
[12:16:28.346] <TB0> INFO: Expecting 4035200 events.
[12:17:02.281] <TB0> INFO: 721415 events read in total (33343ms).
[12:17:33.052] <TB0> INFO: 1436490 events read in total (64114ms).
[12:18:04.160] <TB0> INFO: 2149720 events read in total (95222ms).
[12:18:35.025] <TB0> INFO: 2861950 events read in total (126087ms).
[12:19:05.926] <TB0> INFO: 3573250 events read in total (156988ms).
[12:19:26.059] <TB0> INFO: 4035200 events read in total (177121ms).
[12:19:26.217] <TB0> INFO: Test took 178120ms.
[12:19:52.820] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[12:19:52.833] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:19:52.834] <TB0> INFO: run 1 of 1
[12:19:53.110] <TB0> INFO: Expecting 4097600 events.
[12:20:25.385] <TB0> INFO: 717625 events read in total (31683ms).
[12:20:56.042] <TB0> INFO: 1429090 events read in total (62340ms).
[12:21:27.105] <TB0> INFO: 2139105 events read in total (93403ms).
[12:21:58.171] <TB0> INFO: 2848060 events read in total (124469ms).
[12:22:29.005] <TB0> INFO: 3555705 events read in total (155303ms).
[12:22:52.901] <TB0> INFO: 4097600 events read in total (179199ms).
[12:22:53.054] <TB0> INFO: Test took 180220ms.
[12:23:19.624] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:23:19.638] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[12:23:19.638] <TB0> INFO: run 1 of 1
[12:23:19.909] <TB0> INFO: Expecting 4035200 events.
[12:23:51.465] <TB0> INFO: 721595 events read in total (30964ms).
[12:24:22.857] <TB0> INFO: 1437170 events read in total (62356ms).
[12:24:54.082] <TB0> INFO: 2150655 events read in total (93581ms).
[12:25:25.341] <TB0> INFO: 2863340 events read in total (124840ms).
[12:25:56.864] <TB0> INFO: 3575175 events read in total (156363ms).
[12:26:16.902] <TB0> INFO: 4035200 events read in total (176401ms).
[12:26:17.013] <TB0> INFO: Test took 177375ms.
[12:26:45.676] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:26:45.681] <TB0> INFO: PixTestTrim::doTest() done, duration: 2487 seconds
[12:26:45.681] <TB0> INFO: Decoding statistics:
[12:26:45.681] <TB0> INFO: General information:
[12:26:45.681] <TB0> INFO: 16bit words read: 0
[12:26:45.681] <TB0> INFO: valid events total: 0
[12:26:45.681] <TB0> INFO: empty events: 0
[12:26:45.681] <TB0> INFO: valid events with pixels: 0
[12:26:45.681] <TB0> INFO: valid pixel hits: 0
[12:26:45.681] <TB0> INFO: Event errors: 0
[12:26:45.681] <TB0> INFO: start marker: 0
[12:26:45.681] <TB0> INFO: stop marker: 0
[12:26:45.681] <TB0> INFO: overflow: 0
[12:26:45.681] <TB0> INFO: invalid 5bit words: 0
[12:26:45.681] <TB0> INFO: invalid XOR eye diagram: 0
[12:26:45.681] <TB0> INFO: frame (failed synchr.): 0
[12:26:45.681] <TB0> INFO: idle data (no TBM trl): 0
[12:26:45.681] <TB0> INFO: no data (only TBM hdr): 0
[12:26:45.681] <TB0> INFO: TBM errors: 0
[12:26:45.681] <TB0> INFO: flawed TBM headers: 0
[12:26:45.681] <TB0> INFO: flawed TBM trailers: 0
[12:26:45.681] <TB0> INFO: event ID mismatches: 0
[12:26:45.681] <TB0> INFO: ROC errors: 0
[12:26:45.681] <TB0> INFO: missing ROC header(s): 0
[12:26:45.682] <TB0> INFO: misplaced readback start: 0
[12:26:45.682] <TB0> INFO: Pixel decoding errors: 0
[12:26:45.682] <TB0> INFO: pixel data incomplete: 0
[12:26:45.682] <TB0> INFO: pixel address: 0
[12:26:45.682] <TB0> INFO: pulse height fill bit: 0
[12:26:45.682] <TB0> INFO: buffer corruption: 0
[12:26:46.496] <TB0> INFO: ######################################################################
[12:26:46.496] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:26:46.496] <TB0> INFO: ######################################################################
[12:26:46.736] <TB0> INFO: Expecting 41600 events.
[12:26:50.295] <TB0> INFO: 41600 events read in total (2967ms).
[12:26:50.296] <TB0> INFO: Test took 3799ms.
[12:26:50.736] <TB0> INFO: Expecting 41600 events.
[12:26:54.543] <TB0> INFO: 41600 events read in total (3216ms).
[12:26:54.544] <TB0> INFO: Test took 4045ms.
[12:26:54.901] <TB0> INFO: Expecting 41600 events.
[12:26:58.543] <TB0> INFO: 41600 events read in total (3052ms).
[12:26:58.544] <TB0> INFO: Test took 3974ms.
[12:26:58.836] <TB0> INFO: Expecting 41600 events.
[12:27:02.505] <TB0> INFO: 41600 events read in total (3078ms).
[12:27:02.505] <TB0> INFO: Test took 3934ms.
[12:27:02.799] <TB0> INFO: Expecting 41600 events.
[12:27:06.405] <TB0> INFO: 41600 events read in total (3014ms).
[12:27:06.405] <TB0> INFO: Test took 3875ms.
[12:27:06.696] <TB0> INFO: Expecting 41600 events.
[12:27:10.346] <TB0> INFO: 41600 events read in total (3058ms).
[12:27:10.347] <TB0> INFO: Test took 3915ms.
[12:27:10.636] <TB0> INFO: Expecting 41600 events.
[12:27:14.142] <TB0> INFO: 41600 events read in total (2915ms).
[12:27:14.143] <TB0> INFO: Test took 3772ms.
[12:27:14.432] <TB0> INFO: Expecting 41600 events.
[12:27:17.936] <TB0> INFO: 41600 events read in total (2912ms).
[12:27:17.937] <TB0> INFO: Test took 3770ms.
[12:27:18.226] <TB0> INFO: Expecting 41600 events.
[12:27:21.706] <TB0> INFO: 41600 events read in total (2888ms).
[12:27:21.707] <TB0> INFO: Test took 3745ms.
[12:27:22.011] <TB0> INFO: Expecting 41600 events.
[12:27:25.606] <TB0> INFO: 41600 events read in total (3003ms).
[12:27:25.606] <TB0> INFO: Test took 3875ms.
[12:27:25.895] <TB0> INFO: Expecting 41600 events.
[12:27:29.407] <TB0> INFO: 41600 events read in total (2920ms).
[12:27:29.408] <TB0> INFO: Test took 3778ms.
[12:27:29.699] <TB0> INFO: Expecting 41600 events.
[12:27:33.193] <TB0> INFO: 41600 events read in total (2903ms).
[12:27:33.194] <TB0> INFO: Test took 3761ms.
[12:27:33.484] <TB0> INFO: Expecting 41600 events.
[12:27:37.093] <TB0> INFO: 41600 events read in total (3017ms).
[12:27:37.094] <TB0> INFO: Test took 3876ms.
[12:27:37.384] <TB0> INFO: Expecting 41600 events.
[12:27:41.006] <TB0> INFO: 41600 events read in total (3030ms).
[12:27:41.006] <TB0> INFO: Test took 3888ms.
[12:27:41.296] <TB0> INFO: Expecting 41600 events.
[12:27:44.890] <TB0> INFO: 41600 events read in total (3002ms).
[12:27:44.891] <TB0> INFO: Test took 3860ms.
[12:27:45.180] <TB0> INFO: Expecting 41600 events.
[12:27:48.654] <TB0> INFO: 41600 events read in total (2882ms).
[12:27:48.655] <TB0> INFO: Test took 3739ms.
[12:27:48.945] <TB0> INFO: Expecting 41600 events.
[12:27:52.513] <TB0> INFO: 41600 events read in total (2976ms).
[12:27:52.513] <TB0> INFO: Test took 3833ms.
[12:27:52.805] <TB0> INFO: Expecting 41600 events.
[12:27:56.447] <TB0> INFO: 41600 events read in total (3051ms).
[12:27:56.448] <TB0> INFO: Test took 3910ms.
[12:27:56.743] <TB0> INFO: Expecting 41600 events.
[12:28:00.243] <TB0> INFO: 41600 events read in total (2909ms).
[12:28:00.244] <TB0> INFO: Test took 3767ms.
[12:28:00.534] <TB0> INFO: Expecting 41600 events.
[12:28:04.026] <TB0> INFO: 41600 events read in total (2901ms).
[12:28:04.027] <TB0> INFO: Test took 3759ms.
[12:28:04.317] <TB0> INFO: Expecting 41600 events.
[12:28:07.863] <TB0> INFO: 41600 events read in total (2954ms).
[12:28:07.864] <TB0> INFO: Test took 3812ms.
[12:28:08.218] <TB0> INFO: Expecting 41600 events.
[12:28:11.725] <TB0> INFO: 41600 events read in total (2915ms).
[12:28:11.726] <TB0> INFO: Test took 3838ms.
[12:28:12.018] <TB0> INFO: Expecting 41600 events.
[12:28:15.562] <TB0> INFO: 41600 events read in total (2953ms).
[12:28:15.563] <TB0> INFO: Test took 3811ms.
[12:28:15.852] <TB0> INFO: Expecting 41600 events.
[12:28:19.504] <TB0> INFO: 41600 events read in total (3060ms).
[12:28:19.504] <TB0> INFO: Test took 3917ms.
[12:28:19.797] <TB0> INFO: Expecting 41600 events.
[12:28:23.287] <TB0> INFO: 41600 events read in total (2899ms).
[12:28:23.288] <TB0> INFO: Test took 3757ms.
[12:28:23.577] <TB0> INFO: Expecting 41600 events.
[12:28:27.160] <TB0> INFO: 41600 events read in total (2991ms).
[12:28:27.161] <TB0> INFO: Test took 3849ms.
[12:28:27.451] <TB0> INFO: Expecting 41600 events.
[12:28:31.087] <TB0> INFO: 41600 events read in total (3045ms).
[12:28:31.088] <TB0> INFO: Test took 3902ms.
[12:28:31.379] <TB0> INFO: Expecting 41600 events.
[12:28:34.916] <TB0> INFO: 41600 events read in total (2945ms).
[12:28:34.917] <TB0> INFO: Test took 3803ms.
[12:28:35.208] <TB0> INFO: Expecting 2560 events.
[12:28:36.100] <TB0> INFO: 2560 events read in total (301ms).
[12:28:36.100] <TB0> INFO: Test took 1170ms.
[12:28:36.409] <TB0> INFO: Expecting 2560 events.
[12:28:37.300] <TB0> INFO: 2560 events read in total (299ms).
[12:28:37.300] <TB0> INFO: Test took 1199ms.
[12:28:37.609] <TB0> INFO: Expecting 2560 events.
[12:28:38.492] <TB0> INFO: 2560 events read in total (292ms).
[12:28:38.493] <TB0> INFO: Test took 1193ms.
[12:28:38.801] <TB0> INFO: Expecting 2560 events.
[12:28:39.689] <TB0> INFO: 2560 events read in total (296ms).
[12:28:39.689] <TB0> INFO: Test took 1196ms.
[12:28:39.996] <TB0> INFO: Expecting 2560 events.
[12:28:40.886] <TB0> INFO: 2560 events read in total (298ms).
[12:28:40.886] <TB0> INFO: Test took 1196ms.
[12:28:41.193] <TB0> INFO: Expecting 2560 events.
[12:28:42.081] <TB0> INFO: 2560 events read in total (296ms).
[12:28:42.081] <TB0> INFO: Test took 1194ms.
[12:28:42.390] <TB0> INFO: Expecting 2560 events.
[12:28:43.277] <TB0> INFO: 2560 events read in total (295ms).
[12:28:43.277] <TB0> INFO: Test took 1195ms.
[12:28:43.586] <TB0> INFO: Expecting 2560 events.
[12:28:44.467] <TB0> INFO: 2560 events read in total (289ms).
[12:28:44.468] <TB0> INFO: Test took 1190ms.
[12:28:44.775] <TB0> INFO: Expecting 2560 events.
[12:28:45.663] <TB0> INFO: 2560 events read in total (296ms).
[12:28:45.663] <TB0> INFO: Test took 1194ms.
[12:28:45.972] <TB0> INFO: Expecting 2560 events.
[12:28:46.859] <TB0> INFO: 2560 events read in total (295ms).
[12:28:46.859] <TB0> INFO: Test took 1196ms.
[12:28:47.166] <TB0> INFO: Expecting 2560 events.
[12:28:48.051] <TB0> INFO: 2560 events read in total (293ms).
[12:28:48.051] <TB0> INFO: Test took 1191ms.
[12:28:48.358] <TB0> INFO: Expecting 2560 events.
[12:28:49.242] <TB0> INFO: 2560 events read in total (292ms).
[12:28:49.242] <TB0> INFO: Test took 1190ms.
[12:28:49.550] <TB0> INFO: Expecting 2560 events.
[12:28:50.437] <TB0> INFO: 2560 events read in total (296ms).
[12:28:50.438] <TB0> INFO: Test took 1195ms.
[12:28:50.744] <TB0> INFO: Expecting 2560 events.
[12:28:51.634] <TB0> INFO: 2560 events read in total (298ms).
[12:28:51.634] <TB0> INFO: Test took 1196ms.
[12:28:51.943] <TB0> INFO: Expecting 2560 events.
[12:28:52.831] <TB0> INFO: 2560 events read in total (295ms).
[12:28:52.831] <TB0> INFO: Test took 1196ms.
[12:28:53.139] <TB0> INFO: Expecting 2560 events.
[12:28:54.033] <TB0> INFO: 2560 events read in total (302ms).
[12:28:54.033] <TB0> INFO: Test took 1201ms.
[12:28:54.037] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:28:54.343] <TB0> INFO: Expecting 655360 events.
[12:29:09.700] <TB0> INFO: 655360 events read in total (14765ms).
[12:29:09.712] <TB0> INFO: Expecting 655360 events.
[12:29:24.627] <TB0> INFO: 655360 events read in total (14512ms).
[12:29:24.647] <TB0> INFO: Expecting 655360 events.
[12:29:39.186] <TB0> INFO: 655360 events read in total (14136ms).
[12:29:39.208] <TB0> INFO: Expecting 655360 events.
[12:29:53.821] <TB0> INFO: 655360 events read in total (14210ms).
[12:29:53.857] <TB0> INFO: Expecting 655360 events.
[12:30:08.233] <TB0> INFO: 655360 events read in total (13973ms).
[12:30:08.266] <TB0> INFO: Expecting 655360 events.
[12:30:22.709] <TB0> INFO: 655360 events read in total (14040ms).
[12:30:22.756] <TB0> INFO: Expecting 655360 events.
[12:30:37.234] <TB0> INFO: 655360 events read in total (14075ms).
[12:30:37.271] <TB0> INFO: Expecting 655360 events.
[12:30:51.775] <TB0> INFO: 655360 events read in total (14101ms).
[12:30:51.819] <TB0> INFO: Expecting 655360 events.
[12:31:06.184] <TB0> INFO: 655360 events read in total (13961ms).
[12:31:06.229] <TB0> INFO: Expecting 655360 events.
[12:31:20.911] <TB0> INFO: 655360 events read in total (14279ms).
[12:31:20.975] <TB0> INFO: Expecting 655360 events.
[12:31:35.483] <TB0> INFO: 655360 events read in total (14105ms).
[12:31:35.629] <TB0> INFO: Expecting 655360 events.
[12:31:50.062] <TB0> INFO: 655360 events read in total (14030ms).
[12:31:50.137] <TB0> INFO: Expecting 655360 events.
[12:32:04.606] <TB0> INFO: 655360 events read in total (14066ms).
[12:32:04.686] <TB0> INFO: Expecting 655360 events.
[12:32:19.187] <TB0> INFO: 655360 events read in total (14098ms).
[12:32:19.279] <TB0> INFO: Expecting 655360 events.
[12:32:33.877] <TB0> INFO: 655360 events read in total (14195ms).
[12:32:33.000] <TB0> INFO: Expecting 655360 events.
[12:32:48.423] <TB0> INFO: 655360 events read in total (14020ms).
[12:32:48.521] <TB0> INFO: Test took 234484ms.
[12:32:48.615] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:32:48.873] <TB0> INFO: Expecting 655360 events.
[12:33:03.348] <TB0> INFO: 655360 events read in total (13883ms).
[12:33:03.363] <TB0> INFO: Expecting 655360 events.
[12:33:17.771] <TB0> INFO: 655360 events read in total (14005ms).
[12:33:17.791] <TB0> INFO: Expecting 655360 events.
[12:33:32.188] <TB0> INFO: 655360 events read in total (13994ms).
[12:33:32.209] <TB0> INFO: Expecting 655360 events.
[12:33:46.745] <TB0> INFO: 655360 events read in total (14133ms).
[12:33:46.777] <TB0> INFO: Expecting 655360 events.
[12:34:01.227] <TB0> INFO: 655360 events read in total (14046ms).
[12:34:01.264] <TB0> INFO: Expecting 655360 events.
[12:34:15.587] <TB0> INFO: 655360 events read in total (13920ms).
[12:34:15.624] <TB0> INFO: Expecting 655360 events.
[12:34:30.111] <TB0> INFO: 655360 events read in total (14084ms).
[12:34:30.147] <TB0> INFO: Expecting 655360 events.
[12:34:44.648] <TB0> INFO: 655360 events read in total (14097ms).
[12:34:44.696] <TB0> INFO: Expecting 655360 events.
[12:34:59.011] <TB0> INFO: 655360 events read in total (13911ms).
[12:34:59.057] <TB0> INFO: Expecting 655360 events.
[12:35:13.313] <TB0> INFO: 655360 events read in total (13853ms).
[12:35:13.374] <TB0> INFO: Expecting 655360 events.
[12:35:27.631] <TB0> INFO: 655360 events read in total (13854ms).
[12:35:27.701] <TB0> INFO: Expecting 655360 events.
[12:35:42.115] <TB0> INFO: 655360 events read in total (14011ms).
[12:35:42.214] <TB0> INFO: Expecting 655360 events.
[12:35:56.320] <TB0> INFO: 655360 events read in total (13703ms).
[12:35:56.437] <TB0> INFO: Expecting 655360 events.
[12:36:10.873] <TB0> INFO: 655360 events read in total (14032ms).
[12:36:10.974] <TB0> INFO: Expecting 655360 events.
[12:36:25.477] <TB0> INFO: 655360 events read in total (14099ms).
[12:36:25.571] <TB0> INFO: Expecting 655360 events.
[12:36:40.061] <TB0> INFO: 655360 events read in total (14087ms).
[12:36:40.184] <TB0> INFO: Test took 231569ms.
[12:36:40.354] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.360] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:40.366] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:40.372] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:36:40.378] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[12:36:40.384] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[12:36:40.389] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[12:36:40.395] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[12:36:40.401] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.407] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:40.413] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:36:40.419] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.425] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.432] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.438] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.444] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.451] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.457] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:36:40.463] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.469] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.475] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.481] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.487] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.494] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.500] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.506] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:36:40.546] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C0.dat
[12:36:40.546] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C1.dat
[12:36:40.546] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C2.dat
[12:36:40.546] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C3.dat
[12:36:40.546] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C4.dat
[12:36:40.547] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C5.dat
[12:36:40.547] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C6.dat
[12:36:40.547] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C7.dat
[12:36:40.547] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C8.dat
[12:36:40.547] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C9.dat
[12:36:40.548] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C10.dat
[12:36:40.548] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C11.dat
[12:36:40.548] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C12.dat
[12:36:40.548] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C13.dat
[12:36:40.548] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C14.dat
[12:36:40.549] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//dacParameters35_C15.dat
[12:36:40.797] <TB0> INFO: Expecting 41600 events.
[12:36:43.933] <TB0> INFO: 41600 events read in total (2545ms).
[12:36:43.933] <TB0> INFO: Test took 3380ms.
[12:36:44.393] <TB0> INFO: Expecting 41600 events.
[12:36:47.491] <TB0> INFO: 41600 events read in total (2506ms).
[12:36:47.492] <TB0> INFO: Test took 3343ms.
[12:36:47.940] <TB0> INFO: Expecting 41600 events.
[12:36:51.094] <TB0> INFO: 41600 events read in total (2562ms).
[12:36:51.094] <TB0> INFO: Test took 3390ms.
[12:36:51.313] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:51.402] <TB0> INFO: Expecting 2560 events.
[12:36:52.292] <TB0> INFO: 2560 events read in total (298ms).
[12:36:52.292] <TB0> INFO: Test took 979ms.
[12:36:52.294] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:52.600] <TB0> INFO: Expecting 2560 events.
[12:36:53.488] <TB0> INFO: 2560 events read in total (296ms).
[12:36:53.489] <TB0> INFO: Test took 1195ms.
[12:36:53.495] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:53.797] <TB0> INFO: Expecting 2560 events.
[12:36:54.688] <TB0> INFO: 2560 events read in total (299ms).
[12:36:54.689] <TB0> INFO: Test took 1195ms.
[12:36:54.691] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:54.997] <TB0> INFO: Expecting 2560 events.
[12:36:55.881] <TB0> INFO: 2560 events read in total (292ms).
[12:36:55.881] <TB0> INFO: Test took 1190ms.
[12:36:55.884] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:56.189] <TB0> INFO: Expecting 2560 events.
[12:36:57.082] <TB0> INFO: 2560 events read in total (301ms).
[12:36:57.083] <TB0> INFO: Test took 1199ms.
[12:36:57.087] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:57.391] <TB0> INFO: Expecting 2560 events.
[12:36:58.289] <TB0> INFO: 2560 events read in total (306ms).
[12:36:58.289] <TB0> INFO: Test took 1203ms.
[12:36:58.292] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:58.597] <TB0> INFO: Expecting 2560 events.
[12:36:59.486] <TB0> INFO: 2560 events read in total (298ms).
[12:36:59.487] <TB0> INFO: Test took 1195ms.
[12:36:59.491] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:36:59.795] <TB0> INFO: Expecting 2560 events.
[12:37:00.686] <TB0> INFO: 2560 events read in total (300ms).
[12:37:00.687] <TB0> INFO: Test took 1196ms.
[12:37:00.690] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:00.995] <TB0> INFO: Expecting 2560 events.
[12:37:01.877] <TB0> INFO: 2560 events read in total (290ms).
[12:37:01.878] <TB0> INFO: Test took 1188ms.
[12:37:01.880] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:02.186] <TB0> INFO: Expecting 2560 events.
[12:37:03.074] <TB0> INFO: 2560 events read in total (296ms).
[12:37:03.074] <TB0> INFO: Test took 1194ms.
[12:37:03.079] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:03.383] <TB0> INFO: Expecting 2560 events.
[12:37:04.264] <TB0> INFO: 2560 events read in total (290ms).
[12:37:04.265] <TB0> INFO: Test took 1186ms.
[12:37:04.267] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:04.573] <TB0> INFO: Expecting 2560 events.
[12:37:05.454] <TB0> INFO: 2560 events read in total (289ms).
[12:37:05.455] <TB0> INFO: Test took 1188ms.
[12:37:05.459] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:05.762] <TB0> INFO: Expecting 2560 events.
[12:37:06.643] <TB0> INFO: 2560 events read in total (290ms).
[12:37:06.643] <TB0> INFO: Test took 1184ms.
[12:37:06.646] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:06.951] <TB0> INFO: Expecting 2560 events.
[12:37:07.842] <TB0> INFO: 2560 events read in total (299ms).
[12:37:07.842] <TB0> INFO: Test took 1196ms.
[12:37:07.845] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:08.150] <TB0> INFO: Expecting 2560 events.
[12:37:09.036] <TB0> INFO: 2560 events read in total (294ms).
[12:37:09.037] <TB0> INFO: Test took 1192ms.
[12:37:09.039] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:09.345] <TB0> INFO: Expecting 2560 events.
[12:37:10.237] <TB0> INFO: 2560 events read in total (300ms).
[12:37:10.237] <TB0> INFO: Test took 1198ms.
[12:37:10.241] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:10.546] <TB0> INFO: Expecting 2560 events.
[12:37:11.428] <TB0> INFO: 2560 events read in total (290ms).
[12:37:11.428] <TB0> INFO: Test took 1188ms.
[12:37:11.432] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:11.736] <TB0> INFO: Expecting 2560 events.
[12:37:12.623] <TB0> INFO: 2560 events read in total (295ms).
[12:37:12.624] <TB0> INFO: Test took 1192ms.
[12:37:12.626] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:12.932] <TB0> INFO: Expecting 2560 events.
[12:37:13.823] <TB0> INFO: 2560 events read in total (299ms).
[12:37:13.823] <TB0> INFO: Test took 1197ms.
[12:37:13.828] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:14.132] <TB0> INFO: Expecting 2560 events.
[12:37:15.019] <TB0> INFO: 2560 events read in total (295ms).
[12:37:15.019] <TB0> INFO: Test took 1191ms.
[12:37:15.023] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:15.327] <TB0> INFO: Expecting 2560 events.
[12:37:16.208] <TB0> INFO: 2560 events read in total (289ms).
[12:37:16.208] <TB0> INFO: Test took 1185ms.
[12:37:16.215] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:16.516] <TB0> INFO: Expecting 2560 events.
[12:37:17.406] <TB0> INFO: 2560 events read in total (298ms).
[12:37:17.406] <TB0> INFO: Test took 1191ms.
[12:37:17.410] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:17.714] <TB0> INFO: Expecting 2560 events.
[12:37:18.605] <TB0> INFO: 2560 events read in total (299ms).
[12:37:18.606] <TB0> INFO: Test took 1197ms.
[12:37:18.609] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:18.913] <TB0> INFO: Expecting 2560 events.
[12:37:19.793] <TB0> INFO: 2560 events read in total (288ms).
[12:37:19.793] <TB0> INFO: Test took 1184ms.
[12:37:19.796] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:20.102] <TB0> INFO: Expecting 2560 events.
[12:37:20.994] <TB0> INFO: 2560 events read in total (300ms).
[12:37:20.995] <TB0> INFO: Test took 1199ms.
[12:37:20.999] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:21.303] <TB0> INFO: Expecting 2560 events.
[12:37:22.204] <TB0> INFO: 2560 events read in total (309ms).
[12:37:22.205] <TB0> INFO: Test took 1207ms.
[12:37:22.208] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:22.512] <TB0> INFO: Expecting 2560 events.
[12:37:23.408] <TB0> INFO: 2560 events read in total (304ms).
[12:37:23.408] <TB0> INFO: Test took 1200ms.
[12:37:23.412] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:23.717] <TB0> INFO: Expecting 2560 events.
[12:37:24.610] <TB0> INFO: 2560 events read in total (302ms).
[12:37:24.611] <TB0> INFO: Test took 1199ms.
[12:37:24.616] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:24.919] <TB0> INFO: Expecting 2560 events.
[12:37:25.814] <TB0> INFO: 2560 events read in total (303ms).
[12:37:25.815] <TB0> INFO: Test took 1199ms.
[12:37:25.819] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:26.123] <TB0> INFO: Expecting 2560 events.
[12:37:27.019] <TB0> INFO: 2560 events read in total (304ms).
[12:37:27.020] <TB0> INFO: Test took 1201ms.
[12:37:27.024] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:27.328] <TB0> INFO: Expecting 2560 events.
[12:37:28.218] <TB0> INFO: 2560 events read in total (299ms).
[12:37:28.219] <TB0> INFO: Test took 1195ms.
[12:37:28.223] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:37:28.526] <TB0> INFO: Expecting 2560 events.
[12:37:29.416] <TB0> INFO: 2560 events read in total (298ms).
[12:37:29.417] <TB0> INFO: Test took 1194ms.
[12:37:29.893] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 643 seconds
[12:37:29.893] <TB0> INFO: PH scale (per ROC): 48 64 49 62 62 59 44 64 64 42 55 55 58 57 63 63
[12:37:29.893] <TB0> INFO: PH offset (per ROC): 113 137 110 131 131 132 107 116 130 89 115 127 127 120 123 122
[12:37:29.902] <TB0> INFO: Decoding statistics:
[12:37:29.902] <TB0> INFO: General information:
[12:37:29.902] <TB0> INFO: 16bit words read: 127888
[12:37:29.902] <TB0> INFO: valid events total: 20480
[12:37:29.902] <TB0> INFO: empty events: 17976
[12:37:29.902] <TB0> INFO: valid events with pixels: 2504
[12:37:29.902] <TB0> INFO: valid pixel hits: 2504
[12:37:29.902] <TB0> INFO: Event errors: 0
[12:37:29.902] <TB0> INFO: start marker: 0
[12:37:29.902] <TB0> INFO: stop marker: 0
[12:37:29.902] <TB0> INFO: overflow: 0
[12:37:29.902] <TB0> INFO: invalid 5bit words: 0
[12:37:29.902] <TB0> INFO: invalid XOR eye diagram: 0
[12:37:29.902] <TB0> INFO: frame (failed synchr.): 0
[12:37:29.902] <TB0> INFO: idle data (no TBM trl): 0
[12:37:29.902] <TB0> INFO: no data (only TBM hdr): 0
[12:37:29.902] <TB0> INFO: TBM errors: 0
[12:37:29.902] <TB0> INFO: flawed TBM headers: 0
[12:37:29.902] <TB0> INFO: flawed TBM trailers: 0
[12:37:29.902] <TB0> INFO: event ID mismatches: 0
[12:37:29.902] <TB0> INFO: ROC errors: 0
[12:37:29.902] <TB0> INFO: missing ROC header(s): 0
[12:37:29.902] <TB0> INFO: misplaced readback start: 0
[12:37:29.902] <TB0> INFO: Pixel decoding errors: 0
[12:37:29.902] <TB0> INFO: pixel data incomplete: 0
[12:37:29.902] <TB0> INFO: pixel address: 0
[12:37:29.902] <TB0> INFO: pulse height fill bit: 0
[12:37:29.902] <TB0> INFO: buffer corruption: 0
[12:37:30.064] <TB0> INFO: ######################################################################
[12:37:30.064] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:37:30.064] <TB0> INFO: ######################################################################
[12:37:30.078] <TB0> INFO: scanning low vcal = 10
[12:37:30.316] <TB0> INFO: Expecting 41600 events.
[12:37:33.965] <TB0> INFO: 41600 events read in total (3057ms).
[12:37:33.965] <TB0> INFO: Test took 3886ms.
[12:37:33.967] <TB0> INFO: scanning low vcal = 20
[12:37:34.257] <TB0> INFO: Expecting 41600 events.
[12:37:37.887] <TB0> INFO: 41600 events read in total (3038ms).
[12:37:37.888] <TB0> INFO: Test took 3921ms.
[12:37:37.890] <TB0> INFO: scanning low vcal = 30
[12:37:38.183] <TB0> INFO: Expecting 41600 events.
[12:37:41.885] <TB0> INFO: 41600 events read in total (3110ms).
[12:37:41.886] <TB0> INFO: Test took 3996ms.
[12:37:41.889] <TB0> INFO: scanning low vcal = 40
[12:37:42.166] <TB0> INFO: Expecting 41600 events.
[12:37:46.218] <TB0> INFO: 41600 events read in total (3460ms).
[12:37:46.220] <TB0> INFO: Test took 4331ms.
[12:37:46.223] <TB0> INFO: scanning low vcal = 50
[12:37:46.501] <TB0> INFO: Expecting 41600 events.
[12:37:50.540] <TB0> INFO: 41600 events read in total (3447ms).
[12:37:50.540] <TB0> INFO: Test took 4317ms.
[12:37:50.544] <TB0> INFO: scanning low vcal = 60
[12:37:50.821] <TB0> INFO: Expecting 41600 events.
[12:37:54.881] <TB0> INFO: 41600 events read in total (3468ms).
[12:37:54.882] <TB0> INFO: Test took 4338ms.
[12:37:54.885] <TB0> INFO: scanning low vcal = 70
[12:37:55.162] <TB0> INFO: Expecting 41600 events.
[12:37:59.186] <TB0> INFO: 41600 events read in total (3432ms).
[12:37:59.187] <TB0> INFO: Test took 4302ms.
[12:37:59.191] <TB0> INFO: scanning low vcal = 80
[12:37:59.468] <TB0> INFO: Expecting 41600 events.
[12:38:03.470] <TB0> INFO: 41600 events read in total (3410ms).
[12:38:03.471] <TB0> INFO: Test took 4280ms.
[12:38:03.474] <TB0> INFO: scanning low vcal = 90
[12:38:03.759] <TB0> INFO: Expecting 41600 events.
[12:38:07.813] <TB0> INFO: 41600 events read in total (3463ms).
[12:38:07.814] <TB0> INFO: Test took 4340ms.
[12:38:07.818] <TB0> INFO: scanning low vcal = 100
[12:38:08.095] <TB0> INFO: Expecting 41600 events.
[12:38:12.155] <TB0> INFO: 41600 events read in total (3468ms).
[12:38:12.156] <TB0> INFO: Test took 4337ms.
[12:38:12.159] <TB0> INFO: scanning low vcal = 110
[12:38:12.437] <TB0> INFO: Expecting 41600 events.
[12:38:16.476] <TB0> INFO: 41600 events read in total (3448ms).
[12:38:16.477] <TB0> INFO: Test took 4318ms.
[12:38:16.480] <TB0> INFO: scanning low vcal = 120
[12:38:16.757] <TB0> INFO: Expecting 41600 events.
[12:38:20.849] <TB0> INFO: 41600 events read in total (3500ms).
[12:38:20.850] <TB0> INFO: Test took 4370ms.
[12:38:20.853] <TB0> INFO: scanning low vcal = 130
[12:38:21.130] <TB0> INFO: Expecting 41600 events.
[12:38:25.187] <TB0> INFO: 41600 events read in total (3465ms).
[12:38:25.187] <TB0> INFO: Test took 4334ms.
[12:38:25.190] <TB0> INFO: scanning low vcal = 140
[12:38:25.468] <TB0> INFO: Expecting 41600 events.
[12:38:29.539] <TB0> INFO: 41600 events read in total (3479ms).
[12:38:29.540] <TB0> INFO: Test took 4350ms.
[12:38:29.543] <TB0> INFO: scanning low vcal = 150
[12:38:29.820] <TB0> INFO: Expecting 41600 events.
[12:38:33.888] <TB0> INFO: 41600 events read in total (3476ms).
[12:38:33.889] <TB0> INFO: Test took 4346ms.
[12:38:33.892] <TB0> INFO: scanning low vcal = 160
[12:38:34.170] <TB0> INFO: Expecting 41600 events.
[12:38:38.211] <TB0> INFO: 41600 events read in total (3450ms).
[12:38:38.212] <TB0> INFO: Test took 4320ms.
[12:38:38.215] <TB0> INFO: scanning low vcal = 170
[12:38:38.495] <TB0> INFO: Expecting 41600 events.
[12:38:42.583] <TB0> INFO: 41600 events read in total (3496ms).
[12:38:42.584] <TB0> INFO: Test took 4369ms.
[12:38:42.589] <TB0> INFO: scanning low vcal = 180
[12:38:42.865] <TB0> INFO: Expecting 41600 events.
[12:38:46.894] <TB0> INFO: 41600 events read in total (3437ms).
[12:38:46.895] <TB0> INFO: Test took 4305ms.
[12:38:46.898] <TB0> INFO: scanning low vcal = 190
[12:38:47.175] <TB0> INFO: Expecting 41600 events.
[12:38:51.222] <TB0> INFO: 41600 events read in total (3455ms).
[12:38:51.223] <TB0> INFO: Test took 4324ms.
[12:38:51.226] <TB0> INFO: scanning low vcal = 200
[12:38:51.503] <TB0> INFO: Expecting 41600 events.
[12:38:55.545] <TB0> INFO: 41600 events read in total (3450ms).
[12:38:55.546] <TB0> INFO: Test took 4320ms.
[12:38:55.551] <TB0> INFO: scanning low vcal = 210
[12:38:55.827] <TB0> INFO: Expecting 41600 events.
[12:38:59.884] <TB0> INFO: 41600 events read in total (3465ms).
[12:38:59.884] <TB0> INFO: Test took 4333ms.
[12:38:59.888] <TB0> INFO: scanning low vcal = 220
[12:39:00.165] <TB0> INFO: Expecting 41600 events.
[12:39:04.239] <TB0> INFO: 41600 events read in total (3482ms).
[12:39:04.240] <TB0> INFO: Test took 4352ms.
[12:39:04.243] <TB0> INFO: scanning low vcal = 230
[12:39:04.520] <TB0> INFO: Expecting 41600 events.
[12:39:08.561] <TB0> INFO: 41600 events read in total (3449ms).
[12:39:08.562] <TB0> INFO: Test took 4319ms.
[12:39:08.566] <TB0> INFO: scanning low vcal = 240
[12:39:08.843] <TB0> INFO: Expecting 41600 events.
[12:39:12.871] <TB0> INFO: 41600 events read in total (3437ms).
[12:39:12.872] <TB0> INFO: Test took 4305ms.
[12:39:12.875] <TB0> INFO: scanning low vcal = 250
[12:39:13.157] <TB0> INFO: Expecting 41600 events.
[12:39:17.220] <TB0> INFO: 41600 events read in total (3471ms).
[12:39:17.220] <TB0> INFO: Test took 4344ms.
[12:39:17.224] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:39:17.501] <TB0> INFO: Expecting 41600 events.
[12:39:21.546] <TB0> INFO: 41600 events read in total (3453ms).
[12:39:21.547] <TB0> INFO: Test took 4322ms.
[12:39:21.550] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:39:21.835] <TB0> INFO: Expecting 41600 events.
[12:39:25.855] <TB0> INFO: 41600 events read in total (3428ms).
[12:39:25.856] <TB0> INFO: Test took 4306ms.
[12:39:25.859] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:39:26.136] <TB0> INFO: Expecting 41600 events.
[12:39:30.190] <TB0> INFO: 41600 events read in total (3462ms).
[12:39:30.191] <TB0> INFO: Test took 4332ms.
[12:39:30.195] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:39:30.472] <TB0> INFO: Expecting 41600 events.
[12:39:34.531] <TB0> INFO: 41600 events read in total (3468ms).
[12:39:34.532] <TB0> INFO: Test took 4337ms.
[12:39:34.535] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:39:34.812] <TB0> INFO: Expecting 41600 events.
[12:39:38.860] <TB0> INFO: 41600 events read in total (3457ms).
[12:39:38.861] <TB0> INFO: Test took 4326ms.
[12:39:39.425] <TB0> INFO: PixTestGainPedestal::measure() done
[12:40:16.993] <TB0> INFO: PixTestGainPedestal::fit() done
[12:40:16.993] <TB0> INFO: non-linearity mean: 0.954 0.981 0.936 0.983 0.982 0.983 0.942 0.984 0.984 0.978 0.973 0.984 0.982 0.979 0.980 0.982
[12:40:16.993] <TB0> INFO: non-linearity RMS: 0.040 0.005 0.080 0.004 0.004 0.003 0.052 0.003 0.004 0.184 0.012 0.003 0.003 0.004 0.005 0.004
[12:40:16.993] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[12:40:17.015] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[12:40:17.036] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[12:40:17.058] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[12:40:17.080] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[12:40:17.101] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[12:40:17.123] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[12:40:17.144] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[12:40:17.166] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[12:40:17.188] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[12:40:17.212] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[12:40:17.234] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[12:40:17.257] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[12:40:17.279] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[12:40:17.301] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[12:40:17.324] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1082_FullQualification_2016-10-31_10h24m_1477905852//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[12:40:17.346] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 167 seconds
[12:40:17.346] <TB0> INFO: Decoding statistics:
[12:40:17.346] <TB0> INFO: General information:
[12:40:17.346] <TB0> INFO: 16bit words read: 3327632
[12:40:17.346] <TB0> INFO: valid events total: 332800
[12:40:17.346] <TB0> INFO: empty events: 0
[12:40:17.346] <TB0> INFO: valid events with pixels: 332800
[12:40:17.347] <TB0> INFO: valid pixel hits: 665416
[12:40:17.347] <TB0> INFO: Event errors: 0
[12:40:17.347] <TB0> INFO: start marker: 0
[12:40:17.347] <TB0> INFO: stop marker: 0
[12:40:17.347] <TB0> INFO: overflow: 0
[12:40:17.347] <TB0> INFO: invalid 5bit words: 0
[12:40:17.347] <TB0> INFO: invalid XOR eye diagram: 0
[12:40:17.347] <TB0> INFO: frame (failed synchr.): 0
[12:40:17.347] <TB0> INFO: idle data (no TBM trl): 0
[12:40:17.347] <TB0> INFO: no data (only TBM hdr): 0
[12:40:17.347] <TB0> INFO: TBM errors: 0
[12:40:17.347] <TB0> INFO: flawed TBM headers: 0
[12:40:17.347] <TB0> INFO: flawed TBM trailers: 0
[12:40:17.347] <TB0> INFO: event ID mismatches: 0
[12:40:17.347] <TB0> INFO: ROC errors: 0
[12:40:17.347] <TB0> INFO: missing ROC header(s): 0
[12:40:17.347] <TB0> INFO: misplaced readback start: 0
[12:40:17.347] <TB0> INFO: Pixel decoding errors: 0
[12:40:17.347] <TB0> INFO: pixel data incomplete: 0
[12:40:17.347] <TB0> INFO: pixel address: 0
[12:40:17.347] <TB0> INFO: pulse height fill bit: 0
[12:40:17.347] <TB0> INFO: buffer corruption: 0
[12:40:17.372] <TB0> INFO: Decoding statistics:
[12:40:17.372] <TB0> INFO: General information:
[12:40:17.372] <TB0> INFO: 16bit words read: 3457056
[12:40:17.372] <TB0> INFO: valid events total: 353536
[12:40:17.372] <TB0> INFO: empty events: 18232
[12:40:17.372] <TB0> INFO: valid events with pixels: 335304
[12:40:17.372] <TB0> INFO: valid pixel hits: 667920
[12:40:17.372] <TB0> INFO: Event errors: 0
[12:40:17.372] <TB0> INFO: start marker: 0
[12:40:17.372] <TB0> INFO: stop marker: 0
[12:40:17.372] <TB0> INFO: overflow: 0
[12:40:17.372] <TB0> INFO: invalid 5bit words: 0
[12:40:17.372] <TB0> INFO: invalid XOR eye diagram: 0
[12:40:17.372] <TB0> INFO: frame (failed synchr.): 0
[12:40:17.372] <TB0> INFO: idle data (no TBM trl): 0
[12:40:17.372] <TB0> INFO: no data (only TBM hdr): 0
[12:40:17.372] <TB0> INFO: TBM errors: 0
[12:40:17.372] <TB0> INFO: flawed TBM headers: 0
[12:40:17.372] <TB0> INFO: flawed TBM trailers: 0
[12:40:17.372] <TB0> INFO: event ID mismatches: 0
[12:40:17.372] <TB0> INFO: ROC errors: 0
[12:40:17.372] <TB0> INFO: missing ROC header(s): 0
[12:40:17.372] <TB0> INFO: misplaced readback start: 0
[12:40:17.372] <TB0> INFO: Pixel decoding errors: 0
[12:40:17.372] <TB0> INFO: pixel data incomplete: 0
[12:40:17.372] <TB0> INFO: pixel address: 0
[12:40:17.372] <TB0> INFO: pulse height fill bit: 0
[12:40:17.372] <TB0> INFO: buffer corruption: 0
[12:40:17.373] <TB0> INFO: enter test to run
[12:40:17.373] <TB0> INFO: test: exit no parameter change
[12:40:17.499] <TB0> QUIET: Connection to board 71 closed.
[12:40:17.501] <TB0> INFO: pXar: this is the end, my friend