[19:26:57.446] <TB1> INFO: *** Welcome to pxar ***
[19:26:57.446] <TB1> INFO: *** Today: 2016/11/03
[19:26:57.453] <TB1> INFO: *** Version: c8ba-dirty
[19:26:57.453] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C15.dat
[19:26:57.453] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C1b.dat
[19:26:57.454] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//defaultMaskFile.dat
[19:26:57.454] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters_C15.dat
[19:26:57.518] <TB1> INFO: clk: 4
[19:26:57.518] <TB1> INFO: ctr: 4
[19:26:57.518] <TB1> INFO: sda: 19
[19:26:57.518] <TB1> INFO: tin: 9
[19:26:57.518] <TB1> INFO: level: 15
[19:26:57.518] <TB1> INFO: triggerdelay: 0
[19:26:57.518] <TB1> QUIET: Instanciating API for pxar v2.7.6+61~g7f4a123
[19:26:57.518] <TB1> INFO: Log level: INFO
[19:26:57.526] <TB1> INFO: Found DTB DTB_WXC03A
[19:26:57.538] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[19:26:57.540] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[19:26:57.541] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[19:26:59.031] <TB1> INFO: DUT info:
[19:26:59.031] <TB1> INFO: The DUT currently contains the following objects:
[19:26:59.031] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[19:26:59.031] <TB1> INFO: TBM Core alpha (0): 7 registers set
[19:26:59.031] <TB1> INFO: TBM Core beta (1): 7 registers set
[19:26:59.031] <TB1> INFO: TBM Core alpha (2): 7 registers set
[19:26:59.031] <TB1> INFO: TBM Core beta (3): 7 registers set
[19:26:59.031] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[19:26:59.031] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.031] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.031] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.031] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.032] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[19:26:59.432] <TB1> INFO: enter 'restricted' command line mode
[19:26:59.432] <TB1> INFO: enter test to run
[19:26:59.432] <TB1> INFO: test: pretest no parameter change
[19:26:59.433] <TB1> INFO: running: pretest
[19:26:59.438] <TB1> INFO: ######################################################################
[19:26:59.438] <TB1> INFO: PixTestPretest::doTest()
[19:26:59.438] <TB1> INFO: ######################################################################
[19:26:59.439] <TB1> INFO: ----------------------------------------------------------------------
[19:26:59.439] <TB1> INFO: PixTestPretest::programROC()
[19:26:59.439] <TB1> INFO: ----------------------------------------------------------------------
[19:27:17.452] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[19:27:17.452] <TB1> INFO: IA differences per ROC: 15.3 17.7 17.7 19.3 16.1 20.9 18.5 17.7 17.7 16.9 16.1 18.5 17.7 18.5 18.5 17.7
[19:27:17.511] <TB1> INFO: ----------------------------------------------------------------------
[19:27:17.511] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[19:27:17.511] <TB1> INFO: ----------------------------------------------------------------------
[19:27:26.226] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[19:27:26.226] <TB1> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 19.3 19.3 20.1 20.1 19.3 20.1 20.1 20.1 20.1 20.1 20.1 20.1
[19:27:26.259] <TB1> INFO: ----------------------------------------------------------------------
[19:27:26.259] <TB1> INFO: PixTestPretest::findTiming()
[19:27:26.259] <TB1> INFO: ----------------------------------------------------------------------
[19:27:26.259] <TB1> INFO: PixTestCmd::init()

[19:27:58.340] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[19:27:58.340] <TB1> INFO: (success/tries = 100/100), width = 3
[19:27:59.843] <TB1> INFO: ----------------------------------------------------------------------
[19:27:59.843] <TB1> INFO: PixTestPretest::findWorkingPixel()
[19:27:59.843] <TB1> INFO: ----------------------------------------------------------------------
[19:27:59.939] <TB1> INFO: Expecting 231680 events.
[19:28:09.768] <TB1> INFO: 231680 events read in total (9237ms).
[19:28:09.778] <TB1> INFO: Test took 9930ms.
[19:28:10.027] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[19:28:10.064] <TB1> INFO: ----------------------------------------------------------------------
[19:28:10.064] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[19:28:10.064] <TB1> INFO: ----------------------------------------------------------------------
[19:28:10.160] <TB1> INFO: Expecting 231680 events.
[19:28:19.973] <TB1> INFO: 231680 events read in total (9221ms).
[19:28:19.986] <TB1> INFO: Test took 9914ms.
[19:28:20.236] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[19:28:20.236] <TB1> INFO: CalDel: 105 101 95 111 91 108 111 90 110 107 96 85 108 108 117 92
[19:28:20.236] <TB1> INFO: VthrComp: 51 51 53 51 51 51 51 52 56 51 53 51 51 51 51 61
[19:28:20.239] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C0.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C1.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C2.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C3.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C4.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C5.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C6.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C7.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C8.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C9.dat
[19:28:20.240] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C10.dat
[19:28:20.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C11.dat
[19:28:20.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C12.dat
[19:28:20.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C13.dat
[19:28:20.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C14.dat
[19:28:20.241] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters_C15.dat
[19:28:20.241] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C0a.dat
[19:28:20.241] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C0b.dat
[19:28:20.241] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C1a.dat
[19:28:20.241] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//tbmParameters_C1b.dat
[19:28:20.241] <TB1> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[19:28:20.293] <TB1> INFO: enter test to run
[19:28:20.293] <TB1> INFO: test: FullTest no parameter change
[19:28:20.293] <TB1> INFO: running: fulltest
[19:28:20.293] <TB1> INFO: ######################################################################
[19:28:20.293] <TB1> INFO: PixTestFullTest::doTest()
[19:28:20.293] <TB1> INFO: ######################################################################
[19:28:20.294] <TB1> INFO: ######################################################################
[19:28:20.294] <TB1> INFO: PixTestAlive::doTest()
[19:28:20.294] <TB1> INFO: ######################################################################
[19:28:20.295] <TB1> INFO: ----------------------------------------------------------------------
[19:28:20.295] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:28:20.295] <TB1> INFO: ----------------------------------------------------------------------
[19:28:20.533] <TB1> INFO: Expecting 41600 events.
[19:28:24.086] <TB1> INFO: 41600 events read in total (2962ms).
[19:28:24.087] <TB1> INFO: Test took 3791ms.
[19:28:24.321] <TB1> INFO: PixTestAlive::aliveTest() done
[19:28:24.321] <TB1> INFO: number of dead pixels (per ROC): 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:28:24.323] <TB1> INFO: ----------------------------------------------------------------------
[19:28:24.323] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:28:24.323] <TB1> INFO: ----------------------------------------------------------------------
[19:28:24.565] <TB1> INFO: Expecting 41600 events.
[19:28:27.541] <TB1> INFO: 41600 events read in total (2384ms).
[19:28:27.542] <TB1> INFO: Test took 3217ms.
[19:28:27.542] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[19:28:27.785] <TB1> INFO: PixTestAlive::maskTest() done
[19:28:27.786] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:28:27.787] <TB1> INFO: ----------------------------------------------------------------------
[19:28:27.787] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[19:28:27.787] <TB1> INFO: ----------------------------------------------------------------------
[19:28:28.032] <TB1> INFO: Expecting 41600 events.
[19:28:31.684] <TB1> INFO: 41600 events read in total (3060ms).
[19:28:31.684] <TB1> INFO: Test took 3895ms.
[19:28:31.918] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[19:28:31.918] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:28:31.918] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[19:28:31.918] <TB1> INFO: Decoding statistics:
[19:28:31.918] <TB1> INFO: General information:
[19:28:31.918] <TB1> INFO: 16bit words read: 0
[19:28:31.918] <TB1> INFO: valid events total: 0
[19:28:31.918] <TB1> INFO: empty events: 0
[19:28:31.918] <TB1> INFO: valid events with pixels: 0
[19:28:31.918] <TB1> INFO: valid pixel hits: 0
[19:28:31.919] <TB1> INFO: Event errors: 0
[19:28:31.919] <TB1> INFO: start marker: 0
[19:28:31.919] <TB1> INFO: stop marker: 0
[19:28:31.919] <TB1> INFO: overflow: 0
[19:28:31.919] <TB1> INFO: invalid 5bit words: 0
[19:28:31.919] <TB1> INFO: invalid XOR eye diagram: 0
[19:28:31.919] <TB1> INFO: frame (failed synchr.): 0
[19:28:31.919] <TB1> INFO: idle data (no TBM trl): 0
[19:28:31.919] <TB1> INFO: no data (only TBM hdr): 0
[19:28:31.919] <TB1> INFO: TBM errors: 0
[19:28:31.919] <TB1> INFO: flawed TBM headers: 0
[19:28:31.919] <TB1> INFO: flawed TBM trailers: 0
[19:28:31.919] <TB1> INFO: event ID mismatches: 0
[19:28:31.919] <TB1> INFO: ROC errors: 0
[19:28:31.919] <TB1> INFO: missing ROC header(s): 0
[19:28:31.919] <TB1> INFO: misplaced readback start: 0
[19:28:31.919] <TB1> INFO: Pixel decoding errors: 0
[19:28:31.919] <TB1> INFO: pixel data incomplete: 0
[19:28:31.919] <TB1> INFO: pixel address: 0
[19:28:31.919] <TB1> INFO: pulse height fill bit: 0
[19:28:31.919] <TB1> INFO: buffer corruption: 0
[19:28:31.928] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C15.dat
[19:28:31.928] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[19:28:31.928] <TB1> INFO: ######################################################################
[19:28:31.928] <TB1> INFO: PixTestReadback::doTest()
[19:28:31.928] <TB1> INFO: ######################################################################
[19:28:31.928] <TB1> INFO: ----------------------------------------------------------------------
[19:28:31.928] <TB1> INFO: PixTestReadback::CalibrateVd()
[19:28:31.928] <TB1> INFO: ----------------------------------------------------------------------
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C0.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C1.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C2.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C3.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C4.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C5.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C6.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C7.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C8.dat
[19:28:41.911] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C9.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C10.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C11.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C12.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C13.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C14.dat
[19:28:41.912] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C15.dat
[19:28:41.940] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:28:41.940] <TB1> INFO: ----------------------------------------------------------------------
[19:28:41.940] <TB1> INFO: PixTestReadback::CalibrateVa()
[19:28:41.940] <TB1> INFO: ----------------------------------------------------------------------
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C0.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C1.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C2.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C3.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C4.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C5.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C6.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C7.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C8.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C9.dat
[19:28:51.888] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C10.dat
[19:28:51.889] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C11.dat
[19:28:51.889] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C12.dat
[19:28:51.889] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C13.dat
[19:28:51.889] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C14.dat
[19:28:51.889] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C15.dat
[19:28:51.919] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:28:51.919] <TB1> INFO: ----------------------------------------------------------------------
[19:28:51.919] <TB1> INFO: PixTestReadback::readbackVbg()
[19:28:51.919] <TB1> INFO: ----------------------------------------------------------------------
[19:28:59.597] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:28:59.597] <TB1> INFO: ----------------------------------------------------------------------
[19:28:59.597] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[19:28:59.597] <TB1> INFO: ----------------------------------------------------------------------
[19:28:59.597] <TB1> INFO: Vbg will be calibrated using Vd calibration
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.2calibrated Vbg = 1.18263 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 144calibrated Vbg = 1.18333 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.4calibrated Vbg = 1.18179 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.1calibrated Vbg = 1.18139 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 159.3calibrated Vbg = 1.17956 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 150.2calibrated Vbg = 1.18437 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 161.3calibrated Vbg = 1.18067 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.4calibrated Vbg = 1.18738 :::*/*/*/*/
[19:28:59.597] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 161calibrated Vbg = 1.17791 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.9calibrated Vbg = 1.17738 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.1calibrated Vbg = 1.17009 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.1calibrated Vbg = 1.17144 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156calibrated Vbg = 1.17852 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.2calibrated Vbg = 1.18185 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.9calibrated Vbg = 1.18405 :::*/*/*/*/
[19:28:59.598] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.2calibrated Vbg = 1.18022 :::*/*/*/*/
[19:28:59.600] <TB1> INFO: ----------------------------------------------------------------------
[19:28:59.600] <TB1> INFO: PixTestReadback::CalibrateIa()
[19:28:59.600] <TB1> INFO: ----------------------------------------------------------------------
[19:31:40.463] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C0.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C1.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C2.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C3.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C4.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C5.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C6.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C7.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C8.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C9.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C10.dat
[19:31:40.464] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C11.dat
[19:31:40.465] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C12.dat
[19:31:40.465] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C13.dat
[19:31:40.465] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C14.dat
[19:31:40.465] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//readbackCal_C15.dat
[19:31:40.493] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:31:40.494] <TB1> INFO: PixTestReadback::doTest() done
[19:31:40.495] <TB1> INFO: Decoding statistics:
[19:31:40.495] <TB1> INFO: General information:
[19:31:40.495] <TB1> INFO: 16bit words read: 1536
[19:31:40.495] <TB1> INFO: valid events total: 256
[19:31:40.495] <TB1> INFO: empty events: 256
[19:31:40.495] <TB1> INFO: valid events with pixels: 0
[19:31:40.495] <TB1> INFO: valid pixel hits: 0
[19:31:40.495] <TB1> INFO: Event errors: 0
[19:31:40.495] <TB1> INFO: start marker: 0
[19:31:40.495] <TB1> INFO: stop marker: 0
[19:31:40.495] <TB1> INFO: overflow: 0
[19:31:40.495] <TB1> INFO: invalid 5bit words: 0
[19:31:40.495] <TB1> INFO: invalid XOR eye diagram: 0
[19:31:40.495] <TB1> INFO: frame (failed synchr.): 0
[19:31:40.495] <TB1> INFO: idle data (no TBM trl): 0
[19:31:40.495] <TB1> INFO: no data (only TBM hdr): 0
[19:31:40.495] <TB1> INFO: TBM errors: 0
[19:31:40.495] <TB1> INFO: flawed TBM headers: 0
[19:31:40.495] <TB1> INFO: flawed TBM trailers: 0
[19:31:40.495] <TB1> INFO: event ID mismatches: 0
[19:31:40.495] <TB1> INFO: ROC errors: 0
[19:31:40.495] <TB1> INFO: missing ROC header(s): 0
[19:31:40.495] <TB1> INFO: misplaced readback start: 0
[19:31:40.495] <TB1> INFO: Pixel decoding errors: 0
[19:31:40.495] <TB1> INFO: pixel data incomplete: 0
[19:31:40.495] <TB1> INFO: pixel address: 0
[19:31:40.495] <TB1> INFO: pulse height fill bit: 0
[19:31:40.495] <TB1> INFO: buffer corruption: 0
[19:31:40.548] <TB1> INFO: ######################################################################
[19:31:40.548] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:31:40.548] <TB1> INFO: ######################################################################
[19:31:40.551] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:31:40.628] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:31:40.628] <TB1> INFO: run 1 of 1
[19:31:40.865] <TB1> INFO: Expecting 3120000 events.
[19:32:12.676] <TB1> INFO: 653130 events read in total (31219ms).











[19:32:43.645] <TB1> INFO: 1301290 events read in total (62188ms).











[19:33:14.290] <TB1> INFO: 1945325 events read in total (92833ms).











[19:33:45.210] <TB1> INFO: 2591230 events read in total (123753ms).





















[19:34:10.251] <TB1> INFO: 3120000 events read in total (148794ms).
[19:34:10.321] <TB1> INFO: Test took 149694ms.
[19:34:33.402] <TB1> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 172 seconds
[19:34:33.402] <TB1> INFO: number of dead bumps (per ROC): 6 23 0 2 0 0 0 0 0 0 0 1 0 0 0 0
[19:34:33.402] <TB1> INFO: separation cut (per ROC): 104 95 109 101 106 109 101 105 115 115 118 109 106 107 108 131
[19:34:33.402] <TB1> INFO: Decoding statistics:
[19:34:33.402] <TB1> INFO: General information:
[19:34:33.402] <TB1> INFO: 16bit words read: 0
[19:34:33.402] <TB1> INFO: valid events total: 0
[19:34:33.402] <TB1> INFO: empty events: 0
[19:34:33.402] <TB1> INFO: valid events with pixels: 0
[19:34:33.402] <TB1> INFO: valid pixel hits: 0
[19:34:33.402] <TB1> INFO: Event errors: 0
[19:34:33.402] <TB1> INFO: start marker: 0
[19:34:33.402] <TB1> INFO: stop marker: 0
[19:34:33.402] <TB1> INFO: overflow: 0
[19:34:33.402] <TB1> INFO: invalid 5bit words: 0
[19:34:33.402] <TB1> INFO: invalid XOR eye diagram: 0
[19:34:33.402] <TB1> INFO: frame (failed synchr.): 0
[19:34:33.402] <TB1> INFO: idle data (no TBM trl): 0
[19:34:33.402] <TB1> INFO: no data (only TBM hdr): 0
[19:34:33.402] <TB1> INFO: TBM errors: 0
[19:34:33.402] <TB1> INFO: flawed TBM headers: 0
[19:34:33.402] <TB1> INFO: flawed TBM trailers: 0
[19:34:33.403] <TB1> INFO: event ID mismatches: 0
[19:34:33.403] <TB1> INFO: ROC errors: 0
[19:34:33.403] <TB1> INFO: missing ROC header(s): 0
[19:34:33.403] <TB1> INFO: misplaced readback start: 0
[19:34:33.403] <TB1> INFO: Pixel decoding errors: 0
[19:34:33.403] <TB1> INFO: pixel data incomplete: 0
[19:34:33.403] <TB1> INFO: pixel address: 0
[19:34:33.403] <TB1> INFO: pulse height fill bit: 0
[19:34:33.403] <TB1> INFO: buffer corruption: 0
[19:34:33.451] <TB1> INFO: ######################################################################
[19:34:33.451] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:34:33.451] <TB1> INFO: ######################################################################
[19:34:33.451] <TB1> INFO: ----------------------------------------------------------------------
[19:34:33.451] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:34:33.451] <TB1> INFO: ----------------------------------------------------------------------
[19:34:33.451] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:34:33.466] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[19:34:33.466] <TB1> INFO: run 1 of 1
[19:34:33.701] <TB1> INFO: Expecting 36608000 events.
[19:34:58.193] <TB1> INFO: 672600 events read in total (23900ms).
[19:35:22.353] <TB1> INFO: 1334800 events read in total (48060ms).
[19:35:45.962] <TB1> INFO: 1994600 events read in total (71669ms).
[19:36:10.053] <TB1> INFO: 2654050 events read in total (95760ms).
[19:36:34.063] <TB1> INFO: 3313400 events read in total (119770ms).
[19:36:57.870] <TB1> INFO: 3971650 events read in total (143577ms).
[19:37:21.601] <TB1> INFO: 4630100 events read in total (167308ms).
[19:37:45.451] <TB1> INFO: 5288150 events read in total (191158ms).
[19:38:09.406] <TB1> INFO: 5946600 events read in total (215113ms).
[19:38:33.328] <TB1> INFO: 6605550 events read in total (239035ms).
[19:38:57.019] <TB1> INFO: 7264550 events read in total (262726ms).
[19:39:21.185] <TB1> INFO: 7927800 events read in total (286892ms).
[19:39:44.898] <TB1> INFO: 8589450 events read in total (310605ms).
[19:40:08.828] <TB1> INFO: 9253650 events read in total (334535ms).
[19:40:32.705] <TB1> INFO: 9914500 events read in total (358412ms).
[19:40:56.513] <TB1> INFO: 10574300 events read in total (382220ms).
[19:41:20.613] <TB1> INFO: 11232950 events read in total (406320ms).
[19:41:44.963] <TB1> INFO: 11890700 events read in total (430670ms).
[19:42:08.504] <TB1> INFO: 12550450 events read in total (454211ms).
[19:42:32.492] <TB1> INFO: 13211600 events read in total (478199ms).
[19:42:56.434] <TB1> INFO: 13871650 events read in total (502141ms).
[19:43:20.519] <TB1> INFO: 14532950 events read in total (526226ms).
[19:43:44.292] <TB1> INFO: 15192450 events read in total (549999ms).
[19:44:08.242] <TB1> INFO: 15851050 events read in total (573949ms).
[19:44:32.053] <TB1> INFO: 16510200 events read in total (597760ms).
[19:44:55.790] <TB1> INFO: 17170150 events read in total (621497ms).
[19:45:19.967] <TB1> INFO: 17828650 events read in total (645674ms).
[19:45:43.841] <TB1> INFO: 18486300 events read in total (669548ms).
[19:46:07.455] <TB1> INFO: 19144550 events read in total (693162ms).
[19:46:30.858] <TB1> INFO: 19799850 events read in total (716565ms).
[19:46:54.508] <TB1> INFO: 20456900 events read in total (740215ms).
[19:47:18.385] <TB1> INFO: 21111950 events read in total (764092ms).
[19:47:42.303] <TB1> INFO: 21769450 events read in total (788011ms).
[19:48:06.290] <TB1> INFO: 22424950 events read in total (811997ms).
[19:48:30.294] <TB1> INFO: 23081200 events read in total (836001ms).
[19:48:54.409] <TB1> INFO: 23738950 events read in total (860116ms).
[19:49:18.085] <TB1> INFO: 24396150 events read in total (883792ms).
[19:49:42.053] <TB1> INFO: 25053600 events read in total (907760ms).
[19:50:05.957] <TB1> INFO: 25710950 events read in total (931664ms).
[19:50:29.735] <TB1> INFO: 26368050 events read in total (955442ms).
[19:50:53.629] <TB1> INFO: 27024250 events read in total (979336ms).
[19:51:17.731] <TB1> INFO: 27681800 events read in total (1003438ms).
[19:51:41.723] <TB1> INFO: 28336600 events read in total (1027430ms).
[19:52:05.531] <TB1> INFO: 28993950 events read in total (1051238ms).
[19:52:29.404] <TB1> INFO: 29650400 events read in total (1075111ms).
[19:52:53.129] <TB1> INFO: 30306550 events read in total (1098836ms).
[19:53:16.002] <TB1> INFO: 30963150 events read in total (1122710ms).
[19:53:40.535] <TB1> INFO: 31619300 events read in total (1146242ms).
[19:54:04.096] <TB1> INFO: 32276250 events read in total (1169803ms).
[19:54:27.844] <TB1> INFO: 32935150 events read in total (1193551ms).
[19:54:51.840] <TB1> INFO: 33595150 events read in total (1217547ms).
[19:55:15.662] <TB1> INFO: 34255550 events read in total (1241369ms).
[19:55:39.466] <TB1> INFO: 34916000 events read in total (1265173ms).
[19:56:03.064] <TB1> INFO: 35577050 events read in total (1288771ms).
[19:56:26.913] <TB1> INFO: 36244750 events read in total (1312620ms).
[19:56:40.353] <TB1> INFO: 36608000 events read in total (1326060ms).
[19:56:40.486] <TB1> INFO: Test took 1327020ms.
[19:56:40.877] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:42.305] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:44.664] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:47.192] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:49.711] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:52.288] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:54.701] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:57.039] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:58.516] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:56:59.965] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:01.416] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:02.874] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:04.368] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:05.805] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:07.479] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:08.917] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[19:57:10.387] <TB1> INFO: PixTestScurves::scurves() done
[19:57:10.387] <TB1> INFO: Vcal mean: 114.96 103.69 113.59 109.17 109.81 116.45 119.24 116.57 126.86 126.10 121.98 111.95 113.49 112.63 116.15 123.75
[19:57:10.387] <TB1> INFO: Vcal RMS: 5.11 5.28 5.45 4.99 4.54 5.05 5.86 5.52 6.38 6.22 5.98 4.90 4.94 4.49 5.69 5.80
[19:57:10.387] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1356 seconds
[19:57:10.387] <TB1> INFO: Decoding statistics:
[19:57:10.387] <TB1> INFO: General information:
[19:57:10.387] <TB1> INFO: 16bit words read: 0
[19:57:10.387] <TB1> INFO: valid events total: 0
[19:57:10.387] <TB1> INFO: empty events: 0
[19:57:10.387] <TB1> INFO: valid events with pixels: 0
[19:57:10.387] <TB1> INFO: valid pixel hits: 0
[19:57:10.387] <TB1> INFO: Event errors: 0
[19:57:10.387] <TB1> INFO: start marker: 0
[19:57:10.387] <TB1> INFO: stop marker: 0
[19:57:10.387] <TB1> INFO: overflow: 0
[19:57:10.387] <TB1> INFO: invalid 5bit words: 0
[19:57:10.387] <TB1> INFO: invalid XOR eye diagram: 0
[19:57:10.387] <TB1> INFO: frame (failed synchr.): 0
[19:57:10.387] <TB1> INFO: idle data (no TBM trl): 0
[19:57:10.387] <TB1> INFO: no data (only TBM hdr): 0
[19:57:10.387] <TB1> INFO: TBM errors: 0
[19:57:10.387] <TB1> INFO: flawed TBM headers: 0
[19:57:10.387] <TB1> INFO: flawed TBM trailers: 0
[19:57:10.387] <TB1> INFO: event ID mismatches: 0
[19:57:10.387] <TB1> INFO: ROC errors: 0
[19:57:10.387] <TB1> INFO: missing ROC header(s): 0
[19:57:10.387] <TB1> INFO: misplaced readback start: 0
[19:57:10.387] <TB1> INFO: Pixel decoding errors: 0
[19:57:10.387] <TB1> INFO: pixel data incomplete: 0
[19:57:10.387] <TB1> INFO: pixel address: 0
[19:57:10.387] <TB1> INFO: pulse height fill bit: 0
[19:57:10.387] <TB1> INFO: buffer corruption: 0
[19:57:10.460] <TB1> INFO: ######################################################################
[19:57:10.460] <TB1> INFO: PixTestTrim::doTest()
[19:57:10.460] <TB1> INFO: ######################################################################
[19:57:10.461] <TB1> INFO: ----------------------------------------------------------------------
[19:57:10.461] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[19:57:10.461] <TB1> INFO: ----------------------------------------------------------------------
[19:57:10.502] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:57:10.503] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:57:10.516] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[19:57:10.516] <TB1> INFO: run 1 of 1
[19:57:10.751] <TB1> INFO: Expecting 5025280 events.
[19:57:42.118] <TB1> INFO: 827864 events read in total (30764ms).
[19:58:12.000] <TB1> INFO: 1653360 events read in total (61646ms).
[19:58:43.755] <TB1> INFO: 2475128 events read in total (92401ms).
[19:59:14.657] <TB1> INFO: 3291752 events read in total (123303ms).
[19:59:45.716] <TB1> INFO: 4104672 events read in total (154363ms).
[20:00:16.625] <TB1> INFO: 4915304 events read in total (185271ms).
[20:00:20.956] <TB1> INFO: 5025280 events read in total (189602ms).
[20:00:20.005] <TB1> INFO: Test took 190490ms.
[20:00:37.045] <TB1> INFO: ROC 0 VthrComp = 121
[20:00:37.046] <TB1> INFO: ROC 1 VthrComp = 111
[20:00:37.046] <TB1> INFO: ROC 2 VthrComp = 123
[20:00:37.046] <TB1> INFO: ROC 3 VthrComp = 116
[20:00:37.046] <TB1> INFO: ROC 4 VthrComp = 121
[20:00:37.046] <TB1> INFO: ROC 5 VthrComp = 128
[20:00:37.046] <TB1> INFO: ROC 6 VthrComp = 125
[20:00:37.046] <TB1> INFO: ROC 7 VthrComp = 126
[20:00:37.047] <TB1> INFO: ROC 8 VthrComp = 133
[20:00:37.047] <TB1> INFO: ROC 9 VthrComp = 130
[20:00:37.047] <TB1> INFO: ROC 10 VthrComp = 131
[20:00:37.047] <TB1> INFO: ROC 11 VthrComp = 124
[20:00:37.047] <TB1> INFO: ROC 12 VthrComp = 120
[20:00:37.047] <TB1> INFO: ROC 13 VthrComp = 123
[20:00:37.047] <TB1> INFO: ROC 14 VthrComp = 122
[20:00:37.047] <TB1> INFO: ROC 15 VthrComp = 137
[20:00:37.285] <TB1> INFO: Expecting 41600 events.
[20:00:40.930] <TB1> INFO: 41600 events read in total (3053ms).
[20:00:40.931] <TB1> INFO: Test took 3882ms.
[20:00:40.943] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:00:40.943] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:00:40.956] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:00:40.956] <TB1> INFO: run 1 of 1
[20:00:41.234] <TB1> INFO: Expecting 5025280 events.
[20:01:07.970] <TB1> INFO: 589536 events read in total (26144ms).
[20:01:34.312] <TB1> INFO: 1178456 events read in total (52486ms).
[20:02:01.009] <TB1> INFO: 1767448 events read in total (79183ms).
[20:02:27.689] <TB1> INFO: 2356160 events read in total (105863ms).
[20:02:54.737] <TB1> INFO: 2943744 events read in total (132911ms).
[20:03:20.771] <TB1> INFO: 3529744 events read in total (158945ms).
[20:03:47.052] <TB1> INFO: 4115480 events read in total (185226ms).
[20:04:13.701] <TB1> INFO: 4700936 events read in total (211875ms).
[20:04:28.550] <TB1> INFO: 5025280 events read in total (226724ms).
[20:04:28.706] <TB1> INFO: Test took 227750ms.
[20:04:50.448] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 62.3692 for pixel 3/0 mean/min/max = 46.9983/31.5942/62.4024
[20:04:50.448] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 60.8347 for pixel 7/1 mean/min/max = 47.5848/34.2962/60.8733
[20:04:50.449] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 62.1057 for pixel 22/4 mean/min/max = 46.3097/30.2825/62.3369
[20:04:50.449] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.9285 for pixel 16/0 mean/min/max = 46.0364/31.1217/60.9511
[20:04:50.450] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.6589 for pixel 45/2 mean/min/max = 45.8959/33.1235/58.6682
[20:04:50.450] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.2117 for pixel 33/1 mean/min/max = 45.221/31.7037/58.7383
[20:04:50.451] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 61.1193 for pixel 16/5 mean/min/max = 46.1906/31.0537/61.3274
[20:04:50.451] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 61.2431 for pixel 42/14 mean/min/max = 46.0094/30.6605/61.3584
[20:04:50.452] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 63.7063 for pixel 15/8 mean/min/max = 48.2822/32.8177/63.7468
[20:04:50.452] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 61.1643 for pixel 8/12 mean/min/max = 45.9078/30.6093/61.2063
[20:04:50.453] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.7481 for pixel 3/12 mean/min/max = 47.2093/31.616/62.8027
[20:04:50.453] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.6022 for pixel 7/24 mean/min/max = 44.8435/30.7801/58.9069
[20:04:50.453] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.5758 for pixel 18/7 mean/min/max = 46.7065/32.7277/60.6853
[20:04:50.454] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.9583 for pixel 43/17 mean/min/max = 45.5871/32.0405/59.1338
[20:04:50.454] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.8037 for pixel 5/0 mean/min/max = 45.9452/31.8728/60.0176
[20:04:50.455] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 66.1879 for pixel 10/7 mean/min/max = 51.4061/36.2466/66.5657
[20:04:50.455] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:04:50.544] <TB1> INFO: Expecting 411648 events.
[20:05:00.127] <TB1> INFO: 411648 events read in total (8992ms).
[20:05:00.134] <TB1> INFO: Expecting 411648 events.
[20:05:09.574] <TB1> INFO: 411648 events read in total (9037ms).
[20:05:09.585] <TB1> INFO: Expecting 411648 events.
[20:05:19.114] <TB1> INFO: 411648 events read in total (9126ms).
[20:05:19.132] <TB1> INFO: Expecting 411648 events.
[20:05:28.583] <TB1> INFO: 411648 events read in total (9048ms).
[20:05:28.600] <TB1> INFO: Expecting 411648 events.
[20:05:38.086] <TB1> INFO: 411648 events read in total (9083ms).
[20:05:38.105] <TB1> INFO: Expecting 411648 events.
[20:05:47.602] <TB1> INFO: 411648 events read in total (9094ms).
[20:05:47.625] <TB1> INFO: Expecting 411648 events.
[20:05:57.038] <TB1> INFO: 411648 events read in total (9010ms).
[20:05:57.064] <TB1> INFO: Expecting 411648 events.
[20:06:06.499] <TB1> INFO: 411648 events read in total (9032ms).
[20:06:06.528] <TB1> INFO: Expecting 411648 events.
[20:06:16.067] <TB1> INFO: 411648 events read in total (9136ms).
[20:06:16.110] <TB1> INFO: Expecting 411648 events.
[20:06:25.530] <TB1> INFO: 411648 events read in total (9017ms).
[20:06:25.564] <TB1> INFO: Expecting 411648 events.
[20:06:35.024] <TB1> INFO: 411648 events read in total (9056ms).
[20:06:35.063] <TB1> INFO: Expecting 411648 events.
[20:06:44.685] <TB1> INFO: 411648 events read in total (9219ms).
[20:06:44.723] <TB1> INFO: Expecting 411648 events.
[20:06:54.233] <TB1> INFO: 411648 events read in total (9107ms).
[20:06:54.292] <TB1> INFO: Expecting 411648 events.
[20:07:03.666] <TB1> INFO: 411648 events read in total (8971ms).
[20:07:03.719] <TB1> INFO: Expecting 411648 events.
[20:07:13.205] <TB1> INFO: 411648 events read in total (9083ms).
[20:07:13.282] <TB1> INFO: Expecting 411648 events.
[20:07:22.770] <TB1> INFO: 411648 events read in total (9085ms).
[20:07:22.957] <TB1> INFO: Test took 152502ms.
[20:07:23.804] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:07:23.819] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:07:23.819] <TB1> INFO: run 1 of 1
[20:07:24.117] <TB1> INFO: Expecting 5025280 events.
[20:07:51.548] <TB1> INFO: 589896 events read in total (26840ms).
[20:08:18.554] <TB1> INFO: 1176248 events read in total (53846ms).
[20:08:45.494] <TB1> INFO: 1762360 events read in total (80786ms).
[20:09:12.258] <TB1> INFO: 2345648 events read in total (107550ms).
[20:09:39.117] <TB1> INFO: 2928600 events read in total (134409ms).
[20:10:05.693] <TB1> INFO: 3513672 events read in total (160985ms).
[20:10:32.761] <TB1> INFO: 4096568 events read in total (188053ms).
[20:10:59.590] <TB1> INFO: 4677800 events read in total (214882ms).
[20:11:15.736] <TB1> INFO: 5025280 events read in total (231029ms).
[20:11:16.015] <TB1> INFO: Test took 232198ms.
[20:11:38.637] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 1.113427 .. 146.374513
[20:11:38.875] <TB1> INFO: Expecting 208000 events.
[20:11:49.200] <TB1> INFO: 208000 events read in total (9733ms).
[20:11:49.202] <TB1> INFO: Test took 10564ms.
[20:11:49.282] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[20:11:49.299] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:11:49.299] <TB1> INFO: run 1 of 1
[20:11:49.598] <TB1> INFO: Expecting 5191680 events.
[20:12:16.607] <TB1> INFO: 583864 events read in total (26418ms).
[20:12:43.059] <TB1> INFO: 1167552 events read in total (52870ms).
[20:13:09.673] <TB1> INFO: 1751768 events read in total (79484ms).
[20:13:36.132] <TB1> INFO: 2335016 events read in total (105943ms).
[20:14:02.794] <TB1> INFO: 2918576 events read in total (132605ms).
[20:14:29.387] <TB1> INFO: 3501416 events read in total (159198ms).
[20:14:55.927] <TB1> INFO: 4084488 events read in total (185738ms).
[20:15:22.211] <TB1> INFO: 4666680 events read in total (212022ms).
[20:15:46.269] <TB1> INFO: 5191680 events read in total (236080ms).
[20:15:46.359] <TB1> INFO: Test took 237061ms.
[20:16:08.827] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.353199 .. 46.582601
[20:16:09.063] <TB1> INFO: Expecting 208000 events.
[20:16:19.487] <TB1> INFO: 208000 events read in total (9832ms).
[20:16:19.488] <TB1> INFO: Test took 10660ms.
[20:16:19.537] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[20:16:19.550] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:16:19.550] <TB1> INFO: run 1 of 1
[20:16:19.828] <TB1> INFO: Expecting 1331200 events.
[20:16:48.882] <TB1> INFO: 654976 events read in total (28462ms).
[20:17:17.806] <TB1> INFO: 1307360 events read in total (57386ms).
[20:17:19.290] <TB1> INFO: 1331200 events read in total (58870ms).
[20:17:19.319] <TB1> INFO: Test took 59769ms.
[20:17:31.168] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 25.475388 .. 46.998737
[20:17:31.406] <TB1> INFO: Expecting 208000 events.
[20:17:41.342] <TB1> INFO: 208000 events read in total (9344ms).
[20:17:41.343] <TB1> INFO: Test took 10173ms.
[20:17:41.390] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[20:17:41.403] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:17:41.403] <TB1> INFO: run 1 of 1
[20:17:41.681] <TB1> INFO: Expecting 1397760 events.
[20:18:10.292] <TB1> INFO: 663160 events read in total (28019ms).
[20:18:38.515] <TB1> INFO: 1325848 events read in total (56243ms).
[20:18:41.970] <TB1> INFO: 1397760 events read in total (59697ms).
[20:18:41.998] <TB1> INFO: Test took 60594ms.
[20:18:54.238] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 24.707473 .. 44.574548
[20:18:54.476] <TB1> INFO: Expecting 208000 events.
[20:19:04.485] <TB1> INFO: 208000 events read in total (9417ms).
[20:19:04.486] <TB1> INFO: Test took 10247ms.
[20:19:04.534] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 54 (-1/-1) hits flags = 528 (plus default)
[20:19:04.549] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:19:04.549] <TB1> INFO: run 1 of 1
[20:19:04.827] <TB1> INFO: Expecting 1364480 events.
[20:19:34.497] <TB1> INFO: 676192 events read in total (29079ms).
[20:20:03.034] <TB1> INFO: 1350896 events read in total (57616ms).
[20:20:04.030] <TB1> INFO: 1364480 events read in total (58613ms).
[20:20:04.067] <TB1> INFO: Test took 59518ms.
[20:20:15.756] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[20:20:15.756] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[20:20:15.770] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[20:20:15.770] <TB1> INFO: run 1 of 1
[20:20:16.007] <TB1> INFO: Expecting 1364480 events.
[20:20:44.855] <TB1> INFO: 667352 events read in total (28257ms).
[20:21:13.430] <TB1> INFO: 1335176 events read in total (56832ms).
[20:21:15.160] <TB1> INFO: 1364480 events read in total (58562ms).
[20:21:15.188] <TB1> INFO: Test took 59418ms.
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C0.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C1.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C2.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C3.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C4.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C5.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C6.dat
[20:21:27.899] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C7.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C8.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C9.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C10.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C11.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C12.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C13.dat
[20:21:27.900] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C14.dat
[20:21:27.901] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C15.dat
[20:21:27.901] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C0.dat
[20:21:27.910] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C1.dat
[20:21:27.917] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C2.dat
[20:21:27.924] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C3.dat
[20:21:27.930] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C4.dat
[20:21:27.935] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C5.dat
[20:21:27.940] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C6.dat
[20:21:27.944] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C7.dat
[20:21:27.949] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C8.dat
[20:21:27.954] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C9.dat
[20:21:27.958] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C10.dat
[20:21:27.963] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C11.dat
[20:21:27.968] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C12.dat
[20:21:27.975] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C13.dat
[20:21:27.981] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C14.dat
[20:21:27.986] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//trimParameters35_C15.dat
[20:21:27.990] <TB1> INFO: PixTestTrim::trimTest() done
[20:21:27.991] <TB1> INFO: vtrim: 122 139 139 136 134 132 142 151 148 141 131 121 136 130 125 177
[20:21:27.991] <TB1> INFO: vthrcomp: 121 111 123 116 121 128 125 126 133 130 131 124 120 123 122 137
[20:21:27.991] <TB1> INFO: vcal mean: 35.09 35.06 34.99 35.05 35.06 34.97 35.01 34.99 35.09 35.03 35.05 34.98 35.04 34.98 35.00 35.20
[20:21:27.991] <TB1> INFO: vcal RMS: 1.14 1.09 1.06 1.00 1.02 1.03 1.15 1.13 1.17 1.11 1.09 1.04 1.02 1.05 1.03 1.27
[20:21:27.991] <TB1> INFO: bits mean: 9.52 8.81 9.92 9.56 9.80 9.80 9.81 10.05 9.27 9.96 9.22 9.68 9.03 9.82 9.61 8.60
[20:21:27.991] <TB1> INFO: bits RMS: 2.73 2.62 2.65 2.83 2.49 2.67 2.66 2.63 2.58 2.65 2.79 2.89 2.82 2.61 2.71 2.25
[20:21:27.998] <TB1> INFO: ----------------------------------------------------------------------
[20:21:27.998] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:21:27.998] <TB1> INFO: ----------------------------------------------------------------------
[20:21:27.000] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:21:28.013] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:21:28.013] <TB1> INFO: run 1 of 1
[20:21:28.249] <TB1> INFO: Expecting 4160000 events.
[20:22:01.921] <TB1> INFO: 748930 events read in total (33081ms).
[20:22:34.585] <TB1> INFO: 1494250 events read in total (65745ms).
[20:23:07.814] <TB1> INFO: 2237775 events read in total (98974ms).
[20:23:41.007] <TB1> INFO: 2976855 events read in total (132167ms).
[20:24:13.483] <TB1> INFO: 3712315 events read in total (164643ms).
[20:24:33.254] <TB1> INFO: 4160000 events read in total (184414ms).
[20:24:33.370] <TB1> INFO: Test took 185357ms.
[20:24:56.241] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[20:24:56.255] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:24:56.255] <TB1> INFO: run 1 of 1
[20:24:56.493] <TB1> INFO: Expecting 4305600 events.
[20:25:29.697] <TB1> INFO: 715050 events read in total (32612ms).
[20:26:01.987] <TB1> INFO: 1428510 events read in total (64902ms).
[20:26:34.783] <TB1> INFO: 2139650 events read in total (97698ms).
[20:27:07.284] <TB1> INFO: 2848725 events read in total (130199ms).
[20:27:39.450] <TB1> INFO: 3554060 events read in total (162365ms).
[20:28:11.180] <TB1> INFO: 4261640 events read in total (194095ms).
[20:28:13.576] <TB1> INFO: 4305600 events read in total (196491ms).
[20:28:13.712] <TB1> INFO: Test took 197456ms.
[20:28:38.956] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[20:28:38.971] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:28:38.971] <TB1> INFO: run 1 of 1
[20:28:39.208] <TB1> INFO: Expecting 4097600 events.
[20:29:12.380] <TB1> INFO: 728455 events read in total (32580ms).
[20:29:44.800] <TB1> INFO: 1454840 events read in total (65000ms).
[20:30:17.535] <TB1> INFO: 2178720 events read in total (97735ms).
[20:30:49.746] <TB1> INFO: 2899905 events read in total (129946ms).
[20:31:22.027] <TB1> INFO: 3616895 events read in total (162227ms).
[20:31:43.268] <TB1> INFO: 4097600 events read in total (183468ms).
[20:31:43.412] <TB1> INFO: Test took 184441ms.
[20:32:06.302] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[20:32:06.315] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:32:06.316] <TB1> INFO: run 1 of 1
[20:32:06.558] <TB1> INFO: Expecting 4076800 events.
[20:32:39.776] <TB1> INFO: 730455 events read in total (32626ms).
[20:33:12.069] <TB1> INFO: 1458130 events read in total (64919ms).
[20:33:44.226] <TB1> INFO: 2183765 events read in total (97076ms).
[20:34:17.087] <TB1> INFO: 2906510 events read in total (129937ms).
[20:34:49.078] <TB1> INFO: 3624830 events read in total (161928ms).
[20:35:09.262] <TB1> INFO: 4076800 events read in total (182112ms).
[20:35:09.337] <TB1> INFO: Test took 183021ms.
[20:35:32.704] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[20:35:32.717] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[20:35:32.717] <TB1> INFO: run 1 of 1
[20:35:32.953] <TB1> INFO: Expecting 4118400 events.
[20:36:05.813] <TB1> INFO: 727520 events read in total (32269ms).
[20:36:38.157] <TB1> INFO: 1452195 events read in total (64613ms).
[20:37:10.608] <TB1> INFO: 2175090 events read in total (97064ms).
[20:37:43.472] <TB1> INFO: 2894435 events read in total (129928ms).
[20:38:16.205] <TB1> INFO: 3610235 events read in total (162661ms).
[20:38:39.451] <TB1> INFO: 4118400 events read in total (185907ms).
[20:38:39.560] <TB1> INFO: Test took 186843ms.
[20:39:02.122] <TB1> INFO: PixTestTrim::trimBitTest() done
[20:39:02.123] <TB1> INFO: PixTestTrim::doTest() done, duration: 2511 seconds
[20:39:02.123] <TB1> INFO: Decoding statistics:
[20:39:02.123] <TB1> INFO: General information:
[20:39:02.123] <TB1> INFO: 16bit words read: 0
[20:39:02.123] <TB1> INFO: valid events total: 0
[20:39:02.123] <TB1> INFO: empty events: 0
[20:39:02.123] <TB1> INFO: valid events with pixels: 0
[20:39:02.123] <TB1> INFO: valid pixel hits: 0
[20:39:02.123] <TB1> INFO: Event errors: 0
[20:39:02.123] <TB1> INFO: start marker: 0
[20:39:02.123] <TB1> INFO: stop marker: 0
[20:39:02.123] <TB1> INFO: overflow: 0
[20:39:02.123] <TB1> INFO: invalid 5bit words: 0
[20:39:02.123] <TB1> INFO: invalid XOR eye diagram: 0
[20:39:02.123] <TB1> INFO: frame (failed synchr.): 0
[20:39:02.123] <TB1> INFO: idle data (no TBM trl): 0
[20:39:02.123] <TB1> INFO: no data (only TBM hdr): 0
[20:39:02.123] <TB1> INFO: TBM errors: 0
[20:39:02.123] <TB1> INFO: flawed TBM headers: 0
[20:39:02.123] <TB1> INFO: flawed TBM trailers: 0
[20:39:02.123] <TB1> INFO: event ID mismatches: 0
[20:39:02.123] <TB1> INFO: ROC errors: 0
[20:39:02.123] <TB1> INFO: missing ROC header(s): 0
[20:39:02.123] <TB1> INFO: misplaced readback start: 0
[20:39:02.123] <TB1> INFO: Pixel decoding errors: 0
[20:39:02.123] <TB1> INFO: pixel data incomplete: 0
[20:39:02.123] <TB1> INFO: pixel address: 0
[20:39:02.123] <TB1> INFO: pulse height fill bit: 0
[20:39:02.123] <TB1> INFO: buffer corruption: 0
[20:39:02.725] <TB1> INFO: ######################################################################
[20:39:02.725] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:39:02.725] <TB1> INFO: ######################################################################
[20:39:02.963] <TB1> INFO: Expecting 41600 events.
[20:39:06.437] <TB1> INFO: 41600 events read in total (2882ms).
[20:39:06.438] <TB1> INFO: Test took 3712ms.
[20:39:06.953] <TB1> INFO: Expecting 41600 events.
[20:39:10.605] <TB1> INFO: 41600 events read in total (3060ms).
[20:39:10.606] <TB1> INFO: Test took 3966ms.
[20:39:10.923] <TB1> INFO: Expecting 41600 events.
[20:39:14.653] <TB1> INFO: 41600 events read in total (3138ms).
[20:39:14.654] <TB1> INFO: Test took 4024ms.
[20:39:14.943] <TB1> INFO: Expecting 41600 events.
[20:39:18.490] <TB1> INFO: 41600 events read in total (2955ms).
[20:39:18.491] <TB1> INFO: Test took 3813ms.
[20:39:18.780] <TB1> INFO: Expecting 41600 events.
[20:39:22.290] <TB1> INFO: 41600 events read in total (2918ms).
[20:39:22.290] <TB1> INFO: Test took 3775ms.
[20:39:22.583] <TB1> INFO: Expecting 41600 events.
[20:39:26.205] <TB1> INFO: 41600 events read in total (3030ms).
[20:39:26.206] <TB1> INFO: Test took 3888ms.
[20:39:26.496] <TB1> INFO: Expecting 41600 events.
[20:39:30.099] <TB1> INFO: 41600 events read in total (3012ms).
[20:39:30.100] <TB1> INFO: Test took 3869ms.
[20:39:30.393] <TB1> INFO: Expecting 41600 events.
[20:39:34.034] <TB1> INFO: 41600 events read in total (3049ms).
[20:39:34.034] <TB1> INFO: Test took 3906ms.
[20:39:34.324] <TB1> INFO: Expecting 41600 events.
[20:39:37.895] <TB1> INFO: 41600 events read in total (2980ms).
[20:39:37.896] <TB1> INFO: Test took 3837ms.
[20:39:38.189] <TB1> INFO: Expecting 41600 events.
[20:39:41.824] <TB1> INFO: 41600 events read in total (3044ms).
[20:39:41.825] <TB1> INFO: Test took 3901ms.
[20:39:42.114] <TB1> INFO: Expecting 41600 events.
[20:39:45.790] <TB1> INFO: 41600 events read in total (3084ms).
[20:39:45.791] <TB1> INFO: Test took 3942ms.
[20:39:46.080] <TB1> INFO: Expecting 41600 events.
[20:39:49.948] <TB1> INFO: 41600 events read in total (3277ms).
[20:39:49.949] <TB1> INFO: Test took 4134ms.
[20:39:50.238] <TB1> INFO: Expecting 41600 events.
[20:39:53.832] <TB1> INFO: 41600 events read in total (3002ms).
[20:39:53.833] <TB1> INFO: Test took 3860ms.
[20:39:54.154] <TB1> INFO: Expecting 41600 events.
[20:39:57.737] <TB1> INFO: 41600 events read in total (2991ms).
[20:39:57.738] <TB1> INFO: Test took 3881ms.
[20:39:58.027] <TB1> INFO: Expecting 41600 events.
[20:40:01.623] <TB1> INFO: 41600 events read in total (3004ms).
[20:40:01.625] <TB1> INFO: Test took 3863ms.
[20:40:01.913] <TB1> INFO: Expecting 41600 events.
[20:40:05.523] <TB1> INFO: 41600 events read in total (3018ms).
[20:40:05.524] <TB1> INFO: Test took 3876ms.
[20:40:05.820] <TB1> INFO: Expecting 41600 events.
[20:40:09.473] <TB1> INFO: 41600 events read in total (3062ms).
[20:40:09.474] <TB1> INFO: Test took 3919ms.
[20:40:09.780] <TB1> INFO: Expecting 41600 events.
[20:40:13.333] <TB1> INFO: 41600 events read in total (2961ms).
[20:40:13.334] <TB1> INFO: Test took 3836ms.
[20:40:13.656] <TB1> INFO: Expecting 41600 events.
[20:40:17.319] <TB1> INFO: 41600 events read in total (3072ms).
[20:40:17.320] <TB1> INFO: Test took 3958ms.
[20:40:17.609] <TB1> INFO: Expecting 41600 events.
[20:40:21.272] <TB1> INFO: 41600 events read in total (3071ms).
[20:40:21.273] <TB1> INFO: Test took 3929ms.
[20:40:21.565] <TB1> INFO: Expecting 41600 events.
[20:40:25.096] <TB1> INFO: 41600 events read in total (2939ms).
[20:40:25.097] <TB1> INFO: Test took 3797ms.
[20:40:25.386] <TB1> INFO: Expecting 41600 events.
[20:40:29.060] <TB1> INFO: 41600 events read in total (3082ms).
[20:40:29.061] <TB1> INFO: Test took 3940ms.
[20:40:29.381] <TB1> INFO: Expecting 41600 events.
[20:40:33.089] <TB1> INFO: 41600 events read in total (3116ms).
[20:40:33.090] <TB1> INFO: Test took 4005ms.
[20:40:33.413] <TB1> INFO: Expecting 41600 events.
[20:40:37.139] <TB1> INFO: 41600 events read in total (3135ms).
[20:40:37.140] <TB1> INFO: Test took 4024ms.
[20:40:37.432] <TB1> INFO: Expecting 41600 events.
[20:40:41.032] <TB1> INFO: 41600 events read in total (3009ms).
[20:40:41.033] <TB1> INFO: Test took 3866ms.
[20:40:41.358] <TB1> INFO: Expecting 41600 events.
[20:40:45.015] <TB1> INFO: 41600 events read in total (3065ms).
[20:40:45.016] <TB1> INFO: Test took 3955ms.
[20:40:45.304] <TB1> INFO: Expecting 41600 events.
[20:40:48.880] <TB1> INFO: 41600 events read in total (2984ms).
[20:40:48.881] <TB1> INFO: Test took 3842ms.
[20:40:49.170] <TB1> INFO: Expecting 41600 events.
[20:40:52.816] <TB1> INFO: 41600 events read in total (3054ms).
[20:40:52.817] <TB1> INFO: Test took 3912ms.
[20:40:53.106] <TB1> INFO: Expecting 41600 events.
[20:40:56.673] <TB1> INFO: 41600 events read in total (2975ms).
[20:40:56.674] <TB1> INFO: Test took 3833ms.
[20:40:56.963] <TB1> INFO: Expecting 41600 events.
[20:41:00.604] <TB1> INFO: 41600 events read in total (3049ms).
[20:41:00.605] <TB1> INFO: Test took 3907ms.
[20:41:00.900] <TB1> INFO: Expecting 41600 events.
[20:41:04.587] <TB1> INFO: 41600 events read in total (3095ms).
[20:41:04.588] <TB1> INFO: Test took 3953ms.
[20:41:04.877] <TB1> INFO: Expecting 41600 events.
[20:41:08.645] <TB1> INFO: 41600 events read in total (3175ms).
[20:41:08.646] <TB1> INFO: Test took 4034ms.
[20:41:08.966] <TB1> INFO: Expecting 41600 events.
[20:41:12.624] <TB1> INFO: 41600 events read in total (3066ms).
[20:41:12.625] <TB1> INFO: Test took 3955ms.
[20:41:12.916] <TB1> INFO: Expecting 41600 events.
[20:41:16.590] <TB1> INFO: 41600 events read in total (3082ms).
[20:41:16.591] <TB1> INFO: Test took 3940ms.
[20:41:16.881] <TB1> INFO: Expecting 41600 events.
[20:41:20.462] <TB1> INFO: 41600 events read in total (2990ms).
[20:41:20.463] <TB1> INFO: Test took 3847ms.
[20:41:20.752] <TB1> INFO: Expecting 41600 events.
[20:41:24.311] <TB1> INFO: 41600 events read in total (2967ms).
[20:41:24.312] <TB1> INFO: Test took 3825ms.
[20:41:24.602] <TB1> INFO: Expecting 41600 events.
[20:41:28.130] <TB1> INFO: 41600 events read in total (2936ms).
[20:41:28.130] <TB1> INFO: Test took 3794ms.
[20:41:28.420] <TB1> INFO: Expecting 41600 events.
[20:41:31.991] <TB1> INFO: 41600 events read in total (2980ms).
[20:41:31.991] <TB1> INFO: Test took 3836ms.
[20:41:32.281] <TB1> INFO: Expecting 41600 events.
[20:41:35.971] <TB1> INFO: 41600 events read in total (3098ms).
[20:41:35.972] <TB1> INFO: Test took 3956ms.
[20:41:36.264] <TB1> INFO: Expecting 41600 events.
[20:41:39.842] <TB1> INFO: 41600 events read in total (2986ms).
[20:41:39.843] <TB1> INFO: Test took 3847ms.
[20:41:40.135] <TB1> INFO: Expecting 41600 events.
[20:41:43.714] <TB1> INFO: 41600 events read in total (2987ms).
[20:41:43.715] <TB1> INFO: Test took 3844ms.
[20:41:44.004] <TB1> INFO: Expecting 41600 events.
[20:41:47.701] <TB1> INFO: 41600 events read in total (3105ms).
[20:41:47.702] <TB1> INFO: Test took 3963ms.
[20:41:47.991] <TB1> INFO: Expecting 41600 events.
[20:41:51.678] <TB1> INFO: 41600 events read in total (3095ms).
[20:41:51.678] <TB1> INFO: Test took 3952ms.
[20:41:51.968] <TB1> INFO: Expecting 41600 events.
[20:41:55.634] <TB1> INFO: 41600 events read in total (3074ms).
[20:41:55.635] <TB1> INFO: Test took 3932ms.
[20:41:55.924] <TB1> INFO: Expecting 41600 events.
[20:41:59.608] <TB1> INFO: 41600 events read in total (3092ms).
[20:41:59.609] <TB1> INFO: Test took 3950ms.
[20:41:59.939] <TB1> INFO: Expecting 41600 events.
[20:42:03.513] <TB1> INFO: 41600 events read in total (2983ms).
[20:42:03.514] <TB1> INFO: Test took 3877ms.
[20:42:03.804] <TB1> INFO: Expecting 41600 events.
[20:42:07.626] <TB1> INFO: 41600 events read in total (3231ms).
[20:42:07.627] <TB1> INFO: Test took 4089ms.
[20:42:07.920] <TB1> INFO: Expecting 41600 events.
[20:42:11.474] <TB1> INFO: 41600 events read in total (2962ms).
[20:42:11.475] <TB1> INFO: Test took 3820ms.
[20:42:11.764] <TB1> INFO: Expecting 41600 events.
[20:42:15.433] <TB1> INFO: 41600 events read in total (3077ms).
[20:42:15.434] <TB1> INFO: Test took 3935ms.
[20:42:15.723] <TB1> INFO: Expecting 41600 events.
[20:42:19.468] <TB1> INFO: 41600 events read in total (3153ms).
[20:42:19.469] <TB1> INFO: Test took 4011ms.
[20:42:19.761] <TB1> INFO: Expecting 41600 events.
[20:42:23.287] <TB1> INFO: 41600 events read in total (2934ms).
[20:42:23.288] <TB1> INFO: Test took 3791ms.
[20:42:23.610] <TB1> INFO: Expecting 41600 events.
[20:42:27.186] <TB1> INFO: 41600 events read in total (2984ms).
[20:42:27.187] <TB1> INFO: Test took 3875ms.
[20:42:27.480] <TB1> INFO: Expecting 41600 events.
[20:42:31.040] <TB1> INFO: 41600 events read in total (2968ms).
[20:42:31.040] <TB1> INFO: Test took 3825ms.
[20:42:31.331] <TB1> INFO: Expecting 41600 events.
[20:42:34.986] <TB1> INFO: 41600 events read in total (3063ms).
[20:42:34.987] <TB1> INFO: Test took 3921ms.
[20:42:35.280] <TB1> INFO: Expecting 2560 events.
[20:42:36.170] <TB1> INFO: 2560 events read in total (298ms).
[20:42:36.171] <TB1> INFO: Test took 1168ms.
[20:42:36.478] <TB1> INFO: Expecting 2560 events.
[20:42:37.372] <TB1> INFO: 2560 events read in total (302ms).
[20:42:37.372] <TB1> INFO: Test took 1201ms.
[20:42:37.680] <TB1> INFO: Expecting 2560 events.
[20:42:38.570] <TB1> INFO: 2560 events read in total (298ms).
[20:42:38.570] <TB1> INFO: Test took 1197ms.
[20:42:38.878] <TB1> INFO: Expecting 2560 events.
[20:42:39.762] <TB1> INFO: 2560 events read in total (293ms).
[20:42:39.763] <TB1> INFO: Test took 1193ms.
[20:42:40.071] <TB1> INFO: Expecting 2560 events.
[20:42:40.954] <TB1> INFO: 2560 events read in total (292ms).
[20:42:40.955] <TB1> INFO: Test took 1192ms.
[20:42:41.263] <TB1> INFO: Expecting 2560 events.
[20:42:42.147] <TB1> INFO: 2560 events read in total (293ms).
[20:42:42.147] <TB1> INFO: Test took 1192ms.
[20:42:42.455] <TB1> INFO: Expecting 2560 events.
[20:42:43.337] <TB1> INFO: 2560 events read in total (291ms).
[20:42:43.337] <TB1> INFO: Test took 1190ms.
[20:42:43.645] <TB1> INFO: Expecting 2560 events.
[20:42:44.526] <TB1> INFO: 2560 events read in total (289ms).
[20:42:44.527] <TB1> INFO: Test took 1190ms.
[20:42:44.834] <TB1> INFO: Expecting 2560 events.
[20:42:45.724] <TB1> INFO: 2560 events read in total (298ms).
[20:42:45.724] <TB1> INFO: Test took 1197ms.
[20:42:46.032] <TB1> INFO: Expecting 2560 events.
[20:42:46.914] <TB1> INFO: 2560 events read in total (290ms).
[20:42:46.914] <TB1> INFO: Test took 1189ms.
[20:42:47.222] <TB1> INFO: Expecting 2560 events.
[20:42:48.112] <TB1> INFO: 2560 events read in total (299ms).
[20:42:48.112] <TB1> INFO: Test took 1197ms.
[20:42:48.420] <TB1> INFO: Expecting 2560 events.
[20:42:49.305] <TB1> INFO: 2560 events read in total (293ms).
[20:42:49.305] <TB1> INFO: Test took 1192ms.
[20:42:49.613] <TB1> INFO: Expecting 2560 events.
[20:42:50.501] <TB1> INFO: 2560 events read in total (297ms).
[20:42:50.501] <TB1> INFO: Test took 1195ms.
[20:42:50.809] <TB1> INFO: Expecting 2560 events.
[20:42:51.698] <TB1> INFO: 2560 events read in total (298ms).
[20:42:51.698] <TB1> INFO: Test took 1196ms.
[20:42:52.006] <TB1> INFO: Expecting 2560 events.
[20:42:52.897] <TB1> INFO: 2560 events read in total (300ms).
[20:42:52.898] <TB1> INFO: Test took 1199ms.
[20:42:53.204] <TB1> INFO: Expecting 2560 events.
[20:42:54.087] <TB1> INFO: 2560 events read in total (291ms).
[20:42:54.087] <TB1> INFO: Test took 1189ms.
[20:42:54.396] <TB1> INFO: Expecting 655360 events.
[20:43:15.643] <TB1> INFO: 531260 events read in total (20656ms).
[20:43:20.715] <TB1> INFO: 655360 events read in total (25728ms).
[20:43:20.731] <TB1> INFO: Test took 26641ms.
[20:43:20.760] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:43:21.021] <TB1> INFO: Expecting 655360 events.
[20:43:35.929] <TB1> INFO: 655360 events read in total (14317ms).
[20:43:35.944] <TB1> INFO: Expecting 655360 events.
[20:43:50.521] <TB1> INFO: 655360 events read in total (14174ms).
[20:43:50.545] <TB1> INFO: Expecting 655360 events.
[20:44:05.348] <TB1> INFO: 655360 events read in total (14400ms).
[20:44:05.371] <TB1> INFO: Expecting 655360 events.
[20:44:20.057] <TB1> INFO: 655360 events read in total (14283ms).
[20:44:20.084] <TB1> INFO: Expecting 655360 events.
[20:44:35.044] <TB1> INFO: 655360 events read in total (14557ms).
[20:44:35.088] <TB1> INFO: Expecting 655360 events.
[20:44:49.754] <TB1> INFO: 655360 events read in total (14262ms).
[20:44:49.789] <TB1> INFO: Expecting 655360 events.
[20:45:04.494] <TB1> INFO: 655360 events read in total (14302ms).
[20:45:04.534] <TB1> INFO: Expecting 655360 events.
[20:45:19.300] <TB1> INFO: 655360 events read in total (14363ms).
[20:45:19.350] <TB1> INFO: Expecting 655360 events.
[20:45:34.280] <TB1> INFO: 655360 events read in total (14527ms).
[20:45:34.343] <TB1> INFO: Expecting 655360 events.
[20:45:49.061] <TB1> INFO: 655360 events read in total (14315ms).
[20:45:49.142] <TB1> INFO: Expecting 655360 events.
[20:46:03.906] <TB1> INFO: 655360 events read in total (14361ms).
[20:46:04.012] <TB1> INFO: Expecting 655360 events.
[20:46:18.722] <TB1> INFO: 655360 events read in total (14307ms).
[20:46:18.846] <TB1> INFO: Expecting 655360 events.
[20:46:33.977] <TB1> INFO: 655360 events read in total (14728ms).
[20:46:34.059] <TB1> INFO: Expecting 655360 events.
[20:46:48.687] <TB1> INFO: 655360 events read in total (14225ms).
[20:46:48.823] <TB1> INFO: Expecting 655360 events.
[20:47:03.506] <TB1> INFO: 655360 events read in total (14280ms).
[20:47:03.601] <TB1> INFO: Expecting 655360 events.
[20:47:18.203] <TB1> INFO: 655360 events read in total (14199ms).
[20:47:18.309] <TB1> INFO: Test took 237549ms.
[20:47:18.490] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.496] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:47:18.502] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:47:18.508] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:47:18.515] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.521] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:47:18.528] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:47:18.535] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:47:18.542] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[20:47:18.549] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[20:47:18.556] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[20:47:18.563] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[20:47:18.569] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.577] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.586] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.594] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:47:18.602] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:47:18.609] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:47:18.615] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[20:47:18.620] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.626] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.632] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.639] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.645] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.651] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:47:18.657] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[20:47:18.664] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[20:47:18.671] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.677] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.684] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.690] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.697] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.703] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[20:47:18.710] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C0.dat
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C1.dat
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C2.dat
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C3.dat
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C4.dat
[20:47:18.746] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C5.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C6.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C7.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C8.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C9.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C10.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C11.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C12.dat
[20:47:18.747] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C13.dat
[20:47:18.748] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C14.dat
[20:47:18.748] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//dacParameters35_C15.dat
[20:47:18.986] <TB1> INFO: Expecting 41600 events.
[20:47:22.181] <TB1> INFO: 41600 events read in total (2603ms).
[20:47:22.182] <TB1> INFO: Test took 3432ms.
[20:47:22.636] <TB1> INFO: Expecting 41600 events.
[20:47:25.760] <TB1> INFO: 41600 events read in total (2532ms).
[20:47:25.761] <TB1> INFO: Test took 3368ms.
[20:47:26.275] <TB1> INFO: Expecting 41600 events.
[20:47:29.420] <TB1> INFO: 41600 events read in total (2553ms).
[20:47:29.421] <TB1> INFO: Test took 3447ms.
[20:47:29.646] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:29.735] <TB1> INFO: Expecting 2560 events.
[20:47:30.624] <TB1> INFO: 2560 events read in total (297ms).
[20:47:30.624] <TB1> INFO: Test took 978ms.
[20:47:30.627] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:30.932] <TB1> INFO: Expecting 2560 events.
[20:47:31.819] <TB1> INFO: 2560 events read in total (296ms).
[20:47:31.819] <TB1> INFO: Test took 1192ms.
[20:47:31.822] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:32.128] <TB1> INFO: Expecting 2560 events.
[20:47:33.021] <TB1> INFO: 2560 events read in total (301ms).
[20:47:33.021] <TB1> INFO: Test took 1199ms.
[20:47:33.024] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:33.329] <TB1> INFO: Expecting 2560 events.
[20:47:34.217] <TB1> INFO: 2560 events read in total (296ms).
[20:47:34.217] <TB1> INFO: Test took 1193ms.
[20:47:34.219] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:34.525] <TB1> INFO: Expecting 2560 events.
[20:47:35.414] <TB1> INFO: 2560 events read in total (297ms).
[20:47:35.414] <TB1> INFO: Test took 1195ms.
[20:47:35.417] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:35.722] <TB1> INFO: Expecting 2560 events.
[20:47:36.613] <TB1> INFO: 2560 events read in total (299ms).
[20:47:36.614] <TB1> INFO: Test took 1198ms.
[20:47:36.616] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:36.921] <TB1> INFO: Expecting 2560 events.
[20:47:37.816] <TB1> INFO: 2560 events read in total (303ms).
[20:47:37.817] <TB1> INFO: Test took 1201ms.
[20:47:37.819] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:38.125] <TB1> INFO: Expecting 2560 events.
[20:47:39.014] <TB1> INFO: 2560 events read in total (298ms).
[20:47:39.014] <TB1> INFO: Test took 1195ms.
[20:47:39.016] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:39.323] <TB1> INFO: Expecting 2560 events.
[20:47:40.214] <TB1> INFO: 2560 events read in total (299ms).
[20:47:40.214] <TB1> INFO: Test took 1198ms.
[20:47:40.216] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:40.523] <TB1> INFO: Expecting 2560 events.
[20:47:41.412] <TB1> INFO: 2560 events read in total (297ms).
[20:47:41.413] <TB1> INFO: Test took 1197ms.
[20:47:41.416] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:41.720] <TB1> INFO: Expecting 2560 events.
[20:47:42.600] <TB1> INFO: 2560 events read in total (288ms).
[20:47:42.601] <TB1> INFO: Test took 1185ms.
[20:47:42.603] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:42.909] <TB1> INFO: Expecting 2560 events.
[20:47:43.789] <TB1> INFO: 2560 events read in total (288ms).
[20:47:43.789] <TB1> INFO: Test took 1186ms.
[20:47:43.791] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:44.098] <TB1> INFO: Expecting 2560 events.
[20:47:44.984] <TB1> INFO: 2560 events read in total (294ms).
[20:47:44.985] <TB1> INFO: Test took 1194ms.
[20:47:44.988] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:45.293] <TB1> INFO: Expecting 2560 events.
[20:47:46.178] <TB1> INFO: 2560 events read in total (293ms).
[20:47:46.179] <TB1> INFO: Test took 1191ms.
[20:47:46.181] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:46.487] <TB1> INFO: Expecting 2560 events.
[20:47:47.371] <TB1> INFO: 2560 events read in total (293ms).
[20:47:47.371] <TB1> INFO: Test took 1190ms.
[20:47:47.374] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:47.680] <TB1> INFO: Expecting 2560 events.
[20:47:48.559] <TB1> INFO: 2560 events read in total (287ms).
[20:47:48.559] <TB1> INFO: Test took 1186ms.
[20:47:48.562] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:48.868] <TB1> INFO: Expecting 2560 events.
[20:47:49.758] <TB1> INFO: 2560 events read in total (298ms).
[20:47:49.758] <TB1> INFO: Test took 1196ms.
[20:47:49.760] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:50.066] <TB1> INFO: Expecting 2560 events.
[20:47:50.956] <TB1> INFO: 2560 events read in total (298ms).
[20:47:50.957] <TB1> INFO: Test took 1197ms.
[20:47:50.959] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:51.265] <TB1> INFO: Expecting 2560 events.
[20:47:52.151] <TB1> INFO: 2560 events read in total (295ms).
[20:47:52.151] <TB1> INFO: Test took 1192ms.
[20:47:52.154] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:52.459] <TB1> INFO: Expecting 2560 events.
[20:47:53.339] <TB1> INFO: 2560 events read in total (288ms).
[20:47:53.339] <TB1> INFO: Test took 1185ms.
[20:47:53.341] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:53.648] <TB1> INFO: Expecting 2560 events.
[20:47:54.533] <TB1> INFO: 2560 events read in total (293ms).
[20:47:54.534] <TB1> INFO: Test took 1193ms.
[20:47:54.536] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:54.842] <TB1> INFO: Expecting 2560 events.
[20:47:55.732] <TB1> INFO: 2560 events read in total (298ms).
[20:47:55.732] <TB1> INFO: Test took 1196ms.
[20:47:55.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:56.041] <TB1> INFO: Expecting 2560 events.
[20:47:56.925] <TB1> INFO: 2560 events read in total (292ms).
[20:47:56.925] <TB1> INFO: Test took 1190ms.
[20:47:56.928] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:57.233] <TB1> INFO: Expecting 2560 events.
[20:47:58.123] <TB1> INFO: 2560 events read in total (298ms).
[20:47:58.123] <TB1> INFO: Test took 1195ms.
[20:47:58.126] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:58.431] <TB1> INFO: Expecting 2560 events.
[20:47:59.323] <TB1> INFO: 2560 events read in total (300ms).
[20:47:59.323] <TB1> INFO: Test took 1198ms.
[20:47:59.326] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:47:59.632] <TB1> INFO: Expecting 2560 events.
[20:48:00.520] <TB1> INFO: 2560 events read in total (297ms).
[20:48:00.520] <TB1> INFO: Test took 1195ms.
[20:48:00.522] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:00.828] <TB1> INFO: Expecting 2560 events.
[20:48:01.716] <TB1> INFO: 2560 events read in total (296ms).
[20:48:01.716] <TB1> INFO: Test took 1194ms.
[20:48:01.718] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:02.025] <TB1> INFO: Expecting 2560 events.
[20:48:02.914] <TB1> INFO: 2560 events read in total (298ms).
[20:48:02.915] <TB1> INFO: Test took 1197ms.
[20:48:02.917] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:03.224] <TB1> INFO: Expecting 2560 events.
[20:48:04.114] <TB1> INFO: 2560 events read in total (299ms).
[20:48:04.114] <TB1> INFO: Test took 1197ms.
[20:48:04.117] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:04.422] <TB1> INFO: Expecting 2560 events.
[20:48:05.317] <TB1> INFO: 2560 events read in total (303ms).
[20:48:05.317] <TB1> INFO: Test took 1200ms.
[20:48:05.320] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:05.626] <TB1> INFO: Expecting 2560 events.
[20:48:06.521] <TB1> INFO: 2560 events read in total (304ms).
[20:48:06.521] <TB1> INFO: Test took 1202ms.
[20:48:06.524] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:48:06.830] <TB1> INFO: Expecting 2560 events.
[20:48:07.719] <TB1> INFO: 2560 events read in total (297ms).
[20:48:07.719] <TB1> INFO: Test took 1195ms.
[20:48:08.192] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 545 seconds
[20:48:08.192] <TB1> INFO: PH scale (per ROC): 36 37 40 44 48 54 33 39 32 39 41 39 36 49 38 40
[20:48:08.192] <TB1> INFO: PH offset (per ROC): 114 92 94 114 134 134 106 102 121 89 99 107 119 125 106 111
[20:48:08.203] <TB1> INFO: Decoding statistics:
[20:48:08.203] <TB1> INFO: General information:
[20:48:08.203] <TB1> INFO: 16bit words read: 127888
[20:48:08.203] <TB1> INFO: valid events total: 20480
[20:48:08.203] <TB1> INFO: empty events: 17976
[20:48:08.203] <TB1> INFO: valid events with pixels: 2504
[20:48:08.203] <TB1> INFO: valid pixel hits: 2504
[20:48:08.203] <TB1> INFO: Event errors: 0
[20:48:08.203] <TB1> INFO: start marker: 0
[20:48:08.203] <TB1> INFO: stop marker: 0
[20:48:08.203] <TB1> INFO: overflow: 0
[20:48:08.203] <TB1> INFO: invalid 5bit words: 0
[20:48:08.203] <TB1> INFO: invalid XOR eye diagram: 0
[20:48:08.203] <TB1> INFO: frame (failed synchr.): 0
[20:48:08.203] <TB1> INFO: idle data (no TBM trl): 0
[20:48:08.203] <TB1> INFO: no data (only TBM hdr): 0
[20:48:08.203] <TB1> INFO: TBM errors: 0
[20:48:08.203] <TB1> INFO: flawed TBM headers: 0
[20:48:08.203] <TB1> INFO: flawed TBM trailers: 0
[20:48:08.203] <TB1> INFO: event ID mismatches: 0
[20:48:08.203] <TB1> INFO: ROC errors: 0
[20:48:08.203] <TB1> INFO: missing ROC header(s): 0
[20:48:08.204] <TB1> INFO: misplaced readback start: 0
[20:48:08.204] <TB1> INFO: Pixel decoding errors: 0
[20:48:08.204] <TB1> INFO: pixel data incomplete: 0
[20:48:08.204] <TB1> INFO: pixel address: 0
[20:48:08.204] <TB1> INFO: pulse height fill bit: 0
[20:48:08.204] <TB1> INFO: buffer corruption: 0
[20:48:08.383] <TB1> INFO: ######################################################################
[20:48:08.383] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:48:08.383] <TB1> INFO: ######################################################################
[20:48:08.398] <TB1> INFO: scanning low vcal = 10
[20:48:08.638] <TB1> INFO: Expecting 41600 events.
[20:48:12.251] <TB1> INFO: 41600 events read in total (3021ms).
[20:48:12.251] <TB1> INFO: Test took 3853ms.
[20:48:12.253] <TB1> INFO: scanning low vcal = 20
[20:48:12.549] <TB1> INFO: Expecting 41600 events.
[20:48:16.135] <TB1> INFO: 41600 events read in total (2995ms).
[20:48:16.135] <TB1> INFO: Test took 3882ms.
[20:48:16.138] <TB1> INFO: scanning low vcal = 30
[20:48:16.435] <TB1> INFO: Expecting 41600 events.
[20:48:20.150] <TB1> INFO: 41600 events read in total (3123ms).
[20:48:20.151] <TB1> INFO: Test took 4013ms.
[20:48:20.153] <TB1> INFO: scanning low vcal = 40
[20:48:20.430] <TB1> INFO: Expecting 41600 events.
[20:48:24.418] <TB1> INFO: 41600 events read in total (3396ms).
[20:48:24.419] <TB1> INFO: Test took 4266ms.
[20:48:24.423] <TB1> INFO: scanning low vcal = 50
[20:48:24.698] <TB1> INFO: Expecting 41600 events.
[20:48:28.682] <TB1> INFO: 41600 events read in total (3392ms).
[20:48:28.683] <TB1> INFO: Test took 4260ms.
[20:48:28.686] <TB1> INFO: scanning low vcal = 60
[20:48:28.962] <TB1> INFO: Expecting 41600 events.
[20:48:33.062] <TB1> INFO: 41600 events read in total (3508ms).
[20:48:33.063] <TB1> INFO: Test took 4377ms.
[20:48:33.067] <TB1> INFO: scanning low vcal = 70
[20:48:33.363] <TB1> INFO: Expecting 41600 events.
[20:48:37.413] <TB1> INFO: 41600 events read in total (3458ms).
[20:48:37.413] <TB1> INFO: Test took 4346ms.
[20:48:37.416] <TB1> INFO: scanning low vcal = 80
[20:48:37.716] <TB1> INFO: Expecting 41600 events.
[20:48:41.774] <TB1> INFO: 41600 events read in total (3466ms).
[20:48:41.775] <TB1> INFO: Test took 4359ms.
[20:48:41.778] <TB1> INFO: scanning low vcal = 90
[20:48:42.055] <TB1> INFO: Expecting 41600 events.
[20:48:46.064] <TB1> INFO: 41600 events read in total (3417ms).
[20:48:46.065] <TB1> INFO: Test took 4287ms.
[20:48:46.068] <TB1> INFO: scanning low vcal = 100
[20:48:46.344] <TB1> INFO: Expecting 41600 events.
[20:48:50.366] <TB1> INFO: 41600 events read in total (3430ms).
[20:48:50.366] <TB1> INFO: Test took 4297ms.
[20:48:50.369] <TB1> INFO: scanning low vcal = 110
[20:48:50.653] <TB1> INFO: Expecting 41600 events.
[20:48:54.660] <TB1> INFO: 41600 events read in total (3415ms).
[20:48:54.661] <TB1> INFO: Test took 4292ms.
[20:48:54.664] <TB1> INFO: scanning low vcal = 120
[20:48:54.963] <TB1> INFO: Expecting 41600 events.
[20:48:58.966] <TB1> INFO: 41600 events read in total (3411ms).
[20:48:58.966] <TB1> INFO: Test took 4302ms.
[20:48:58.969] <TB1> INFO: scanning low vcal = 130
[20:48:59.246] <TB1> INFO: Expecting 41600 events.
[20:49:03.285] <TB1> INFO: 41600 events read in total (3448ms).
[20:49:03.285] <TB1> INFO: Test took 4316ms.
[20:49:03.289] <TB1> INFO: scanning low vcal = 140
[20:49:03.565] <TB1> INFO: Expecting 41600 events.
[20:49:07.558] <TB1> INFO: 41600 events read in total (3402ms).
[20:49:07.559] <TB1> INFO: Test took 4270ms.
[20:49:07.562] <TB1> INFO: scanning low vcal = 150
[20:49:07.839] <TB1> INFO: Expecting 41600 events.
[20:49:11.813] <TB1> INFO: 41600 events read in total (3382ms).
[20:49:11.814] <TB1> INFO: Test took 4252ms.
[20:49:11.816] <TB1> INFO: scanning low vcal = 160
[20:49:12.093] <TB1> INFO: Expecting 41600 events.
[20:49:16.053] <TB1> INFO: 41600 events read in total (3369ms).
[20:49:16.054] <TB1> INFO: Test took 4237ms.
[20:49:16.058] <TB1> INFO: scanning low vcal = 170
[20:49:16.334] <TB1> INFO: Expecting 41600 events.
[20:49:20.320] <TB1> INFO: 41600 events read in total (3394ms).
[20:49:20.321] <TB1> INFO: Test took 4263ms.
[20:49:20.326] <TB1> INFO: scanning low vcal = 180
[20:49:20.600] <TB1> INFO: Expecting 41600 events.
[20:49:24.597] <TB1> INFO: 41600 events read in total (3405ms).
[20:49:24.598] <TB1> INFO: Test took 4272ms.
[20:49:24.601] <TB1> INFO: scanning low vcal = 190
[20:49:24.877] <TB1> INFO: Expecting 41600 events.
[20:49:28.877] <TB1> INFO: 41600 events read in total (3408ms).
[20:49:28.877] <TB1> INFO: Test took 4277ms.
[20:49:28.881] <TB1> INFO: scanning low vcal = 200
[20:49:29.157] <TB1> INFO: Expecting 41600 events.
[20:49:33.145] <TB1> INFO: 41600 events read in total (3396ms).
[20:49:33.146] <TB1> INFO: Test took 4265ms.
[20:49:33.150] <TB1> INFO: scanning low vcal = 210
[20:49:33.426] <TB1> INFO: Expecting 41600 events.
[20:49:37.443] <TB1> INFO: 41600 events read in total (3426ms).
[20:49:37.444] <TB1> INFO: Test took 4294ms.
[20:49:37.447] <TB1> INFO: scanning low vcal = 220
[20:49:37.724] <TB1> INFO: Expecting 41600 events.
[20:49:41.689] <TB1> INFO: 41600 events read in total (3374ms).
[20:49:41.690] <TB1> INFO: Test took 4243ms.
[20:49:41.693] <TB1> INFO: scanning low vcal = 230
[20:49:41.969] <TB1> INFO: Expecting 41600 events.
[20:49:46.046] <TB1> INFO: 41600 events read in total (3485ms).
[20:49:46.047] <TB1> INFO: Test took 4354ms.
[20:49:46.051] <TB1> INFO: scanning low vcal = 240
[20:49:46.365] <TB1> INFO: Expecting 41600 events.
[20:49:50.343] <TB1> INFO: 41600 events read in total (3387ms).
[20:49:50.344] <TB1> INFO: Test took 4293ms.
[20:49:50.347] <TB1> INFO: scanning low vcal = 250
[20:49:50.624] <TB1> INFO: Expecting 41600 events.
[20:49:54.630] <TB1> INFO: 41600 events read in total (3414ms).
[20:49:54.630] <TB1> INFO: Test took 4283ms.
[20:49:54.634] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[20:49:54.954] <TB1> INFO: Expecting 41600 events.
[20:49:58.936] <TB1> INFO: 41600 events read in total (3390ms).
[20:49:58.936] <TB1> INFO: Test took 4301ms.
[20:49:58.939] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[20:49:59.216] <TB1> INFO: Expecting 41600 events.
[20:50:03.250] <TB1> INFO: 41600 events read in total (3442ms).
[20:50:03.250] <TB1> INFO: Test took 4311ms.
[20:50:03.254] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[20:50:03.567] <TB1> INFO: Expecting 41600 events.
[20:50:07.589] <TB1> INFO: 41600 events read in total (3430ms).
[20:50:07.590] <TB1> INFO: Test took 4336ms.
[20:50:07.593] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[20:50:07.869] <TB1> INFO: Expecting 41600 events.
[20:50:11.848] <TB1> INFO: 41600 events read in total (3387ms).
[20:50:11.849] <TB1> INFO: Test took 4256ms.
[20:50:11.852] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[20:50:12.129] <TB1> INFO: Expecting 41600 events.
[20:50:16.122] <TB1> INFO: 41600 events read in total (3402ms).
[20:50:16.123] <TB1> INFO: Test took 4271ms.
[20:50:16.513] <TB1> INFO: PixTestGainPedestal::measure() done
[20:50:49.541] <TB1> INFO: PixTestGainPedestal::fit() done
[20:50:49.541] <TB1> INFO: non-linearity mean: 0.911 1.027 1.024 0.948 0.967 0.975 0.920 0.935 0.944 1.001 0.908 0.914 0.907 0.972 0.934 0.934
[20:50:49.541] <TB1> INFO: non-linearity RMS: 0.094 0.156 0.180 0.032 0.005 0.003 0.108 0.054 0.032 0.227 0.090 0.139 0.073 0.004 0.175 0.051
[20:50:49.541] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[20:50:49.556] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[20:50:49.569] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[20:50:49.583] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[20:50:49.596] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[20:50:49.609] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[20:50:49.622] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[20:50:49.636] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[20:50:49.649] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[20:50:49.663] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[20:50:49.676] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[20:50:49.689] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[20:50:49.703] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[20:50:49.716] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[20:50:49.729] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[20:50:49.742] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1081_FullQualification_2016-11-03_14h08m_1478178483//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[20:50:49.755] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[20:50:49.756] <TB1> INFO: Decoding statistics:
[20:50:49.756] <TB1> INFO: General information:
[20:50:49.756] <TB1> INFO: 16bit words read: 3327898
[20:50:49.756] <TB1> INFO: valid events total: 332800
[20:50:49.756] <TB1> INFO: empty events: 0
[20:50:49.756] <TB1> INFO: valid events with pixels: 332800
[20:50:49.756] <TB1> INFO: valid pixel hits: 665549
[20:50:49.756] <TB1> INFO: Event errors: 0
[20:50:49.756] <TB1> INFO: start marker: 0
[20:50:49.756] <TB1> INFO: stop marker: 0
[20:50:49.756] <TB1> INFO: overflow: 0
[20:50:49.756] <TB1> INFO: invalid 5bit words: 0
[20:50:49.756] <TB1> INFO: invalid XOR eye diagram: 0
[20:50:49.756] <TB1> INFO: frame (failed synchr.): 0
[20:50:49.756] <TB1> INFO: idle data (no TBM trl): 0
[20:50:49.756] <TB1> INFO: no data (only TBM hdr): 0
[20:50:49.756] <TB1> INFO: TBM errors: 0
[20:50:49.756] <TB1> INFO: flawed TBM headers: 0
[20:50:49.756] <TB1> INFO: flawed TBM trailers: 0
[20:50:49.756] <TB1> INFO: event ID mismatches: 0
[20:50:49.756] <TB1> INFO: ROC errors: 0
[20:50:49.756] <TB1> INFO: missing ROC header(s): 0
[20:50:49.756] <TB1> INFO: misplaced readback start: 0
[20:50:49.756] <TB1> INFO: Pixel decoding errors: 0
[20:50:49.756] <TB1> INFO: pixel data incomplete: 0
[20:50:49.756] <TB1> INFO: pixel address: 0
[20:50:49.756] <TB1> INFO: pulse height fill bit: 0
[20:50:49.756] <TB1> INFO: buffer corruption: 0
[20:50:49.773] <TB1> INFO: Decoding statistics:
[20:50:49.773] <TB1> INFO: General information:
[20:50:49.773] <TB1> INFO: 16bit words read: 3457322
[20:50:49.773] <TB1> INFO: valid events total: 353536
[20:50:49.773] <TB1> INFO: empty events: 18232
[20:50:49.773] <TB1> INFO: valid events with pixels: 335304
[20:50:49.773] <TB1> INFO: valid pixel hits: 668053
[20:50:49.773] <TB1> INFO: Event errors: 0
[20:50:49.773] <TB1> INFO: start marker: 0
[20:50:49.773] <TB1> INFO: stop marker: 0
[20:50:49.773] <TB1> INFO: overflow: 0
[20:50:49.773] <TB1> INFO: invalid 5bit words: 0
[20:50:49.773] <TB1> INFO: invalid XOR eye diagram: 0
[20:50:49.773] <TB1> INFO: frame (failed synchr.): 0
[20:50:49.773] <TB1> INFO: idle data (no TBM trl): 0
[20:50:49.773] <TB1> INFO: no data (only TBM hdr): 0
[20:50:49.773] <TB1> INFO: TBM errors: 0
[20:50:49.773] <TB1> INFO: flawed TBM headers: 0
[20:50:49.773] <TB1> INFO: flawed TBM trailers: 0
[20:50:49.773] <TB1> INFO: event ID mismatches: 0
[20:50:49.773] <TB1> INFO: ROC errors: 0
[20:50:49.773] <TB1> INFO: missing ROC header(s): 0
[20:50:49.773] <TB1> INFO: misplaced readback start: 0
[20:50:49.773] <TB1> INFO: Pixel decoding errors: 0
[20:50:49.773] <TB1> INFO: pixel data incomplete: 0
[20:50:49.773] <TB1> INFO: pixel address: 0
[20:50:49.773] <TB1> INFO: pulse height fill bit: 0
[20:50:49.773] <TB1> INFO: buffer corruption: 0
[20:50:49.774] <TB1> INFO: enter test to run
[20:50:49.774] <TB1> INFO: test: exit no parameter change
[20:50:49.921] <TB1> QUIET: Connection to board 154 closed.
[20:50:49.921] <TB1> INFO: pXar: this is the end, my friend