Test Date: 2016-10-25 15:54
Analysis date: 2016-10-26 11:27
Logfile
LogfileView
[16:35:00.640] <TB3> INFO: *** Welcome to pxar ***
[16:35:00.640] <TB3> INFO: *** Today: 2016/10/25
[16:35:00.647] <TB3> INFO: *** Version: c8ba-dirty
[16:35:00.647] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C15.dat
[16:35:00.648] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C1b.dat
[16:35:00.648] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//defaultMaskFile.dat
[16:35:00.648] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters_C15.dat
[16:35:00.703] <TB3> INFO: clk: 4
[16:35:00.703] <TB3> INFO: ctr: 4
[16:35:00.703] <TB3> INFO: sda: 19
[16:35:00.703] <TB3> INFO: tin: 9
[16:35:00.703] <TB3> INFO: level: 15
[16:35:00.703] <TB3> INFO: triggerdelay: 0
[16:35:00.703] <TB3> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[16:35:00.703] <TB3> INFO: Log level: INFO
[16:35:00.712] <TB3> INFO: Found DTB DTB_WZ4I6J
[16:35:00.720] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[16:35:00.722] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[16:35:00.723] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[16:35:02.208] <TB3> INFO: DUT info:
[16:35:02.208] <TB3> INFO: The DUT currently contains the following objects:
[16:35:02.208] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[16:35:02.208] <TB3> INFO: TBM Core alpha (0): 7 registers set
[16:35:02.208] <TB3> INFO: TBM Core beta (1): 7 registers set
[16:35:02.208] <TB3> INFO: TBM Core alpha (2): 7 registers set
[16:35:02.208] <TB3> INFO: TBM Core beta (3): 7 registers set
[16:35:02.208] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[16:35:02.208] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.208] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:35:02.609] <TB3> INFO: enter 'restricted' command line mode
[16:35:02.609] <TB3> INFO: enter test to run
[16:35:02.609] <TB3> INFO: test: pretest no parameter change
[16:35:02.609] <TB3> INFO: running: pretest
[16:35:03.154] <TB3> INFO: ######################################################################
[16:35:03.154] <TB3> INFO: PixTestPretest::doTest()
[16:35:03.154] <TB3> INFO: ######################################################################
[16:35:03.155] <TB3> INFO: ----------------------------------------------------------------------
[16:35:03.155] <TB3> INFO: PixTestPretest::programROC()
[16:35:03.155] <TB3> INFO: ----------------------------------------------------------------------
[16:35:21.168] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:35:21.168] <TB3> INFO: IA differences per ROC: 19.3 18.5 17.7 18.5 19.3 18.5 18.5 20.1 20.1 19.3 17.7 20.1 16.1 20.1 18.5 20.9
[16:35:21.203] <TB3> INFO: ----------------------------------------------------------------------
[16:35:21.203] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:35:21.203] <TB3> INFO: ----------------------------------------------------------------------
[16:35:42.447] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 396.3 mA = 24.7688 mA/ROC
[16:35:42.447] <TB3> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 19.3 20.9 20.1 20.1 20.1 20.1 19.3 20.1
[16:35:42.474] <TB3> INFO: ----------------------------------------------------------------------
[16:35:42.474] <TB3> INFO: PixTestPretest::findTiming()
[16:35:42.474] <TB3> INFO: ----------------------------------------------------------------------
[16:35:42.475] <TB3> INFO: PixTestCmd::init()
[16:35:43.044] <TB3> WARNING: Not unmasking DUT, not setting Calibrate bits!

[16:36:13.775] <TB3> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[16:36:13.776] <TB3> INFO: (success/tries = 100/100), width = 3
[16:36:15.283] <TB3> INFO: ----------------------------------------------------------------------
[16:36:15.283] <TB3> INFO: PixTestPretest::findWorkingPixel()
[16:36:15.283] <TB3> INFO: ----------------------------------------------------------------------
[16:36:15.375] <TB3> INFO: Expecting 231680 events.
[16:36:25.095] <TB3> INFO: 231680 events read in total (9129ms).
[16:36:25.101] <TB3> INFO: Test took 9816ms.
[16:36:25.347] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:36:25.377] <TB3> INFO: ----------------------------------------------------------------------
[16:36:25.377] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[16:36:25.377] <TB3> INFO: ----------------------------------------------------------------------
[16:36:25.470] <TB3> INFO: Expecting 231680 events.
[16:36:35.145] <TB3> INFO: 231680 events read in total (9084ms).
[16:36:35.154] <TB3> INFO: Test took 9773ms.
[16:36:35.412] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[16:36:35.412] <TB3> INFO: CalDel: 114 86 115 105 98 96 105 111 105 96 113 105 102 99 95 112
[16:36:35.412] <TB3> INFO: VthrComp: 51 52 53 51 51 58 57 51 51 51 51 51 51 51 51 51
[16:36:35.414] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C0.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C1.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C2.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C3.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C4.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C5.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C6.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C7.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C8.dat
[16:36:35.415] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C9.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C10.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C11.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C12.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C13.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C14.dat
[16:36:35.416] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters_C15.dat
[16:36:35.416] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C0a.dat
[16:36:35.416] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C0b.dat
[16:36:35.416] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C1a.dat
[16:36:35.416] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//tbmParameters_C1b.dat
[16:36:35.416] <TB3> INFO: PixTestPretest::doTest() done, duration: 92 seconds
[16:36:35.516] <TB3> INFO: enter test to run
[16:36:35.516] <TB3> INFO: test: FullTest no parameter change
[16:36:35.516] <TB3> INFO: running: fulltest
[16:36:35.516] <TB3> INFO: ######################################################################
[16:36:35.516] <TB3> INFO: PixTestFullTest::doTest()
[16:36:35.516] <TB3> INFO: ######################################################################
[16:36:35.517] <TB3> INFO: ######################################################################
[16:36:35.517] <TB3> INFO: PixTestAlive::doTest()
[16:36:35.517] <TB3> INFO: ######################################################################
[16:36:35.518] <TB3> INFO: ----------------------------------------------------------------------
[16:36:35.518] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:36:35.518] <TB3> INFO: ----------------------------------------------------------------------
[16:36:35.751] <TB3> INFO: Expecting 41600 events.
[16:36:39.212] <TB3> INFO: 41600 events read in total (2869ms).
[16:36:39.213] <TB3> INFO: Test took 3693ms.
[16:36:39.438] <TB3> INFO: PixTestAlive::aliveTest() done
[16:36:39.438] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:36:39.439] <TB3> INFO: ----------------------------------------------------------------------
[16:36:39.439] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:36:39.439] <TB3> INFO: ----------------------------------------------------------------------
[16:36:39.672] <TB3> INFO: Expecting 41600 events.
[16:36:42.643] <TB3> INFO: 41600 events read in total (2379ms).
[16:36:42.643] <TB3> INFO: Test took 3203ms.
[16:36:42.644] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:36:42.882] <TB3> INFO: PixTestAlive::maskTest() done
[16:36:42.882] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:36:42.883] <TB3> INFO: ----------------------------------------------------------------------
[16:36:42.883] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:36:42.883] <TB3> INFO: ----------------------------------------------------------------------
[16:36:43.118] <TB3> INFO: Expecting 41600 events.
[16:36:46.685] <TB3> INFO: 41600 events read in total (2976ms).
[16:36:46.686] <TB3> INFO: Test took 3801ms.
[16:36:46.913] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[16:36:46.913] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:36:46.913] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:36:46.913] <TB3> INFO: Decoding statistics:
[16:36:46.913] <TB3> INFO: General information:
[16:36:46.913] <TB3> INFO: 16bit words read: 0
[16:36:46.913] <TB3> INFO: valid events total: 0
[16:36:46.913] <TB3> INFO: empty events: 0
[16:36:46.913] <TB3> INFO: valid events with pixels: 0
[16:36:46.913] <TB3> INFO: valid pixel hits: 0
[16:36:46.913] <TB3> INFO: Event errors: 0
[16:36:46.913] <TB3> INFO: start marker: 0
[16:36:46.913] <TB3> INFO: stop marker: 0
[16:36:46.913] <TB3> INFO: overflow: 0
[16:36:46.913] <TB3> INFO: invalid 5bit words: 0
[16:36:46.913] <TB3> INFO: invalid XOR eye diagram: 0
[16:36:46.913] <TB3> INFO: frame (failed synchr.): 0
[16:36:46.913] <TB3> INFO: idle data (no TBM trl): 0
[16:36:46.913] <TB3> INFO: no data (only TBM hdr): 0
[16:36:46.913] <TB3> INFO: TBM errors: 0
[16:36:46.913] <TB3> INFO: flawed TBM headers: 0
[16:36:46.913] <TB3> INFO: flawed TBM trailers: 0
[16:36:46.913] <TB3> INFO: event ID mismatches: 0
[16:36:46.913] <TB3> INFO: ROC errors: 0
[16:36:46.913] <TB3> INFO: missing ROC header(s): 0
[16:36:46.913] <TB3> INFO: misplaced readback start: 0
[16:36:46.913] <TB3> INFO: Pixel decoding errors: 0
[16:36:46.913] <TB3> INFO: pixel data incomplete: 0
[16:36:46.913] <TB3> INFO: pixel address: 0
[16:36:46.913] <TB3> INFO: pulse height fill bit: 0
[16:36:46.913] <TB3> INFO: buffer corruption: 0
[16:36:46.920] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C15.dat
[16:36:46.920] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr_C15.dat
[16:36:46.920] <TB3> ERROR: <ConfigParameters.cc/readGainPedestalParameters:L1005> cannot open /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr_C0.dat for reading PH calibration constants

[16:36:46.920] <TB3> INFO: ######################################################################
[16:36:46.920] <TB3> INFO: PixTestReadback::doTest()
[16:36:46.920] <TB3> INFO: ######################################################################
[16:36:46.920] <TB3> INFO: ----------------------------------------------------------------------
[16:36:46.920] <TB3> INFO: PixTestReadback::CalibrateVd()
[16:36:46.920] <TB3> INFO: ----------------------------------------------------------------------
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C0.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C1.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C2.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C3.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C4.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C5.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C6.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C7.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C8.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C9.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C10.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C11.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C12.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C13.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C14.dat
[16:36:56.892] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C15.dat
[16:36:56.920] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:36:56.920] <TB3> INFO: ----------------------------------------------------------------------
[16:36:56.920] <TB3> INFO: PixTestReadback::CalibrateVa()
[16:36:56.920] <TB3> INFO: ----------------------------------------------------------------------
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C0.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C1.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C2.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C3.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C4.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C5.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C6.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C7.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C8.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C9.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C10.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C11.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C12.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C13.dat
[16:37:06.812] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C14.dat
[16:37:06.813] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C15.dat
[16:37:06.842] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:37:06.842] <TB3> INFO: ----------------------------------------------------------------------
[16:37:06.842] <TB3> INFO: PixTestReadback::readbackVbg()
[16:37:06.842] <TB3> INFO: ----------------------------------------------------------------------
[16:37:14.487] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:37:14.488] <TB3> INFO: ----------------------------------------------------------------------
[16:37:14.488] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[16:37:14.488] <TB3> INFO: ----------------------------------------------------------------------
[16:37:14.488] <TB3> INFO: Vbg will be calibrated using Vd calibration
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 148.1calibrated Vbg = 1.16674 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 159.7calibrated Vbg = 1.15468 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 156.8calibrated Vbg = 1.15902 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.9calibrated Vbg = 1.14997 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 145.5calibrated Vbg = 1.16009 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.6calibrated Vbg = 1.15918 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152.4calibrated Vbg = 1.16444 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.9calibrated Vbg = 1.165 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 149.7calibrated Vbg = 1.15455 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.1calibrated Vbg = 1.15661 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 150.5calibrated Vbg = 1.14842 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 153.9calibrated Vbg = 1.14119 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.2calibrated Vbg = 1.14853 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 148.8calibrated Vbg = 1.15784 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 160.4calibrated Vbg = 1.15361 :::*/*/*/*/
[16:37:14.488] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.3calibrated Vbg = 1.15217 :::*/*/*/*/
[16:37:14.490] <TB3> INFO: ----------------------------------------------------------------------
[16:37:14.490] <TB3> INFO: PixTestReadback::CalibrateIa()
[16:37:14.490] <TB3> INFO: ----------------------------------------------------------------------
[16:39:54.817] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C0.dat
[16:39:54.817] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C1.dat
[16:39:54.817] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C2.dat
[16:39:54.817] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C3.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C4.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C5.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C6.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C7.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C8.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C9.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C10.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C11.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C12.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C13.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C14.dat
[16:39:54.818] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//readbackCal_C15.dat
[16:39:54.847] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[16:39:54.848] <TB3> INFO: PixTestReadback::doTest() done
[16:39:54.848] <TB3> INFO: Decoding statistics:
[16:39:54.848] <TB3> INFO: General information:
[16:39:54.848] <TB3> INFO: 16bit words read: 1536
[16:39:54.848] <TB3> INFO: valid events total: 256
[16:39:54.848] <TB3> INFO: empty events: 256
[16:39:54.848] <TB3> INFO: valid events with pixels: 0
[16:39:54.848] <TB3> INFO: valid pixel hits: 0
[16:39:54.848] <TB3> INFO: Event errors: 0
[16:39:54.848] <TB3> INFO: start marker: 0
[16:39:54.848] <TB3> INFO: stop marker: 0
[16:39:54.848] <TB3> INFO: overflow: 0
[16:39:54.848] <TB3> INFO: invalid 5bit words: 0
[16:39:54.848] <TB3> INFO: invalid XOR eye diagram: 0
[16:39:54.848] <TB3> INFO: frame (failed synchr.): 0
[16:39:54.848] <TB3> INFO: idle data (no TBM trl): 0
[16:39:54.848] <TB3> INFO: no data (only TBM hdr): 0
[16:39:54.848] <TB3> INFO: TBM errors: 0
[16:39:54.848] <TB3> INFO: flawed TBM headers: 0
[16:39:54.848] <TB3> INFO: flawed TBM trailers: 0
[16:39:54.848] <TB3> INFO: event ID mismatches: 0
[16:39:54.848] <TB3> INFO: ROC errors: 0
[16:39:54.848] <TB3> INFO: missing ROC header(s): 0
[16:39:54.848] <TB3> INFO: misplaced readback start: 0
[16:39:54.848] <TB3> INFO: Pixel decoding errors: 0
[16:39:54.848] <TB3> INFO: pixel data incomplete: 0
[16:39:54.848] <TB3> INFO: pixel address: 0
[16:39:54.848] <TB3> INFO: pulse height fill bit: 0
[16:39:54.848] <TB3> INFO: buffer corruption: 0
[16:39:54.883] <TB3> INFO: ######################################################################
[16:39:54.884] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:39:54.884] <TB3> INFO: ######################################################################
[16:39:54.886] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:39:54.897] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[16:39:54.898] <TB3> INFO: run 1 of 1
[16:39:55.164] <TB3> INFO: Expecting 3120000 events.
[16:40:24.970] <TB3> INFO: 650080 events read in total (29214ms).
[16:40:36.930] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (225) != TBM ID (129)

[16:40:37.065] <TB3> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 225 225 129 225 225 225 225 225

[16:40:37.065] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (226)

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0e5 80c0 4810 250 25ef 4810 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0df 8040 4812 250 25ef 4c12 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0e0 80b1 4c00 250 25ef 4c10 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 4811 4811 25ef 4811 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0e2 8000 4c10 250 25ef 4c10 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0e3 8040 4810 250 25ef 4811 250 25ef e022 c000

[16:40:37.065] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0e4 80b1 4810 250 25ef 4c10 250 25ef e022 c000

[16:40:54.109] <TB3> INFO: 1300645 events read in total (58353ms).
[16:41:06.062] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (38) != TBM ID (129)

[16:41:06.198] <TB3> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 38 38 129 38 38 38 38 38

[16:41:06.198] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (39)

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a02a 8000 4810 4810 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a024 80b1 4c10 4810 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a025 80c0 4c10 4c10 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 4811 4811 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a027 8040 4c10 4c10 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a028 80b1 4810 4810 e022 c000

[16:41:06.199] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a029 80c0 4c10 4c10 e022 c000

[16:41:23.487] <TB3> INFO: 1950845 events read in total (87731ms).
[16:41:35.459] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (254) != TBM ID (129)

[16:41:35.598] <TB3> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 254 254 129 254 254 254 254 254

[16:41:35.599] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (255)

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a002 8000 4810 4810 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0fc 80b1 4810 4810 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0fd 80c0 4810 4810 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 4811 4811 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a0ff 8040 4c02 4c02 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a000 80b1 4810 4c10 e022 c000

[16:41:35.599] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a001 80c0 4c11 4c11 e022 c000

[16:41:53.146] <TB3> INFO: 2602985 events read in total (117390ms).
[16:42:02.707] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (106) != TBM ID (129)

[16:42:02.847] <TB3> ERROR: <hal.cc/daqAllEvents:L1697> Channels report mismatching event numbers: 106 106 129 106 106 106 106 106

[16:42:02.847] <TB3> ERROR: <datapipe.cc/CheckEventID:L485> Channel 0 Event ID mismatch: local ID (130) != TBM ID (107)

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L170> Dumping the flawed event +- 3 events:

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06e 8000 4811 a66 2def 4811 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a068 80b1 4810 a66 2def 4c10 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a069 80c0 4811 a66 2def 4811 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a081 80c0 4811 4811 2def 4c10 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06b 8040 4811 a66 2def 4811 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06c 80b1 4811 a66 2def 4811 a66 2def e022 c000

[16:42:02.849] <TB3> ERROR: <datapipe.cc/Read:L172> ====== 0 ====== a06d 80c0 4811 a66 2def 4811 a66 2def e022 c000

[16:42:16.972] <TB3> INFO: 3120000 events read in total (141216ms).
[16:42:17.068] <TB3> INFO: Test took 142170ms.
[16:42:42.337] <TB3> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 167 seconds
[16:42:42.337] <TB3> INFO: number of dead bumps (per ROC): 2 1 0 0 0 0 0 0 0 1 0 0 1 0 1 2
[16:42:42.337] <TB3> INFO: separation cut (per ROC): 105 114 120 123 105 128 117 101 104 110 96 104 99 109 104 107
[16:42:42.337] <TB3> INFO: Decoding statistics:
[16:42:42.337] <TB3> INFO: General information:
[16:42:42.337] <TB3> INFO: 16bit words read: 0
[16:42:42.337] <TB3> INFO: valid events total: 0
[16:42:42.337] <TB3> INFO: empty events: 0
[16:42:42.337] <TB3> INFO: valid events with pixels: 0
[16:42:42.337] <TB3> INFO: valid pixel hits: 0
[16:42:42.337] <TB3> INFO: Event errors: 0
[16:42:42.337] <TB3> INFO: start marker: 0
[16:42:42.337] <TB3> INFO: stop marker: 0
[16:42:42.337] <TB3> INFO: overflow: 0
[16:42:42.337] <TB3> INFO: invalid 5bit words: 0
[16:42:42.337] <TB3> INFO: invalid XOR eye diagram: 0
[16:42:42.337] <TB3> INFO: frame (failed synchr.): 0
[16:42:42.337] <TB3> INFO: idle data (no TBM trl): 0
[16:42:42.337] <TB3> INFO: no data (only TBM hdr): 0
[16:42:42.337] <TB3> INFO: TBM errors: 0
[16:42:42.337] <TB3> INFO: flawed TBM headers: 0
[16:42:42.337] <TB3> INFO: flawed TBM trailers: 0
[16:42:42.337] <TB3> INFO: event ID mismatches: 0
[16:42:42.337] <TB3> INFO: ROC errors: 0
[16:42:42.337] <TB3> INFO: missing ROC header(s): 0
[16:42:42.337] <TB3> INFO: misplaced readback start: 0
[16:42:42.337] <TB3> INFO: Pixel decoding errors: 0
[16:42:42.337] <TB3> INFO: pixel data incomplete: 0
[16:42:42.337] <TB3> INFO: pixel address: 0
[16:42:42.337] <TB3> INFO: pulse height fill bit: 0
[16:42:42.337] <TB3> INFO: buffer corruption: 0
[16:42:42.384] <TB3> INFO: ######################################################################
[16:42:42.384] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:42:42.384] <TB3> INFO: ######################################################################
[16:42:42.384] <TB3> INFO: ----------------------------------------------------------------------
[16:42:42.384] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:42:42.384] <TB3> INFO: ----------------------------------------------------------------------
[16:42:42.384] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:42:42.395] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[16:42:42.395] <TB3> INFO: run 1 of 1
[16:42:42.671] <TB3> INFO: Expecting 36608000 events.
[16:43:05.668] <TB3> INFO: 673800 events read in total (22406ms).
[16:43:28.032] <TB3> INFO: 1336200 events read in total (44770ms).
[16:43:50.574] <TB3> INFO: 1998950 events read in total (67312ms).
[16:44:12.849] <TB3> INFO: 2658700 events read in total (89587ms).
[16:44:34.970] <TB3> INFO: 3319650 events read in total (111708ms).
[16:44:57.394] <TB3> INFO: 3977850 events read in total (134132ms).
[16:45:19.660] <TB3> INFO: 4639900 events read in total (156398ms).
[16:45:41.967] <TB3> INFO: 5301500 events read in total (178705ms).
[16:46:04.357] <TB3> INFO: 5961600 events read in total (201095ms).
[16:46:26.587] <TB3> INFO: 6620800 events read in total (223325ms).
[16:46:48.679] <TB3> INFO: 7279850 events read in total (245417ms).
[16:47:10.966] <TB3> INFO: 7939050 events read in total (267704ms).
[16:47:32.851] <TB3> INFO: 8598300 events read in total (289589ms).
[16:47:55.154] <TB3> INFO: 9259100 events read in total (311892ms).
[16:48:17.530] <TB3> INFO: 9918400 events read in total (334268ms).
[16:48:39.762] <TB3> INFO: 10578950 events read in total (356500ms).
[16:49:02.177] <TB3> INFO: 11236400 events read in total (378915ms).
[16:49:24.569] <TB3> INFO: 11895550 events read in total (401307ms).
[16:49:47.082] <TB3> INFO: 12553250 events read in total (423820ms).
[16:50:09.335] <TB3> INFO: 13212950 events read in total (446073ms).
[16:50:31.401] <TB3> INFO: 13870350 events read in total (468139ms).
[16:50:53.668] <TB3> INFO: 14530350 events read in total (490406ms).
[16:51:15.882] <TB3> INFO: 15188950 events read in total (512620ms).
[16:51:38.283] <TB3> INFO: 15847550 events read in total (535021ms).
[16:52:00.634] <TB3> INFO: 16505700 events read in total (557372ms).
[16:52:23.121] <TB3> INFO: 17162900 events read in total (579860ms).
[16:52:45.537] <TB3> INFO: 17819950 events read in total (602275ms).
[16:53:07.766] <TB3> INFO: 18475750 events read in total (624504ms).
[16:53:30.073] <TB3> INFO: 19132400 events read in total (646811ms).
[16:53:52.383] <TB3> INFO: 19787400 events read in total (669121ms).
[16:54:14.672] <TB3> INFO: 20441800 events read in total (691410ms).
[16:54:36.762] <TB3> INFO: 21096400 events read in total (713500ms).
[16:54:59.080] <TB3> INFO: 21752550 events read in total (735818ms).
[16:55:21.226] <TB3> INFO: 22406000 events read in total (757964ms).
[16:55:43.502] <TB3> INFO: 23061050 events read in total (780240ms).
[16:56:05.697] <TB3> INFO: 23714600 events read in total (802435ms).
[16:56:28.132] <TB3> INFO: 24366950 events read in total (824870ms).
[16:56:50.247] <TB3> INFO: 25020700 events read in total (846985ms).
[16:57:12.458] <TB3> INFO: 25675450 events read in total (869196ms).
[16:57:34.532] <TB3> INFO: 26329450 events read in total (891270ms).
[16:57:56.575] <TB3> INFO: 26983950 events read in total (913313ms).
[16:58:18.871] <TB3> INFO: 27638700 events read in total (935609ms).
[16:58:40.961] <TB3> INFO: 28291300 events read in total (957699ms).
[16:59:03.193] <TB3> INFO: 28946650 events read in total (979931ms).
[16:59:25.449] <TB3> INFO: 29600400 events read in total (1002187ms).
[16:59:47.830] <TB3> INFO: 30256800 events read in total (1024568ms).
[17:00:09.909] <TB3> INFO: 30908800 events read in total (1046647ms).
[17:00:32.248] <TB3> INFO: 31563250 events read in total (1068986ms).
[17:00:54.357] <TB3> INFO: 32215800 events read in total (1091095ms).
[17:01:16.515] <TB3> INFO: 32871450 events read in total (1113253ms).
[17:01:38.783] <TB3> INFO: 33526000 events read in total (1135521ms).
[17:02:00.980] <TB3> INFO: 34182200 events read in total (1157718ms).
[17:02:23.121] <TB3> INFO: 34837100 events read in total (1179859ms).
[17:02:45.304] <TB3> INFO: 35494300 events read in total (1202042ms).
[17:03:07.924] <TB3> INFO: 36156550 events read in total (1224662ms).
[17:03:23.006] <TB3> INFO: 36608000 events read in total (1240744ms).
[17:03:24.069] <TB3> INFO: Test took 1241674ms.
[17:03:24.509] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:26.115] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:27.649] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:29.217] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:30.809] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:32.766] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:34.535] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:36.432] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:38.754] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:40.787] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:42.885] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:44.923] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:46.863] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:48.427] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:50.157] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:52.258] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[17:03:54.405] <TB3> INFO: PixTestScurves::scurves() done
[17:03:54.405] <TB3> INFO: Vcal mean: 120.86 129.20 123.25 124.31 120.00 124.68 127.77 110.82 110.57 113.89 111.56 105.96 109.28 108.65 115.04 126.11
[17:03:54.405] <TB3> INFO: Vcal RMS: 6.26 6.83 7.13 6.42 5.62 6.36 7.04 4.90 5.51 5.18 5.46 4.92 4.92 5.01 5.53 6.02
[17:03:54.405] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1272 seconds
[17:03:54.405] <TB3> INFO: Decoding statistics:
[17:03:54.405] <TB3> INFO: General information:
[17:03:54.405] <TB3> INFO: 16bit words read: 0
[17:03:54.405] <TB3> INFO: valid events total: 0
[17:03:54.405] <TB3> INFO: empty events: 0
[17:03:54.405] <TB3> INFO: valid events with pixels: 0
[17:03:54.405] <TB3> INFO: valid pixel hits: 0
[17:03:54.405] <TB3> INFO: Event errors: 0
[17:03:54.405] <TB3> INFO: start marker: 0
[17:03:54.405] <TB3> INFO: stop marker: 0
[17:03:54.405] <TB3> INFO: overflow: 0
[17:03:54.405] <TB3> INFO: invalid 5bit words: 0
[17:03:54.405] <TB3> INFO: invalid XOR eye diagram: 0
[17:03:54.405] <TB3> INFO: frame (failed synchr.): 0
[17:03:54.405] <TB3> INFO: idle data (no TBM trl): 0
[17:03:54.405] <TB3> INFO: no data (only TBM hdr): 0
[17:03:54.405] <TB3> INFO: TBM errors: 0
[17:03:54.405] <TB3> INFO: flawed TBM headers: 0
[17:03:54.405] <TB3> INFO: flawed TBM trailers: 0
[17:03:54.405] <TB3> INFO: event ID mismatches: 0
[17:03:54.405] <TB3> INFO: ROC errors: 0
[17:03:54.405] <TB3> INFO: missing ROC header(s): 0
[17:03:54.405] <TB3> INFO: misplaced readback start: 0
[17:03:54.405] <TB3> INFO: Pixel decoding errors: 0
[17:03:54.405] <TB3> INFO: pixel data incomplete: 0
[17:03:54.405] <TB3> INFO: pixel address: 0
[17:03:54.405] <TB3> INFO: pulse height fill bit: 0
[17:03:54.405] <TB3> INFO: buffer corruption: 0
[17:03:54.468] <TB3> INFO: ######################################################################
[17:03:54.468] <TB3> INFO: PixTestTrim::doTest()
[17:03:54.468] <TB3> INFO: ######################################################################
[17:03:54.470] <TB3> INFO: ----------------------------------------------------------------------
[17:03:54.470] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[17:03:54.470] <TB3> INFO: ----------------------------------------------------------------------
[17:03:54.509] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:03:54.509] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:03:54.518] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:03:54.518] <TB3> INFO: run 1 of 1
[17:03:54.751] <TB3> INFO: Expecting 5025280 events.
[17:04:24.861] <TB3> INFO: 822624 events read in total (29515ms).
[17:04:54.696] <TB3> INFO: 1643744 events read in total (59350ms).
[17:05:24.380] <TB3> INFO: 2462992 events read in total (89034ms).
[17:05:54.072] <TB3> INFO: 3277600 events read in total (118726ms).
[17:06:23.451] <TB3> INFO: 4089936 events read in total (148105ms).
[17:06:53.193] <TB3> INFO: 4899896 events read in total (177847ms).
[17:06:58.116] <TB3> INFO: 5025280 events read in total (182770ms).
[17:06:58.168] <TB3> INFO: Test took 183650ms.
[17:07:17.906] <TB3> INFO: ROC 0 VthrComp = 122
[17:07:17.906] <TB3> INFO: ROC 1 VthrComp = 132
[17:07:17.906] <TB3> INFO: ROC 2 VthrComp = 127
[17:07:17.906] <TB3> INFO: ROC 3 VthrComp = 130
[17:07:17.906] <TB3> INFO: ROC 4 VthrComp = 122
[17:07:17.907] <TB3> INFO: ROC 5 VthrComp = 132
[17:07:17.907] <TB3> INFO: ROC 6 VthrComp = 130
[17:07:17.907] <TB3> INFO: ROC 7 VthrComp = 118
[17:07:17.907] <TB3> INFO: ROC 8 VthrComp = 116
[17:07:17.907] <TB3> INFO: ROC 9 VthrComp = 128
[17:07:17.907] <TB3> INFO: ROC 10 VthrComp = 108
[17:07:17.907] <TB3> INFO: ROC 11 VthrComp = 113
[17:07:17.908] <TB3> INFO: ROC 12 VthrComp = 117
[17:07:17.908] <TB3> INFO: ROC 13 VthrComp = 124
[17:07:17.908] <TB3> INFO: ROC 14 VthrComp = 120
[17:07:17.908] <TB3> INFO: ROC 15 VthrComp = 126
[17:07:18.140] <TB3> INFO: Expecting 41600 events.
[17:07:21.625] <TB3> INFO: 41600 events read in total (2893ms).
[17:07:21.626] <TB3> INFO: Test took 3717ms.
[17:07:21.635] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[17:07:21.635] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:07:21.645] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:07:21.645] <TB3> INFO: run 1 of 1
[17:07:21.923] <TB3> INFO: Expecting 5025280 events.
[17:07:47.771] <TB3> INFO: 588272 events read in total (25257ms).
[17:08:13.064] <TB3> INFO: 1176032 events read in total (50550ms).
[17:08:38.396] <TB3> INFO: 1764160 events read in total (75882ms).
[17:09:03.628] <TB3> INFO: 2351960 events read in total (101114ms).
[17:09:29.241] <TB3> INFO: 2938352 events read in total (126727ms).
[17:09:54.393] <TB3> INFO: 3523952 events read in total (151879ms).
[17:10:19.589] <TB3> INFO: 4108272 events read in total (177075ms).
[17:10:45.555] <TB3> INFO: 4692384 events read in total (203041ms).
[17:11:00.101] <TB3> INFO: 5025280 events read in total (217587ms).
[17:11:00.166] <TB3> INFO: Test took 218521ms.
[17:11:25.179] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 61.0455 for pixel 0/44 mean/min/max = 46.9211/32.3068/61.5353
[17:11:25.179] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 62.6296 for pixel 17/57 mean/min/max = 47.4236/32.1943/62.6529
[17:11:25.179] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 61.4706 for pixel 0/64 mean/min/max = 45.9879/30.4078/61.568
[17:11:25.180] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 61.3161 for pixel 37/0 mean/min/max = 46.0992/30.5817/61.6168
[17:11:25.180] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.9368 for pixel 17/5 mean/min/max = 46.5801/32.0974/61.0628
[17:11:25.181] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 63.016 for pixel 17/20 mean/min/max = 47.7734/32.4792/63.0677
[17:11:25.181] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 63.8833 for pixel 2/8 mean/min/max = 48.1028/32.2158/63.9899
[17:11:25.181] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.9022 for pixel 18/3 mean/min/max = 45.4278/31.8572/58.9983
[17:11:25.182] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.7334 for pixel 24/79 mean/min/max = 46.2888/31.7619/60.8157
[17:11:25.182] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.155 for pixel 24/10 mean/min/max = 45.3075/32.3892/58.2258
[17:11:25.183] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 64.2353 for pixel 1/6 mean/min/max = 48.9095/33.5371/64.2819
[17:11:25.183] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.2734 for pixel 32/1 mean/min/max = 45.0251/32.736/57.3143
[17:11:25.183] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.9837 for pixel 47/38 mean/min/max = 45.331/31.5144/59.1476
[17:11:25.183] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.1513 for pixel 8/17 mean/min/max = 44.3939/32.1206/56.6673
[17:11:25.184] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.1078 for pixel 20/4 mean/min/max = 46.4751/31.7814/61.1688
[17:11:25.184] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.9673 for pixel 0/3 mean/min/max = 45.9759/30.7962/61.1555
[17:11:25.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:11:25.273] <TB3> INFO: Expecting 411648 events.
[17:11:34.582] <TB3> INFO: 411648 events read in total (8718ms).
[17:11:34.592] <TB3> INFO: Expecting 411648 events.
[17:11:43.617] <TB3> INFO: 411648 events read in total (8622ms).
[17:11:43.630] <TB3> INFO: Expecting 411648 events.
[17:11:52.651] <TB3> INFO: 411648 events read in total (8618ms).
[17:11:52.662] <TB3> INFO: Expecting 411648 events.
[17:12:01.704] <TB3> INFO: 411648 events read in total (8638ms).
[17:12:01.724] <TB3> INFO: Expecting 411648 events.
[17:12:10.778] <TB3> INFO: 411648 events read in total (8651ms).
[17:12:10.803] <TB3> INFO: Expecting 411648 events.
[17:12:19.838] <TB3> INFO: 411648 events read in total (8633ms).
[17:12:19.857] <TB3> INFO: Expecting 411648 events.
[17:12:28.831] <TB3> INFO: 411648 events read in total (8571ms).
[17:12:28.858] <TB3> INFO: Expecting 411648 events.
[17:12:37.854] <TB3> INFO: 411648 events read in total (8593ms).
[17:12:37.880] <TB3> INFO: Expecting 411648 events.
[17:12:46.924] <TB3> INFO: 411648 events read in total (8641ms).
[17:12:46.962] <TB3> INFO: Expecting 411648 events.
[17:12:56.066] <TB3> INFO: 411648 events read in total (8701ms).
[17:12:56.100] <TB3> INFO: Expecting 411648 events.
[17:13:05.131] <TB3> INFO: 411648 events read in total (8629ms).
[17:13:05.174] <TB3> INFO: Expecting 411648 events.
[17:13:14.185] <TB3> INFO: 411648 events read in total (8608ms).
[17:13:14.235] <TB3> INFO: Expecting 411648 events.
[17:13:23.253] <TB3> INFO: 411648 events read in total (8615ms).
[17:13:23.295] <TB3> INFO: Expecting 411648 events.
[17:13:32.470] <TB3> INFO: 411648 events read in total (8772ms).
[17:13:32.514] <TB3> INFO: Expecting 411648 events.
[17:13:41.657] <TB3> INFO: 411648 events read in total (8740ms).
[17:13:41.709] <TB3> INFO: Expecting 411648 events.
[17:13:50.828] <TB3> INFO: 411648 events read in total (8716ms).
[17:13:50.876] <TB3> INFO: Test took 145692ms.
[17:13:51.646] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[17:13:51.656] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:13:51.656] <TB3> INFO: run 1 of 1
[17:13:51.895] <TB3> INFO: Expecting 5025280 events.
[17:14:17.853] <TB3> INFO: 588144 events read in total (25366ms).
[17:14:43.404] <TB3> INFO: 1174072 events read in total (50917ms).
[17:15:08.838] <TB3> INFO: 1760032 events read in total (76351ms).
[17:15:34.529] <TB3> INFO: 2346960 events read in total (102042ms).
[17:16:00.102] <TB3> INFO: 2934008 events read in total (127615ms).
[17:16:25.561] <TB3> INFO: 3522336 events read in total (153075ms).
[17:16:51.530] <TB3> INFO: 4111464 events read in total (179043ms).
[17:17:17.287] <TB3> INFO: 4701032 events read in total (204800ms).
[17:17:32.083] <TB3> INFO: 5025280 events read in total (219596ms).
[17:17:32.201] <TB3> INFO: Test took 220546ms.
[17:17:55.737] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 145.117430
[17:17:55.990] <TB3> INFO: Expecting 208000 events.
[17:18:05.274] <TB3> INFO: 208000 events read in total (8693ms).
[17:18:05.275] <TB3> INFO: Test took 9535ms.
[17:18:05.321] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 155 (-1/-1) hits flags = 528 (plus default)
[17:18:05.330] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:18:05.330] <TB3> INFO: run 1 of 1
[17:18:05.608] <TB3> INFO: Expecting 5125120 events.
[17:18:31.439] <TB3> INFO: 583576 events read in total (25239ms).
[17:18:56.457] <TB3> INFO: 1166696 events read in total (50258ms).
[17:19:21.890] <TB3> INFO: 1749336 events read in total (75690ms).
[17:19:47.305] <TB3> INFO: 2332712 events read in total (101105ms).
[17:20:12.306] <TB3> INFO: 2915752 events read in total (126106ms).
[17:20:37.581] <TB3> INFO: 3498568 events read in total (151381ms).
[17:21:02.832] <TB3> INFO: 4080216 events read in total (176633ms).
[17:21:28.123] <TB3> INFO: 4661192 events read in total (201923ms).
[17:21:49.185] <TB3> INFO: 5125120 events read in total (222985ms).
[17:21:49.257] <TB3> INFO: Test took 223928ms.
[17:22:18.096] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 27.500000 .. 46.605510
[17:22:18.334] <TB3> INFO: Expecting 208000 events.
[17:22:28.092] <TB3> INFO: 208000 events read in total (9166ms).
[17:22:28.092] <TB3> INFO: Test took 9995ms.
[17:22:28.159] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[17:22:28.170] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:22:28.170] <TB3> INFO: run 1 of 1
[17:22:28.448] <TB3> INFO: Expecting 1331200 events.
[17:22:56.390] <TB3> INFO: 654528 events read in total (27350ms).
[17:23:23.680] <TB3> INFO: 1306336 events read in total (54640ms).
[17:23:25.121] <TB3> INFO: 1331200 events read in total (56082ms).
[17:23:25.145] <TB3> INFO: Test took 56975ms.
[17:23:39.763] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 24.286566 .. 46.406296
[17:23:39.998] <TB3> INFO: Expecting 208000 events.
[17:23:49.589] <TB3> INFO: 208000 events read in total (9000ms).
[17:23:49.589] <TB3> INFO: Test took 9825ms.
[17:23:49.635] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 14 .. 56 (-1/-1) hits flags = 528 (plus default)
[17:23:49.644] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:23:49.644] <TB3> INFO: run 1 of 1
[17:23:49.922] <TB3> INFO: Expecting 1431040 events.
[17:24:18.174] <TB3> INFO: 667096 events read in total (27660ms).
[17:24:45.528] <TB3> INFO: 1332536 events read in total (55014ms).
[17:24:49.892] <TB3> INFO: 1431040 events read in total (59378ms).
[17:24:49.916] <TB3> INFO: Test took 60273ms.
[17:25:04.087] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 24.541904 .. 45.604234
[17:25:04.322] <TB3> INFO: Expecting 208000 events.
[17:25:13.843] <TB3> INFO: 208000 events read in total (8929ms).
[17:25:13.844] <TB3> INFO: Test took 9756ms.
[17:25:13.889] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 14 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:25:13.898] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:25:13.898] <TB3> INFO: run 1 of 1
[17:25:14.175] <TB3> INFO: Expecting 1397760 events.
[17:25:42.137] <TB3> INFO: 670936 events read in total (27370ms).
[17:26:10.131] <TB3> INFO: 1341504 events read in total (55364ms).
[17:26:12.939] <TB3> INFO: 1397760 events read in total (58173ms).
[17:26:12.965] <TB3> INFO: Test took 59068ms.
[17:26:26.108] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:26:26.108] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:26:26.118] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:26:26.118] <TB3> INFO: run 1 of 1
[17:26:26.350] <TB3> INFO: Expecting 1364480 events.
[17:26:54.400] <TB3> INFO: 666904 events read in total (27458ms).
[17:27:22.336] <TB3> INFO: 1333152 events read in total (55394ms).
[17:27:24.081] <TB3> INFO: 1364480 events read in total (57140ms).
[17:27:24.104] <TB3> INFO: Test took 57986ms.
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C0.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C1.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C2.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C3.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C4.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C5.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C6.dat
[17:27:36.346] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C7.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C8.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C9.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C10.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C11.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C12.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C13.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C14.dat
[17:27:36.347] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C15.dat
[17:27:36.347] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C0.dat
[17:27:36.355] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C1.dat
[17:27:36.363] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C2.dat
[17:27:36.371] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C3.dat
[17:27:36.377] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C4.dat
[17:27:36.382] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C5.dat
[17:27:36.387] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C6.dat
[17:27:36.393] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C7.dat
[17:27:36.398] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C8.dat
[17:27:36.404] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C9.dat
[17:27:36.409] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C10.dat
[17:27:36.415] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C11.dat
[17:27:36.420] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C12.dat
[17:27:36.426] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C13.dat
[17:27:36.431] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C14.dat
[17:27:36.436] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters35_C15.dat
[17:27:36.442] <TB3> INFO: PixTestTrim::trimTest() done
[17:27:36.442] <TB3> INFO: vtrim: 154 162 134 134 131 164 149 146 140 165 122 135 141 152 126 152
[17:27:36.442] <TB3> INFO: vthrcomp: 122 132 127 130 122 132 130 118 116 128 108 113 117 124 120 126
[17:27:36.442] <TB3> INFO: vcal mean: 35.04 35.03 34.90 34.92 34.96 35.01 35.16 34.93 34.95 34.99 35.11 34.96 34.93 34.94 34.99 34.98
[17:27:36.442] <TB3> INFO: vcal RMS: 1.21 1.28 1.14 1.19 1.19 1.11 1.28 1.08 1.07 0.99 1.20 1.06 1.16 0.97 1.13 1.22
[17:27:36.442] <TB3> INFO: bits mean: 9.99 10.12 9.59 9.96 9.97 9.72 9.61 10.00 9.66 10.24 9.23 9.75 10.44 10.18 9.65 10.21
[17:27:36.442] <TB3> INFO: bits RMS: 2.39 2.29 2.82 2.63 2.40 2.39 2.55 2.51 2.63 2.34 2.47 2.52 2.35 2.44 2.63 2.49
[17:27:36.449] <TB3> INFO: ----------------------------------------------------------------------
[17:27:36.449] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:27:36.449] <TB3> INFO: ----------------------------------------------------------------------
[17:27:36.451] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:27:36.462] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:27:36.462] <TB3> INFO: run 1 of 1
[17:27:36.694] <TB3> INFO: Expecting 4160000 events.
[17:28:08.362] <TB3> INFO: 742475 events read in total (31077ms).
[17:28:39.479] <TB3> INFO: 1478145 events read in total (62194ms).
[17:29:10.717] <TB3> INFO: 2210320 events read in total (93432ms).
[17:29:41.863] <TB3> INFO: 2939695 events read in total (124578ms).
[17:30:12.789] <TB3> INFO: 3666750 events read in total (155504ms).
[17:30:33.989] <TB3> INFO: 4160000 events read in total (176704ms).
[17:30:34.047] <TB3> INFO: Test took 177585ms.
[17:31:02.446] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[17:31:02.455] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:31:02.455] <TB3> INFO: run 1 of 1
[17:31:02.687] <TB3> INFO: Expecting 4305600 events.
[17:31:33.616] <TB3> INFO: 710815 events read in total (30337ms).
[17:32:03.944] <TB3> INFO: 1416800 events read in total (60665ms).
[17:32:34.655] <TB3> INFO: 2120120 events read in total (91376ms).
[17:33:04.790] <TB3> INFO: 2819980 events read in total (121511ms).
[17:33:35.160] <TB3> INFO: 3518735 events read in total (151881ms).
[17:34:06.293] <TB3> INFO: 4218425 events read in total (183014ms).
[17:34:10.295] <TB3> INFO: 4305600 events read in total (187016ms).
[17:34:10.353] <TB3> INFO: Test took 187899ms.
[17:34:40.408] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[17:34:40.417] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:34:40.417] <TB3> INFO: run 1 of 1
[17:34:40.649] <TB3> INFO: Expecting 4118400 events.
[17:35:11.743] <TB3> INFO: 722020 events read in total (30503ms).
[17:35:42.222] <TB3> INFO: 1438705 events read in total (60982ms).
[17:36:12.711] <TB3> INFO: 2152620 events read in total (91471ms).
[17:36:43.055] <TB3> INFO: 2863270 events read in total (121815ms).
[17:37:13.812] <TB3> INFO: 3572410 events read in total (152572ms).
[17:37:37.158] <TB3> INFO: 4118400 events read in total (175918ms).
[17:37:37.233] <TB3> INFO: Test took 176816ms.
[17:38:05.080] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[17:38:05.090] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:38:05.090] <TB3> INFO: run 1 of 1
[17:38:05.322] <TB3> INFO: Expecting 4139200 events.
[17:38:36.713] <TB3> INFO: 721080 events read in total (30799ms).
[17:39:07.097] <TB3> INFO: 1436660 events read in total (61183ms).
[17:39:37.409] <TB3> INFO: 2149805 events read in total (91495ms).
[17:40:07.902] <TB3> INFO: 2859375 events read in total (121988ms).
[17:40:38.099] <TB3> INFO: 3567400 events read in total (152185ms).
[17:41:03.378] <TB3> INFO: 4139200 events read in total (177464ms).
[17:41:03.447] <TB3> INFO: Test took 178357ms.
[17:41:30.319] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[17:41:30.328] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:41:30.328] <TB3> INFO: run 1 of 1
[17:41:30.559] <TB3> INFO: Expecting 4139200 events.
[17:42:01.504] <TB3> INFO: 721240 events read in total (30353ms).
[17:42:31.900] <TB3> INFO: 1437090 events read in total (60749ms).
[17:43:02.333] <TB3> INFO: 2150225 events read in total (91182ms).
[17:43:32.881] <TB3> INFO: 2859965 events read in total (121730ms).
[17:44:03.338] <TB3> INFO: 3568190 events read in total (152187ms).
[17:44:27.903] <TB3> INFO: 4139200 events read in total (176752ms).
[17:44:27.958] <TB3> INFO: Test took 177630ms.
[17:44:55.175] <TB3> INFO: PixTestTrim::trimBitTest() done
[17:44:55.176] <TB3> INFO: PixTestTrim::doTest() done, duration: 2460 seconds
[17:44:55.176] <TB3> INFO: Decoding statistics:
[17:44:55.176] <TB3> INFO: General information:
[17:44:55.176] <TB3> INFO: 16bit words read: 0
[17:44:55.176] <TB3> INFO: valid events total: 0
[17:44:55.176] <TB3> INFO: empty events: 0
[17:44:55.176] <TB3> INFO: valid events with pixels: 0
[17:44:55.176] <TB3> INFO: valid pixel hits: 0
[17:44:55.176] <TB3> INFO: Event errors: 0
[17:44:55.176] <TB3> INFO: start marker: 0
[17:44:55.176] <TB3> INFO: stop marker: 0
[17:44:55.176] <TB3> INFO: overflow: 0
[17:44:55.176] <TB3> INFO: invalid 5bit words: 0
[17:44:55.176] <TB3> INFO: invalid XOR eye diagram: 0
[17:44:55.176] <TB3> INFO: frame (failed synchr.): 0
[17:44:55.176] <TB3> INFO: idle data (no TBM trl): 0
[17:44:55.176] <TB3> INFO: no data (only TBM hdr): 0
[17:44:55.176] <TB3> INFO: TBM errors: 0
[17:44:55.176] <TB3> INFO: flawed TBM headers: 0
[17:44:55.176] <TB3> INFO: flawed TBM trailers: 0
[17:44:55.176] <TB3> INFO: event ID mismatches: 0
[17:44:55.176] <TB3> INFO: ROC errors: 0
[17:44:55.176] <TB3> INFO: missing ROC header(s): 0
[17:44:55.176] <TB3> INFO: misplaced readback start: 0
[17:44:55.176] <TB3> INFO: Pixel decoding errors: 0
[17:44:55.176] <TB3> INFO: pixel data incomplete: 0
[17:44:55.176] <TB3> INFO: pixel address: 0
[17:44:55.176] <TB3> INFO: pulse height fill bit: 0
[17:44:55.176] <TB3> INFO: buffer corruption: 0
[17:44:55.797] <TB3> INFO: ######################################################################
[17:44:55.797] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:44:55.797] <TB3> INFO: ######################################################################
[17:44:56.060] <TB3> INFO: Expecting 41600 events.
[17:44:59.655] <TB3> INFO: 41600 events read in total (3004ms).
[17:44:59.656] <TB3> INFO: Test took 3858ms.
[17:45:00.093] <TB3> INFO: Expecting 41600 events.
[17:45:03.576] <TB3> INFO: 41600 events read in total (2892ms).
[17:45:03.576] <TB3> INFO: Test took 3716ms.
[17:45:03.864] <TB3> INFO: Expecting 41600 events.
[17:45:07.439] <TB3> INFO: 41600 events read in total (2983ms).
[17:45:07.440] <TB3> INFO: Test took 3841ms.
[17:45:07.728] <TB3> INFO: Expecting 41600 events.
[17:45:11.288] <TB3> INFO: 41600 events read in total (2969ms).
[17:45:11.289] <TB3> INFO: Test took 3826ms.
[17:45:11.578] <TB3> INFO: Expecting 41600 events.
[17:45:15.066] <TB3> INFO: 41600 events read in total (2897ms).
[17:45:15.066] <TB3> INFO: Test took 3753ms.
[17:45:15.354] <TB3> INFO: Expecting 41600 events.
[17:45:18.856] <TB3> INFO: 41600 events read in total (2910ms).
[17:45:18.857] <TB3> INFO: Test took 3768ms.
[17:45:19.145] <TB3> INFO: Expecting 41600 events.
[17:45:22.700] <TB3> INFO: 41600 events read in total (2963ms).
[17:45:22.700] <TB3> INFO: Test took 3820ms.
[17:45:22.989] <TB3> INFO: Expecting 41600 events.
[17:45:26.439] <TB3> INFO: 41600 events read in total (2859ms).
[17:45:26.440] <TB3> INFO: Test took 3716ms.
[17:45:26.728] <TB3> INFO: Expecting 41600 events.
[17:45:30.338] <TB3> INFO: 41600 events read in total (3019ms).
[17:45:30.339] <TB3> INFO: Test took 3876ms.
[17:45:30.627] <TB3> INFO: Expecting 41600 events.
[17:45:34.101] <TB3> INFO: 41600 events read in total (2883ms).
[17:45:34.102] <TB3> INFO: Test took 3740ms.
[17:45:34.390] <TB3> INFO: Expecting 41600 events.
[17:45:37.975] <TB3> INFO: 41600 events read in total (2994ms).
[17:45:37.976] <TB3> INFO: Test took 3851ms.
[17:45:38.266] <TB3> INFO: Expecting 41600 events.
[17:45:41.787] <TB3> INFO: 41600 events read in total (2929ms).
[17:45:41.787] <TB3> INFO: Test took 3785ms.
[17:45:42.078] <TB3> INFO: Expecting 41600 events.
[17:45:45.596] <TB3> INFO: 41600 events read in total (2927ms).
[17:45:45.596] <TB3> INFO: Test took 3784ms.
[17:45:45.884] <TB3> INFO: Expecting 41600 events.
[17:45:49.366] <TB3> INFO: 41600 events read in total (2890ms).
[17:45:49.366] <TB3> INFO: Test took 3746ms.
[17:45:49.654] <TB3> INFO: Expecting 41600 events.
[17:45:53.194] <TB3> INFO: 41600 events read in total (2948ms).
[17:45:53.195] <TB3> INFO: Test took 3805ms.
[17:45:53.483] <TB3> INFO: Expecting 41600 events.
[17:45:57.050] <TB3> INFO: 41600 events read in total (2975ms).
[17:45:57.050] <TB3> INFO: Test took 3832ms.
[17:45:57.349] <TB3> INFO: Expecting 41600 events.
[17:46:00.802] <TB3> INFO: 41600 events read in total (2861ms).
[17:46:00.803] <TB3> INFO: Test took 3729ms.
[17:46:01.094] <TB3> INFO: Expecting 41600 events.
[17:46:04.604] <TB3> INFO: 41600 events read in total (2919ms).
[17:46:04.605] <TB3> INFO: Test took 3776ms.
[17:46:04.893] <TB3> INFO: Expecting 41600 events.
[17:46:08.354] <TB3> INFO: 41600 events read in total (2869ms).
[17:46:08.355] <TB3> INFO: Test took 3727ms.
[17:46:08.651] <TB3> INFO: Expecting 41600 events.
[17:46:12.127] <TB3> INFO: 41600 events read in total (2884ms).
[17:46:12.128] <TB3> INFO: Test took 3750ms.
[17:46:12.418] <TB3> INFO: Expecting 41600 events.
[17:46:15.866] <TB3> INFO: 41600 events read in total (2856ms).
[17:46:15.867] <TB3> INFO: Test took 3713ms.
[17:46:16.154] <TB3> INFO: Expecting 41600 events.
[17:46:19.632] <TB3> INFO: 41600 events read in total (2887ms).
[17:46:19.633] <TB3> INFO: Test took 3743ms.
[17:46:19.924] <TB3> INFO: Expecting 41600 events.
[17:46:23.448] <TB3> INFO: 41600 events read in total (2933ms).
[17:46:23.449] <TB3> INFO: Test took 3790ms.
[17:46:23.737] <TB3> INFO: Expecting 41600 events.
[17:46:27.265] <TB3> INFO: 41600 events read in total (2936ms).
[17:46:27.266] <TB3> INFO: Test took 3793ms.
[17:46:27.564] <TB3> INFO: Expecting 41600 events.
[17:46:31.075] <TB3> INFO: 41600 events read in total (2920ms).
[17:46:31.076] <TB3> INFO: Test took 3787ms.
[17:46:31.374] <TB3> INFO: Expecting 41600 events.
[17:46:34.820] <TB3> INFO: 41600 events read in total (2854ms).
[17:46:34.821] <TB3> INFO: Test took 3719ms.
[17:46:35.114] <TB3> INFO: Expecting 41600 events.
[17:46:38.599] <TB3> INFO: 41600 events read in total (2893ms).
[17:46:38.600] <TB3> INFO: Test took 3756ms.
[17:46:38.888] <TB3> INFO: Expecting 41600 events.
[17:46:42.406] <TB3> INFO: 41600 events read in total (2926ms).
[17:46:42.407] <TB3> INFO: Test took 3784ms.
[17:46:42.695] <TB3> INFO: Expecting 41600 events.
[17:46:46.150] <TB3> INFO: 41600 events read in total (2863ms).
[17:46:46.150] <TB3> INFO: Test took 3719ms.
[17:46:46.438] <TB3> INFO: Expecting 41600 events.
[17:46:49.938] <TB3> INFO: 41600 events read in total (2908ms).
[17:46:49.939] <TB3> INFO: Test took 3765ms.
[17:46:50.227] <TB3> INFO: Expecting 41600 events.
[17:46:53.766] <TB3> INFO: 41600 events read in total (2947ms).
[17:46:53.766] <TB3> INFO: Test took 3803ms.
[17:46:54.057] <TB3> INFO: Expecting 41600 events.
[17:46:57.712] <TB3> INFO: 41600 events read in total (3064ms).
[17:46:57.713] <TB3> INFO: Test took 3921ms.
[17:46:57.003] <TB3> INFO: Expecting 41600 events.
[17:47:01.532] <TB3> INFO: 41600 events read in total (2937ms).
[17:47:01.533] <TB3> INFO: Test took 3794ms.
[17:47:01.821] <TB3> INFO: Expecting 41600 events.
[17:47:05.277] <TB3> INFO: 41600 events read in total (2865ms).
[17:47:05.277] <TB3> INFO: Test took 3721ms.
[17:47:05.566] <TB3> INFO: Expecting 41600 events.
[17:47:09.079] <TB3> INFO: 41600 events read in total (2922ms).
[17:47:09.079] <TB3> INFO: Test took 3778ms.
[17:47:09.368] <TB3> INFO: Expecting 41600 events.
[17:47:12.907] <TB3> INFO: 41600 events read in total (2948ms).
[17:47:12.907] <TB3> INFO: Test took 3804ms.
[17:47:13.196] <TB3> INFO: Expecting 41600 events.
[17:47:16.701] <TB3> INFO: 41600 events read in total (2913ms).
[17:47:16.702] <TB3> INFO: Test took 3770ms.
[17:47:16.990] <TB3> INFO: Expecting 41600 events.
[17:47:20.459] <TB3> INFO: 41600 events read in total (2876ms).
[17:47:20.460] <TB3> INFO: Test took 3734ms.
[17:47:20.787] <TB3> INFO: Expecting 41600 events.
[17:47:24.243] <TB3> INFO: 41600 events read in total (2864ms).
[17:47:24.243] <TB3> INFO: Test took 3760ms.
[17:47:24.531] <TB3> INFO: Expecting 41600 events.
[17:47:28.092] <TB3> INFO: 41600 events read in total (2969ms).
[17:47:28.092] <TB3> INFO: Test took 3825ms.
[17:47:28.380] <TB3> INFO: Expecting 41600 events.
[17:47:31.866] <TB3> INFO: 41600 events read in total (2894ms).
[17:47:31.866] <TB3> INFO: Test took 3751ms.
[17:47:32.155] <TB3> INFO: Expecting 41600 events.
[17:47:35.686] <TB3> INFO: 41600 events read in total (2940ms).
[17:47:35.687] <TB3> INFO: Test took 3797ms.
[17:47:35.975] <TB3> INFO: Expecting 41600 events.
[17:47:39.428] <TB3> INFO: 41600 events read in total (2862ms).
[17:47:39.429] <TB3> INFO: Test took 3719ms.
[17:47:39.719] <TB3> INFO: Expecting 41600 events.
[17:47:43.252] <TB3> INFO: 41600 events read in total (2941ms).
[17:47:43.253] <TB3> INFO: Test took 3798ms.
[17:47:43.541] <TB3> INFO: Expecting 41600 events.
[17:47:47.068] <TB3> INFO: 41600 events read in total (2935ms).
[17:47:47.069] <TB3> INFO: Test took 3792ms.
[17:47:47.357] <TB3> INFO: Expecting 41600 events.
[17:47:50.815] <TB3> INFO: 41600 events read in total (2867ms).
[17:47:50.816] <TB3> INFO: Test took 3724ms.
[17:47:51.105] <TB3> INFO: Expecting 41600 events.
[17:47:54.577] <TB3> INFO: 41600 events read in total (2881ms).
[17:47:54.578] <TB3> INFO: Test took 3738ms.
[17:47:54.866] <TB3> INFO: Expecting 41600 events.
[17:47:58.343] <TB3> INFO: 41600 events read in total (2885ms).
[17:47:58.343] <TB3> INFO: Test took 3742ms.
[17:47:58.632] <TB3> INFO: Expecting 41600 events.
[17:48:02.118] <TB3> INFO: 41600 events read in total (2895ms).
[17:48:02.119] <TB3> INFO: Test took 3752ms.
[17:48:02.408] <TB3> INFO: Expecting 41600 events.
[17:48:05.972] <TB3> INFO: 41600 events read in total (2972ms).
[17:48:05.973] <TB3> INFO: Test took 3830ms.
[17:48:06.261] <TB3> INFO: Expecting 41600 events.
[17:48:09.817] <TB3> INFO: 41600 events read in total (2964ms).
[17:48:09.817] <TB3> INFO: Test took 3821ms.
[17:48:10.108] <TB3> INFO: Expecting 41600 events.
[17:48:13.625] <TB3> INFO: 41600 events read in total (2925ms).
[17:48:13.626] <TB3> INFO: Test took 3783ms.
[17:48:13.921] <TB3> INFO: Expecting 41600 events.
[17:48:17.420] <TB3> INFO: 41600 events read in total (2908ms).
[17:48:17.421] <TB3> INFO: Test took 3771ms.
[17:48:17.710] <TB3> INFO: Expecting 41600 events.
[17:48:21.189] <TB3> INFO: 41600 events read in total (2887ms).
[17:48:21.190] <TB3> INFO: Test took 3744ms.
[17:48:21.478] <TB3> INFO: Expecting 2560 events.
[17:48:22.361] <TB3> INFO: 2560 events read in total (291ms).
[17:48:22.361] <TB3> INFO: Test took 1159ms.
[17:48:22.669] <TB3> INFO: Expecting 2560 events.
[17:48:23.552] <TB3> INFO: 2560 events read in total (291ms).
[17:48:23.553] <TB3> INFO: Test took 1191ms.
[17:48:23.861] <TB3> INFO: Expecting 2560 events.
[17:48:24.747] <TB3> INFO: 2560 events read in total (295ms).
[17:48:24.747] <TB3> INFO: Test took 1194ms.
[17:48:25.055] <TB3> INFO: Expecting 2560 events.
[17:48:25.938] <TB3> INFO: 2560 events read in total (291ms).
[17:48:25.938] <TB3> INFO: Test took 1190ms.
[17:48:26.246] <TB3> INFO: Expecting 2560 events.
[17:48:27.127] <TB3> INFO: 2560 events read in total (289ms).
[17:48:27.128] <TB3> INFO: Test took 1190ms.
[17:48:27.435] <TB3> INFO: Expecting 2560 events.
[17:48:28.315] <TB3> INFO: 2560 events read in total (288ms).
[17:48:28.315] <TB3> INFO: Test took 1187ms.
[17:48:28.623] <TB3> INFO: Expecting 2560 events.
[17:48:29.501] <TB3> INFO: 2560 events read in total (287ms).
[17:48:29.501] <TB3> INFO: Test took 1186ms.
[17:48:29.809] <TB3> INFO: Expecting 2560 events.
[17:48:30.686] <TB3> INFO: 2560 events read in total (285ms).
[17:48:30.686] <TB3> INFO: Test took 1185ms.
[17:48:30.995] <TB3> INFO: Expecting 2560 events.
[17:48:31.874] <TB3> INFO: 2560 events read in total (288ms).
[17:48:31.874] <TB3> INFO: Test took 1187ms.
[17:48:32.182] <TB3> INFO: Expecting 2560 events.
[17:48:33.061] <TB3> INFO: 2560 events read in total (287ms).
[17:48:33.061] <TB3> INFO: Test took 1187ms.
[17:48:33.370] <TB3> INFO: Expecting 2560 events.
[17:48:34.248] <TB3> INFO: 2560 events read in total (287ms).
[17:48:34.248] <TB3> INFO: Test took 1186ms.
[17:48:34.556] <TB3> INFO: Expecting 2560 events.
[17:48:35.436] <TB3> INFO: 2560 events read in total (288ms).
[17:48:35.436] <TB3> INFO: Test took 1188ms.
[17:48:35.744] <TB3> INFO: Expecting 2560 events.
[17:48:36.627] <TB3> INFO: 2560 events read in total (292ms).
[17:48:36.627] <TB3> INFO: Test took 1191ms.
[17:48:36.935] <TB3> INFO: Expecting 2560 events.
[17:48:37.817] <TB3> INFO: 2560 events read in total (291ms).
[17:48:37.818] <TB3> INFO: Test took 1191ms.
[17:48:38.126] <TB3> INFO: Expecting 2560 events.
[17:48:39.008] <TB3> INFO: 2560 events read in total (292ms).
[17:48:39.009] <TB3> INFO: Test took 1191ms.
[17:48:39.316] <TB3> INFO: Expecting 2560 events.
[17:48:40.198] <TB3> INFO: 2560 events read in total (290ms).
[17:48:40.198] <TB3> INFO: Test took 1189ms.
[17:48:40.201] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:48:40.507] <TB3> INFO: Expecting 655360 events.
[17:48:54.783] <TB3> INFO: 655360 events read in total (13685ms).
[17:48:54.794] <TB3> INFO: Expecting 655360 events.
[17:49:08.924] <TB3> INFO: 655360 events read in total (13727ms).
[17:49:08.943] <TB3> INFO: Expecting 655360 events.
[17:49:23.023] <TB3> INFO: 655360 events read in total (13677ms).
[17:49:23.042] <TB3> INFO: Expecting 655360 events.
[17:49:37.096] <TB3> INFO: 655360 events read in total (13652ms).
[17:49:37.119] <TB3> INFO: Expecting 655360 events.
[17:49:51.227] <TB3> INFO: 655360 events read in total (13705ms).
[17:49:51.254] <TB3> INFO: Expecting 655360 events.
[17:50:05.281] <TB3> INFO: 655360 events read in total (13624ms).
[17:50:05.311] <TB3> INFO: Expecting 655360 events.
[17:50:19.405] <TB3> INFO: 655360 events read in total (13690ms).
[17:50:19.453] <TB3> INFO: Expecting 655360 events.
[17:50:33.524] <TB3> INFO: 655360 events read in total (13668ms).
[17:50:33.575] <TB3> INFO: Expecting 655360 events.
[17:50:47.810] <TB3> INFO: 655360 events read in total (13832ms).
[17:50:47.853] <TB3> INFO: Expecting 655360 events.
[17:51:01.974] <TB3> INFO: 655360 events read in total (13718ms).
[17:51:02.038] <TB3> INFO: Expecting 655360 events.
[17:51:16.062] <TB3> INFO: 655360 events read in total (13621ms).
[17:51:16.116] <TB3> INFO: Expecting 655360 events.
[17:51:30.268] <TB3> INFO: 655360 events read in total (13749ms).
[17:51:30.333] <TB3> INFO: Expecting 655360 events.
[17:51:44.462] <TB3> INFO: 655360 events read in total (13726ms).
[17:51:44.545] <TB3> INFO: Expecting 655360 events.
[17:51:58.629] <TB3> INFO: 655360 events read in total (13681ms).
[17:51:58.696] <TB3> INFO: Expecting 655360 events.
[17:52:12.743] <TB3> INFO: 655360 events read in total (13644ms).
[17:52:12.835] <TB3> INFO: Expecting 655360 events.
[17:52:26.498] <TB3> INFO: 655360 events read in total (13260ms).
[17:52:26.571] <TB3> INFO: Test took 226370ms.
[17:52:26.650] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:52:26.915] <TB3> INFO: Expecting 655360 events.
[17:52:41.059] <TB3> INFO: 655360 events read in total (13552ms).
[17:52:41.072] <TB3> INFO: Expecting 655360 events.
[17:52:54.930] <TB3> INFO: 655360 events read in total (13455ms).
[17:52:54.944] <TB3> INFO: Expecting 655360 events.
[17:53:08.898] <TB3> INFO: 655360 events read in total (13551ms).
[17:53:08.922] <TB3> INFO: Expecting 655360 events.
[17:53:22.927] <TB3> INFO: 655360 events read in total (13602ms).
[17:53:22.950] <TB3> INFO: Expecting 655360 events.
[17:53:36.971] <TB3> INFO: 655360 events read in total (13618ms).
[17:53:36.002] <TB3> INFO: Expecting 655360 events.
[17:53:50.939] <TB3> INFO: 655360 events read in total (13534ms).
[17:53:50.980] <TB3> INFO: Expecting 655360 events.
[17:54:04.908] <TB3> INFO: 655360 events read in total (13525ms).
[17:54:04.955] <TB3> INFO: Expecting 655360 events.
[17:54:18.967] <TB3> INFO: 655360 events read in total (13609ms).
[17:54:19.013] <TB3> INFO: Expecting 655360 events.
[17:54:32.842] <TB3> INFO: 655360 events read in total (13427ms).
[17:54:32.886] <TB3> INFO: Expecting 655360 events.
[17:54:46.801] <TB3> INFO: 655360 events read in total (13512ms).
[17:54:46.855] <TB3> INFO: Expecting 655360 events.
[17:55:00.872] <TB3> INFO: 655360 events read in total (13614ms).
[17:55:00.941] <TB3> INFO: Expecting 655360 events.
[17:55:14.978] <TB3> INFO: 655360 events read in total (13634ms).
[17:55:15.036] <TB3> INFO: Expecting 655360 events.
[17:55:28.911] <TB3> INFO: 655360 events read in total (13472ms).
[17:55:28.972] <TB3> INFO: Expecting 655360 events.
[17:55:42.991] <TB3> INFO: 655360 events read in total (13616ms).
[17:55:43.058] <TB3> INFO: Expecting 655360 events.
[17:55:57.047] <TB3> INFO: 655360 events read in total (13586ms).
[17:55:57.117] <TB3> INFO: Expecting 655360 events.
[17:56:11.220] <TB3> INFO: 655360 events read in total (13700ms).
[17:56:11.321] <TB3> INFO: Test took 224671ms.
[17:56:11.495] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.499] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.504] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.509] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.513] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.518] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.523] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.527] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.532] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.536] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:56:11.541] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.546] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.551] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:56:11.555] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:56:11.560] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:56:11.564] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.569] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.574] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.579] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:56:11.583] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:56:11.588] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:56:11.592] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.597] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[17:56:11.601] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[17:56:11.606] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[17:56:11.611] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[17:56:11.617] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[17:56:11.622] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[17:56:11.626] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[17:56:11.631] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[17:56:11.636] <TB3> INFO: safety margin for low PH: adding 8, margin is now 28
[17:56:11.641] <TB3> INFO: safety margin for low PH: adding 9, margin is now 29
[17:56:11.675] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C0.dat
[17:56:11.675] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C1.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C2.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C3.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C4.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C5.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C6.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C7.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C8.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C9.dat
[17:56:11.676] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C10.dat
[17:56:11.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C11.dat
[17:56:11.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C12.dat
[17:56:11.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C13.dat
[17:56:11.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C14.dat
[17:56:11.677] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters35_C15.dat
[17:56:11.953] <TB3> INFO: Expecting 41600 events.
[17:56:15.118] <TB3> INFO: 41600 events read in total (2571ms).
[17:56:15.118] <TB3> INFO: Test took 3438ms.
[17:56:15.564] <TB3> INFO: Expecting 41600 events.
[17:56:18.605] <TB3> INFO: 41600 events read in total (2450ms).
[17:56:18.606] <TB3> INFO: Test took 3276ms.
[17:56:19.049] <TB3> INFO: Expecting 41600 events.
[17:56:22.150] <TB3> INFO: 41600 events read in total (2510ms).
[17:56:22.151] <TB3> INFO: Test took 3335ms.
[17:56:22.365] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:22.454] <TB3> INFO: Expecting 2560 events.
[17:56:23.338] <TB3> INFO: 2560 events read in total (292ms).
[17:56:23.338] <TB3> INFO: Test took 973ms.
[17:56:23.340] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:23.646] <TB3> INFO: Expecting 2560 events.
[17:56:24.529] <TB3> INFO: 2560 events read in total (291ms).
[17:56:24.529] <TB3> INFO: Test took 1189ms.
[17:56:24.531] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:24.838] <TB3> INFO: Expecting 2560 events.
[17:56:25.721] <TB3> INFO: 2560 events read in total (292ms).
[17:56:25.721] <TB3> INFO: Test took 1190ms.
[17:56:25.723] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:26.029] <TB3> INFO: Expecting 2560 events.
[17:56:26.912] <TB3> INFO: 2560 events read in total (291ms).
[17:56:26.913] <TB3> INFO: Test took 1190ms.
[17:56:26.914] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:27.221] <TB3> INFO: Expecting 2560 events.
[17:56:28.104] <TB3> INFO: 2560 events read in total (291ms).
[17:56:28.104] <TB3> INFO: Test took 1190ms.
[17:56:28.106] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:28.413] <TB3> INFO: Expecting 2560 events.
[17:56:29.296] <TB3> INFO: 2560 events read in total (292ms).
[17:56:29.297] <TB3> INFO: Test took 1191ms.
[17:56:29.298] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:29.605] <TB3> INFO: Expecting 2560 events.
[17:56:30.487] <TB3> INFO: 2560 events read in total (291ms).
[17:56:30.488] <TB3> INFO: Test took 1190ms.
[17:56:30.489] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:30.796] <TB3> INFO: Expecting 2560 events.
[17:56:31.680] <TB3> INFO: 2560 events read in total (292ms).
[17:56:31.680] <TB3> INFO: Test took 1191ms.
[17:56:31.682] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:31.988] <TB3> INFO: Expecting 2560 events.
[17:56:32.868] <TB3> INFO: 2560 events read in total (288ms).
[17:56:32.868] <TB3> INFO: Test took 1186ms.
[17:56:32.870] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:33.176] <TB3> INFO: Expecting 2560 events.
[17:56:34.054] <TB3> INFO: 2560 events read in total (286ms).
[17:56:34.055] <TB3> INFO: Test took 1185ms.
[17:56:34.056] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:34.363] <TB3> INFO: Expecting 2560 events.
[17:56:35.242] <TB3> INFO: 2560 events read in total (288ms).
[17:56:35.243] <TB3> INFO: Test took 1187ms.
[17:56:35.245] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:35.551] <TB3> INFO: Expecting 2560 events.
[17:56:36.430] <TB3> INFO: 2560 events read in total (287ms).
[17:56:36.430] <TB3> INFO: Test took 1186ms.
[17:56:36.432] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:36.739] <TB3> INFO: Expecting 2560 events.
[17:56:37.618] <TB3> INFO: 2560 events read in total (287ms).
[17:56:37.618] <TB3> INFO: Test took 1186ms.
[17:56:37.620] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:37.926] <TB3> INFO: Expecting 2560 events.
[17:56:38.807] <TB3> INFO: 2560 events read in total (289ms).
[17:56:38.807] <TB3> INFO: Test took 1187ms.
[17:56:38.809] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:39.116] <TB3> INFO: Expecting 2560 events.
[17:56:39.995] <TB3> INFO: 2560 events read in total (288ms).
[17:56:39.996] <TB3> INFO: Test took 1187ms.
[17:56:39.997] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:40.304] <TB3> INFO: Expecting 2560 events.
[17:56:41.183] <TB3> INFO: 2560 events read in total (287ms).
[17:56:41.183] <TB3> INFO: Test took 1186ms.
[17:56:41.185] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:41.492] <TB3> INFO: Expecting 2560 events.
[17:56:42.370] <TB3> INFO: 2560 events read in total (287ms).
[17:56:42.370] <TB3> INFO: Test took 1185ms.
[17:56:42.372] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:42.679] <TB3> INFO: Expecting 2560 events.
[17:56:43.557] <TB3> INFO: 2560 events read in total (287ms).
[17:56:43.558] <TB3> INFO: Test took 1186ms.
[17:56:43.559] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:43.866] <TB3> INFO: Expecting 2560 events.
[17:56:44.747] <TB3> INFO: 2560 events read in total (289ms).
[17:56:44.747] <TB3> INFO: Test took 1188ms.
[17:56:44.749] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:45.055] <TB3> INFO: Expecting 2560 events.
[17:56:45.934] <TB3> INFO: 2560 events read in total (287ms).
[17:56:45.935] <TB3> INFO: Test took 1186ms.
[17:56:45.936] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:46.243] <TB3> INFO: Expecting 2560 events.
[17:56:47.124] <TB3> INFO: 2560 events read in total (289ms).
[17:56:47.124] <TB3> INFO: Test took 1188ms.
[17:56:47.126] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:47.432] <TB3> INFO: Expecting 2560 events.
[17:56:48.311] <TB3> INFO: 2560 events read in total (287ms).
[17:56:48.311] <TB3> INFO: Test took 1185ms.
[17:56:48.313] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:48.619] <TB3> INFO: Expecting 2560 events.
[17:56:49.498] <TB3> INFO: 2560 events read in total (287ms).
[17:56:49.498] <TB3> INFO: Test took 1185ms.
[17:56:49.500] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:49.807] <TB3> INFO: Expecting 2560 events.
[17:56:50.687] <TB3> INFO: 2560 events read in total (289ms).
[17:56:50.687] <TB3> INFO: Test took 1187ms.
[17:56:50.689] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:50.995] <TB3> INFO: Expecting 2560 events.
[17:56:51.881] <TB3> INFO: 2560 events read in total (294ms).
[17:56:51.882] <TB3> INFO: Test took 1193ms.
[17:56:51.884] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:52.190] <TB3> INFO: Expecting 2560 events.
[17:56:53.072] <TB3> INFO: 2560 events read in total (291ms).
[17:56:53.073] <TB3> INFO: Test took 1189ms.
[17:56:53.075] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:53.381] <TB3> INFO: Expecting 2560 events.
[17:56:54.265] <TB3> INFO: 2560 events read in total (292ms).
[17:56:54.266] <TB3> INFO: Test took 1191ms.
[17:56:54.267] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:54.574] <TB3> INFO: Expecting 2560 events.
[17:56:55.457] <TB3> INFO: 2560 events read in total (292ms).
[17:56:55.457] <TB3> INFO: Test took 1190ms.
[17:56:55.459] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:55.766] <TB3> INFO: Expecting 2560 events.
[17:56:56.649] <TB3> INFO: 2560 events read in total (292ms).
[17:56:56.650] <TB3> INFO: Test took 1191ms.
[17:56:56.651] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:56.958] <TB3> INFO: Expecting 2560 events.
[17:56:57.843] <TB3> INFO: 2560 events read in total (293ms).
[17:56:57.843] <TB3> INFO: Test took 1192ms.
[17:56:57.845] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:58.152] <TB3> INFO: Expecting 2560 events.
[17:56:59.035] <TB3> INFO: 2560 events read in total (291ms).
[17:56:59.035] <TB3> INFO: Test took 1190ms.
[17:56:59.038] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:56:59.344] <TB3> INFO: Expecting 2560 events.
[17:57:00.227] <TB3> INFO: 2560 events read in total (292ms).
[17:57:00.227] <TB3> INFO: Test took 1189ms.
[17:57:00.691] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 724 seconds
[17:57:00.691] <TB3> INFO: PH scale (per ROC): 35 35 39 59 43 40 57 37 54 51 46 54 40 45 42 26
[17:57:00.691] <TB3> INFO: PH offset (per ROC): 105 81 104 118 100 112 124 109 131 135 141 132 108 127 113 157
[17:57:00.696] <TB3> INFO: Decoding statistics:
[17:57:00.696] <TB3> INFO: General information:
[17:57:00.696] <TB3> INFO: 16bit words read: 127878
[17:57:00.696] <TB3> INFO: valid events total: 20480
[17:57:00.696] <TB3> INFO: empty events: 17981
[17:57:00.696] <TB3> INFO: valid events with pixels: 2499
[17:57:00.696] <TB3> INFO: valid pixel hits: 2499
[17:57:00.696] <TB3> INFO: Event errors: 0
[17:57:00.696] <TB3> INFO: start marker: 0
[17:57:00.696] <TB3> INFO: stop marker: 0
[17:57:00.696] <TB3> INFO: overflow: 0
[17:57:00.696] <TB3> INFO: invalid 5bit words: 0
[17:57:00.696] <TB3> INFO: invalid XOR eye diagram: 0
[17:57:00.696] <TB3> INFO: frame (failed synchr.): 0
[17:57:00.696] <TB3> INFO: idle data (no TBM trl): 0
[17:57:00.696] <TB3> INFO: no data (only TBM hdr): 0
[17:57:00.696] <TB3> INFO: TBM errors: 0
[17:57:00.696] <TB3> INFO: flawed TBM headers: 0
[17:57:00.696] <TB3> INFO: flawed TBM trailers: 0
[17:57:00.696] <TB3> INFO: event ID mismatches: 0
[17:57:00.696] <TB3> INFO: ROC errors: 0
[17:57:00.696] <TB3> INFO: missing ROC header(s): 0
[17:57:00.696] <TB3> INFO: misplaced readback start: 0
[17:57:00.696] <TB3> INFO: Pixel decoding errors: 0
[17:57:00.696] <TB3> INFO: pixel data incomplete: 0
[17:57:00.696] <TB3> INFO: pixel address: 0
[17:57:00.696] <TB3> INFO: pulse height fill bit: 0
[17:57:00.696] <TB3> INFO: buffer corruption: 0
[17:57:00.961] <TB3> INFO: ######################################################################
[17:57:00.961] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:57:00.961] <TB3> INFO: ######################################################################
[17:57:00.971] <TB3> INFO: scanning low vcal = 10
[17:57:01.204] <TB3> INFO: Expecting 41600 events.
[17:57:04.776] <TB3> INFO: 41600 events read in total (2981ms).
[17:57:04.777] <TB3> INFO: Test took 3806ms.
[17:57:04.778] <TB3> INFO: scanning low vcal = 20
[17:57:05.077] <TB3> INFO: Expecting 41600 events.
[17:57:08.647] <TB3> INFO: 41600 events read in total (2978ms).
[17:57:08.647] <TB3> INFO: Test took 3869ms.
[17:57:08.649] <TB3> INFO: scanning low vcal = 30
[17:57:08.948] <TB3> INFO: Expecting 41600 events.
[17:57:12.564] <TB3> INFO: 41600 events read in total (3025ms).
[17:57:12.565] <TB3> INFO: Test took 3916ms.
[17:57:12.567] <TB3> INFO: scanning low vcal = 40
[17:57:12.844] <TB3> INFO: Expecting 41600 events.
[17:57:16.741] <TB3> INFO: 41600 events read in total (3305ms).
[17:57:16.742] <TB3> INFO: Test took 4175ms.
[17:57:16.744] <TB3> INFO: scanning low vcal = 50
[17:57:17.021] <TB3> INFO: Expecting 41600 events.
[17:57:20.943] <TB3> INFO: 41600 events read in total (3330ms).
[17:57:20.944] <TB3> INFO: Test took 4199ms.
[17:57:20.946] <TB3> INFO: scanning low vcal = 60
[17:57:21.224] <TB3> INFO: Expecting 41600 events.
[17:57:25.148] <TB3> INFO: 41600 events read in total (3333ms).
[17:57:25.148] <TB3> INFO: Test took 4201ms.
[17:57:25.151] <TB3> INFO: scanning low vcal = 70
[17:57:25.427] <TB3> INFO: Expecting 41600 events.
[17:57:29.367] <TB3> INFO: 41600 events read in total (3348ms).
[17:57:29.368] <TB3> INFO: Test took 4217ms.
[17:57:29.371] <TB3> INFO: scanning low vcal = 80
[17:57:29.647] <TB3> INFO: Expecting 41600 events.
[17:57:33.607] <TB3> INFO: 41600 events read in total (3368ms).
[17:57:33.607] <TB3> INFO: Test took 4236ms.
[17:57:33.610] <TB3> INFO: scanning low vcal = 90
[17:57:33.887] <TB3> INFO: Expecting 41600 events.
[17:57:37.835] <TB3> INFO: 41600 events read in total (3357ms).
[17:57:37.836] <TB3> INFO: Test took 4226ms.
[17:57:37.839] <TB3> INFO: scanning low vcal = 100
[17:57:38.115] <TB3> INFO: Expecting 41600 events.
[17:57:42.049] <TB3> INFO: 41600 events read in total (3342ms).
[17:57:42.049] <TB3> INFO: Test took 4210ms.
[17:57:42.052] <TB3> INFO: scanning low vcal = 110
[17:57:42.328] <TB3> INFO: Expecting 41600 events.
[17:57:46.282] <TB3> INFO: 41600 events read in total (3362ms).
[17:57:46.282] <TB3> INFO: Test took 4230ms.
[17:57:46.285] <TB3> INFO: scanning low vcal = 120
[17:57:46.562] <TB3> INFO: Expecting 41600 events.
[17:57:50.500] <TB3> INFO: 41600 events read in total (3348ms).
[17:57:50.501] <TB3> INFO: Test took 4216ms.
[17:57:50.504] <TB3> INFO: scanning low vcal = 130
[17:57:50.780] <TB3> INFO: Expecting 41600 events.
[17:57:54.736] <TB3> INFO: 41600 events read in total (3364ms).
[17:57:54.737] <TB3> INFO: Test took 4233ms.
[17:57:54.739] <TB3> INFO: scanning low vcal = 140
[17:57:55.016] <TB3> INFO: Expecting 41600 events.
[17:57:58.952] <TB3> INFO: 41600 events read in total (3344ms).
[17:57:58.953] <TB3> INFO: Test took 4213ms.
[17:57:58.956] <TB3> INFO: scanning low vcal = 150
[17:57:59.232] <TB3> INFO: Expecting 41600 events.
[17:58:03.168] <TB3> INFO: 41600 events read in total (3344ms).
[17:58:03.169] <TB3> INFO: Test took 4213ms.
[17:58:03.172] <TB3> INFO: scanning low vcal = 160
[17:58:03.448] <TB3> INFO: Expecting 41600 events.
[17:58:07.427] <TB3> INFO: 41600 events read in total (3387ms).
[17:58:07.427] <TB3> INFO: Test took 4255ms.
[17:58:07.430] <TB3> INFO: scanning low vcal = 170
[17:58:07.707] <TB3> INFO: Expecting 41600 events.
[17:58:11.671] <TB3> INFO: 41600 events read in total (3372ms).
[17:58:11.672] <TB3> INFO: Test took 4242ms.
[17:58:11.674] <TB3> INFO: scanning low vcal = 180
[17:58:11.951] <TB3> INFO: Expecting 41600 events.
[17:58:15.910] <TB3> INFO: 41600 events read in total (3367ms).
[17:58:15.911] <TB3> INFO: Test took 4236ms.
[17:58:15.913] <TB3> INFO: scanning low vcal = 190
[17:58:16.190] <TB3> INFO: Expecting 41600 events.
[17:58:20.124] <TB3> INFO: 41600 events read in total (3342ms).
[17:58:20.125] <TB3> INFO: Test took 4211ms.
[17:58:20.127] <TB3> INFO: scanning low vcal = 200
[17:58:20.404] <TB3> INFO: Expecting 41600 events.
[17:58:24.338] <TB3> INFO: 41600 events read in total (3342ms).
[17:58:24.338] <TB3> INFO: Test took 4211ms.
[17:58:24.341] <TB3> INFO: scanning low vcal = 210
[17:58:24.618] <TB3> INFO: Expecting 41600 events.
[17:58:28.565] <TB3> INFO: 41600 events read in total (3356ms).
[17:58:28.565] <TB3> INFO: Test took 4224ms.
[17:58:28.568] <TB3> INFO: scanning low vcal = 220
[17:58:28.845] <TB3> INFO: Expecting 41600 events.
[17:58:32.780] <TB3> INFO: 41600 events read in total (3344ms).
[17:58:32.781] <TB3> INFO: Test took 4213ms.
[17:58:32.784] <TB3> INFO: scanning low vcal = 230
[17:58:33.060] <TB3> INFO: Expecting 41600 events.
[17:58:36.004] <TB3> INFO: 41600 events read in total (3352ms).
[17:58:36.005] <TB3> INFO: Test took 4221ms.
[17:58:37.008] <TB3> INFO: scanning low vcal = 240
[17:58:37.285] <TB3> INFO: Expecting 41600 events.
[17:58:41.223] <TB3> INFO: 41600 events read in total (3347ms).
[17:58:41.223] <TB3> INFO: Test took 4215ms.
[17:58:41.226] <TB3> INFO: scanning low vcal = 250
[17:58:41.503] <TB3> INFO: Expecting 41600 events.
[17:58:45.490] <TB3> INFO: 41600 events read in total (3396ms).
[17:58:45.491] <TB3> INFO: Test took 4265ms.
[17:58:45.495] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[17:58:45.771] <TB3> INFO: Expecting 41600 events.
[17:58:49.798] <TB3> INFO: 41600 events read in total (3436ms).
[17:58:49.799] <TB3> INFO: Test took 4304ms.
[17:58:49.801] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[17:58:50.078] <TB3> INFO: Expecting 41600 events.
[17:58:53.006] <TB3> INFO: 41600 events read in total (3336ms).
[17:58:53.006] <TB3> INFO: Test took 4204ms.
[17:58:54.009] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[17:58:54.286] <TB3> INFO: Expecting 41600 events.
[17:58:58.255] <TB3> INFO: 41600 events read in total (3378ms).
[17:58:58.255] <TB3> INFO: Test took 4246ms.
[17:58:58.258] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[17:58:58.535] <TB3> INFO: Expecting 41600 events.
[17:59:02.523] <TB3> INFO: 41600 events read in total (3397ms).
[17:59:02.524] <TB3> INFO: Test took 4266ms.
[17:59:02.527] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:59:02.803] <TB3> INFO: Expecting 41600 events.
[17:59:06.776] <TB3> INFO: 41600 events read in total (3381ms).
[17:59:06.777] <TB3> INFO: Test took 4250ms.
[17:59:07.286] <TB3> INFO: PixTestGainPedestal::measure() done
[17:59:50.261] <TB3> INFO: PixTestGainPedestal::fit() done
[17:59:50.261] <TB3> INFO: non-linearity mean: 0.940 0.917 0.940 0.979 0.936 0.928 0.984 1.057 0.980 0.974 0.975 0.971 0.918 0.915 0.929 0.961
[17:59:50.261] <TB3> INFO: non-linearity RMS: 0.038 0.190 0.188 0.004 0.160 0.069 0.003 0.164 0.003 0.008 0.005 0.004 0.099 0.082 0.046 0.027
[17:59:50.261] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:59:50.276] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:59:50.290] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:59:50.305] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:59:50.324] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:59:50.338] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:59:50.358] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:59:50.377] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:59:50.396] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:59:50.416] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:59:50.434] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:59:50.447] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:59:50.463] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:59:50.483] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:59:50.505] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:59:50.524] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:59:50.543] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 169 seconds
[17:59:50.543] <TB3> INFO: Decoding statistics:
[17:59:50.543] <TB3> INFO: General information:
[17:59:50.543] <TB3> INFO: 16bit words read: 3328726
[17:59:50.543] <TB3> INFO: valid events total: 332800
[17:59:50.543] <TB3> INFO: empty events: 0
[17:59:50.543] <TB3> INFO: valid events with pixels: 332800
[17:59:50.543] <TB3> INFO: valid pixel hits: 665963
[17:59:50.543] <TB3> INFO: Event errors: 0
[17:59:50.543] <TB3> INFO: start marker: 0
[17:59:50.543] <TB3> INFO: stop marker: 0
[17:59:50.543] <TB3> INFO: overflow: 0
[17:59:50.543] <TB3> INFO: invalid 5bit words: 0
[17:59:50.543] <TB3> INFO: invalid XOR eye diagram: 0
[17:59:50.543] <TB3> INFO: frame (failed synchr.): 0
[17:59:50.543] <TB3> INFO: idle data (no TBM trl): 0
[17:59:50.543] <TB3> INFO: no data (only TBM hdr): 0
[17:59:50.543] <TB3> INFO: TBM errors: 0
[17:59:50.543] <TB3> INFO: flawed TBM headers: 0
[17:59:50.543] <TB3> INFO: flawed TBM trailers: 0
[17:59:50.543] <TB3> INFO: event ID mismatches: 0
[17:59:50.543] <TB3> INFO: ROC errors: 0
[17:59:50.543] <TB3> INFO: missing ROC header(s): 0
[17:59:50.543] <TB3> INFO: misplaced readback start: 0
[17:59:50.543] <TB3> INFO: Pixel decoding errors: 0
[17:59:50.544] <TB3> INFO: pixel data incomplete: 0
[17:59:50.544] <TB3> INFO: pixel address: 0
[17:59:50.544] <TB3> INFO: pulse height fill bit: 0
[17:59:50.544] <TB3> INFO: buffer corruption: 0
[17:59:50.565] <TB3> INFO: Decoding statistics:
[17:59:50.565] <TB3> INFO: General information:
[17:59:50.565] <TB3> INFO: 16bit words read: 3458140
[17:59:50.565] <TB3> INFO: valid events total: 353536
[17:59:50.565] <TB3> INFO: empty events: 18237
[17:59:50.565] <TB3> INFO: valid events with pixels: 335299
[17:59:50.565] <TB3> INFO: valid pixel hits: 668462
[17:59:50.565] <TB3> INFO: Event errors: 0
[17:59:50.565] <TB3> INFO: start marker: 0
[17:59:50.565] <TB3> INFO: stop marker: 0
[17:59:50.565] <TB3> INFO: overflow: 0
[17:59:50.565] <TB3> INFO: invalid 5bit words: 0
[17:59:50.565] <TB3> INFO: invalid XOR eye diagram: 0
[17:59:50.565] <TB3> INFO: frame (failed synchr.): 0
[17:59:50.565] <TB3> INFO: idle data (no TBM trl): 0
[17:59:50.565] <TB3> INFO: no data (only TBM hdr): 0
[17:59:50.565] <TB3> INFO: TBM errors: 0
[17:59:50.565] <TB3> INFO: flawed TBM headers: 0
[17:59:50.565] <TB3> INFO: flawed TBM trailers: 0
[17:59:50.565] <TB3> INFO: event ID mismatches: 0
[17:59:50.565] <TB3> INFO: ROC errors: 0
[17:59:50.565] <TB3> INFO: missing ROC header(s): 0
[17:59:50.565] <TB3> INFO: misplaced readback start: 0
[17:59:50.565] <TB3> INFO: Pixel decoding errors: 0
[17:59:50.565] <TB3> INFO: pixel data incomplete: 0
[17:59:50.565] <TB3> INFO: pixel address: 0
[17:59:50.565] <TB3> INFO: pulse height fill bit: 0
[17:59:50.565] <TB3> INFO: buffer corruption: 0
[17:59:50.565] <TB3> INFO: enter test to run
[17:59:50.565] <TB3> INFO: test: Trim80 no parameter change
[17:59:50.565] <TB3> INFO: running: trim80
[17:59:50.588] <TB3> INFO: ######################################################################
[17:59:50.588] <TB3> INFO: PixTestTrim80::doTest()
[17:59:50.588] <TB3> INFO: ######################################################################
[17:59:50.589] <TB3> INFO: ----------------------------------------------------------------------
[17:59:50.589] <TB3> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[17:59:50.589] <TB3> INFO: ----------------------------------------------------------------------
[17:59:50.630] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[17:59:50.630] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[17:59:50.639] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[17:59:50.639] <TB3> INFO: run 1 of 1
[17:59:50.884] <TB3> INFO: Expecting 5025280 events.
[18:00:17.981] <TB3> INFO: 666344 events read in total (26502ms).
[18:00:44.501] <TB3> INFO: 1328224 events read in total (53022ms).
[18:01:10.860] <TB3> INFO: 1988272 events read in total (79381ms).
[18:01:37.082] <TB3> INFO: 2646336 events read in total (105603ms).
[18:02:04.024] <TB3> INFO: 3304032 events read in total (132545ms).
[18:02:30.485] <TB3> INFO: 3960912 events read in total (159006ms).
[18:02:57.161] <TB3> INFO: 4616464 events read in total (185682ms).
[18:03:13.369] <TB3> INFO: 5025280 events read in total (201890ms).
[18:03:13.438] <TB3> INFO: Test took 202798ms.
[18:03:35.676] <TB3> INFO: ROC 0 VthrComp = 74
[18:03:35.676] <TB3> INFO: ROC 1 VthrComp = 80
[18:03:35.676] <TB3> INFO: ROC 2 VthrComp = 76
[18:03:35.676] <TB3> INFO: ROC 3 VthrComp = 76
[18:03:35.676] <TB3> INFO: ROC 4 VthrComp = 73
[18:03:35.677] <TB3> INFO: ROC 5 VthrComp = 83
[18:03:35.677] <TB3> INFO: ROC 6 VthrComp = 82
[18:03:35.677] <TB3> INFO: ROC 7 VthrComp = 68
[18:03:35.677] <TB3> INFO: ROC 8 VthrComp = 67
[18:03:35.677] <TB3> INFO: ROC 9 VthrComp = 71
[18:03:35.677] <TB3> INFO: ROC 10 VthrComp = 67
[18:03:35.678] <TB3> INFO: ROC 11 VthrComp = 62
[18:03:35.678] <TB3> INFO: ROC 12 VthrComp = 67
[18:03:35.678] <TB3> INFO: ROC 13 VthrComp = 67
[18:03:35.678] <TB3> INFO: ROC 14 VthrComp = 71
[18:03:35.678] <TB3> INFO: ROC 15 VthrComp = 77
[18:03:35.911] <TB3> INFO: Expecting 41600 events.
[18:03:39.382] <TB3> INFO: 41600 events read in total (2879ms).
[18:03:39.383] <TB3> INFO: Test took 3703ms.
[18:03:39.392] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:03:39.392] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:03:39.401] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:03:39.401] <TB3> INFO: run 1 of 1
[18:03:39.678] <TB3> INFO: Expecting 5025280 events.
[18:04:07.421] <TB3> INFO: 685360 events read in total (27151ms).
[18:04:34.480] <TB3> INFO: 1366512 events read in total (54210ms).
[18:05:01.948] <TB3> INFO: 2047144 events read in total (81678ms).
[18:05:28.924] <TB3> INFO: 2723736 events read in total (108654ms).
[18:05:55.926] <TB3> INFO: 3398464 events read in total (135656ms).
[18:06:22.436] <TB3> INFO: 4070576 events read in total (162166ms).
[18:06:49.017] <TB3> INFO: 4743496 events read in total (188747ms).
[18:07:00.292] <TB3> INFO: 5025280 events read in total (200022ms).
[18:07:00.337] <TB3> INFO: Test took 200936ms.
[18:07:23.630] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 109.911 for pixel 1/74 mean/min/max = 93.6716/76.96/110.383
[18:07:23.630] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 109.86 for pixel 1/0 mean/min/max = 92.3695/74.7057/110.033
[18:07:23.631] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 113.668 for pixel 0/0 mean/min/max = 95.2062/76.5808/113.832
[18:07:23.631] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 113.784 for pixel 0/1 mean/min/max = 95.6865/77.5238/113.849
[18:07:23.631] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 109.931 for pixel 51/6 mean/min/max = 93.3947/76.8365/109.953
[18:07:23.632] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 108.61 for pixel 29/14 mean/min/max = 91.6594/74.6951/108.624
[18:07:23.632] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 111 for pixel 15/8 mean/min/max = 92.7584/74.3132/111.204
[18:07:23.632] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 107.606 for pixel 0/69 mean/min/max = 90.6785/73.4994/107.858
[18:07:23.633] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 109.098 for pixel 0/34 mean/min/max = 91.2462/73.3452/109.147
[18:07:23.633] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 107.812 for pixel 0/10 mean/min/max = 91.435/75.0524/107.818
[18:07:23.633] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 107.871 for pixel 28/74 mean/min/max = 91.0865/74.1372/108.036
[18:07:23.634] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 108.389 for pixel 2/79 mean/min/max = 92.1889/75.9742/108.404
[18:07:23.634] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 107.62 for pixel 0/63 mean/min/max = 91.2172/74.7738/107.661
[18:07:23.634] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 106 for pixel 21/75 mean/min/max = 90.4979/74.7391/106.257
[18:07:23.635] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 107.92 for pixel 1/67 mean/min/max = 91.418/74.7009/108.135
[18:07:23.635] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 110.872 for pixel 0/8 mean/min/max = 93.9914/77.0387/110.944
[18:07:23.635] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:07:23.724] <TB3> INFO: Expecting 411648 events.
[18:07:32.952] <TB3> INFO: 411648 events read in total (8636ms).
[18:07:32.958] <TB3> INFO: Expecting 411648 events.
[18:07:41.990] <TB3> INFO: 411648 events read in total (8629ms).
[18:07:41.999] <TB3> INFO: Expecting 411648 events.
[18:07:51.084] <TB3> INFO: 411648 events read in total (8682ms).
[18:07:51.099] <TB3> INFO: Expecting 411648 events.
[18:08:00.160] <TB3> INFO: 411648 events read in total (8657ms).
[18:08:00.174] <TB3> INFO: Expecting 411648 events.
[18:08:09.276] <TB3> INFO: 411648 events read in total (8699ms).
[18:08:09.298] <TB3> INFO: Expecting 411648 events.
[18:08:18.363] <TB3> INFO: 411648 events read in total (8662ms).
[18:08:18.388] <TB3> INFO: Expecting 411648 events.
[18:08:27.540] <TB3> INFO: 411648 events read in total (8748ms).
[18:08:27.562] <TB3> INFO: Expecting 411648 events.
[18:08:36.681] <TB3> INFO: 411648 events read in total (8716ms).
[18:08:36.705] <TB3> INFO: Expecting 411648 events.
[18:08:45.819] <TB3> INFO: 411648 events read in total (8711ms).
[18:08:45.848] <TB3> INFO: Expecting 411648 events.
[18:08:54.968] <TB3> INFO: 411648 events read in total (8717ms).
[18:08:55.008] <TB3> INFO: Expecting 411648 events.
[18:09:04.103] <TB3> INFO: 411648 events read in total (8684ms).
[18:09:04.144] <TB3> INFO: Expecting 411648 events.
[18:09:13.261] <TB3> INFO: 411648 events read in total (8714ms).
[18:09:13.297] <TB3> INFO: Expecting 411648 events.
[18:09:22.423] <TB3> INFO: 411648 events read in total (8723ms).
[18:09:22.461] <TB3> INFO: Expecting 411648 events.
[18:09:31.599] <TB3> INFO: 411648 events read in total (8735ms).
[18:09:31.654] <TB3> INFO: Expecting 411648 events.
[18:09:40.866] <TB3> INFO: 411648 events read in total (8809ms).
[18:09:40.908] <TB3> INFO: Expecting 411648 events.
[18:09:50.036] <TB3> INFO: 411648 events read in total (8725ms).
[18:09:50.084] <TB3> INFO: Test took 146449ms.
[18:09:51.781] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:09:51.790] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:09:51.790] <TB3> INFO: run 1 of 1
[18:09:52.055] <TB3> INFO: Expecting 5025280 events.
[18:10:18.758] <TB3> INFO: 660776 events read in total (26111ms).
[18:10:45.652] <TB3> INFO: 1319744 events read in total (53005ms).
[18:11:12.107] <TB3> INFO: 1977936 events read in total (79460ms).
[18:11:38.445] <TB3> INFO: 2634912 events read in total (105798ms).
[18:12:04.804] <TB3> INFO: 3289120 events read in total (132157ms).
[18:12:31.144] <TB3> INFO: 3943296 events read in total (158497ms).
[18:12:57.252] <TB3> INFO: 4594056 events read in total (184605ms).
[18:13:15.308] <TB3> INFO: 5025280 events read in total (202661ms).
[18:13:15.375] <TB3> INFO: Test took 203585ms.
[18:13:40.391] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 49.215450 .. 103.008232
[18:13:40.634] <TB3> INFO: Expecting 208000 events.
[18:13:50.346] <TB3> INFO: 208000 events read in total (9121ms).
[18:13:50.347] <TB3> INFO: Test took 9954ms.
[18:13:50.411] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 39 .. 113 (-1/-1) hits flags = 528 (plus default)
[18:13:50.422] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:13:50.422] <TB3> INFO: run 1 of 1
[18:13:50.700] <TB3> INFO: Expecting 2496000 events.
[18:14:18.473] <TB3> INFO: 689440 events read in total (27182ms).
[18:14:45.490] <TB3> INFO: 1376112 events read in total (54199ms).
[18:15:12.703] <TB3> INFO: 2057664 events read in total (81412ms).
[18:15:30.555] <TB3> INFO: 2496000 events read in total (99264ms).
[18:15:30.602] <TB3> INFO: Test took 100180ms.
[18:15:49.607] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 60.345916 .. 92.139574
[18:15:49.851] <TB3> INFO: Expecting 208000 events.
[18:15:59.584] <TB3> INFO: 208000 events read in total (9141ms).
[18:15:59.585] <TB3> INFO: Test took 9976ms.
[18:15:59.649] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 50 .. 102 (-1/-1) hits flags = 528 (plus default)
[18:15:59.660] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:15:59.661] <TB3> INFO: run 1 of 1
[18:15:59.939] <TB3> INFO: Expecting 1763840 events.
[18:16:28.233] <TB3> INFO: 694496 events read in total (27703ms).
[18:16:55.642] <TB3> INFO: 1387992 events read in total (55113ms).
[18:17:11.244] <TB3> INFO: 1763840 events read in total (70714ms).
[18:17:11.274] <TB3> INFO: Test took 71614ms.
[18:17:28.387] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 66.533862 .. 86.381522
[18:17:28.620] <TB3> INFO: Expecting 208000 events.
[18:17:38.404] <TB3> INFO: 208000 events read in total (9193ms).
[18:17:38.405] <TB3> INFO: Test took 10017ms.
[18:17:38.452] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 56 .. 96 (-1/-1) hits flags = 528 (plus default)
[18:17:38.461] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:17:38.462] <TB3> INFO: run 1 of 1
[18:17:38.740] <TB3> INFO: Expecting 1364480 events.
[18:18:07.428] <TB3> INFO: 703096 events read in total (28096ms).
[18:18:34.613] <TB3> INFO: 1364480 events read in total (55282ms).
[18:18:34.637] <TB3> INFO: Test took 56176ms.
[18:18:50.215] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 68.896184 .. 86.381522
[18:18:50.452] <TB3> INFO: Expecting 208000 events.
[18:19:00.278] <TB3> INFO: 208000 events read in total (9234ms).
[18:19:00.279] <TB3> INFO: Test took 10063ms.
[18:19:00.326] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 96 (-1/-1) hits flags = 528 (plus default)
[18:19:00.336] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:19:00.336] <TB3> INFO: run 1 of 1
[18:19:00.614] <TB3> INFO: Expecting 1297920 events.
[18:19:29.476] <TB3> INFO: 697232 events read in total (28270ms).
[18:19:53.583] <TB3> INFO: 1297920 events read in total (52378ms).
[18:19:53.610] <TB3> INFO: Test took 53275ms.
[18:20:09.123] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[18:20:09.123] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[18:20:09.132] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:20:09.132] <TB3> INFO: run 1 of 1
[18:20:09.365] <TB3> INFO: Expecting 1364480 events.
[18:20:37.499] <TB3> INFO: 667392 events read in total (27542ms).
[18:21:04.836] <TB3> INFO: 1333576 events read in total (54879ms).
[18:21:06.488] <TB3> INFO: 1364480 events read in total (56531ms).
[18:21:06.508] <TB3> INFO: Test took 57377ms.
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C0.dat
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C1.dat
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C2.dat
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C3.dat
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C4.dat
[18:21:24.613] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C5.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C6.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C7.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C8.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C9.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C10.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C11.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C12.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C13.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C14.dat
[18:21:24.614] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//dacParameters80_C15.dat
[18:21:24.614] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C0.dat
[18:21:24.620] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C1.dat
[18:21:24.626] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C2.dat
[18:21:24.631] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C3.dat
[18:21:24.637] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C4.dat
[18:21:24.643] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C5.dat
[18:21:24.648] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C6.dat
[18:21:24.654] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C7.dat
[18:21:24.660] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C8.dat
[18:21:24.668] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C9.dat
[18:21:24.673] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C10.dat
[18:21:24.679] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C11.dat
[18:21:24.684] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C12.dat
[18:21:24.689] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C13.dat
[18:21:24.695] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C14.dat
[18:21:24.703] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1080_FullQualification_2016-10-25_15h54m_1477403681//001_Fulltest_m20//trimParameters80_C15.dat
[18:21:24.710] <TB3> INFO: PixTestTrim80::trimTest() done
[18:21:24.710] <TB3> INFO: vtrim: 121 114 124 120 93 118 122 95 106 103 86 98 90 102 113 131
[18:21:24.710] <TB3> INFO: vthrcomp: 74 80 76 76 73 83 82 68 67 71 67 62 67 67 71 77
[18:21:24.710] <TB3> INFO: vcal mean: 79.95 79.97 79.97 79.92 79.95 79.94 79.93 79.94 79.94 79.98 79.93 79.96 80.01 79.96 79.92 79.99
[18:21:24.710] <TB3> INFO: vcal RMS: 0.79 0.86 0.81 0.82 0.76 0.85 0.86 0.71 0.75 0.68 0.83 0.71 0.76 0.69 0.85 0.83
[18:21:24.710] <TB3> INFO: bits mean: 10.12 10.42 9.74 9.81 9.68 10.53 10.38 10.12 10.48 9.84 10.46 9.71 10.06 10.08 11.16 10.22
[18:21:24.710] <TB3> INFO: bits RMS: 2.04 2.17 2.17 2.04 2.21 2.18 2.23 2.53 2.35 2.43 2.31 2.25 2.39 2.42 1.90 1.98
[18:21:24.716] <TB3> INFO: ----------------------------------------------------------------------
[18:21:24.716] <TB3> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:21:24.716] <TB3> INFO: ----------------------------------------------------------------------
[18:21:24.718] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:21:24.727] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:21:24.727] <TB3> INFO: run 1 of 1
[18:21:24.959] <TB3> INFO: Expecting 4160000 events.
[18:21:56.551] <TB3> INFO: 742720 events read in total (31000ms).
[18:22:27.324] <TB3> INFO: 1478695 events read in total (61773ms).
[18:22:58.246] <TB3> INFO: 2211045 events read in total (92695ms).
[18:23:28.995] <TB3> INFO: 2940785 events read in total (123444ms).
[18:23:59.484] <TB3> INFO: 3667970 events read in total (153933ms).
[18:24:20.260] <TB3> INFO: 4160000 events read in total (174709ms).
[18:24:20.309] <TB3> INFO: Test took 175583ms.
[18:24:46.282] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 207 (-1/-1) hits flags = 528 (plus default)
[18:24:46.293] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:24:46.293] <TB3> INFO: run 1 of 1
[18:24:46.532] <TB3> INFO: Expecting 4326400 events.
[18:25:17.579] <TB3> INFO: 709925 events read in total (30456ms).
[18:25:47.868] <TB3> INFO: 1415170 events read in total (60745ms).
[18:26:18.232] <TB3> INFO: 2117495 events read in total (91109ms).
[18:26:48.376] <TB3> INFO: 2816275 events read in total (121253ms).
[18:27:18.319] <TB3> INFO: 3514520 events read in total (151196ms).
[18:27:48.974] <TB3> INFO: 4212810 events read in total (181851ms).
[18:27:54.116] <TB3> INFO: 4326400 events read in total (186993ms).
[18:27:54.172] <TB3> INFO: Test took 187879ms.
[18:28:22.895] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[18:28:22.904] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:28:22.904] <TB3> INFO: run 1 of 1
[18:28:23.138] <TB3> INFO: Expecting 4139200 events.
[18:28:54.168] <TB3> INFO: 721215 events read in total (30438ms).
[18:29:24.457] <TB3> INFO: 1436710 events read in total (60727ms).
[18:29:55.470] <TB3> INFO: 2149730 events read in total (91740ms).
[18:30:26.120] <TB3> INFO: 2859295 events read in total (122390ms).
[18:30:57.131] <TB3> INFO: 3567150 events read in total (153401ms).
[18:31:22.710] <TB3> INFO: 4139200 events read in total (178980ms).
[18:31:22.780] <TB3> INFO: Test took 179876ms.
[18:31:50.550] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:31:50.560] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:31:50.560] <TB3> INFO: run 1 of 1
[18:31:50.828] <TB3> INFO: Expecting 4160000 events.
[18:32:21.851] <TB3> INFO: 719940 events read in total (30431ms).
[18:32:52.064] <TB3> INFO: 1434200 events read in total (60644ms).
[18:33:22.295] <TB3> INFO: 2146000 events read in total (90875ms).
[18:33:52.774] <TB3> INFO: 2854660 events read in total (121354ms).
[18:34:23.608] <TB3> INFO: 3561670 events read in total (152188ms).
[18:34:49.195] <TB3> INFO: 4160000 events read in total (177775ms).
[18:34:49.251] <TB3> INFO: Test took 178691ms.
[18:35:16.483] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[18:35:16.493] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:35:16.493] <TB3> INFO: run 1 of 1
[18:35:16.746] <TB3> INFO: Expecting 4180800 events.
[18:35:47.947] <TB3> INFO: 718790 events read in total (30610ms).
[18:36:18.093] <TB3> INFO: 1431995 events read in total (60756ms).
[18:36:48.602] <TB3> INFO: 2142650 events read in total (91265ms).
[18:37:19.437] <TB3> INFO: 2850120 events read in total (122100ms).
[18:37:51.034] <TB3> INFO: 3555910 events read in total (153697ms).
[18:38:17.257] <TB3> INFO: 4180800 events read in total (179920ms).
[18:38:17.313] <TB3> INFO: Test took 180820ms.
[18:38:40.703] <TB3> INFO: PixTestTrim80::trimBitTest() done
[18:38:40.704] <TB3> INFO: PixTestTrim80::doTest() done, duration: 2330 seconds
[18:38:41.365] <TB3> INFO: enter test to run
[18:38:41.365] <TB3> INFO: test: exit no parameter change
[18:38:41.479] <TB3> QUIET: Connection to board 170 closed.
[18:38:41.480] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.5-10-g7383767 on branch 20161012_zhud