[18:56:33.029] <TB2> INFO: *** Welcome to pxar ***
[18:56:33.029] <TB2> INFO: *** Today: 2016/10/25
[18:56:33.035] <TB2> INFO: *** Version: c8ba-dirty
[18:56:33.035] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C15.dat
[18:56:33.036] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C1b.dat
[18:56:33.036] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//defaultMaskFile.dat
[18:56:33.036] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters_C15.dat
[18:56:33.091] <TB2> INFO: clk: 4
[18:56:33.091] <TB2> INFO: ctr: 4
[18:56:33.091] <TB2> INFO: sda: 19
[18:56:33.091] <TB2> INFO: tin: 9
[18:56:33.091] <TB2> INFO: level: 15
[18:56:33.091] <TB2> INFO: triggerdelay: 0
[18:56:33.091] <TB2> QUIET: Instanciating API for pxar v2.1.0+867~g2c7f7f2
[18:56:33.091] <TB2> INFO: Log level: INFO
[18:56:33.100] <TB2> INFO: Found DTB DTB_WXC55Z
[18:56:33.111] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[18:56:33.113] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[18:56:33.114] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[18:56:34.654] <TB2> INFO: DUT info:
[18:56:34.654] <TB2> INFO: The DUT currently contains the following objects:
[18:56:34.654] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[18:56:34.654] <TB2> INFO: TBM Core alpha (0): 7 registers set
[18:56:34.654] <TB2> INFO: TBM Core beta (1): 7 registers set
[18:56:34.654] <TB2> INFO: TBM Core alpha (2): 7 registers set
[18:56:34.654] <TB2> INFO: TBM Core beta (3): 7 registers set
[18:56:34.654] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[18:56:34.654] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:34.654] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:56:35.055] <TB2> INFO: enter 'restricted' command line mode
[18:56:35.055] <TB2> INFO: enter test to run
[18:56:35.055] <TB2> INFO: test: pretest no parameter change
[18:56:35.055] <TB2> INFO: running: pretest
[18:56:35.696] <TB2> INFO: ######################################################################
[18:56:35.696] <TB2> INFO: PixTestPretest::doTest()
[18:56:35.696] <TB2> INFO: ######################################################################
[18:56:35.697] <TB2> INFO: ----------------------------------------------------------------------
[18:56:35.697] <TB2> INFO: PixTestPretest::programROC()
[18:56:35.697] <TB2> INFO: ----------------------------------------------------------------------
[18:56:53.710] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:56:53.710] <TB2> INFO: IA differences per ROC: 18.5 17.7 16.9 17.7 19.3 19.3 17.7 18.5 18.5 20.9 19.3 17.7 20.1 16.9 18.5 20.1
[18:56:53.747] <TB2> INFO: ----------------------------------------------------------------------
[18:56:53.747] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:56:53.747] <TB2> INFO: ----------------------------------------------------------------------
[18:57:02.435] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 397.9 mA = 24.8687 mA/ROC
[18:57:02.435] <TB2> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 20.9 20.9 20.9 20.9 20.1 20.9 20.9 20.9 20.1 20.1 20.9 20.1
[18:57:02.468] <TB2> INFO: ----------------------------------------------------------------------
[18:57:02.468] <TB2> INFO: PixTestPretest::findTiming()
[18:57:02.468] <TB2> INFO: ----------------------------------------------------------------------
[18:57:02.468] <TB2> INFO: PixTestCmd::init()

[18:57:33.803] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[18:57:33.803] <TB2> INFO: (success/tries = 100/100), width = 4
[18:57:35.308] <TB2> INFO: ----------------------------------------------------------------------
[18:57:35.308] <TB2> INFO: PixTestPretest::findWorkingPixel()
[18:57:35.308] <TB2> INFO: ----------------------------------------------------------------------
[18:57:35.400] <TB2> INFO: Expecting 231680 events.
[18:57:45.065] <TB2> INFO: 231680 events read in total (9074ms).
[18:57:45.073] <TB2> INFO: Test took 9762ms.
[18:57:45.317] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:57:45.347] <TB2> INFO: ----------------------------------------------------------------------
[18:57:45.347] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[18:57:45.347] <TB2> INFO: ----------------------------------------------------------------------
[18:57:45.440] <TB2> INFO: Expecting 231680 events.
[18:57:55.075] <TB2> INFO: 231680 events read in total (9044ms).
[18:57:55.083] <TB2> INFO: Test took 9732ms.
[18:57:55.341] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[18:57:55.341] <TB2> INFO: CalDel: 76 82 83 96 109 93 95 108 95 105 73 87 123 92 100 91
[18:57:55.341] <TB2> INFO: VthrComp: 56 51 51 51 51 51 51 51 51 51 54 58 51 51 61 51
[18:57:55.343] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C0.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C1.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C2.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C3.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C4.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C5.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C6.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C7.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C8.dat
[18:57:55.344] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C9.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C10.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C11.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C12.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C13.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C14.dat
[18:57:55.345] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters_C15.dat
[18:57:55.345] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C0a.dat
[18:57:55.345] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C0b.dat
[18:57:55.345] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C1a.dat
[18:57:55.345] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//tbmParameters_C1b.dat
[18:57:55.345] <TB2> INFO: PixTestPretest::doTest() done, duration: 80 seconds
[18:57:55.450] <TB2> INFO: enter test to run
[18:57:55.450] <TB2> INFO: test: FullTest no parameter change
[18:57:55.450] <TB2> INFO: running: fulltest
[18:57:55.450] <TB2> INFO: ######################################################################
[18:57:55.450] <TB2> INFO: PixTestFullTest::doTest()
[18:57:55.450] <TB2> INFO: ######################################################################
[18:57:55.451] <TB2> INFO: ######################################################################
[18:57:55.451] <TB2> INFO: PixTestAlive::doTest()
[18:57:55.451] <TB2> INFO: ######################################################################
[18:57:55.452] <TB2> INFO: ----------------------------------------------------------------------
[18:57:55.452] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:57:55.452] <TB2> INFO: ----------------------------------------------------------------------
[18:57:55.689] <TB2> INFO: Expecting 41600 events.
[18:57:59.105] <TB2> INFO: 41600 events read in total (2824ms).
[18:57:59.106] <TB2> INFO: Test took 3653ms.
[18:57:59.333] <TB2> INFO: PixTestAlive::aliveTest() done
[18:57:59.333] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
[18:57:59.334] <TB2> INFO: ----------------------------------------------------------------------
[18:57:59.334] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:57:59.334] <TB2> INFO: ----------------------------------------------------------------------
[18:57:59.567] <TB2> INFO: Expecting 41600 events.
[18:58:02.487] <TB2> INFO: 41600 events read in total (2329ms).
[18:58:02.487] <TB2> INFO: Test took 3151ms.
[18:58:02.487] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:58:02.728] <TB2> INFO: PixTestAlive::maskTest() done
[18:58:02.728] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:58:02.729] <TB2> INFO: ----------------------------------------------------------------------
[18:58:02.729] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:58:02.729] <TB2> INFO: ----------------------------------------------------------------------
[18:58:02.005] <TB2> INFO: Expecting 41600 events.
[18:58:06.511] <TB2> INFO: 41600 events read in total (2914ms).
[18:58:06.512] <TB2> INFO: Test took 3782ms.
[18:58:06.738] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[18:58:06.738] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:58:06.738] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[18:58:06.738] <TB2> INFO: Decoding statistics:
[18:58:06.738] <TB2> INFO: General information:
[18:58:06.738] <TB2> INFO: 16bit words read: 0
[18:58:06.738] <TB2> INFO: valid events total: 0
[18:58:06.738] <TB2> INFO: empty events: 0
[18:58:06.738] <TB2> INFO: valid events with pixels: 0
[18:58:06.738] <TB2> INFO: valid pixel hits: 0
[18:58:06.739] <TB2> INFO: Event errors: 0
[18:58:06.739] <TB2> INFO: start marker: 0
[18:58:06.739] <TB2> INFO: stop marker: 0
[18:58:06.739] <TB2> INFO: overflow: 0
[18:58:06.739] <TB2> INFO: invalid 5bit words: 0
[18:58:06.739] <TB2> INFO: invalid XOR eye diagram: 0
[18:58:06.739] <TB2> INFO: frame (failed synchr.): 0
[18:58:06.739] <TB2> INFO: idle data (no TBM trl): 0
[18:58:06.739] <TB2> INFO: no data (only TBM hdr): 0
[18:58:06.739] <TB2> INFO: TBM errors: 0
[18:58:06.739] <TB2> INFO: flawed TBM headers: 0
[18:58:06.739] <TB2> INFO: flawed TBM trailers: 0
[18:58:06.739] <TB2> INFO: event ID mismatches: 0
[18:58:06.739] <TB2> INFO: ROC errors: 0
[18:58:06.739] <TB2> INFO: missing ROC header(s): 0
[18:58:06.739] <TB2> INFO: misplaced readback start: 0
[18:58:06.739] <TB2> INFO: Pixel decoding errors: 0
[18:58:06.739] <TB2> INFO: pixel data incomplete: 0
[18:58:06.739] <TB2> INFO: pixel address: 0
[18:58:06.739] <TB2> INFO: pulse height fill bit: 0
[18:58:06.739] <TB2> INFO: buffer corruption: 0
[18:58:06.746] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C15.dat
[18:58:06.746] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[18:58:06.746] <TB2> INFO: ######################################################################
[18:58:06.746] <TB2> INFO: PixTestReadback::doTest()
[18:58:06.746] <TB2> INFO: ######################################################################
[18:58:06.746] <TB2> INFO: ----------------------------------------------------------------------
[18:58:06.746] <TB2> INFO: PixTestReadback::CalibrateVd()
[18:58:06.746] <TB2> INFO: ----------------------------------------------------------------------
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C0.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C1.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C2.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C3.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C4.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C5.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C6.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C7.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C8.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C9.dat
[18:58:16.709] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C10.dat
[18:58:16.710] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C11.dat
[18:58:16.710] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C12.dat
[18:58:16.710] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C13.dat
[18:58:16.710] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C14.dat
[18:58:16.710] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C15.dat
[18:58:16.737] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:58:16.737] <TB2> INFO: ----------------------------------------------------------------------
[18:58:16.737] <TB2> INFO: PixTestReadback::CalibrateVa()
[18:58:16.737] <TB2> INFO: ----------------------------------------------------------------------
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C0.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C1.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C2.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C3.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C4.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C5.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C6.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C7.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C8.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C9.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C10.dat
[18:58:26.632] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C11.dat
[18:58:26.633] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C12.dat
[18:58:26.633] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C13.dat
[18:58:26.633] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C14.dat
[18:58:26.633] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C15.dat
[18:58:26.660] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:58:26.660] <TB2> INFO: ----------------------------------------------------------------------
[18:58:26.660] <TB2> INFO: PixTestReadback::readbackVbg()
[18:58:26.660] <TB2> INFO: ----------------------------------------------------------------------
[18:58:34.300] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[18:58:34.300] <TB2> INFO: ----------------------------------------------------------------------
[18:58:34.300] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[18:58:34.300] <TB2> INFO: ----------------------------------------------------------------------
[18:58:34.300] <TB2> INFO: Vbg will be calibrated using Vd calibration
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156.9calibrated Vbg = 1.18156 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160.7calibrated Vbg = 1.17699 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.4calibrated Vbg = 1.17246 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 161.2calibrated Vbg = 1.16691 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 146.8calibrated Vbg = 1.17429 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.2calibrated Vbg = 1.17922 :::*/*/*/*/
[18:58:34.300] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 164calibrated Vbg = 1.18385 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 159.2calibrated Vbg = 1.18554 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158.7calibrated Vbg = 1.17747 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 152.2calibrated Vbg = 1.17403 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 153.4calibrated Vbg = 1.16913 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.8calibrated Vbg = 1.15898 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.9calibrated Vbg = 1.1763 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 152.8calibrated Vbg = 1.17934 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 151.9calibrated Vbg = 1.17612 :::*/*/*/*/
[18:58:34.301] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 158.9calibrated Vbg = 1.18077 :::*/*/*/*/
[18:58:34.303] <TB2> INFO: ----------------------------------------------------------------------
[18:58:34.303] <TB2> INFO: PixTestReadback::CalibrateIa()
[18:58:34.303] <TB2> INFO: ----------------------------------------------------------------------
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C0.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C1.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C2.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C3.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C4.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C5.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C6.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C7.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C8.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C9.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C10.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C11.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C12.dat
[19:01:14.621] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C13.dat
[19:01:14.622] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C14.dat
[19:01:14.622] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//readbackCal_C15.dat
[19:01:14.648] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[19:01:14.650] <TB2> INFO: PixTestReadback::doTest() done
[19:01:14.650] <TB2> INFO: Decoding statistics:
[19:01:14.650] <TB2> INFO: General information:
[19:01:14.650] <TB2> INFO: 16bit words read: 1536
[19:01:14.650] <TB2> INFO: valid events total: 256
[19:01:14.650] <TB2> INFO: empty events: 256
[19:01:14.650] <TB2> INFO: valid events with pixels: 0
[19:01:14.650] <TB2> INFO: valid pixel hits: 0
[19:01:14.650] <TB2> INFO: Event errors: 0
[19:01:14.650] <TB2> INFO: start marker: 0
[19:01:14.650] <TB2> INFO: stop marker: 0
[19:01:14.650] <TB2> INFO: overflow: 0
[19:01:14.650] <TB2> INFO: invalid 5bit words: 0
[19:01:14.650] <TB2> INFO: invalid XOR eye diagram: 0
[19:01:14.650] <TB2> INFO: frame (failed synchr.): 0
[19:01:14.650] <TB2> INFO: idle data (no TBM trl): 0
[19:01:14.650] <TB2> INFO: no data (only TBM hdr): 0
[19:01:14.650] <TB2> INFO: TBM errors: 0
[19:01:14.650] <TB2> INFO: flawed TBM headers: 0
[19:01:14.650] <TB2> INFO: flawed TBM trailers: 0
[19:01:14.650] <TB2> INFO: event ID mismatches: 0
[19:01:14.650] <TB2> INFO: ROC errors: 0
[19:01:14.650] <TB2> INFO: missing ROC header(s): 0
[19:01:14.650] <TB2> INFO: misplaced readback start: 0
[19:01:14.650] <TB2> INFO: Pixel decoding errors: 0
[19:01:14.650] <TB2> INFO: pixel data incomplete: 0
[19:01:14.650] <TB2> INFO: pixel address: 0
[19:01:14.650] <TB2> INFO: pulse height fill bit: 0
[19:01:14.650] <TB2> INFO: buffer corruption: 0
[19:01:14.685] <TB2> INFO: ######################################################################
[19:01:14.685] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[19:01:14.685] <TB2> INFO: ######################################################################
[19:01:14.687] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[19:01:14.698] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:01:14.698] <TB2> INFO: run 1 of 1
[19:01:14.930] <TB2> INFO: Expecting 3120000 events.
[19:01:45.745] <TB2> INFO: 685825 events read in total (30223ms).











[19:02:16.059] <TB2> INFO: 1368730 events read in total (60537ms).











[19:02:46.506] <TB2> INFO: 2048805 events read in total (90985ms).
[19:03:16.752] <TB2> INFO: 2727085 events read in total (121230ms).











[19:03:34.797] <TB2> INFO: 3120000 events read in total (139275ms).
[19:03:34.862] <TB2> INFO: Test took 140165ms.
[19:04:00.147] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 165 seconds
[19:04:00.147] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[19:04:00.147] <TB2> INFO: separation cut (per ROC): 120 114 103 111 118 108 119 104 104 115 129 133 104 106 119 107
[19:04:00.147] <TB2> INFO: Decoding statistics:
[19:04:00.147] <TB2> INFO: General information:
[19:04:00.147] <TB2> INFO: 16bit words read: 0
[19:04:00.147] <TB2> INFO: valid events total: 0
[19:04:00.147] <TB2> INFO: empty events: 0
[19:04:00.147] <TB2> INFO: valid events with pixels: 0
[19:04:00.147] <TB2> INFO: valid pixel hits: 0
[19:04:00.147] <TB2> INFO: Event errors: 0
[19:04:00.147] <TB2> INFO: start marker: 0
[19:04:00.147] <TB2> INFO: stop marker: 0
[19:04:00.147] <TB2> INFO: overflow: 0
[19:04:00.147] <TB2> INFO: invalid 5bit words: 0
[19:04:00.147] <TB2> INFO: invalid XOR eye diagram: 0
[19:04:00.147] <TB2> INFO: frame (failed synchr.): 0
[19:04:00.147] <TB2> INFO: idle data (no TBM trl): 0
[19:04:00.147] <TB2> INFO: no data (only TBM hdr): 0
[19:04:00.147] <TB2> INFO: TBM errors: 0
[19:04:00.147] <TB2> INFO: flawed TBM headers: 0
[19:04:00.148] <TB2> INFO: flawed TBM trailers: 0
[19:04:00.148] <TB2> INFO: event ID mismatches: 0
[19:04:00.148] <TB2> INFO: ROC errors: 0
[19:04:00.148] <TB2> INFO: missing ROC header(s): 0
[19:04:00.148] <TB2> INFO: misplaced readback start: 0
[19:04:00.148] <TB2> INFO: Pixel decoding errors: 0
[19:04:00.148] <TB2> INFO: pixel data incomplete: 0
[19:04:00.148] <TB2> INFO: pixel address: 0
[19:04:00.148] <TB2> INFO: pulse height fill bit: 0
[19:04:00.148] <TB2> INFO: buffer corruption: 0
[19:04:00.189] <TB2> INFO: ######################################################################
[19:04:00.189] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:04:00.189] <TB2> INFO: ######################################################################
[19:04:00.190] <TB2> INFO: ----------------------------------------------------------------------
[19:04:00.190] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[19:04:00.190] <TB2> INFO: ----------------------------------------------------------------------
[19:04:00.190] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[19:04:00.201] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[19:04:00.201] <TB2> INFO: run 1 of 1
[19:04:00.469] <TB2> INFO: Expecting 36608000 events.
[19:04:24.372] <TB2> INFO: 707450 events read in total (23306ms).
[19:04:47.298] <TB2> INFO: 1397150 events read in total (46232ms).
[19:05:10.191] <TB2> INFO: 2086550 events read in total (69125ms).
[19:05:33.258] <TB2> INFO: 2777600 events read in total (92192ms).
[19:05:56.029] <TB2> INFO: 3466500 events read in total (114963ms).
[19:06:18.930] <TB2> INFO: 4156300 events read in total (137864ms).
[19:06:41.739] <TB2> INFO: 4845500 events read in total (160673ms).
[19:07:04.691] <TB2> INFO: 5533900 events read in total (183625ms).
[19:07:27.398] <TB2> INFO: 6223850 events read in total (206332ms).
[19:07:50.307] <TB2> INFO: 6913300 events read in total (229241ms).
[19:08:13.347] <TB2> INFO: 7600250 events read in total (252281ms).
[19:08:35.918] <TB2> INFO: 8285700 events read in total (274852ms).
[19:08:58.733] <TB2> INFO: 8973900 events read in total (297667ms).
[19:09:21.319] <TB2> INFO: 9660500 events read in total (320253ms).
[19:09:44.240] <TB2> INFO: 10347200 events read in total (343174ms).
[19:10:07.181] <TB2> INFO: 11034650 events read in total (366115ms).
[19:10:29.969] <TB2> INFO: 11721700 events read in total (388903ms).
[19:10:52.905] <TB2> INFO: 12407200 events read in total (411839ms).
[19:11:15.645] <TB2> INFO: 13092300 events read in total (434579ms).
[19:11:38.467] <TB2> INFO: 13777400 events read in total (457401ms).
[19:12:01.262] <TB2> INFO: 14461600 events read in total (480196ms).
[19:12:24.008] <TB2> INFO: 15146300 events read in total (502942ms).
[19:12:46.850] <TB2> INFO: 15830050 events read in total (525784ms).
[19:13:09.100] <TB2> INFO: 16512300 events read in total (548034ms).
[19:13:31.889] <TB2> INFO: 17194250 events read in total (570823ms).
[19:13:54.419] <TB2> INFO: 17876250 events read in total (593353ms).
[19:14:17.067] <TB2> INFO: 18556900 events read in total (616001ms).
[19:14:39.644] <TB2> INFO: 19234750 events read in total (638578ms).
[19:15:02.308] <TB2> INFO: 19912250 events read in total (661242ms).
[19:15:25.220] <TB2> INFO: 20590000 events read in total (684154ms).
[19:15:47.970] <TB2> INFO: 21268350 events read in total (706904ms).
[19:16:10.617] <TB2> INFO: 21945600 events read in total (729551ms).
[19:16:33.240] <TB2> INFO: 22623550 events read in total (752174ms).
[19:16:55.928] <TB2> INFO: 23301550 events read in total (774862ms).
[19:17:18.701] <TB2> INFO: 23980300 events read in total (797635ms).
[19:17:41.252] <TB2> INFO: 24656800 events read in total (820186ms).
[19:18:03.674] <TB2> INFO: 25333800 events read in total (842608ms).
[19:18:26.455] <TB2> INFO: 26009700 events read in total (865389ms).
[19:18:49.113] <TB2> INFO: 26685100 events read in total (888047ms).
[19:19:11.859] <TB2> INFO: 27361850 events read in total (910793ms).
[19:19:34.450] <TB2> INFO: 28039600 events read in total (933384ms).
[19:19:57.175] <TB2> INFO: 28714650 events read in total (956109ms).
[19:20:19.924] <TB2> INFO: 29391350 events read in total (978858ms).
[19:20:42.875] <TB2> INFO: 30066550 events read in total (1001809ms).
[19:21:05.534] <TB2> INFO: 30741500 events read in total (1024468ms).
[19:21:28.282] <TB2> INFO: 31415250 events read in total (1047216ms).
[19:21:50.866] <TB2> INFO: 32090950 events read in total (1069800ms).
[19:22:13.576] <TB2> INFO: 32765800 events read in total (1092510ms).
[19:22:36.432] <TB2> INFO: 33441250 events read in total (1115366ms).
[19:22:59.088] <TB2> INFO: 34117450 events read in total (1138022ms).
[19:23:21.783] <TB2> INFO: 34794100 events read in total (1160717ms).
[19:23:44.410] <TB2> INFO: 35470700 events read in total (1183344ms).
[19:24:07.218] <TB2> INFO: 36152750 events read in total (1206152ms).
[19:24:22.523] <TB2> INFO: 36608000 events read in total (1221457ms).
[19:24:22.589] <TB2> INFO: Test took 1222388ms.
[19:24:23.105] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:25.115] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:27.154] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:29.198] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:31.166] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:32.898] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:34.970] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:36.990] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:39.014] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:40.784] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:42.557] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:44.467] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:46.335] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:48.162] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:49.964] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:51.554] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[19:24:53.143] <TB2> INFO: PixTestScurves::scurves() done
[19:24:53.143] <TB2> INFO: Vcal mean: 130.28 133.82 122.59 120.40 126.63 119.81 128.35 122.89 119.96 124.74 133.83 133.26 124.44 124.12 124.72 125.71
[19:24:53.143] <TB2> INFO: Vcal RMS: 6.52 6.14 6.11 5.94 6.07 5.90 6.34 6.19 5.82 6.40 6.05 6.07 6.52 6.47 8.20 6.31
[19:24:53.143] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1252 seconds
[19:24:53.143] <TB2> INFO: Decoding statistics:
[19:24:53.143] <TB2> INFO: General information:
[19:24:53.143] <TB2> INFO: 16bit words read: 0
[19:24:53.143] <TB2> INFO: valid events total: 0
[19:24:53.143] <TB2> INFO: empty events: 0
[19:24:53.143] <TB2> INFO: valid events with pixels: 0
[19:24:53.143] <TB2> INFO: valid pixel hits: 0
[19:24:53.143] <TB2> INFO: Event errors: 0
[19:24:53.143] <TB2> INFO: start marker: 0
[19:24:53.143] <TB2> INFO: stop marker: 0
[19:24:53.143] <TB2> INFO: overflow: 0
[19:24:53.143] <TB2> INFO: invalid 5bit words: 0
[19:24:53.143] <TB2> INFO: invalid XOR eye diagram: 0
[19:24:53.143] <TB2> INFO: frame (failed synchr.): 0
[19:24:53.143] <TB2> INFO: idle data (no TBM trl): 0
[19:24:53.143] <TB2> INFO: no data (only TBM hdr): 0
[19:24:53.143] <TB2> INFO: TBM errors: 0
[19:24:53.143] <TB2> INFO: flawed TBM headers: 0
[19:24:53.143] <TB2> INFO: flawed TBM trailers: 0
[19:24:53.143] <TB2> INFO: event ID mismatches: 0
[19:24:53.143] <TB2> INFO: ROC errors: 0
[19:24:53.143] <TB2> INFO: missing ROC header(s): 0
[19:24:53.143] <TB2> INFO: misplaced readback start: 0
[19:24:53.143] <TB2> INFO: Pixel decoding errors: 0
[19:24:53.143] <TB2> INFO: pixel data incomplete: 0
[19:24:53.143] <TB2> INFO: pixel address: 0
[19:24:53.143] <TB2> INFO: pulse height fill bit: 0
[19:24:53.143] <TB2> INFO: buffer corruption: 0
[19:24:53.209] <TB2> INFO: ######################################################################
[19:24:53.209] <TB2> INFO: PixTestTrim::doTest()
[19:24:53.209] <TB2> INFO: ######################################################################
[19:24:53.210] <TB2> INFO: ----------------------------------------------------------------------
[19:24:53.210] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[19:24:53.210] <TB2> INFO: ----------------------------------------------------------------------
[19:24:53.250] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[19:24:53.250] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:24:53.259] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:24:53.259] <TB2> INFO: run 1 of 1
[19:24:53.492] <TB2> INFO: Expecting 5025280 events.
[19:25:23.778] <TB2> INFO: 833104 events read in total (29691ms).
[19:25:53.703] <TB2> INFO: 1664480 events read in total (59616ms).
[19:26:23.446] <TB2> INFO: 2492984 events read in total (89359ms).
[19:26:53.108] <TB2> INFO: 3318824 events read in total (119021ms).
[19:27:22.788] <TB2> INFO: 4140472 events read in total (148701ms).
[19:27:52.729] <TB2> INFO: 4960544 events read in total (178642ms).
[19:27:55.483] <TB2> INFO: 5025280 events read in total (181396ms).
[19:27:55.526] <TB2> INFO: Test took 182268ms.
[19:28:12.826] <TB2> INFO: ROC 0 VthrComp = 133
[19:28:12.827] <TB2> INFO: ROC 1 VthrComp = 131
[19:28:12.827] <TB2> INFO: ROC 2 VthrComp = 124
[19:28:12.827] <TB2> INFO: ROC 3 VthrComp = 125
[19:28:12.827] <TB2> INFO: ROC 4 VthrComp = 129
[19:28:12.827] <TB2> INFO: ROC 5 VthrComp = 123
[19:28:12.827] <TB2> INFO: ROC 6 VthrComp = 131
[19:28:12.827] <TB2> INFO: ROC 7 VthrComp = 121
[19:28:12.827] <TB2> INFO: ROC 8 VthrComp = 125
[19:28:12.828] <TB2> INFO: ROC 9 VthrComp = 129
[19:28:12.828] <TB2> INFO: ROC 10 VthrComp = 132
[19:28:12.828] <TB2> INFO: ROC 11 VthrComp = 133
[19:28:12.829] <TB2> INFO: ROC 12 VthrComp = 116
[19:28:12.829] <TB2> INFO: ROC 13 VthrComp = 120
[19:28:12.829] <TB2> INFO: ROC 14 VthrComp = 130
[19:28:12.829] <TB2> INFO: ROC 15 VthrComp = 128
[19:28:13.080] <TB2> INFO: Expecting 41600 events.
[19:28:16.549] <TB2> INFO: 41600 events read in total (2877ms).
[19:28:16.550] <TB2> INFO: Test took 3718ms.
[19:28:16.558] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[19:28:16.558] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[19:28:16.567] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:28:16.567] <TB2> INFO: run 1 of 1
[19:28:16.845] <TB2> INFO: Expecting 5025280 events.
[19:28:43.201] <TB2> INFO: 592512 events read in total (25764ms).
[19:29:08.512] <TB2> INFO: 1183448 events read in total (51075ms).
[19:29:33.703] <TB2> INFO: 1774024 events read in total (76266ms).
[19:29:59.214] <TB2> INFO: 2363504 events read in total (101777ms).
[19:30:24.419] <TB2> INFO: 2950664 events read in total (126982ms).
[19:30:50.119] <TB2> INFO: 3535976 events read in total (152682ms).
[19:31:15.710] <TB2> INFO: 4120768 events read in total (178273ms).
[19:31:41.150] <TB2> INFO: 4704952 events read in total (203713ms).
[19:31:55.285] <TB2> INFO: 5025280 events read in total (217848ms).
[19:31:55.344] <TB2> INFO: Test took 218777ms.
[19:32:23.784] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.1488 for pixel 3/0 mean/min/max = 48.4971/33.6759/63.3182
[19:32:23.784] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 62.6736 for pixel 40/5 mean/min/max = 48.9442/34.6492/63.2393
[19:32:23.784] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.746 for pixel 3/8 mean/min/max = 46.53/32.1444/60.9156
[19:32:23.785] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.7918 for pixel 4/73 mean/min/max = 45.6127/32.1597/59.0657
[19:32:23.785] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.4204 for pixel 8/6 mean/min/max = 46.4517/32.3983/60.5051
[19:32:23.785] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.7855 for pixel 0/8 mean/min/max = 46.0646/33.1182/59.0109
[19:32:23.786] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.9383 for pixel 0/7 mean/min/max = 45.3912/31.7283/59.0541
[19:32:23.786] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.7598 for pixel 4/0 mean/min/max = 47.3462/32.8309/61.8616
[19:32:23.786] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.8464 for pixel 5/45 mean/min/max = 45.7961/31.5471/60.045
[19:32:23.786] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.9388 for pixel 49/5 mean/min/max = 45.3075/31.6195/58.9955
[19:32:23.787] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 65.6479 for pixel 0/59 mean/min/max = 50.2514/34.6742/65.8287
[19:32:23.787] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 69.8665 for pixel 14/73 mean/min/max = 54.1157/38.2436/69.9879
[19:32:23.787] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.6379 for pixel 51/5 mean/min/max = 46.5973/32.3554/60.8393
[19:32:23.788] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 63.01 for pixel 2/24 mean/min/max = 47.8262/32.6023/63.0501
[19:32:23.788] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 64.5964 for pixel 0/33 mean/min/max = 48.234/31.7177/64.7503
[19:32:23.789] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.2999 for pixel 12/1 mean/min/max = 45.2477/31.0833/59.4122
[19:32:23.789] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:32:23.877] <TB2> INFO: Expecting 411648 events.
[19:32:33.200] <TB2> INFO: 411648 events read in total (8731ms).
[19:32:33.207] <TB2> INFO: Expecting 411648 events.
[19:32:42.319] <TB2> INFO: 411648 events read in total (8709ms).
[19:32:42.328] <TB2> INFO: Expecting 411648 events.
[19:32:51.391] <TB2> INFO: 411648 events read in total (8660ms).
[19:32:51.402] <TB2> INFO: Expecting 411648 events.
[19:33:00.422] <TB2> INFO: 411648 events read in total (8617ms).
[19:33:00.436] <TB2> INFO: Expecting 411648 events.
[19:33:09.440] <TB2> INFO: 411648 events read in total (8601ms).
[19:33:09.457] <TB2> INFO: Expecting 411648 events.
[19:33:18.501] <TB2> INFO: 411648 events read in total (8641ms).
[19:33:18.520] <TB2> INFO: Expecting 411648 events.
[19:33:27.504] <TB2> INFO: 411648 events read in total (8581ms).
[19:33:27.526] <TB2> INFO: Expecting 411648 events.
[19:33:36.536] <TB2> INFO: 411648 events read in total (8607ms).
[19:33:36.563] <TB2> INFO: Expecting 411648 events.
[19:33:45.578] <TB2> INFO: 411648 events read in total (8612ms).
[19:33:45.605] <TB2> INFO: Expecting 411648 events.
[19:33:54.617] <TB2> INFO: 411648 events read in total (8609ms).
[19:33:54.646] <TB2> INFO: Expecting 411648 events.
[19:34:03.654] <TB2> INFO: 411648 events read in total (8605ms).
[19:34:03.687] <TB2> INFO: Expecting 411648 events.
[19:34:12.792] <TB2> INFO: 411648 events read in total (8702ms).
[19:34:12.839] <TB2> INFO: Expecting 411648 events.
[19:34:21.856] <TB2> INFO: 411648 events read in total (8614ms).
[19:34:21.896] <TB2> INFO: Expecting 411648 events.
[19:34:30.906] <TB2> INFO: 411648 events read in total (8607ms).
[19:34:30.959] <TB2> INFO: Expecting 411648 events.
[19:34:40.023] <TB2> INFO: 411648 events read in total (8661ms).
[19:34:40.064] <TB2> INFO: Expecting 411648 events.
[19:34:49.139] <TB2> INFO: 411648 events read in total (8672ms).
[19:34:49.181] <TB2> INFO: Test took 145392ms.
[19:34:49.900] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[19:34:49.910] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:34:49.910] <TB2> INFO: run 1 of 1
[19:34:50.143] <TB2> INFO: Expecting 5025280 events.
[19:35:15.940] <TB2> INFO: 589472 events read in total (25205ms).
[19:35:41.545] <TB2> INFO: 1178624 events read in total (50810ms).
[19:36:07.145] <TB2> INFO: 1766432 events read in total (76411ms).
[19:36:32.958] <TB2> INFO: 2354464 events read in total (102223ms).
[19:36:58.774] <TB2> INFO: 2943696 events read in total (128040ms).
[19:37:24.399] <TB2> INFO: 3534480 events read in total (153664ms).
[19:37:50.505] <TB2> INFO: 4123856 events read in total (179770ms).
[19:38:16.606] <TB2> INFO: 4714200 events read in total (205871ms).
[19:38:30.786] <TB2> INFO: 5025280 events read in total (220051ms).
[19:38:30.905] <TB2> INFO: Test took 220996ms.
[19:38:55.057] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 9.500000 .. 147.967876
[19:38:55.291] <TB2> INFO: Expecting 208000 events.
[19:39:04.785] <TB2> INFO: 208000 events read in total (8903ms).
[19:39:04.786] <TB2> INFO: Test took 9728ms.
[19:39:04.835] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 9 .. 157 (-1/-1) hits flags = 528 (plus default)
[19:39:04.846] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:39:04.846] <TB2> INFO: run 1 of 1
[19:39:05.123] <TB2> INFO: Expecting 4958720 events.
[19:39:30.990] <TB2> INFO: 573984 events read in total (25275ms).
[19:39:56.536] <TB2> INFO: 1148200 events read in total (50822ms).
[19:40:22.116] <TB2> INFO: 1721984 events read in total (76401ms).
[19:40:47.830] <TB2> INFO: 2295440 events read in total (102115ms).
[19:41:13.211] <TB2> INFO: 2868640 events read in total (127496ms).
[19:41:38.207] <TB2> INFO: 3440760 events read in total (152492ms).
[19:42:03.350] <TB2> INFO: 4013032 events read in total (177635ms).
[19:42:28.827] <TB2> INFO: 4585032 events read in total (203112ms).
[19:42:45.688] <TB2> INFO: 4958720 events read in total (219973ms).
[19:42:45.781] <TB2> INFO: Test took 220936ms.
[19:43:14.207] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 27.171278 .. 46.054437
[19:43:14.445] <TB2> INFO: Expecting 208000 events.
[19:43:24.386] <TB2> INFO: 208000 events read in total (9349ms).
[19:43:24.387] <TB2> INFO: Test took 10179ms.
[19:43:24.435] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 56 (-1/-1) hits flags = 528 (plus default)
[19:43:24.443] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:43:24.443] <TB2> INFO: run 1 of 1
[19:43:24.722] <TB2> INFO: Expecting 1331200 events.
[19:43:52.661] <TB2> INFO: 658528 events read in total (27347ms).
[19:44:20.214] <TB2> INFO: 1313488 events read in total (54900ms).
[19:44:21.392] <TB2> INFO: 1331200 events read in total (56078ms).
[19:44:21.426] <TB2> INFO: Test took 56983ms.
[19:44:36.388] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 28.464926 .. 49.009331
[19:44:36.632] <TB2> INFO: Expecting 208000 events.
[19:44:46.462] <TB2> INFO: 208000 events read in total (9238ms).
[19:44:46.463] <TB2> INFO: Test took 10073ms.
[19:44:46.508] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 59 (-1/-1) hits flags = 528 (plus default)
[19:44:46.517] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:44:46.517] <TB2> INFO: run 1 of 1
[19:44:46.795] <TB2> INFO: Expecting 1397760 events.
[19:45:14.264] <TB2> INFO: 642592 events read in total (26877ms).
[19:45:41.468] <TB2> INFO: 1283248 events read in total (54081ms).
[19:45:46.557] <TB2> INFO: 1397760 events read in total (59170ms).
[19:45:46.584] <TB2> INFO: Test took 60066ms.
[19:46:01.338] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.854797 .. 49.795509
[19:46:01.571] <TB2> INFO: Expecting 208000 events.
[19:46:11.208] <TB2> INFO: 208000 events read in total (9045ms).
[19:46:11.209] <TB2> INFO: Test took 9869ms.
[19:46:11.256] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 59 (-1/-1) hits flags = 528 (plus default)
[19:46:11.264] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:46:11.265] <TB2> INFO: run 1 of 1
[19:46:11.542] <TB2> INFO: Expecting 1497600 events.
[19:46:39.105] <TB2> INFO: 653192 events read in total (26971ms).
[19:47:06.465] <TB2> INFO: 1305904 events read in total (54331ms).
[19:47:14.850] <TB2> INFO: 1497600 events read in total (62716ms).
[19:47:14.879] <TB2> INFO: Test took 63615ms.
[19:47:29.301] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[19:47:29.301] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[19:47:29.311] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[19:47:29.311] <TB2> INFO: run 1 of 1
[19:47:29.549] <TB2> INFO: Expecting 1364480 events.
[19:47:57.572] <TB2> INFO: 667672 events read in total (27431ms).
[19:48:24.896] <TB2> INFO: 1334664 events read in total (54755ms).
[19:48:26.563] <TB2> INFO: 1364480 events read in total (56422ms).
[19:48:26.592] <TB2> INFO: Test took 57282ms.
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C0.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C1.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C2.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C3.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C4.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C5.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C6.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C7.dat
[19:48:39.654] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C8.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C9.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C10.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C11.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C12.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C13.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C14.dat
[19:48:39.655] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C15.dat
[19:48:39.655] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C0.dat
[19:48:39.663] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C1.dat
[19:48:39.670] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C2.dat
[19:48:39.675] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C3.dat
[19:48:39.681] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C4.dat
[19:48:39.686] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C5.dat
[19:48:39.691] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C6.dat
[19:48:39.697] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C7.dat
[19:48:39.702] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C8.dat
[19:48:39.708] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C9.dat
[19:48:39.713] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C10.dat
[19:48:39.719] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C11.dat
[19:48:39.727] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C12.dat
[19:48:39.735] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C13.dat
[19:48:39.743] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C14.dat
[19:48:39.749] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters35_C15.dat
[19:48:39.754] <TB2> INFO: PixTestTrim::trimTest() done
[19:48:39.754] <TB2> INFO: vtrim: 149 153 144 128 139 124 129 153 138 146 163 185 117 143 152 120
[19:48:39.754] <TB2> INFO: vthrcomp: 133 131 124 125 129 123 131 121 125 129 132 133 116 120 130 128
[19:48:39.754] <TB2> INFO: vcal mean: 35.17 35.42 35.10 34.97 34.97 34.95 34.99 35.07 34.94 34.98 35.13 35.61 34.95 35.24 35.24 34.98
[19:48:39.754] <TB2> INFO: vcal RMS: 1.33 1.63 1.32 1.04 1.14 0.99 1.03 1.31 1.08 1.10 1.24 1.96 1.28 1.44 1.43 1.12
[19:48:39.754] <TB2> INFO: bits mean: 9.43 9.15 9.75 9.53 9.76 9.07 9.78 9.99 9.93 10.43 8.42 8.32 9.58 9.77 9.32 10.06
[19:48:39.754] <TB2> INFO: bits RMS: 2.41 2.48 2.59 2.70 2.55 2.76 2.68 2.31 2.60 2.36 2.60 2.24 2.61 2.48 2.69 2.60
[19:48:39.762] <TB2> INFO: ----------------------------------------------------------------------
[19:48:39.762] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:48:39.762] <TB2> INFO: ----------------------------------------------------------------------
[19:48:39.765] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:48:39.776] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:48:39.776] <TB2> INFO: run 1 of 1
[19:48:40.010] <TB2> INFO: Expecting 4160000 events.
[19:49:12.555] <TB2> INFO: 779990 events read in total (31954ms).
[19:49:44.750] <TB2> INFO: 1553040 events read in total (64149ms).
[19:50:16.737] <TB2> INFO: 2320425 events read in total (96136ms).
[19:50:48.585] <TB2> INFO: 3081645 events read in total (127984ms).
[19:51:20.389] <TB2> INFO: 3840260 events read in total (159788ms).
[19:51:33.868] <TB2> INFO: 4160000 events read in total (173267ms).
[19:51:33.913] <TB2> INFO: Test took 174137ms.
[19:52:02.713] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[19:52:02.725] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:52:02.725] <TB2> INFO: run 1 of 1
[19:52:02.957] <TB2> INFO: Expecting 4638400 events.
[19:52:34.309] <TB2> INFO: 723495 events read in total (30760ms).
[19:53:05.307] <TB2> INFO: 1442790 events read in total (61758ms).
[19:53:35.967] <TB2> INFO: 2158750 events read in total (92418ms).
[19:54:06.690] <TB2> INFO: 2870835 events read in total (123141ms).
[19:54:37.135] <TB2> INFO: 3580460 events read in total (153586ms).
[19:55:07.631] <TB2> INFO: 4289020 events read in total (184082ms).
[19:55:22.772] <TB2> INFO: 4638400 events read in total (199223ms).
[19:55:22.830] <TB2> INFO: Test took 200106ms.
[19:55:53.125] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[19:55:53.134] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:55:53.134] <TB2> INFO: run 1 of 1
[19:55:53.368] <TB2> INFO: Expecting 4430400 events.
[19:56:25.267] <TB2> INFO: 736020 events read in total (31308ms).
[19:56:56.618] <TB2> INFO: 1467710 events read in total (62659ms).
[19:57:27.889] <TB2> INFO: 2194920 events read in total (93930ms).
[19:57:59.051] <TB2> INFO: 2918495 events read in total (125092ms).
[19:58:30.220] <TB2> INFO: 3639370 events read in total (156261ms).
[19:59:01.071] <TB2> INFO: 4359865 events read in total (187112ms).
[19:59:04.367] <TB2> INFO: 4430400 events read in total (190408ms).
[19:59:04.419] <TB2> INFO: Test took 191285ms.
[19:59:35.195] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[19:59:35.204] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[19:59:35.204] <TB2> INFO: run 1 of 1
[19:59:35.444] <TB2> INFO: Expecting 4472000 events.
[20:00:07.137] <TB2> INFO: 733615 events read in total (31102ms).
[20:00:38.222] <TB2> INFO: 1462815 events read in total (62187ms).
[20:01:09.085] <TB2> INFO: 2187775 events read in total (93050ms).
[20:01:39.969] <TB2> INFO: 2909210 events read in total (123934ms).
[20:02:10.858] <TB2> INFO: 3628375 events read in total (154823ms).
[20:02:41.297] <TB2> INFO: 4346045 events read in total (185262ms).
[20:02:47.053] <TB2> INFO: 4472000 events read in total (191018ms).
[20:02:47.106] <TB2> INFO: Test took 191902ms.
[20:03:17.622] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[20:03:17.633] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:03:17.633] <TB2> INFO: run 1 of 1
[20:03:17.875] <TB2> INFO: Expecting 4472000 events.
[20:03:49.595] <TB2> INFO: 733680 events read in total (31128ms).
[20:04:20.431] <TB2> INFO: 1462920 events read in total (61964ms).
[20:04:51.222] <TB2> INFO: 2188195 events read in total (92755ms).
[20:05:21.838] <TB2> INFO: 2909705 events read in total (123371ms).
[20:05:52.479] <TB2> INFO: 3628905 events read in total (154012ms).
[20:06:23.071] <TB2> INFO: 4346760 events read in total (184605ms).
[20:06:28.719] <TB2> INFO: 4472000 events read in total (190252ms).
[20:06:28.774] <TB2> INFO: Test took 191141ms.
[20:06:58.956] <TB2> INFO: PixTestTrim::trimBitTest() done
[20:06:58.957] <TB2> INFO: PixTestTrim::doTest() done, duration: 2525 seconds
[20:06:58.957] <TB2> INFO: Decoding statistics:
[20:06:58.957] <TB2> INFO: General information:
[20:06:58.957] <TB2> INFO: 16bit words read: 0
[20:06:58.957] <TB2> INFO: valid events total: 0
[20:06:58.957] <TB2> INFO: empty events: 0
[20:06:58.957] <TB2> INFO: valid events with pixels: 0
[20:06:58.957] <TB2> INFO: valid pixel hits: 0
[20:06:58.957] <TB2> INFO: Event errors: 0
[20:06:58.957] <TB2> INFO: start marker: 0
[20:06:58.957] <TB2> INFO: stop marker: 0
[20:06:58.957] <TB2> INFO: overflow: 0
[20:06:58.957] <TB2> INFO: invalid 5bit words: 0
[20:06:58.957] <TB2> INFO: invalid XOR eye diagram: 0
[20:06:58.957] <TB2> INFO: frame (failed synchr.): 0
[20:06:58.957] <TB2> INFO: idle data (no TBM trl): 0
[20:06:58.957] <TB2> INFO: no data (only TBM hdr): 0
[20:06:58.957] <TB2> INFO: TBM errors: 0
[20:06:58.957] <TB2> INFO: flawed TBM headers: 0
[20:06:58.957] <TB2> INFO: flawed TBM trailers: 0
[20:06:58.957] <TB2> INFO: event ID mismatches: 0
[20:06:58.957] <TB2> INFO: ROC errors: 0
[20:06:58.957] <TB2> INFO: missing ROC header(s): 0
[20:06:58.957] <TB2> INFO: misplaced readback start: 0
[20:06:58.957] <TB2> INFO: Pixel decoding errors: 0
[20:06:58.957] <TB2> INFO: pixel data incomplete: 0
[20:06:58.957] <TB2> INFO: pixel address: 0
[20:06:58.957] <TB2> INFO: pulse height fill bit: 0
[20:06:58.957] <TB2> INFO: buffer corruption: 0
[20:06:59.598] <TB2> INFO: ######################################################################
[20:06:59.598] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[20:06:59.598] <TB2> INFO: ######################################################################
[20:06:59.853] <TB2> INFO: Expecting 41600 events.
[20:07:03.387] <TB2> INFO: 41600 events read in total (2942ms).
[20:07:03.388] <TB2> INFO: Test took 3788ms.
[20:07:03.828] <TB2> INFO: Expecting 41600 events.
[20:07:07.395] <TB2> INFO: 41600 events read in total (2975ms).
[20:07:07.397] <TB2> INFO: Test took 3804ms.
[20:07:07.685] <TB2> INFO: Expecting 41600 events.
[20:07:11.157] <TB2> INFO: 41600 events read in total (2880ms).
[20:07:11.158] <TB2> INFO: Test took 3737ms.
[20:07:11.445] <TB2> INFO: Expecting 41600 events.
[20:07:14.898] <TB2> INFO: 41600 events read in total (2861ms).
[20:07:14.898] <TB2> INFO: Test took 3717ms.
[20:07:15.187] <TB2> INFO: Expecting 41600 events.
[20:07:18.687] <TB2> INFO: 41600 events read in total (2909ms).
[20:07:18.688] <TB2> INFO: Test took 3766ms.
[20:07:18.976] <TB2> INFO: Expecting 41600 events.
[20:07:22.440] <TB2> INFO: 41600 events read in total (2873ms).
[20:07:22.440] <TB2> INFO: Test took 3729ms.
[20:07:22.728] <TB2> INFO: Expecting 41600 events.
[20:07:26.229] <TB2> INFO: 41600 events read in total (2909ms).
[20:07:26.230] <TB2> INFO: Test took 3766ms.
[20:07:26.521] <TB2> INFO: Expecting 41600 events.
[20:07:29.970] <TB2> INFO: 41600 events read in total (2858ms).
[20:07:29.971] <TB2> INFO: Test took 3715ms.
[20:07:30.258] <TB2> INFO: Expecting 41600 events.
[20:07:33.750] <TB2> INFO: 41600 events read in total (2900ms).
[20:07:33.751] <TB2> INFO: Test took 3757ms.
[20:07:34.041] <TB2> INFO: Expecting 41600 events.
[20:07:37.584] <TB2> INFO: 41600 events read in total (2951ms).
[20:07:37.585] <TB2> INFO: Test took 3808ms.
[20:07:37.873] <TB2> INFO: Expecting 41600 events.
[20:07:41.351] <TB2> INFO: 41600 events read in total (2886ms).
[20:07:41.352] <TB2> INFO: Test took 3744ms.
[20:07:41.639] <TB2> INFO: Expecting 41600 events.
[20:07:45.168] <TB2> INFO: 41600 events read in total (2937ms).
[20:07:45.169] <TB2> INFO: Test took 3794ms.
[20:07:45.456] <TB2> INFO: Expecting 41600 events.
[20:07:48.917] <TB2> INFO: 41600 events read in total (2869ms).
[20:07:48.918] <TB2> INFO: Test took 3726ms.
[20:07:49.206] <TB2> INFO: Expecting 41600 events.
[20:07:52.767] <TB2> INFO: 41600 events read in total (2970ms).
[20:07:52.768] <TB2> INFO: Test took 3827ms.
[20:07:53.064] <TB2> INFO: Expecting 41600 events.
[20:07:56.681] <TB2> INFO: 41600 events read in total (3025ms).
[20:07:56.681] <TB2> INFO: Test took 3890ms.
[20:07:56.970] <TB2> INFO: Expecting 41600 events.
[20:08:00.430] <TB2> INFO: 41600 events read in total (2868ms).
[20:08:00.431] <TB2> INFO: Test took 3726ms.
[20:08:00.719] <TB2> INFO: Expecting 41600 events.
[20:08:04.167] <TB2> INFO: 41600 events read in total (2857ms).
[20:08:04.167] <TB2> INFO: Test took 3713ms.
[20:08:04.455] <TB2> INFO: Expecting 41600 events.
[20:08:07.975] <TB2> INFO: 41600 events read in total (2928ms).
[20:08:07.976] <TB2> INFO: Test took 3785ms.
[20:08:08.267] <TB2> INFO: Expecting 41600 events.
[20:08:11.741] <TB2> INFO: 41600 events read in total (2883ms).
[20:08:11.741] <TB2> INFO: Test took 3739ms.
[20:08:12.029] <TB2> INFO: Expecting 41600 events.
[20:08:15.563] <TB2> INFO: 41600 events read in total (2942ms).
[20:08:15.564] <TB2> INFO: Test took 3799ms.
[20:08:15.852] <TB2> INFO: Expecting 41600 events.
[20:08:19.299] <TB2> INFO: 41600 events read in total (2856ms).
[20:08:19.300] <TB2> INFO: Test took 3713ms.
[20:08:19.589] <TB2> INFO: Expecting 41600 events.
[20:08:23.117] <TB2> INFO: 41600 events read in total (2937ms).
[20:08:23.118] <TB2> INFO: Test took 3794ms.
[20:08:23.405] <TB2> INFO: Expecting 41600 events.
[20:08:26.935] <TB2> INFO: 41600 events read in total (2938ms).
[20:08:26.936] <TB2> INFO: Test took 3795ms.
[20:08:27.224] <TB2> INFO: Expecting 41600 events.
[20:08:30.687] <TB2> INFO: 41600 events read in total (2871ms).
[20:08:30.688] <TB2> INFO: Test took 3729ms.
[20:08:30.976] <TB2> INFO: Expecting 41600 events.
[20:08:34.446] <TB2> INFO: 41600 events read in total (2879ms).
[20:08:34.447] <TB2> INFO: Test took 3736ms.
[20:08:34.737] <TB2> INFO: Expecting 41600 events.
[20:08:38.240] <TB2> INFO: 41600 events read in total (2911ms).
[20:08:38.240] <TB2> INFO: Test took 3767ms.
[20:08:38.528] <TB2> INFO: Expecting 41600 events.
[20:08:42.057] <TB2> INFO: 41600 events read in total (2937ms).
[20:08:42.058] <TB2> INFO: Test took 3794ms.
[20:08:42.349] <TB2> INFO: Expecting 41600 events.
[20:08:45.866] <TB2> INFO: 41600 events read in total (2926ms).
[20:08:45.867] <TB2> INFO: Test took 3783ms.
[20:08:46.160] <TB2> INFO: Expecting 41600 events.
[20:08:49.655] <TB2> INFO: 41600 events read in total (2904ms).
[20:08:49.656] <TB2> INFO: Test took 3761ms.
[20:08:49.944] <TB2> INFO: Expecting 2560 events.
[20:08:50.827] <TB2> INFO: 2560 events read in total (291ms).
[20:08:50.827] <TB2> INFO: Test took 1159ms.
[20:08:51.135] <TB2> INFO: Expecting 2560 events.
[20:08:52.021] <TB2> INFO: 2560 events read in total (295ms).
[20:08:52.021] <TB2> INFO: Test took 1194ms.
[20:08:52.329] <TB2> INFO: Expecting 2560 events.
[20:08:53.212] <TB2> INFO: 2560 events read in total (291ms).
[20:08:53.212] <TB2> INFO: Test took 1191ms.
[20:08:53.519] <TB2> INFO: Expecting 2560 events.
[20:08:54.403] <TB2> INFO: 2560 events read in total (292ms).
[20:08:54.403] <TB2> INFO: Test took 1191ms.
[20:08:54.711] <TB2> INFO: Expecting 2560 events.
[20:08:55.589] <TB2> INFO: 2560 events read in total (287ms).
[20:08:55.589] <TB2> INFO: Test took 1186ms.
[20:08:55.897] <TB2> INFO: Expecting 2560 events.
[20:08:56.776] <TB2> INFO: 2560 events read in total (287ms).
[20:08:56.776] <TB2> INFO: Test took 1186ms.
[20:08:57.084] <TB2> INFO: Expecting 2560 events.
[20:08:57.964] <TB2> INFO: 2560 events read in total (289ms).
[20:08:57.964] <TB2> INFO: Test took 1187ms.
[20:08:58.272] <TB2> INFO: Expecting 2560 events.
[20:08:59.150] <TB2> INFO: 2560 events read in total (286ms).
[20:08:59.150] <TB2> INFO: Test took 1185ms.
[20:08:59.459] <TB2> INFO: Expecting 2560 events.
[20:09:00.336] <TB2> INFO: 2560 events read in total (286ms).
[20:09:00.336] <TB2> INFO: Test took 1185ms.
[20:09:00.644] <TB2> INFO: Expecting 2560 events.
[20:09:01.523] <TB2> INFO: 2560 events read in total (288ms).
[20:09:01.523] <TB2> INFO: Test took 1187ms.
[20:09:01.831] <TB2> INFO: Expecting 2560 events.
[20:09:02.708] <TB2> INFO: 2560 events read in total (285ms).
[20:09:02.708] <TB2> INFO: Test took 1185ms.
[20:09:03.016] <TB2> INFO: Expecting 2560 events.
[20:09:03.895] <TB2> INFO: 2560 events read in total (288ms).
[20:09:03.895] <TB2> INFO: Test took 1186ms.
[20:09:04.203] <TB2> INFO: Expecting 2560 events.
[20:09:05.086] <TB2> INFO: 2560 events read in total (292ms).
[20:09:05.086] <TB2> INFO: Test took 1191ms.
[20:09:05.394] <TB2> INFO: Expecting 2560 events.
[20:09:06.279] <TB2> INFO: 2560 events read in total (294ms).
[20:09:06.279] <TB2> INFO: Test took 1193ms.
[20:09:06.587] <TB2> INFO: Expecting 2560 events.
[20:09:07.472] <TB2> INFO: 2560 events read in total (294ms).
[20:09:07.472] <TB2> INFO: Test took 1193ms.
[20:09:07.780] <TB2> INFO: Expecting 2560 events.
[20:09:08.663] <TB2> INFO: 2560 events read in total (291ms).
[20:09:08.663] <TB2> INFO: Test took 1191ms.
[20:09:08.666] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:09:08.972] <TB2> INFO: Expecting 655360 events.
[20:09:23.326] <TB2> INFO: 655360 events read in total (13762ms).
[20:09:23.336] <TB2> INFO: Expecting 655360 events.
[20:09:37.391] <TB2> INFO: 655360 events read in total (13652ms).
[20:09:37.405] <TB2> INFO: Expecting 655360 events.
[20:09:51.438] <TB2> INFO: 655360 events read in total (13630ms).
[20:09:51.463] <TB2> INFO: Expecting 655360 events.
[20:10:05.622] <TB2> INFO: 655360 events read in total (13756ms).
[20:10:05.653] <TB2> INFO: Expecting 655360 events.
[20:10:19.635] <TB2> INFO: 655360 events read in total (13579ms).
[20:10:19.672] <TB2> INFO: Expecting 655360 events.
[20:10:33.736] <TB2> INFO: 655360 events read in total (13661ms).
[20:10:33.766] <TB2> INFO: Expecting 655360 events.
[20:10:47.867] <TB2> INFO: 655360 events read in total (13698ms).
[20:10:47.914] <TB2> INFO: Expecting 655360 events.
[20:11:01.991] <TB2> INFO: 655360 events read in total (13674ms).
[20:11:02.044] <TB2> INFO: Expecting 655360 events.
[20:11:16.127] <TB2> INFO: 655360 events read in total (13680ms).
[20:11:16.169] <TB2> INFO: Expecting 655360 events.
[20:11:30.174] <TB2> INFO: 655360 events read in total (13602ms).
[20:11:30.231] <TB2> INFO: Expecting 655360 events.
[20:11:44.238] <TB2> INFO: 655360 events read in total (13604ms).
[20:11:44.292] <TB2> INFO: Expecting 655360 events.
[20:11:58.361] <TB2> INFO: 655360 events read in total (13666ms).
[20:11:58.438] <TB2> INFO: Expecting 655360 events.
[20:12:12.463] <TB2> INFO: 655360 events read in total (13622ms).
[20:12:12.524] <TB2> INFO: Expecting 655360 events.
[20:12:26.629] <TB2> INFO: 655360 events read in total (13702ms).
[20:12:26.695] <TB2> INFO: Expecting 655360 events.
[20:12:40.702] <TB2> INFO: 655360 events read in total (13604ms).
[20:12:40.772] <TB2> INFO: Expecting 655360 events.
[20:12:54.833] <TB2> INFO: 655360 events read in total (13658ms).
[20:12:54.906] <TB2> INFO: Test took 226240ms.
[20:12:54.986] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:12:55.250] <TB2> INFO: Expecting 655360 events.
[20:13:09.231] <TB2> INFO: 655360 events read in total (13389ms).
[20:13:09.244] <TB2> INFO: Expecting 655360 events.
[20:13:23.199] <TB2> INFO: 655360 events read in total (13552ms).
[20:13:23.213] <TB2> INFO: Expecting 655360 events.
[20:13:37.220] <TB2> INFO: 655360 events read in total (13604ms).
[20:13:37.238] <TB2> INFO: Expecting 655360 events.
[20:13:51.245] <TB2> INFO: 655360 events read in total (13604ms).
[20:13:51.275] <TB2> INFO: Expecting 655360 events.
[20:14:05.274] <TB2> INFO: 655360 events read in total (13596ms).
[20:14:05.300] <TB2> INFO: Expecting 655360 events.
[20:14:18.946] <TB2> INFO: 655360 events read in total (13243ms).
[20:14:18.978] <TB2> INFO: Expecting 655360 events.
[20:14:33.011] <TB2> INFO: 655360 events read in total (13630ms).
[20:14:33.045] <TB2> INFO: Expecting 655360 events.
[20:14:46.898] <TB2> INFO: 655360 events read in total (13450ms).
[20:14:46.936] <TB2> INFO: Expecting 655360 events.
[20:15:00.860] <TB2> INFO: 655360 events read in total (13521ms).
[20:15:00.917] <TB2> INFO: Expecting 655360 events.
[20:15:14.944] <TB2> INFO: 655360 events read in total (13624ms).
[20:15:14.006] <TB2> INFO: Expecting 655360 events.
[20:15:29.084] <TB2> INFO: 655360 events read in total (13675ms).
[20:15:29.158] <TB2> INFO: Expecting 655360 events.
[20:15:43.039] <TB2> INFO: 655360 events read in total (13479ms).
[20:15:43.096] <TB2> INFO: Expecting 655360 events.
[20:15:56.888] <TB2> INFO: 655360 events read in total (13389ms).
[20:15:56.969] <TB2> INFO: Expecting 655360 events.
[20:16:10.946] <TB2> INFO: 655360 events read in total (13574ms).
[20:16:11.017] <TB2> INFO: Expecting 655360 events.
[20:16:24.698] <TB2> INFO: 655360 events read in total (13278ms).
[20:16:24.767] <TB2> INFO: Expecting 655360 events.
[20:16:38.975] <TB2> INFO: 655360 events read in total (13805ms).
[20:16:39.052] <TB2> INFO: Test took 224066ms.
[20:16:39.231] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.237] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.242] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.247] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.252] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:16:39.257] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.262] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.267] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.272] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:16:39.277] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:16:39.282] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.287] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.292] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.297] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.302] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.308] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.313] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.318] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.323] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:16:39.329] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.334] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.339] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.344] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.349] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.354] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.359] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[20:16:39.364] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[20:16:39.369] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[20:16:39.374] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[20:16:39.379] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[20:16:39.384] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[20:16:39.389] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[20:16:39.394] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[20:16:39.399] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[20:16:39.404] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[20:16:39.409] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[20:16:39.443] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C0.dat
[20:16:39.443] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C1.dat
[20:16:39.443] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C2.dat
[20:16:39.443] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C3.dat
[20:16:39.443] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C4.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C5.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C6.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C7.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C8.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C9.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C10.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C11.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C12.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C13.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C14.dat
[20:16:39.444] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters35_C15.dat
[20:16:39.682] <TB2> INFO: Expecting 41600 events.
[20:16:42.792] <TB2> INFO: 41600 events read in total (2519ms).
[20:16:42.793] <TB2> INFO: Test took 3346ms.
[20:16:43.285] <TB2> INFO: Expecting 41600 events.
[20:16:46.260] <TB2> INFO: 41600 events read in total (2383ms).
[20:16:46.261] <TB2> INFO: Test took 3256ms.
[20:16:46.705] <TB2> INFO: Expecting 41600 events.
[20:16:49.826] <TB2> INFO: 41600 events read in total (2530ms).
[20:16:49.826] <TB2> INFO: Test took 3355ms.
[20:16:50.040] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:50.129] <TB2> INFO: Expecting 2560 events.
[20:16:51.013] <TB2> INFO: 2560 events read in total (293ms).
[20:16:51.014] <TB2> INFO: Test took 974ms.
[20:16:51.015] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:51.322] <TB2> INFO: Expecting 2560 events.
[20:16:52.204] <TB2> INFO: 2560 events read in total (291ms).
[20:16:52.204] <TB2> INFO: Test took 1189ms.
[20:16:52.206] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:52.513] <TB2> INFO: Expecting 2560 events.
[20:16:53.398] <TB2> INFO: 2560 events read in total (294ms).
[20:16:53.398] <TB2> INFO: Test took 1192ms.
[20:16:53.400] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:53.706] <TB2> INFO: Expecting 2560 events.
[20:16:54.588] <TB2> INFO: 2560 events read in total (290ms).
[20:16:54.588] <TB2> INFO: Test took 1188ms.
[20:16:54.590] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:54.897] <TB2> INFO: Expecting 2560 events.
[20:16:55.782] <TB2> INFO: 2560 events read in total (294ms).
[20:16:55.782] <TB2> INFO: Test took 1192ms.
[20:16:55.784] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:56.091] <TB2> INFO: Expecting 2560 events.
[20:16:56.976] <TB2> INFO: 2560 events read in total (294ms).
[20:16:56.976] <TB2> INFO: Test took 1192ms.
[20:16:56.978] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:57.284] <TB2> INFO: Expecting 2560 events.
[20:16:58.167] <TB2> INFO: 2560 events read in total (291ms).
[20:16:58.167] <TB2> INFO: Test took 1189ms.
[20:16:58.168] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:58.476] <TB2> INFO: Expecting 2560 events.
[20:16:59.358] <TB2> INFO: 2560 events read in total (291ms).
[20:16:59.358] <TB2> INFO: Test took 1190ms.
[20:16:59.360] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:16:59.667] <TB2> INFO: Expecting 2560 events.
[20:17:00.545] <TB2> INFO: 2560 events read in total (287ms).
[20:17:00.545] <TB2> INFO: Test took 1185ms.
[20:17:00.547] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:00.853] <TB2> INFO: Expecting 2560 events.
[20:17:01.732] <TB2> INFO: 2560 events read in total (287ms).
[20:17:01.732] <TB2> INFO: Test took 1185ms.
[20:17:01.734] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:02.041] <TB2> INFO: Expecting 2560 events.
[20:17:02.919] <TB2> INFO: 2560 events read in total (286ms).
[20:17:02.920] <TB2> INFO: Test took 1186ms.
[20:17:02.921] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:03.228] <TB2> INFO: Expecting 2560 events.
[20:17:04.106] <TB2> INFO: 2560 events read in total (287ms).
[20:17:04.106] <TB2> INFO: Test took 1185ms.
[20:17:04.108] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:04.415] <TB2> INFO: Expecting 2560 events.
[20:17:05.295] <TB2> INFO: 2560 events read in total (288ms).
[20:17:05.295] <TB2> INFO: Test took 1187ms.
[20:17:05.297] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:05.604] <TB2> INFO: Expecting 2560 events.
[20:17:06.483] <TB2> INFO: 2560 events read in total (288ms).
[20:17:06.484] <TB2> INFO: Test took 1187ms.
[20:17:06.485] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:06.792] <TB2> INFO: Expecting 2560 events.
[20:17:07.670] <TB2> INFO: 2560 events read in total (287ms).
[20:17:07.670] <TB2> INFO: Test took 1185ms.
[20:17:07.672] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:07.978] <TB2> INFO: Expecting 2560 events.
[20:17:08.857] <TB2> INFO: 2560 events read in total (287ms).
[20:17:08.857] <TB2> INFO: Test took 1185ms.
[20:17:08.859] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:09.166] <TB2> INFO: Expecting 2560 events.
[20:17:10.045] <TB2> INFO: 2560 events read in total (288ms).
[20:17:10.045] <TB2> INFO: Test took 1186ms.
[20:17:10.047] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:10.354] <TB2> INFO: Expecting 2560 events.
[20:17:11.232] <TB2> INFO: 2560 events read in total (287ms).
[20:17:11.232] <TB2> INFO: Test took 1185ms.
[20:17:11.234] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:11.541] <TB2> INFO: Expecting 2560 events.
[20:17:12.420] <TB2> INFO: 2560 events read in total (287ms).
[20:17:12.420] <TB2> INFO: Test took 1186ms.
[20:17:12.422] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:12.728] <TB2> INFO: Expecting 2560 events.
[20:17:13.606] <TB2> INFO: 2560 events read in total (287ms).
[20:17:13.606] <TB2> INFO: Test took 1184ms.
[20:17:13.608] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:13.915] <TB2> INFO: Expecting 2560 events.
[20:17:14.793] <TB2> INFO: 2560 events read in total (287ms).
[20:17:14.793] <TB2> INFO: Test took 1185ms.
[20:17:14.795] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:15.102] <TB2> INFO: Expecting 2560 events.
[20:17:15.980] <TB2> INFO: 2560 events read in total (287ms).
[20:17:15.981] <TB2> INFO: Test took 1186ms.
[20:17:15.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:16.289] <TB2> INFO: Expecting 2560 events.
[20:17:17.169] <TB2> INFO: 2560 events read in total (288ms).
[20:17:17.169] <TB2> INFO: Test took 1186ms.
[20:17:17.171] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:17.477] <TB2> INFO: Expecting 2560 events.
[20:17:18.357] <TB2> INFO: 2560 events read in total (288ms).
[20:17:18.357] <TB2> INFO: Test took 1186ms.
[20:17:18.359] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:18.666] <TB2> INFO: Expecting 2560 events.
[20:17:19.552] <TB2> INFO: 2560 events read in total (295ms).
[20:17:19.553] <TB2> INFO: Test took 1194ms.
[20:17:19.555] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:19.861] <TB2> INFO: Expecting 2560 events.
[20:17:20.744] <TB2> INFO: 2560 events read in total (291ms).
[20:17:20.745] <TB2> INFO: Test took 1191ms.
[20:17:20.746] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:21.053] <TB2> INFO: Expecting 2560 events.
[20:17:21.936] <TB2> INFO: 2560 events read in total (291ms).
[20:17:21.937] <TB2> INFO: Test took 1191ms.
[20:17:21.939] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:22.245] <TB2> INFO: Expecting 2560 events.
[20:17:23.129] <TB2> INFO: 2560 events read in total (292ms).
[20:17:23.129] <TB2> INFO: Test took 1190ms.
[20:17:23.131] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:23.437] <TB2> INFO: Expecting 2560 events.
[20:17:24.324] <TB2> INFO: 2560 events read in total (295ms).
[20:17:24.324] <TB2> INFO: Test took 1193ms.
[20:17:24.326] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:24.633] <TB2> INFO: Expecting 2560 events.
[20:17:25.517] <TB2> INFO: 2560 events read in total (292ms).
[20:17:25.517] <TB2> INFO: Test took 1191ms.
[20:17:25.519] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:25.826] <TB2> INFO: Expecting 2560 events.
[20:17:26.712] <TB2> INFO: 2560 events read in total (295ms).
[20:17:26.713] <TB2> INFO: Test took 1194ms.
[20:17:26.714] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:17:27.021] <TB2> INFO: Expecting 2560 events.
[20:17:27.905] <TB2> INFO: 2560 events read in total (292ms).
[20:17:27.905] <TB2> INFO: Test took 1191ms.
[20:17:28.369] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 628 seconds
[20:17:28.369] <TB2> INFO: PH scale (per ROC): 48 52 31 41 48 45 35 49 56 35 46 44 49 30 48 41
[20:17:28.369] <TB2> INFO: PH offset (per ROC): 123 107 109 91 126 101 87 128 117 106 108 95 123 94 109 112
[20:17:28.375] <TB2> INFO: Decoding statistics:
[20:17:28.375] <TB2> INFO: General information:
[20:17:28.375] <TB2> INFO: 16bit words read: 127882
[20:17:28.375] <TB2> INFO: valid events total: 20480
[20:17:28.375] <TB2> INFO: empty events: 17979
[20:17:28.375] <TB2> INFO: valid events with pixels: 2501
[20:17:28.375] <TB2> INFO: valid pixel hits: 2501
[20:17:28.375] <TB2> INFO: Event errors: 0
[20:17:28.375] <TB2> INFO: start marker: 0
[20:17:28.375] <TB2> INFO: stop marker: 0
[20:17:28.375] <TB2> INFO: overflow: 0
[20:17:28.375] <TB2> INFO: invalid 5bit words: 0
[20:17:28.375] <TB2> INFO: invalid XOR eye diagram: 0
[20:17:28.375] <TB2> INFO: frame (failed synchr.): 0
[20:17:28.375] <TB2> INFO: idle data (no TBM trl): 0
[20:17:28.375] <TB2> INFO: no data (only TBM hdr): 0
[20:17:28.375] <TB2> INFO: TBM errors: 0
[20:17:28.375] <TB2> INFO: flawed TBM headers: 0
[20:17:28.375] <TB2> INFO: flawed TBM trailers: 0
[20:17:28.375] <TB2> INFO: event ID mismatches: 0
[20:17:28.375] <TB2> INFO: ROC errors: 0
[20:17:28.375] <TB2> INFO: missing ROC header(s): 0
[20:17:28.375] <TB2> INFO: misplaced readback start: 0
[20:17:28.375] <TB2> INFO: Pixel decoding errors: 0
[20:17:28.375] <TB2> INFO: pixel data incomplete: 0
[20:17:28.375] <TB2> INFO: pixel address: 0
[20:17:28.375] <TB2> INFO: pulse height fill bit: 0
[20:17:28.375] <TB2> INFO: buffer corruption: 0
[20:17:28.663] <TB2> INFO: ######################################################################
[20:17:28.663] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[20:17:28.663] <TB2> INFO: ######################################################################
[20:17:28.674] <TB2> INFO: scanning low vcal = 10
[20:17:28.915] <TB2> INFO: Expecting 41600 events.
[20:17:32.475] <TB2> INFO: 41600 events read in total (2969ms).
[20:17:32.475] <TB2> INFO: Test took 3800ms.
[20:17:32.476] <TB2> INFO: scanning low vcal = 20
[20:17:32.776] <TB2> INFO: Expecting 41600 events.
[20:17:36.330] <TB2> INFO: 41600 events read in total (2962ms).
[20:17:36.331] <TB2> INFO: Test took 3855ms.
[20:17:36.333] <TB2> INFO: scanning low vcal = 30
[20:17:36.631] <TB2> INFO: Expecting 41600 events.
[20:17:40.278] <TB2> INFO: 41600 events read in total (3055ms).
[20:17:40.279] <TB2> INFO: Test took 3946ms.
[20:17:40.281] <TB2> INFO: scanning low vcal = 40
[20:17:40.560] <TB2> INFO: Expecting 41600 events.
[20:17:44.486] <TB2> INFO: 41600 events read in total (3334ms).
[20:17:44.487] <TB2> INFO: Test took 4206ms.
[20:17:44.490] <TB2> INFO: scanning low vcal = 50
[20:17:44.766] <TB2> INFO: Expecting 41600 events.
[20:17:48.750] <TB2> INFO: 41600 events read in total (3392ms).
[20:17:48.751] <TB2> INFO: Test took 4261ms.
[20:17:48.754] <TB2> INFO: scanning low vcal = 60
[20:17:49.030] <TB2> INFO: Expecting 41600 events.
[20:17:52.975] <TB2> INFO: 41600 events read in total (3353ms).
[20:17:52.975] <TB2> INFO: Test took 4221ms.
[20:17:52.978] <TB2> INFO: scanning low vcal = 70
[20:17:53.255] <TB2> INFO: Expecting 41600 events.
[20:17:57.224] <TB2> INFO: 41600 events read in total (3374ms).
[20:17:57.225] <TB2> INFO: Test took 4247ms.
[20:17:57.227] <TB2> INFO: scanning low vcal = 80
[20:17:57.504] <TB2> INFO: Expecting 41600 events.
[20:18:01.428] <TB2> INFO: 41600 events read in total (3333ms).
[20:18:01.428] <TB2> INFO: Test took 4201ms.
[20:18:01.431] <TB2> INFO: scanning low vcal = 90
[20:18:01.708] <TB2> INFO: Expecting 41600 events.
[20:18:05.679] <TB2> INFO: 41600 events read in total (3380ms).
[20:18:05.680] <TB2> INFO: Test took 4249ms.
[20:18:05.682] <TB2> INFO: scanning low vcal = 100
[20:18:05.960] <TB2> INFO: Expecting 41600 events.
[20:18:09.893] <TB2> INFO: 41600 events read in total (3341ms).
[20:18:09.894] <TB2> INFO: Test took 4212ms.
[20:18:09.901] <TB2> INFO: scanning low vcal = 110
[20:18:10.178] <TB2> INFO: Expecting 41600 events.
[20:18:14.124] <TB2> INFO: 41600 events read in total (3355ms).
[20:18:14.124] <TB2> INFO: Test took 4223ms.
[20:18:14.127] <TB2> INFO: scanning low vcal = 120
[20:18:14.404] <TB2> INFO: Expecting 41600 events.
[20:18:18.355] <TB2> INFO: 41600 events read in total (3360ms).
[20:18:18.356] <TB2> INFO: Test took 4229ms.
[20:18:18.358] <TB2> INFO: scanning low vcal = 130
[20:18:18.635] <TB2> INFO: Expecting 41600 events.
[20:18:22.575] <TB2> INFO: 41600 events read in total (3349ms).
[20:18:22.576] <TB2> INFO: Test took 4218ms.
[20:18:22.579] <TB2> INFO: scanning low vcal = 140
[20:18:22.855] <TB2> INFO: Expecting 41600 events.
[20:18:26.820] <TB2> INFO: 41600 events read in total (3373ms).
[20:18:26.821] <TB2> INFO: Test took 4242ms.
[20:18:26.823] <TB2> INFO: scanning low vcal = 150
[20:18:27.100] <TB2> INFO: Expecting 41600 events.
[20:18:31.073] <TB2> INFO: 41600 events read in total (3381ms).
[20:18:31.073] <TB2> INFO: Test took 4249ms.
[20:18:31.076] <TB2> INFO: scanning low vcal = 160
[20:18:31.353] <TB2> INFO: Expecting 41600 events.
[20:18:35.333] <TB2> INFO: 41600 events read in total (3389ms).
[20:18:35.334] <TB2> INFO: Test took 4258ms.
[20:18:35.337] <TB2> INFO: scanning low vcal = 170
[20:18:35.613] <TB2> INFO: Expecting 41600 events.
[20:18:39.590] <TB2> INFO: 41600 events read in total (3385ms).
[20:18:39.591] <TB2> INFO: Test took 4254ms.
[20:18:39.594] <TB2> INFO: scanning low vcal = 180
[20:18:39.870] <TB2> INFO: Expecting 41600 events.
[20:18:43.799] <TB2> INFO: 41600 events read in total (3337ms).
[20:18:43.800] <TB2> INFO: Test took 4206ms.
[20:18:43.802] <TB2> INFO: scanning low vcal = 190
[20:18:44.079] <TB2> INFO: Expecting 41600 events.
[20:18:48.049] <TB2> INFO: 41600 events read in total (3365ms).
[20:18:48.050] <TB2> INFO: Test took 4248ms.
[20:18:48.052] <TB2> INFO: scanning low vcal = 200
[20:18:48.329] <TB2> INFO: Expecting 41600 events.
[20:18:52.289] <TB2> INFO: 41600 events read in total (3368ms).
[20:18:52.290] <TB2> INFO: Test took 4238ms.
[20:18:52.292] <TB2> INFO: scanning low vcal = 210
[20:18:52.569] <TB2> INFO: Expecting 41600 events.
[20:18:56.525] <TB2> INFO: 41600 events read in total (3364ms).
[20:18:56.526] <TB2> INFO: Test took 4234ms.
[20:18:56.529] <TB2> INFO: scanning low vcal = 220
[20:18:56.806] <TB2> INFO: Expecting 41600 events.
[20:19:00.740] <TB2> INFO: 41600 events read in total (3343ms).
[20:19:00.740] <TB2> INFO: Test took 4211ms.
[20:19:00.743] <TB2> INFO: scanning low vcal = 230
[20:19:01.021] <TB2> INFO: Expecting 41600 events.
[20:19:04.980] <TB2> INFO: 41600 events read in total (3368ms).
[20:19:04.981] <TB2> INFO: Test took 4238ms.
[20:19:04.984] <TB2> INFO: scanning low vcal = 240
[20:19:05.260] <TB2> INFO: Expecting 41600 events.
[20:19:09.210] <TB2> INFO: 41600 events read in total (3358ms).
[20:19:09.210] <TB2> INFO: Test took 4226ms.
[20:19:09.213] <TB2> INFO: scanning low vcal = 250
[20:19:09.489] <TB2> INFO: Expecting 41600 events.
[20:19:13.427] <TB2> INFO: 41600 events read in total (3346ms).
[20:19:13.428] <TB2> INFO: Test took 4215ms.
[20:19:13.432] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[20:19:13.707] <TB2> INFO: Expecting 41600 events.
[20:19:17.651] <TB2> INFO: 41600 events read in total (3352ms).
[20:19:17.652] <TB2> INFO: Test took 4220ms.
[20:19:17.654] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[20:19:17.931] <TB2> INFO: Expecting 41600 events.
[20:19:21.895] <TB2> INFO: 41600 events read in total (3372ms).
[20:19:21.896] <TB2> INFO: Test took 4242ms.
[20:19:21.898] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[20:19:22.175] <TB2> INFO: Expecting 41600 events.
[20:19:26.123] <TB2> INFO: 41600 events read in total (3356ms).
[20:19:26.124] <TB2> INFO: Test took 4226ms.
[20:19:26.126] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[20:19:26.403] <TB2> INFO: Expecting 41600 events.
[20:19:30.366] <TB2> INFO: 41600 events read in total (3372ms).
[20:19:30.367] <TB2> INFO: Test took 4240ms.
[20:19:30.369] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[20:19:30.646] <TB2> INFO: Expecting 41600 events.
[20:19:34.596] <TB2> INFO: 41600 events read in total (3358ms).
[20:19:34.596] <TB2> INFO: Test took 4226ms.
[20:19:35.113] <TB2> INFO: PixTestGainPedestal::measure() done
[20:20:17.010] <TB2> INFO: PixTestGainPedestal::fit() done
[20:20:17.010] <TB2> INFO: non-linearity mean: 0.981 0.973 1.000 0.928 0.982 0.952 0.959 0.982 0.984 0.935 0.941 0.936 0.985 0.955 0.969 0.931
[20:20:17.010] <TB2> INFO: non-linearity RMS: 0.004 0.014 0.176 0.112 0.004 0.058 0.171 0.003 0.003 0.117 0.085 0.073 0.003 0.163 0.020 0.098
[20:20:17.010] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[20:20:17.034] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[20:20:17.057] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[20:20:17.080] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[20:20:17.103] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[20:20:17.126] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[20:20:17.149] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[20:20:17.173] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[20:20:17.196] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[20:20:17.219] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[20:20:17.242] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[20:20:17.265] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[20:20:17.288] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[20:20:17.311] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[20:20:17.335] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[20:20:17.358] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[20:20:17.381] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 168 seconds
[20:20:17.381] <TB2> INFO: Decoding statistics:
[20:20:17.381] <TB2> INFO: General information:
[20:20:17.381] <TB2> INFO: 16bit words read: 3303766
[20:20:17.381] <TB2> INFO: valid events total: 332800
[20:20:17.381] <TB2> INFO: empty events: 1227
[20:20:17.381] <TB2> INFO: valid events with pixels: 331573
[20:20:17.381] <TB2> INFO: valid pixel hits: 653483
[20:20:17.381] <TB2> INFO: Event errors: 0
[20:20:17.381] <TB2> INFO: start marker: 0
[20:20:17.381] <TB2> INFO: stop marker: 0
[20:20:17.381] <TB2> INFO: overflow: 0
[20:20:17.381] <TB2> INFO: invalid 5bit words: 0
[20:20:17.381] <TB2> INFO: invalid XOR eye diagram: 0
[20:20:17.381] <TB2> INFO: frame (failed synchr.): 0
[20:20:17.381] <TB2> INFO: idle data (no TBM trl): 0
[20:20:17.381] <TB2> INFO: no data (only TBM hdr): 0
[20:20:17.381] <TB2> INFO: TBM errors: 0
[20:20:17.381] <TB2> INFO: flawed TBM headers: 0
[20:20:17.381] <TB2> INFO: flawed TBM trailers: 0
[20:20:17.381] <TB2> INFO: event ID mismatches: 0
[20:20:17.381] <TB2> INFO: ROC errors: 0
[20:20:17.381] <TB2> INFO: missing ROC header(s): 0
[20:20:17.381] <TB2> INFO: misplaced readback start: 0
[20:20:17.381] <TB2> INFO: Pixel decoding errors: 0
[20:20:17.381] <TB2> INFO: pixel data incomplete: 0
[20:20:17.381] <TB2> INFO: pixel address: 0
[20:20:17.381] <TB2> INFO: pulse height fill bit: 0
[20:20:17.381] <TB2> INFO: buffer corruption: 0
[20:20:17.401] <TB2> INFO: Decoding statistics:
[20:20:17.401] <TB2> INFO: General information:
[20:20:17.401] <TB2> INFO: 16bit words read: 3433184
[20:20:17.401] <TB2> INFO: valid events total: 353536
[20:20:17.401] <TB2> INFO: empty events: 19462
[20:20:17.401] <TB2> INFO: valid events with pixels: 334074
[20:20:17.401] <TB2> INFO: valid pixel hits: 655984
[20:20:17.401] <TB2> INFO: Event errors: 0
[20:20:17.401] <TB2> INFO: start marker: 0
[20:20:17.401] <TB2> INFO: stop marker: 0
[20:20:17.401] <TB2> INFO: overflow: 0
[20:20:17.401] <TB2> INFO: invalid 5bit words: 0
[20:20:17.401] <TB2> INFO: invalid XOR eye diagram: 0
[20:20:17.401] <TB2> INFO: frame (failed synchr.): 0
[20:20:17.401] <TB2> INFO: idle data (no TBM trl): 0
[20:20:17.401] <TB2> INFO: no data (only TBM hdr): 0
[20:20:17.402] <TB2> INFO: TBM errors: 0
[20:20:17.402] <TB2> INFO: flawed TBM headers: 0
[20:20:17.402] <TB2> INFO: flawed TBM trailers: 0
[20:20:17.402] <TB2> INFO: event ID mismatches: 0
[20:20:17.402] <TB2> INFO: ROC errors: 0
[20:20:17.402] <TB2> INFO: missing ROC header(s): 0
[20:20:17.402] <TB2> INFO: misplaced readback start: 0
[20:20:17.402] <TB2> INFO: Pixel decoding errors: 0
[20:20:17.402] <TB2> INFO: pixel data incomplete: 0
[20:20:17.402] <TB2> INFO: pixel address: 0
[20:20:17.402] <TB2> INFO: pulse height fill bit: 0
[20:20:17.402] <TB2> INFO: buffer corruption: 0
[20:20:17.402] <TB2> INFO: enter test to run
[20:20:17.402] <TB2> INFO: test: Trim80 no parameter change
[20:20:17.402] <TB2> INFO: running: trim80
[20:20:17.422] <TB2> INFO: ######################################################################
[20:20:17.422] <TB2> INFO: PixTestTrim80::doTest()
[20:20:17.422] <TB2> INFO: ######################################################################
[20:20:17.423] <TB2> INFO: ----------------------------------------------------------------------
[20:20:17.424] <TB2> INFO: PixTestTrim80::trimTest() ntrig = 8, vcal = 80
[20:20:17.424] <TB2> INFO: ----------------------------------------------------------------------
[20:20:17.471] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[20:20:17.471] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:20:17.484] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:20:17.484] <TB2> INFO: run 1 of 1
[20:20:17.785] <TB2> INFO: Expecting 5025280 events.
[20:20:45.233] <TB2> INFO: 682312 events read in total (26856ms).
[20:21:11.983] <TB2> INFO: 1362120 events read in total (53606ms).
[20:21:38.525] <TB2> INFO: 2040112 events read in total (80148ms).
[20:22:05.106] <TB2> INFO: 2715504 events read in total (106729ms).
[20:22:31.798] <TB2> INFO: 3391072 events read in total (133421ms).
[20:22:58.494] <TB2> INFO: 4065144 events read in total (160117ms).
[20:23:25.234] <TB2> INFO: 4738384 events read in total (186857ms).
[20:23:37.110] <TB2> INFO: 5025280 events read in total (198733ms).
[20:23:37.165] <TB2> INFO: Test took 199680ms.
[20:24:01.351] <TB2> INFO: ROC 0 VthrComp = 85
[20:24:01.352] <TB2> INFO: ROC 1 VthrComp = 83
[20:24:01.352] <TB2> INFO: ROC 2 VthrComp = 74
[20:24:01.352] <TB2> INFO: ROC 3 VthrComp = 74
[20:24:01.352] <TB2> INFO: ROC 4 VthrComp = 79
[20:24:01.352] <TB2> INFO: ROC 5 VthrComp = 74
[20:24:01.352] <TB2> INFO: ROC 6 VthrComp = 79
[20:24:01.352] <TB2> INFO: ROC 7 VthrComp = 75
[20:24:01.353] <TB2> INFO: ROC 8 VthrComp = 74
[20:24:01.353] <TB2> INFO: ROC 9 VthrComp = 76
[20:24:01.354] <TB2> INFO: ROC 10 VthrComp = 85
[20:24:01.354] <TB2> INFO: ROC 11 VthrComp = 90
[20:24:01.354] <TB2> INFO: ROC 12 VthrComp = 74
[20:24:01.355] <TB2> INFO: ROC 13 VthrComp = 75
[20:24:01.355] <TB2> INFO: ROC 14 VthrComp = 82
[20:24:01.355] <TB2> INFO: ROC 15 VthrComp = 77
[20:24:01.616] <TB2> INFO: Expecting 41600 events.
[20:24:05.118] <TB2> INFO: 41600 events read in total (2910ms).
[20:24:05.119] <TB2> INFO: Test took 3762ms.
[20:24:05.127] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[20:24:05.127] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[20:24:05.136] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:24:05.136] <TB2> INFO: run 1 of 1
[20:24:05.414] <TB2> INFO: Expecting 5025280 events.
[20:24:33.578] <TB2> INFO: 688224 events read in total (27572ms).
[20:25:00.523] <TB2> INFO: 1370960 events read in total (54517ms).
[20:25:27.317] <TB2> INFO: 2053256 events read in total (81311ms).
[20:25:54.376] <TB2> INFO: 2730088 events read in total (108370ms).
[20:26:21.152] <TB2> INFO: 3403856 events read in total (135146ms).
[20:26:47.542] <TB2> INFO: 4076968 events read in total (161536ms).
[20:27:14.121] <TB2> INFO: 4749440 events read in total (188115ms).
[20:27:25.412] <TB2> INFO: 5025280 events read in total (199406ms).
[20:27:25.461] <TB2> INFO: Test took 200324ms.
[20:27:50.430] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 107.194 for pixel 0/69 mean/min/max = 90.8276/73.9743/107.681
[20:27:50.431] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 107.321 for pixel 0/39 mean/min/max = 91.1086/74.8098/107.407
[20:27:50.431] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 110.787 for pixel 0/17 mean/min/max = 94.3979/77.7068/111.089
[20:27:50.432] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 108.822 for pixel 1/5 mean/min/max = 93.3751/77.8711/108.879
[20:27:50.432] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 108.44 for pixel 4/77 mean/min/max = 93.1729/77.7946/108.551
[20:27:50.432] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 108.453 for pixel 0/3 mean/min/max = 92.6243/76.5719/108.677
[20:27:50.433] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 109.839 for pixel 14/73 mean/min/max = 93.8743/77.4163/110.332
[20:27:50.433] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 109.717 for pixel 1/70 mean/min/max = 93.6174/77.5008/109.734
[20:27:50.434] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 110.257 for pixel 0/32 mean/min/max = 94.0117/77.2973/110.726
[20:27:50.434] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 110.65 for pixel 0/76 mean/min/max = 94.7777/78.8453/110.71
[20:27:50.434] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 108.251 for pixel 0/74 mean/min/max = 91.8631/75.2864/108.44
[20:27:50.435] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 108.634 for pixel 0/74 mean/min/max = 92.0371/75.2941/108.78
[20:27:50.435] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 109.65 for pixel 51/5 mean/min/max = 93.2424/76.7514/109.733
[20:27:50.435] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 110.646 for pixel 0/24 mean/min/max = 93.987/77.3219/110.652
[20:27:50.435] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 115.729 for pixel 1/58 mean/min/max = 94.8465/73.7927/115.9
[20:27:50.436] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 109.953 for pixel 2/73 mean/min/max = 93.5534/77.0169/110.09
[20:27:50.436] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[20:27:50.525] <TB2> INFO: Expecting 411648 events.
[20:27:59.951] <TB2> INFO: 411648 events read in total (8835ms).
[20:27:59.958] <TB2> INFO: Expecting 411648 events.
[20:28:09.125] <TB2> INFO: 411648 events read in total (8764ms).
[20:28:09.134] <TB2> INFO: Expecting 411648 events.
[20:28:18.173] <TB2> INFO: 411648 events read in total (8636ms).
[20:28:18.185] <TB2> INFO: Expecting 411648 events.
[20:28:27.229] <TB2> INFO: 411648 events read in total (8641ms).
[20:28:27.248] <TB2> INFO: Expecting 411648 events.
[20:28:36.296] <TB2> INFO: 411648 events read in total (8645ms).
[20:28:36.313] <TB2> INFO: Expecting 411648 events.
[20:28:45.342] <TB2> INFO: 411648 events read in total (8626ms).
[20:28:45.361] <TB2> INFO: Expecting 411648 events.
[20:28:54.327] <TB2> INFO: 411648 events read in total (8563ms).
[20:28:54.348] <TB2> INFO: Expecting 411648 events.
[20:29:03.388] <TB2> INFO: 411648 events read in total (8637ms).
[20:29:03.421] <TB2> INFO: Expecting 411648 events.
[20:29:12.418] <TB2> INFO: 411648 events read in total (8594ms).
[20:29:12.447] <TB2> INFO: Expecting 411648 events.
[20:29:21.525] <TB2> INFO: 411648 events read in total (8675ms).
[20:29:21.554] <TB2> INFO: Expecting 411648 events.
[20:29:30.627] <TB2> INFO: 411648 events read in total (8670ms).
[20:29:30.661] <TB2> INFO: Expecting 411648 events.
[20:29:39.706] <TB2> INFO: 411648 events read in total (8642ms).
[20:29:39.749] <TB2> INFO: Expecting 411648 events.
[20:29:48.825] <TB2> INFO: 411648 events read in total (8673ms).
[20:29:48.864] <TB2> INFO: Expecting 411648 events.
[20:29:57.916] <TB2> INFO: 411648 events read in total (8649ms).
[20:29:57.972] <TB2> INFO: Expecting 411648 events.
[20:30:07.019] <TB2> INFO: 411648 events read in total (8644ms).
[20:30:07.075] <TB2> INFO: Expecting 411648 events.
[20:30:16.188] <TB2> INFO: 411648 events read in total (8710ms).
[20:30:16.237] <TB2> INFO: Test took 145801ms.
[20:30:17.699] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[20:30:17.709] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:30:17.709] <TB2> INFO: run 1 of 1
[20:30:17.970] <TB2> INFO: Expecting 5025280 events.
[20:30:45.402] <TB2> INFO: 666664 events read in total (26840ms).
[20:31:12.088] <TB2> INFO: 1331616 events read in total (53526ms).
[20:31:38.842] <TB2> INFO: 1996256 events read in total (80280ms).
[20:32:05.363] <TB2> INFO: 2658144 events read in total (106801ms).
[20:32:31.778] <TB2> INFO: 3315456 events read in total (133216ms).
[20:32:58.097] <TB2> INFO: 3969656 events read in total (159535ms).
[20:33:24.844] <TB2> INFO: 4622984 events read in total (186282ms).
[20:33:41.452] <TB2> INFO: 5025280 events read in total (202890ms).
[20:33:41.510] <TB2> INFO: Test took 203800ms.
[20:34:06.508] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 48.792123 .. 103.899098
[20:34:06.770] <TB2> INFO: Expecting 208000 events.
[20:34:16.344] <TB2> INFO: 208000 events read in total (8981ms).
[20:34:16.345] <TB2> INFO: Test took 9836ms.
[20:34:16.394] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 38 .. 113 (-1/-1) hits flags = 528 (plus default)
[20:34:16.403] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:34:16.403] <TB2> INFO: run 1 of 1
[20:34:16.681] <TB2> INFO: Expecting 2529280 events.
[20:34:44.606] <TB2> INFO: 693056 events read in total (27333ms).
[20:35:11.681] <TB2> INFO: 1383720 events read in total (54408ms).
[20:35:38.828] <TB2> INFO: 2068008 events read in total (81555ms).
[20:35:57.308] <TB2> INFO: 2529280 events read in total (100035ms).
[20:35:57.358] <TB2> INFO: Test took 100956ms.
[20:36:16.320] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 61.489427 .. 93.761094
[20:36:16.578] <TB2> INFO: Expecting 208000 events.
[20:36:26.566] <TB2> INFO: 208000 events read in total (9396ms).
[20:36:26.566] <TB2> INFO: Test took 10244ms.
[20:36:26.620] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 51 .. 103 (-1/-1) hits flags = 528 (plus default)
[20:36:26.630] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:36:26.630] <TB2> INFO: run 1 of 1
[20:36:26.915] <TB2> INFO: Expecting 1763840 events.
[20:36:55.427] <TB2> INFO: 687920 events read in total (27920ms).
[20:37:22.639] <TB2> INFO: 1374896 events read in total (55132ms).
[20:37:38.656] <TB2> INFO: 1763840 events read in total (71149ms).
[20:37:38.692] <TB2> INFO: Test took 72063ms.
[20:37:57.174] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 67.537997 .. 87.806260
[20:37:57.412] <TB2> INFO: Expecting 208000 events.
[20:38:07.380] <TB2> INFO: 208000 events read in total (9376ms).
[20:38:07.381] <TB2> INFO: Test took 10206ms.
[20:38:07.431] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 57 .. 97 (-1/-1) hits flags = 528 (plus default)
[20:38:07.440] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:38:07.440] <TB2> INFO: run 1 of 1
[20:38:07.718] <TB2> INFO: Expecting 1364480 events.
[20:38:35.844] <TB2> INFO: 694432 events read in total (27534ms).
[20:39:02.637] <TB2> INFO: 1364480 events read in total (54327ms).
[20:39:02.667] <TB2> INFO: Test took 55226ms.
[20:39:20.357] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 68.571524 .. 87.806260
[20:39:20.608] <TB2> INFO: Expecting 208000 events.
[20:39:30.302] <TB2> INFO: 208000 events read in total (9103ms).
[20:39:30.303] <TB2> INFO: Test took 9944ms.
[20:39:30.350] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 58 .. 97 (-1/-1) hits flags = 528 (plus default)
[20:39:30.361] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:39:30.361] <TB2> INFO: run 1 of 1
[20:39:30.639] <TB2> INFO: Expecting 1331200 events.
[20:39:58.974] <TB2> INFO: 691816 events read in total (27743ms).
[20:40:24.870] <TB2> INFO: 1331200 events read in total (53639ms).
[20:40:24.899] <TB2> INFO: Test took 54539ms.
[20:40:41.329] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 60 .. 100
[20:40:41.329] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 60 .. 100 (-1/-1) hits flags = 528 (plus default)
[20:40:41.337] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[20:40:41.337] <TB2> INFO: run 1 of 1
[20:40:41.576] <TB2> INFO: Expecting 1364480 events.
[20:41:09.974] <TB2> INFO: 667464 events read in total (27806ms).
[20:41:37.533] <TB2> INFO: 1335112 events read in total (55365ms).
[20:41:39.130] <TB2> INFO: 1364480 events read in total (56962ms).
[20:41:39.149] <TB2> INFO: Test took 57812ms.
[20:41:56.197] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C0.dat
[20:41:56.197] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C1.dat
[20:41:56.197] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C2.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C3.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C4.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C5.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C6.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C7.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C8.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C9.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C10.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C11.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C12.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C13.dat
[20:41:56.198] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C14.dat
[20:41:56.199] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//dacParameters80_C15.dat
[20:41:56.199] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C0.dat
[20:41:56.205] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C1.dat
[20:41:56.212] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C2.dat
[20:41:56.220] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C3.dat
[20:41:56.226] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C4.dat
[20:41:56.232] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C5.dat
[20:41:56.237] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C6.dat
[20:41:56.243] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C7.dat
[20:41:56.248] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C8.dat
[20:41:56.254] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C9.dat
[20:41:56.259] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C10.dat
[20:41:56.265] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C11.dat
[20:41:56.270] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C12.dat
[20:41:56.276] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C13.dat
[20:41:56.281] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C14.dat
[20:41:56.287] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1079_FullQualification_2016-10-25_15h54m_1477403681//003_Fulltest_p17//trimParameters80_C15.dat
[20:41:56.292] <TB2> INFO: PixTestTrim80::trimTest() done
[20:41:56.292] <TB2> INFO: vtrim: 105 101 132 117 104 106 109 106 113 113 121 115 96 110 147 100
[20:41:56.292] <TB2> INFO: vthrcomp: 85 83 74 74 79 74 79 75 74 76 85 90 74 75 82 77
[20:41:56.292] <TB2> INFO: vcal mean: 79.95 79.96 79.97 79.96 80.02 80.01 79.96 79.97 79.96 79.99 79.93 79.95 79.93 79.98 79.92 80.00
[20:41:56.292] <TB2> INFO: vcal RMS: 0.80 0.74 0.78 0.75 0.73 0.72 0.72 0.73 0.77 0.75 0.77 0.80 1.45 0.75 0.87 0.77
[20:41:56.292] <TB2> INFO: bits mean: 10.33 10.06 10.10 10.04 9.49 9.81 9.43 9.35 9.81 9.11 10.19 10.31 9.83 9.81 10.38 9.67
[20:41:56.292] <TB2> INFO: bits RMS: 2.41 2.38 1.95 1.99 2.25 2.25 2.26 2.33 2.08 2.21 2.28 2.19 2.19 2.16 2.19 2.20
[20:41:56.299] <TB2> INFO: ----------------------------------------------------------------------
[20:41:56.299] <TB2> INFO: PixTestTrim80::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[20:41:56.299] <TB2> INFO: ----------------------------------------------------------------------
[20:41:56.301] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[20:41:56.313] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:41:56.313] <TB2> INFO: run 1 of 1
[20:41:56.546] <TB2> INFO: Expecting 4160000 events.
[20:42:29.046] <TB2> INFO: 780345 events read in total (31908ms).
[20:43:00.763] <TB2> INFO: 1553850 events read in total (63625ms).
[20:43:32.332] <TB2> INFO: 2320845 events read in total (95194ms).
[20:44:03.923] <TB2> INFO: 3081780 events read in total (126785ms).
[20:44:35.482] <TB2> INFO: 3840570 events read in total (158344ms).
[20:44:49.019] <TB2> INFO: 4160000 events read in total (171881ms).
[20:44:49.065] <TB2> INFO: Test took 172752ms.
[20:45:18.961] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 221 (-1/-1) hits flags = 528 (plus default)
[20:45:18.970] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:45:18.970] <TB2> INFO: run 1 of 1
[20:45:19.202] <TB2> INFO: Expecting 4617600 events.
[20:45:50.830] <TB2> INFO: 724570 events read in total (31036ms).
[20:46:21.554] <TB2> INFO: 1445000 events read in total (61760ms).
[20:46:51.982] <TB2> INFO: 2161990 events read in total (92188ms).
[20:47:22.184] <TB2> INFO: 2874955 events read in total (122390ms).
[20:47:52.612] <TB2> INFO: 3585955 events read in total (152818ms).
[20:48:23.239] <TB2> INFO: 4295410 events read in total (183445ms).
[20:48:37.298] <TB2> INFO: 4617600 events read in total (197504ms).
[20:48:37.375] <TB2> INFO: Test took 198405ms.
[20:49:07.757] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[20:49:07.765] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:49:07.766] <TB2> INFO: run 1 of 1
[20:49:07.000] <TB2> INFO: Expecting 4472000 events.
[20:49:39.263] <TB2> INFO: 733515 events read in total (30672ms).
[20:50:09.851] <TB2> INFO: 1462670 events read in total (61260ms).
[20:50:40.697] <TB2> INFO: 2187470 events read in total (92107ms).
[20:51:11.322] <TB2> INFO: 2908685 events read in total (122731ms).
[20:51:42.137] <TB2> INFO: 3627715 events read in total (153546ms).
[20:52:12.470] <TB2> INFO: 4345345 events read in total (183879ms).
[20:52:18.142] <TB2> INFO: 4472000 events read in total (189551ms).
[20:52:18.209] <TB2> INFO: Test took 190443ms.
[20:52:49.600] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[20:52:49.610] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:52:49.610] <TB2> INFO: run 1 of 1
[20:52:49.854] <TB2> INFO: Expecting 4472000 events.
[20:53:21.540] <TB2> INFO: 733610 events read in total (31094ms).
[20:53:52.624] <TB2> INFO: 1462825 events read in total (62178ms).
[20:54:23.378] <TB2> INFO: 2187930 events read in total (92932ms).
[20:54:54.426] <TB2> INFO: 2909380 events read in total (123980ms).
[20:55:25.403] <TB2> INFO: 3628480 events read in total (154957ms).
[20:55:56.065] <TB2> INFO: 4346090 events read in total (185619ms).
[20:56:01.864] <TB2> INFO: 4472000 events read in total (191418ms).
[20:56:01.918] <TB2> INFO: Test took 192308ms.
[20:56:31.763] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[20:56:31.773] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[20:56:31.773] <TB2> INFO: run 1 of 1
[20:56:31.007] <TB2> INFO: Expecting 4492800 events.
[20:57:03.862] <TB2> INFO: 732560 events read in total (31264ms).
[20:57:35.013] <TB2> INFO: 1460700 events read in total (62415ms).
[20:58:06.189] <TB2> INFO: 2184825 events read in total (93591ms).
[20:58:36.992] <TB2> INFO: 2905160 events read in total (124394ms).
[20:59:08.041] <TB2> INFO: 3623225 events read in total (155443ms).
[20:59:39.461] <TB2> INFO: 4340175 events read in total (186863ms).
[20:59:46.325] <TB2> INFO: 4492800 events read in total (193727ms).
[20:59:46.379] <TB2> INFO: Test took 194606ms.
[21:00:15.863] <TB2> INFO: PixTestTrim80::trimBitTest() done
[21:00:15.864] <TB2> INFO: PixTestTrim80::doTest() done, duration: 2398 seconds
[21:00:16.502] <TB2> INFO: enter test to run
[21:00:16.502] <TB2> INFO: test: exit no parameter change
[21:00:16.598] <TB2> QUIET: Connection to board 156 closed.
[21:00:16.599] <TB2> INFO: pXar: this is the end, my friend