[17:34:42.980] <TB3> INFO: *** Welcome to pxar ***
[17:34:42.980] <TB3> INFO: *** Today: 2016/10/25
[17:34:42.987] <TB3> INFO: *** Version: c8ba-dirty
[17:34:42.987] <TB3> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C15.dat
[17:34:42.987] <TB3> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1b.dat
[17:34:42.987] <TB3> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//defaultMaskFile.dat
[17:34:42.987] <TB3> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters_C15.dat
[17:34:43.069] <TB3> INFO: clk: 4
[17:34:43.069] <TB3> INFO: ctr: 4
[17:34:43.069] <TB3> INFO: sda: 19
[17:34:43.069] <TB3> INFO: tin: 9
[17:34:43.069] <TB3> INFO: level: 15
[17:34:43.069] <TB3> INFO: triggerdelay: 0
[17:34:43.069] <TB3> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[17:34:43.069] <TB3> INFO: Log level: INFO
[17:34:43.078] <TB3> INFO: Found DTB DTB_WWVASW
[17:34:43.086] <TB3> QUIET: Connection to board DTB_WWVASW opened.
[17:34:43.088] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[17:34:43.092] <TB3> INFO: RPC call hashes of host and DTB match: 486171790
[17:34:44.621] <TB3> INFO: DUT info:
[17:34:44.621] <TB3> INFO: The DUT currently contains the following objects:
[17:34:44.621] <TB3> INFO: 4 TBM Cores tbm10c (4 ON)
[17:34:44.621] <TB3> INFO: TBM Core alpha (0): 7 registers set
[17:34:44.621] <TB3> INFO: TBM Core beta (1): 7 registers set
[17:34:44.621] <TB3> INFO: TBM Core alpha (2): 7 registers set
[17:34:44.621] <TB3> INFO: TBM Core beta (3): 7 registers set
[17:34:44.621] <TB3> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:34:44.621] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:44.621] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:45.023] <TB3> INFO: enter 'restricted' command line mode
[17:34:45.023] <TB3> INFO: enter test to run
[17:34:45.023] <TB3> INFO: test: pretest no parameter change
[17:34:45.023] <TB3> INFO: running: pretest
[17:34:45.032] <TB3> INFO: ######################################################################
[17:34:45.032] <TB3> INFO: PixTestPretest::doTest()
[17:34:45.032] <TB3> INFO: ######################################################################
[17:34:45.033] <TB3> INFO: ----------------------------------------------------------------------
[17:34:45.033] <TB3> INFO: PixTestPretest::programROC()
[17:34:45.033] <TB3> INFO: ----------------------------------------------------------------------
[17:35:03.048] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:35:03.048] <TB3> INFO: IA differences per ROC: 17.7 19.3 16.9 18.5 20.1 16.9 19.3 16.9 18.5 18.5 16.9 18.5 20.1 18.5 19.3 18.5
[17:35:03.121] <TB3> INFO: ----------------------------------------------------------------------
[17:35:03.121] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:35:03.121] <TB3> INFO: ----------------------------------------------------------------------
[17:35:24.427] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[17:35:24.427] <TB3> INFO: i(loss) [mA/ROC]: 19.3 20.1 20.9 20.9 20.9 21.7 19.3 20.1 20.1 19.3 20.9 19.3 20.1 20.1 20.1 19.3
[17:35:24.459] <TB3> INFO: ----------------------------------------------------------------------
[17:35:24.459] <TB3> INFO: PixTestPretest::findTiming()
[17:35:24.459] <TB3> INFO: ----------------------------------------------------------------------
[17:35:24.459] <TB3> INFO: PixTestCmd::init()

[17:35:56.099] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:35:56.099] <TB3> INFO: (success/tries = 100/100), width = 3
[17:35:57.613] <TB3> INFO: ----------------------------------------------------------------------
[17:35:57.613] <TB3> INFO: PixTestPretest::findWorkingPixel()
[17:35:57.613] <TB3> INFO: ----------------------------------------------------------------------
[17:35:57.709] <TB3> INFO: Expecting 231680 events.
[17:36:07.678] <TB3> INFO: 231680 events read in total (9378ms).
[17:36:07.687] <TB3> INFO: Test took 10068ms.
[17:36:07.935] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:36:07.970] <TB3> INFO: ----------------------------------------------------------------------
[17:36:07.970] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[17:36:07.970] <TB3> INFO: ----------------------------------------------------------------------
[17:36:08.066] <TB3> INFO: Expecting 231680 events.
[17:36:18.162] <TB3> INFO: 231680 events read in total (9504ms).
[17:36:18.171] <TB3> INFO: Test took 10194ms.
[17:36:18.445] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[17:36:18.445] <TB3> INFO: CalDel: 83 92 101 79 82 78 82 82 93 88 77 96 87 97 90 99
[17:36:18.445] <TB3> INFO: VthrComp: 51 51 54 57 52 54 51 51 54 51 51 51 51 51 51 51
[17:36:18.448] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C0.dat
[17:36:18.449] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C1.dat
[17:36:18.449] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C2.dat
[17:36:18.449] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C3.dat
[17:36:18.449] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C4.dat
[17:36:18.450] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C5.dat
[17:36:18.450] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C6.dat
[17:36:18.450] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C7.dat
[17:36:18.450] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C8.dat
[17:36:18.450] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C9.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C10.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C11.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C12.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C13.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C14.dat
[17:36:18.451] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C15.dat
[17:36:18.452] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0a.dat
[17:36:18.452] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0b.dat
[17:36:18.452] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1a.dat
[17:36:18.452] <TB3> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1b.dat
[17:36:18.452] <TB3> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[17:36:18.515] <TB3> INFO: enter test to run
[17:36:18.515] <TB3> INFO: test: FullTest no parameter change
[17:36:18.515] <TB3> INFO: running: fulltest
[17:36:18.515] <TB3> INFO: ######################################################################
[17:36:18.515] <TB3> INFO: PixTestFullTest::doTest()
[17:36:18.515] <TB3> INFO: ######################################################################
[17:36:18.517] <TB3> INFO: ######################################################################
[17:36:18.517] <TB3> INFO: PixTestAlive::doTest()
[17:36:18.517] <TB3> INFO: ######################################################################
[17:36:18.518] <TB3> INFO: ----------------------------------------------------------------------
[17:36:18.518] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:36:18.518] <TB3> INFO: ----------------------------------------------------------------------
[17:36:18.760] <TB3> INFO: Expecting 41600 events.
[17:36:22.325] <TB3> INFO: 41600 events read in total (2973ms).
[17:36:22.325] <TB3> INFO: Test took 3806ms.
[17:36:22.559] <TB3> INFO: PixTestAlive::aliveTest() done
[17:36:22.559] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:36:22.561] <TB3> INFO: ----------------------------------------------------------------------
[17:36:22.561] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:36:22.561] <TB3> INFO: ----------------------------------------------------------------------
[17:36:22.803] <TB3> INFO: Expecting 41600 events.
[17:36:25.788] <TB3> INFO: 41600 events read in total (2393ms).
[17:36:25.788] <TB3> INFO: Test took 3225ms.
[17:36:25.788] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:36:26.030] <TB3> INFO: PixTestAlive::maskTest() done
[17:36:26.030] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:36:26.032] <TB3> INFO: ----------------------------------------------------------------------
[17:36:26.032] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:36:26.032] <TB3> INFO: ----------------------------------------------------------------------
[17:36:26.318] <TB3> INFO: Expecting 41600 events.
[17:36:29.962] <TB3> INFO: 41600 events read in total (3052ms).
[17:36:29.963] <TB3> INFO: Test took 3929ms.
[17:36:30.200] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[17:36:30.200] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:36:30.200] <TB3> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:36:30.200] <TB3> INFO: Decoding statistics:
[17:36:30.200] <TB3> INFO: General information:
[17:36:30.200] <TB3> INFO: 16bit words read: 0
[17:36:30.200] <TB3> INFO: valid events total: 0
[17:36:30.200] <TB3> INFO: empty events: 0
[17:36:30.200] <TB3> INFO: valid events with pixels: 0
[17:36:30.200] <TB3> INFO: valid pixel hits: 0
[17:36:30.200] <TB3> INFO: Event errors: 0
[17:36:30.200] <TB3> INFO: start marker: 0
[17:36:30.201] <TB3> INFO: stop marker: 0
[17:36:30.201] <TB3> INFO: overflow: 0
[17:36:30.201] <TB3> INFO: invalid 5bit words: 0
[17:36:30.201] <TB3> INFO: invalid XOR eye diagram: 0
[17:36:30.201] <TB3> INFO: frame (failed synchr.): 0
[17:36:30.201] <TB3> INFO: idle data (no TBM trl): 0
[17:36:30.201] <TB3> INFO: no data (only TBM hdr): 0
[17:36:30.201] <TB3> INFO: TBM errors: 0
[17:36:30.201] <TB3> INFO: flawed TBM headers: 0
[17:36:30.201] <TB3> INFO: flawed TBM trailers: 0
[17:36:30.201] <TB3> INFO: event ID mismatches: 0
[17:36:30.201] <TB3> INFO: ROC errors: 0
[17:36:30.201] <TB3> INFO: missing ROC header(s): 0
[17:36:30.201] <TB3> INFO: misplaced readback start: 0
[17:36:30.201] <TB3> INFO: Pixel decoding errors: 0
[17:36:30.201] <TB3> INFO: pixel data incomplete: 0
[17:36:30.201] <TB3> INFO: pixel address: 0
[17:36:30.201] <TB3> INFO: pulse height fill bit: 0
[17:36:30.201] <TB3> INFO: buffer corruption: 0
[17:36:30.210] <TB3> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:30.211] <TB3> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[17:36:30.211] <TB3> INFO: ######################################################################
[17:36:30.211] <TB3> INFO: PixTestReadback::doTest()
[17:36:30.211] <TB3> INFO: ######################################################################
[17:36:30.211] <TB3> INFO: ----------------------------------------------------------------------
[17:36:30.211] <TB3> INFO: PixTestReadback::CalibrateVd()
[17:36:30.211] <TB3> INFO: ----------------------------------------------------------------------
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:36:40.196] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:36:40.197] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:40.227] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[17:36:40.227] <TB3> INFO: ----------------------------------------------------------------------
[17:36:40.227] <TB3> INFO: PixTestReadback::CalibrateVa()
[17:36:40.227] <TB3> INFO: ----------------------------------------------------------------------
[17:36:50.171] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:36:50.172] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:50.203] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[17:36:50.203] <TB3> INFO: ----------------------------------------------------------------------
[17:36:50.203] <TB3> INFO: PixTestReadback::readbackVbg()
[17:36:50.203] <TB3> INFO: ----------------------------------------------------------------------
[17:36:57.883] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[17:36:57.883] <TB3> INFO: ----------------------------------------------------------------------
[17:36:57.883] <TB3> INFO: PixTestReadback::getCalibratedVbg()
[17:36:57.883] <TB3> INFO: ----------------------------------------------------------------------
[17:36:57.883] <TB3> INFO: Vbg will be calibrated using Vd calibration
[17:36:57.883] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 151.7calibrated Vbg = 1.21796 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 143calibrated Vbg = 1.21161 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.4calibrated Vbg = 1.21006 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159calibrated Vbg = 1.20111 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 151calibrated Vbg = 1.21145 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.6calibrated Vbg = 1.21894 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 152calibrated Vbg = 1.21196 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.9calibrated Vbg = 1.21667 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 156calibrated Vbg = 1.21592 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.8calibrated Vbg = 1.20616 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.8calibrated Vbg = 1.20573 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.4calibrated Vbg = 1.20115 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.3calibrated Vbg = 1.20382 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 159calibrated Vbg = 1.20879 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 160calibrated Vbg = 1.21279 :::*/*/*/*/
[17:36:57.884] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.1calibrated Vbg = 1.21034 :::*/*/*/*/
[17:36:57.887] <TB3> INFO: ----------------------------------------------------------------------
[17:36:57.887] <TB3> INFO: PixTestReadback::CalibrateIa()
[17:36:57.887] <TB3> INFO: ----------------------------------------------------------------------
[17:39:38.682] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:39:38.682] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:39:38.682] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:39:38.682] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:39:38.682] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:39:38.683] <TB3> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:39:38.712] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[17:39:38.713] <TB3> INFO: PixTestReadback::doTest() done
[17:39:38.714] <TB3> INFO: Decoding statistics:
[17:39:38.714] <TB3> INFO: General information:
[17:39:38.714] <TB3> INFO: 16bit words read: 1536
[17:39:38.714] <TB3> INFO: valid events total: 256
[17:39:38.714] <TB3> INFO: empty events: 256
[17:39:38.714] <TB3> INFO: valid events with pixels: 0
[17:39:38.714] <TB3> INFO: valid pixel hits: 0
[17:39:38.714] <TB3> INFO: Event errors: 0
[17:39:38.714] <TB3> INFO: start marker: 0
[17:39:38.714] <TB3> INFO: stop marker: 0
[17:39:38.714] <TB3> INFO: overflow: 0
[17:39:38.714] <TB3> INFO: invalid 5bit words: 0
[17:39:38.714] <TB3> INFO: invalid XOR eye diagram: 0
[17:39:38.714] <TB3> INFO: frame (failed synchr.): 0
[17:39:38.714] <TB3> INFO: idle data (no TBM trl): 0
[17:39:38.714] <TB3> INFO: no data (only TBM hdr): 0
[17:39:38.714] <TB3> INFO: TBM errors: 0
[17:39:38.714] <TB3> INFO: flawed TBM headers: 0
[17:39:38.714] <TB3> INFO: flawed TBM trailers: 0
[17:39:38.714] <TB3> INFO: event ID mismatches: 0
[17:39:38.714] <TB3> INFO: ROC errors: 0
[17:39:38.714] <TB3> INFO: missing ROC header(s): 0
[17:39:38.714] <TB3> INFO: misplaced readback start: 0
[17:39:38.714] <TB3> INFO: Pixel decoding errors: 0
[17:39:38.714] <TB3> INFO: pixel data incomplete: 0
[17:39:38.714] <TB3> INFO: pixel address: 0
[17:39:38.714] <TB3> INFO: pulse height fill bit: 0
[17:39:38.714] <TB3> INFO: buffer corruption: 0
[17:39:38.774] <TB3> INFO: ######################################################################
[17:39:38.774] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:39:38.774] <TB3> INFO: ######################################################################
[17:39:38.776] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:39:38.791] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[17:39:38.791] <TB3> INFO: run 1 of 1
[17:39:39.041] <TB3> INFO: Expecting 3120000 events.
[17:40:10.055] <TB3> INFO: 670255 events read in total (30422ms).











[17:40:40.105] <TB3> INFO: 1338425 events read in total (60472ms).











[17:41:10.351] <TB3> INFO: 2005495 events read in total (90718ms).











[17:41:41.220] <TB3> INFO: 2674875 events read in total (121587ms).











[17:42:01.860] <TB3> INFO: 3120000 events read in total (142227ms).
[17:42:01.922] <TB3> INFO: Test took 143132ms.
[17:42:26.304] <TB3> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 167 seconds
[17:42:26.304] <TB3> INFO: number of dead bumps (per ROC): 0 0 1 0 0 2 7 3 2 0 0 1 0 0 0 0
[17:42:26.305] <TB3> INFO: separation cut (per ROC): 102 106 106 120 113 122 107 99 114 109 106 108 116 121 107 104
[17:42:26.305] <TB3> INFO: Decoding statistics:
[17:42:26.305] <TB3> INFO: General information:
[17:42:26.305] <TB3> INFO: 16bit words read: 0
[17:42:26.305] <TB3> INFO: valid events total: 0
[17:42:26.305] <TB3> INFO: empty events: 0
[17:42:26.305] <TB3> INFO: valid events with pixels: 0
[17:42:26.305] <TB3> INFO: valid pixel hits: 0
[17:42:26.305] <TB3> INFO: Event errors: 0
[17:42:26.305] <TB3> INFO: start marker: 0
[17:42:26.305] <TB3> INFO: stop marker: 0
[17:42:26.305] <TB3> INFO: overflow: 0
[17:42:26.305] <TB3> INFO: invalid 5bit words: 0
[17:42:26.305] <TB3> INFO: invalid XOR eye diagram: 0
[17:42:26.305] <TB3> INFO: frame (failed synchr.): 0
[17:42:26.305] <TB3> INFO: idle data (no TBM trl): 0
[17:42:26.305] <TB3> INFO: no data (only TBM hdr): 0
[17:42:26.305] <TB3> INFO: TBM errors: 0
[17:42:26.305] <TB3> INFO: flawed TBM headers: 0
[17:42:26.305] <TB3> INFO: flawed TBM trailers: 0
[17:42:26.305] <TB3> INFO: event ID mismatches: 0
[17:42:26.305] <TB3> INFO: ROC errors: 0
[17:42:26.305] <TB3> INFO: missing ROC header(s): 0
[17:42:26.305] <TB3> INFO: misplaced readback start: 0
[17:42:26.305] <TB3> INFO: Pixel decoding errors: 0
[17:42:26.305] <TB3> INFO: pixel data incomplete: 0
[17:42:26.305] <TB3> INFO: pixel address: 0
[17:42:26.305] <TB3> INFO: pulse height fill bit: 0
[17:42:26.305] <TB3> INFO: buffer corruption: 0
[17:42:26.357] <TB3> INFO: ######################################################################
[17:42:26.357] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:42:26.357] <TB3> INFO: ######################################################################
[17:42:26.357] <TB3> INFO: ----------------------------------------------------------------------
[17:42:26.357] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:42:26.357] <TB3> INFO: ----------------------------------------------------------------------
[17:42:26.357] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:42:26.375] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[17:42:26.375] <TB3> INFO: run 1 of 1
[17:42:26.673] <TB3> INFO: Expecting 36608000 events.
[17:42:50.331] <TB3> INFO: 702200 events read in total (23066ms).
[17:43:13.432] <TB3> INFO: 1387500 events read in total (46167ms).
[17:43:36.182] <TB3> INFO: 2072850 events read in total (68917ms).
[17:43:59.110] <TB3> INFO: 2755000 events read in total (91845ms).
[17:44:22.031] <TB3> INFO: 3438250 events read in total (114766ms).
[17:44:44.888] <TB3> INFO: 4120150 events read in total (137623ms).
[17:45:07.894] <TB3> INFO: 4803650 events read in total (160629ms).
[17:45:30.928] <TB3> INFO: 5487000 events read in total (183663ms).
[17:45:53.975] <TB3> INFO: 6167450 events read in total (206710ms).
[17:46:16.877] <TB3> INFO: 6849500 events read in total (229612ms).
[17:46:40.033] <TB3> INFO: 7530450 events read in total (252768ms).
[17:47:02.855] <TB3> INFO: 8209950 events read in total (275590ms).
[17:47:25.597] <TB3> INFO: 8891400 events read in total (298332ms).
[17:47:48.610] <TB3> INFO: 9570650 events read in total (321345ms).
[17:48:11.296] <TB3> INFO: 10248650 events read in total (344031ms).
[17:48:34.127] <TB3> INFO: 10926450 events read in total (366862ms).
[17:48:57.323] <TB3> INFO: 11604850 events read in total (390058ms).
[17:49:20.416] <TB3> INFO: 12284150 events read in total (413151ms).
[17:49:43.399] <TB3> INFO: 12962050 events read in total (436134ms).
[17:50:06.176] <TB3> INFO: 13639250 events read in total (458911ms).
[17:50:28.914] <TB3> INFO: 14315150 events read in total (481649ms).
[17:50:51.594] <TB3> INFO: 14989000 events read in total (504329ms).
[17:51:14.279] <TB3> INFO: 15662750 events read in total (527014ms).
[17:51:37.130] <TB3> INFO: 16338050 events read in total (549865ms).
[17:52:00.076] <TB3> INFO: 17013250 events read in total (572811ms).
[17:52:23.013] <TB3> INFO: 17686550 events read in total (595748ms).
[17:52:46.196] <TB3> INFO: 18358750 events read in total (618931ms).
[17:53:09.189] <TB3> INFO: 19030800 events read in total (641924ms).
[17:53:32.110] <TB3> INFO: 19701700 events read in total (664845ms).
[17:53:55.072] <TB3> INFO: 20371250 events read in total (687807ms).
[17:54:18.046] <TB3> INFO: 21042150 events read in total (710781ms).
[17:54:41.041] <TB3> INFO: 21713100 events read in total (733776ms).
[17:55:04.172] <TB3> INFO: 22383450 events read in total (756907ms).
[17:55:27.281] <TB3> INFO: 23051100 events read in total (780016ms).
[17:55:50.189] <TB3> INFO: 23720850 events read in total (802924ms).
[17:56:13.084] <TB3> INFO: 24389350 events read in total (825819ms).
[17:56:35.867] <TB3> INFO: 25058450 events read in total (848602ms).
[17:56:58.853] <TB3> INFO: 25725800 events read in total (871588ms).
[17:57:21.777] <TB3> INFO: 26392400 events read in total (894512ms).
[17:57:44.787] <TB3> INFO: 27061750 events read in total (917522ms).
[17:58:07.697] <TB3> INFO: 27730700 events read in total (940432ms).
[17:58:30.452] <TB3> INFO: 28399100 events read in total (963187ms).
[17:58:53.030] <TB3> INFO: 29064750 events read in total (985765ms).
[17:59:15.838] <TB3> INFO: 29729250 events read in total (1008573ms).
[17:59:38.625] <TB3> INFO: 30396000 events read in total (1031360ms).
[18:00:01.212] <TB3> INFO: 31062750 events read in total (1053947ms).
[18:00:24.081] <TB3> INFO: 31728800 events read in total (1076816ms).
[18:00:46.978] <TB3> INFO: 32394450 events read in total (1099713ms).
[18:01:09.737] <TB3> INFO: 33060250 events read in total (1122472ms).
[18:01:32.298] <TB3> INFO: 33728700 events read in total (1145033ms).
[18:01:55.063] <TB3> INFO: 34396450 events read in total (1167798ms).
[18:02:17.857] <TB3> INFO: 35064150 events read in total (1190592ms).
[18:02:40.968] <TB3> INFO: 35734300 events read in total (1213703ms).
[18:03:04.386] <TB3> INFO: 36413800 events read in total (1237121ms).
[18:03:11.652] <TB3> INFO: 36608000 events read in total (1244388ms).
[18:03:11.730] <TB3> INFO: Test took 1245356ms.
[18:03:12.143] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:14.104] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:16.060] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:18.050] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:19.992] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:21.775] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:23.281] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:24.779] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:26.284] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:27.787] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:29.310] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:30.929] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:32.436] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:33.887] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:35.395] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:36.888] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[18:03:38.383] <TB3> INFO: PixTestScurves::scurves() done
[18:03:38.383] <TB3> INFO: Vcal mean: 121.14 121.38 135.77 137.85 129.97 137.95 128.42 127.35 126.81 124.94 121.76 113.00 134.46 125.90 116.96 129.03
[18:03:38.383] <TB3> INFO: Vcal RMS: 5.87 6.19 7.49 6.17 6.71 5.95 6.97 6.12 6.12 5.90 6.52 5.16 6.33 6.35 5.23 6.73
[18:03:38.383] <TB3> INFO: PixTestScurves::fullTest() done, duration: 1272 seconds
[18:03:38.384] <TB3> INFO: Decoding statistics:
[18:03:38.384] <TB3> INFO: General information:
[18:03:38.384] <TB3> INFO: 16bit words read: 0
[18:03:38.384] <TB3> INFO: valid events total: 0
[18:03:38.384] <TB3> INFO: empty events: 0
[18:03:38.384] <TB3> INFO: valid events with pixels: 0
[18:03:38.384] <TB3> INFO: valid pixel hits: 0
[18:03:38.384] <TB3> INFO: Event errors: 0
[18:03:38.384] <TB3> INFO: start marker: 0
[18:03:38.384] <TB3> INFO: stop marker: 0
[18:03:38.384] <TB3> INFO: overflow: 0
[18:03:38.384] <TB3> INFO: invalid 5bit words: 0
[18:03:38.384] <TB3> INFO: invalid XOR eye diagram: 0
[18:03:38.384] <TB3> INFO: frame (failed synchr.): 0
[18:03:38.384] <TB3> INFO: idle data (no TBM trl): 0
[18:03:38.384] <TB3> INFO: no data (only TBM hdr): 0
[18:03:38.384] <TB3> INFO: TBM errors: 0
[18:03:38.384] <TB3> INFO: flawed TBM headers: 0
[18:03:38.384] <TB3> INFO: flawed TBM trailers: 0
[18:03:38.384] <TB3> INFO: event ID mismatches: 0
[18:03:38.384] <TB3> INFO: ROC errors: 0
[18:03:38.384] <TB3> INFO: missing ROC header(s): 0
[18:03:38.384] <TB3> INFO: misplaced readback start: 0
[18:03:38.384] <TB3> INFO: Pixel decoding errors: 0
[18:03:38.384] <TB3> INFO: pixel data incomplete: 0
[18:03:38.384] <TB3> INFO: pixel address: 0
[18:03:38.384] <TB3> INFO: pulse height fill bit: 0
[18:03:38.384] <TB3> INFO: buffer corruption: 0
[18:03:38.455] <TB3> INFO: ######################################################################
[18:03:38.455] <TB3> INFO: PixTestTrim::doTest()
[18:03:38.455] <TB3> INFO: ######################################################################
[18:03:38.456] <TB3> INFO: ----------------------------------------------------------------------
[18:03:38.456] <TB3> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:03:38.456] <TB3> INFO: ----------------------------------------------------------------------
[18:03:38.499] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:03:38.499] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:03:38.512] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:03:38.512] <TB3> INFO: run 1 of 1
[18:03:38.748] <TB3> INFO: Expecting 5025280 events.
[18:04:09.442] <TB3> INFO: 832200 events read in total (30094ms).
[18:04:39.652] <TB3> INFO: 1661720 events read in total (60305ms).
[18:05:09.772] <TB3> INFO: 2488152 events read in total (90425ms).
[18:05:39.570] <TB3> INFO: 3309864 events read in total (120222ms).
[18:06:09.449] <TB3> INFO: 4127768 events read in total (150101ms).
[18:06:39.473] <TB3> INFO: 4943696 events read in total (180125ms).
[18:06:42.748] <TB3> INFO: 5025280 events read in total (183400ms).
[18:06:42.805] <TB3> INFO: Test took 184293ms.
[18:06:57.164] <TB3> INFO: ROC 0 VthrComp = 118
[18:06:57.164] <TB3> INFO: ROC 1 VthrComp = 122
[18:06:57.164] <TB3> INFO: ROC 2 VthrComp = 128
[18:06:57.164] <TB3> INFO: ROC 3 VthrComp = 134
[18:06:57.165] <TB3> INFO: ROC 4 VthrComp = 133
[18:06:57.165] <TB3> INFO: ROC 5 VthrComp = 132
[18:06:57.165] <TB3> INFO: ROC 6 VthrComp = 122
[18:06:57.165] <TB3> INFO: ROC 7 VthrComp = 115
[18:06:57.165] <TB3> INFO: ROC 8 VthrComp = 128
[18:06:57.166] <TB3> INFO: ROC 9 VthrComp = 121
[18:06:57.166] <TB3> INFO: ROC 10 VthrComp = 123
[18:06:57.166] <TB3> INFO: ROC 11 VthrComp = 112
[18:06:57.167] <TB3> INFO: ROC 12 VthrComp = 132
[18:06:57.168] <TB3> INFO: ROC 13 VthrComp = 130
[18:06:57.168] <TB3> INFO: ROC 14 VthrComp = 121
[18:06:57.168] <TB3> INFO: ROC 15 VthrComp = 120
[18:06:57.418] <TB3> INFO: Expecting 41600 events.
[18:07:00.904] <TB3> INFO: 41600 events read in total (2895ms).
[18:07:00.904] <TB3> INFO: Test took 3735ms.
[18:07:00.914] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:07:00.914] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:07:00.926] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:07:00.926] <TB3> INFO: run 1 of 1
[18:07:01.204] <TB3> INFO: Expecting 5025280 events.
[18:07:27.712] <TB3> INFO: 591664 events read in total (25917ms).
[18:07:53.415] <TB3> INFO: 1181808 events read in total (51620ms).
[18:08:19.696] <TB3> INFO: 1771624 events read in total (77901ms).
[18:08:45.620] <TB3> INFO: 2361288 events read in total (103825ms).
[18:09:11.240] <TB3> INFO: 2948624 events read in total (129445ms).
[18:09:37.132] <TB3> INFO: 3535576 events read in total (155337ms).
[18:10:03.339] <TB3> INFO: 4120968 events read in total (181544ms).
[18:10:28.857] <TB3> INFO: 4705672 events read in total (207062ms).
[18:10:43.264] <TB3> INFO: 5025280 events read in total (221469ms).
[18:10:43.374] <TB3> INFO: Test took 222449ms.
[18:11:07.397] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.6451 for pixel 25/5 mean/min/max = 46.2636/31.6724/60.8548
[18:11:07.397] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.8744 for pixel 17/44 mean/min/max = 47.4196/32.9517/61.8876
[18:11:07.398] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 67.9471 for pixel 14/75 mean/min/max = 49.8439/31.6527/68.035
[18:11:07.398] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 67.1268 for pixel 31/6 mean/min/max = 50.5875/33.9225/67.2525
[18:11:07.399] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.1622 for pixel 3/5 mean/min/max = 46.0726/31.5792/60.5661
[18:11:07.399] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 69.2165 for pixel 51/22 mean/min/max = 52.9208/36.5148/69.3269
[18:11:07.400] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 63.349 for pixel 21/2 mean/min/max = 47.5535/31.7423/63.3647
[18:11:07.400] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 67.448 for pixel 50/5 mean/min/max = 50.1435/32.5766/67.7104
[18:11:07.401] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 61.7671 for pixel 1/23 mean/min/max = 47.238/32.3699/62.1061
[18:11:07.401] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.9165 for pixel 6/8 mean/min/max = 47.4724/32.0095/62.9352
[18:11:07.402] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 60.3077 for pixel 23/76 mean/min/max = 46.2405/32.084/60.3969
[18:11:07.402] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.7726 for pixel 0/23 mean/min/max = 46.4382/32.9863/59.89
[18:11:07.403] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.06 for pixel 2/79 mean/min/max = 47.1332/34.2015/60.0649
[18:11:07.404] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.8424 for pixel 0/4 mean/min/max = 44.6258/31.3405/57.9111
[18:11:07.404] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.8536 for pixel 50/21 mean/min/max = 46.2951/33.6552/58.935
[18:11:07.405] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 64.5487 for pixel 2/15 mean/min/max = 48.6997/32.8082/64.5913
[18:11:07.406] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:11:07.495] <TB3> INFO: Expecting 411648 events.
[18:11:17.152] <TB3> INFO: 411648 events read in total (9066ms).
[18:11:17.160] <TB3> INFO: Expecting 411648 events.
[18:11:26.670] <TB3> INFO: 411648 events read in total (9107ms).
[18:11:26.683] <TB3> INFO: Expecting 411648 events.
[18:11:36.154] <TB3> INFO: 411648 events read in total (9068ms).
[18:11:36.170] <TB3> INFO: Expecting 411648 events.
[18:11:45.685] <TB3> INFO: 411648 events read in total (9112ms).
[18:11:45.704] <TB3> INFO: Expecting 411648 events.
[18:11:55.176] <TB3> INFO: 411648 events read in total (9069ms).
[18:11:55.195] <TB3> INFO: Expecting 411648 events.
[18:12:04.634] <TB3> INFO: 411648 events read in total (9036ms).
[18:12:04.660] <TB3> INFO: Expecting 411648 events.
[18:12:14.058] <TB3> INFO: 411648 events read in total (8995ms).
[18:12:14.083] <TB3> INFO: Expecting 411648 events.
[18:12:23.482] <TB3> INFO: 411648 events read in total (8996ms).
[18:12:23.510] <TB3> INFO: Expecting 411648 events.
[18:12:32.836] <TB3> INFO: 411648 events read in total (8923ms).
[18:12:32.869] <TB3> INFO: Expecting 411648 events.
[18:12:42.270] <TB3> INFO: 411648 events read in total (8998ms).
[18:12:42.314] <TB3> INFO: Expecting 411648 events.
[18:12:51.623] <TB3> INFO: 411648 events read in total (8906ms).
[18:12:51.667] <TB3> INFO: Expecting 411648 events.
[18:13:01.010] <TB3> INFO: 411648 events read in total (8940ms).
[18:13:01.055] <TB3> INFO: Expecting 411648 events.
[18:13:10.373] <TB3> INFO: 411648 events read in total (8915ms).
[18:13:10.414] <TB3> INFO: Expecting 411648 events.
[18:13:19.646] <TB3> INFO: 411648 events read in total (8829ms).
[18:13:19.699] <TB3> INFO: Expecting 411648 events.
[18:13:29.139] <TB3> INFO: 411648 events read in total (9037ms).
[18:13:29.220] <TB3> INFO: Expecting 411648 events.
[18:13:38.448] <TB3> INFO: 411648 events read in total (8825ms).
[18:13:38.523] <TB3> INFO: Test took 151117ms.
[18:13:39.197] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:13:39.210] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:13:39.210] <TB3> INFO: run 1 of 1
[18:13:39.480] <TB3> INFO: Expecting 5025280 events.
[18:14:05.782] <TB3> INFO: 587760 events read in total (25710ms).
[18:14:31.470] <TB3> INFO: 1175040 events read in total (51399ms).
[18:14:57.382] <TB3> INFO: 1762720 events read in total (77310ms).
[18:15:23.785] <TB3> INFO: 2350096 events read in total (103713ms).
[18:15:49.868] <TB3> INFO: 2936600 events read in total (129796ms).
[18:16:15.973] <TB3> INFO: 3523440 events read in total (155901ms).
[18:16:42.288] <TB3> INFO: 4110368 events read in total (182217ms).
[18:17:08.768] <TB3> INFO: 4696488 events read in total (208696ms).
[18:17:23.277] <TB3> INFO: 5025280 events read in total (223205ms).
[18:17:23.442] <TB3> INFO: Test took 224231ms.
[18:17:47.108] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.588621 .. 147.579008
[18:17:47.347] <TB3> INFO: Expecting 208000 events.
[18:17:56.897] <TB3> INFO: 208000 events read in total (8959ms).
[18:17:56.899] <TB3> INFO: Test took 9790ms.
[18:17:56.947] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 157 (-1/-1) hits flags = 528 (plus default)
[18:17:56.961] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:17:56.961] <TB3> INFO: run 1 of 1
[18:17:57.239] <TB3> INFO: Expecting 5258240 events.
[18:18:23.747] <TB3> INFO: 585192 events read in total (25916ms).
[18:18:49.923] <TB3> INFO: 1170112 events read in total (52093ms).
[18:19:15.589] <TB3> INFO: 1755448 events read in total (77758ms).
[18:19:41.895] <TB3> INFO: 2340576 events read in total (104065ms).
[18:20:07.859] <TB3> INFO: 2925488 events read in total (130028ms).
[18:20:33.558] <TB3> INFO: 3509984 events read in total (155727ms).
[18:20:59.960] <TB3> INFO: 4094624 events read in total (182130ms).
[18:21:25.674] <TB3> INFO: 4678536 events read in total (207843ms).
[18:21:52.881] <TB3> INFO: 5258240 events read in total (235050ms).
[18:21:53.037] <TB3> INFO: Test took 236076ms.
[18:22:18.259] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 26.529251 .. 47.683058
[18:22:18.499] <TB3> INFO: Expecting 208000 events.
[18:22:28.434] <TB3> INFO: 208000 events read in total (9343ms).
[18:22:28.435] <TB3> INFO: Test took 10175ms.
[18:22:28.500] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[18:22:28.514] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:22:28.514] <TB3> INFO: run 1 of 1
[18:22:28.792] <TB3> INFO: Expecting 1397760 events.
[18:22:56.444] <TB3> INFO: 657400 events read in total (27060ms).
[18:23:24.466] <TB3> INFO: 1312488 events read in total (55082ms).
[18:23:28.545] <TB3> INFO: 1397760 events read in total (59161ms).
[18:23:28.580] <TB3> INFO: Test took 60067ms.
[18:23:40.689] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 28.256309 .. 53.248847
[18:23:40.930] <TB3> INFO: Expecting 208000 events.
[18:23:50.869] <TB3> INFO: 208000 events read in total (9348ms).
[18:23:50.870] <TB3> INFO: Test took 10180ms.
[18:23:50.919] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 18 .. 63 (-1/-1) hits flags = 528 (plus default)
[18:23:50.933] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:23:50.933] <TB3> INFO: run 1 of 1
[18:23:51.211] <TB3> INFO: Expecting 1530880 events.
[18:24:18.605] <TB3> INFO: 630384 events read in total (26802ms).
[18:24:46.652] <TB3> INFO: 1260080 events read in total (54849ms).
[18:24:58.486] <TB3> INFO: 1530880 events read in total (66683ms).
[18:24:58.524] <TB3> INFO: Test took 67592ms.
[18:25:11.231] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 26.178844 .. 58.638101
[18:25:11.468] <TB3> INFO: Expecting 208000 events.
[18:25:21.226] <TB3> INFO: 208000 events read in total (9166ms).
[18:25:21.227] <TB3> INFO: Test took 9995ms.
[18:25:21.277] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 68 (-1/-1) hits flags = 528 (plus default)
[18:25:21.291] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:25:21.291] <TB3> INFO: run 1 of 1
[18:25:21.579] <TB3> INFO: Expecting 1763840 events.
[18:25:49.681] <TB3> INFO: 626496 events read in total (27511ms).
[18:26:16.366] <TB3> INFO: 1251904 events read in total (54196ms).
[18:26:38.515] <TB3> INFO: 1763840 events read in total (76345ms).
[18:26:38.556] <TB3> INFO: Test took 77265ms.
[18:26:54.535] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:26:54.535] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:26:54.548] <TB3> INFO: dacScan split into 1 runs with ntrig = 8
[18:26:54.548] <TB3> INFO: run 1 of 1
[18:26:54.784] <TB3> INFO: Expecting 1364480 events.
[18:27:23.625] <TB3> INFO: 669008 events read in total (28249ms).
[18:27:51.804] <TB3> INFO: 1336832 events read in total (56428ms).
[18:27:53.416] <TB3> INFO: 1364480 events read in total (58040ms).
[18:27:53.446] <TB3> INFO: Test took 58898ms.
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C0.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C1.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C2.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C3.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C4.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C5.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C6.dat
[18:28:06.018] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C7.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C8.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C9.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C10.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C11.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C12.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C13.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C14.dat
[18:28:06.019] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C15.dat
[18:28:06.019] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C0.dat
[18:28:06.024] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C1.dat
[18:28:06.029] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C2.dat
[18:28:06.034] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C3.dat
[18:28:06.038] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C4.dat
[18:28:06.043] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C5.dat
[18:28:06.048] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C6.dat
[18:28:06.053] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C7.dat
[18:28:06.058] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C8.dat
[18:28:06.063] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C9.dat
[18:28:06.067] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C10.dat
[18:28:06.072] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C11.dat
[18:28:06.077] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C12.dat
[18:28:06.082] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C13.dat
[18:28:06.086] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C14.dat
[18:28:06.093] <TB3> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C15.dat
[18:28:06.099] <TB3> INFO: PixTestTrim::trimTest() done
[18:28:06.099] <TB3> INFO: vtrim: 129 143 146 160 131 159 130 146 132 133 118 107 114 122 136 141
[18:28:06.099] <TB3> INFO: vthrcomp: 118 122 128 134 133 132 122 115 128 121 123 112 132 130 121 120
[18:28:06.099] <TB3> INFO: vcal mean: 35.08 35.16 35.64 35.53 34.91 35.34 35.34 38.11 35.18 35.43 35.01 34.98 35.05 34.88 34.99 35.40
[18:28:06.099] <TB3> INFO: vcal RMS: 1.35 1.29 1.94 1.72 1.09 1.49 1.53 3.40 1.37 1.62 1.08 1.09 1.02 0.98 0.97 1.65
[18:28:06.099] <TB3> INFO: bits mean: 9.72 9.59 9.59 9.14 9.38 7.97 9.81 10.49 9.73 9.43 9.47 9.06 8.34 9.64 9.15 9.46
[18:28:06.099] <TB3> INFO: bits RMS: 2.70 2.51 2.63 2.47 2.77 2.43 2.55 2.51 2.56 2.78 2.73 2.76 2.87 2.81 2.66 2.57
[18:28:06.108] <TB3> INFO: ----------------------------------------------------------------------
[18:28:06.108] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:28:06.108] <TB3> INFO: ----------------------------------------------------------------------
[18:28:06.111] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:28:06.125] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:28:06.125] <TB3> INFO: run 1 of 1
[18:28:06.367] <TB3> INFO: Expecting 4160000 events.
[18:28:39.394] <TB3> INFO: 773250 events read in total (32435ms).
[18:29:11.424] <TB3> INFO: 1538000 events read in total (64465ms).
[18:29:43.507] <TB3> INFO: 2295880 events read in total (96548ms).
[18:30:15.212] <TB3> INFO: 3048565 events read in total (128253ms).
[18:30:47.761] <TB3> INFO: 3797800 events read in total (160803ms).
[18:31:04.020] <TB3> INFO: 4160000 events read in total (177061ms).
[18:31:04.090] <TB3> INFO: Test took 177965ms.
[18:31:26.322] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 252 (-1/-1) hits flags = 528 (plus default)
[18:31:26.336] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:31:26.336] <TB3> INFO: run 1 of 1
[18:31:26.593] <TB3> INFO: Expecting 5262400 events.
[18:31:58.092] <TB3> INFO: 688700 events read in total (30908ms).
[18:32:29.018] <TB3> INFO: 1372805 events read in total (61834ms).
[18:32:59.923] <TB3> INFO: 2054770 events read in total (92739ms).
[18:33:30.875] <TB3> INFO: 2733840 events read in total (123691ms).
[18:34:01.378] <TB3> INFO: 3409990 events read in total (154194ms).
[18:34:31.519] <TB3> INFO: 4084615 events read in total (184335ms).
[18:35:02.304] <TB3> INFO: 4757215 events read in total (215120ms).
[18:35:24.547] <TB3> INFO: 5262400 events read in total (237363ms).
[18:35:24.651] <TB3> INFO: Test took 238315ms.
[18:35:52.683] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 218 (-1/-1) hits flags = 528 (plus default)
[18:35:52.696] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:35:52.697] <TB3> INFO: run 1 of 1
[18:35:52.933] <TB3> INFO: Expecting 4555200 events.
[18:36:24.531] <TB3> INFO: 721190 events read in total (31006ms).
[18:36:55.180] <TB3> INFO: 1436265 events read in total (61655ms).
[18:37:26.098] <TB3> INFO: 2147505 events read in total (92573ms).
[18:37:56.282] <TB3> INFO: 2854705 events read in total (122757ms).
[18:38:27.059] <TB3> INFO: 3559425 events read in total (153534ms).
[18:38:58.298] <TB3> INFO: 4261630 events read in total (184773ms).
[18:39:11.259] <TB3> INFO: 4555200 events read in total (197734ms).
[18:39:11.363] <TB3> INFO: Test took 198666ms.
[18:39:38.489] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 212 (-1/-1) hits flags = 528 (plus default)
[18:39:38.503] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:39:38.503] <TB3> INFO: run 1 of 1
[18:39:38.769] <TB3> INFO: Expecting 4430400 events.
[18:40:11.065] <TB3> INFO: 728620 events read in total (31704ms).
[18:40:42.451] <TB3> INFO: 1451315 events read in total (63090ms).
[18:41:13.541] <TB3> INFO: 2169790 events read in total (94181ms).
[18:41:45.024] <TB3> INFO: 2883570 events read in total (125663ms).
[18:42:15.854] <TB3> INFO: 3594205 events read in total (156494ms).
[18:42:47.452] <TB3> INFO: 4304560 events read in total (188091ms).
[18:42:53.180] <TB3> INFO: 4430400 events read in total (193819ms).
[18:42:53.287] <TB3> INFO: Test took 194784ms.
[18:43:19.662] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 209 (-1/-1) hits flags = 528 (plus default)
[18:43:19.675] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[18:43:19.676] <TB3> INFO: run 1 of 1
[18:43:19.917] <TB3> INFO: Expecting 4368000 events.
[18:43:52.820] <TB3> INFO: 732595 events read in total (32311ms).
[18:44:24.196] <TB3> INFO: 1459550 events read in total (63687ms).
[18:44:54.540] <TB3> INFO: 2181715 events read in total (94031ms).
[18:45:25.658] <TB3> INFO: 2898035 events read in total (125149ms).
[18:45:56.771] <TB3> INFO: 3611725 events read in total (156262ms).
[18:46:27.374] <TB3> INFO: 4325375 events read in total (186865ms).
[18:46:29.588] <TB3> INFO: 4368000 events read in total (189079ms).
[18:46:29.664] <TB3> INFO: Test took 189989ms.
[18:46:53.630] <TB3> INFO: PixTestTrim::trimBitTest() done
[18:46:53.631] <TB3> INFO: PixTestTrim::doTest() done, duration: 2595 seconds
[18:46:53.631] <TB3> INFO: Decoding statistics:
[18:46:53.631] <TB3> INFO: General information:
[18:46:53.631] <TB3> INFO: 16bit words read: 0
[18:46:53.631] <TB3> INFO: valid events total: 0
[18:46:53.631] <TB3> INFO: empty events: 0
[18:46:53.631] <TB3> INFO: valid events with pixels: 0
[18:46:53.631] <TB3> INFO: valid pixel hits: 0
[18:46:53.631] <TB3> INFO: Event errors: 0
[18:46:53.631] <TB3> INFO: start marker: 0
[18:46:53.631] <TB3> INFO: stop marker: 0
[18:46:53.631] <TB3> INFO: overflow: 0
[18:46:53.631] <TB3> INFO: invalid 5bit words: 0
[18:46:53.631] <TB3> INFO: invalid XOR eye diagram: 0
[18:46:53.631] <TB3> INFO: frame (failed synchr.): 0
[18:46:53.631] <TB3> INFO: idle data (no TBM trl): 0
[18:46:53.631] <TB3> INFO: no data (only TBM hdr): 0
[18:46:53.631] <TB3> INFO: TBM errors: 0
[18:46:53.631] <TB3> INFO: flawed TBM headers: 0
[18:46:53.631] <TB3> INFO: flawed TBM trailers: 0
[18:46:53.631] <TB3> INFO: event ID mismatches: 0
[18:46:53.631] <TB3> INFO: ROC errors: 0
[18:46:53.631] <TB3> INFO: missing ROC header(s): 0
[18:46:53.631] <TB3> INFO: misplaced readback start: 0
[18:46:53.631] <TB3> INFO: Pixel decoding errors: 0
[18:46:53.631] <TB3> INFO: pixel data incomplete: 0
[18:46:53.631] <TB3> INFO: pixel address: 0
[18:46:53.631] <TB3> INFO: pulse height fill bit: 0
[18:46:53.631] <TB3> INFO: buffer corruption: 0
[18:46:54.231] <TB3> INFO: ######################################################################
[18:46:54.231] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:46:54.231] <TB3> INFO: ######################################################################
[18:46:54.471] <TB3> INFO: Expecting 41600 events.
[18:46:58.016] <TB3> INFO: 41600 events read in total (2953ms).
[18:46:58.017] <TB3> INFO: Test took 3784ms.
[18:46:58.467] <TB3> INFO: Expecting 41600 events.
[18:47:01.971] <TB3> INFO: 41600 events read in total (2912ms).
[18:47:01.972] <TB3> INFO: Test took 3749ms.
[18:47:02.262] <TB3> INFO: Expecting 41600 events.
[18:47:05.772] <TB3> INFO: 41600 events read in total (2918ms).
[18:47:05.773] <TB3> INFO: Test took 3777ms.
[18:47:06.063] <TB3> INFO: Expecting 41600 events.
[18:47:09.534] <TB3> INFO: 41600 events read in total (2879ms).
[18:47:09.535] <TB3> INFO: Test took 3738ms.
[18:47:09.827] <TB3> INFO: Expecting 41600 events.
[18:47:13.385] <TB3> INFO: 41600 events read in total (2966ms).
[18:47:13.386] <TB3> INFO: Test took 3824ms.
[18:47:13.676] <TB3> INFO: Expecting 41600 events.
[18:47:17.220] <TB3> INFO: 41600 events read in total (2952ms).
[18:47:17.221] <TB3> INFO: Test took 3811ms.
[18:47:17.515] <TB3> INFO: Expecting 41600 events.
[18:47:21.102] <TB3> INFO: 41600 events read in total (2995ms).
[18:47:21.103] <TB3> INFO: Test took 3853ms.
[18:47:21.392] <TB3> INFO: Expecting 41600 events.
[18:47:24.869] <TB3> INFO: 41600 events read in total (2885ms).
[18:47:24.870] <TB3> INFO: Test took 3743ms.
[18:47:25.160] <TB3> INFO: Expecting 41600 events.
[18:47:28.708] <TB3> INFO: 41600 events read in total (2956ms).
[18:47:28.709] <TB3> INFO: Test took 3815ms.
[18:47:28.999] <TB3> INFO: Expecting 41600 events.
[18:47:32.575] <TB3> INFO: 41600 events read in total (2984ms).
[18:47:32.576] <TB3> INFO: Test took 3842ms.
[18:47:32.866] <TB3> INFO: Expecting 41600 events.
[18:47:36.368] <TB3> INFO: 41600 events read in total (2910ms).
[18:47:36.369] <TB3> INFO: Test took 3769ms.
[18:47:36.659] <TB3> INFO: Expecting 41600 events.
[18:47:40.164] <TB3> INFO: 41600 events read in total (2913ms).
[18:47:40.165] <TB3> INFO: Test took 3772ms.
[18:47:40.457] <TB3> INFO: Expecting 41600 events.
[18:47:43.948] <TB3> INFO: 41600 events read in total (2899ms).
[18:47:43.949] <TB3> INFO: Test took 3757ms.
[18:47:44.242] <TB3> INFO: Expecting 41600 events.
[18:47:47.726] <TB3> INFO: 41600 events read in total (2892ms).
[18:47:47.727] <TB3> INFO: Test took 3750ms.
[18:47:48.017] <TB3> INFO: Expecting 41600 events.
[18:47:51.556] <TB3> INFO: 41600 events read in total (2947ms).
[18:47:51.557] <TB3> INFO: Test took 3806ms.
[18:47:51.847] <TB3> INFO: Expecting 41600 events.
[18:47:55.420] <TB3> INFO: 41600 events read in total (2981ms).
[18:47:55.420] <TB3> INFO: Test took 3839ms.
[18:47:55.713] <TB3> INFO: Expecting 41600 events.
[18:47:59.214] <TB3> INFO: 41600 events read in total (2909ms).
[18:47:59.215] <TB3> INFO: Test took 3767ms.
[18:47:59.505] <TB3> INFO: Expecting 41600 events.
[18:48:03.209] <TB3> INFO: 41600 events read in total (3112ms).
[18:48:03.210] <TB3> INFO: Test took 3971ms.
[18:48:03.500] <TB3> INFO: Expecting 41600 events.
[18:48:07.104] <TB3> INFO: 41600 events read in total (3012ms).
[18:48:07.105] <TB3> INFO: Test took 3871ms.
[18:48:07.397] <TB3> INFO: Expecting 41600 events.
[18:48:10.885] <TB3> INFO: 41600 events read in total (2896ms).
[18:48:10.885] <TB3> INFO: Test took 3754ms.
[18:48:11.175] <TB3> INFO: Expecting 41600 events.
[18:48:14.835] <TB3> INFO: 41600 events read in total (3068ms).
[18:48:14.836] <TB3> INFO: Test took 3926ms.
[18:48:15.129] <TB3> INFO: Expecting 41600 events.
[18:48:18.797] <TB3> INFO: 41600 events read in total (3076ms).
[18:48:18.798] <TB3> INFO: Test took 3935ms.
[18:48:19.087] <TB3> INFO: Expecting 41600 events.
[18:48:22.637] <TB3> INFO: 41600 events read in total (2958ms).
[18:48:22.637] <TB3> INFO: Test took 3815ms.
[18:48:22.928] <TB3> INFO: Expecting 41600 events.
[18:48:26.482] <TB3> INFO: 41600 events read in total (2962ms).
[18:48:26.483] <TB3> INFO: Test took 3821ms.
[18:48:26.772] <TB3> INFO: Expecting 41600 events.
[18:48:30.380] <TB3> INFO: 41600 events read in total (3017ms).
[18:48:30.381] <TB3> INFO: Test took 3874ms.
[18:48:30.672] <TB3> INFO: Expecting 41600 events.
[18:48:34.232] <TB3> INFO: 41600 events read in total (2968ms).
[18:48:34.233] <TB3> INFO: Test took 3827ms.
[18:48:34.522] <TB3> INFO: Expecting 41600 events.
[18:48:38.084] <TB3> INFO: 41600 events read in total (2970ms).
[18:48:38.085] <TB3> INFO: Test took 3828ms.
[18:48:38.375] <TB3> INFO: Expecting 41600 events.
[18:48:41.875] <TB3> INFO: 41600 events read in total (2908ms).
[18:48:41.876] <TB3> INFO: Test took 3767ms.
[18:48:42.171] <TB3> INFO: Expecting 41600 events.
[18:48:45.676] <TB3> INFO: 41600 events read in total (2914ms).
[18:48:45.676] <TB3> INFO: Test took 3771ms.
[18:48:45.967] <TB3> INFO: Expecting 2560 events.
[18:48:46.851] <TB3> INFO: 2560 events read in total (292ms).
[18:48:46.851] <TB3> INFO: Test took 1161ms.
[18:48:47.159] <TB3> INFO: Expecting 2560 events.
[18:48:48.053] <TB3> INFO: 2560 events read in total (302ms).
[18:48:48.054] <TB3> INFO: Test took 1203ms.
[18:48:48.362] <TB3> INFO: Expecting 2560 events.
[18:48:49.255] <TB3> INFO: 2560 events read in total (301ms).
[18:48:49.255] <TB3> INFO: Test took 1200ms.
[18:48:49.562] <TB3> INFO: Expecting 2560 events.
[18:48:50.451] <TB3> INFO: 2560 events read in total (297ms).
[18:48:50.451] <TB3> INFO: Test took 1195ms.
[18:48:50.759] <TB3> INFO: Expecting 2560 events.
[18:48:51.643] <TB3> INFO: 2560 events read in total (292ms).
[18:48:51.643] <TB3> INFO: Test took 1191ms.
[18:48:51.951] <TB3> INFO: Expecting 2560 events.
[18:48:52.833] <TB3> INFO: 2560 events read in total (290ms).
[18:48:52.833] <TB3> INFO: Test took 1190ms.
[18:48:53.141] <TB3> INFO: Expecting 2560 events.
[18:48:54.025] <TB3> INFO: 2560 events read in total (292ms).
[18:48:54.026] <TB3> INFO: Test took 1193ms.
[18:48:54.334] <TB3> INFO: Expecting 2560 events.
[18:48:55.213] <TB3> INFO: 2560 events read in total (288ms).
[18:48:55.213] <TB3> INFO: Test took 1187ms.
[18:48:55.521] <TB3> INFO: Expecting 2560 events.
[18:48:56.402] <TB3> INFO: 2560 events read in total (289ms).
[18:48:56.402] <TB3> INFO: Test took 1188ms.
[18:48:56.711] <TB3> INFO: Expecting 2560 events.
[18:48:57.590] <TB3> INFO: 2560 events read in total (287ms).
[18:48:57.590] <TB3> INFO: Test took 1188ms.
[18:48:57.898] <TB3> INFO: Expecting 2560 events.
[18:48:58.781] <TB3> INFO: 2560 events read in total (291ms).
[18:48:58.781] <TB3> INFO: Test took 1191ms.
[18:48:59.089] <TB3> INFO: Expecting 2560 events.
[18:48:59.971] <TB3> INFO: 2560 events read in total (290ms).
[18:48:59.971] <TB3> INFO: Test took 1190ms.
[18:49:00.279] <TB3> INFO: Expecting 2560 events.
[18:49:01.171] <TB3> INFO: 2560 events read in total (300ms).
[18:49:01.171] <TB3> INFO: Test took 1199ms.
[18:49:01.478] <TB3> INFO: Expecting 2560 events.
[18:49:02.370] <TB3> INFO: 2560 events read in total (300ms).
[18:49:02.370] <TB3> INFO: Test took 1198ms.
[18:49:02.678] <TB3> INFO: Expecting 2560 events.
[18:49:03.564] <TB3> INFO: 2560 events read in total (295ms).
[18:49:03.565] <TB3> INFO: Test took 1194ms.
[18:49:03.872] <TB3> INFO: Expecting 2560 events.
[18:49:04.768] <TB3> INFO: 2560 events read in total (304ms).
[18:49:04.768] <TB3> INFO: Test took 1202ms.
[18:49:04.772] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:49:05.078] <TB3> INFO: Expecting 655360 events.
[18:49:19.968] <TB3> INFO: 655360 events read in total (14299ms).
[18:49:19.980] <TB3> INFO: Expecting 655360 events.
[18:49:34.695] <TB3> INFO: 655360 events read in total (14312ms).
[18:49:34.712] <TB3> INFO: Expecting 655360 events.
[18:49:49.378] <TB3> INFO: 655360 events read in total (14262ms).
[18:49:49.399] <TB3> INFO: Expecting 655360 events.
[18:50:04.185] <TB3> INFO: 655360 events read in total (14383ms).
[18:50:04.210] <TB3> INFO: Expecting 655360 events.
[18:50:18.829] <TB3> INFO: 655360 events read in total (14216ms).
[18:50:18.866] <TB3> INFO: Expecting 655360 events.
[18:50:33.474] <TB3> INFO: 655360 events read in total (14205ms).
[18:50:33.508] <TB3> INFO: Expecting 655360 events.
[18:50:48.260] <TB3> INFO: 655360 events read in total (14349ms).
[18:50:48.299] <TB3> INFO: Expecting 655360 events.
[18:51:03.111] <TB3> INFO: 655360 events read in total (14409ms).
[18:51:03.154] <TB3> INFO: Expecting 655360 events.
[18:51:17.797] <TB3> INFO: 655360 events read in total (14240ms).
[18:51:17.843] <TB3> INFO: Expecting 655360 events.
[18:51:32.449] <TB3> INFO: 655360 events read in total (14203ms).
[18:51:32.499] <TB3> INFO: Expecting 655360 events.
[18:51:47.178] <TB3> INFO: 655360 events read in total (14277ms).
[18:51:47.234] <TB3> INFO: Expecting 655360 events.
[18:52:01.844] <TB3> INFO: 655360 events read in total (14207ms).
[18:52:01.919] <TB3> INFO: Expecting 655360 events.
[18:52:16.477] <TB3> INFO: 655360 events read in total (14155ms).
[18:52:16.557] <TB3> INFO: Expecting 655360 events.
[18:52:31.323] <TB3> INFO: 655360 events read in total (14362ms).
[18:52:31.410] <TB3> INFO: Expecting 655360 events.
[18:52:46.143] <TB3> INFO: 655360 events read in total (14330ms).
[18:52:46.236] <TB3> INFO: Expecting 655360 events.
[18:53:00.926] <TB3> INFO: 655360 events read in total (14288ms).
[18:53:01.024] <TB3> INFO: Test took 236252ms.
[18:53:01.119] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:53:01.377] <TB3> INFO: Expecting 655360 events.
[18:53:16.038] <TB3> INFO: 655360 events read in total (14069ms).
[18:53:16.050] <TB3> INFO: Expecting 655360 events.
[18:53:30.572] <TB3> INFO: 655360 events read in total (14119ms).
[18:53:30.589] <TB3> INFO: Expecting 655360 events.
[18:53:44.959] <TB3> INFO: 655360 events read in total (13967ms).
[18:53:44.981] <TB3> INFO: Expecting 655360 events.
[18:53:59.434] <TB3> INFO: 655360 events read in total (14050ms).
[18:53:59.459] <TB3> INFO: Expecting 655360 events.
[18:54:13.915] <TB3> INFO: 655360 events read in total (14053ms).
[18:54:13.945] <TB3> INFO: Expecting 655360 events.
[18:54:28.316] <TB3> INFO: 655360 events read in total (13968ms).
[18:54:28.350] <TB3> INFO: Expecting 655360 events.
[18:54:42.970] <TB3> INFO: 655360 events read in total (14217ms).
[18:54:43.010] <TB3> INFO: Expecting 655360 events.
[18:54:57.622] <TB3> INFO: 655360 events read in total (14209ms).
[18:54:57.664] <TB3> INFO: Expecting 655360 events.
[18:55:12.469] <TB3> INFO: 655360 events read in total (14402ms).
[18:55:12.516] <TB3> INFO: Expecting 655360 events.
[18:55:27.157] <TB3> INFO: 655360 events read in total (14238ms).
[18:55:27.207] <TB3> INFO: Expecting 655360 events.
[18:55:41.554] <TB3> INFO: 655360 events read in total (13944ms).
[18:55:41.607] <TB3> INFO: Expecting 655360 events.
[18:55:56.365] <TB3> INFO: 655360 events read in total (14355ms).
[18:55:56.436] <TB3> INFO: Expecting 655360 events.
[18:56:11.133] <TB3> INFO: 655360 events read in total (14294ms).
[18:56:11.242] <TB3> INFO: Expecting 655360 events.
[18:56:26.212] <TB3> INFO: 655360 events read in total (14567ms).
[18:56:26.297] <TB3> INFO: Expecting 655360 events.
[18:56:41.368] <TB3> INFO: 655360 events read in total (14668ms).
[18:56:41.459] <TB3> INFO: Expecting 655360 events.
[18:56:56.362] <TB3> INFO: 655360 events read in total (14494ms).
[18:56:56.458] <TB3> INFO: Test took 235339ms.
[18:56:56.631] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.637] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.643] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.649] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.655] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.661] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.666] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.673] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.679] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.684] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.690] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.696] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:56.702] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:56.708] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:56.714] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:56.720] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[18:56:56.726] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[18:56:56.732] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[18:56:56.738] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.744] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.750] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:56.756] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:56.762] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:56.768] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:56.775] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[18:56:56.781] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[18:56:56.787] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.793] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:56.799] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.805] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:56.839] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C0.dat
[18:56:56.839] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C1.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C2.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C3.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C4.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C5.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C6.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C7.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C8.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C9.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C10.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C11.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C12.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C13.dat
[18:56:56.840] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C14.dat
[18:56:56.841] <TB3> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C15.dat
[18:56:57.132] <TB3> INFO: Expecting 41600 events.
[18:57:00.318] <TB3> INFO: 41600 events read in total (2594ms).
[18:57:00.319] <TB3> INFO: Test took 3475ms.
[18:57:00.810] <TB3> INFO: Expecting 41600 events.
[18:57:03.937] <TB3> INFO: 41600 events read in total (2536ms).
[18:57:03.938] <TB3> INFO: Test took 3408ms.
[18:57:04.391] <TB3> INFO: Expecting 41600 events.
[18:57:07.610] <TB3> INFO: 41600 events read in total (2627ms).
[18:57:07.611] <TB3> INFO: Test took 3458ms.
[18:57:07.835] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:07.924] <TB3> INFO: Expecting 2560 events.
[18:57:08.822] <TB3> INFO: 2560 events read in total (306ms).
[18:57:08.822] <TB3> INFO: Test took 987ms.
[18:57:08.828] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:09.129] <TB3> INFO: Expecting 2560 events.
[18:57:10.024] <TB3> INFO: 2560 events read in total (303ms).
[18:57:10.024] <TB3> INFO: Test took 1196ms.
[18:57:10.027] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:10.332] <TB3> INFO: Expecting 2560 events.
[18:57:11.226] <TB3> INFO: 2560 events read in total (302ms).
[18:57:11.227] <TB3> INFO: Test took 1200ms.
[18:57:11.230] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:11.536] <TB3> INFO: Expecting 2560 events.
[18:57:12.429] <TB3> INFO: 2560 events read in total (302ms).
[18:57:12.430] <TB3> INFO: Test took 1200ms.
[18:57:12.433] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:12.738] <TB3> INFO: Expecting 2560 events.
[18:57:13.625] <TB3> INFO: 2560 events read in total (296ms).
[18:57:13.626] <TB3> INFO: Test took 1193ms.
[18:57:13.629] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:13.932] <TB3> INFO: Expecting 2560 events.
[18:57:14.828] <TB3> INFO: 2560 events read in total (304ms).
[18:57:14.829] <TB3> INFO: Test took 1200ms.
[18:57:14.831] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:15.139] <TB3> INFO: Expecting 2560 events.
[18:57:16.035] <TB3> INFO: 2560 events read in total (305ms).
[18:57:16.035] <TB3> INFO: Test took 1204ms.
[18:57:16.038] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:16.343] <TB3> INFO: Expecting 2560 events.
[18:57:17.236] <TB3> INFO: 2560 events read in total (301ms).
[18:57:17.237] <TB3> INFO: Test took 1199ms.
[18:57:17.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:17.544] <TB3> INFO: Expecting 2560 events.
[18:57:18.425] <TB3> INFO: 2560 events read in total (289ms).
[18:57:18.425] <TB3> INFO: Test took 1185ms.
[18:57:18.427] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:18.734] <TB3> INFO: Expecting 2560 events.
[18:57:19.626] <TB3> INFO: 2560 events read in total (300ms).
[18:57:19.627] <TB3> INFO: Test took 1200ms.
[18:57:19.629] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:19.934] <TB3> INFO: Expecting 2560 events.
[18:57:20.829] <TB3> INFO: 2560 events read in total (303ms).
[18:57:20.829] <TB3> INFO: Test took 1200ms.
[18:57:20.833] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:21.137] <TB3> INFO: Expecting 2560 events.
[18:57:22.016] <TB3> INFO: 2560 events read in total (287ms).
[18:57:22.017] <TB3> INFO: Test took 1184ms.
[18:57:22.019] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:22.326] <TB3> INFO: Expecting 2560 events.
[18:57:23.214] <TB3> INFO: 2560 events read in total (296ms).
[18:57:23.214] <TB3> INFO: Test took 1195ms.
[18:57:23.218] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:23.521] <TB3> INFO: Expecting 2560 events.
[18:57:24.413] <TB3> INFO: 2560 events read in total (300ms).
[18:57:24.414] <TB3> INFO: Test took 1196ms.
[18:57:24.417] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:24.721] <TB3> INFO: Expecting 2560 events.
[18:57:25.612] <TB3> INFO: 2560 events read in total (299ms).
[18:57:25.612] <TB3> INFO: Test took 1195ms.
[18:57:25.615] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:25.920] <TB3> INFO: Expecting 2560 events.
[18:57:26.809] <TB3> INFO: 2560 events read in total (298ms).
[18:57:26.809] <TB3> INFO: Test took 1194ms.
[18:57:26.811] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:27.118] <TB3> INFO: Expecting 2560 events.
[18:57:27.999] <TB3> INFO: 2560 events read in total (290ms).
[18:57:27.999] <TB3> INFO: Test took 1188ms.
[18:57:27.002] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:28.307] <TB3> INFO: Expecting 2560 events.
[18:57:29.200] <TB3> INFO: 2560 events read in total (301ms).
[18:57:29.200] <TB3> INFO: Test took 1198ms.
[18:57:29.203] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:29.508] <TB3> INFO: Expecting 2560 events.
[18:57:30.393] <TB3> INFO: 2560 events read in total (293ms).
[18:57:30.394] <TB3> INFO: Test took 1191ms.
[18:57:30.397] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:30.703] <TB3> INFO: Expecting 2560 events.
[18:57:31.584] <TB3> INFO: 2560 events read in total (290ms).
[18:57:31.584] <TB3> INFO: Test took 1188ms.
[18:57:31.588] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:31.893] <TB3> INFO: Expecting 2560 events.
[18:57:32.786] <TB3> INFO: 2560 events read in total (301ms).
[18:57:32.787] <TB3> INFO: Test took 1199ms.
[18:57:32.790] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:33.094] <TB3> INFO: Expecting 2560 events.
[18:57:33.986] <TB3> INFO: 2560 events read in total (300ms).
[18:57:33.987] <TB3> INFO: Test took 1197ms.
[18:57:33.990] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:34.294] <TB3> INFO: Expecting 2560 events.
[18:57:35.174] <TB3> INFO: 2560 events read in total (288ms).
[18:57:35.174] <TB3> INFO: Test took 1184ms.
[18:57:35.178] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:35.482] <TB3> INFO: Expecting 2560 events.
[18:57:36.369] <TB3> INFO: 2560 events read in total (296ms).
[18:57:36.370] <TB3> INFO: Test took 1192ms.
[18:57:36.372] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:36.680] <TB3> INFO: Expecting 2560 events.
[18:57:37.575] <TB3> INFO: 2560 events read in total (304ms).
[18:57:37.575] <TB3> INFO: Test took 1203ms.
[18:57:37.579] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:37.883] <TB3> INFO: Expecting 2560 events.
[18:57:38.777] <TB3> INFO: 2560 events read in total (302ms).
[18:57:38.777] <TB3> INFO: Test took 1198ms.
[18:57:38.780] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:39.086] <TB3> INFO: Expecting 2560 events.
[18:57:39.974] <TB3> INFO: 2560 events read in total (297ms).
[18:57:39.974] <TB3> INFO: Test took 1194ms.
[18:57:39.979] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:40.281] <TB3> INFO: Expecting 2560 events.
[18:57:41.176] <TB3> INFO: 2560 events read in total (304ms).
[18:57:41.177] <TB3> INFO: Test took 1198ms.
[18:57:41.180] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:41.486] <TB3> INFO: Expecting 2560 events.
[18:57:42.378] <TB3> INFO: 2560 events read in total (301ms).
[18:57:42.378] <TB3> INFO: Test took 1198ms.
[18:57:42.383] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:42.687] <TB3> INFO: Expecting 2560 events.
[18:57:43.575] <TB3> INFO: 2560 events read in total (296ms).
[18:57:43.575] <TB3> INFO: Test took 1192ms.
[18:57:43.580] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:43.884] <TB3> INFO: Expecting 2560 events.
[18:57:44.768] <TB3> INFO: 2560 events read in total (293ms).
[18:57:44.768] <TB3> INFO: Test took 1189ms.
[18:57:44.770] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:57:45.076] <TB3> INFO: Expecting 2560 events.
[18:57:45.962] <TB3> INFO: 2560 events read in total (294ms).
[18:57:45.962] <TB3> INFO: Test took 1192ms.
[18:57:46.426] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 652 seconds
[18:57:46.426] <TB3> INFO: PH scale (per ROC): 49 48 32 33 46 43 41 47 37 50 37 41 48 52 42 45
[18:57:46.426] <TB3> INFO: PH offset (per ROC): 122 133 91 85 105 93 108 119 100 132 91 83 123 123 97 119
[18:57:46.434] <TB3> INFO: Decoding statistics:
[18:57:46.434] <TB3> INFO: General information:
[18:57:46.434] <TB3> INFO: 16bit words read: 127878
[18:57:46.434] <TB3> INFO: valid events total: 20480
[18:57:46.434] <TB3> INFO: empty events: 17981
[18:57:46.434] <TB3> INFO: valid events with pixels: 2499
[18:57:46.434] <TB3> INFO: valid pixel hits: 2499
[18:57:46.434] <TB3> INFO: Event errors: 0
[18:57:46.434] <TB3> INFO: start marker: 0
[18:57:46.434] <TB3> INFO: stop marker: 0
[18:57:46.434] <TB3> INFO: overflow: 0
[18:57:46.434] <TB3> INFO: invalid 5bit words: 0
[18:57:46.434] <TB3> INFO: invalid XOR eye diagram: 0
[18:57:46.434] <TB3> INFO: frame (failed synchr.): 0
[18:57:46.434] <TB3> INFO: idle data (no TBM trl): 0
[18:57:46.434] <TB3> INFO: no data (only TBM hdr): 0
[18:57:46.434] <TB3> INFO: TBM errors: 0
[18:57:46.434] <TB3> INFO: flawed TBM headers: 0
[18:57:46.434] <TB3> INFO: flawed TBM trailers: 0
[18:57:46.434] <TB3> INFO: event ID mismatches: 0
[18:57:46.434] <TB3> INFO: ROC errors: 0
[18:57:46.434] <TB3> INFO: missing ROC header(s): 0
[18:57:46.434] <TB3> INFO: misplaced readback start: 0
[18:57:46.434] <TB3> INFO: Pixel decoding errors: 0
[18:57:46.434] <TB3> INFO: pixel data incomplete: 0
[18:57:46.434] <TB3> INFO: pixel address: 0
[18:57:46.434] <TB3> INFO: pulse height fill bit: 0
[18:57:46.434] <TB3> INFO: buffer corruption: 0
[18:57:46.596] <TB3> INFO: ######################################################################
[18:57:46.596] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:57:46.596] <TB3> INFO: ######################################################################
[18:57:46.612] <TB3> INFO: scanning low vcal = 10
[18:57:46.850] <TB3> INFO: Expecting 41600 events.
[18:57:50.419] <TB3> INFO: 41600 events read in total (2977ms).
[18:57:50.420] <TB3> INFO: Test took 3807ms.
[18:57:50.422] <TB3> INFO: scanning low vcal = 20
[18:57:50.719] <TB3> INFO: Expecting 41600 events.
[18:57:54.281] <TB3> INFO: 41600 events read in total (2970ms).
[18:57:54.281] <TB3> INFO: Test took 3859ms.
[18:57:54.283] <TB3> INFO: scanning low vcal = 30
[18:57:54.579] <TB3> INFO: Expecting 41600 events.
[18:57:58.230] <TB3> INFO: 41600 events read in total (3060ms).
[18:57:58.231] <TB3> INFO: Test took 3948ms.
[18:57:58.234] <TB3> INFO: scanning low vcal = 40
[18:57:58.512] <TB3> INFO: Expecting 41600 events.
[18:58:02.475] <TB3> INFO: 41600 events read in total (3371ms).
[18:58:02.476] <TB3> INFO: Test took 4242ms.
[18:58:02.479] <TB3> INFO: scanning low vcal = 50
[18:58:02.756] <TB3> INFO: Expecting 41600 events.
[18:58:06.742] <TB3> INFO: 41600 events read in total (3394ms).
[18:58:06.743] <TB3> INFO: Test took 4263ms.
[18:58:06.746] <TB3> INFO: scanning low vcal = 60
[18:58:07.023] <TB3> INFO: Expecting 41600 events.
[18:58:11.012] <TB3> INFO: 41600 events read in total (3398ms).
[18:58:11.012] <TB3> INFO: Test took 4266ms.
[18:58:11.016] <TB3> INFO: scanning low vcal = 70
[18:58:11.292] <TB3> INFO: Expecting 41600 events.
[18:58:15.257] <TB3> INFO: 41600 events read in total (3374ms).
[18:58:15.258] <TB3> INFO: Test took 4242ms.
[18:58:15.261] <TB3> INFO: scanning low vcal = 80
[18:58:15.538] <TB3> INFO: Expecting 41600 events.
[18:58:19.559] <TB3> INFO: 41600 events read in total (3430ms).
[18:58:19.560] <TB3> INFO: Test took 4298ms.
[18:58:19.563] <TB3> INFO: scanning low vcal = 90
[18:58:19.864] <TB3> INFO: Expecting 41600 events.
[18:58:23.877] <TB3> INFO: 41600 events read in total (3422ms).
[18:58:23.877] <TB3> INFO: Test took 4314ms.
[18:58:23.881] <TB3> INFO: scanning low vcal = 100
[18:58:24.157] <TB3> INFO: Expecting 41600 events.
[18:58:28.176] <TB3> INFO: 41600 events read in total (3428ms).
[18:58:28.177] <TB3> INFO: Test took 4296ms.
[18:58:28.180] <TB3> INFO: scanning low vcal = 110
[18:58:28.457] <TB3> INFO: Expecting 41600 events.
[18:58:32.458] <TB3> INFO: 41600 events read in total (3410ms).
[18:58:32.459] <TB3> INFO: Test took 4279ms.
[18:58:32.461] <TB3> INFO: scanning low vcal = 120
[18:58:32.738] <TB3> INFO: Expecting 41600 events.
[18:58:36.807] <TB3> INFO: 41600 events read in total (3477ms).
[18:58:36.808] <TB3> INFO: Test took 4347ms.
[18:58:36.811] <TB3> INFO: scanning low vcal = 130
[18:58:37.088] <TB3> INFO: Expecting 41600 events.
[18:58:41.135] <TB3> INFO: 41600 events read in total (3456ms).
[18:58:41.136] <TB3> INFO: Test took 4325ms.
[18:58:41.139] <TB3> INFO: scanning low vcal = 140
[18:58:41.416] <TB3> INFO: Expecting 41600 events.
[18:58:45.458] <TB3> INFO: 41600 events read in total (3452ms).
[18:58:45.459] <TB3> INFO: Test took 4320ms.
[18:58:45.462] <TB3> INFO: scanning low vcal = 150
[18:58:45.739] <TB3> INFO: Expecting 41600 events.
[18:58:49.773] <TB3> INFO: 41600 events read in total (3443ms).
[18:58:49.773] <TB3> INFO: Test took 4311ms.
[18:58:49.776] <TB3> INFO: scanning low vcal = 160
[18:58:50.078] <TB3> INFO: Expecting 41600 events.
[18:58:54.101] <TB3> INFO: 41600 events read in total (3431ms).
[18:58:54.102] <TB3> INFO: Test took 4326ms.
[18:58:54.105] <TB3> INFO: scanning low vcal = 170
[18:58:54.397] <TB3> INFO: Expecting 41600 events.
[18:58:58.452] <TB3> INFO: 41600 events read in total (3463ms).
[18:58:58.453] <TB3> INFO: Test took 4348ms.
[18:58:58.459] <TB3> INFO: scanning low vcal = 180
[18:58:58.733] <TB3> INFO: Expecting 41600 events.
[18:59:02.757] <TB3> INFO: 41600 events read in total (3433ms).
[18:59:02.758] <TB3> INFO: Test took 4299ms.
[18:59:02.761] <TB3> INFO: scanning low vcal = 190
[18:59:03.038] <TB3> INFO: Expecting 41600 events.
[18:59:07.006] <TB3> INFO: 41600 events read in total (3376ms).
[18:59:07.007] <TB3> INFO: Test took 4245ms.
[18:59:07.010] <TB3> INFO: scanning low vcal = 200
[18:59:07.286] <TB3> INFO: Expecting 41600 events.
[18:59:11.252] <TB3> INFO: 41600 events read in total (3374ms).
[18:59:11.252] <TB3> INFO: Test took 4242ms.
[18:59:11.255] <TB3> INFO: scanning low vcal = 210
[18:59:11.532] <TB3> INFO: Expecting 41600 events.
[18:59:15.544] <TB3> INFO: 41600 events read in total (3421ms).
[18:59:15.545] <TB3> INFO: Test took 4290ms.
[18:59:15.549] <TB3> INFO: scanning low vcal = 220
[18:59:15.824] <TB3> INFO: Expecting 41600 events.
[18:59:19.894] <TB3> INFO: 41600 events read in total (3478ms).
[18:59:19.895] <TB3> INFO: Test took 4346ms.
[18:59:19.899] <TB3> INFO: scanning low vcal = 230
[18:59:20.187] <TB3> INFO: Expecting 41600 events.
[18:59:24.178] <TB3> INFO: 41600 events read in total (3400ms).
[18:59:24.179] <TB3> INFO: Test took 4280ms.
[18:59:24.182] <TB3> INFO: scanning low vcal = 240
[18:59:24.459] <TB3> INFO: Expecting 41600 events.
[18:59:28.533] <TB3> INFO: 41600 events read in total (3482ms).
[18:59:28.534] <TB3> INFO: Test took 4351ms.
[18:59:28.537] <TB3> INFO: scanning low vcal = 250
[18:59:28.828] <TB3> INFO: Expecting 41600 events.
[18:59:32.899] <TB3> INFO: 41600 events read in total (3479ms).
[18:59:32.900] <TB3> INFO: Test took 4363ms.
[18:59:32.905] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[18:59:33.180] <TB3> INFO: Expecting 41600 events.
[18:59:37.281] <TB3> INFO: 41600 events read in total (3510ms).
[18:59:37.282] <TB3> INFO: Test took 4377ms.
[18:59:37.285] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[18:59:37.601] <TB3> INFO: Expecting 41600 events.
[18:59:41.721] <TB3> INFO: 41600 events read in total (3528ms).
[18:59:41.722] <TB3> INFO: Test took 4437ms.
[18:59:41.726] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[18:59:42.040] <TB3> INFO: Expecting 41600 events.
[18:59:46.090] <TB3> INFO: 41600 events read in total (3459ms).
[18:59:46.091] <TB3> INFO: Test took 4365ms.
[18:59:46.095] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[18:59:46.371] <TB3> INFO: Expecting 41600 events.
[18:59:50.325] <TB3> INFO: 41600 events read in total (3362ms).
[18:59:50.325] <TB3> INFO: Test took 4230ms.
[18:59:50.328] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:59:50.605] <TB3> INFO: Expecting 41600 events.
[18:59:54.559] <TB3> INFO: 41600 events read in total (3362ms).
[18:59:54.560] <TB3> INFO: Test took 4231ms.
[18:59:54.972] <TB3> INFO: PixTestGainPedestal::measure() done
[19:00:28.750] <TB3> INFO: PixTestGainPedestal::fit() done
[19:00:28.750] <TB3> INFO: non-linearity mean: 0.982 0.978 0.978 1.000 0.946 0.947 0.954 0.984 0.933 0.983 0.927 0.946 0.979 0.975 0.948 0.954
[19:00:28.750] <TB3> INFO: non-linearity RMS: 0.003 0.004 0.205 0.162 0.052 0.063 0.055 0.004 0.114 0.004 0.107 0.170 0.004 0.005 0.094 0.056
[19:00:28.750] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[19:00:28.764] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[19:00:28.777] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[19:00:28.790] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[19:00:28.804] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[19:00:28.818] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[19:00:28.831] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[19:00:28.844] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[19:00:28.858] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[19:00:28.871] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[19:00:28.884] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[19:00:28.898] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[19:00:28.911] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[19:00:28.924] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[19:00:28.937] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[19:00:28.951] <TB3> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1076_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[19:00:28.964] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 162 seconds
[19:00:28.964] <TB3> INFO: Decoding statistics:
[19:00:28.964] <TB3> INFO: General information:
[19:00:28.964] <TB3> INFO: 16bit words read: 3290308
[19:00:28.964] <TB3> INFO: valid events total: 332800
[19:00:28.964] <TB3> INFO: empty events: 1775
[19:00:28.964] <TB3> INFO: valid events with pixels: 331025
[19:00:28.964] <TB3> INFO: valid pixel hits: 646754
[19:00:28.964] <TB3> INFO: Event errors: 0
[19:00:28.964] <TB3> INFO: start marker: 0
[19:00:28.964] <TB3> INFO: stop marker: 0
[19:00:28.964] <TB3> INFO: overflow: 0
[19:00:28.964] <TB3> INFO: invalid 5bit words: 0
[19:00:28.964] <TB3> INFO: invalid XOR eye diagram: 0
[19:00:28.964] <TB3> INFO: frame (failed synchr.): 0
[19:00:28.964] <TB3> INFO: idle data (no TBM trl): 0
[19:00:28.964] <TB3> INFO: no data (only TBM hdr): 0
[19:00:28.964] <TB3> INFO: TBM errors: 0
[19:00:28.964] <TB3> INFO: flawed TBM headers: 0
[19:00:28.964] <TB3> INFO: flawed TBM trailers: 0
[19:00:28.964] <TB3> INFO: event ID mismatches: 0
[19:00:28.964] <TB3> INFO: ROC errors: 0
[19:00:28.964] <TB3> INFO: missing ROC header(s): 0
[19:00:28.964] <TB3> INFO: misplaced readback start: 0
[19:00:28.964] <TB3> INFO: Pixel decoding errors: 0
[19:00:28.964] <TB3> INFO: pixel data incomplete: 0
[19:00:28.964] <TB3> INFO: pixel address: 0
[19:00:28.964] <TB3> INFO: pulse height fill bit: 0
[19:00:28.964] <TB3> INFO: buffer corruption: 0
[19:00:28.980] <TB3> INFO: Decoding statistics:
[19:00:28.980] <TB3> INFO: General information:
[19:00:28.980] <TB3> INFO: 16bit words read: 3419722
[19:00:28.980] <TB3> INFO: valid events total: 353536
[19:00:28.980] <TB3> INFO: empty events: 20012
[19:00:28.980] <TB3> INFO: valid events with pixels: 333524
[19:00:28.980] <TB3> INFO: valid pixel hits: 649253
[19:00:28.980] <TB3> INFO: Event errors: 0
[19:00:28.980] <TB3> INFO: start marker: 0
[19:00:28.980] <TB3> INFO: stop marker: 0
[19:00:28.980] <TB3> INFO: overflow: 0
[19:00:28.980] <TB3> INFO: invalid 5bit words: 0
[19:00:28.980] <TB3> INFO: invalid XOR eye diagram: 0
[19:00:28.980] <TB3> INFO: frame (failed synchr.): 0
[19:00:28.980] <TB3> INFO: idle data (no TBM trl): 0
[19:00:28.980] <TB3> INFO: no data (only TBM hdr): 0
[19:00:28.980] <TB3> INFO: TBM errors: 0
[19:00:28.980] <TB3> INFO: flawed TBM headers: 0
[19:00:28.980] <TB3> INFO: flawed TBM trailers: 0
[19:00:28.980] <TB3> INFO: event ID mismatches: 0
[19:00:28.980] <TB3> INFO: ROC errors: 0
[19:00:28.980] <TB3> INFO: missing ROC header(s): 0
[19:00:28.980] <TB3> INFO: misplaced readback start: 0
[19:00:28.980] <TB3> INFO: Pixel decoding errors: 0
[19:00:28.980] <TB3> INFO: pixel data incomplete: 0
[19:00:28.980] <TB3> INFO: pixel address: 0
[19:00:28.980] <TB3> INFO: pulse height fill bit: 0
[19:00:28.980] <TB3> INFO: buffer corruption: 0
[19:00:28.980] <TB3> INFO: enter test to run
[19:00:28.981] <TB3> INFO: test: exit no parameter change
[19:00:29.114] <TB3> QUIET: Connection to board 126 closed.
[19:00:29.115] <TB3> INFO: pXar: this is the end, my friend