[15:58:53.257] <TB2> INFO: *** Welcome to pxar ***
[15:58:53.257] <TB2> INFO: *** Today: 2016/10/25
[15:58:53.263] <TB2> INFO: *** Version: c8ba-dirty
[15:58:53.263] <TB2> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[15:58:53.263] <TB2> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[15:58:53.263] <TB2> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//defaultMaskFile.dat
[15:58:53.263] <TB2> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C15.dat
[15:58:53.324] <TB2> INFO: clk: 4
[15:58:53.324] <TB2> INFO: ctr: 4
[15:58:53.324] <TB2> INFO: sda: 19
[15:58:53.324] <TB2> INFO: tin: 9
[15:58:53.325] <TB2> INFO: level: 15
[15:58:53.325] <TB2> INFO: triggerdelay: 0
[15:58:53.325] <TB2> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[15:58:53.325] <TB2> INFO: Log level: INFO
[15:58:53.333] <TB2> INFO: Found DTB DTB_WWXUD2
[15:58:53.340] <TB2> QUIET: Connection to board DTB_WWXUD2 opened.
[15:58:53.342] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 149
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WWXUD2
MAC address: 40D855118095
Hostname: pixelDTB149
Comment:
------------------------------------------------------
[15:58:53.344] <TB2> INFO: RPC call hashes of host and DTB match: 486171790
[15:58:54.893] <TB2> INFO: DUT info:
[15:58:54.893] <TB2> INFO: The DUT currently contains the following objects:
[15:58:54.893] <TB2> INFO: 4 TBM Cores tbm10c (4 ON)
[15:58:54.893] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:58:54.893] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:58:54.893] <TB2> INFO: TBM Core alpha (2): 7 registers set
[15:58:54.893] <TB2> INFO: TBM Core beta (3): 7 registers set
[15:58:54.893] <TB2> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:58:54.893] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:54.893] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:55.294] <TB2> INFO: enter 'restricted' command line mode
[15:58:55.294] <TB2> INFO: enter test to run
[15:58:55.294] <TB2> INFO: test: pretest no parameter change
[15:58:55.294] <TB2> INFO: running: pretest
[15:58:55.301] <TB2> INFO: ######################################################################
[15:58:55.301] <TB2> INFO: PixTestPretest::doTest()
[15:58:55.301] <TB2> INFO: ######################################################################
[15:58:55.303] <TB2> INFO: ----------------------------------------------------------------------
[15:58:55.303] <TB2> INFO: PixTestPretest::programROC()
[15:58:55.303] <TB2> INFO: ----------------------------------------------------------------------
[15:59:13.317] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:59:13.317] <TB2> INFO: IA differences per ROC: 18.5 20.1 20.1 20.9 18.5 20.1 22.5 17.7 21.7 22.5 20.9 20.9 17.7 20.9 20.9 20.1
[15:59:13.384] <TB2> INFO: ----------------------------------------------------------------------
[15:59:13.384] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:59:13.384] <TB2> INFO: ----------------------------------------------------------------------
[15:59:20.087] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[15:59:20.087] <TB2> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 19.3 20.1 20.1 20.1 20.1 20.1 19.3 19.3 19.3 19.3 20.1 19.3
[15:59:20.122] <TB2> INFO: ----------------------------------------------------------------------
[15:59:20.122] <TB2> INFO: PixTestPretest::findTiming()
[15:59:20.122] <TB2> INFO: ----------------------------------------------------------------------
[15:59:20.122] <TB2> INFO: PixTestCmd::init()

[15:59:52.436] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:59:52.436] <TB2> INFO: (success/tries = 100/100), width = 3
[15:59:53.917] <TB2> INFO: ----------------------------------------------------------------------
[15:59:53.917] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:59:53.917] <TB2> INFO: ----------------------------------------------------------------------
[15:59:54.013] <TB2> INFO: Expecting 231680 events.
[16:00:04.087] <TB2> INFO: 231680 events read in total (9482ms).
[16:00:04.096] <TB2> INFO: Test took 10173ms.
[16:00:04.344] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:00:04.381] <TB2> INFO: ----------------------------------------------------------------------
[16:00:04.381] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[16:00:04.381] <TB2> INFO: ----------------------------------------------------------------------
[16:00:04.477] <TB2> INFO: Expecting 231680 events.
[16:00:14.417] <TB2> INFO: 231680 events read in total (9348ms).
[16:00:14.426] <TB2> INFO: Test took 10038ms.
[16:00:14.693] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[16:00:14.693] <TB2> INFO: CalDel: 108 108 111 108 109 104 110 102 111 113 113 108 104 98 102 101
[16:00:14.693] <TB2> INFO: VthrComp: 51 51 51 51 51 51 57 51 52 51 51 51 51 51 51 51
[16:00:14.700] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat
[16:00:14.700] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C1.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C2.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C3.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C4.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C5.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C6.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C7.dat
[16:00:14.701] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C8.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C9.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C10.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C11.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C12.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C13.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C14.dat
[16:00:14.702] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[16:00:14.702] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat
[16:00:14.703] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0b.dat
[16:00:14.703] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1a.dat
[16:00:14.703] <TB2> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[16:00:14.703] <TB2> INFO: PixTestPretest::doTest() done, duration: 79 seconds
[16:00:14.757] <TB2> INFO: enter test to run
[16:00:14.757] <TB2> INFO: test: FullTest no parameter change
[16:00:14.757] <TB2> INFO: running: fulltest
[16:00:14.757] <TB2> INFO: ######################################################################
[16:00:14.757] <TB2> INFO: PixTestFullTest::doTest()
[16:00:14.757] <TB2> INFO: ######################################################################
[16:00:14.758] <TB2> INFO: ######################################################################
[16:00:14.758] <TB2> INFO: PixTestAlive::doTest()
[16:00:14.758] <TB2> INFO: ######################################################################
[16:00:14.759] <TB2> INFO: ----------------------------------------------------------------------
[16:00:14.759] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:14.759] <TB2> INFO: ----------------------------------------------------------------------
[16:00:14.001] <TB2> INFO: Expecting 41600 events.
[16:00:18.591] <TB2> INFO: 41600 events read in total (2998ms).
[16:00:18.591] <TB2> INFO: Test took 3830ms.
[16:00:18.818] <TB2> INFO: PixTestAlive::aliveTest() done
[16:00:18.818] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:18.819] <TB2> INFO: ----------------------------------------------------------------------
[16:00:18.819] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:18.819] <TB2> INFO: ----------------------------------------------------------------------
[16:00:19.060] <TB2> INFO: Expecting 41600 events.
[16:00:22.029] <TB2> INFO: 41600 events read in total (2378ms).
[16:00:22.029] <TB2> INFO: Test took 3209ms.
[16:00:22.030] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:00:22.277] <TB2> INFO: PixTestAlive::maskTest() done
[16:00:22.277] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:22.279] <TB2> INFO: ----------------------------------------------------------------------
[16:00:22.279] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:22.279] <TB2> INFO: ----------------------------------------------------------------------
[16:00:22.520] <TB2> INFO: Expecting 41600 events.
[16:00:25.998] <TB2> INFO: 41600 events read in total (2886ms).
[16:00:25.999] <TB2> INFO: Test took 3718ms.
[16:00:26.231] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[16:00:26.232] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:26.232] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:00:26.232] <TB2> INFO: Decoding statistics:
[16:00:26.232] <TB2> INFO: General information:
[16:00:26.232] <TB2> INFO: 16bit words read: 0
[16:00:26.232] <TB2> INFO: valid events total: 0
[16:00:26.232] <TB2> INFO: empty events: 0
[16:00:26.232] <TB2> INFO: valid events with pixels: 0
[16:00:26.232] <TB2> INFO: valid pixel hits: 0
[16:00:26.232] <TB2> INFO: Event errors: 0
[16:00:26.232] <TB2> INFO: start marker: 0
[16:00:26.232] <TB2> INFO: stop marker: 0
[16:00:26.232] <TB2> INFO: overflow: 0
[16:00:26.232] <TB2> INFO: invalid 5bit words: 0
[16:00:26.232] <TB2> INFO: invalid XOR eye diagram: 0
[16:00:26.232] <TB2> INFO: frame (failed synchr.): 0
[16:00:26.232] <TB2> INFO: idle data (no TBM trl): 0
[16:00:26.232] <TB2> INFO: no data (only TBM hdr): 0
[16:00:26.232] <TB2> INFO: TBM errors: 0
[16:00:26.232] <TB2> INFO: flawed TBM headers: 0
[16:00:26.232] <TB2> INFO: flawed TBM trailers: 0
[16:00:26.232] <TB2> INFO: event ID mismatches: 0
[16:00:26.232] <TB2> INFO: ROC errors: 0
[16:00:26.232] <TB2> INFO: missing ROC header(s): 0
[16:00:26.232] <TB2> INFO: misplaced readback start: 0
[16:00:26.232] <TB2> INFO: Pixel decoding errors: 0
[16:00:26.232] <TB2> INFO: pixel data incomplete: 0
[16:00:26.232] <TB2> INFO: pixel address: 0
[16:00:26.232] <TB2> INFO: pulse height fill bit: 0
[16:00:26.232] <TB2> INFO: buffer corruption: 0
[16:00:26.237] <TB2> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:26.238] <TB2> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:00:26.238] <TB2> INFO: ######################################################################
[16:00:26.238] <TB2> INFO: PixTestReadback::doTest()
[16:00:26.238] <TB2> INFO: ######################################################################
[16:00:26.238] <TB2> INFO: ----------------------------------------------------------------------
[16:00:26.238] <TB2> INFO: PixTestReadback::CalibrateVd()
[16:00:26.238] <TB2> INFO: ----------------------------------------------------------------------
[16:00:36.217] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:36.217] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:36.217] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:36.218] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:36.219] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:36.219] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:36.219] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:36.219] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:36.252] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:00:36.252] <TB2> INFO: ----------------------------------------------------------------------
[16:00:36.252] <TB2> INFO: PixTestReadback::CalibrateVa()
[16:00:36.252] <TB2> INFO: ----------------------------------------------------------------------
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:46.186] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:46.187] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:46.219] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:00:46.219] <TB2> INFO: ----------------------------------------------------------------------
[16:00:46.219] <TB2> INFO: PixTestReadback::readbackVbg()
[16:00:46.219] <TB2> INFO: ----------------------------------------------------------------------
[16:00:53.887] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:00:53.887] <TB2> INFO: ----------------------------------------------------------------------
[16:00:53.887] <TB2> INFO: PixTestReadback::getCalibratedVbg()
[16:00:53.887] <TB2> INFO: ----------------------------------------------------------------------
[16:00:53.887] <TB2> INFO: Vbg will be calibrated using Vd calibration
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 156calibrated Vbg = 1.18041 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.7calibrated Vbg = 1.17859 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 149.8calibrated Vbg = 1.17703 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 144.4calibrated Vbg = 1.17458 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 157.7calibrated Vbg = 1.18021 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.3calibrated Vbg = 1.17918 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 165.5calibrated Vbg = 1.17682 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.4calibrated Vbg = 1.18246 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 158.9calibrated Vbg = 1.17195 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 159.1calibrated Vbg = 1.17814 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 159calibrated Vbg = 1.16539 :::*/*/*/*/
[16:00:53.887] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 156.8calibrated Vbg = 1.16681 :::*/*/*/*/
[16:00:53.888] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 158.9calibrated Vbg = 1.17268 :::*/*/*/*/
[16:00:53.888] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 161.1calibrated Vbg = 1.17401 :::*/*/*/*/
[16:00:53.888] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 154.8calibrated Vbg = 1.17591 :::*/*/*/*/
[16:00:53.888] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.1calibrated Vbg = 1.17148 :::*/*/*/*/
[16:00:53.891] <TB2> INFO: ----------------------------------------------------------------------
[16:00:53.892] <TB2> INFO: PixTestReadback::CalibrateIa()
[16:00:53.892] <TB2> INFO: ----------------------------------------------------------------------
[16:03:34.716] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:03:34.716] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:03:34.716] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:03:34.716] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:03:34.716] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:03:34.717] <TB2> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:03:34.745] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[16:03:34.746] <TB2> INFO: PixTestReadback::doTest() done
[16:03:34.746] <TB2> INFO: Decoding statistics:
[16:03:34.746] <TB2> INFO: General information:
[16:03:34.746] <TB2> INFO: 16bit words read: 1536
[16:03:34.746] <TB2> INFO: valid events total: 256
[16:03:34.746] <TB2> INFO: empty events: 256
[16:03:34.746] <TB2> INFO: valid events with pixels: 0
[16:03:34.746] <TB2> INFO: valid pixel hits: 0
[16:03:34.746] <TB2> INFO: Event errors: 0
[16:03:34.746] <TB2> INFO: start marker: 0
[16:03:34.746] <TB2> INFO: stop marker: 0
[16:03:34.746] <TB2> INFO: overflow: 0
[16:03:34.746] <TB2> INFO: invalid 5bit words: 0
[16:03:34.746] <TB2> INFO: invalid XOR eye diagram: 0
[16:03:34.746] <TB2> INFO: frame (failed synchr.): 0
[16:03:34.746] <TB2> INFO: idle data (no TBM trl): 0
[16:03:34.746] <TB2> INFO: no data (only TBM hdr): 0
[16:03:34.746] <TB2> INFO: TBM errors: 0
[16:03:34.746] <TB2> INFO: flawed TBM headers: 0
[16:03:34.746] <TB2> INFO: flawed TBM trailers: 0
[16:03:34.746] <TB2> INFO: event ID mismatches: 0
[16:03:34.746] <TB2> INFO: ROC errors: 0
[16:03:34.746] <TB2> INFO: missing ROC header(s): 0
[16:03:34.746] <TB2> INFO: misplaced readback start: 0
[16:03:34.746] <TB2> INFO: Pixel decoding errors: 0
[16:03:34.746] <TB2> INFO: pixel data incomplete: 0
[16:03:34.746] <TB2> INFO: pixel address: 0
[16:03:34.746] <TB2> INFO: pulse height fill bit: 0
[16:03:34.746] <TB2> INFO: buffer corruption: 0
[16:03:34.798] <TB2> INFO: ######################################################################
[16:03:34.798] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:03:34.798] <TB2> INFO: ######################################################################
[16:03:34.801] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:03:34.857] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:03:34.857] <TB2> INFO: run 1 of 1
[16:03:35.094] <TB2> INFO: Expecting 3120000 events.
[16:04:05.889] <TB2> INFO: 667410 events read in total (30203ms).











[16:04:36.051] <TB2> INFO: 1331265 events read in total (60365ms).











[16:05:05.969] <TB2> INFO: 1993075 events read in total (90284ms).











[16:05:36.220] <TB2> INFO: 2657150 events read in total (120534ms).





















[16:05:57.268] <TB2> INFO: 3120000 events read in total (141582ms).
[16:05:57.348] <TB2> INFO: Test took 142492ms.
[16:06:23.908] <TB2> INFO: PixTestBBMap::doTest() done with 2 decoding errors: , duration: 169 seconds
[16:06:23.908] <TB2> INFO: number of dead bumps (per ROC): 1 0 1 0 0 1 0 5 0 2 0 1 0 1 2 3
[16:06:23.908] <TB2> INFO: separation cut (per ROC): 102 105 102 108 104 107 123 106 117 102 104 103 101 108 107 106
[16:06:23.908] <TB2> INFO: Decoding statistics:
[16:06:23.908] <TB2> INFO: General information:
[16:06:23.908] <TB2> INFO: 16bit words read: 0
[16:06:23.908] <TB2> INFO: valid events total: 0
[16:06:23.908] <TB2> INFO: empty events: 0
[16:06:23.908] <TB2> INFO: valid events with pixels: 0
[16:06:23.908] <TB2> INFO: valid pixel hits: 0
[16:06:23.908] <TB2> INFO: Event errors: 0
[16:06:23.908] <TB2> INFO: start marker: 0
[16:06:23.908] <TB2> INFO: stop marker: 0
[16:06:23.908] <TB2> INFO: overflow: 0
[16:06:23.908] <TB2> INFO: invalid 5bit words: 0
[16:06:23.908] <TB2> INFO: invalid XOR eye diagram: 0
[16:06:23.908] <TB2> INFO: frame (failed synchr.): 0
[16:06:23.908] <TB2> INFO: idle data (no TBM trl): 0
[16:06:23.908] <TB2> INFO: no data (only TBM hdr): 0
[16:06:23.908] <TB2> INFO: TBM errors: 0
[16:06:23.908] <TB2> INFO: flawed TBM headers: 0
[16:06:23.908] <TB2> INFO: flawed TBM trailers: 0
[16:06:23.908] <TB2> INFO: event ID mismatches: 0
[16:06:23.908] <TB2> INFO: ROC errors: 0
[16:06:23.908] <TB2> INFO: missing ROC header(s): 0
[16:06:23.908] <TB2> INFO: misplaced readback start: 0
[16:06:23.908] <TB2> INFO: Pixel decoding errors: 0
[16:06:23.908] <TB2> INFO: pixel data incomplete: 0
[16:06:23.908] <TB2> INFO: pixel address: 0
[16:06:23.908] <TB2> INFO: pulse height fill bit: 0
[16:06:23.908] <TB2> INFO: buffer corruption: 0
[16:06:23.948] <TB2> INFO: ######################################################################
[16:06:23.948] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:23.948] <TB2> INFO: ######################################################################
[16:06:23.948] <TB2> INFO: ----------------------------------------------------------------------
[16:06:23.948] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:23.948] <TB2> INFO: ----------------------------------------------------------------------
[16:06:23.948] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:06:23.964] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[16:06:23.964] <TB2> INFO: run 1 of 1
[16:06:24.206] <TB2> INFO: Expecting 36608000 events.
[16:06:47.139] <TB2> INFO: 666000 events read in total (22341ms).
[16:07:09.759] <TB2> INFO: 1320700 events read in total (44961ms).
[16:07:32.261] <TB2> INFO: 1974600 events read in total (67463ms).
[16:07:54.738] <TB2> INFO: 2627700 events read in total (89940ms).
[16:08:17.194] <TB2> INFO: 3280450 events read in total (112396ms).
[16:08:39.699] <TB2> INFO: 3935800 events read in total (134901ms).
[16:09:02.661] <TB2> INFO: 4591650 events read in total (157863ms).
[16:09:25.240] <TB2> INFO: 5245850 events read in total (180442ms).
[16:09:47.876] <TB2> INFO: 5900850 events read in total (203078ms).
[16:10:10.459] <TB2> INFO: 6553250 events read in total (225661ms).
[16:10:32.862] <TB2> INFO: 7205100 events read in total (248064ms).
[16:10:55.432] <TB2> INFO: 7856300 events read in total (270634ms).
[16:11:17.755] <TB2> INFO: 8507800 events read in total (292957ms).
[16:11:40.480] <TB2> INFO: 9160350 events read in total (315682ms).
[16:12:03.083] <TB2> INFO: 9810700 events read in total (338285ms).
[16:12:25.580] <TB2> INFO: 10461800 events read in total (360782ms).
[16:12:47.976] <TB2> INFO: 11112450 events read in total (383178ms).
[16:13:10.212] <TB2> INFO: 11762150 events read in total (405414ms).
[16:13:32.455] <TB2> INFO: 12411700 events read in total (427657ms).
[16:13:54.620] <TB2> INFO: 13059400 events read in total (449822ms).
[16:14:17.072] <TB2> INFO: 13709100 events read in total (472274ms).
[16:14:39.510] <TB2> INFO: 14359250 events read in total (494712ms).
[16:15:02.012] <TB2> INFO: 15009650 events read in total (517214ms).
[16:15:24.398] <TB2> INFO: 15659100 events read in total (539600ms).
[16:15:46.857] <TB2> INFO: 16308750 events read in total (562059ms).
[16:16:09.241] <TB2> INFO: 16959500 events read in total (584443ms).
[16:16:31.852] <TB2> INFO: 17610000 events read in total (607054ms).
[16:16:54.319] <TB2> INFO: 18257950 events read in total (629521ms).
[16:17:16.752] <TB2> INFO: 18906350 events read in total (651954ms).
[16:17:39.154] <TB2> INFO: 19552500 events read in total (674356ms).
[16:18:01.536] <TB2> INFO: 20198150 events read in total (696738ms).
[16:18:24.044] <TB2> INFO: 20844150 events read in total (719246ms).
[16:18:46.369] <TB2> INFO: 21488500 events read in total (741571ms).
[16:19:08.936] <TB2> INFO: 22134900 events read in total (764138ms).
[16:19:31.614] <TB2> INFO: 22780000 events read in total (786816ms).
[16:19:53.804] <TB2> INFO: 23425600 events read in total (809006ms).
[16:20:16.405] <TB2> INFO: 24072350 events read in total (831607ms).
[16:20:38.873] <TB2> INFO: 24716800 events read in total (854075ms).
[16:21:01.283] <TB2> INFO: 25361200 events read in total (876485ms).
[16:21:23.645] <TB2> INFO: 26005550 events read in total (898847ms).
[16:21:45.992] <TB2> INFO: 26649850 events read in total (921194ms).
[16:22:08.461] <TB2> INFO: 27294100 events read in total (943663ms).
[16:22:30.854] <TB2> INFO: 27937750 events read in total (966056ms).
[16:22:53.124] <TB2> INFO: 28581000 events read in total (988326ms).
[16:23:15.384] <TB2> INFO: 29224750 events read in total (1010586ms).
[16:23:37.958] <TB2> INFO: 29869050 events read in total (1033160ms).
[16:24:00.339] <TB2> INFO: 30511300 events read in total (1055541ms).
[16:24:22.876] <TB2> INFO: 31156450 events read in total (1078078ms).
[16:24:45.290] <TB2> INFO: 31801800 events read in total (1100492ms).
[16:25:08.069] <TB2> INFO: 32448850 events read in total (1123271ms).
[16:25:30.284] <TB2> INFO: 33093600 events read in total (1145486ms).
[16:25:53.071] <TB2> INFO: 33737600 events read in total (1168273ms).
[16:26:15.639] <TB2> INFO: 34383050 events read in total (1190841ms).
[16:26:38.193] <TB2> INFO: 35030150 events read in total (1213396ms).
[16:27:00.765] <TB2> INFO: 35679000 events read in total (1235967ms).
[16:27:23.072] <TB2> INFO: 36333050 events read in total (1258274ms).
[16:27:32.597] <TB2> INFO: 36608000 events read in total (1267799ms).
[16:27:32.676] <TB2> INFO: Test took 1268712ms.
[16:27:33.235] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:35.255] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:37.061] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:39.097] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:41.091] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:43.241] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:44.996] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:46.875] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:48.900] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:51.023] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:53.071] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:55.068] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:56.815] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:27:59.049] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:28:01.183] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:28:03.368] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:28:05.310] <TB2> INFO: PixTestScurves::scurves() done
[16:28:05.310] <TB2> INFO: Vcal mean: 112.09 113.65 108.59 98.94 112.15 117.08 131.39 114.65 124.42 110.44 111.13 106.18 106.51 121.94 114.21 117.51
[16:28:05.310] <TB2> INFO: Vcal RMS: 5.42 5.35 4.86 5.89 5.47 5.41 6.52 5.88 6.73 5.37 5.78 5.13 4.96 6.52 5.89 5.44
[16:28:05.310] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1301 seconds
[16:28:05.310] <TB2> INFO: Decoding statistics:
[16:28:05.310] <TB2> INFO: General information:
[16:28:05.310] <TB2> INFO: 16bit words read: 0
[16:28:05.310] <TB2> INFO: valid events total: 0
[16:28:05.310] <TB2> INFO: empty events: 0
[16:28:05.310] <TB2> INFO: valid events with pixels: 0
[16:28:05.310] <TB2> INFO: valid pixel hits: 0
[16:28:05.310] <TB2> INFO: Event errors: 0
[16:28:05.310] <TB2> INFO: start marker: 0
[16:28:05.310] <TB2> INFO: stop marker: 0
[16:28:05.310] <TB2> INFO: overflow: 0
[16:28:05.310] <TB2> INFO: invalid 5bit words: 0
[16:28:05.310] <TB2> INFO: invalid XOR eye diagram: 0
[16:28:05.310] <TB2> INFO: frame (failed synchr.): 0
[16:28:05.310] <TB2> INFO: idle data (no TBM trl): 0
[16:28:05.310] <TB2> INFO: no data (only TBM hdr): 0
[16:28:05.310] <TB2> INFO: TBM errors: 0
[16:28:05.310] <TB2> INFO: flawed TBM headers: 0
[16:28:05.310] <TB2> INFO: flawed TBM trailers: 0
[16:28:05.310] <TB2> INFO: event ID mismatches: 0
[16:28:05.310] <TB2> INFO: ROC errors: 0
[16:28:05.310] <TB2> INFO: missing ROC header(s): 0
[16:28:05.310] <TB2> INFO: misplaced readback start: 0
[16:28:05.310] <TB2> INFO: Pixel decoding errors: 0
[16:28:05.310] <TB2> INFO: pixel data incomplete: 0
[16:28:05.310] <TB2> INFO: pixel address: 0
[16:28:05.310] <TB2> INFO: pulse height fill bit: 0
[16:28:05.310] <TB2> INFO: buffer corruption: 0
[16:28:05.376] <TB2> INFO: ######################################################################
[16:28:05.376] <TB2> INFO: PixTestTrim::doTest()
[16:28:05.376] <TB2> INFO: ######################################################################
[16:28:05.378] <TB2> INFO: ----------------------------------------------------------------------
[16:28:05.380] <TB2> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:28:05.380] <TB2> INFO: ----------------------------------------------------------------------
[16:28:05.423] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:28:05.423] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:28:05.437] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:28:05.437] <TB2> INFO: run 1 of 1
[16:28:05.674] <TB2> INFO: Expecting 5025280 events.
[16:28:35.842] <TB2> INFO: 819496 events read in total (29568ms).
[16:29:05.510] <TB2> INFO: 1634512 events read in total (59236ms).
[16:29:35.053] <TB2> INFO: 2447840 events read in total (88779ms).
[16:30:05.041] <TB2> INFO: 3258352 events read in total (118767ms).
[16:30:34.796] <TB2> INFO: 4066280 events read in total (148523ms).
[16:31:04.734] <TB2> INFO: 4873984 events read in total (178460ms).
[16:31:10.759] <TB2> INFO: 5025280 events read in total (184485ms).
[16:31:10.828] <TB2> INFO: Test took 185391ms.
[16:31:30.905] <TB2> INFO: ROC 0 VthrComp = 108
[16:31:30.905] <TB2> INFO: ROC 1 VthrComp = 115
[16:31:30.905] <TB2> INFO: ROC 2 VthrComp = 110
[16:31:30.905] <TB2> INFO: ROC 3 VthrComp = 106
[16:31:30.905] <TB2> INFO: ROC 4 VthrComp = 109
[16:31:30.905] <TB2> INFO: ROC 5 VthrComp = 124
[16:31:30.905] <TB2> INFO: ROC 6 VthrComp = 132
[16:31:30.906] <TB2> INFO: ROC 7 VthrComp = 116
[16:31:30.906] <TB2> INFO: ROC 8 VthrComp = 130
[16:31:30.906] <TB2> INFO: ROC 9 VthrComp = 111
[16:31:30.906] <TB2> INFO: ROC 10 VthrComp = 112
[16:31:30.906] <TB2> INFO: ROC 11 VthrComp = 111
[16:31:30.906] <TB2> INFO: ROC 12 VthrComp = 108
[16:31:30.907] <TB2> INFO: ROC 13 VthrComp = 124
[16:31:30.907] <TB2> INFO: ROC 14 VthrComp = 114
[16:31:30.907] <TB2> INFO: ROC 15 VthrComp = 121
[16:31:31.144] <TB2> INFO: Expecting 41600 events.
[16:31:34.735] <TB2> INFO: 41600 events read in total (2999ms).
[16:31:34.736] <TB2> INFO: Test took 3827ms.
[16:31:34.745] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:31:34.745] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:31:34.758] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:31:34.758] <TB2> INFO: run 1 of 1
[16:31:35.036] <TB2> INFO: Expecting 5025280 events.
[16:32:01.328] <TB2> INFO: 591664 events read in total (25699ms).
[16:32:27.404] <TB2> INFO: 1183128 events read in total (51775ms).
[16:32:53.427] <TB2> INFO: 1774240 events read in total (77798ms).
[16:33:19.300] <TB2> INFO: 2364664 events read in total (103671ms).
[16:33:45.101] <TB2> INFO: 2953480 events read in total (129472ms).
[16:34:10.578] <TB2> INFO: 3541152 events read in total (154949ms).
[16:34:36.088] <TB2> INFO: 4127560 events read in total (180459ms).
[16:35:01.362] <TB2> INFO: 4712816 events read in total (205733ms).
[16:35:15.113] <TB2> INFO: 5025280 events read in total (219484ms).
[16:35:15.197] <TB2> INFO: Test took 220439ms.
[16:35:40.381] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.6757 for pixel 0/5 mean/min/max = 48.8954/33.9568/63.834
[16:35:40.382] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.2377 for pixel 19/77 mean/min/max = 46.2718/31.9168/60.6268
[16:35:40.382] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.6052 for pixel 21/11 mean/min/max = 48.2781/34.808/61.7481
[16:35:40.383] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 62.1731 for pixel 19/79 mean/min/max = 47.8363/33.4588/62.2138
[16:35:40.383] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 63.7652 for pixel 25/8 mean/min/max = 48.4694/33.1133/63.8255
[16:35:40.383] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.0845 for pixel 14/0 mean/min/max = 45.1624/31.0636/59.2611
[16:35:40.384] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 69.1558 for pixel 0/4 mean/min/max = 53.0762/36.4798/69.6726
[16:35:40.384] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 63.6379 for pixel 1/21 mean/min/max = 47.2296/30.7382/63.7209
[16:35:40.385] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.3493 for pixel 45/5 mean/min/max = 46.2867/31.1618/61.4116
[16:35:40.385] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 64.0076 for pixel 13/10 mean/min/max = 48.7026/33.3376/64.0676
[16:35:40.385] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 63.7733 for pixel 0/0 mean/min/max = 47.5122/30.8716/64.1527
[16:35:40.386] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.5895 for pixel 10/11 mean/min/max = 47.4391/33.5964/61.2818
[16:35:40.386] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 61.6393 for pixel 12/12 mean/min/max = 48.1243/34.6028/61.6458
[16:35:40.387] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 61.8466 for pixel 51/3 mean/min/max = 46.6751/31.4162/61.9341
[16:35:40.387] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.8811 for pixel 1/73 mean/min/max = 46.611/31.2602/61.9617
[16:35:40.387] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.4142 for pixel 0/2 mean/min/max = 45.7115/31.4691/59.954
[16:35:40.388] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:35:40.477] <TB2> INFO: Expecting 411648 events.
[16:35:49.793] <TB2> INFO: 411648 events read in total (8725ms).
[16:35:49.801] <TB2> INFO: Expecting 411648 events.
[16:35:58.925] <TB2> INFO: 411648 events read in total (8722ms).
[16:35:58.936] <TB2> INFO: Expecting 411648 events.
[16:36:08.303] <TB2> INFO: 411648 events read in total (8964ms).
[16:36:08.316] <TB2> INFO: Expecting 411648 events.
[16:36:17.694] <TB2> INFO: 411648 events read in total (8975ms).
[16:36:17.710] <TB2> INFO: Expecting 411648 events.
[16:36:27.121] <TB2> INFO: 411648 events read in total (9008ms).
[16:36:27.140] <TB2> INFO: Expecting 411648 events.
[16:36:36.479] <TB2> INFO: 411648 events read in total (8935ms).
[16:36:36.501] <TB2> INFO: Expecting 411648 events.
[16:36:45.877] <TB2> INFO: 411648 events read in total (8973ms).
[16:36:45.906] <TB2> INFO: Expecting 411648 events.
[16:36:55.291] <TB2> INFO: 411648 events read in total (8983ms).
[16:36:55.325] <TB2> INFO: Expecting 411648 events.
[16:37:04.742] <TB2> INFO: 411648 events read in total (9014ms).
[16:37:04.773] <TB2> INFO: Expecting 411648 events.
[16:37:14.208] <TB2> INFO: 411648 events read in total (9032ms).
[16:37:14.241] <TB2> INFO: Expecting 411648 events.
[16:37:23.598] <TB2> INFO: 411648 events read in total (8954ms).
[16:37:23.634] <TB2> INFO: Expecting 411648 events.
[16:37:33.031] <TB2> INFO: 411648 events read in total (8994ms).
[16:37:33.070] <TB2> INFO: Expecting 411648 events.
[16:37:42.509] <TB2> INFO: 411648 events read in total (9036ms).
[16:37:42.579] <TB2> INFO: Expecting 411648 events.
[16:37:51.990] <TB2> INFO: 411648 events read in total (9008ms).
[16:37:52.038] <TB2> INFO: Expecting 411648 events.
[16:38:01.446] <TB2> INFO: 411648 events read in total (9005ms).
[16:38:01.493] <TB2> INFO: Expecting 411648 events.
[16:38:10.977] <TB2> INFO: 411648 events read in total (9081ms).
[16:38:11.040] <TB2> INFO: Test took 150652ms.
[16:38:11.789] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:38:11.803] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:38:11.803] <TB2> INFO: run 1 of 1
[16:38:12.040] <TB2> INFO: Expecting 5025280 events.
[16:38:38.293] <TB2> INFO: 587936 events read in total (25661ms).
[16:39:03.972] <TB2> INFO: 1177368 events read in total (51340ms).
[16:39:30.052] <TB2> INFO: 1765456 events read in total (77421ms).
[16:39:56.088] <TB2> INFO: 2352944 events read in total (103456ms).
[16:40:22.180] <TB2> INFO: 2941848 events read in total (129549ms).
[16:40:48.046] <TB2> INFO: 3528272 events read in total (155414ms).
[16:41:14.288] <TB2> INFO: 4113752 events read in total (181656ms).
[16:41:40.545] <TB2> INFO: 4699456 events read in total (207913ms).
[16:41:55.184] <TB2> INFO: 5025280 events read in total (222552ms).
[16:41:55.301] <TB2> INFO: Test took 223500ms.
[16:42:20.474] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 1.500000 .. 146.968058
[16:42:20.735] <TB2> INFO: Expecting 208000 events.
[16:42:30.194] <TB2> INFO: 208000 events read in total (8867ms).
[16:42:30.194] <TB2> INFO: Test took 9717ms.
[16:42:30.244] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 1 .. 156 (-1/-1) hits flags = 528 (plus default)
[16:42:30.257] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:42:30.258] <TB2> INFO: run 1 of 1
[16:42:30.535] <TB2> INFO: Expecting 5191680 events.
[16:42:56.992] <TB2> INFO: 583928 events read in total (25865ms).
[16:43:22.445] <TB2> INFO: 1167872 events read in total (51319ms).
[16:43:48.210] <TB2> INFO: 1751736 events read in total (77083ms).
[16:44:13.942] <TB2> INFO: 2335552 events read in total (102815ms).
[16:44:39.500] <TB2> INFO: 2919696 events read in total (128373ms).
[16:45:05.199] <TB2> INFO: 3503464 events read in total (154072ms).
[16:45:30.682] <TB2> INFO: 4087040 events read in total (179555ms).
[16:45:56.312] <TB2> INFO: 4669800 events read in total (205185ms).
[16:46:19.301] <TB2> INFO: 5191680 events read in total (228175ms).
[16:46:19.429] <TB2> INFO: Test took 229172ms.
[16:46:45.720] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 28.041918 .. 47.017996
[16:46:45.962] <TB2> INFO: Expecting 208000 events.
[16:46:56.010] <TB2> INFO: 208000 events read in total (9457ms).
[16:46:56.012] <TB2> INFO: Test took 10290ms.
[16:46:56.058] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 18 .. 57 (-1/-1) hits flags = 528 (plus default)
[16:46:56.073] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:46:56.073] <TB2> INFO: run 1 of 1
[16:46:56.355] <TB2> INFO: Expecting 1331200 events.
[16:47:23.997] <TB2> INFO: 646520 events read in total (27050ms).
[16:47:51.987] <TB2> INFO: 1291176 events read in total (55040ms).
[16:47:54.095] <TB2> INFO: 1331200 events read in total (57148ms).
[16:47:54.128] <TB2> INFO: Test took 58055ms.
[16:48:07.117] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 26.781083 .. 46.149435
[16:48:07.354] <TB2> INFO: Expecting 208000 events.
[16:48:17.336] <TB2> INFO: 208000 events read in total (9390ms).
[16:48:17.337] <TB2> INFO: Test took 10219ms.
[16:48:17.385] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[16:48:17.399] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:48:17.399] <TB2> INFO: run 1 of 1
[16:48:17.677] <TB2> INFO: Expecting 1364480 events.
[16:48:45.736] <TB2> INFO: 659584 events read in total (27467ms).
[16:49:13.082] <TB2> INFO: 1317648 events read in total (54813ms).
[16:49:15.427] <TB2> INFO: 1364480 events read in total (57158ms).
[16:49:15.457] <TB2> INFO: Test took 58059ms.
[16:49:28.732] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 25.391948 .. 43.772899
[16:49:28.995] <TB2> INFO: Expecting 208000 events.
[16:49:38.692] <TB2> INFO: 208000 events read in total (9105ms).
[16:49:38.693] <TB2> INFO: Test took 9957ms.
[16:49:38.742] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 53 (-1/-1) hits flags = 528 (plus default)
[16:49:38.756] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:49:38.756] <TB2> INFO: run 1 of 1
[16:49:39.034] <TB2> INFO: Expecting 1297920 events.
[16:50:07.824] <TB2> INFO: 675792 events read in total (28198ms).
[16:50:33.963] <TB2> INFO: 1297920 events read in total (54337ms).
[16:50:34.010] <TB2> INFO: Test took 55255ms.
[16:50:48.757] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:50:48.757] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:50:48.771] <TB2> INFO: dacScan split into 1 runs with ntrig = 8
[16:50:48.771] <TB2> INFO: run 1 of 1
[16:50:49.008] <TB2> INFO: Expecting 1364480 events.
[16:51:17.177] <TB2> INFO: 667176 events read in total (27577ms).
[16:51:45.288] <TB2> INFO: 1333672 events read in total (55688ms).
[16:51:46.981] <TB2> INFO: 1364480 events read in total (57381ms).
[16:51:47.009] <TB2> INFO: Test took 58238ms.
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[16:52:01.857] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[16:52:01.858] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[16:52:01.858] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C0.dat
[16:52:01.864] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C1.dat
[16:52:01.869] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C2.dat
[16:52:01.874] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C3.dat
[16:52:01.879] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C4.dat
[16:52:01.884] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C5.dat
[16:52:01.888] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C6.dat
[16:52:01.893] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C7.dat
[16:52:01.898] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C8.dat
[16:52:01.903] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C9.dat
[16:52:01.908] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C10.dat
[16:52:01.913] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C11.dat
[16:52:01.918] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C12.dat
[16:52:01.922] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C13.dat
[16:52:01.927] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C14.dat
[16:52:01.932] <TB2> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C15.dat
[16:52:01.937] <TB2> INFO: PixTestTrim::trimTest() done
[16:52:01.937] <TB2> INFO: vtrim: 132 125 129 140 130 124 162 136 141 154 136 147 132 119 126 116
[16:52:01.937] <TB2> INFO: vthrcomp: 108 115 110 106 109 124 132 116 130 111 112 111 108 124 114 121
[16:52:01.937] <TB2> INFO: vcal mean: 34.96 35.01 35.04 34.96 34.97 34.93 35.09 35.03 34.95 34.96 35.02 35.01 34.94 34.94 34.97 34.97
[16:52:01.937] <TB2> INFO: vcal RMS: 0.99 1.00 1.05 0.95 1.04 1.11 1.16 1.26 1.13 1.06 1.17 1.01 1.04 1.22 1.11 1.10
[16:52:01.937] <TB2> INFO: bits mean: 8.46 9.13 8.90 8.80 8.93 9.66 7.59 9.70 10.09 9.32 9.18 9.09 8.78 9.37 9.27 9.40
[16:52:01.937] <TB2> INFO: bits RMS: 2.66 2.77 2.46 2.65 2.59 2.76 2.46 2.68 2.50 2.43 2.82 2.57 2.48 2.78 2.84 2.83
[16:52:01.944] <TB2> INFO: ----------------------------------------------------------------------
[16:52:01.944] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:52:01.944] <TB2> INFO: ----------------------------------------------------------------------
[16:52:01.947] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:52:01.960] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:52:01.960] <TB2> INFO: run 1 of 1
[16:52:02.199] <TB2> INFO: Expecting 4160000 events.
[16:52:34.184] <TB2> INFO: 733525 events read in total (31393ms).
[16:53:04.981] <TB2> INFO: 1460300 events read in total (62190ms).
[16:53:36.080] <TB2> INFO: 2185405 events read in total (93289ms).
[16:54:07.084] <TB2> INFO: 2905240 events read in total (124293ms).
[16:54:37.931] <TB2> INFO: 3623830 events read in total (155140ms).
[16:55:01.192] <TB2> INFO: 4160000 events read in total (178401ms).
[16:55:01.268] <TB2> INFO: Test took 179308ms.
[16:55:29.059] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 222 (-1/-1) hits flags = 528 (plus default)
[16:55:29.073] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:55:29.074] <TB2> INFO: run 1 of 1
[16:55:29.334] <TB2> INFO: Expecting 4638400 events.
[16:56:00.141] <TB2> INFO: 686720 events read in total (30215ms).
[16:56:30.283] <TB2> INFO: 1369515 events read in total (60357ms).
[16:57:00.308] <TB2> INFO: 2049685 events read in total (90382ms).
[16:57:30.271] <TB2> INFO: 2728125 events read in total (120345ms).
[16:58:00.244] <TB2> INFO: 3404115 events read in total (150318ms).
[16:58:30.449] <TB2> INFO: 4079545 events read in total (180523ms).
[16:58:55.620] <TB2> INFO: 4638400 events read in total (205694ms).
[16:58:55.767] <TB2> INFO: Test took 206693ms.
[16:59:26.254] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 202 (-1/-1) hits flags = 528 (plus default)
[16:59:26.268] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:59:26.268] <TB2> INFO: run 1 of 1
[16:59:26.505] <TB2> INFO: Expecting 4222400 events.
[16:59:58.078] <TB2> INFO: 707150 events read in total (30981ms).
[17:00:29.043] <TB2> INFO: 1409040 events read in total (61946ms).
[17:01:00.153] <TB2> INFO: 2108940 events read in total (93056ms).
[17:01:31.167] <TB2> INFO: 2804605 events read in total (124070ms).
[17:02:01.773] <TB2> INFO: 3499045 events read in total (154676ms).
[17:02:32.563] <TB2> INFO: 4196685 events read in total (185466ms).
[17:02:34.028] <TB2> INFO: 4222400 events read in total (186931ms).
[17:02:34.115] <TB2> INFO: Test took 187847ms.
[17:03:01.575] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[17:03:01.589] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:03:01.589] <TB2> INFO: run 1 of 1
[17:03:01.839] <TB2> INFO: Expecting 4264000 events.
[17:03:32.799] <TB2> INFO: 705105 events read in total (30369ms).
[17:04:03.060] <TB2> INFO: 1405010 events read in total (60630ms).
[17:04:33.515] <TB2> INFO: 2102590 events read in total (91085ms).
[17:05:03.652] <TB2> INFO: 2796830 events read in total (121222ms).
[17:05:34.243] <TB2> INFO: 3488850 events read in total (151813ms).
[17:06:04.729] <TB2> INFO: 4183335 events read in total (182299ms).
[17:06:08.733] <TB2> INFO: 4264000 events read in total (186303ms).
[17:06:08.836] <TB2> INFO: Test took 187247ms.
[17:06:34.518] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[17:06:34.533] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:06:34.533] <TB2> INFO: run 1 of 1
[17:06:34.810] <TB2> INFO: Expecting 4264000 events.
[17:07:06.539] <TB2> INFO: 705235 events read in total (31137ms).
[17:07:37.113] <TB2> INFO: 1405315 events read in total (61711ms).
[17:08:07.884] <TB2> INFO: 2103090 events read in total (92482ms).
[17:08:38.617] <TB2> INFO: 2797515 events read in total (123215ms).
[17:09:08.708] <TB2> INFO: 3489780 events read in total (153306ms).
[17:09:38.940] <TB2> INFO: 4184445 events read in total (183538ms).
[17:09:42.677] <TB2> INFO: 4264000 events read in total (187275ms).
[17:09:42.755] <TB2> INFO: Test took 188223ms.
[17:10:12.196] <TB2> INFO: PixTestTrim::trimBitTest() done
[17:10:12.197] <TB2> INFO: PixTestTrim::doTest() done, duration: 2526 seconds
[17:10:12.197] <TB2> INFO: Decoding statistics:
[17:10:12.197] <TB2> INFO: General information:
[17:10:12.197] <TB2> INFO: 16bit words read: 0
[17:10:12.197] <TB2> INFO: valid events total: 0
[17:10:12.197] <TB2> INFO: empty events: 0
[17:10:12.197] <TB2> INFO: valid events with pixels: 0
[17:10:12.197] <TB2> INFO: valid pixel hits: 0
[17:10:12.197] <TB2> INFO: Event errors: 0
[17:10:12.197] <TB2> INFO: start marker: 0
[17:10:12.197] <TB2> INFO: stop marker: 0
[17:10:12.198] <TB2> INFO: overflow: 0
[17:10:12.198] <TB2> INFO: invalid 5bit words: 0
[17:10:12.198] <TB2> INFO: invalid XOR eye diagram: 0
[17:10:12.198] <TB2> INFO: frame (failed synchr.): 0
[17:10:12.198] <TB2> INFO: idle data (no TBM trl): 0
[17:10:12.198] <TB2> INFO: no data (only TBM hdr): 0
[17:10:12.198] <TB2> INFO: TBM errors: 0
[17:10:12.198] <TB2> INFO: flawed TBM headers: 0
[17:10:12.198] <TB2> INFO: flawed TBM trailers: 0
[17:10:12.198] <TB2> INFO: event ID mismatches: 0
[17:10:12.198] <TB2> INFO: ROC errors: 0
[17:10:12.198] <TB2> INFO: missing ROC header(s): 0
[17:10:12.198] <TB2> INFO: misplaced readback start: 0
[17:10:12.198] <TB2> INFO: Pixel decoding errors: 0
[17:10:12.198] <TB2> INFO: pixel data incomplete: 0
[17:10:12.198] <TB2> INFO: pixel address: 0
[17:10:12.198] <TB2> INFO: pulse height fill bit: 0
[17:10:12.198] <TB2> INFO: buffer corruption: 0
[17:10:12.844] <TB2> INFO: ######################################################################
[17:10:12.844] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:10:12.844] <TB2> INFO: ######################################################################
[17:10:13.083] <TB2> INFO: Expecting 41600 events.
[17:10:16.563] <TB2> INFO: 41600 events read in total (2889ms).
[17:10:16.564] <TB2> INFO: Test took 3719ms.
[17:10:17.009] <TB2> INFO: Expecting 41600 events.
[17:10:20.495] <TB2> INFO: 41600 events read in total (2894ms).
[17:10:20.496] <TB2> INFO: Test took 3728ms.
[17:10:20.785] <TB2> INFO: Expecting 41600 events.
[17:10:24.309] <TB2> INFO: 41600 events read in total (2932ms).
[17:10:24.310] <TB2> INFO: Test took 3790ms.
[17:10:24.599] <TB2> INFO: Expecting 41600 events.
[17:10:28.115] <TB2> INFO: 41600 events read in total (2925ms).
[17:10:28.117] <TB2> INFO: Test took 3783ms.
[17:10:28.407] <TB2> INFO: Expecting 41600 events.
[17:10:31.949] <TB2> INFO: 41600 events read in total (2951ms).
[17:10:31.951] <TB2> INFO: Test took 3809ms.
[17:10:32.254] <TB2> INFO: Expecting 41600 events.
[17:10:35.759] <TB2> INFO: 41600 events read in total (2913ms).
[17:10:35.759] <TB2> INFO: Test took 3784ms.
[17:10:36.049] <TB2> INFO: Expecting 41600 events.
[17:10:39.637] <TB2> INFO: 41600 events read in total (2997ms).
[17:10:39.639] <TB2> INFO: Test took 3855ms.
[17:10:39.959] <TB2> INFO: Expecting 41600 events.
[17:10:43.757] <TB2> INFO: 41600 events read in total (3206ms).
[17:10:43.758] <TB2> INFO: Test took 4094ms.
[17:10:44.047] <TB2> INFO: Expecting 41600 events.
[17:10:47.569] <TB2> INFO: 41600 events read in total (2931ms).
[17:10:47.570] <TB2> INFO: Test took 3788ms.
[17:10:47.859] <TB2> INFO: Expecting 41600 events.
[17:10:51.376] <TB2> INFO: 41600 events read in total (2925ms).
[17:10:51.376] <TB2> INFO: Test took 3782ms.
[17:10:51.666] <TB2> INFO: Expecting 41600 events.
[17:10:55.350] <TB2> INFO: 41600 events read in total (3093ms).
[17:10:55.351] <TB2> INFO: Test took 3950ms.
[17:10:55.641] <TB2> INFO: Expecting 41600 events.
[17:10:59.165] <TB2> INFO: 41600 events read in total (2933ms).
[17:10:59.166] <TB2> INFO: Test took 3791ms.
[17:10:59.456] <TB2> INFO: Expecting 41600 events.
[17:11:03.077] <TB2> INFO: 41600 events read in total (3030ms).
[17:11:03.078] <TB2> INFO: Test took 3887ms.
[17:11:03.368] <TB2> INFO: Expecting 41600 events.
[17:11:06.867] <TB2> INFO: 41600 events read in total (2908ms).
[17:11:06.868] <TB2> INFO: Test took 3766ms.
[17:11:07.161] <TB2> INFO: Expecting 41600 events.
[17:11:10.733] <TB2> INFO: 41600 events read in total (2981ms).
[17:11:10.734] <TB2> INFO: Test took 3838ms.
[17:11:11.024] <TB2> INFO: Expecting 41600 events.
[17:11:14.547] <TB2> INFO: 41600 events read in total (2931ms).
[17:11:14.548] <TB2> INFO: Test took 3790ms.
[17:11:14.837] <TB2> INFO: Expecting 41600 events.
[17:11:18.389] <TB2> INFO: 41600 events read in total (2960ms).
[17:11:18.390] <TB2> INFO: Test took 3818ms.
[17:11:18.680] <TB2> INFO: Expecting 41600 events.
[17:11:22.263] <TB2> INFO: 41600 events read in total (2991ms).
[17:11:22.264] <TB2> INFO: Test took 3850ms.
[17:11:22.554] <TB2> INFO: Expecting 41600 events.
[17:11:26.064] <TB2> INFO: 41600 events read in total (2918ms).
[17:11:26.064] <TB2> INFO: Test took 3775ms.
[17:11:26.357] <TB2> INFO: Expecting 41600 events.
[17:11:29.934] <TB2> INFO: 41600 events read in total (2986ms).
[17:11:29.935] <TB2> INFO: Test took 3844ms.
[17:11:30.224] <TB2> INFO: Expecting 41600 events.
[17:11:33.818] <TB2> INFO: 41600 events read in total (3002ms).
[17:11:33.819] <TB2> INFO: Test took 3860ms.
[17:11:34.114] <TB2> INFO: Expecting 41600 events.
[17:11:37.638] <TB2> INFO: 41600 events read in total (2932ms).
[17:11:37.639] <TB2> INFO: Test took 3796ms.
[17:11:37.929] <TB2> INFO: Expecting 41600 events.
[17:11:41.434] <TB2> INFO: 41600 events read in total (2913ms).
[17:11:41.435] <TB2> INFO: Test took 3772ms.
[17:11:41.744] <TB2> INFO: Expecting 41600 events.
[17:11:45.224] <TB2> INFO: 41600 events read in total (2889ms).
[17:11:45.225] <TB2> INFO: Test took 3766ms.
[17:11:45.515] <TB2> INFO: Expecting 41600 events.
[17:11:49.043] <TB2> INFO: 41600 events read in total (2936ms).
[17:11:49.044] <TB2> INFO: Test took 3795ms.
[17:11:49.334] <TB2> INFO: Expecting 41600 events.
[17:11:52.951] <TB2> INFO: 41600 events read in total (3025ms).
[17:11:52.951] <TB2> INFO: Test took 3882ms.
[17:11:53.241] <TB2> INFO: Expecting 41600 events.
[17:11:56.865] <TB2> INFO: 41600 events read in total (3032ms).
[17:11:56.866] <TB2> INFO: Test took 3891ms.
[17:11:57.173] <TB2> INFO: Expecting 41600 events.
[17:12:00.646] <TB2> INFO: 41600 events read in total (2881ms).
[17:12:00.647] <TB2> INFO: Test took 3757ms.
[17:12:00.938] <TB2> INFO: Expecting 41600 events.
[17:12:04.427] <TB2> INFO: 41600 events read in total (2898ms).
[17:12:04.428] <TB2> INFO: Test took 3755ms.
[17:12:04.718] <TB2> INFO: Expecting 2560 events.
[17:12:05.602] <TB2> INFO: 2560 events read in total (292ms).
[17:12:05.603] <TB2> INFO: Test took 1162ms.
[17:12:05.910] <TB2> INFO: Expecting 2560 events.
[17:12:06.795] <TB2> INFO: 2560 events read in total (293ms).
[17:12:06.796] <TB2> INFO: Test took 1193ms.
[17:12:07.104] <TB2> INFO: Expecting 2560 events.
[17:12:07.997] <TB2> INFO: 2560 events read in total (302ms).
[17:12:07.997] <TB2> INFO: Test took 1201ms.
[17:12:08.304] <TB2> INFO: Expecting 2560 events.
[17:12:09.191] <TB2> INFO: 2560 events read in total (296ms).
[17:12:09.192] <TB2> INFO: Test took 1194ms.
[17:12:09.499] <TB2> INFO: Expecting 2560 events.
[17:12:10.388] <TB2> INFO: 2560 events read in total (297ms).
[17:12:10.388] <TB2> INFO: Test took 1195ms.
[17:12:10.696] <TB2> INFO: Expecting 2560 events.
[17:12:11.586] <TB2> INFO: 2560 events read in total (298ms).
[17:12:11.586] <TB2> INFO: Test took 1196ms.
[17:12:11.893] <TB2> INFO: Expecting 2560 events.
[17:12:12.781] <TB2> INFO: 2560 events read in total (296ms).
[17:12:12.781] <TB2> INFO: Test took 1194ms.
[17:12:13.089] <TB2> INFO: Expecting 2560 events.
[17:12:13.970] <TB2> INFO: 2560 events read in total (289ms).
[17:12:13.970] <TB2> INFO: Test took 1188ms.
[17:12:14.278] <TB2> INFO: Expecting 2560 events.
[17:12:15.163] <TB2> INFO: 2560 events read in total (294ms).
[17:12:15.163] <TB2> INFO: Test took 1192ms.
[17:12:15.470] <TB2> INFO: Expecting 2560 events.
[17:12:16.361] <TB2> INFO: 2560 events read in total (299ms).
[17:12:16.362] <TB2> INFO: Test took 1198ms.
[17:12:16.668] <TB2> INFO: Expecting 2560 events.
[17:12:17.559] <TB2> INFO: 2560 events read in total (299ms).
[17:12:17.560] <TB2> INFO: Test took 1198ms.
[17:12:17.867] <TB2> INFO: Expecting 2560 events.
[17:12:18.752] <TB2> INFO: 2560 events read in total (293ms).
[17:12:18.752] <TB2> INFO: Test took 1192ms.
[17:12:19.060] <TB2> INFO: Expecting 2560 events.
[17:12:19.948] <TB2> INFO: 2560 events read in total (296ms).
[17:12:19.949] <TB2> INFO: Test took 1196ms.
[17:12:20.256] <TB2> INFO: Expecting 2560 events.
[17:12:21.141] <TB2> INFO: 2560 events read in total (293ms).
[17:12:21.141] <TB2> INFO: Test took 1191ms.
[17:12:21.449] <TB2> INFO: Expecting 2560 events.
[17:12:22.336] <TB2> INFO: 2560 events read in total (296ms).
[17:12:22.336] <TB2> INFO: Test took 1195ms.
[17:12:22.643] <TB2> INFO: Expecting 2560 events.
[17:12:23.531] <TB2> INFO: 2560 events read in total (296ms).
[17:12:23.531] <TB2> INFO: Test took 1194ms.
[17:12:23.534] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:12:23.838] <TB2> INFO: Expecting 655360 events.
[17:12:38.491] <TB2> INFO: 655360 events read in total (14061ms).
[17:12:38.505] <TB2> INFO: Expecting 655360 events.
[17:12:53.013] <TB2> INFO: 655360 events read in total (14105ms).
[17:12:53.032] <TB2> INFO: Expecting 655360 events.
[17:13:07.542] <TB2> INFO: 655360 events read in total (14107ms).
[17:13:07.568] <TB2> INFO: Expecting 655360 events.
[17:13:21.980] <TB2> INFO: 655360 events read in total (14009ms).
[17:13:22.005] <TB2> INFO: Expecting 655360 events.
[17:13:36.516] <TB2> INFO: 655360 events read in total (14108ms).
[17:13:36.549] <TB2> INFO: Expecting 655360 events.
[17:13:50.994] <TB2> INFO: 655360 events read in total (14042ms).
[17:13:51.030] <TB2> INFO: Expecting 655360 events.
[17:14:05.537] <TB2> INFO: 655360 events read in total (14104ms).
[17:14:05.574] <TB2> INFO: Expecting 655360 events.
[17:14:20.250] <TB2> INFO: 655360 events read in total (14272ms).
[17:14:20.294] <TB2> INFO: Expecting 655360 events.
[17:14:34.738] <TB2> INFO: 655360 events read in total (14041ms).
[17:14:34.798] <TB2> INFO: Expecting 655360 events.
[17:14:49.381] <TB2> INFO: 655360 events read in total (14180ms).
[17:14:49.445] <TB2> INFO: Expecting 655360 events.
[17:15:03.935] <TB2> INFO: 655360 events read in total (14087ms).
[17:15:04.011] <TB2> INFO: Expecting 655360 events.
[17:15:18.476] <TB2> INFO: 655360 events read in total (14062ms).
[17:15:18.614] <TB2> INFO: Expecting 655360 events.
[17:15:33.136] <TB2> INFO: 655360 events read in total (14119ms).
[17:15:33.202] <TB2> INFO: Expecting 655360 events.
[17:15:47.805] <TB2> INFO: 655360 events read in total (14200ms).
[17:15:47.921] <TB2> INFO: Expecting 655360 events.
[17:16:02.452] <TB2> INFO: 655360 events read in total (14128ms).
[17:16:02.574] <TB2> INFO: Expecting 655360 events.
[17:16:17.049] <TB2> INFO: 655360 events read in total (14071ms).
[17:16:17.222] <TB2> INFO: Test took 233688ms.
[17:16:17.339] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:16:17.591] <TB2> INFO: Expecting 655360 events.
[17:16:32.260] <TB2> INFO: 655360 events read in total (14077ms).
[17:16:32.275] <TB2> INFO: Expecting 655360 events.
[17:16:46.808] <TB2> INFO: 655360 events read in total (14130ms).
[17:16:46.824] <TB2> INFO: Expecting 655360 events.
[17:17:01.320] <TB2> INFO: 655360 events read in total (14093ms).
[17:17:01.341] <TB2> INFO: Expecting 655360 events.
[17:17:15.580] <TB2> INFO: 655360 events read in total (13835ms).
[17:17:15.605] <TB2> INFO: Expecting 655360 events.
[17:17:30.015] <TB2> INFO: 655360 events read in total (14007ms).
[17:17:30.050] <TB2> INFO: Expecting 655360 events.
[17:17:44.341] <TB2> INFO: 655360 events read in total (13888ms).
[17:17:44.388] <TB2> INFO: Expecting 655360 events.
[17:17:58.706] <TB2> INFO: 655360 events read in total (13915ms).
[17:17:58.756] <TB2> INFO: Expecting 655360 events.
[17:18:13.166] <TB2> INFO: 655360 events read in total (14007ms).
[17:18:13.211] <TB2> INFO: Expecting 655360 events.
[17:18:27.629] <TB2> INFO: 655360 events read in total (14015ms).
[17:18:27.674] <TB2> INFO: Expecting 655360 events.
[17:18:42.166] <TB2> INFO: 655360 events read in total (14089ms).
[17:18:42.230] <TB2> INFO: Expecting 655360 events.
[17:18:56.479] <TB2> INFO: 655360 events read in total (13846ms).
[17:18:56.539] <TB2> INFO: Expecting 655360 events.
[17:19:11.017] <TB2> INFO: 655360 events read in total (14075ms).
[17:19:11.135] <TB2> INFO: Expecting 655360 events.
[17:19:25.628] <TB2> INFO: 655360 events read in total (14090ms).
[17:19:25.704] <TB2> INFO: Expecting 655360 events.
[17:19:39.990] <TB2> INFO: 655360 events read in total (13883ms).
[17:19:40.105] <TB2> INFO: Expecting 655360 events.
[17:19:54.863] <TB2> INFO: 655360 events read in total (14354ms).
[17:19:54.958] <TB2> INFO: Expecting 655360 events.
[17:20:09.490] <TB2> INFO: 655360 events read in total (14129ms).
[17:20:09.589] <TB2> INFO: Test took 232250ms.
[17:20:09.761] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.767] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.773] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:09.779] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:09.785] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[17:20:09.791] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[17:20:09.797] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[17:20:09.803] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[17:20:09.809] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[17:20:09.815] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[17:20:09.821] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[17:20:09.827] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.833] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.839] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.845] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:09.851] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:09.858] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[17:20:09.864] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.869] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.876] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.881] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.887] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.893] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:09.899] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.905] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.911] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.917] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.923] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.929] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.935] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:09.941] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.947] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.953] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:09.959] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[17:20:09.965] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[17:20:09.971] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.977] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.983] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:20:09.989] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[17:20:10.023] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[17:20:10.024] <TB2> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[17:20:10.267] <TB2> INFO: Expecting 41600 events.
[17:20:13.428] <TB2> INFO: 41600 events read in total (2569ms).
[17:20:13.429] <TB2> INFO: Test took 3402ms.
[17:20:13.930] <TB2> INFO: Expecting 41600 events.
[17:20:17.029] <TB2> INFO: 41600 events read in total (2508ms).
[17:20:17.030] <TB2> INFO: Test took 3386ms.
[17:20:17.478] <TB2> INFO: Expecting 41600 events.
[17:20:20.676] <TB2> INFO: 41600 events read in total (2606ms).
[17:20:20.676] <TB2> INFO: Test took 3434ms.
[17:20:20.893] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:20.982] <TB2> INFO: Expecting 2560 events.
[17:20:21.866] <TB2> INFO: 2560 events read in total (292ms).
[17:20:21.866] <TB2> INFO: Test took 973ms.
[17:20:21.870] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:22.174] <TB2> INFO: Expecting 2560 events.
[17:20:23.069] <TB2> INFO: 2560 events read in total (303ms).
[17:20:23.070] <TB2> INFO: Test took 1200ms.
[17:20:23.074] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:23.377] <TB2> INFO: Expecting 2560 events.
[17:20:24.271] <TB2> INFO: 2560 events read in total (302ms).
[17:20:24.272] <TB2> INFO: Test took 1198ms.
[17:20:24.275] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:24.580] <TB2> INFO: Expecting 2560 events.
[17:20:25.466] <TB2> INFO: 2560 events read in total (294ms).
[17:20:25.466] <TB2> INFO: Test took 1191ms.
[17:20:25.469] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:25.773] <TB2> INFO: Expecting 2560 events.
[17:20:26.670] <TB2> INFO: 2560 events read in total (305ms).
[17:20:26.671] <TB2> INFO: Test took 1202ms.
[17:20:26.675] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:26.978] <TB2> INFO: Expecting 2560 events.
[17:20:27.873] <TB2> INFO: 2560 events read in total (303ms).
[17:20:27.873] <TB2> INFO: Test took 1198ms.
[17:20:27.876] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:28.181] <TB2> INFO: Expecting 2560 events.
[17:20:29.078] <TB2> INFO: 2560 events read in total (305ms).
[17:20:29.078] <TB2> INFO: Test took 1202ms.
[17:20:29.082] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:29.386] <TB2> INFO: Expecting 2560 events.
[17:20:30.279] <TB2> INFO: 2560 events read in total (301ms).
[17:20:30.279] <TB2> INFO: Test took 1198ms.
[17:20:30.282] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:30.588] <TB2> INFO: Expecting 2560 events.
[17:20:31.479] <TB2> INFO: 2560 events read in total (299ms).
[17:20:31.479] <TB2> INFO: Test took 1197ms.
[17:20:31.482] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:31.787] <TB2> INFO: Expecting 2560 events.
[17:20:32.682] <TB2> INFO: 2560 events read in total (303ms).
[17:20:32.683] <TB2> INFO: Test took 1201ms.
[17:20:32.685] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:32.991] <TB2> INFO: Expecting 2560 events.
[17:20:33.874] <TB2> INFO: 2560 events read in total (291ms).
[17:20:33.875] <TB2> INFO: Test took 1190ms.
[17:20:33.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:34.182] <TB2> INFO: Expecting 2560 events.
[17:20:35.069] <TB2> INFO: 2560 events read in total (295ms).
[17:20:35.069] <TB2> INFO: Test took 1191ms.
[17:20:35.072] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:35.377] <TB2> INFO: Expecting 2560 events.
[17:20:36.269] <TB2> INFO: 2560 events read in total (300ms).
[17:20:36.269] <TB2> INFO: Test took 1197ms.
[17:20:36.274] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:36.577] <TB2> INFO: Expecting 2560 events.
[17:20:37.470] <TB2> INFO: 2560 events read in total (301ms).
[17:20:37.471] <TB2> INFO: Test took 1197ms.
[17:20:37.474] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:37.778] <TB2> INFO: Expecting 2560 events.
[17:20:38.659] <TB2> INFO: 2560 events read in total (289ms).
[17:20:38.660] <TB2> INFO: Test took 1186ms.
[17:20:38.663] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:38.967] <TB2> INFO: Expecting 2560 events.
[17:20:39.860] <TB2> INFO: 2560 events read in total (302ms).
[17:20:39.860] <TB2> INFO: Test took 1197ms.
[17:20:39.864] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:40.169] <TB2> INFO: Expecting 2560 events.
[17:20:41.058] <TB2> INFO: 2560 events read in total (297ms).
[17:20:41.059] <TB2> INFO: Test took 1196ms.
[17:20:41.062] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:41.367] <TB2> INFO: Expecting 2560 events.
[17:20:42.256] <TB2> INFO: 2560 events read in total (297ms).
[17:20:42.256] <TB2> INFO: Test took 1194ms.
[17:20:42.258] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:42.566] <TB2> INFO: Expecting 2560 events.
[17:20:43.450] <TB2> INFO: 2560 events read in total (293ms).
[17:20:43.451] <TB2> INFO: Test took 1193ms.
[17:20:43.454] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:43.759] <TB2> INFO: Expecting 2560 events.
[17:20:44.649] <TB2> INFO: 2560 events read in total (298ms).
[17:20:44.649] <TB2> INFO: Test took 1196ms.
[17:20:44.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:44.957] <TB2> INFO: Expecting 2560 events.
[17:20:45.845] <TB2> INFO: 2560 events read in total (296ms).
[17:20:45.846] <TB2> INFO: Test took 1194ms.
[17:20:45.849] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:46.154] <TB2> INFO: Expecting 2560 events.
[17:20:47.042] <TB2> INFO: 2560 events read in total (297ms).
[17:20:47.042] <TB2> INFO: Test took 1194ms.
[17:20:47.044] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:47.351] <TB2> INFO: Expecting 2560 events.
[17:20:48.244] <TB2> INFO: 2560 events read in total (301ms).
[17:20:48.244] <TB2> INFO: Test took 1200ms.
[17:20:48.248] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:48.552] <TB2> INFO: Expecting 2560 events.
[17:20:49.444] <TB2> INFO: 2560 events read in total (301ms).
[17:20:49.444] <TB2> INFO: Test took 1196ms.
[17:20:49.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:49.752] <TB2> INFO: Expecting 2560 events.
[17:20:50.640] <TB2> INFO: 2560 events read in total (296ms).
[17:20:50.640] <TB2> INFO: Test took 1193ms.
[17:20:50.644] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:50.948] <TB2> INFO: Expecting 2560 events.
[17:20:51.843] <TB2> INFO: 2560 events read in total (303ms).
[17:20:51.843] <TB2> INFO: Test took 1199ms.
[17:20:51.845] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:52.152] <TB2> INFO: Expecting 2560 events.
[17:20:53.048] <TB2> INFO: 2560 events read in total (304ms).
[17:20:53.049] <TB2> INFO: Test took 1204ms.
[17:20:53.052] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:53.357] <TB2> INFO: Expecting 2560 events.
[17:20:54.253] <TB2> INFO: 2560 events read in total (304ms).
[17:20:54.253] <TB2> INFO: Test took 1201ms.
[17:20:54.259] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:54.560] <TB2> INFO: Expecting 2560 events.
[17:20:55.445] <TB2> INFO: 2560 events read in total (293ms).
[17:20:55.445] <TB2> INFO: Test took 1186ms.
[17:20:55.449] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:55.753] <TB2> INFO: Expecting 2560 events.
[17:20:56.646] <TB2> INFO: 2560 events read in total (301ms).
[17:20:56.647] <TB2> INFO: Test took 1198ms.
[17:20:56.651] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:56.954] <TB2> INFO: Expecting 2560 events.
[17:20:57.844] <TB2> INFO: 2560 events read in total (298ms).
[17:20:57.845] <TB2> INFO: Test took 1195ms.
[17:20:57.847] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:58.154] <TB2> INFO: Expecting 2560 events.
[17:20:59.038] <TB2> INFO: 2560 events read in total (292ms).
[17:20:59.038] <TB2> INFO: Test took 1191ms.
[17:20:59.514] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 646 seconds
[17:20:59.514] <TB2> INFO: PH scale (per ROC): 43 61 48 70 59 62 43 61 56 53 44 53 43 42 61 61
[17:20:59.514] <TB2> INFO: PH offset (per ROC): 112 123 128 132 123 117 86 118 117 114 108 110 108 102 127 125
[17:20:59.521] <TB2> INFO: Decoding statistics:
[17:20:59.521] <TB2> INFO: General information:
[17:20:59.521] <TB2> INFO: 16bit words read: 127882
[17:20:59.521] <TB2> INFO: valid events total: 20480
[17:20:59.521] <TB2> INFO: empty events: 17979
[17:20:59.521] <TB2> INFO: valid events with pixels: 2501
[17:20:59.521] <TB2> INFO: valid pixel hits: 2501
[17:20:59.521] <TB2> INFO: Event errors: 0
[17:20:59.521] <TB2> INFO: start marker: 0
[17:20:59.521] <TB2> INFO: stop marker: 0
[17:20:59.521] <TB2> INFO: overflow: 0
[17:20:59.521] <TB2> INFO: invalid 5bit words: 0
[17:20:59.521] <TB2> INFO: invalid XOR eye diagram: 0
[17:20:59.521] <TB2> INFO: frame (failed synchr.): 0
[17:20:59.521] <TB2> INFO: idle data (no TBM trl): 0
[17:20:59.521] <TB2> INFO: no data (only TBM hdr): 0
[17:20:59.521] <TB2> INFO: TBM errors: 0
[17:20:59.521] <TB2> INFO: flawed TBM headers: 0
[17:20:59.521] <TB2> INFO: flawed TBM trailers: 0
[17:20:59.521] <TB2> INFO: event ID mismatches: 0
[17:20:59.521] <TB2> INFO: ROC errors: 0
[17:20:59.521] <TB2> INFO: missing ROC header(s): 0
[17:20:59.521] <TB2> INFO: misplaced readback start: 0
[17:20:59.521] <TB2> INFO: Pixel decoding errors: 0
[17:20:59.521] <TB2> INFO: pixel data incomplete: 0
[17:20:59.521] <TB2> INFO: pixel address: 0
[17:20:59.521] <TB2> INFO: pulse height fill bit: 0
[17:20:59.521] <TB2> INFO: buffer corruption: 0
[17:20:59.681] <TB2> INFO: ######################################################################
[17:20:59.681] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:20:59.681] <TB2> INFO: ######################################################################
[17:20:59.696] <TB2> INFO: scanning low vcal = 10
[17:20:59.974] <TB2> INFO: Expecting 41600 events.
[17:21:03.615] <TB2> INFO: 41600 events read in total (3049ms).
[17:21:03.616] <TB2> INFO: Test took 3920ms.
[17:21:03.617] <TB2> INFO: scanning low vcal = 20
[17:21:03.910] <TB2> INFO: Expecting 41600 events.
[17:21:07.534] <TB2> INFO: 41600 events read in total (3032ms).
[17:21:07.534] <TB2> INFO: Test took 3917ms.
[17:21:07.536] <TB2> INFO: scanning low vcal = 30
[17:21:07.829] <TB2> INFO: Expecting 41600 events.
[17:21:11.551] <TB2> INFO: 41600 events read in total (3130ms).
[17:21:11.552] <TB2> INFO: Test took 4016ms.
[17:21:11.554] <TB2> INFO: scanning low vcal = 40
[17:21:11.832] <TB2> INFO: Expecting 41600 events.
[17:21:15.857] <TB2> INFO: 41600 events read in total (3433ms).
[17:21:15.858] <TB2> INFO: Test took 4303ms.
[17:21:15.861] <TB2> INFO: scanning low vcal = 50
[17:21:16.139] <TB2> INFO: Expecting 41600 events.
[17:21:20.177] <TB2> INFO: 41600 events read in total (3446ms).
[17:21:20.178] <TB2> INFO: Test took 4317ms.
[17:21:20.181] <TB2> INFO: scanning low vcal = 60
[17:21:20.458] <TB2> INFO: Expecting 41600 events.
[17:21:24.487] <TB2> INFO: 41600 events read in total (3437ms).
[17:21:24.488] <TB2> INFO: Test took 4307ms.
[17:21:24.492] <TB2> INFO: scanning low vcal = 70
[17:21:24.769] <TB2> INFO: Expecting 41600 events.
[17:21:28.826] <TB2> INFO: 41600 events read in total (3465ms).
[17:21:28.827] <TB2> INFO: Test took 4335ms.
[17:21:28.830] <TB2> INFO: scanning low vcal = 80
[17:21:29.111] <TB2> INFO: Expecting 41600 events.
[17:21:33.130] <TB2> INFO: 41600 events read in total (3427ms).
[17:21:33.131] <TB2> INFO: Test took 4301ms.
[17:21:33.134] <TB2> INFO: scanning low vcal = 90
[17:21:33.411] <TB2> INFO: Expecting 41600 events.
[17:21:37.498] <TB2> INFO: 41600 events read in total (3495ms).
[17:21:37.499] <TB2> INFO: Test took 4365ms.
[17:21:37.502] <TB2> INFO: scanning low vcal = 100
[17:21:37.779] <TB2> INFO: Expecting 41600 events.
[17:21:41.802] <TB2> INFO: 41600 events read in total (3431ms).
[17:21:41.803] <TB2> INFO: Test took 4300ms.
[17:21:41.806] <TB2> INFO: scanning low vcal = 110
[17:21:42.083] <TB2> INFO: Expecting 41600 events.
[17:21:46.146] <TB2> INFO: 41600 events read in total (3471ms).
[17:21:46.147] <TB2> INFO: Test took 4341ms.
[17:21:46.150] <TB2> INFO: scanning low vcal = 120
[17:21:46.427] <TB2> INFO: Expecting 41600 events.
[17:21:50.454] <TB2> INFO: 41600 events read in total (3435ms).
[17:21:50.454] <TB2> INFO: Test took 4304ms.
[17:21:50.457] <TB2> INFO: scanning low vcal = 130
[17:21:50.735] <TB2> INFO: Expecting 41600 events.
[17:21:54.680] <TB2> INFO: 41600 events read in total (3353ms).
[17:21:54.680] <TB2> INFO: Test took 4223ms.
[17:21:54.683] <TB2> INFO: scanning low vcal = 140
[17:21:54.960] <TB2> INFO: Expecting 41600 events.
[17:21:58.915] <TB2> INFO: 41600 events read in total (3364ms).
[17:21:58.916] <TB2> INFO: Test took 4233ms.
[17:21:58.919] <TB2> INFO: scanning low vcal = 150
[17:21:59.195] <TB2> INFO: Expecting 41600 events.
[17:22:03.125] <TB2> INFO: 41600 events read in total (3338ms).
[17:22:03.126] <TB2> INFO: Test took 4207ms.
[17:22:03.129] <TB2> INFO: scanning low vcal = 160
[17:22:03.406] <TB2> INFO: Expecting 41600 events.
[17:22:07.356] <TB2> INFO: 41600 events read in total (3358ms).
[17:22:07.356] <TB2> INFO: Test took 4227ms.
[17:22:07.359] <TB2> INFO: scanning low vcal = 170
[17:22:07.636] <TB2> INFO: Expecting 41600 events.
[17:22:11.578] <TB2> INFO: 41600 events read in total (3351ms).
[17:22:11.578] <TB2> INFO: Test took 4219ms.
[17:22:11.584] <TB2> INFO: scanning low vcal = 180
[17:22:11.858] <TB2> INFO: Expecting 41600 events.
[17:22:15.793] <TB2> INFO: 41600 events read in total (3343ms).
[17:22:15.793] <TB2> INFO: Test took 4209ms.
[17:22:15.797] <TB2> INFO: scanning low vcal = 190
[17:22:16.073] <TB2> INFO: Expecting 41600 events.
[17:22:20.018] <TB2> INFO: 41600 events read in total (3353ms).
[17:22:20.019] <TB2> INFO: Test took 4222ms.
[17:22:20.022] <TB2> INFO: scanning low vcal = 200
[17:22:20.298] <TB2> INFO: Expecting 41600 events.
[17:22:24.245] <TB2> INFO: 41600 events read in total (3355ms).
[17:22:24.246] <TB2> INFO: Test took 4224ms.
[17:22:24.249] <TB2> INFO: scanning low vcal = 210
[17:22:24.526] <TB2> INFO: Expecting 41600 events.
[17:22:28.546] <TB2> INFO: 41600 events read in total (3429ms).
[17:22:28.547] <TB2> INFO: Test took 4298ms.
[17:22:28.549] <TB2> INFO: scanning low vcal = 220
[17:22:28.826] <TB2> INFO: Expecting 41600 events.
[17:22:32.819] <TB2> INFO: 41600 events read in total (3401ms).
[17:22:32.820] <TB2> INFO: Test took 4270ms.
[17:22:32.822] <TB2> INFO: scanning low vcal = 230
[17:22:33.100] <TB2> INFO: Expecting 41600 events.
[17:22:37.121] <TB2> INFO: 41600 events read in total (3430ms).
[17:22:37.121] <TB2> INFO: Test took 4298ms.
[17:22:37.124] <TB2> INFO: scanning low vcal = 240
[17:22:37.401] <TB2> INFO: Expecting 41600 events.
[17:22:41.369] <TB2> INFO: 41600 events read in total (3376ms).
[17:22:41.370] <TB2> INFO: Test took 4246ms.
[17:22:41.373] <TB2> INFO: scanning low vcal = 250
[17:22:41.649] <TB2> INFO: Expecting 41600 events.
[17:22:45.638] <TB2> INFO: 41600 events read in total (3397ms).
[17:22:45.639] <TB2> INFO: Test took 4266ms.
[17:22:45.643] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[17:22:45.919] <TB2> INFO: Expecting 41600 events.
[17:22:49.892] <TB2> INFO: 41600 events read in total (3381ms).
[17:22:49.893] <TB2> INFO: Test took 4250ms.
[17:22:49.897] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[17:22:50.194] <TB2> INFO: Expecting 41600 events.
[17:22:54.152] <TB2> INFO: 41600 events read in total (3366ms).
[17:22:54.153] <TB2> INFO: Test took 4256ms.
[17:22:54.157] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[17:22:54.433] <TB2> INFO: Expecting 41600 events.
[17:22:58.407] <TB2> INFO: 41600 events read in total (3382ms).
[17:22:58.408] <TB2> INFO: Test took 4251ms.
[17:22:58.411] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[17:22:58.687] <TB2> INFO: Expecting 41600 events.
[17:23:02.645] <TB2> INFO: 41600 events read in total (3366ms).
[17:23:02.645] <TB2> INFO: Test took 4234ms.
[17:23:02.649] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:23:02.925] <TB2> INFO: Expecting 41600 events.
[17:23:06.990] <TB2> INFO: 41600 events read in total (3473ms).
[17:23:06.991] <TB2> INFO: Test took 4342ms.
[17:23:07.659] <TB2> INFO: PixTestGainPedestal::measure() done
[17:23:41.034] <TB2> INFO: PixTestGainPedestal::fit() done
[17:23:41.034] <TB2> INFO: non-linearity mean: 0.946 0.982 0.977 0.984 0.981 0.984 0.932 0.987 0.980 0.960 0.934 0.957 0.943 0.956 0.983 0.984
[17:23:41.034] <TB2> INFO: non-linearity RMS: 0.060 0.003 0.007 0.003 0.005 0.003 0.167 0.002 0.004 0.040 0.070 0.033 0.056 0.143 0.002 0.003
[17:23:41.035] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:23:41.049] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:23:41.062] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:23:41.075] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:23:41.089] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:23:41.102] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:23:41.115] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:23:41.128] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:23:41.142] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:23:41.155] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:23:41.169] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:23:41.182] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:23:41.195] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:23:41.209] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:23:41.222] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:23:41.236] <TB2> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1075_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:23:41.249] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[17:23:41.249] <TB2> INFO: Decoding statistics:
[17:23:41.249] <TB2> INFO: General information:
[17:23:41.249] <TB2> INFO: 16bit words read: 3327878
[17:23:41.249] <TB2> INFO: valid events total: 332800
[17:23:41.249] <TB2> INFO: empty events: 0
[17:23:41.249] <TB2> INFO: valid events with pixels: 332800
[17:23:41.249] <TB2> INFO: valid pixel hits: 665539
[17:23:41.249] <TB2> INFO: Event errors: 0
[17:23:41.249] <TB2> INFO: start marker: 0
[17:23:41.249] <TB2> INFO: stop marker: 0
[17:23:41.250] <TB2> INFO: overflow: 0
[17:23:41.250] <TB2> INFO: invalid 5bit words: 0
[17:23:41.250] <TB2> INFO: invalid XOR eye diagram: 0
[17:23:41.250] <TB2> INFO: frame (failed synchr.): 0
[17:23:41.250] <TB2> INFO: idle data (no TBM trl): 0
[17:23:41.250] <TB2> INFO: no data (only TBM hdr): 0
[17:23:41.250] <TB2> INFO: TBM errors: 0
[17:23:41.250] <TB2> INFO: flawed TBM headers: 0
[17:23:41.250] <TB2> INFO: flawed TBM trailers: 0
[17:23:41.250] <TB2> INFO: event ID mismatches: 0
[17:23:41.250] <TB2> INFO: ROC errors: 0
[17:23:41.250] <TB2> INFO: missing ROC header(s): 0
[17:23:41.250] <TB2> INFO: misplaced readback start: 0
[17:23:41.250] <TB2> INFO: Pixel decoding errors: 0
[17:23:41.250] <TB2> INFO: pixel data incomplete: 0
[17:23:41.250] <TB2> INFO: pixel address: 0
[17:23:41.250] <TB2> INFO: pulse height fill bit: 0
[17:23:41.250] <TB2> INFO: buffer corruption: 0
[17:23:41.265] <TB2> INFO: Decoding statistics:
[17:23:41.265] <TB2> INFO: General information:
[17:23:41.265] <TB2> INFO: 16bit words read: 3457296
[17:23:41.265] <TB2> INFO: valid events total: 353536
[17:23:41.265] <TB2> INFO: empty events: 18235
[17:23:41.265] <TB2> INFO: valid events with pixels: 335301
[17:23:41.265] <TB2> INFO: valid pixel hits: 668040
[17:23:41.265] <TB2> INFO: Event errors: 0
[17:23:41.265] <TB2> INFO: start marker: 0
[17:23:41.265] <TB2> INFO: stop marker: 0
[17:23:41.265] <TB2> INFO: overflow: 0
[17:23:41.265] <TB2> INFO: invalid 5bit words: 0
[17:23:41.265] <TB2> INFO: invalid XOR eye diagram: 0
[17:23:41.265] <TB2> INFO: frame (failed synchr.): 0
[17:23:41.265] <TB2> INFO: idle data (no TBM trl): 0
[17:23:41.265] <TB2> INFO: no data (only TBM hdr): 0
[17:23:41.265] <TB2> INFO: TBM errors: 0
[17:23:41.265] <TB2> INFO: flawed TBM headers: 0
[17:23:41.265] <TB2> INFO: flawed TBM trailers: 0
[17:23:41.265] <TB2> INFO: event ID mismatches: 0
[17:23:41.265] <TB2> INFO: ROC errors: 0
[17:23:41.265] <TB2> INFO: missing ROC header(s): 0
[17:23:41.265] <TB2> INFO: misplaced readback start: 0
[17:23:41.265] <TB2> INFO: Pixel decoding errors: 0
[17:23:41.265] <TB2> INFO: pixel data incomplete: 0
[17:23:41.265] <TB2> INFO: pixel address: 0
[17:23:41.265] <TB2> INFO: pulse height fill bit: 0
[17:23:41.265] <TB2> INFO: buffer corruption: 0
[17:23:41.265] <TB2> INFO: enter test to run
[17:23:41.265] <TB2> INFO: test: exit no parameter change
[17:23:41.388] <TB2> QUIET: Connection to board 149 closed.
[17:23:41.388] <TB2> INFO: pXar: this is the end, my friend