[15:58:43.232] <TB1> INFO: *** Welcome to pxar ***
[15:58:43.232] <TB1> INFO: *** Today: 2016/10/25
[15:58:43.238] <TB1> INFO: *** Version: c8ba-dirty
[15:58:43.238] <TB1> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[15:58:43.239] <TB1> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[15:58:43.239] <TB1> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//defaultMaskFile.dat
[15:58:43.239] <TB1> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C15.dat
[15:58:43.343] <TB1> INFO: clk: 4
[15:58:43.343] <TB1> INFO: ctr: 4
[15:58:43.343] <TB1> INFO: sda: 19
[15:58:43.343] <TB1> INFO: tin: 9
[15:58:43.343] <TB1> INFO: level: 15
[15:58:43.343] <TB1> INFO: triggerdelay: 0
[15:58:43.343] <TB1> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[15:58:43.343] <TB1> INFO: Log level: INFO
[15:58:43.354] <TB1> INFO: Found DTB DTB_WXC03A
[15:58:43.366] <TB1> QUIET: Connection to board DTB_WXC03A opened.
[15:58:43.368] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 154
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WXC03A
MAC address: 40D85511809A
Hostname: pixelDTB154
Comment:
------------------------------------------------------
[15:58:43.369] <TB1> INFO: RPC call hashes of host and DTB match: 486171790
[15:58:44.931] <TB1> INFO: DUT info:
[15:58:44.931] <TB1> INFO: The DUT currently contains the following objects:
[15:58:44.931] <TB1> INFO: 4 TBM Cores tbm10c (4 ON)
[15:58:44.931] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:58:44.931] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:58:44.931] <TB1> INFO: TBM Core alpha (2): 7 registers set
[15:58:44.931] <TB1> INFO: TBM Core beta (3): 7 registers set
[15:58:44.931] <TB1> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:58:44.931] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:44.932] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:45.333] <TB1> INFO: enter 'restricted' command line mode
[15:58:45.333] <TB1> INFO: enter test to run
[15:58:45.333] <TB1> INFO: test: pretest no parameter change
[15:58:45.333] <TB1> INFO: running: pretest
[15:58:45.338] <TB1> INFO: ######################################################################
[15:58:45.338] <TB1> INFO: PixTestPretest::doTest()
[15:58:45.338] <TB1> INFO: ######################################################################
[15:58:45.339] <TB1> INFO: ----------------------------------------------------------------------
[15:58:45.339] <TB1> INFO: PixTestPretest::programROC()
[15:58:45.339] <TB1> INFO: ----------------------------------------------------------------------
[15:59:03.353] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:59:03.353] <TB1> INFO: IA differences per ROC: 18.5 17.7 19.3 17.7 17.7 19.3 17.7 20.1 18.5 20.9 20.9 18.5 19.3 20.9 21.7 20.1
[15:59:03.427] <TB1> INFO: ----------------------------------------------------------------------
[15:59:03.427] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:59:03.427] <TB1> INFO: ----------------------------------------------------------------------
[15:59:24.734] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[15:59:24.734] <TB1> INFO: i(loss) [mA/ROC]: 19.3 20.9 20.9 20.1 20.9 19.3 19.3 19.3 19.3 19.3 20.1 19.3 19.3 19.3 20.1 19.3
[15:59:24.769] <TB1> INFO: ----------------------------------------------------------------------
[15:59:24.769] <TB1> INFO: PixTestPretest::findTiming()
[15:59:24.769] <TB1> INFO: ----------------------------------------------------------------------
[15:59:24.769] <TB1> INFO: PixTestCmd::init()

[15:59:57.054] <TB1> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:59:57.054] <TB1> INFO: (success/tries = 100/100), width = 3
[15:59:58.633] <TB1> INFO: ----------------------------------------------------------------------
[15:59:58.633] <TB1> INFO: PixTestPretest::findWorkingPixel()
[15:59:58.633] <TB1> INFO: ----------------------------------------------------------------------
[15:59:58.729] <TB1> INFO: Expecting 231680 events.
[16:00:08.640] <TB1> INFO: 231680 events read in total (9319ms).
[16:00:08.650] <TB1> INFO: Test took 10011ms.
[16:00:08.888] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:00:08.926] <TB1> INFO: ----------------------------------------------------------------------
[16:00:08.926] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[16:00:08.926] <TB1> INFO: ----------------------------------------------------------------------
[16:00:09.021] <TB1> INFO: Expecting 231680 events.
[16:00:18.772] <TB1> INFO: 231680 events read in total (9159ms).
[16:00:18.779] <TB1> INFO: Test took 9848ms.
[16:00:19.042] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[16:00:19.042] <TB1> INFO: CalDel: 105 102 110 106 94 94 103 112 111 105 122 102 123 110 94 127
[16:00:19.042] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C1.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C2.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C3.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C4.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C5.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C6.dat
[16:00:19.045] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C7.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C8.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C9.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C10.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C11.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C12.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C13.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C14.dat
[16:00:19.046] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[16:00:19.046] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat
[16:00:19.046] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0b.dat
[16:00:19.046] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1a.dat
[16:00:19.047] <TB1> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[16:00:19.047] <TB1> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[16:00:19.097] <TB1> INFO: enter test to run
[16:00:19.097] <TB1> INFO: test: FullTest no parameter change
[16:00:19.097] <TB1> INFO: running: fulltest
[16:00:19.097] <TB1> INFO: ######################################################################
[16:00:19.097] <TB1> INFO: PixTestFullTest::doTest()
[16:00:19.097] <TB1> INFO: ######################################################################
[16:00:19.099] <TB1> INFO: ######################################################################
[16:00:19.099] <TB1> INFO: PixTestAlive::doTest()
[16:00:19.099] <TB1> INFO: ######################################################################
[16:00:19.100] <TB1> INFO: ----------------------------------------------------------------------
[16:00:19.100] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:19.100] <TB1> INFO: ----------------------------------------------------------------------
[16:00:19.339] <TB1> INFO: Expecting 41600 events.
[16:00:22.832] <TB1> INFO: 41600 events read in total (2902ms).
[16:00:22.833] <TB1> INFO: Test took 3731ms.
[16:00:23.068] <TB1> INFO: PixTestAlive::aliveTest() done
[16:00:23.068] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:23.070] <TB1> INFO: ----------------------------------------------------------------------
[16:00:23.070] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:23.070] <TB1> INFO: ----------------------------------------------------------------------
[16:00:23.333] <TB1> INFO: Expecting 41600 events.
[16:00:26.286] <TB1> INFO: 41600 events read in total (2362ms).
[16:00:26.287] <TB1> INFO: Test took 3215ms.
[16:00:26.287] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:00:26.528] <TB1> INFO: PixTestAlive::maskTest() done
[16:00:26.528] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:26.530] <TB1> INFO: ----------------------------------------------------------------------
[16:00:26.530] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:26.530] <TB1> INFO: ----------------------------------------------------------------------
[16:00:26.767] <TB1> INFO: Expecting 41600 events.
[16:00:30.328] <TB1> INFO: 41600 events read in total (2969ms).
[16:00:30.329] <TB1> INFO: Test took 3798ms.
[16:00:30.565] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[16:00:30.565] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:30.565] <TB1> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:00:30.565] <TB1> INFO: Decoding statistics:
[16:00:30.565] <TB1> INFO: General information:
[16:00:30.565] <TB1> INFO: 16bit words read: 0
[16:00:30.565] <TB1> INFO: valid events total: 0
[16:00:30.565] <TB1> INFO: empty events: 0
[16:00:30.565] <TB1> INFO: valid events with pixels: 0
[16:00:30.565] <TB1> INFO: valid pixel hits: 0
[16:00:30.565] <TB1> INFO: Event errors: 0
[16:00:30.565] <TB1> INFO: start marker: 0
[16:00:30.565] <TB1> INFO: stop marker: 0
[16:00:30.565] <TB1> INFO: overflow: 0
[16:00:30.565] <TB1> INFO: invalid 5bit words: 0
[16:00:30.565] <TB1> INFO: invalid XOR eye diagram: 0
[16:00:30.565] <TB1> INFO: frame (failed synchr.): 0
[16:00:30.565] <TB1> INFO: idle data (no TBM trl): 0
[16:00:30.565] <TB1> INFO: no data (only TBM hdr): 0
[16:00:30.565] <TB1> INFO: TBM errors: 0
[16:00:30.565] <TB1> INFO: flawed TBM headers: 0
[16:00:30.565] <TB1> INFO: flawed TBM trailers: 0
[16:00:30.565] <TB1> INFO: event ID mismatches: 0
[16:00:30.565] <TB1> INFO: ROC errors: 0
[16:00:30.565] <TB1> INFO: missing ROC header(s): 0
[16:00:30.565] <TB1> INFO: misplaced readback start: 0
[16:00:30.565] <TB1> INFO: Pixel decoding errors: 0
[16:00:30.565] <TB1> INFO: pixel data incomplete: 0
[16:00:30.566] <TB1> INFO: pixel address: 0
[16:00:30.566] <TB1> INFO: pulse height fill bit: 0
[16:00:30.566] <TB1> INFO: buffer corruption: 0
[16:00:30.572] <TB1> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:30.573] <TB1> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:00:30.573] <TB1> INFO: ######################################################################
[16:00:30.573] <TB1> INFO: PixTestReadback::doTest()
[16:00:30.573] <TB1> INFO: ######################################################################
[16:00:30.573] <TB1> INFO: ----------------------------------------------------------------------
[16:00:30.573] <TB1> INFO: PixTestReadback::CalibrateVd()
[16:00:30.573] <TB1> INFO: ----------------------------------------------------------------------
[16:00:40.549] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:40.549] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:40.549] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:40.550] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:40.582] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:00:40.582] <TB1> INFO: ----------------------------------------------------------------------
[16:00:40.582] <TB1> INFO: PixTestReadback::CalibrateVa()
[16:00:40.582] <TB1> INFO: ----------------------------------------------------------------------
[16:00:50.508] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:50.509] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:50.510] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:50.510] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:50.510] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:50.540] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:00:50.540] <TB1> INFO: ----------------------------------------------------------------------
[16:00:50.540] <TB1> INFO: PixTestReadback::readbackVbg()
[16:00:50.540] <TB1> INFO: ----------------------------------------------------------------------
[16:00:58.206] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:00:58.206] <TB1> INFO: ----------------------------------------------------------------------
[16:00:58.206] <TB1> INFO: PixTestReadback::getCalibratedVbg()
[16:00:58.206] <TB1> INFO: ----------------------------------------------------------------------
[16:00:58.206] <TB1> INFO: Vbg will be calibrated using Vd calibration
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 150.5calibrated Vbg = 1.18011 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 161.5calibrated Vbg = 1.18202 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 165.5calibrated Vbg = 1.17264 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 162.1calibrated Vbg = 1.17491 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 165.2calibrated Vbg = 1.17628 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.1calibrated Vbg = 1.17598 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151.5calibrated Vbg = 1.18075 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 153.3calibrated Vbg = 1.18135 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 155.2calibrated Vbg = 1.17476 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.6calibrated Vbg = 1.17191 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 144.3calibrated Vbg = 1.17559 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 150.9calibrated Vbg = 1.16154 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.8calibrated Vbg = 1.17676 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.4calibrated Vbg = 1.17543 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.5calibrated Vbg = 1.17588 :::*/*/*/*/
[16:00:58.206] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.2calibrated Vbg = 1.18649 :::*/*/*/*/
[16:00:58.208] <TB1> INFO: ----------------------------------------------------------------------
[16:00:58.208] <TB1> INFO: PixTestReadback::CalibrateIa()
[16:00:58.208] <TB1> INFO: ----------------------------------------------------------------------
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:03:39.070] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:03:39.071] <TB1> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:03:39.099] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[16:03:39.101] <TB1> INFO: PixTestReadback::doTest() done
[16:03:39.102] <TB1> INFO: Decoding statistics:
[16:03:39.102] <TB1> INFO: General information:
[16:03:39.102] <TB1> INFO: 16bit words read: 1536
[16:03:39.102] <TB1> INFO: valid events total: 256
[16:03:39.102] <TB1> INFO: empty events: 256
[16:03:39.102] <TB1> INFO: valid events with pixels: 0
[16:03:39.102] <TB1> INFO: valid pixel hits: 0
[16:03:39.102] <TB1> INFO: Event errors: 0
[16:03:39.102] <TB1> INFO: start marker: 0
[16:03:39.102] <TB1> INFO: stop marker: 0
[16:03:39.102] <TB1> INFO: overflow: 0
[16:03:39.102] <TB1> INFO: invalid 5bit words: 0
[16:03:39.102] <TB1> INFO: invalid XOR eye diagram: 0
[16:03:39.102] <TB1> INFO: frame (failed synchr.): 0
[16:03:39.102] <TB1> INFO: idle data (no TBM trl): 0
[16:03:39.102] <TB1> INFO: no data (only TBM hdr): 0
[16:03:39.102] <TB1> INFO: TBM errors: 0
[16:03:39.102] <TB1> INFO: flawed TBM headers: 0
[16:03:39.102] <TB1> INFO: flawed TBM trailers: 0
[16:03:39.102] <TB1> INFO: event ID mismatches: 0
[16:03:39.102] <TB1> INFO: ROC errors: 0
[16:03:39.102] <TB1> INFO: missing ROC header(s): 0
[16:03:39.102] <TB1> INFO: misplaced readback start: 0
[16:03:39.102] <TB1> INFO: Pixel decoding errors: 0
[16:03:39.102] <TB1> INFO: pixel data incomplete: 0
[16:03:39.102] <TB1> INFO: pixel address: 0
[16:03:39.102] <TB1> INFO: pulse height fill bit: 0
[16:03:39.102] <TB1> INFO: buffer corruption: 0
[16:03:39.155] <TB1> INFO: ######################################################################
[16:03:39.155] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:03:39.155] <TB1> INFO: ######################################################################
[16:03:39.158] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:03:39.186] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:03:39.187] <TB1> INFO: run 1 of 1
[16:03:39.470] <TB1> INFO: Expecting 3120000 events.
[16:04:10.445] <TB1> INFO: 670140 events read in total (30382ms).











[16:04:41.402] <TB1> INFO: 1338805 events read in total (61339ms).











[16:05:12.264] <TB1> INFO: 2006200 events read in total (92201ms).











[16:05:43.198] <TB1> INFO: 2673540 events read in total (123135ms).
[16:06:03.609] <TB1> INFO: 3120000 events read in total (143546ms).
[16:06:03.684] <TB1> INFO: Test took 144498ms.
[16:06:26.479] <TB1> INFO: PixTestBBMap::doTest() done with 1 decoding errors: , duration: 167 seconds
[16:06:26.479] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0
[16:06:26.479] <TB1> INFO: separation cut (per ROC): 101 108 106 105 106 114 102 107 105 106 107 108 105 107 107 107
[16:06:26.480] <TB1> INFO: Decoding statistics:
[16:06:26.480] <TB1> INFO: General information:
[16:06:26.480] <TB1> INFO: 16bit words read: 0
[16:06:26.480] <TB1> INFO: valid events total: 0
[16:06:26.480] <TB1> INFO: empty events: 0
[16:06:26.480] <TB1> INFO: valid events with pixels: 0
[16:06:26.480] <TB1> INFO: valid pixel hits: 0
[16:06:26.480] <TB1> INFO: Event errors: 0
[16:06:26.480] <TB1> INFO: start marker: 0
[16:06:26.480] <TB1> INFO: stop marker: 0
[16:06:26.480] <TB1> INFO: overflow: 0
[16:06:26.480] <TB1> INFO: invalid 5bit words: 0
[16:06:26.480] <TB1> INFO: invalid XOR eye diagram: 0
[16:06:26.480] <TB1> INFO: frame (failed synchr.): 0
[16:06:26.480] <TB1> INFO: idle data (no TBM trl): 0
[16:06:26.480] <TB1> INFO: no data (only TBM hdr): 0
[16:06:26.480] <TB1> INFO: TBM errors: 0
[16:06:26.480] <TB1> INFO: flawed TBM headers: 0
[16:06:26.480] <TB1> INFO: flawed TBM trailers: 0
[16:06:26.480] <TB1> INFO: event ID mismatches: 0
[16:06:26.480] <TB1> INFO: ROC errors: 0
[16:06:26.480] <TB1> INFO: missing ROC header(s): 0
[16:06:26.480] <TB1> INFO: misplaced readback start: 0
[16:06:26.480] <TB1> INFO: Pixel decoding errors: 0
[16:06:26.480] <TB1> INFO: pixel data incomplete: 0
[16:06:26.480] <TB1> INFO: pixel address: 0
[16:06:26.480] <TB1> INFO: pulse height fill bit: 0
[16:06:26.480] <TB1> INFO: buffer corruption: 0
[16:06:26.518] <TB1> INFO: ######################################################################
[16:06:26.518] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:26.518] <TB1> INFO: ######################################################################
[16:06:26.518] <TB1> INFO: ----------------------------------------------------------------------
[16:06:26.518] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:26.518] <TB1> INFO: ----------------------------------------------------------------------
[16:06:26.518] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:06:26.533] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[16:06:26.533] <TB1> INFO: run 1 of 1
[16:06:26.783] <TB1> INFO: Expecting 36608000 events.
[16:06:50.408] <TB1> INFO: 675300 events read in total (23033ms).
[16:07:13.470] <TB1> INFO: 1337900 events read in total (46095ms).
[16:07:36.444] <TB1> INFO: 2002350 events read in total (69069ms).
[16:07:59.609] <TB1> INFO: 2664700 events read in total (92234ms).
[16:08:22.704] <TB1> INFO: 3324400 events read in total (115329ms).
[16:08:45.782] <TB1> INFO: 3983900 events read in total (138407ms).
[16:09:08.939] <TB1> INFO: 4644450 events read in total (161564ms).
[16:09:32.195] <TB1> INFO: 5306050 events read in total (184820ms).
[16:09:54.997] <TB1> INFO: 5966750 events read in total (207622ms).
[16:10:17.711] <TB1> INFO: 6627000 events read in total (230336ms).
[16:10:40.600] <TB1> INFO: 7285650 events read in total (253225ms).
[16:11:03.509] <TB1> INFO: 7943000 events read in total (276134ms).
[16:11:26.535] <TB1> INFO: 8602050 events read in total (299160ms).
[16:11:49.599] <TB1> INFO: 9261800 events read in total (322224ms).
[16:12:12.446] <TB1> INFO: 9920550 events read in total (345071ms).
[16:12:35.590] <TB1> INFO: 10579900 events read in total (368215ms).
[16:12:58.863] <TB1> INFO: 11237850 events read in total (391488ms).
[16:13:21.745] <TB1> INFO: 11896950 events read in total (414370ms).
[16:13:44.510] <TB1> INFO: 12555600 events read in total (437135ms).
[16:14:06.929] <TB1> INFO: 13215650 events read in total (459554ms).
[16:14:29.778] <TB1> INFO: 13874600 events read in total (482403ms).
[16:14:52.601] <TB1> INFO: 14533050 events read in total (505226ms).
[16:15:15.255] <TB1> INFO: 15190350 events read in total (527880ms).
[16:15:38.110] <TB1> INFO: 15845500 events read in total (550735ms).
[16:16:01.081] <TB1> INFO: 16500000 events read in total (573706ms).
[16:16:23.867] <TB1> INFO: 17156200 events read in total (596492ms).
[16:16:46.730] <TB1> INFO: 17811150 events read in total (619355ms).
[16:17:09.665] <TB1> INFO: 18467350 events read in total (642290ms).
[16:17:32.231] <TB1> INFO: 19121650 events read in total (664856ms).
[16:17:55.184] <TB1> INFO: 19776850 events read in total (687809ms).
[16:18:17.770] <TB1> INFO: 20432200 events read in total (710395ms).
[16:18:40.599] <TB1> INFO: 21084750 events read in total (733224ms).
[16:19:03.626] <TB1> INFO: 21738650 events read in total (756251ms).
[16:19:26.573] <TB1> INFO: 22389950 events read in total (779198ms).
[16:19:49.196] <TB1> INFO: 23043400 events read in total (801821ms).
[16:20:11.926] <TB1> INFO: 23696200 events read in total (824551ms).
[16:20:34.831] <TB1> INFO: 24348100 events read in total (847456ms).
[16:20:57.505] <TB1> INFO: 25000150 events read in total (870130ms).
[16:21:20.257] <TB1> INFO: 25651250 events read in total (892882ms).
[16:21:42.834] <TB1> INFO: 26303850 events read in total (915459ms).
[16:22:05.359] <TB1> INFO: 26957250 events read in total (937984ms).
[16:22:27.965] <TB1> INFO: 27609700 events read in total (960590ms).
[16:22:50.699] <TB1> INFO: 28260650 events read in total (983324ms).
[16:23:13.174] <TB1> INFO: 28912000 events read in total (1005799ms).
[16:23:36.160] <TB1> INFO: 29562450 events read in total (1028785ms).
[16:23:58.801] <TB1> INFO: 30210300 events read in total (1051426ms).
[16:24:21.273] <TB1> INFO: 30860250 events read in total (1073898ms).
[16:24:43.968] <TB1> INFO: 31512100 events read in total (1096593ms).
[16:25:06.951] <TB1> INFO: 32164950 events read in total (1119576ms).
[16:25:29.480] <TB1> INFO: 32818750 events read in total (1142105ms).
[16:25:52.353] <TB1> INFO: 33471500 events read in total (1164978ms).
[16:26:15.113] <TB1> INFO: 34126000 events read in total (1187738ms).
[16:26:37.894] <TB1> INFO: 34782450 events read in total (1210519ms).
[16:27:00.597] <TB1> INFO: 35436650 events read in total (1233222ms).
[16:27:23.607] <TB1> INFO: 36093750 events read in total (1256232ms).
[16:27:41.457] <TB1> INFO: 36608000 events read in total (1274082ms).
[16:27:41.578] <TB1> INFO: Test took 1275045ms.
[16:27:42.111] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:43.847] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:45.952] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:47.767] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:49.398] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:51.497] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:53.499] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:55.962] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:57.623] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:27:59.345] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:00.899] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:02.400] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:03.945] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:05.546] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:07.059] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:08.656] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[16:28:10.162] <TB1> INFO: PixTestScurves::scurves() done
[16:28:10.163] <TB1> INFO: Vcal mean: 106.98 116.03 109.20 114.60 107.65 117.14 109.09 111.92 109.66 119.27 111.01 121.83 112.13 103.58 111.67 115.56
[16:28:10.163] <TB1> INFO: Vcal RMS: 4.76 5.60 5.14 5.37 4.67 5.09 4.87 5.16 5.09 6.11 5.05 6.36 5.44 5.06 4.74 5.64
[16:28:10.163] <TB1> INFO: PixTestScurves::fullTest() done, duration: 1303 seconds
[16:28:10.163] <TB1> INFO: Decoding statistics:
[16:28:10.163] <TB1> INFO: General information:
[16:28:10.163] <TB1> INFO: 16bit words read: 0
[16:28:10.163] <TB1> INFO: valid events total: 0
[16:28:10.163] <TB1> INFO: empty events: 0
[16:28:10.163] <TB1> INFO: valid events with pixels: 0
[16:28:10.163] <TB1> INFO: valid pixel hits: 0
[16:28:10.163] <TB1> INFO: Event errors: 0
[16:28:10.163] <TB1> INFO: start marker: 0
[16:28:10.163] <TB1> INFO: stop marker: 0
[16:28:10.163] <TB1> INFO: overflow: 0
[16:28:10.163] <TB1> INFO: invalid 5bit words: 0
[16:28:10.163] <TB1> INFO: invalid XOR eye diagram: 0
[16:28:10.163] <TB1> INFO: frame (failed synchr.): 0
[16:28:10.163] <TB1> INFO: idle data (no TBM trl): 0
[16:28:10.163] <TB1> INFO: no data (only TBM hdr): 0
[16:28:10.163] <TB1> INFO: TBM errors: 0
[16:28:10.163] <TB1> INFO: flawed TBM headers: 0
[16:28:10.163] <TB1> INFO: flawed TBM trailers: 0
[16:28:10.163] <TB1> INFO: event ID mismatches: 0
[16:28:10.163] <TB1> INFO: ROC errors: 0
[16:28:10.163] <TB1> INFO: missing ROC header(s): 0
[16:28:10.163] <TB1> INFO: misplaced readback start: 0
[16:28:10.163] <TB1> INFO: Pixel decoding errors: 0
[16:28:10.163] <TB1> INFO: pixel data incomplete: 0
[16:28:10.163] <TB1> INFO: pixel address: 0
[16:28:10.163] <TB1> INFO: pulse height fill bit: 0
[16:28:10.163] <TB1> INFO: buffer corruption: 0
[16:28:10.227] <TB1> INFO: ######################################################################
[16:28:10.227] <TB1> INFO: PixTestTrim::doTest()
[16:28:10.227] <TB1> INFO: ######################################################################
[16:28:10.228] <TB1> INFO: ----------------------------------------------------------------------
[16:28:10.228] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:28:10.228] <TB1> INFO: ----------------------------------------------------------------------
[16:28:10.269] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:28:10.269] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:28:10.282] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:28:10.283] <TB1> INFO: run 1 of 1
[16:28:10.519] <TB1> INFO: Expecting 5025280 events.
[16:28:40.880] <TB1> INFO: 819736 events read in total (29758ms).
[16:29:10.983] <TB1> INFO: 1635480 events read in total (59861ms).
[16:29:40.995] <TB1> INFO: 2449408 events read in total (89874ms).
[16:30:10.983] <TB1> INFO: 3260176 events read in total (119862ms).
[16:30:41.150] <TB1> INFO: 4067296 events read in total (150028ms).
[16:31:11.295] <TB1> INFO: 4873624 events read in total (180173ms).
[16:31:17.379] <TB1> INFO: 5025280 events read in total (186257ms).
[16:31:17.432] <TB1> INFO: Test took 187149ms.
[16:31:36.842] <TB1> INFO: ROC 0 VthrComp = 108
[16:31:36.843] <TB1> INFO: ROC 1 VthrComp = 125
[16:31:36.843] <TB1> INFO: ROC 2 VthrComp = 115
[16:31:36.843] <TB1> INFO: ROC 3 VthrComp = 116
[16:31:36.843] <TB1> INFO: ROC 4 VthrComp = 114
[16:31:36.843] <TB1> INFO: ROC 5 VthrComp = 121
[16:31:36.843] <TB1> INFO: ROC 6 VthrComp = 107
[16:31:36.843] <TB1> INFO: ROC 7 VthrComp = 115
[16:31:36.843] <TB1> INFO: ROC 8 VthrComp = 109
[16:31:36.843] <TB1> INFO: ROC 9 VthrComp = 115
[16:31:36.844] <TB1> INFO: ROC 10 VthrComp = 112
[16:31:36.844] <TB1> INFO: ROC 11 VthrComp = 125
[16:31:36.844] <TB1> INFO: ROC 12 VthrComp = 115
[16:31:36.844] <TB1> INFO: ROC 13 VthrComp = 115
[16:31:36.844] <TB1> INFO: ROC 14 VthrComp = 120
[16:31:36.844] <TB1> INFO: ROC 15 VthrComp = 113
[16:31:37.083] <TB1> INFO: Expecting 41600 events.
[16:31:40.596] <TB1> INFO: 41600 events read in total (2922ms).
[16:31:40.597] <TB1> INFO: Test took 3751ms.
[16:31:40.608] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:31:40.608] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:31:40.621] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:31:40.621] <TB1> INFO: run 1 of 1
[16:31:40.899] <TB1> INFO: Expecting 5025280 events.
[16:32:06.916] <TB1> INFO: 590456 events read in total (25426ms).
[16:32:32.601] <TB1> INFO: 1179696 events read in total (51111ms).
[16:32:58.440] <TB1> INFO: 1769160 events read in total (76950ms).
[16:33:24.076] <TB1> INFO: 2357536 events read in total (102586ms).
[16:33:50.239] <TB1> INFO: 2944320 events read in total (128749ms).
[16:34:15.721] <TB1> INFO: 3529576 events read in total (154231ms).
[16:34:41.382] <TB1> INFO: 4114184 events read in total (179892ms).
[16:35:07.191] <TB1> INFO: 4699440 events read in total (205701ms).
[16:35:21.612] <TB1> INFO: 5025280 events read in total (220122ms).
[16:35:21.689] <TB1> INFO: Test took 221068ms.
[16:35:49.039] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.867 for pixel 0/1 mean/min/max = 47.8353/34.7743/60.8963
[16:35:49.039] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.8078 for pixel 0/77 mean/min/max = 45.4695/31.088/59.851
[16:35:49.040] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 59.3629 for pixel 15/3 mean/min/max = 45.5392/31.7055/59.3729
[16:35:49.040] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 60.8387 for pixel 46/73 mean/min/max = 46.3973/31.8952/60.8995
[16:35:49.040] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 58.0597 for pixel 2/2 mean/min/max = 45.0922/32.0635/58.1209
[16:35:49.041] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.9301 for pixel 51/5 mean/min/max = 46.2214/32.2788/60.1641
[16:35:49.041] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 62.837 for pixel 17/4 mean/min/max = 48.7349/34.5502/62.9195
[16:35:49.042] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 60.472 for pixel 26/0 mean/min/max = 46.3249/32.1239/60.5258
[16:35:49.042] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 62.9489 for pixel 0/13 mean/min/max = 48.1941/33.2405/63.1478
[16:35:49.043] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 63.9461 for pixel 21/3 mean/min/max = 47.6008/31.0135/64.1881
[16:35:49.043] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.4917 for pixel 13/4 mean/min/max = 46.4289/32.3378/60.5201
[16:35:49.043] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 60.4242 for pixel 15/78 mean/min/max = 45.7902/30.9523/60.6282
[16:35:49.044] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 59.2272 for pixel 3/40 mean/min/max = 45.6165/31.7212/59.5119
[16:35:49.044] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.2017 for pixel 0/36 mean/min/max = 44.8269/32.3484/57.3055
[16:35:49.044] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 59.1826 for pixel 0/10 mean/min/max = 45.9263/32.6389/59.2137
[16:35:49.045] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 62.6532 for pixel 13/71 mean/min/max = 47.2513/31.8149/62.6878
[16:35:49.045] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:35:49.134] <TB1> INFO: Expecting 411648 events.
[16:35:58.413] <TB1> INFO: 411648 events read in total (8688ms).
[16:35:58.421] <TB1> INFO: Expecting 411648 events.
[16:36:07.763] <TB1> INFO: 411648 events read in total (8939ms).
[16:36:07.772] <TB1> INFO: Expecting 411648 events.
[16:36:17.173] <TB1> INFO: 411648 events read in total (8998ms).
[16:36:17.188] <TB1> INFO: Expecting 411648 events.
[16:36:26.486] <TB1> INFO: 411648 events read in total (8895ms).
[16:36:26.502] <TB1> INFO: Expecting 411648 events.
[16:36:35.886] <TB1> INFO: 411648 events read in total (8981ms).
[16:36:35.904] <TB1> INFO: Expecting 411648 events.
[16:36:45.336] <TB1> INFO: 411648 events read in total (9029ms).
[16:36:45.358] <TB1> INFO: Expecting 411648 events.
[16:36:54.741] <TB1> INFO: 411648 events read in total (8980ms).
[16:36:54.768] <TB1> INFO: Expecting 411648 events.
[16:37:04.146] <TB1> INFO: 411648 events read in total (8975ms).
[16:37:04.182] <TB1> INFO: Expecting 411648 events.
[16:37:13.593] <TB1> INFO: 411648 events read in total (9007ms).
[16:37:13.634] <TB1> INFO: Expecting 411648 events.
[16:37:23.063] <TB1> INFO: 411648 events read in total (9026ms).
[16:37:23.122] <TB1> INFO: Expecting 411648 events.
[16:37:32.496] <TB1> INFO: 411648 events read in total (8971ms).
[16:37:32.534] <TB1> INFO: Expecting 411648 events.
[16:37:41.937] <TB1> INFO: 411648 events read in total (9000ms).
[16:37:42.013] <TB1> INFO: Expecting 411648 events.
[16:37:51.495] <TB1> INFO: 411648 events read in total (9079ms).
[16:37:51.539] <TB1> INFO: Expecting 411648 events.
[16:38:00.901] <TB1> INFO: 411648 events read in total (8959ms).
[16:38:00.985] <TB1> INFO: Expecting 411648 events.
[16:38:10.415] <TB1> INFO: 411648 events read in total (9027ms).
[16:38:10.465] <TB1> INFO: Expecting 411648 events.
[16:38:19.716] <TB1> INFO: 411648 events read in total (8848ms).
[16:38:19.777] <TB1> INFO: Test took 150732ms.
[16:38:20.540] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:38:20.554] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:38:20.554] <TB1> INFO: run 1 of 1
[16:38:20.791] <TB1> INFO: Expecting 5025280 events.
[16:38:47.602] <TB1> INFO: 589064 events read in total (26219ms).
[16:39:13.714] <TB1> INFO: 1174832 events read in total (52331ms).
[16:39:40.256] <TB1> INFO: 1762480 events read in total (78873ms).
[16:40:06.685] <TB1> INFO: 2349048 events read in total (105302ms).
[16:40:32.813] <TB1> INFO: 2934808 events read in total (131431ms).
[16:40:59.179] <TB1> INFO: 3521256 events read in total (157796ms).
[16:41:25.285] <TB1> INFO: 4107200 events read in total (183902ms).
[16:41:51.464] <TB1> INFO: 4694264 events read in total (210081ms).
[16:42:06.587] <TB1> INFO: 5025280 events read in total (225204ms).
[16:42:06.710] <TB1> INFO: Test took 226157ms.
[16:42:32.492] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 3.183122 .. 147.041209
[16:42:32.732] <TB1> INFO: Expecting 208000 events.
[16:42:42.221] <TB1> INFO: 208000 events read in total (8897ms).
[16:42:42.223] <TB1> INFO: Test took 9729ms.
[16:42:42.278] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 157 (-1/-1) hits flags = 528 (plus default)
[16:42:42.293] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:42:42.294] <TB1> INFO: run 1 of 1
[16:42:42.581] <TB1> INFO: Expecting 5158400 events.
[16:43:08.602] <TB1> INFO: 581096 events read in total (25429ms).
[16:43:34.012] <TB1> INFO: 1162000 events read in total (50839ms).
[16:43:59.495] <TB1> INFO: 1743024 events read in total (76322ms).
[16:44:25.053] <TB1> INFO: 2324032 events read in total (101880ms).
[16:44:51.309] <TB1> INFO: 2904552 events read in total (128136ms).
[16:45:16.989] <TB1> INFO: 3485096 events read in total (153816ms).
[16:45:42.724] <TB1> INFO: 4064816 events read in total (179551ms).
[16:46:08.302] <TB1> INFO: 4643952 events read in total (205129ms).
[16:46:31.363] <TB1> INFO: 5158400 events read in total (228190ms).
[16:46:31.495] <TB1> INFO: Test took 229201ms.
[16:46:56.856] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 27.420413 .. 45.426228
[16:46:57.094] <TB1> INFO: Expecting 208000 events.
[16:47:06.612] <TB1> INFO: 208000 events read in total (8926ms).
[16:47:06.613] <TB1> INFO: Test took 9755ms.
[16:47:06.660] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:47:06.674] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:47:06.674] <TB1> INFO: run 1 of 1
[16:47:06.954] <TB1> INFO: Expecting 1297920 events.
[16:47:35.610] <TB1> INFO: 657824 events read in total (28065ms).
[16:48:03.473] <TB1> INFO: 1297920 events read in total (55929ms).
[16:48:03.509] <TB1> INFO: Test took 56836ms.
[16:48:17.568] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 25.259489 .. 46.417004
[16:48:17.804] <TB1> INFO: Expecting 208000 events.
[16:48:27.579] <TB1> INFO: 208000 events read in total (9183ms).
[16:48:27.580] <TB1> INFO: Test took 10011ms.
[16:48:27.627] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 15 .. 56 (-1/-1) hits flags = 528 (plus default)
[16:48:27.641] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:48:27.641] <TB1> INFO: run 1 of 1
[16:48:27.920] <TB1> INFO: Expecting 1397760 events.
[16:48:56.363] <TB1> INFO: 663072 events read in total (27852ms).
[16:49:24.222] <TB1> INFO: 1325280 events read in total (55712ms).
[16:49:27.661] <TB1> INFO: 1397760 events read in total (59150ms).
[16:49:27.699] <TB1> INFO: Test took 60057ms.
[16:49:42.588] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.233309 .. 44.241387
[16:49:42.825] <TB1> INFO: Expecting 208000 events.
[16:49:52.562] <TB1> INFO: 208000 events read in total (9145ms).
[16:49:52.563] <TB1> INFO: Test took 9974ms.
[16:49:52.620] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 54 (-1/-1) hits flags = 528 (plus default)
[16:49:52.632] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:49:52.632] <TB1> INFO: run 1 of 1
[16:49:52.910] <TB1> INFO: Expecting 1397760 events.
[16:50:21.372] <TB1> INFO: 679504 events read in total (27870ms).
[16:50:50.315] <TB1> INFO: 1358744 events read in total (56813ms).
[16:50:52.364] <TB1> INFO: 1397760 events read in total (58862ms).
[16:50:52.391] <TB1> INFO: Test took 59759ms.
[16:51:04.711] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:51:04.711] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:51:04.727] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[16:51:04.727] <TB1> INFO: run 1 of 1
[16:51:04.995] <TB1> INFO: Expecting 1364480 events.
[16:51:33.439] <TB1> INFO: 667560 events read in total (27851ms).
[16:52:01.302] <TB1> INFO: 1334128 events read in total (55714ms).
[16:52:03.244] <TB1> INFO: 1364480 events read in total (57656ms).
[16:52:03.279] <TB1> INFO: Test took 58552ms.
[16:52:15.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[16:52:15.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[16:52:15.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[16:52:15.680] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[16:52:15.681] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[16:52:15.682] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[16:52:15.682] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[16:52:15.682] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[16:52:15.682] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C0.dat
[16:52:15.691] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C1.dat
[16:52:15.696] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C2.dat
[16:52:15.701] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C3.dat
[16:52:15.706] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C4.dat
[16:52:15.710] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C5.dat
[16:52:15.715] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C6.dat
[16:52:15.720] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C7.dat
[16:52:15.725] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C8.dat
[16:52:15.729] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C9.dat
[16:52:15.734] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C10.dat
[16:52:15.739] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C11.dat
[16:52:15.744] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C12.dat
[16:52:15.748] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C13.dat
[16:52:15.753] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C14.dat
[16:52:15.758] <TB1> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C15.dat
[16:52:15.762] <TB1> INFO: PixTestTrim::trimTest() done
[16:52:15.762] <TB1> INFO: vtrim: 137 124 133 131 115 130 124 126 141 138 118 117 121 107 125 126
[16:52:15.763] <TB1> INFO: vthrcomp: 108 125 115 116 114 121 107 115 109 115 112 125 115 115 120 113
[16:52:15.763] <TB1> INFO: vcal mean: 34.98 34.92 34.95 34.98 34.93 34.97 34.99 34.94 35.04 35.04 34.94 34.97 34.95 34.93 35.01 34.97
[16:52:15.763] <TB1> INFO: vcal RMS: 0.96 1.08 0.96 1.09 0.99 1.01 1.01 1.01 0.99 1.30 1.02 1.15 1.07 0.95 1.04 1.07
[16:52:15.763] <TB1> INFO: bits mean: 8.38 9.50 9.68 9.85 9.52 9.24 8.43 9.45 8.85 9.31 9.55 9.74 9.87 9.13 9.28 9.59
[16:52:15.763] <TB1> INFO: bits RMS: 2.67 2.91 2.65 2.49 2.74 2.78 2.65 2.69 2.68 2.89 2.58 2.73 2.58 2.90 2.78 2.62
[16:52:15.770] <TB1> INFO: ----------------------------------------------------------------------
[16:52:15.770] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:52:15.770] <TB1> INFO: ----------------------------------------------------------------------
[16:52:15.772] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:52:15.785] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:52:15.785] <TB1> INFO: run 1 of 1
[16:52:16.026] <TB1> INFO: Expecting 4160000 events.
[16:52:48.387] <TB1> INFO: 743810 events read in total (31769ms).
[16:53:19.946] <TB1> INFO: 1481155 events read in total (63328ms).
[16:53:51.347] <TB1> INFO: 2214865 events read in total (94730ms).
[16:54:22.981] <TB1> INFO: 2944285 events read in total (126363ms).
[16:54:54.480] <TB1> INFO: 3671170 events read in total (157862ms).
[16:55:16.066] <TB1> INFO: 4160000 events read in total (179448ms).
[16:55:16.203] <TB1> INFO: Test took 180418ms.
[16:55:41.830] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:55:41.844] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:55:41.844] <TB1> INFO: run 1 of 1
[16:55:42.081] <TB1> INFO: Expecting 4180800 events.
[16:56:13.798] <TB1> INFO: 717445 events read in total (31126ms).
[16:56:44.956] <TB1> INFO: 1429705 events read in total (62284ms).
[16:57:15.909] <TB1> INFO: 2138860 events read in total (93237ms).
[16:57:46.797] <TB1> INFO: 2844140 events read in total (124125ms).
[16:58:17.654] <TB1> INFO: 3546420 events read in total (154982ms).
[16:58:45.450] <TB1> INFO: 4180800 events read in total (182778ms).
[16:58:45.529] <TB1> INFO: Test took 183685ms.
[16:59:14.744] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[16:59:14.758] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[16:59:14.758] <TB1> INFO: run 1 of 1
[16:59:15.038] <TB1> INFO: Expecting 3848000 events.
[16:59:46.903] <TB1> INFO: 739670 events read in total (31273ms).
[17:00:18.612] <TB1> INFO: 1473515 events read in total (62982ms).
[17:00:50.157] <TB1> INFO: 2202295 events read in total (94527ms).
[17:01:21.572] <TB1> INFO: 2927015 events read in total (125942ms).
[17:01:53.294] <TB1> INFO: 3650965 events read in total (157664ms).
[17:02:02.106] <TB1> INFO: 3848000 events read in total (166476ms).
[17:02:02.194] <TB1> INFO: Test took 167435ms.
[17:02:29.941] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[17:02:29.956] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:02:29.956] <TB1> INFO: run 1 of 1
[17:02:30.218] <TB1> INFO: Expecting 3848000 events.
[17:03:02.489] <TB1> INFO: 739855 events read in total (31679ms).
[17:03:33.663] <TB1> INFO: 1473925 events read in total (62853ms).
[17:04:04.938] <TB1> INFO: 2203045 events read in total (94128ms).
[17:04:36.430] <TB1> INFO: 2927540 events read in total (125620ms).
[17:05:07.848] <TB1> INFO: 3651575 events read in total (157038ms).
[17:05:16.373] <TB1> INFO: 3848000 events read in total (165563ms).
[17:05:16.490] <TB1> INFO: Test took 166534ms.
[17:05:41.354] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[17:05:41.369] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[17:05:41.369] <TB1> INFO: run 1 of 1
[17:05:41.644] <TB1> INFO: Expecting 3848000 events.
[17:06:13.970] <TB1> INFO: 740260 events read in total (31734ms).
[17:06:45.956] <TB1> INFO: 1474600 events read in total (63720ms).
[17:07:17.932] <TB1> INFO: 2203755 events read in total (95696ms).
[17:07:49.462] <TB1> INFO: 2928405 events read in total (127226ms).
[17:08:21.108] <TB1> INFO: 3652370 events read in total (158872ms).
[17:08:29.970] <TB1> INFO: 3848000 events read in total (167734ms).
[17:08:30.049] <TB1> INFO: Test took 168680ms.
[17:08:55.329] <TB1> INFO: PixTestTrim::trimBitTest() done
[17:08:55.330] <TB1> INFO: PixTestTrim::doTest() done, duration: 2445 seconds
[17:08:55.330] <TB1> INFO: Decoding statistics:
[17:08:55.330] <TB1> INFO: General information:
[17:08:55.330] <TB1> INFO: 16bit words read: 0
[17:08:55.330] <TB1> INFO: valid events total: 0
[17:08:55.330] <TB1> INFO: empty events: 0
[17:08:55.330] <TB1> INFO: valid events with pixels: 0
[17:08:55.330] <TB1> INFO: valid pixel hits: 0
[17:08:55.330] <TB1> INFO: Event errors: 0
[17:08:55.330] <TB1> INFO: start marker: 0
[17:08:55.330] <TB1> INFO: stop marker: 0
[17:08:55.330] <TB1> INFO: overflow: 0
[17:08:55.330] <TB1> INFO: invalid 5bit words: 0
[17:08:55.330] <TB1> INFO: invalid XOR eye diagram: 0
[17:08:55.330] <TB1> INFO: frame (failed synchr.): 0
[17:08:55.330] <TB1> INFO: idle data (no TBM trl): 0
[17:08:55.330] <TB1> INFO: no data (only TBM hdr): 0
[17:08:55.330] <TB1> INFO: TBM errors: 0
[17:08:55.330] <TB1> INFO: flawed TBM headers: 0
[17:08:55.330] <TB1> INFO: flawed TBM trailers: 0
[17:08:55.330] <TB1> INFO: event ID mismatches: 0
[17:08:55.330] <TB1> INFO: ROC errors: 0
[17:08:55.330] <TB1> INFO: missing ROC header(s): 0
[17:08:55.330] <TB1> INFO: misplaced readback start: 0
[17:08:55.330] <TB1> INFO: Pixel decoding errors: 0
[17:08:55.330] <TB1> INFO: pixel data incomplete: 0
[17:08:55.330] <TB1> INFO: pixel address: 0
[17:08:55.330] <TB1> INFO: pulse height fill bit: 0
[17:08:55.330] <TB1> INFO: buffer corruption: 0
[17:08:55.944] <TB1> INFO: ######################################################################
[17:08:55.944] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:08:55.944] <TB1> INFO: ######################################################################
[17:08:56.224] <TB1> INFO: Expecting 41600 events.
[17:08:59.861] <TB1> INFO: 41600 events read in total (3045ms).
[17:08:59.862] <TB1> INFO: Test took 3917ms.
[17:09:00.343] <TB1> INFO: Expecting 41600 events.
[17:09:03.931] <TB1> INFO: 41600 events read in total (2996ms).
[17:09:03.932] <TB1> INFO: Test took 3864ms.
[17:09:04.237] <TB1> INFO: Expecting 41600 events.
[17:09:07.801] <TB1> INFO: 41600 events read in total (2973ms).
[17:09:07.802] <TB1> INFO: Test took 3843ms.
[17:09:08.112] <TB1> INFO: Expecting 41600 events.
[17:09:11.611] <TB1> INFO: 41600 events read in total (2907ms).
[17:09:11.612] <TB1> INFO: Test took 3786ms.
[17:09:11.902] <TB1> INFO: Expecting 41600 events.
[17:09:15.437] <TB1> INFO: 41600 events read in total (2944ms).
[17:09:15.438] <TB1> INFO: Test took 3801ms.
[17:09:15.792] <TB1> INFO: Expecting 41600 events.
[17:09:19.251] <TB1> INFO: 41600 events read in total (2867ms).
[17:09:19.252] <TB1> INFO: Test took 3785ms.
[17:09:19.541] <TB1> INFO: Expecting 41600 events.
[17:09:23.083] <TB1> INFO: 41600 events read in total (2950ms).
[17:09:23.084] <TB1> INFO: Test took 3807ms.
[17:09:23.376] <TB1> INFO: Expecting 41600 events.
[17:09:26.866] <TB1> INFO: 41600 events read in total (2898ms).
[17:09:26.867] <TB1> INFO: Test took 3755ms.
[17:09:27.156] <TB1> INFO: Expecting 41600 events.
[17:09:30.748] <TB1> INFO: 41600 events read in total (3000ms).
[17:09:30.749] <TB1> INFO: Test took 3857ms.
[17:09:31.039] <TB1> INFO: Expecting 41600 events.
[17:09:34.614] <TB1> INFO: 41600 events read in total (2984ms).
[17:09:34.615] <TB1> INFO: Test took 3841ms.
[17:09:34.907] <TB1> INFO: Expecting 41600 events.
[17:09:38.469] <TB1> INFO: 41600 events read in total (2971ms).
[17:09:38.470] <TB1> INFO: Test took 3828ms.
[17:09:38.759] <TB1> INFO: Expecting 41600 events.
[17:09:42.278] <TB1> INFO: 41600 events read in total (2927ms).
[17:09:42.279] <TB1> INFO: Test took 3785ms.
[17:09:42.568] <TB1> INFO: Expecting 41600 events.
[17:09:46.066] <TB1> INFO: 41600 events read in total (2906ms).
[17:09:46.067] <TB1> INFO: Test took 3763ms.
[17:09:46.356] <TB1> INFO: Expecting 41600 events.
[17:09:49.950] <TB1> INFO: 41600 events read in total (3002ms).
[17:09:49.951] <TB1> INFO: Test took 3859ms.
[17:09:50.240] <TB1> INFO: Expecting 41600 events.
[17:09:53.756] <TB1> INFO: 41600 events read in total (2924ms).
[17:09:53.757] <TB1> INFO: Test took 3781ms.
[17:09:54.056] <TB1> INFO: Expecting 41600 events.
[17:09:57.566] <TB1> INFO: 41600 events read in total (2918ms).
[17:09:57.567] <TB1> INFO: Test took 3783ms.
[17:09:57.858] <TB1> INFO: Expecting 41600 events.
[17:10:01.414] <TB1> INFO: 41600 events read in total (2964ms).
[17:10:01.415] <TB1> INFO: Test took 3821ms.
[17:10:01.705] <TB1> INFO: Expecting 41600 events.
[17:10:05.243] <TB1> INFO: 41600 events read in total (2947ms).
[17:10:05.244] <TB1> INFO: Test took 3804ms.
[17:10:05.535] <TB1> INFO: Expecting 41600 events.
[17:10:08.002] <TB1> INFO: 41600 events read in total (2875ms).
[17:10:08.003] <TB1> INFO: Test took 3732ms.
[17:10:09.292] <TB1> INFO: Expecting 41600 events.
[17:10:12.772] <TB1> INFO: 41600 events read in total (2888ms).
[17:10:12.773] <TB1> INFO: Test took 3746ms.
[17:10:13.062] <TB1> INFO: Expecting 41600 events.
[17:10:16.529] <TB1> INFO: 41600 events read in total (2875ms).
[17:10:16.530] <TB1> INFO: Test took 3733ms.
[17:10:16.820] <TB1> INFO: Expecting 41600 events.
[17:10:20.324] <TB1> INFO: 41600 events read in total (2913ms).
[17:10:20.325] <TB1> INFO: Test took 3770ms.
[17:10:20.614] <TB1> INFO: Expecting 41600 events.
[17:10:24.142] <TB1> INFO: 41600 events read in total (2936ms).
[17:10:24.143] <TB1> INFO: Test took 3793ms.
[17:10:24.433] <TB1> INFO: Expecting 41600 events.
[17:10:27.946] <TB1> INFO: 41600 events read in total (2922ms).
[17:10:27.947] <TB1> INFO: Test took 3779ms.
[17:10:28.236] <TB1> INFO: Expecting 41600 events.
[17:10:31.901] <TB1> INFO: 41600 events read in total (3073ms).
[17:10:31.902] <TB1> INFO: Test took 3930ms.
[17:10:32.213] <TB1> INFO: Expecting 41600 events.
[17:10:35.832] <TB1> INFO: 41600 events read in total (3028ms).
[17:10:35.833] <TB1> INFO: Test took 3904ms.
[17:10:36.127] <TB1> INFO: Expecting 41600 events.
[17:10:39.634] <TB1> INFO: 41600 events read in total (2915ms).
[17:10:39.635] <TB1> INFO: Test took 3773ms.
[17:10:39.956] <TB1> INFO: Expecting 41600 events.
[17:10:43.724] <TB1> INFO: 41600 events read in total (3176ms).
[17:10:43.725] <TB1> INFO: Test took 4065ms.
[17:10:44.019] <TB1> INFO: Expecting 41600 events.
[17:10:47.694] <TB1> INFO: 41600 events read in total (3084ms).
[17:10:47.696] <TB1> INFO: Test took 3942ms.
[17:10:47.989] <TB1> INFO: Expecting 2560 events.
[17:10:48.876] <TB1> INFO: 2560 events read in total (295ms).
[17:10:48.876] <TB1> INFO: Test took 1164ms.
[17:10:49.185] <TB1> INFO: Expecting 2560 events.
[17:10:50.070] <TB1> INFO: 2560 events read in total (293ms).
[17:10:50.070] <TB1> INFO: Test took 1194ms.
[17:10:50.377] <TB1> INFO: Expecting 2560 events.
[17:10:51.259] <TB1> INFO: 2560 events read in total (291ms).
[17:10:51.259] <TB1> INFO: Test took 1188ms.
[17:10:51.567] <TB1> INFO: Expecting 2560 events.
[17:10:52.455] <TB1> INFO: 2560 events read in total (296ms).
[17:10:52.456] <TB1> INFO: Test took 1196ms.
[17:10:52.763] <TB1> INFO: Expecting 2560 events.
[17:10:53.647] <TB1> INFO: 2560 events read in total (292ms).
[17:10:53.647] <TB1> INFO: Test took 1191ms.
[17:10:53.955] <TB1> INFO: Expecting 2560 events.
[17:10:54.837] <TB1> INFO: 2560 events read in total (290ms).
[17:10:54.837] <TB1> INFO: Test took 1190ms.
[17:10:55.145] <TB1> INFO: Expecting 2560 events.
[17:10:56.029] <TB1> INFO: 2560 events read in total (293ms).
[17:10:56.030] <TB1> INFO: Test took 1192ms.
[17:10:56.338] <TB1> INFO: Expecting 2560 events.
[17:10:57.228] <TB1> INFO: 2560 events read in total (298ms).
[17:10:57.228] <TB1> INFO: Test took 1198ms.
[17:10:57.536] <TB1> INFO: Expecting 2560 events.
[17:10:58.420] <TB1> INFO: 2560 events read in total (293ms).
[17:10:58.421] <TB1> INFO: Test took 1192ms.
[17:10:58.729] <TB1> INFO: Expecting 2560 events.
[17:10:59.609] <TB1> INFO: 2560 events read in total (289ms).
[17:10:59.609] <TB1> INFO: Test took 1188ms.
[17:10:59.917] <TB1> INFO: Expecting 2560 events.
[17:11:00.809] <TB1> INFO: 2560 events read in total (300ms).
[17:11:00.809] <TB1> INFO: Test took 1198ms.
[17:11:01.117] <TB1> INFO: Expecting 2560 events.
[17:11:01.001] <TB1> INFO: 2560 events read in total (293ms).
[17:11:01.001] <TB1> INFO: Test took 1191ms.
[17:11:02.309] <TB1> INFO: Expecting 2560 events.
[17:11:03.206] <TB1> INFO: 2560 events read in total (306ms).
[17:11:03.206] <TB1> INFO: Test took 1204ms.
[17:11:03.514] <TB1> INFO: Expecting 2560 events.
[17:11:04.402] <TB1> INFO: 2560 events read in total (296ms).
[17:11:04.402] <TB1> INFO: Test took 1195ms.
[17:11:04.710] <TB1> INFO: Expecting 2560 events.
[17:11:05.594] <TB1> INFO: 2560 events read in total (292ms).
[17:11:05.594] <TB1> INFO: Test took 1191ms.
[17:11:05.902] <TB1> INFO: Expecting 2560 events.
[17:11:06.796] <TB1> INFO: 2560 events read in total (302ms).
[17:11:06.796] <TB1> INFO: Test took 1201ms.
[17:11:06.802] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:11:07.104] <TB1> INFO: Expecting 655360 events.
[17:11:22.027] <TB1> INFO: 655360 events read in total (14331ms).
[17:11:22.041] <TB1> INFO: Expecting 655360 events.
[17:11:36.849] <TB1> INFO: 655360 events read in total (14404ms).
[17:11:36.866] <TB1> INFO: Expecting 655360 events.
[17:11:51.618] <TB1> INFO: 655360 events read in total (14348ms).
[17:11:51.640] <TB1> INFO: Expecting 655360 events.
[17:12:06.362] <TB1> INFO: 655360 events read in total (14319ms).
[17:12:06.387] <TB1> INFO: Expecting 655360 events.
[17:12:21.344] <TB1> INFO: 655360 events read in total (14553ms).
[17:12:21.372] <TB1> INFO: Expecting 655360 events.
[17:12:35.892] <TB1> INFO: 655360 events read in total (14116ms).
[17:12:35.926] <TB1> INFO: Expecting 655360 events.
[17:12:50.621] <TB1> INFO: 655360 events read in total (14292ms).
[17:12:50.674] <TB1> INFO: Expecting 655360 events.
[17:13:05.384] <TB1> INFO: 655360 events read in total (14307ms).
[17:13:05.426] <TB1> INFO: Expecting 655360 events.
[17:13:19.903] <TB1> INFO: 655360 events read in total (14074ms).
[17:13:19.967] <TB1> INFO: Expecting 655360 events.
[17:13:34.432] <TB1> INFO: 655360 events read in total (14062ms).
[17:13:34.487] <TB1> INFO: Expecting 655360 events.
[17:13:48.921] <TB1> INFO: 655360 events read in total (14031ms).
[17:13:49.050] <TB1> INFO: Expecting 655360 events.
[17:14:03.489] <TB1> INFO: 655360 events read in total (14036ms).
[17:14:03.592] <TB1> INFO: Expecting 655360 events.
[17:14:18.095] <TB1> INFO: 655360 events read in total (14100ms).
[17:14:18.176] <TB1> INFO: Expecting 655360 events.
[17:14:32.616] <TB1> INFO: 655360 events read in total (14037ms).
[17:14:32.736] <TB1> INFO: Expecting 655360 events.
[17:14:47.206] <TB1> INFO: 655360 events read in total (14067ms).
[17:14:47.351] <TB1> INFO: Expecting 655360 events.
[17:15:01.796] <TB1> INFO: 655360 events read in total (14042ms).
[17:15:01.912] <TB1> INFO: Test took 235110ms.
[17:15:02.009] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:15:02.266] <TB1> INFO: Expecting 655360 events.
[17:15:16.506] <TB1> INFO: 655360 events read in total (13648ms).
[17:15:16.520] <TB1> INFO: Expecting 655360 events.
[17:15:30.801] <TB1> INFO: 655360 events read in total (13878ms).
[17:15:30.821] <TB1> INFO: Expecting 655360 events.
[17:15:45.039] <TB1> INFO: 655360 events read in total (13814ms).
[17:15:45.059] <TB1> INFO: Expecting 655360 events.
[17:15:59.602] <TB1> INFO: 655360 events read in total (14140ms).
[17:15:59.627] <TB1> INFO: Expecting 655360 events.
[17:16:13.988] <TB1> INFO: 655360 events read in total (13958ms).
[17:16:14.016] <TB1> INFO: Expecting 655360 events.
[17:16:28.604] <TB1> INFO: 655360 events read in total (14185ms).
[17:16:28.638] <TB1> INFO: Expecting 655360 events.
[17:16:43.121] <TB1> INFO: 655360 events read in total (14080ms).
[17:16:43.162] <TB1> INFO: Expecting 655360 events.
[17:16:57.769] <TB1> INFO: 655360 events read in total (14204ms).
[17:16:57.812] <TB1> INFO: Expecting 655360 events.
[17:17:12.179] <TB1> INFO: 655360 events read in total (13964ms).
[17:17:12.228] <TB1> INFO: Expecting 655360 events.
[17:17:26.591] <TB1> INFO: 655360 events read in total (13960ms).
[17:17:26.644] <TB1> INFO: Expecting 655360 events.
[17:17:41.191] <TB1> INFO: 655360 events read in total (14144ms).
[17:17:41.301] <TB1> INFO: Expecting 655360 events.
[17:17:55.838] <TB1> INFO: 655360 events read in total (14134ms).
[17:17:55.914] <TB1> INFO: Expecting 655360 events.
[17:18:10.280] <TB1> INFO: 655360 events read in total (13963ms).
[17:18:10.363] <TB1> INFO: Expecting 655360 events.
[17:18:24.900] <TB1> INFO: 655360 events read in total (14134ms).
[17:18:24.001] <TB1> INFO: Expecting 655360 events.
[17:18:39.462] <TB1> INFO: 655360 events read in total (14058ms).
[17:18:39.555] <TB1> INFO: Expecting 655360 events.
[17:18:54.075] <TB1> INFO: 655360 events read in total (14117ms).
[17:18:54.174] <TB1> INFO: Test took 232165ms.
[17:18:54.374] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.379] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:18:54.385] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.391] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:18:54.397] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:18:54.404] <TB1> INFO: safety margin for low PH: adding 3, margin is now 23
[17:18:54.410] <TB1> INFO: safety margin for low PH: adding 4, margin is now 24
[17:18:54.416] <TB1> INFO: safety margin for low PH: adding 5, margin is now 25
[17:18:54.424] <TB1> INFO: safety margin for low PH: adding 6, margin is now 26
[17:18:54.433] <TB1> INFO: safety margin for low PH: adding 7, margin is now 27
[17:18:54.440] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.447] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.454] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.461] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:18:54.469] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.475] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.482] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:18:54.489] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.496] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.503] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.509] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.514] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[17:18:54.520] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[17:18:54.526] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.532] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.537] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.543] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.550] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[17:18:54.586] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[17:18:54.587] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[17:18:54.588] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[17:18:54.589] <TB1> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[17:18:54.834] <TB1> INFO: Expecting 41600 events.
[17:18:58.033] <TB1> INFO: 41600 events read in total (2608ms).
[17:18:58.033] <TB1> INFO: Test took 3440ms.
[17:18:58.492] <TB1> INFO: Expecting 41600 events.
[17:19:01.584] <TB1> INFO: 41600 events read in total (2500ms).
[17:19:01.586] <TB1> INFO: Test took 3338ms.
[17:19:02.041] <TB1> INFO: Expecting 41600 events.
[17:19:05.176] <TB1> INFO: 41600 events read in total (2543ms).
[17:19:05.176] <TB1> INFO: Test took 3375ms.
[17:19:05.392] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:05.481] <TB1> INFO: Expecting 2560 events.
[17:19:06.373] <TB1> INFO: 2560 events read in total (301ms).
[17:19:06.373] <TB1> INFO: Test took 981ms.
[17:19:06.377] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:06.682] <TB1> INFO: Expecting 2560 events.
[17:19:07.568] <TB1> INFO: 2560 events read in total (294ms).
[17:19:07.569] <TB1> INFO: Test took 1192ms.
[17:19:07.573] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:07.877] <TB1> INFO: Expecting 2560 events.
[17:19:08.765] <TB1> INFO: 2560 events read in total (297ms).
[17:19:08.765] <TB1> INFO: Test took 1192ms.
[17:19:08.769] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:09.072] <TB1> INFO: Expecting 2560 events.
[17:19:09.963] <TB1> INFO: 2560 events read in total (299ms).
[17:19:09.964] <TB1> INFO: Test took 1195ms.
[17:19:09.966] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:10.272] <TB1> INFO: Expecting 2560 events.
[17:19:11.161] <TB1> INFO: 2560 events read in total (297ms).
[17:19:11.162] <TB1> INFO: Test took 1196ms.
[17:19:11.164] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:11.471] <TB1> INFO: Expecting 2560 events.
[17:19:12.364] <TB1> INFO: 2560 events read in total (301ms).
[17:19:12.365] <TB1> INFO: Test took 1201ms.
[17:19:12.369] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:12.673] <TB1> INFO: Expecting 2560 events.
[17:19:13.568] <TB1> INFO: 2560 events read in total (303ms).
[17:19:13.568] <TB1> INFO: Test took 1199ms.
[17:19:13.572] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:13.877] <TB1> INFO: Expecting 2560 events.
[17:19:14.773] <TB1> INFO: 2560 events read in total (304ms).
[17:19:14.773] <TB1> INFO: Test took 1202ms.
[17:19:14.777] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:15.082] <TB1> INFO: Expecting 2560 events.
[17:19:15.971] <TB1> INFO: 2560 events read in total (297ms).
[17:19:15.971] <TB1> INFO: Test took 1194ms.
[17:19:15.974] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:16.279] <TB1> INFO: Expecting 2560 events.
[17:19:17.163] <TB1> INFO: 2560 events read in total (292ms).
[17:19:17.163] <TB1> INFO: Test took 1189ms.
[17:19:17.165] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:17.472] <TB1> INFO: Expecting 2560 events.
[17:19:18.361] <TB1> INFO: 2560 events read in total (297ms).
[17:19:18.361] <TB1> INFO: Test took 1196ms.
[17:19:18.364] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:18.669] <TB1> INFO: Expecting 2560 events.
[17:19:19.555] <TB1> INFO: 2560 events read in total (295ms).
[17:19:19.555] <TB1> INFO: Test took 1191ms.
[17:19:19.559] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:19.863] <TB1> INFO: Expecting 2560 events.
[17:19:20.754] <TB1> INFO: 2560 events read in total (299ms).
[17:19:20.754] <TB1> INFO: Test took 1195ms.
[17:19:20.757] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:21.062] <TB1> INFO: Expecting 2560 events.
[17:19:21.951] <TB1> INFO: 2560 events read in total (298ms).
[17:19:21.952] <TB1> INFO: Test took 1195ms.
[17:19:21.956] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:22.260] <TB1> INFO: Expecting 2560 events.
[17:19:23.144] <TB1> INFO: 2560 events read in total (292ms).
[17:19:23.144] <TB1> INFO: Test took 1189ms.
[17:19:23.148] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:23.454] <TB1> INFO: Expecting 2560 events.
[17:19:24.337] <TB1> INFO: 2560 events read in total (291ms).
[17:19:24.338] <TB1> INFO: Test took 1190ms.
[17:19:24.340] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:24.645] <TB1> INFO: Expecting 2560 events.
[17:19:25.528] <TB1> INFO: 2560 events read in total (291ms).
[17:19:25.528] <TB1> INFO: Test took 1188ms.
[17:19:25.530] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:25.837] <TB1> INFO: Expecting 2560 events.
[17:19:26.730] <TB1> INFO: 2560 events read in total (302ms).
[17:19:26.730] <TB1> INFO: Test took 1200ms.
[17:19:26.733] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:27.038] <TB1> INFO: Expecting 2560 events.
[17:19:27.927] <TB1> INFO: 2560 events read in total (297ms).
[17:19:27.928] <TB1> INFO: Test took 1195ms.
[17:19:27.932] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:28.236] <TB1> INFO: Expecting 2560 events.
[17:19:29.121] <TB1> INFO: 2560 events read in total (293ms).
[17:19:29.121] <TB1> INFO: Test took 1189ms.
[17:19:29.123] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:29.431] <TB1> INFO: Expecting 2560 events.
[17:19:30.311] <TB1> INFO: 2560 events read in total (289ms).
[17:19:30.312] <TB1> INFO: Test took 1189ms.
[17:19:30.316] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:30.620] <TB1> INFO: Expecting 2560 events.
[17:19:31.509] <TB1> INFO: 2560 events read in total (297ms).
[17:19:31.509] <TB1> INFO: Test took 1194ms.
[17:19:31.514] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:31.817] <TB1> INFO: Expecting 2560 events.
[17:19:32.701] <TB1> INFO: 2560 events read in total (292ms).
[17:19:32.701] <TB1> INFO: Test took 1187ms.
[17:19:32.705] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:33.009] <TB1> INFO: Expecting 2560 events.
[17:19:33.891] <TB1> INFO: 2560 events read in total (290ms).
[17:19:33.892] <TB1> INFO: Test took 1187ms.
[17:19:33.896] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:34.199] <TB1> INFO: Expecting 2560 events.
[17:19:35.084] <TB1> INFO: 2560 events read in total (293ms).
[17:19:35.084] <TB1> INFO: Test took 1188ms.
[17:19:35.088] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:35.392] <TB1> INFO: Expecting 2560 events.
[17:19:36.282] <TB1> INFO: 2560 events read in total (298ms).
[17:19:36.282] <TB1> INFO: Test took 1195ms.
[17:19:36.285] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:36.589] <TB1> INFO: Expecting 2560 events.
[17:19:37.484] <TB1> INFO: 2560 events read in total (303ms).
[17:19:37.484] <TB1> INFO: Test took 1199ms.
[17:19:37.487] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:37.792] <TB1> INFO: Expecting 2560 events.
[17:19:38.677] <TB1> INFO: 2560 events read in total (293ms).
[17:19:38.677] <TB1> INFO: Test took 1190ms.
[17:19:38.681] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:38.986] <TB1> INFO: Expecting 2560 events.
[17:19:39.881] <TB1> INFO: 2560 events read in total (303ms).
[17:19:39.881] <TB1> INFO: Test took 1200ms.
[17:19:39.885] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:40.190] <TB1> INFO: Expecting 2560 events.
[17:19:41.078] <TB1> INFO: 2560 events read in total (297ms).
[17:19:41.078] <TB1> INFO: Test took 1193ms.
[17:19:41.081] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:41.386] <TB1> INFO: Expecting 2560 events.
[17:19:42.281] <TB1> INFO: 2560 events read in total (303ms).
[17:19:42.281] <TB1> INFO: Test took 1200ms.
[17:19:42.284] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:42.589] <TB1> INFO: Expecting 2560 events.
[17:19:43.482] <TB1> INFO: 2560 events read in total (301ms).
[17:19:43.483] <TB1> INFO: Test took 1199ms.
[17:19:43.956] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 648 seconds
[17:19:43.956] <TB1> INFO: PH scale (per ROC): 63 48 43 63 50 44 48 50 36 44 36 54 61 55 55 48
[17:19:43.956] <TB1> INFO: PH offset (per ROC): 124 102 106 123 93 102 122 107 106 98 105 119 132 129 126 135
[17:19:43.965] <TB1> INFO: Decoding statistics:
[17:19:43.965] <TB1> INFO: General information:
[17:19:43.965] <TB1> INFO: 16bit words read: 127882
[17:19:43.965] <TB1> INFO: valid events total: 20480
[17:19:43.965] <TB1> INFO: empty events: 17979
[17:19:43.965] <TB1> INFO: valid events with pixels: 2501
[17:19:43.965] <TB1> INFO: valid pixel hits: 2501
[17:19:43.965] <TB1> INFO: Event errors: 0
[17:19:43.965] <TB1> INFO: start marker: 0
[17:19:43.965] <TB1> INFO: stop marker: 0
[17:19:43.965] <TB1> INFO: overflow: 0
[17:19:43.965] <TB1> INFO: invalid 5bit words: 0
[17:19:43.965] <TB1> INFO: invalid XOR eye diagram: 0
[17:19:43.965] <TB1> INFO: frame (failed synchr.): 0
[17:19:43.965] <TB1> INFO: idle data (no TBM trl): 0
[17:19:43.965] <TB1> INFO: no data (only TBM hdr): 0
[17:19:43.965] <TB1> INFO: TBM errors: 0
[17:19:43.965] <TB1> INFO: flawed TBM headers: 0
[17:19:43.965] <TB1> INFO: flawed TBM trailers: 0
[17:19:43.965] <TB1> INFO: event ID mismatches: 0
[17:19:43.965] <TB1> INFO: ROC errors: 0
[17:19:43.965] <TB1> INFO: missing ROC header(s): 0
[17:19:43.965] <TB1> INFO: misplaced readback start: 0
[17:19:43.965] <TB1> INFO: Pixel decoding errors: 0
[17:19:43.965] <TB1> INFO: pixel data incomplete: 0
[17:19:43.965] <TB1> INFO: pixel address: 0
[17:19:43.965] <TB1> INFO: pulse height fill bit: 0
[17:19:43.965] <TB1> INFO: buffer corruption: 0
[17:19:44.121] <TB1> INFO: ######################################################################
[17:19:44.121] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:19:44.121] <TB1> INFO: ######################################################################
[17:19:44.136] <TB1> INFO: scanning low vcal = 10
[17:19:44.417] <TB1> INFO: Expecting 41600 events.
[17:19:47.979] <TB1> INFO: 41600 events read in total (2970ms).
[17:19:47.979] <TB1> INFO: Test took 3843ms.
[17:19:47.981] <TB1> INFO: scanning low vcal = 20
[17:19:48.278] <TB1> INFO: Expecting 41600 events.
[17:19:51.852] <TB1> INFO: 41600 events read in total (2982ms).
[17:19:51.853] <TB1> INFO: Test took 3871ms.
[17:19:51.856] <TB1> INFO: scanning low vcal = 30
[17:19:52.152] <TB1> INFO: Expecting 41600 events.
[17:19:55.843] <TB1> INFO: 41600 events read in total (3100ms).
[17:19:55.844] <TB1> INFO: Test took 3988ms.
[17:19:55.846] <TB1> INFO: scanning low vcal = 40
[17:19:56.123] <TB1> INFO: Expecting 41600 events.
[17:20:00.126] <TB1> INFO: 41600 events read in total (3411ms).
[17:20:00.127] <TB1> INFO: Test took 4281ms.
[17:20:00.131] <TB1> INFO: scanning low vcal = 50
[17:20:00.407] <TB1> INFO: Expecting 41600 events.
[17:20:04.357] <TB1> INFO: 41600 events read in total (3358ms).
[17:20:04.357] <TB1> INFO: Test took 4226ms.
[17:20:04.361] <TB1> INFO: scanning low vcal = 60
[17:20:04.637] <TB1> INFO: Expecting 41600 events.
[17:20:08.635] <TB1> INFO: 41600 events read in total (3406ms).
[17:20:08.636] <TB1> INFO: Test took 4275ms.
[17:20:08.639] <TB1> INFO: scanning low vcal = 70
[17:20:08.916] <TB1> INFO: Expecting 41600 events.
[17:20:12.943] <TB1> INFO: 41600 events read in total (3435ms).
[17:20:12.944] <TB1> INFO: Test took 4305ms.
[17:20:12.947] <TB1> INFO: scanning low vcal = 80
[17:20:13.223] <TB1> INFO: Expecting 41600 events.
[17:20:17.215] <TB1> INFO: 41600 events read in total (3400ms).
[17:20:17.216] <TB1> INFO: Test took 4269ms.
[17:20:17.220] <TB1> INFO: scanning low vcal = 90
[17:20:17.496] <TB1> INFO: Expecting 41600 events.
[17:20:21.537] <TB1> INFO: 41600 events read in total (3450ms).
[17:20:21.538] <TB1> INFO: Test took 4318ms.
[17:20:21.542] <TB1> INFO: scanning low vcal = 100
[17:20:21.826] <TB1> INFO: Expecting 41600 events.
[17:20:25.860] <TB1> INFO: 41600 events read in total (3442ms).
[17:20:25.861] <TB1> INFO: Test took 4319ms.
[17:20:25.864] <TB1> INFO: scanning low vcal = 110
[17:20:26.141] <TB1> INFO: Expecting 41600 events.
[17:20:30.192] <TB1> INFO: 41600 events read in total (3459ms).
[17:20:30.193] <TB1> INFO: Test took 4329ms.
[17:20:30.196] <TB1> INFO: scanning low vcal = 120
[17:20:30.472] <TB1> INFO: Expecting 41600 events.
[17:20:34.491] <TB1> INFO: 41600 events read in total (3427ms).
[17:20:34.491] <TB1> INFO: Test took 4295ms.
[17:20:34.494] <TB1> INFO: scanning low vcal = 130
[17:20:34.772] <TB1> INFO: Expecting 41600 events.
[17:20:38.813] <TB1> INFO: 41600 events read in total (3449ms).
[17:20:38.814] <TB1> INFO: Test took 4320ms.
[17:20:38.817] <TB1> INFO: scanning low vcal = 140
[17:20:39.095] <TB1> INFO: Expecting 41600 events.
[17:20:43.114] <TB1> INFO: 41600 events read in total (3428ms).
[17:20:43.115] <TB1> INFO: Test took 4298ms.
[17:20:43.118] <TB1> INFO: scanning low vcal = 150
[17:20:43.395] <TB1> INFO: Expecting 41600 events.
[17:20:47.415] <TB1> INFO: 41600 events read in total (3428ms).
[17:20:47.416] <TB1> INFO: Test took 4298ms.
[17:20:47.419] <TB1> INFO: scanning low vcal = 160
[17:20:47.697] <TB1> INFO: Expecting 41600 events.
[17:20:51.730] <TB1> INFO: 41600 events read in total (3442ms).
[17:20:51.731] <TB1> INFO: Test took 4312ms.
[17:20:51.734] <TB1> INFO: scanning low vcal = 170
[17:20:52.012] <TB1> INFO: Expecting 41600 events.
[17:20:56.026] <TB1> INFO: 41600 events read in total (3422ms).
[17:20:56.027] <TB1> INFO: Test took 4293ms.
[17:20:56.032] <TB1> INFO: scanning low vcal = 180
[17:20:56.307] <TB1> INFO: Expecting 41600 events.
[17:21:00.350] <TB1> INFO: 41600 events read in total (3451ms).
[17:21:00.351] <TB1> INFO: Test took 4319ms.
[17:21:00.354] <TB1> INFO: scanning low vcal = 190
[17:21:00.632] <TB1> INFO: Expecting 41600 events.
[17:21:04.674] <TB1> INFO: 41600 events read in total (3450ms).
[17:21:04.675] <TB1> INFO: Test took 4321ms.
[17:21:04.678] <TB1> INFO: scanning low vcal = 200
[17:21:04.955] <TB1> INFO: Expecting 41600 events.
[17:21:08.974] <TB1> INFO: 41600 events read in total (3427ms).
[17:21:08.975] <TB1> INFO: Test took 4297ms.
[17:21:08.980] <TB1> INFO: scanning low vcal = 210
[17:21:09.255] <TB1> INFO: Expecting 41600 events.
[17:21:13.279] <TB1> INFO: 41600 events read in total (3432ms).
[17:21:13.280] <TB1> INFO: Test took 4300ms.
[17:21:13.283] <TB1> INFO: scanning low vcal = 220
[17:21:13.561] <TB1> INFO: Expecting 41600 events.
[17:21:17.594] <TB1> INFO: 41600 events read in total (3443ms).
[17:21:17.596] <TB1> INFO: Test took 4313ms.
[17:21:17.599] <TB1> INFO: scanning low vcal = 230
[17:21:17.876] <TB1> INFO: Expecting 41600 events.
[17:21:21.878] <TB1> INFO: 41600 events read in total (3411ms).
[17:21:21.879] <TB1> INFO: Test took 4280ms.
[17:21:21.882] <TB1> INFO: scanning low vcal = 240
[17:21:22.159] <TB1> INFO: Expecting 41600 events.
[17:21:26.178] <TB1> INFO: 41600 events read in total (3427ms).
[17:21:26.179] <TB1> INFO: Test took 4297ms.
[17:21:26.183] <TB1> INFO: scanning low vcal = 250
[17:21:26.459] <TB1> INFO: Expecting 41600 events.
[17:21:30.468] <TB1> INFO: 41600 events read in total (3417ms).
[17:21:30.469] <TB1> INFO: Test took 4286ms.
[17:21:30.473] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[17:21:30.750] <TB1> INFO: Expecting 41600 events.
[17:21:34.783] <TB1> INFO: 41600 events read in total (3441ms).
[17:21:34.784] <TB1> INFO: Test took 4310ms.
[17:21:34.789] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[17:21:35.064] <TB1> INFO: Expecting 41600 events.
[17:21:39.080] <TB1> INFO: 41600 events read in total (3424ms).
[17:21:39.081] <TB1> INFO: Test took 4292ms.
[17:21:39.085] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[17:21:39.362] <TB1> INFO: Expecting 41600 events.
[17:21:43.376] <TB1> INFO: 41600 events read in total (3423ms).
[17:21:43.377] <TB1> INFO: Test took 4292ms.
[17:21:43.381] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[17:21:43.657] <TB1> INFO: Expecting 41600 events.
[17:21:47.684] <TB1> INFO: 41600 events read in total (3435ms).
[17:21:47.685] <TB1> INFO: Test took 4304ms.
[17:21:47.688] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:21:47.969] <TB1> INFO: Expecting 41600 events.
[17:21:52.014] <TB1> INFO: 41600 events read in total (3454ms).
[17:21:52.015] <TB1> INFO: Test took 4327ms.
[17:21:52.438] <TB1> INFO: PixTestGainPedestal::measure() done
[17:22:26.933] <TB1> INFO: PixTestGainPedestal::fit() done
[17:22:26.933] <TB1> INFO: non-linearity mean: 0.983 0.923 0.903 0.986 0.948 0.928 0.979 0.956 0.935 0.929 0.943 0.984 0.983 0.975 0.980 0.977
[17:22:26.933] <TB1> INFO: non-linearity RMS: 0.004 0.083 0.125 0.003 0.063 0.131 0.003 0.047 0.126 0.127 0.176 0.003 0.004 0.005 0.004 0.006
[17:22:26.933] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:22:26.949] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:22:26.962] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:22:26.975] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:22:26.988] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:22:26.001] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:22:27.014] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:22:27.027] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:22:27.040] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:22:27.054] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:22:27.067] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:22:27.080] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:22:27.093] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:22:27.106] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:22:27.119] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:22:27.132] <TB1> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1074_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:22:27.145] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 163 seconds
[17:22:27.145] <TB1> INFO: Decoding statistics:
[17:22:27.145] <TB1> INFO: General information:
[17:22:27.145] <TB1> INFO: 16bit words read: 3327906
[17:22:27.145] <TB1> INFO: valid events total: 332800
[17:22:27.145] <TB1> INFO: empty events: 0
[17:22:27.145] <TB1> INFO: valid events with pixels: 332800
[17:22:27.145] <TB1> INFO: valid pixel hits: 665553
[17:22:27.145] <TB1> INFO: Event errors: 0
[17:22:27.145] <TB1> INFO: start marker: 0
[17:22:27.145] <TB1> INFO: stop marker: 0
[17:22:27.145] <TB1> INFO: overflow: 0
[17:22:27.145] <TB1> INFO: invalid 5bit words: 0
[17:22:27.145] <TB1> INFO: invalid XOR eye diagram: 0
[17:22:27.145] <TB1> INFO: frame (failed synchr.): 0
[17:22:27.145] <TB1> INFO: idle data (no TBM trl): 0
[17:22:27.145] <TB1> INFO: no data (only TBM hdr): 0
[17:22:27.145] <TB1> INFO: TBM errors: 0
[17:22:27.145] <TB1> INFO: flawed TBM headers: 0
[17:22:27.145] <TB1> INFO: flawed TBM trailers: 0
[17:22:27.145] <TB1> INFO: event ID mismatches: 0
[17:22:27.145] <TB1> INFO: ROC errors: 0
[17:22:27.145] <TB1> INFO: missing ROC header(s): 0
[17:22:27.145] <TB1> INFO: misplaced readback start: 0
[17:22:27.145] <TB1> INFO: Pixel decoding errors: 0
[17:22:27.145] <TB1> INFO: pixel data incomplete: 0
[17:22:27.145] <TB1> INFO: pixel address: 0
[17:22:27.145] <TB1> INFO: pulse height fill bit: 0
[17:22:27.145] <TB1> INFO: buffer corruption: 0
[17:22:27.159] <TB1> INFO: Decoding statistics:
[17:22:27.159] <TB1> INFO: General information:
[17:22:27.159] <TB1> INFO: 16bit words read: 3457324
[17:22:27.159] <TB1> INFO: valid events total: 353536
[17:22:27.159] <TB1> INFO: empty events: 18235
[17:22:27.159] <TB1> INFO: valid events with pixels: 335301
[17:22:27.159] <TB1> INFO: valid pixel hits: 668054
[17:22:27.159] <TB1> INFO: Event errors: 0
[17:22:27.159] <TB1> INFO: start marker: 0
[17:22:27.160] <TB1> INFO: stop marker: 0
[17:22:27.160] <TB1> INFO: overflow: 0
[17:22:27.160] <TB1> INFO: invalid 5bit words: 0
[17:22:27.160] <TB1> INFO: invalid XOR eye diagram: 0
[17:22:27.160] <TB1> INFO: frame (failed synchr.): 0
[17:22:27.160] <TB1> INFO: idle data (no TBM trl): 0
[17:22:27.160] <TB1> INFO: no data (only TBM hdr): 0
[17:22:27.160] <TB1> INFO: TBM errors: 0
[17:22:27.160] <TB1> INFO: flawed TBM headers: 0
[17:22:27.160] <TB1> INFO: flawed TBM trailers: 0
[17:22:27.160] <TB1> INFO: event ID mismatches: 0
[17:22:27.160] <TB1> INFO: ROC errors: 0
[17:22:27.160] <TB1> INFO: missing ROC header(s): 0
[17:22:27.160] <TB1> INFO: misplaced readback start: 0
[17:22:27.160] <TB1> INFO: Pixel decoding errors: 0
[17:22:27.160] <TB1> INFO: pixel data incomplete: 0
[17:22:27.160] <TB1> INFO: pixel address: 0
[17:22:27.160] <TB1> INFO: pulse height fill bit: 0
[17:22:27.160] <TB1> INFO: buffer corruption: 0
[17:22:27.160] <TB1> INFO: enter test to run
[17:22:27.160] <TB1> INFO: test: exit no parameter change
[17:22:27.285] <TB1> QUIET: Connection to board 154 closed.
[17:22:27.286] <TB1> INFO: pXar: this is the end, my friend