[17:34:12.945] <TB0> INFO: *** Welcome to pxar ***
[17:34:12.945] <TB0> INFO: *** Today: 2016/10/25
[17:34:12.951] <TB0> INFO: *** Version: c8ba-dirty
[17:34:12.951] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C15.dat
[17:34:12.951] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1b.dat
[17:34:12.951] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//defaultMaskFile.dat
[17:34:12.952] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters_C15.dat
[17:34:13.010] <TB0> INFO: clk: 4
[17:34:13.010] <TB0> INFO: ctr: 4
[17:34:13.010] <TB0> INFO: sda: 19
[17:34:13.010] <TB0> INFO: tin: 9
[17:34:13.010] <TB0> INFO: level: 15
[17:34:13.010] <TB0> INFO: triggerdelay: 0
[17:34:13.010] <TB0> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[17:34:13.010] <TB0> INFO: Log level: INFO
[17:34:13.019] <TB0> INFO: Found DTB DTB_WRQ4OZ
[17:34:13.029] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[17:34:13.031] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[17:34:13.033] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[17:34:14.518] <TB0> INFO: DUT info:
[17:34:14.518] <TB0> INFO: The DUT currently contains the following objects:
[17:34:14.518] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[17:34:14.518] <TB0> INFO: TBM Core alpha (0): 7 registers set
[17:34:14.518] <TB0> INFO: TBM Core beta (1): 7 registers set
[17:34:14.518] <TB0> INFO: TBM Core alpha (2): 7 registers set
[17:34:14.518] <TB0> INFO: TBM Core beta (3): 7 registers set
[17:34:14.518] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[17:34:14.518] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.518] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[17:34:14.919] <TB0> INFO: enter 'restricted' command line mode
[17:34:14.919] <TB0> INFO: enter test to run
[17:34:14.919] <TB0> INFO: test: pretest no parameter change
[17:34:14.919] <TB0> INFO: running: pretest
[17:34:14.924] <TB0> INFO: ######################################################################
[17:34:14.924] <TB0> INFO: PixTestPretest::doTest()
[17:34:14.924] <TB0> INFO: ######################################################################
[17:34:14.925] <TB0> INFO: ----------------------------------------------------------------------
[17:34:14.925] <TB0> INFO: PixTestPretest::programROC()
[17:34:14.925] <TB0> INFO: ----------------------------------------------------------------------
[17:34:32.939] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[17:34:32.939] <TB0> INFO: IA differences per ROC: 16.1 19.3 19.3 19.3 20.1 16.9 16.9 19.3 20.1 21.7 17.7 19.3 16.1 18.5 20.1 19.3
[17:34:33.005] <TB0> INFO: ----------------------------------------------------------------------
[17:34:33.005] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[17:34:33.005] <TB0> INFO: ----------------------------------------------------------------------
[17:34:54.281] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 394.7 mA = 24.6687 mA/ROC
[17:34:54.281] <TB0> INFO: i(loss) [mA/ROC]: 19.3 20.9 20.1 19.3 20.1 20.1 18.5 20.1 20.1 20.1 20.1 19.3 20.1 20.1 20.1 20.1
[17:34:54.315] <TB0> INFO: ----------------------------------------------------------------------
[17:34:54.315] <TB0> INFO: PixTestPretest::findTiming()
[17:34:54.315] <TB0> INFO: ----------------------------------------------------------------------
[17:34:54.315] <TB0> INFO: PixTestCmd::init()

[17:35:26.772] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[17:35:26.772] <TB0> INFO: (success/tries = 100/100), width = 4
[17:35:28.276] <TB0> INFO: ----------------------------------------------------------------------
[17:35:28.276] <TB0> INFO: PixTestPretest::findWorkingPixel()
[17:35:28.276] <TB0> INFO: ----------------------------------------------------------------------
[17:35:28.372] <TB0> INFO: Expecting 231680 events.
[17:35:38.245] <TB0> INFO: 231680 events read in total (9281ms).
[17:35:38.253] <TB0> INFO: Test took 9973ms.
[17:35:38.503] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[17:35:38.539] <TB0> INFO: ----------------------------------------------------------------------
[17:35:38.539] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[17:35:38.539] <TB0> INFO: ----------------------------------------------------------------------
[17:35:38.633] <TB0> INFO: Expecting 231680 events.
[17:35:48.553] <TB0> INFO: 231680 events read in total (9328ms).
[17:35:48.563] <TB0> INFO: Test took 10020ms.
[17:35:48.834] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[17:35:48.834] <TB0> INFO: CalDel: 86 91 94 90 92 75 92 84 113 88 82 99 91 92 83 87
[17:35:48.834] <TB0> INFO: VthrComp: 51 56 51 51 51 56 51 51 52 53 54 54 53 58 52 52
[17:35:48.837] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C0.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C1.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C2.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C3.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C4.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C5.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C6.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C7.dat
[17:35:48.838] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C8.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C9.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C10.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C11.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C12.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C13.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C14.dat
[17:35:48.839] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters_C15.dat
[17:35:48.840] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0a.dat
[17:35:48.840] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C0b.dat
[17:35:48.840] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1a.dat
[17:35:48.840] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//tbmParameters_C1b.dat
[17:35:48.840] <TB0> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[17:35:48.895] <TB0> INFO: enter test to run
[17:35:48.895] <TB0> INFO: test: FullTest no parameter change
[17:35:48.895] <TB0> INFO: running: fulltest
[17:35:48.895] <TB0> INFO: ######################################################################
[17:35:48.895] <TB0> INFO: PixTestFullTest::doTest()
[17:35:48.895] <TB0> INFO: ######################################################################
[17:35:48.896] <TB0> INFO: ######################################################################
[17:35:48.896] <TB0> INFO: PixTestAlive::doTest()
[17:35:48.896] <TB0> INFO: ######################################################################
[17:35:48.897] <TB0> INFO: ----------------------------------------------------------------------
[17:35:48.897] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:35:48.897] <TB0> INFO: ----------------------------------------------------------------------
[17:35:49.137] <TB0> INFO: Expecting 41600 events.
[17:35:52.664] <TB0> INFO: 41600 events read in total (2935ms).
[17:35:52.665] <TB0> INFO: Test took 3767ms.
[17:35:52.899] <TB0> INFO: PixTestAlive::aliveTest() done
[17:35:52.899] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[17:35:52.900] <TB0> INFO: ----------------------------------------------------------------------
[17:35:52.900] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:35:52.901] <TB0> INFO: ----------------------------------------------------------------------
[17:35:53.142] <TB0> INFO: Expecting 41600 events.
[17:35:56.138] <TB0> INFO: 41600 events read in total (2404ms).
[17:35:56.139] <TB0> INFO: Test took 3236ms.
[17:35:56.139] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[17:35:56.375] <TB0> INFO: PixTestAlive::maskTest() done
[17:35:56.375] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:35:56.376] <TB0> INFO: ----------------------------------------------------------------------
[17:35:56.376] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[17:35:56.376] <TB0> INFO: ----------------------------------------------------------------------
[17:35:56.616] <TB0> INFO: Expecting 41600 events.
[17:36:00.083] <TB0> INFO: 41600 events read in total (2875ms).
[17:36:00.084] <TB0> INFO: Test took 3706ms.
[17:36:00.312] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[17:36:00.312] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[17:36:00.312] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[17:36:00.312] <TB0> INFO: Decoding statistics:
[17:36:00.312] <TB0> INFO: General information:
[17:36:00.312] <TB0> INFO: 16bit words read: 0
[17:36:00.312] <TB0> INFO: valid events total: 0
[17:36:00.312] <TB0> INFO: empty events: 0
[17:36:00.312] <TB0> INFO: valid events with pixels: 0
[17:36:00.312] <TB0> INFO: valid pixel hits: 0
[17:36:00.312] <TB0> INFO: Event errors: 0
[17:36:00.312] <TB0> INFO: start marker: 0
[17:36:00.312] <TB0> INFO: stop marker: 0
[17:36:00.312] <TB0> INFO: overflow: 0
[17:36:00.312] <TB0> INFO: invalid 5bit words: 0
[17:36:00.312] <TB0> INFO: invalid XOR eye diagram: 0
[17:36:00.312] <TB0> INFO: frame (failed synchr.): 0
[17:36:00.312] <TB0> INFO: idle data (no TBM trl): 0
[17:36:00.312] <TB0> INFO: no data (only TBM hdr): 0
[17:36:00.312] <TB0> INFO: TBM errors: 0
[17:36:00.312] <TB0> INFO: flawed TBM headers: 0
[17:36:00.312] <TB0> INFO: flawed TBM trailers: 0
[17:36:00.312] <TB0> INFO: event ID mismatches: 0
[17:36:00.312] <TB0> INFO: ROC errors: 0
[17:36:00.312] <TB0> INFO: missing ROC header(s): 0
[17:36:00.312] <TB0> INFO: misplaced readback start: 0
[17:36:00.312] <TB0> INFO: Pixel decoding errors: 0
[17:36:00.312] <TB0> INFO: pixel data incomplete: 0
[17:36:00.312] <TB0> INFO: pixel address: 0
[17:36:00.312] <TB0> INFO: pulse height fill bit: 0
[17:36:00.312] <TB0> INFO: buffer corruption: 0
[17:36:00.318] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:00.318] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr_C15.dat

[17:36:00.318] <TB0> INFO: ######################################################################
[17:36:00.318] <TB0> INFO: PixTestReadback::doTest()
[17:36:00.318] <TB0> INFO: ######################################################################
[17:36:00.318] <TB0> INFO: ----------------------------------------------------------------------
[17:36:00.318] <TB0> INFO: PixTestReadback::CalibrateVd()
[17:36:00.318] <TB0> INFO: ----------------------------------------------------------------------
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:36:10.277] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:36:10.278] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:10.311] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:36:10.311] <TB0> INFO: ----------------------------------------------------------------------
[17:36:10.311] <TB0> INFO: PixTestReadback::CalibrateVa()
[17:36:10.311] <TB0> INFO: ----------------------------------------------------------------------
[17:36:20.243] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:36:20.243] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:36:20.244] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:36:20.245] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:36:20.278] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:36:20.278] <TB0> INFO: ----------------------------------------------------------------------
[17:36:20.278] <TB0> INFO: PixTestReadback::readbackVbg()
[17:36:20.278] <TB0> INFO: ----------------------------------------------------------------------
[17:36:27.947] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:36:27.947] <TB0> INFO: ----------------------------------------------------------------------
[17:36:27.947] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[17:36:27.947] <TB0> INFO: ----------------------------------------------------------------------
[17:36:27.948] <TB0> INFO: Vbg will be calibrated using Vd calibration
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.8calibrated Vbg = 1.18917 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.4calibrated Vbg = 1.18567 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.8calibrated Vbg = 1.18534 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 159calibrated Vbg = 1.18018 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149.8calibrated Vbg = 1.17697 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.1calibrated Vbg = 1.18232 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.5calibrated Vbg = 1.18714 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 146calibrated Vbg = 1.18431 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 154.1calibrated Vbg = 1.18318 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 161.2calibrated Vbg = 1.17777 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.3calibrated Vbg = 1.17659 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160.7calibrated Vbg = 1.17316 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 165.5calibrated Vbg = 1.18453 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 167.2calibrated Vbg = 1.18454 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.6calibrated Vbg = 1.18569 :::*/*/*/*/
[17:36:27.948] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161calibrated Vbg = 1.17758 :::*/*/*/*/
[17:36:27.950] <TB0> INFO: ----------------------------------------------------------------------
[17:36:27.950] <TB0> INFO: PixTestReadback::CalibrateIa()
[17:36:27.950] <TB0> INFO: ----------------------------------------------------------------------
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C0.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C1.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C2.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C3.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C4.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C5.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C6.dat
[17:39:08.786] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C7.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C8.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C9.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C10.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C11.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C12.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C13.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C14.dat
[17:39:08.787] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//readbackCal_C15.dat
[17:39:08.816] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[17:39:08.819] <TB0> INFO: PixTestReadback::doTest() done
[17:39:08.819] <TB0> INFO: Decoding statistics:
[17:39:08.819] <TB0> INFO: General information:
[17:39:08.819] <TB0> INFO: 16bit words read: 1536
[17:39:08.819] <TB0> INFO: valid events total: 256
[17:39:08.819] <TB0> INFO: empty events: 256
[17:39:08.819] <TB0> INFO: valid events with pixels: 0
[17:39:08.819] <TB0> INFO: valid pixel hits: 0
[17:39:08.819] <TB0> INFO: Event errors: 0
[17:39:08.819] <TB0> INFO: start marker: 0
[17:39:08.819] <TB0> INFO: stop marker: 0
[17:39:08.819] <TB0> INFO: overflow: 0
[17:39:08.819] <TB0> INFO: invalid 5bit words: 0
[17:39:08.819] <TB0> INFO: invalid XOR eye diagram: 0
[17:39:08.819] <TB0> INFO: frame (failed synchr.): 0
[17:39:08.819] <TB0> INFO: idle data (no TBM trl): 0
[17:39:08.819] <TB0> INFO: no data (only TBM hdr): 0
[17:39:08.819] <TB0> INFO: TBM errors: 0
[17:39:08.819] <TB0> INFO: flawed TBM headers: 0
[17:39:08.819] <TB0> INFO: flawed TBM trailers: 0
[17:39:08.819] <TB0> INFO: event ID mismatches: 0
[17:39:08.820] <TB0> INFO: ROC errors: 0
[17:39:08.820] <TB0> INFO: missing ROC header(s): 0
[17:39:08.820] <TB0> INFO: misplaced readback start: 0
[17:39:08.820] <TB0> INFO: Pixel decoding errors: 0
[17:39:08.820] <TB0> INFO: pixel data incomplete: 0
[17:39:08.820] <TB0> INFO: pixel address: 0
[17:39:08.820] <TB0> INFO: pulse height fill bit: 0
[17:39:08.820] <TB0> INFO: buffer corruption: 0
[17:39:08.886] <TB0> INFO: ######################################################################
[17:39:08.886] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[17:39:08.886] <TB0> INFO: ######################################################################
[17:39:08.888] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[17:39:08.902] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[17:39:08.902] <TB0> INFO: run 1 of 1
[17:39:09.138] <TB0> INFO: Expecting 3120000 events.
[17:39:40.990] <TB0> INFO: 677540 events read in total (31260ms).











[17:40:11.508] <TB0> INFO: 1350670 events read in total (61778ms).





















[17:40:41.765] <TB0> INFO: 2021150 events read in total (92035ms).





















[17:41:11.846] <TB0> INFO: 2691710 events read in total (122116ms).





















[17:41:31.324] <TB0> INFO: 3120000 events read in total (141594ms).
[17:41:31.417] <TB0> INFO: Test took 142515ms.
[17:41:58.414] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 169 seconds
[17:41:58.414] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0
[17:41:58.414] <TB0> INFO: separation cut (per ROC): 103 116 108 101 120 116 104 107 106 107 105 130 105 128 107 104
[17:41:58.414] <TB0> INFO: Decoding statistics:
[17:41:58.414] <TB0> INFO: General information:
[17:41:58.414] <TB0> INFO: 16bit words read: 0
[17:41:58.414] <TB0> INFO: valid events total: 0
[17:41:58.414] <TB0> INFO: empty events: 0
[17:41:58.414] <TB0> INFO: valid events with pixels: 0
[17:41:58.414] <TB0> INFO: valid pixel hits: 0
[17:41:58.414] <TB0> INFO: Event errors: 0
[17:41:58.414] <TB0> INFO: start marker: 0
[17:41:58.414] <TB0> INFO: stop marker: 0
[17:41:58.414] <TB0> INFO: overflow: 0
[17:41:58.414] <TB0> INFO: invalid 5bit words: 0
[17:41:58.414] <TB0> INFO: invalid XOR eye diagram: 0
[17:41:58.414] <TB0> INFO: frame (failed synchr.): 0
[17:41:58.414] <TB0> INFO: idle data (no TBM trl): 0
[17:41:58.414] <TB0> INFO: no data (only TBM hdr): 0
[17:41:58.414] <TB0> INFO: TBM errors: 0
[17:41:58.414] <TB0> INFO: flawed TBM headers: 0
[17:41:58.414] <TB0> INFO: flawed TBM trailers: 0
[17:41:58.414] <TB0> INFO: event ID mismatches: 0
[17:41:58.414] <TB0> INFO: ROC errors: 0
[17:41:58.414] <TB0> INFO: missing ROC header(s): 0
[17:41:58.414] <TB0> INFO: misplaced readback start: 0
[17:41:58.414] <TB0> INFO: Pixel decoding errors: 0
[17:41:58.414] <TB0> INFO: pixel data incomplete: 0
[17:41:58.414] <TB0> INFO: pixel address: 0
[17:41:58.414] <TB0> INFO: pulse height fill bit: 0
[17:41:58.414] <TB0> INFO: buffer corruption: 0
[17:41:58.453] <TB0> INFO: ######################################################################
[17:41:58.453] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:41:58.453] <TB0> INFO: ######################################################################
[17:41:58.453] <TB0> INFO: ----------------------------------------------------------------------
[17:41:58.453] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[17:41:58.453] <TB0> INFO: ----------------------------------------------------------------------
[17:41:58.453] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[17:41:58.467] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[17:41:58.468] <TB0> INFO: run 1 of 1
[17:41:58.713] <TB0> INFO: Expecting 36608000 events.
[17:42:22.531] <TB0> INFO: 714050 events read in total (23227ms).
[17:42:46.060] <TB0> INFO: 1408650 events read in total (46756ms).
[17:43:09.334] <TB0> INFO: 2102300 events read in total (70030ms).
[17:43:32.258] <TB0> INFO: 2794550 events read in total (92954ms).
[17:43:55.410] <TB0> INFO: 3485300 events read in total (116106ms).
[17:44:18.471] <TB0> INFO: 4177500 events read in total (139167ms).
[17:44:41.699] <TB0> INFO: 4868500 events read in total (162395ms).
[17:45:04.676] <TB0> INFO: 5557400 events read in total (185372ms).
[17:45:27.988] <TB0> INFO: 6247100 events read in total (208684ms).
[17:45:51.081] <TB0> INFO: 6934350 events read in total (231777ms).
[17:46:13.905] <TB0> INFO: 7622200 events read in total (254601ms).
[17:46:37.109] <TB0> INFO: 8310550 events read in total (277805ms).
[17:47:00.058] <TB0> INFO: 9000300 events read in total (300754ms).
[17:47:23.083] <TB0> INFO: 9687000 events read in total (323779ms).
[17:47:45.803] <TB0> INFO: 10373300 events read in total (346499ms).
[17:48:08.943] <TB0> INFO: 11061600 events read in total (369639ms).
[17:48:31.841] <TB0> INFO: 11749250 events read in total (392537ms).
[17:48:54.894] <TB0> INFO: 12434500 events read in total (415590ms).
[17:49:17.814] <TB0> INFO: 13123050 events read in total (438510ms).
[17:49:40.820] <TB0> INFO: 13808100 events read in total (461516ms).
[17:50:03.659] <TB0> INFO: 14493100 events read in total (484355ms).
[17:50:26.913] <TB0> INFO: 15177900 events read in total (507609ms).
[17:50:49.826] <TB0> INFO: 15861700 events read in total (530522ms).
[17:51:12.540] <TB0> INFO: 16543350 events read in total (553236ms).
[17:51:35.530] <TB0> INFO: 17226050 events read in total (576226ms).
[17:51:58.257] <TB0> INFO: 17907650 events read in total (598953ms).
[17:52:21.454] <TB0> INFO: 18587600 events read in total (622150ms).
[17:52:44.240] <TB0> INFO: 19264600 events read in total (644936ms).
[17:53:07.224] <TB0> INFO: 19941650 events read in total (667920ms).
[17:53:30.237] <TB0> INFO: 20620500 events read in total (690933ms).
[17:53:53.304] <TB0> INFO: 21299100 events read in total (714000ms).
[17:54:16.228] <TB0> INFO: 21979800 events read in total (736924ms).
[17:54:39.318] <TB0> INFO: 22657550 events read in total (760014ms).
[17:55:01.922] <TB0> INFO: 23332950 events read in total (782618ms).
[17:55:25.062] <TB0> INFO: 24007750 events read in total (805758ms).
[17:55:48.087] <TB0> INFO: 24682850 events read in total (828783ms).
[17:56:11.051] <TB0> INFO: 25358600 events read in total (851747ms).
[17:56:34.346] <TB0> INFO: 26035000 events read in total (875042ms).
[17:56:57.031] <TB0> INFO: 26707500 events read in total (897727ms).
[17:57:19.767] <TB0> INFO: 27382850 events read in total (920463ms).
[17:57:42.506] <TB0> INFO: 28054950 events read in total (943202ms).
[17:58:05.208] <TB0> INFO: 28729550 events read in total (965904ms).
[17:58:27.550] <TB0> INFO: 29403600 events read in total (988246ms).
[17:58:50.261] <TB0> INFO: 30076650 events read in total (1010957ms).
[17:59:13.151] <TB0> INFO: 30749550 events read in total (1033847ms).
[17:59:35.937] <TB0> INFO: 31422700 events read in total (1056633ms).
[17:59:58.591] <TB0> INFO: 32097000 events read in total (1079287ms).
[18:00:21.514] <TB0> INFO: 32771500 events read in total (1102210ms).
[18:00:44.304] <TB0> INFO: 33446600 events read in total (1125000ms).
[18:01:07.256] <TB0> INFO: 34121700 events read in total (1147952ms).
[18:01:29.965] <TB0> INFO: 34794550 events read in total (1170661ms).
[18:01:52.906] <TB0> INFO: 35469200 events read in total (1193602ms).
[18:02:15.719] <TB0> INFO: 36149800 events read in total (1216415ms).
[18:02:31.008] <TB0> INFO: 36608000 events read in total (1231704ms).
[18:02:31.097] <TB0> INFO: Test took 1232629ms.
[18:02:31.556] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:33.460] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:35.472] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:37.373] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:39.100] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:40.606] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:42.140] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:43.592] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:45.032] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:46.531] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:48.139] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:49.808] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:51.636] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:53.462] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:55.492] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:57.601] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:02:59.541] <TB0> INFO: PixTestScurves::scurves() done
[18:02:59.542] <TB0> INFO: Vcal mean: 131.57 139.73 122.58 125.43 132.19 133.39 116.72 126.04 136.18 128.02 128.56 143.08 129.75 138.60 121.27 125.46
[18:02:59.542] <TB0> INFO: Vcal RMS: 6.01 5.90 5.99 6.15 6.08 5.68 6.08 7.03 6.27 5.68 6.30 5.78 6.30 6.04 6.02 6.14
[18:02:59.542] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1261 seconds
[18:02:59.542] <TB0> INFO: Decoding statistics:
[18:02:59.542] <TB0> INFO: General information:
[18:02:59.542] <TB0> INFO: 16bit words read: 0
[18:02:59.542] <TB0> INFO: valid events total: 0
[18:02:59.542] <TB0> INFO: empty events: 0
[18:02:59.542] <TB0> INFO: valid events with pixels: 0
[18:02:59.542] <TB0> INFO: valid pixel hits: 0
[18:02:59.542] <TB0> INFO: Event errors: 0
[18:02:59.542] <TB0> INFO: start marker: 0
[18:02:59.542] <TB0> INFO: stop marker: 0
[18:02:59.542] <TB0> INFO: overflow: 0
[18:02:59.542] <TB0> INFO: invalid 5bit words: 0
[18:02:59.542] <TB0> INFO: invalid XOR eye diagram: 0
[18:02:59.542] <TB0> INFO: frame (failed synchr.): 0
[18:02:59.542] <TB0> INFO: idle data (no TBM trl): 0
[18:02:59.542] <TB0> INFO: no data (only TBM hdr): 0
[18:02:59.542] <TB0> INFO: TBM errors: 0
[18:02:59.542] <TB0> INFO: flawed TBM headers: 0
[18:02:59.542] <TB0> INFO: flawed TBM trailers: 0
[18:02:59.542] <TB0> INFO: event ID mismatches: 0
[18:02:59.542] <TB0> INFO: ROC errors: 0
[18:02:59.542] <TB0> INFO: missing ROC header(s): 0
[18:02:59.542] <TB0> INFO: misplaced readback start: 0
[18:02:59.542] <TB0> INFO: Pixel decoding errors: 0
[18:02:59.542] <TB0> INFO: pixel data incomplete: 0
[18:02:59.542] <TB0> INFO: pixel address: 0
[18:02:59.542] <TB0> INFO: pulse height fill bit: 0
[18:02:59.542] <TB0> INFO: buffer corruption: 0
[18:02:59.634] <TB0> INFO: ######################################################################
[18:02:59.634] <TB0> INFO: PixTestTrim::doTest()
[18:02:59.634] <TB0> INFO: ######################################################################
[18:02:59.636] <TB0> INFO: ----------------------------------------------------------------------
[18:02:59.636] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:02:59.636] <TB0> INFO: ----------------------------------------------------------------------
[18:02:59.693] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:02:59.694] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:02:59.708] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:02:59.708] <TB0> INFO: run 1 of 1
[18:02:59.000] <TB0> INFO: Expecting 5025280 events.
[18:03:31.237] <TB0> INFO: 834696 events read in total (30633ms).
[18:04:01.186] <TB0> INFO: 1667248 events read in total (60583ms).
[18:04:30.899] <TB0> INFO: 2497448 events read in total (90295ms).
[18:05:00.709] <TB0> INFO: 3323448 events read in total (120105ms).
[18:05:30.145] <TB0> INFO: 4146232 events read in total (149542ms).
[18:05:59.625] <TB0> INFO: 4967200 events read in total (179021ms).
[18:06:02.216] <TB0> INFO: 5025280 events read in total (181612ms).
[18:06:02.267] <TB0> INFO: Test took 182560ms.
[18:06:16.049] <TB0> INFO: ROC 0 VthrComp = 129
[18:06:16.049] <TB0> INFO: ROC 1 VthrComp = 136
[18:06:16.049] <TB0> INFO: ROC 2 VthrComp = 125
[18:06:16.050] <TB0> INFO: ROC 3 VthrComp = 123
[18:06:16.050] <TB0> INFO: ROC 4 VthrComp = 132
[18:06:16.050] <TB0> INFO: ROC 5 VthrComp = 131
[18:06:16.050] <TB0> INFO: ROC 6 VthrComp = 114
[18:06:16.050] <TB0> INFO: ROC 7 VthrComp = 124
[18:06:16.050] <TB0> INFO: ROC 8 VthrComp = 129
[18:06:16.050] <TB0> INFO: ROC 9 VthrComp = 133
[18:06:16.052] <TB0> INFO: ROC 10 VthrComp = 128
[18:06:16.052] <TB0> INFO: ROC 11 VthrComp = 132
[18:06:16.052] <TB0> INFO: ROC 12 VthrComp = 125
[18:06:16.052] <TB0> INFO: ROC 13 VthrComp = 132
[18:06:16.053] <TB0> INFO: ROC 14 VthrComp = 124
[18:06:16.053] <TB0> INFO: ROC 15 VthrComp = 120
[18:06:16.291] <TB0> INFO: Expecting 41600 events.
[18:06:19.774] <TB0> INFO: 41600 events read in total (2892ms).
[18:06:19.775] <TB0> INFO: Test took 3721ms.
[18:06:19.784] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:06:19.784] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:06:19.796] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:06:19.796] <TB0> INFO: run 1 of 1
[18:06:20.074] <TB0> INFO: Expecting 5025280 events.
[18:06:46.546] <TB0> INFO: 591584 events read in total (25880ms).
[18:07:12.735] <TB0> INFO: 1182960 events read in total (52069ms).
[18:07:38.657] <TB0> INFO: 1774160 events read in total (77991ms).
[18:08:04.407] <TB0> INFO: 2364344 events read in total (103741ms).
[18:08:30.241] <TB0> INFO: 2952536 events read in total (129575ms).
[18:08:55.919] <TB0> INFO: 3539640 events read in total (155253ms).
[18:09:21.505] <TB0> INFO: 4124816 events read in total (180839ms).
[18:09:47.216] <TB0> INFO: 4710312 events read in total (206550ms).
[18:10:01.534] <TB0> INFO: 5025280 events read in total (220869ms).
[18:10:01.613] <TB0> INFO: Test took 221816ms.
[18:10:25.226] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 61.2627 for pixel 13/0 mean/min/max = 46.4092/31.3902/61.4283
[18:10:25.226] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 68.7868 for pixel 26/8 mean/min/max = 52.5972/36.2391/68.9552
[18:10:25.226] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.4848 for pixel 12/12 mean/min/max = 45.4879/31.4349/59.5408
[18:10:25.227] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.7232 for pixel 4/32 mean/min/max = 46.7503/31.7698/61.7309
[18:10:25.227] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 64.3776 for pixel 6/72 mean/min/max = 50.2097/36.0168/64.4026
[18:10:25.228] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 63.3371 for pixel 51/7 mean/min/max = 49.0452/34.7514/63.3389
[18:10:25.228] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 62.5253 for pixel 0/40 mean/min/max = 47.1334/31.6889/62.5779
[18:10:25.229] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 62.4044 for pixel 0/23 mean/min/max = 47.4428/32.1672/62.7184
[18:10:25.229] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 61.2704 for pixel 14/12 mean/min/max = 46.5965/31.7698/61.4233
[18:10:25.230] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.1759 for pixel 10/2 mean/min/max = 46.3208/31.4125/61.2291
[18:10:25.230] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 63.2249 for pixel 51/4 mean/min/max = 47.7022/31.9903/63.414
[18:10:25.230] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 70.3319 for pixel 51/6 mean/min/max = 53.8768/37.4089/70.3448
[18:10:25.231] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 62.8249 for pixel 5/13 mean/min/max = 46.9691/31.0018/62.9365
[18:10:25.231] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 74.7942 for pixel 8/2 mean/min/max = 56.7844/38.6671/74.9017
[18:10:25.232] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 59.847 for pixel 0/77 mean/min/max = 45.9529/31.9205/59.9854
[18:10:25.232] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 63.7658 for pixel 13/9 mean/min/max = 47.9585/32.1507/63.7663
[18:10:25.232] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:10:25.321] <TB0> INFO: Expecting 411648 events.
[18:10:34.632] <TB0> INFO: 411648 events read in total (8719ms).
[18:10:34.639] <TB0> INFO: Expecting 411648 events.
[18:10:44.045] <TB0> INFO: 411648 events read in total (9003ms).
[18:10:44.060] <TB0> INFO: Expecting 411648 events.
[18:10:53.566] <TB0> INFO: 411648 events read in total (9103ms).
[18:10:53.582] <TB0> INFO: Expecting 411648 events.
[18:11:02.878] <TB0> INFO: 411648 events read in total (8893ms).
[18:11:02.894] <TB0> INFO: Expecting 411648 events.
[18:11:12.300] <TB0> INFO: 411648 events read in total (9003ms).
[18:11:12.324] <TB0> INFO: Expecting 411648 events.
[18:11:21.714] <TB0> INFO: 411648 events read in total (8987ms).
[18:11:21.736] <TB0> INFO: Expecting 411648 events.
[18:11:31.142] <TB0> INFO: 411648 events read in total (9003ms).
[18:11:31.172] <TB0> INFO: Expecting 411648 events.
[18:11:40.603] <TB0> INFO: 411648 events read in total (9028ms).
[18:11:40.629] <TB0> INFO: Expecting 411648 events.
[18:11:50.136] <TB0> INFO: 411648 events read in total (9104ms).
[18:11:50.174] <TB0> INFO: Expecting 411648 events.
[18:11:59.626] <TB0> INFO: 411648 events read in total (9049ms).
[18:11:59.658] <TB0> INFO: Expecting 411648 events.
[18:12:09.091] <TB0> INFO: 411648 events read in total (9030ms).
[18:12:09.126] <TB0> INFO: Expecting 411648 events.
[18:12:18.640] <TB0> INFO: 411648 events read in total (9111ms).
[18:12:18.678] <TB0> INFO: Expecting 411648 events.
[18:12:28.191] <TB0> INFO: 411648 events read in total (9109ms).
[18:12:28.232] <TB0> INFO: Expecting 411648 events.
[18:12:37.819] <TB0> INFO: 411648 events read in total (9183ms).
[18:12:37.863] <TB0> INFO: Expecting 411648 events.
[18:12:47.493] <TB0> INFO: 411648 events read in total (9227ms).
[18:12:47.552] <TB0> INFO: Expecting 411648 events.
[18:12:57.111] <TB0> INFO: 411648 events read in total (9156ms).
[18:12:57.199] <TB0> INFO: Test took 151967ms.
[18:12:57.921] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:12:57.935] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:12:57.935] <TB0> INFO: run 1 of 1
[18:12:58.174] <TB0> INFO: Expecting 5025280 events.
[18:13:24.791] <TB0> INFO: 589056 events read in total (26025ms).
[18:13:51.018] <TB0> INFO: 1177800 events read in total (52252ms).
[18:14:17.443] <TB0> INFO: 1766784 events read in total (78677ms).
[18:14:43.531] <TB0> INFO: 2354168 events read in total (104765ms).
[18:15:09.973] <TB0> INFO: 2940992 events read in total (131207ms).
[18:15:35.914] <TB0> INFO: 3527696 events read in total (157148ms).
[18:16:02.063] <TB0> INFO: 4114048 events read in total (183297ms).
[18:16:27.925] <TB0> INFO: 4699520 events read in total (209159ms).
[18:16:42.587] <TB0> INFO: 5025280 events read in total (223821ms).
[18:16:42.731] <TB0> INFO: Test took 224797ms.
[18:17:06.757] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 3.500000 .. 144.303611
[18:17:07.007] <TB0> INFO: Expecting 208000 events.
[18:17:16.296] <TB0> INFO: 208000 events read in total (8698ms).
[18:17:16.297] <TB0> INFO: Test took 9538ms.
[18:17:16.354] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 3 .. 154 (-1/-1) hits flags = 528 (plus default)
[18:17:16.368] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:17:16.368] <TB0> INFO: run 1 of 1
[18:17:16.646] <TB0> INFO: Expecting 5058560 events.
[18:17:43.692] <TB0> INFO: 583160 events read in total (26454ms).
[18:18:09.536] <TB0> INFO: 1165712 events read in total (52299ms).
[18:18:35.287] <TB0> INFO: 1748128 events read in total (78049ms).
[18:19:01.407] <TB0> INFO: 2330552 events read in total (104169ms).
[18:19:27.466] <TB0> INFO: 2913616 events read in total (130228ms).
[18:19:53.403] <TB0> INFO: 3496000 events read in total (156165ms).
[18:20:19.551] <TB0> INFO: 4078304 events read in total (182313ms).
[18:20:45.131] <TB0> INFO: 4660312 events read in total (207893ms).
[18:21:03.238] <TB0> INFO: 5058560 events read in total (226000ms).
[18:21:03.343] <TB0> INFO: Test took 226975ms.
[18:21:27.640] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 26.629419 .. 46.487189
[18:21:27.876] <TB0> INFO: Expecting 208000 events.
[18:21:37.602] <TB0> INFO: 208000 events read in total (9135ms).
[18:21:37.604] <TB0> INFO: Test took 9963ms.
[18:21:37.661] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 16 .. 56 (-1/-1) hits flags = 528 (plus default)
[18:21:37.675] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:21:37.675] <TB0> INFO: run 1 of 1
[18:21:37.953] <TB0> INFO: Expecting 1364480 events.
[18:22:07.047] <TB0> INFO: 662792 events read in total (28502ms).
[18:22:34.632] <TB0> INFO: 1323936 events read in total (56087ms).
[18:22:36.795] <TB0> INFO: 1364480 events read in total (58251ms).
[18:22:36.826] <TB0> INFO: Test took 59151ms.
[18:22:49.264] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 27.913960 .. 52.533120
[18:22:49.510] <TB0> INFO: Expecting 208000 events.
[18:22:59.469] <TB0> INFO: 208000 events read in total (9368ms).
[18:22:59.470] <TB0> INFO: Test took 10205ms.
[18:22:59.538] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 17 .. 62 (-1/-1) hits flags = 528 (plus default)
[18:22:59.553] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:22:59.553] <TB0> INFO: run 1 of 1
[18:22:59.831] <TB0> INFO: Expecting 1530880 events.
[18:23:28.481] <TB0> INFO: 638224 events read in total (28059ms).
[18:23:55.804] <TB0> INFO: 1275672 events read in total (55382ms).
[18:24:06.808] <TB0> INFO: 1530880 events read in total (66386ms).
[18:24:06.851] <TB0> INFO: Test took 67298ms.
[18:24:21.571] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 26.572581 .. 57.769194
[18:24:21.812] <TB0> INFO: Expecting 208000 events.
[18:24:31.690] <TB0> INFO: 208000 events read in total (9286ms).
[18:24:31.691] <TB0> INFO: Test took 10119ms.
[18:24:31.739] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 16 .. 67 (-1/-1) hits flags = 528 (plus default)
[18:24:31.752] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:24:31.752] <TB0> INFO: run 1 of 1
[18:24:32.030] <TB0> INFO: Expecting 1730560 events.
[18:24:59.717] <TB0> INFO: 628208 events read in total (27095ms).
[18:25:26.225] <TB0> INFO: 1256192 events read in total (53604ms).
[18:25:46.521] <TB0> INFO: 1730560 events read in total (73899ms).
[18:25:46.559] <TB0> INFO: Test took 74806ms.
[18:26:00.581] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:26:00.581] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:26:00.595] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:26:00.595] <TB0> INFO: run 1 of 1
[18:26:00.833] <TB0> INFO: Expecting 1364480 events.
[18:26:29.646] <TB0> INFO: 668912 events read in total (28221ms).
[18:26:57.614] <TB0> INFO: 1337192 events read in total (56189ms).
[18:26:59.188] <TB0> INFO: 1364480 events read in total (57764ms).
[18:26:59.217] <TB0> INFO: Test took 58621ms.
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C0.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C1.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C2.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C3.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C4.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C5.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C6.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C7.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C8.dat
[18:27:13.567] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C9.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C10.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C11.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C12.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C13.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C14.dat
[18:27:13.568] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C15.dat
[18:27:13.568] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C0.dat
[18:27:13.573] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C1.dat
[18:27:13.578] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C2.dat
[18:27:13.583] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C3.dat
[18:27:13.589] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C4.dat
[18:27:13.595] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C5.dat
[18:27:13.601] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C6.dat
[18:27:13.608] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C7.dat
[18:27:13.614] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C8.dat
[18:27:13.621] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C9.dat
[18:27:13.627] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C10.dat
[18:27:13.632] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C11.dat
[18:27:13.637] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C12.dat
[18:27:13.641] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C13.dat
[18:27:13.646] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C14.dat
[18:27:13.650] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//trimParameters35_C15.dat
[18:27:13.655] <TB0> INFO: PixTestTrim::trimTest() done
[18:27:13.655] <TB0> INFO: vtrim: 121 165 113 131 146 126 119 122 131 132 118 155 135 181 125 120
[18:27:13.655] <TB0> INFO: vthrcomp: 129 136 125 123 132 131 114 124 129 133 128 132 125 132 124 120
[18:27:13.655] <TB0> INFO: vcal mean: 35.21 35.82 34.99 35.22 35.00 35.09 35.08 35.10 35.09 34.99 35.22 36.10 35.45 36.62 34.99 35.28
[18:27:13.655] <TB0> INFO: vcal RMS: 1.32 2.06 1.03 1.43 1.02 1.09 1.05 1.19 1.30 1.08 1.38 2.49 1.63 2.96 1.07 1.32
[18:27:13.655] <TB0> INFO: bits mean: 9.65 8.36 9.74 9.97 8.08 8.01 9.00 8.75 9.59 9.31 8.71 7.88 9.88 8.26 9.57 9.27
[18:27:13.655] <TB0> INFO: bits RMS: 2.73 2.43 2.71 2.51 2.38 2.71 2.88 2.95 2.66 2.88 2.99 2.61 2.69 2.56 2.67 2.71
[18:27:13.663] <TB0> INFO: ----------------------------------------------------------------------
[18:27:13.663] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:27:13.663] <TB0> INFO: ----------------------------------------------------------------------
[18:27:13.666] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:27:13.680] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:27:13.680] <TB0> INFO: run 1 of 1
[18:27:13.951] <TB0> INFO: Expecting 4160000 events.
[18:27:47.179] <TB0> INFO: 787340 events read in total (32637ms).
[18:28:20.147] <TB0> INFO: 1564640 events read in total (65605ms).
[18:28:53.152] <TB0> INFO: 2333795 events read in total (98610ms).
[18:29:25.937] <TB0> INFO: 3096755 events read in total (131395ms).
[18:29:58.410] <TB0> INFO: 3857490 events read in total (163868ms).
[18:30:11.456] <TB0> INFO: 4160000 events read in total (176914ms).
[18:30:11.521] <TB0> INFO: Test took 177841ms.
[18:30:34.881] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[18:30:34.899] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:30:34.899] <TB0> INFO: run 1 of 1
[18:30:35.153] <TB0> INFO: Expecting 5324800 events.
[18:31:05.897] <TB0> INFO: 694315 events read in total (30152ms).
[18:31:36.497] <TB0> INFO: 1383265 events read in total (60752ms).
[18:32:07.024] <TB0> INFO: 2070990 events read in total (91279ms).
[18:32:37.398] <TB0> INFO: 2755405 events read in total (121653ms).
[18:33:07.777] <TB0> INFO: 3436815 events read in total (152032ms).
[18:33:37.860] <TB0> INFO: 4116720 events read in total (182115ms).
[18:34:07.890] <TB0> INFO: 4795635 events read in total (212145ms).
[18:34:31.690] <TB0> INFO: 5324800 events read in total (235945ms).
[18:34:31.799] <TB0> INFO: Test took 236899ms.
[18:35:04.581] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 217 (-1/-1) hits flags = 528 (plus default)
[18:35:04.594] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:35:04.594] <TB0> INFO: run 1 of 1
[18:35:04.830] <TB0> INFO: Expecting 4534400 events.
[18:35:36.809] <TB0> INFO: 732420 events read in total (31388ms).
[18:36:07.954] <TB0> INFO: 1458845 events read in total (62533ms).
[18:36:39.037] <TB0> INFO: 2182015 events read in total (93616ms).
[18:37:09.882] <TB0> INFO: 2899415 events read in total (124461ms).
[18:37:40.742] <TB0> INFO: 3613600 events read in total (155322ms).
[18:38:12.015] <TB0> INFO: 4327410 events read in total (186594ms).
[18:38:22.164] <TB0> INFO: 4534400 events read in total (196743ms).
[18:38:22.272] <TB0> INFO: Test took 197678ms.
[18:38:51.293] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 215 (-1/-1) hits flags = 528 (plus default)
[18:38:51.307] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:38:51.307] <TB0> INFO: run 1 of 1
[18:38:51.562] <TB0> INFO: Expecting 4492800 events.
[18:39:23.042] <TB0> INFO: 734665 events read in total (30889ms).
[18:39:54.452] <TB0> INFO: 1463520 events read in total (62299ms).
[18:40:25.927] <TB0> INFO: 2189210 events read in total (93774ms).
[18:40:57.329] <TB0> INFO: 2909285 events read in total (125176ms).
[18:41:28.293] <TB0> INFO: 3626565 events read in total (156140ms).
[18:41:59.175] <TB0> INFO: 4343470 events read in total (187022ms).
[18:42:05.834] <TB0> INFO: 4492800 events read in total (193681ms).
[18:42:05.928] <TB0> INFO: Test took 194621ms.
[18:42:35.249] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 210 (-1/-1) hits flags = 528 (plus default)
[18:42:35.263] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:42:35.263] <TB0> INFO: run 1 of 1
[18:42:35.503] <TB0> INFO: Expecting 4388800 events.
[18:43:07.811] <TB0> INFO: 741880 events read in total (31717ms).
[18:43:38.937] <TB0> INFO: 1477950 events read in total (62844ms).
[18:44:10.384] <TB0> INFO: 2209865 events read in total (94290ms).
[18:44:42.215] <TB0> INFO: 2936275 events read in total (126121ms).
[18:45:13.788] <TB0> INFO: 3659520 events read in total (157694ms).
[18:45:44.851] <TB0> INFO: 4384055 events read in total (188757ms).
[18:45:45.478] <TB0> INFO: 4388800 events read in total (189384ms).
[18:45:45.551] <TB0> INFO: Test took 190288ms.
[18:46:09.688] <TB0> INFO: PixTestTrim::trimBitTest() done
[18:46:09.689] <TB0> INFO: PixTestTrim::doTest() done, duration: 2590 seconds
[18:46:09.690] <TB0> INFO: Decoding statistics:
[18:46:09.690] <TB0> INFO: General information:
[18:46:09.690] <TB0> INFO: 16bit words read: 0
[18:46:09.690] <TB0> INFO: valid events total: 0
[18:46:09.690] <TB0> INFO: empty events: 0
[18:46:09.690] <TB0> INFO: valid events with pixels: 0
[18:46:09.690] <TB0> INFO: valid pixel hits: 0
[18:46:09.690] <TB0> INFO: Event errors: 0
[18:46:09.690] <TB0> INFO: start marker: 0
[18:46:09.690] <TB0> INFO: stop marker: 0
[18:46:09.690] <TB0> INFO: overflow: 0
[18:46:09.690] <TB0> INFO: invalid 5bit words: 0
[18:46:09.690] <TB0> INFO: invalid XOR eye diagram: 0
[18:46:09.690] <TB0> INFO: frame (failed synchr.): 0
[18:46:09.690] <TB0> INFO: idle data (no TBM trl): 0
[18:46:09.690] <TB0> INFO: no data (only TBM hdr): 0
[18:46:09.690] <TB0> INFO: TBM errors: 0
[18:46:09.690] <TB0> INFO: flawed TBM headers: 0
[18:46:09.690] <TB0> INFO: flawed TBM trailers: 0
[18:46:09.690] <TB0> INFO: event ID mismatches: 0
[18:46:09.690] <TB0> INFO: ROC errors: 0
[18:46:09.690] <TB0> INFO: missing ROC header(s): 0
[18:46:09.690] <TB0> INFO: misplaced readback start: 0
[18:46:09.690] <TB0> INFO: Pixel decoding errors: 0
[18:46:09.690] <TB0> INFO: pixel data incomplete: 0
[18:46:09.690] <TB0> INFO: pixel address: 0
[18:46:09.690] <TB0> INFO: pulse height fill bit: 0
[18:46:09.690] <TB0> INFO: buffer corruption: 0
[18:46:10.360] <TB0> INFO: ######################################################################
[18:46:10.360] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[18:46:10.360] <TB0> INFO: ######################################################################
[18:46:10.642] <TB0> INFO: Expecting 41600 events.
[18:46:14.177] <TB0> INFO: 41600 events read in total (2943ms).
[18:46:14.178] <TB0> INFO: Test took 3816ms.
[18:46:14.617] <TB0> INFO: Expecting 41600 events.
[18:46:18.134] <TB0> INFO: 41600 events read in total (2925ms).
[18:46:18.135] <TB0> INFO: Test took 3754ms.
[18:46:18.427] <TB0> INFO: Expecting 41600 events.
[18:46:22.048] <TB0> INFO: 41600 events read in total (3030ms).
[18:46:22.049] <TB0> INFO: Test took 3887ms.
[18:46:22.342] <TB0> INFO: Expecting 41600 events.
[18:46:25.853] <TB0> INFO: 41600 events read in total (2920ms).
[18:46:25.854] <TB0> INFO: Test took 3777ms.
[18:46:26.144] <TB0> INFO: Expecting 41600 events.
[18:46:29.765] <TB0> INFO: 41600 events read in total (3029ms).
[18:46:29.767] <TB0> INFO: Test took 3888ms.
[18:46:30.060] <TB0> INFO: Expecting 41600 events.
[18:46:33.573] <TB0> INFO: 41600 events read in total (2922ms).
[18:46:33.574] <TB0> INFO: Test took 3779ms.
[18:46:33.863] <TB0> INFO: Expecting 41600 events.
[18:46:37.507] <TB0> INFO: 41600 events read in total (3052ms).
[18:46:37.508] <TB0> INFO: Test took 3909ms.
[18:46:37.805] <TB0> INFO: Expecting 41600 events.
[18:46:41.285] <TB0> INFO: 41600 events read in total (2889ms).
[18:46:41.286] <TB0> INFO: Test took 3754ms.
[18:46:41.577] <TB0> INFO: Expecting 41600 events.
[18:46:45.060] <TB0> INFO: 41600 events read in total (2892ms).
[18:46:45.062] <TB0> INFO: Test took 3750ms.
[18:46:45.366] <TB0> INFO: Expecting 41600 events.
[18:46:48.867] <TB0> INFO: 41600 events read in total (2910ms).
[18:46:48.868] <TB0> INFO: Test took 3779ms.
[18:46:49.157] <TB0> INFO: Expecting 41600 events.
[18:46:52.656] <TB0> INFO: 41600 events read in total (2907ms).
[18:46:52.658] <TB0> INFO: Test took 3765ms.
[18:46:52.949] <TB0> INFO: Expecting 41600 events.
[18:46:56.514] <TB0> INFO: 41600 events read in total (2973ms).
[18:46:56.515] <TB0> INFO: Test took 3831ms.
[18:46:56.804] <TB0> INFO: Expecting 41600 events.
[18:47:00.371] <TB0> INFO: 41600 events read in total (2975ms).
[18:47:00.372] <TB0> INFO: Test took 3832ms.
[18:47:00.662] <TB0> INFO: Expecting 41600 events.
[18:47:04.296] <TB0> INFO: 41600 events read in total (3042ms).
[18:47:04.296] <TB0> INFO: Test took 3899ms.
[18:47:04.586] <TB0> INFO: Expecting 41600 events.
[18:47:08.124] <TB0> INFO: 41600 events read in total (2947ms).
[18:47:08.125] <TB0> INFO: Test took 3804ms.
[18:47:08.419] <TB0> INFO: Expecting 41600 events.
[18:47:11.924] <TB0> INFO: 41600 events read in total (2914ms).
[18:47:11.925] <TB0> INFO: Test took 3771ms.
[18:47:12.214] <TB0> INFO: Expecting 41600 events.
[18:47:15.790] <TB0> INFO: 41600 events read in total (2984ms).
[18:47:15.792] <TB0> INFO: Test took 3842ms.
[18:47:16.081] <TB0> INFO: Expecting 41600 events.
[18:47:19.629] <TB0> INFO: 41600 events read in total (2956ms).
[18:47:19.630] <TB0> INFO: Test took 3814ms.
[18:47:19.919] <TB0> INFO: Expecting 41600 events.
[18:47:23.499] <TB0> INFO: 41600 events read in total (2988ms).
[18:47:23.500] <TB0> INFO: Test took 3845ms.
[18:47:23.789] <TB0> INFO: Expecting 41600 events.
[18:47:27.322] <TB0> INFO: 41600 events read in total (2942ms).
[18:47:27.323] <TB0> INFO: Test took 3799ms.
[18:47:27.612] <TB0> INFO: Expecting 41600 events.
[18:47:31.159] <TB0> INFO: 41600 events read in total (2955ms).
[18:47:31.160] <TB0> INFO: Test took 3812ms.
[18:47:31.450] <TB0> INFO: Expecting 41600 events.
[18:47:35.020] <TB0> INFO: 41600 events read in total (2978ms).
[18:47:35.021] <TB0> INFO: Test took 3837ms.
[18:47:35.310] <TB0> INFO: Expecting 41600 events.
[18:47:38.929] <TB0> INFO: 41600 events read in total (3027ms).
[18:47:38.930] <TB0> INFO: Test took 3885ms.
[18:47:39.219] <TB0> INFO: Expecting 41600 events.
[18:47:42.758] <TB0> INFO: 41600 events read in total (2947ms).
[18:47:42.759] <TB0> INFO: Test took 3804ms.
[18:47:43.048] <TB0> INFO: Expecting 41600 events.
[18:47:46.648] <TB0> INFO: 41600 events read in total (3008ms).
[18:47:46.649] <TB0> INFO: Test took 3866ms.
[18:47:46.938] <TB0> INFO: Expecting 41600 events.
[18:47:50.448] <TB0> INFO: 41600 events read in total (2919ms).
[18:47:50.449] <TB0> INFO: Test took 3776ms.
[18:47:50.738] <TB0> INFO: Expecting 41600 events.
[18:47:54.278] <TB0> INFO: 41600 events read in total (2949ms).
[18:47:54.279] <TB0> INFO: Test took 3806ms.
[18:47:54.569] <TB0> INFO: Expecting 41600 events.
[18:47:58.086] <TB0> INFO: 41600 events read in total (2925ms).
[18:47:58.086] <TB0> INFO: Test took 3782ms.
[18:47:58.377] <TB0> INFO: Expecting 2560 events.
[18:47:59.269] <TB0> INFO: 2560 events read in total (302ms).
[18:47:59.270] <TB0> INFO: Test took 1170ms.
[18:47:59.579] <TB0> INFO: Expecting 2560 events.
[18:48:00.473] <TB0> INFO: 2560 events read in total (302ms).
[18:48:00.473] <TB0> INFO: Test took 1203ms.
[18:48:00.781] <TB0> INFO: Expecting 2560 events.
[18:48:01.665] <TB0> INFO: 2560 events read in total (293ms).
[18:48:01.665] <TB0> INFO: Test took 1191ms.
[18:48:01.973] <TB0> INFO: Expecting 2560 events.
[18:48:02.857] <TB0> INFO: 2560 events read in total (292ms).
[18:48:02.857] <TB0> INFO: Test took 1191ms.
[18:48:03.166] <TB0> INFO: Expecting 2560 events.
[18:48:04.056] <TB0> INFO: 2560 events read in total (298ms).
[18:48:04.056] <TB0> INFO: Test took 1198ms.
[18:48:04.364] <TB0> INFO: Expecting 2560 events.
[18:48:05.248] <TB0> INFO: 2560 events read in total (292ms).
[18:48:05.248] <TB0> INFO: Test took 1191ms.
[18:48:05.557] <TB0> INFO: Expecting 2560 events.
[18:48:06.438] <TB0> INFO: 2560 events read in total (289ms).
[18:48:06.439] <TB0> INFO: Test took 1190ms.
[18:48:06.745] <TB0> INFO: Expecting 2560 events.
[18:48:07.635] <TB0> INFO: 2560 events read in total (298ms).
[18:48:07.635] <TB0> INFO: Test took 1195ms.
[18:48:07.942] <TB0> INFO: Expecting 2560 events.
[18:48:08.834] <TB0> INFO: 2560 events read in total (300ms).
[18:48:08.834] <TB0> INFO: Test took 1198ms.
[18:48:09.142] <TB0> INFO: Expecting 2560 events.
[18:48:10.027] <TB0> INFO: 2560 events read in total (293ms).
[18:48:10.028] <TB0> INFO: Test took 1193ms.
[18:48:10.336] <TB0> INFO: Expecting 2560 events.
[18:48:11.219] <TB0> INFO: 2560 events read in total (292ms).
[18:48:11.219] <TB0> INFO: Test took 1191ms.
[18:48:11.526] <TB0> INFO: Expecting 2560 events.
[18:48:12.407] <TB0> INFO: 2560 events read in total (289ms).
[18:48:12.407] <TB0> INFO: Test took 1187ms.
[18:48:12.715] <TB0> INFO: Expecting 2560 events.
[18:48:13.599] <TB0> INFO: 2560 events read in total (292ms).
[18:48:13.599] <TB0> INFO: Test took 1191ms.
[18:48:13.907] <TB0> INFO: Expecting 2560 events.
[18:48:14.799] <TB0> INFO: 2560 events read in total (301ms).
[18:48:14.799] <TB0> INFO: Test took 1199ms.
[18:48:15.108] <TB0> INFO: Expecting 2560 events.
[18:48:15.001] <TB0> INFO: 2560 events read in total (301ms).
[18:48:15.001] <TB0> INFO: Test took 1201ms.
[18:48:16.309] <TB0> INFO: Expecting 2560 events.
[18:48:17.207] <TB0> INFO: 2560 events read in total (306ms).
[18:48:17.207] <TB0> INFO: Test took 1205ms.
[18:48:17.211] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:48:17.514] <TB0> INFO: Expecting 655360 events.
[18:48:32.508] <TB0> INFO: 655360 events read in total (14402ms).
[18:48:32.522] <TB0> INFO: Expecting 655360 events.
[18:48:47.124] <TB0> INFO: 655360 events read in total (14199ms).
[18:48:47.142] <TB0> INFO: Expecting 655360 events.
[18:49:01.769] <TB0> INFO: 655360 events read in total (14224ms).
[18:49:01.797] <TB0> INFO: Expecting 655360 events.
[18:49:16.395] <TB0> INFO: 655360 events read in total (14195ms).
[18:49:16.422] <TB0> INFO: Expecting 655360 events.
[18:49:30.955] <TB0> INFO: 655360 events read in total (14130ms).
[18:49:30.996] <TB0> INFO: Expecting 655360 events.
[18:49:45.450] <TB0> INFO: 655360 events read in total (14051ms).
[18:49:45.488] <TB0> INFO: Expecting 655360 events.
[18:49:59.968] <TB0> INFO: 655360 events read in total (14076ms).
[18:50:00.020] <TB0> INFO: Expecting 655360 events.
[18:50:14.603] <TB0> INFO: 655360 events read in total (14180ms).
[18:50:14.677] <TB0> INFO: Expecting 655360 events.
[18:50:29.180] <TB0> INFO: 655360 events read in total (14099ms).
[18:50:29.232] <TB0> INFO: Expecting 655360 events.
[18:50:43.781] <TB0> INFO: 655360 events read in total (14146ms).
[18:50:43.844] <TB0> INFO: Expecting 655360 events.
[18:50:58.478] <TB0> INFO: 655360 events read in total (14231ms).
[18:50:58.551] <TB0> INFO: Expecting 655360 events.
[18:51:13.091] <TB0> INFO: 655360 events read in total (14137ms).
[18:51:13.172] <TB0> INFO: Expecting 655360 events.
[18:51:27.841] <TB0> INFO: 655360 events read in total (14266ms).
[18:51:27.953] <TB0> INFO: Expecting 655360 events.
[18:51:42.527] <TB0> INFO: 655360 events read in total (14171ms).
[18:51:42.650] <TB0> INFO: Expecting 655360 events.
[18:51:57.201] <TB0> INFO: 655360 events read in total (14148ms).
[18:51:57.323] <TB0> INFO: Expecting 655360 events.
[18:52:11.878] <TB0> INFO: 655360 events read in total (14151ms).
[18:52:11.984] <TB0> INFO: Test took 234773ms.
[18:52:12.082] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:52:12.338] <TB0> INFO: Expecting 655360 events.
[18:52:26.671] <TB0> INFO: 655360 events read in total (13741ms).
[18:52:26.685] <TB0> INFO: Expecting 655360 events.
[18:52:41.033] <TB0> INFO: 655360 events read in total (13945ms).
[18:52:41.051] <TB0> INFO: Expecting 655360 events.
[18:52:55.470] <TB0> INFO: 655360 events read in total (14016ms).
[18:52:55.494] <TB0> INFO: Expecting 655360 events.
[18:53:09.913] <TB0> INFO: 655360 events read in total (14016ms).
[18:53:09.942] <TB0> INFO: Expecting 655360 events.
[18:53:24.260] <TB0> INFO: 655360 events read in total (13915ms).
[18:53:24.293] <TB0> INFO: Expecting 655360 events.
[18:53:38.886] <TB0> INFO: 655360 events read in total (14190ms).
[18:53:38.932] <TB0> INFO: Expecting 655360 events.
[18:53:53.215] <TB0> INFO: 655360 events read in total (13879ms).
[18:53:53.256] <TB0> INFO: Expecting 655360 events.
[18:54:07.752] <TB0> INFO: 655360 events read in total (14093ms).
[18:54:07.806] <TB0> INFO: Expecting 655360 events.
[18:54:22.225] <TB0> INFO: 655360 events read in total (14016ms).
[18:54:22.277] <TB0> INFO: Expecting 655360 events.
[18:54:36.730] <TB0> INFO: 655360 events read in total (14049ms).
[18:54:36.793] <TB0> INFO: Expecting 655360 events.
[18:54:51.174] <TB0> INFO: 655360 events read in total (13978ms).
[18:54:51.272] <TB0> INFO: Expecting 655360 events.
[18:55:05.737] <TB0> INFO: 655360 events read in total (14062ms).
[18:55:05.843] <TB0> INFO: Expecting 655360 events.
[18:55:20.448] <TB0> INFO: 655360 events read in total (14201ms).
[18:55:20.531] <TB0> INFO: Expecting 655360 events.
[18:55:34.978] <TB0> INFO: 655360 events read in total (14043ms).
[18:55:35.088] <TB0> INFO: Expecting 655360 events.
[18:55:49.689] <TB0> INFO: 655360 events read in total (14198ms).
[18:55:49.785] <TB0> INFO: Expecting 655360 events.
[18:56:04.246] <TB0> INFO: 655360 events read in total (14058ms).
[18:56:04.348] <TB0> INFO: Test took 232266ms.
[18:56:04.519] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.524] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.530] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.536] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.542] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.548] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.554] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.560] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:04.566] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:04.572] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.578] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.584] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.591] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.597] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.603] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.610] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.615] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.622] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.628] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:04.634] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:04.641] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[18:56:04.647] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[18:56:04.653] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[18:56:04.659] <TB0> INFO: safety margin for low PH: adding 8, margin is now 28
[18:56:04.665] <TB0> INFO: safety margin for low PH: adding 9, margin is now 29
[18:56:04.671] <TB0> INFO: safety margin for low PH: adding 10, margin is now 30
[18:56:04.677] <TB0> INFO: safety margin for low PH: adding 11, margin is now 31
[18:56:04.683] <TB0> INFO: safety margin for low PH: adding 12, margin is now 32
[18:56:04.689] <TB0> INFO: safety margin for low PH: adding 13, margin is now 33
[18:56:04.695] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.701] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.707] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.713] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:04.719] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:04.725] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[18:56:04.731] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[18:56:04.738] <TB0> INFO: safety margin for low PH: adding 7, margin is now 27
[18:56:04.743] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.749] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.756] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.761] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.767] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[18:56:04.774] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[18:56:04.780] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[18:56:04.786] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[18:56:04.792] <TB0> INFO: safety margin for low PH: adding 6, margin is now 26
[18:56:04.798] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.804] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.810] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.816] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[18:56:04.822] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.828] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[18:56:04.862] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C0.dat
[18:56:04.862] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C1.dat
[18:56:04.862] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C2.dat
[18:56:04.862] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C3.dat
[18:56:04.862] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C4.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C5.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C6.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C7.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C8.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C9.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C10.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C11.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C12.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C13.dat
[18:56:04.863] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C14.dat
[18:56:04.864] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//dacParameters35_C15.dat
[18:56:05.139] <TB0> INFO: Expecting 41600 events.
[18:56:08.266] <TB0> INFO: 41600 events read in total (2536ms).
[18:56:08.267] <TB0> INFO: Test took 3400ms.
[18:56:08.715] <TB0> INFO: Expecting 41600 events.
[18:56:11.725] <TB0> INFO: 41600 events read in total (2418ms).
[18:56:11.726] <TB0> INFO: Test took 3248ms.
[18:56:12.177] <TB0> INFO: Expecting 41600 events.
[18:56:15.359] <TB0> INFO: 41600 events read in total (2590ms).
[18:56:15.360] <TB0> INFO: Test took 3423ms.
[18:56:15.579] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:15.668] <TB0> INFO: Expecting 2560 events.
[18:56:16.552] <TB0> INFO: 2560 events read in total (292ms).
[18:56:16.552] <TB0> INFO: Test took 973ms.
[18:56:16.554] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:16.861] <TB0> INFO: Expecting 2560 events.
[18:56:17.746] <TB0> INFO: 2560 events read in total (294ms).
[18:56:17.746] <TB0> INFO: Test took 1192ms.
[18:56:17.750] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:18.055] <TB0> INFO: Expecting 2560 events.
[18:56:18.952] <TB0> INFO: 2560 events read in total (305ms).
[18:56:18.952] <TB0> INFO: Test took 1202ms.
[18:56:18.957] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:19.260] <TB0> INFO: Expecting 2560 events.
[18:56:20.145] <TB0> INFO: 2560 events read in total (294ms).
[18:56:20.145] <TB0> INFO: Test took 1188ms.
[18:56:20.148] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:20.453] <TB0> INFO: Expecting 2560 events.
[18:56:21.341] <TB0> INFO: 2560 events read in total (296ms).
[18:56:21.341] <TB0> INFO: Test took 1193ms.
[18:56:21.344] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:21.650] <TB0> INFO: Expecting 2560 events.
[18:56:22.542] <TB0> INFO: 2560 events read in total (300ms).
[18:56:22.543] <TB0> INFO: Test took 1199ms.
[18:56:22.545] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:22.851] <TB0> INFO: Expecting 2560 events.
[18:56:23.738] <TB0> INFO: 2560 events read in total (295ms).
[18:56:23.738] <TB0> INFO: Test took 1193ms.
[18:56:23.741] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:24.046] <TB0> INFO: Expecting 2560 events.
[18:56:24.942] <TB0> INFO: 2560 events read in total (304ms).
[18:56:24.943] <TB0> INFO: Test took 1202ms.
[18:56:24.948] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:25.251] <TB0> INFO: Expecting 2560 events.
[18:56:26.138] <TB0> INFO: 2560 events read in total (296ms).
[18:56:26.138] <TB0> INFO: Test took 1190ms.
[18:56:26.140] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:26.447] <TB0> INFO: Expecting 2560 events.
[18:56:27.331] <TB0> INFO: 2560 events read in total (292ms).
[18:56:27.332] <TB0> INFO: Test took 1192ms.
[18:56:27.334] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:27.640] <TB0> INFO: Expecting 2560 events.
[18:56:28.529] <TB0> INFO: 2560 events read in total (297ms).
[18:56:28.529] <TB0> INFO: Test took 1195ms.
[18:56:28.532] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:28.838] <TB0> INFO: Expecting 2560 events.
[18:56:29.730] <TB0> INFO: 2560 events read in total (301ms).
[18:56:29.731] <TB0> INFO: Test took 1199ms.
[18:56:29.735] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:30.040] <TB0> INFO: Expecting 2560 events.
[18:56:30.924] <TB0> INFO: 2560 events read in total (292ms).
[18:56:30.924] <TB0> INFO: Test took 1189ms.
[18:56:30.928] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:31.233] <TB0> INFO: Expecting 2560 events.
[18:56:32.119] <TB0> INFO: 2560 events read in total (294ms).
[18:56:32.119] <TB0> INFO: Test took 1191ms.
[18:56:32.123] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:32.428] <TB0> INFO: Expecting 2560 events.
[18:56:33.310] <TB0> INFO: 2560 events read in total (290ms).
[18:56:33.310] <TB0> INFO: Test took 1187ms.
[18:56:33.312] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:33.619] <TB0> INFO: Expecting 2560 events.
[18:56:34.498] <TB0> INFO: 2560 events read in total (287ms).
[18:56:34.499] <TB0> INFO: Test took 1187ms.
[18:56:34.502] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:34.807] <TB0> INFO: Expecting 2560 events.
[18:56:35.692] <TB0> INFO: 2560 events read in total (293ms).
[18:56:35.693] <TB0> INFO: Test took 1192ms.
[18:56:35.697] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:35.001] <TB0> INFO: Expecting 2560 events.
[18:56:36.890] <TB0> INFO: 2560 events read in total (297ms).
[18:56:36.890] <TB0> INFO: Test took 1193ms.
[18:56:36.893] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:37.199] <TB0> INFO: Expecting 2560 events.
[18:56:38.090] <TB0> INFO: 2560 events read in total (299ms).
[18:56:38.090] <TB0> INFO: Test took 1197ms.
[18:56:38.094] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:38.399] <TB0> INFO: Expecting 2560 events.
[18:56:39.288] <TB0> INFO: 2560 events read in total (297ms).
[18:56:39.288] <TB0> INFO: Test took 1195ms.
[18:56:39.292] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:39.597] <TB0> INFO: Expecting 2560 events.
[18:56:40.486] <TB0> INFO: 2560 events read in total (297ms).
[18:56:40.486] <TB0> INFO: Test took 1194ms.
[18:56:40.489] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:40.795] <TB0> INFO: Expecting 2560 events.
[18:56:41.675] <TB0> INFO: 2560 events read in total (289ms).
[18:56:41.676] <TB0> INFO: Test took 1187ms.
[18:56:41.679] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:41.985] <TB0> INFO: Expecting 2560 events.
[18:56:42.867] <TB0> INFO: 2560 events read in total (290ms).
[18:56:42.867] <TB0> INFO: Test took 1189ms.
[18:56:42.869] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:43.176] <TB0> INFO: Expecting 2560 events.
[18:56:44.066] <TB0> INFO: 2560 events read in total (298ms).
[18:56:44.067] <TB0> INFO: Test took 1198ms.
[18:56:44.069] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:44.376] <TB0> INFO: Expecting 2560 events.
[18:56:45.268] <TB0> INFO: 2560 events read in total (300ms).
[18:56:45.268] <TB0> INFO: Test took 1199ms.
[18:56:45.270] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:45.578] <TB0> INFO: Expecting 2560 events.
[18:56:46.469] <TB0> INFO: 2560 events read in total (299ms).
[18:56:46.469] <TB0> INFO: Test took 1199ms.
[18:56:46.473] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:46.778] <TB0> INFO: Expecting 2560 events.
[18:56:47.668] <TB0> INFO: 2560 events read in total (298ms).
[18:56:47.669] <TB0> INFO: Test took 1196ms.
[18:56:47.671] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:47.977] <TB0> INFO: Expecting 2560 events.
[18:56:48.873] <TB0> INFO: 2560 events read in total (304ms).
[18:56:48.873] <TB0> INFO: Test took 1202ms.
[18:56:48.876] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:49.181] <TB0> INFO: Expecting 2560 events.
[18:56:50.074] <TB0> INFO: 2560 events read in total (301ms).
[18:56:50.075] <TB0> INFO: Test took 1199ms.
[18:56:50.079] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:50.382] <TB0> INFO: Expecting 2560 events.
[18:56:51.269] <TB0> INFO: 2560 events read in total (295ms).
[18:56:51.269] <TB0> INFO: Test took 1190ms.
[18:56:51.272] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:51.577] <TB0> INFO: Expecting 2560 events.
[18:56:52.462] <TB0> INFO: 2560 events read in total (293ms).
[18:56:52.462] <TB0> INFO: Test took 1190ms.
[18:56:52.464] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:56:52.771] <TB0> INFO: Expecting 2560 events.
[18:56:53.656] <TB0> INFO: 2560 events read in total (293ms).
[18:56:53.657] <TB0> INFO: Test took 1193ms.
[18:56:54.136] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 643 seconds
[18:56:54.136] <TB0> INFO: PH scale (per ROC): 42 43 37 25 52 47 43 39 32 40 40 39 48 50 52 46
[18:56:54.136] <TB0> INFO: PH offset (per ROC): 88 113 96 96 110 97 98 112 112 98 111 107 123 121 123 112
[18:56:54.146] <TB0> INFO: Decoding statistics:
[18:56:54.146] <TB0> INFO: General information:
[18:56:54.146] <TB0> INFO: 16bit words read: 127882
[18:56:54.146] <TB0> INFO: valid events total: 20480
[18:56:54.146] <TB0> INFO: empty events: 17979
[18:56:54.146] <TB0> INFO: valid events with pixels: 2501
[18:56:54.146] <TB0> INFO: valid pixel hits: 2501
[18:56:54.146] <TB0> INFO: Event errors: 0
[18:56:54.146] <TB0> INFO: start marker: 0
[18:56:54.146] <TB0> INFO: stop marker: 0
[18:56:54.146] <TB0> INFO: overflow: 0
[18:56:54.146] <TB0> INFO: invalid 5bit words: 0
[18:56:54.146] <TB0> INFO: invalid XOR eye diagram: 0
[18:56:54.146] <TB0> INFO: frame (failed synchr.): 0
[18:56:54.146] <TB0> INFO: idle data (no TBM trl): 0
[18:56:54.146] <TB0> INFO: no data (only TBM hdr): 0
[18:56:54.146] <TB0> INFO: TBM errors: 0
[18:56:54.146] <TB0> INFO: flawed TBM headers: 0
[18:56:54.146] <TB0> INFO: flawed TBM trailers: 0
[18:56:54.146] <TB0> INFO: event ID mismatches: 0
[18:56:54.147] <TB0> INFO: ROC errors: 0
[18:56:54.147] <TB0> INFO: missing ROC header(s): 0
[18:56:54.147] <TB0> INFO: misplaced readback start: 0
[18:56:54.147] <TB0> INFO: Pixel decoding errors: 0
[18:56:54.147] <TB0> INFO: pixel data incomplete: 0
[18:56:54.147] <TB0> INFO: pixel address: 0
[18:56:54.147] <TB0> INFO: pulse height fill bit: 0
[18:56:54.147] <TB0> INFO: buffer corruption: 0
[18:56:54.314] <TB0> INFO: ######################################################################
[18:56:54.314] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[18:56:54.314] <TB0> INFO: ######################################################################
[18:56:54.333] <TB0> INFO: scanning low vcal = 10
[18:56:54.591] <TB0> INFO: Expecting 41600 events.
[18:56:58.213] <TB0> INFO: 41600 events read in total (3030ms).
[18:56:58.214] <TB0> INFO: Test took 3881ms.
[18:56:58.216] <TB0> INFO: scanning low vcal = 20
[18:56:58.510] <TB0> INFO: Expecting 41600 events.
[18:57:02.133] <TB0> INFO: 41600 events read in total (3031ms).
[18:57:02.134] <TB0> INFO: Test took 3918ms.
[18:57:02.135] <TB0> INFO: scanning low vcal = 30
[18:57:02.427] <TB0> INFO: Expecting 41600 events.
[18:57:06.164] <TB0> INFO: 41600 events read in total (3145ms).
[18:57:06.165] <TB0> INFO: Test took 4029ms.
[18:57:06.167] <TB0> INFO: scanning low vcal = 40
[18:57:06.444] <TB0> INFO: Expecting 41600 events.
[18:57:10.454] <TB0> INFO: 41600 events read in total (3418ms).
[18:57:10.456] <TB0> INFO: Test took 4289ms.
[18:57:10.458] <TB0> INFO: scanning low vcal = 50
[18:57:10.736] <TB0> INFO: Expecting 41600 events.
[18:57:14.779] <TB0> INFO: 41600 events read in total (3451ms).
[18:57:14.779] <TB0> INFO: Test took 4320ms.
[18:57:14.783] <TB0> INFO: scanning low vcal = 60
[18:57:15.060] <TB0> INFO: Expecting 41600 events.
[18:57:19.111] <TB0> INFO: 41600 events read in total (3459ms).
[18:57:19.112] <TB0> INFO: Test took 4329ms.
[18:57:19.115] <TB0> INFO: scanning low vcal = 70
[18:57:19.393] <TB0> INFO: Expecting 41600 events.
[18:57:23.413] <TB0> INFO: 41600 events read in total (3428ms).
[18:57:23.414] <TB0> INFO: Test took 4299ms.
[18:57:23.417] <TB0> INFO: scanning low vcal = 80
[18:57:23.695] <TB0> INFO: Expecting 41600 events.
[18:57:27.702] <TB0> INFO: 41600 events read in total (3415ms).
[18:57:27.703] <TB0> INFO: Test took 4286ms.
[18:57:27.706] <TB0> INFO: scanning low vcal = 90
[18:57:27.983] <TB0> INFO: Expecting 41600 events.
[18:57:32.011] <TB0> INFO: 41600 events read in total (3436ms).
[18:57:32.012] <TB0> INFO: Test took 4306ms.
[18:57:32.015] <TB0> INFO: scanning low vcal = 100
[18:57:32.292] <TB0> INFO: Expecting 41600 events.
[18:57:36.284] <TB0> INFO: 41600 events read in total (3400ms).
[18:57:36.285] <TB0> INFO: Test took 4270ms.
[18:57:36.287] <TB0> INFO: scanning low vcal = 110
[18:57:36.565] <TB0> INFO: Expecting 41600 events.
[18:57:40.568] <TB0> INFO: 41600 events read in total (3411ms).
[18:57:40.568] <TB0> INFO: Test took 4280ms.
[18:57:40.573] <TB0> INFO: scanning low vcal = 120
[18:57:40.849] <TB0> INFO: Expecting 41600 events.
[18:57:44.819] <TB0> INFO: 41600 events read in total (3378ms).
[18:57:44.819] <TB0> INFO: Test took 4246ms.
[18:57:44.823] <TB0> INFO: scanning low vcal = 130
[18:57:45.099] <TB0> INFO: Expecting 41600 events.
[18:57:49.050] <TB0> INFO: 41600 events read in total (3360ms).
[18:57:49.051] <TB0> INFO: Test took 4228ms.
[18:57:49.055] <TB0> INFO: scanning low vcal = 140
[18:57:49.331] <TB0> INFO: Expecting 41600 events.
[18:57:53.289] <TB0> INFO: 41600 events read in total (3366ms).
[18:57:53.289] <TB0> INFO: Test took 4234ms.
[18:57:53.293] <TB0> INFO: scanning low vcal = 150
[18:57:53.569] <TB0> INFO: Expecting 41600 events.
[18:57:57.534] <TB0> INFO: 41600 events read in total (3373ms).
[18:57:57.534] <TB0> INFO: Test took 4241ms.
[18:57:57.538] <TB0> INFO: scanning low vcal = 160
[18:57:57.814] <TB0> INFO: Expecting 41600 events.
[18:58:01.787] <TB0> INFO: 41600 events read in total (3382ms).
[18:58:01.788] <TB0> INFO: Test took 4250ms.
[18:58:01.791] <TB0> INFO: scanning low vcal = 170
[18:58:02.068] <TB0> INFO: Expecting 41600 events.
[18:58:06.036] <TB0> INFO: 41600 events read in total (3376ms).
[18:58:06.037] <TB0> INFO: Test took 4245ms.
[18:58:06.042] <TB0> INFO: scanning low vcal = 180
[18:58:06.316] <TB0> INFO: Expecting 41600 events.
[18:58:10.280] <TB0> INFO: 41600 events read in total (3372ms).
[18:58:10.281] <TB0> INFO: Test took 4238ms.
[18:58:10.284] <TB0> INFO: scanning low vcal = 190
[18:58:10.561] <TB0> INFO: Expecting 41600 events.
[18:58:14.528] <TB0> INFO: 41600 events read in total (3376ms).
[18:58:14.528] <TB0> INFO: Test took 4244ms.
[18:58:14.532] <TB0> INFO: scanning low vcal = 200
[18:58:14.808] <TB0> INFO: Expecting 41600 events.
[18:58:18.907] <TB0> INFO: 41600 events read in total (3508ms).
[18:58:18.908] <TB0> INFO: Test took 4376ms.
[18:58:18.911] <TB0> INFO: scanning low vcal = 210
[18:58:19.188] <TB0> INFO: Expecting 41600 events.
[18:58:23.215] <TB0> INFO: 41600 events read in total (3436ms).
[18:58:23.216] <TB0> INFO: Test took 4305ms.
[18:58:23.219] <TB0> INFO: scanning low vcal = 220
[18:58:23.496] <TB0> INFO: Expecting 41600 events.
[18:58:27.583] <TB0> INFO: 41600 events read in total (3495ms).
[18:58:27.583] <TB0> INFO: Test took 4363ms.
[18:58:27.586] <TB0> INFO: scanning low vcal = 230
[18:58:27.863] <TB0> INFO: Expecting 41600 events.
[18:58:31.926] <TB0> INFO: 41600 events read in total (3471ms).
[18:58:31.926] <TB0> INFO: Test took 4340ms.
[18:58:31.930] <TB0> INFO: scanning low vcal = 240
[18:58:32.206] <TB0> INFO: Expecting 41600 events.
[18:58:36.197] <TB0> INFO: 41600 events read in total (3399ms).
[18:58:36.198] <TB0> INFO: Test took 4268ms.
[18:58:36.201] <TB0> INFO: scanning low vcal = 250
[18:58:36.478] <TB0> INFO: Expecting 41600 events.
[18:58:40.494] <TB0> INFO: 41600 events read in total (3424ms).
[18:58:40.495] <TB0> INFO: Test took 4294ms.
[18:58:40.499] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[18:58:40.775] <TB0> INFO: Expecting 41600 events.
[18:58:44.807] <TB0> INFO: 41600 events read in total (3441ms).
[18:58:44.807] <TB0> INFO: Test took 4308ms.
[18:58:44.810] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[18:58:45.087] <TB0> INFO: Expecting 41600 events.
[18:58:49.117] <TB0> INFO: 41600 events read in total (3438ms).
[18:58:49.118] <TB0> INFO: Test took 4308ms.
[18:58:49.121] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[18:58:49.398] <TB0> INFO: Expecting 41600 events.
[18:58:53.485] <TB0> INFO: 41600 events read in total (3496ms).
[18:58:53.487] <TB0> INFO: Test took 4366ms.
[18:58:53.490] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[18:58:53.789] <TB0> INFO: Expecting 41600 events.
[18:58:57.819] <TB0> INFO: 41600 events read in total (3438ms).
[18:58:57.820] <TB0> INFO: Test took 4330ms.
[18:58:57.822] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[18:58:58.099] <TB0> INFO: Expecting 41600 events.
[18:59:02.117] <TB0> INFO: 41600 events read in total (3426ms).
[18:59:02.118] <TB0> INFO: Test took 4295ms.
[18:59:02.540] <TB0> INFO: PixTestGainPedestal::measure() done
[18:59:35.616] <TB0> INFO: PixTestGainPedestal::fit() done
[18:59:35.616] <TB0> INFO: non-linearity mean: 0.951 0.931 0.943 1.043 0.979 0.927 0.954 0.961 0.905 0.942 0.942 0.959 0.983 0.982 0.978 0.973
[18:59:35.616] <TB0> INFO: non-linearity RMS: 0.070 0.100 0.077 0.160 0.005 0.102 0.055 0.032 0.123 0.138 0.062 0.047 0.004 0.005 0.004 0.008
[18:59:35.616] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C0.dat
[18:59:35.629] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C1.dat
[18:59:35.642] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C2.dat
[18:59:35.655] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C3.dat
[18:59:35.669] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C4.dat
[18:59:35.682] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C5.dat
[18:59:35.695] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C6.dat
[18:59:35.708] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C7.dat
[18:59:35.721] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C8.dat
[18:59:35.735] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C9.dat
[18:59:35.748] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C10.dat
[18:59:35.761] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C11.dat
[18:59:35.774] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C12.dat
[18:59:35.787] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C13.dat
[18:59:35.800] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C14.dat
[18:59:35.813] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//003_Fulltest_p17//phCalibrationFitErr35_C15.dat
[18:59:35.826] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 161 seconds
[18:59:35.826] <TB0> INFO: Decoding statistics:
[18:59:35.826] <TB0> INFO: General information:
[18:59:35.826] <TB0> INFO: 16bit words read: 3276630
[18:59:35.826] <TB0> INFO: valid events total: 332800
[18:59:35.826] <TB0> INFO: empty events: 3854
[18:59:35.826] <TB0> INFO: valid events with pixels: 328946
[18:59:35.826] <TB0> INFO: valid pixel hits: 639915
[18:59:35.826] <TB0> INFO: Event errors: 0
[18:59:35.826] <TB0> INFO: start marker: 0
[18:59:35.826] <TB0> INFO: stop marker: 0
[18:59:35.826] <TB0> INFO: overflow: 0
[18:59:35.826] <TB0> INFO: invalid 5bit words: 0
[18:59:35.826] <TB0> INFO: invalid XOR eye diagram: 0
[18:59:35.826] <TB0> INFO: frame (failed synchr.): 0
[18:59:35.826] <TB0> INFO: idle data (no TBM trl): 0
[18:59:35.826] <TB0> INFO: no data (only TBM hdr): 0
[18:59:35.826] <TB0> INFO: TBM errors: 0
[18:59:35.826] <TB0> INFO: flawed TBM headers: 0
[18:59:35.826] <TB0> INFO: flawed TBM trailers: 0
[18:59:35.826] <TB0> INFO: event ID mismatches: 0
[18:59:35.826] <TB0> INFO: ROC errors: 0
[18:59:35.826] <TB0> INFO: missing ROC header(s): 0
[18:59:35.826] <TB0> INFO: misplaced readback start: 0
[18:59:35.826] <TB0> INFO: Pixel decoding errors: 0
[18:59:35.826] <TB0> INFO: pixel data incomplete: 0
[18:59:35.826] <TB0> INFO: pixel address: 0
[18:59:35.826] <TB0> INFO: pulse height fill bit: 0
[18:59:35.826] <TB0> INFO: buffer corruption: 0
[18:59:35.841] <TB0> INFO: Decoding statistics:
[18:59:35.841] <TB0> INFO: General information:
[18:59:35.841] <TB0> INFO: 16bit words read: 3406048
[18:59:35.841] <TB0> INFO: valid events total: 353536
[18:59:35.841] <TB0> INFO: empty events: 22089
[18:59:35.841] <TB0> INFO: valid events with pixels: 331447
[18:59:35.841] <TB0> INFO: valid pixel hits: 642416
[18:59:35.841] <TB0> INFO: Event errors: 0
[18:59:35.841] <TB0> INFO: start marker: 0
[18:59:35.841] <TB0> INFO: stop marker: 0
[18:59:35.841] <TB0> INFO: overflow: 0
[18:59:35.841] <TB0> INFO: invalid 5bit words: 0
[18:59:35.841] <TB0> INFO: invalid XOR eye diagram: 0
[18:59:35.841] <TB0> INFO: frame (failed synchr.): 0
[18:59:35.841] <TB0> INFO: idle data (no TBM trl): 0
[18:59:35.841] <TB0> INFO: no data (only TBM hdr): 0
[18:59:35.841] <TB0> INFO: TBM errors: 0
[18:59:35.841] <TB0> INFO: flawed TBM headers: 0
[18:59:35.841] <TB0> INFO: flawed TBM trailers: 0
[18:59:35.841] <TB0> INFO: event ID mismatches: 0
[18:59:35.841] <TB0> INFO: ROC errors: 0
[18:59:35.841] <TB0> INFO: missing ROC header(s): 0
[18:59:35.841] <TB0> INFO: misplaced readback start: 0
[18:59:35.841] <TB0> INFO: Pixel decoding errors: 0
[18:59:35.841] <TB0> INFO: pixel data incomplete: 0
[18:59:35.842] <TB0> INFO: pixel address: 0
[18:59:35.842] <TB0> INFO: pulse height fill bit: 0
[18:59:35.842] <TB0> INFO: buffer corruption: 0
[18:59:35.842] <TB0> INFO: enter test to run
[18:59:35.842] <TB0> INFO: test: exit no parameter change
[18:59:35.957] <TB0> QUIET: Connection to board 71 closed.
[18:59:35.957] <TB0> INFO: pXar: this is the end, my friend