[15:58:33.226] <TB0> INFO: *** Welcome to pxar ***
[15:58:33.226] <TB0> INFO: *** Today: 2016/10/25
[15:58:33.234] <TB0> INFO: *** Version: c8ba-dirty
[15:58:33.234] <TB0> INFO: readRocDacs: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[15:58:33.235] <TB0> INFO: readTbmDacs: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[15:58:33.235] <TB0> INFO: readMaskFile: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//defaultMaskFile.dat
[15:58:33.235] <TB0> INFO: readTrimFile: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters_C15.dat
[15:58:33.295] <TB0> INFO: clk: 4
[15:58:33.295] <TB0> INFO: ctr: 4
[15:58:33.295] <TB0> INFO: sda: 19
[15:58:33.295] <TB0> INFO: tin: 9
[15:58:33.295] <TB0> INFO: level: 15
[15:58:33.295] <TB0> INFO: triggerdelay: 0
[15:58:33.295] <TB0> QUIET: Instanciating API for pxar v2.7.6+55~gafdbfd9
[15:58:33.295] <TB0> INFO: Log level: INFO
[15:58:33.303] <TB0> INFO: Found DTB DTB_WRQ4OZ
[15:58:33.313] <TB0> QUIET: Connection to board DTB_WRQ4OZ opened.
[15:58:33.315] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 71
HW version: DTB1.2
FW version: 4.6
SW version: 4.7
Options:
USB id: DTB_WRQ4OZ
MAC address: 40D855118047
Hostname: pixelDTB071
Comment:
------------------------------------------------------
[15:58:33.317] <TB0> INFO: RPC call hashes of host and DTB match: 486171790
[15:58:34.804] <TB0> INFO: DUT info:
[15:58:34.804] <TB0> INFO: The DUT currently contains the following objects:
[15:58:34.804] <TB0> INFO: 4 TBM Cores tbm10c (4 ON)
[15:58:34.804] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:58:34.804] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:58:34.804] <TB0> INFO: TBM Core alpha (2): 7 registers set
[15:58:34.804] <TB0> INFO: TBM Core beta (3): 7 registers set
[15:58:34.804] <TB0> INFO: 16 ROCs proc600 (16 ON) with 4160 pixelConfigs
[15:58:34.804] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.804] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.804] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:34.805] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:58:35.205] <TB0> INFO: enter 'restricted' command line mode
[15:58:35.205] <TB0> INFO: enter test to run
[15:58:35.205] <TB0> INFO: test: pretest no parameter change
[15:58:35.206] <TB0> INFO: running: pretest
[15:58:35.210] <TB0> INFO: ######################################################################
[15:58:35.210] <TB0> INFO: PixTestPretest::doTest()
[15:58:35.210] <TB0> INFO: ######################################################################
[15:58:35.211] <TB0> INFO: ----------------------------------------------------------------------
[15:58:35.211] <TB0> INFO: PixTestPretest::programROC()
[15:58:35.211] <TB0> INFO: ----------------------------------------------------------------------
[15:58:53.225] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:58:53.225] <TB0> INFO: IA differences per ROC: 16.1 19.3 19.3 18.5 20.9 17.7 16.9 19.3 20.9 22.5 17.7 18.5 16.1 18.5 20.9 19.3
[15:58:53.288] <TB0> INFO: ----------------------------------------------------------------------
[15:58:53.288] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:58:53.288] <TB0> INFO: ----------------------------------------------------------------------
[15:59:14.570] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[15:59:14.570] <TB0> INFO: i(loss) [mA/ROC]: 19.3 18.5 20.1 18.5 19.3 18.5 19.3 18.5 18.5 18.5 19.3 20.1 18.5 20.1 18.5 18.5
[15:59:14.606] <TB0> INFO: ----------------------------------------------------------------------
[15:59:14.606] <TB0> INFO: PixTestPretest::findTiming()
[15:59:14.606] <TB0> INFO: ----------------------------------------------------------------------
[15:59:14.606] <TB0> INFO: PixTestCmd::init()

[15:59:46.993] <TB0> INFO: TBM phases: 160MHz: 0, 400MHz: 6, TBM delays: ROC(0/1):5, header/trailer: 1, token: 1
[15:59:46.993] <TB0> INFO: (success/tries = 100/100), width = 3
[15:59:48.503] <TB0> INFO: ----------------------------------------------------------------------
[15:59:48.503] <TB0> INFO: PixTestPretest::findWorkingPixel()
[15:59:48.503] <TB0> INFO: ----------------------------------------------------------------------
[15:59:48.596] <TB0> INFO: Expecting 231680 events.
[15:59:58.469] <TB0> INFO: 231680 events read in total (9282ms).
[15:59:58.478] <TB0> INFO: Test took 9972ms.
[15:59:58.722] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:59:58.755] <TB0> INFO: ----------------------------------------------------------------------
[15:59:58.755] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[15:59:58.755] <TB0> INFO: ----------------------------------------------------------------------
[15:59:58.850] <TB0> INFO: Expecting 231680 events.
[16:00:08.823] <TB0> INFO: 231680 events read in total (9381ms).
[16:00:08.832] <TB0> INFO: Test took 10071ms.
[16:00:09.097] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[16:00:09.097] <TB0> INFO: CalDel: 97 103 107 102 104 81 103 96 126 99 92 112 106 105 95 97
[16:00:09.097] <TB0> INFO: VthrComp: 51 51 51 51 51 53 51 51 51 51 52 54 51 57 51 51
[16:00:09.104] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C0.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C1.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C2.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C3.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C4.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C5.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C6.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C7.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C8.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C9.dat
[16:00:09.105] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C10.dat
[16:00:09.106] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C11.dat
[16:00:09.106] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C12.dat
[16:00:09.106] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C13.dat
[16:00:09.106] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C14.dat
[16:00:09.106] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters_C15.dat
[16:00:09.106] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0a.dat
[16:00:09.106] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C0b.dat
[16:00:09.106] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1a.dat
[16:00:09.106] <TB0> INFO: write tbm parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//tbmParameters_C1b.dat
[16:00:09.106] <TB0> INFO: PixTestPretest::doTest() done, duration: 93 seconds
[16:00:09.159] <TB0> INFO: enter test to run
[16:00:09.159] <TB0> INFO: test: FullTest no parameter change
[16:00:09.159] <TB0> INFO: running: fulltest
[16:00:09.159] <TB0> INFO: ######################################################################
[16:00:09.159] <TB0> INFO: PixTestFullTest::doTest()
[16:00:09.159] <TB0> INFO: ######################################################################
[16:00:09.161] <TB0> INFO: ######################################################################
[16:00:09.161] <TB0> INFO: PixTestAlive::doTest()
[16:00:09.161] <TB0> INFO: ######################################################################
[16:00:09.162] <TB0> INFO: ----------------------------------------------------------------------
[16:00:09.162] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:09.162] <TB0> INFO: ----------------------------------------------------------------------
[16:00:09.403] <TB0> INFO: Expecting 41600 events.
[16:00:12.912] <TB0> INFO: 41600 events read in total (2917ms).
[16:00:12.913] <TB0> INFO: Test took 3750ms.
[16:00:13.145] <TB0> INFO: PixTestAlive::aliveTest() done
[16:00:13.145] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:13.147] <TB0> INFO: ----------------------------------------------------------------------
[16:00:13.147] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:13.147] <TB0> INFO: ----------------------------------------------------------------------
[16:00:13.388] <TB0> INFO: Expecting 41600 events.
[16:00:16.345] <TB0> INFO: 41600 events read in total (2365ms).
[16:00:16.345] <TB0> INFO: Test took 3197ms.
[16:00:16.345] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:00:16.582] <TB0> INFO: PixTestAlive::maskTest() done
[16:00:16.582] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:16.584] <TB0> INFO: ----------------------------------------------------------------------
[16:00:16.584] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:00:16.584] <TB0> INFO: ----------------------------------------------------------------------
[16:00:16.821] <TB0> INFO: Expecting 41600 events.
[16:00:20.338] <TB0> INFO: 41600 events read in total (2926ms).
[16:00:20.339] <TB0> INFO: Test took 3754ms.
[16:00:20.574] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[16:00:20.574] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:00:20.574] <TB0> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[16:00:20.574] <TB0> INFO: Decoding statistics:
[16:00:20.574] <TB0> INFO: General information:
[16:00:20.574] <TB0> INFO: 16bit words read: 0
[16:00:20.574] <TB0> INFO: valid events total: 0
[16:00:20.574] <TB0> INFO: empty events: 0
[16:00:20.574] <TB0> INFO: valid events with pixels: 0
[16:00:20.574] <TB0> INFO: valid pixel hits: 0
[16:00:20.574] <TB0> INFO: Event errors: 0
[16:00:20.574] <TB0> INFO: start marker: 0
[16:00:20.574] <TB0> INFO: stop marker: 0
[16:00:20.574] <TB0> INFO: overflow: 0
[16:00:20.574] <TB0> INFO: invalid 5bit words: 0
[16:00:20.574] <TB0> INFO: invalid XOR eye diagram: 0
[16:00:20.574] <TB0> INFO: frame (failed synchr.): 0
[16:00:20.574] <TB0> INFO: idle data (no TBM trl): 0
[16:00:20.574] <TB0> INFO: no data (only TBM hdr): 0
[16:00:20.574] <TB0> INFO: TBM errors: 0
[16:00:20.574] <TB0> INFO: flawed TBM headers: 0
[16:00:20.574] <TB0> INFO: flawed TBM trailers: 0
[16:00:20.574] <TB0> INFO: event ID mismatches: 0
[16:00:20.574] <TB0> INFO: ROC errors: 0
[16:00:20.574] <TB0> INFO: missing ROC header(s): 0
[16:00:20.575] <TB0> INFO: misplaced readback start: 0
[16:00:20.575] <TB0> INFO: Pixel decoding errors: 0
[16:00:20.575] <TB0> INFO: pixel data incomplete: 0
[16:00:20.575] <TB0> INFO: pixel address: 0
[16:00:20.575] <TB0> INFO: pulse height fill bit: 0
[16:00:20.575] <TB0> INFO: buffer corruption: 0
[16:00:20.582] <TB0> INFO: readReadbackCal: /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:20.582] <TB0> INFO: readGainPedestalParameters /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C0.dat .. /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr_C15.dat

[16:00:20.582] <TB0> INFO: ######################################################################
[16:00:20.582] <TB0> INFO: PixTestReadback::doTest()
[16:00:20.582] <TB0> INFO: ######################################################################
[16:00:20.582] <TB0> INFO: ----------------------------------------------------------------------
[16:00:20.582] <TB0> INFO: PixTestReadback::CalibrateVd()
[16:00:20.582] <TB0> INFO: ----------------------------------------------------------------------
[16:00:30.549] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:30.550] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:30.584] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[16:00:30.584] <TB0> INFO: ----------------------------------------------------------------------
[16:00:30.584] <TB0> INFO: PixTestReadback::CalibrateVa()
[16:00:30.584] <TB0> INFO: ----------------------------------------------------------------------
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:00:40.524] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:00:40.525] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:00:40.555] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[16:00:40.555] <TB0> INFO: ----------------------------------------------------------------------
[16:00:40.555] <TB0> INFO: PixTestReadback::readbackVbg()
[16:00:40.555] <TB0> INFO: ----------------------------------------------------------------------
[16:00:48.221] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[16:00:48.221] <TB0> INFO: ----------------------------------------------------------------------
[16:00:48.222] <TB0> INFO: PixTestReadback::getCalibratedVbg()
[16:00:48.222] <TB0> INFO: ----------------------------------------------------------------------
[16:00:48.222] <TB0> INFO: Vbg will be calibrated using Vd calibration
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 157.2calibrated Vbg = 1.17349 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 154.2calibrated Vbg = 1.16392 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 151.4calibrated Vbg = 1.16727 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 158.6calibrated Vbg = 1.16516 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 149calibrated Vbg = 1.16429 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.8calibrated Vbg = 1.16487 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 153.8calibrated Vbg = 1.16813 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 144.6calibrated Vbg = 1.16963 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153calibrated Vbg = 1.1657 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 160calibrated Vbg = 1.16199 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 155.7calibrated Vbg = 1.16345 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 160calibrated Vbg = 1.157 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 165.6calibrated Vbg = 1.16902 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 167.7calibrated Vbg = 1.16502 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 160.9calibrated Vbg = 1.16846 :::*/*/*/*/
[16:00:48.222] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.3calibrated Vbg = 1.16135 :::*/*/*/*/
[16:00:48.225] <TB0> INFO: ----------------------------------------------------------------------
[16:00:48.225] <TB0> INFO: PixTestReadback::CalibrateIa()
[16:00:48.225] <TB0> INFO: ----------------------------------------------------------------------
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C0.dat
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C1.dat
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C2.dat
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C3.dat
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C4.dat
[16:03:29.076] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C5.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C6.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C7.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C8.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C9.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C10.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C11.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C12.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C13.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C14.dat
[16:03:29.077] <TB0> INFO: write readback calibration parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//readbackCal_C15.dat
[16:03:29.105] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[16:03:29.106] <TB0> INFO: PixTestReadback::doTest() done
[16:03:29.106] <TB0> INFO: Decoding statistics:
[16:03:29.106] <TB0> INFO: General information:
[16:03:29.106] <TB0> INFO: 16bit words read: 1536
[16:03:29.106] <TB0> INFO: valid events total: 256
[16:03:29.106] <TB0> INFO: empty events: 256
[16:03:29.106] <TB0> INFO: valid events with pixels: 0
[16:03:29.106] <TB0> INFO: valid pixel hits: 0
[16:03:29.106] <TB0> INFO: Event errors: 0
[16:03:29.106] <TB0> INFO: start marker: 0
[16:03:29.106] <TB0> INFO: stop marker: 0
[16:03:29.106] <TB0> INFO: overflow: 0
[16:03:29.106] <TB0> INFO: invalid 5bit words: 0
[16:03:29.106] <TB0> INFO: invalid XOR eye diagram: 0
[16:03:29.106] <TB0> INFO: frame (failed synchr.): 0
[16:03:29.106] <TB0> INFO: idle data (no TBM trl): 0
[16:03:29.106] <TB0> INFO: no data (only TBM hdr): 0
[16:03:29.106] <TB0> INFO: TBM errors: 0
[16:03:29.107] <TB0> INFO: flawed TBM headers: 0
[16:03:29.107] <TB0> INFO: flawed TBM trailers: 0
[16:03:29.107] <TB0> INFO: event ID mismatches: 0
[16:03:29.107] <TB0> INFO: ROC errors: 0
[16:03:29.107] <TB0> INFO: missing ROC header(s): 0
[16:03:29.107] <TB0> INFO: misplaced readback start: 0
[16:03:29.107] <TB0> INFO: Pixel decoding errors: 0
[16:03:29.107] <TB0> INFO: pixel data incomplete: 0
[16:03:29.107] <TB0> INFO: pixel address: 0
[16:03:29.107] <TB0> INFO: pulse height fill bit: 0
[16:03:29.107] <TB0> INFO: buffer corruption: 0
[16:03:29.161] <TB0> INFO: ######################################################################
[16:03:29.161] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:03:29.161] <TB0> INFO: ######################################################################
[16:03:29.163] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:03:29.194] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:03:29.194] <TB0> INFO: run 1 of 1
[16:03:29.431] <TB0> INFO: Expecting 3120000 events.
[16:04:00.812] <TB0> INFO: 667475 events read in total (30789ms).











[16:04:31.081] <TB0> INFO: 1332330 events read in total (61058ms).











[16:05:01.505] <TB0> INFO: 1995415 events read in total (91482ms).











[16:05:32.348] <TB0> INFO: 2658520 events read in total (122325ms).











[16:05:53.368] <TB0> INFO: 3120000 events read in total (143345ms).
[16:05:53.472] <TB0> INFO: Test took 144279ms.
[16:06:20.027] <TB0> INFO: PixTestBBMap::doTest() done with 3 decoding errors: , duration: 170 seconds
[16:06:20.027] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0
[16:06:20.027] <TB0> INFO: separation cut (per ROC): 104 104 105 102 108 106 101 103 104 104 106 129 103 124 104 96
[16:06:20.028] <TB0> INFO: Decoding statistics:
[16:06:20.028] <TB0> INFO: General information:
[16:06:20.028] <TB0> INFO: 16bit words read: 0
[16:06:20.028] <TB0> INFO: valid events total: 0
[16:06:20.028] <TB0> INFO: empty events: 0
[16:06:20.028] <TB0> INFO: valid events with pixels: 0
[16:06:20.028] <TB0> INFO: valid pixel hits: 0
[16:06:20.028] <TB0> INFO: Event errors: 0
[16:06:20.028] <TB0> INFO: start marker: 0
[16:06:20.028] <TB0> INFO: stop marker: 0
[16:06:20.028] <TB0> INFO: overflow: 0
[16:06:20.028] <TB0> INFO: invalid 5bit words: 0
[16:06:20.028] <TB0> INFO: invalid XOR eye diagram: 0
[16:06:20.028] <TB0> INFO: frame (failed synchr.): 0
[16:06:20.028] <TB0> INFO: idle data (no TBM trl): 0
[16:06:20.028] <TB0> INFO: no data (only TBM hdr): 0
[16:06:20.028] <TB0> INFO: TBM errors: 0
[16:06:20.028] <TB0> INFO: flawed TBM headers: 0
[16:06:20.028] <TB0> INFO: flawed TBM trailers: 0
[16:06:20.028] <TB0> INFO: event ID mismatches: 0
[16:06:20.028] <TB0> INFO: ROC errors: 0
[16:06:20.028] <TB0> INFO: missing ROC header(s): 0
[16:06:20.028] <TB0> INFO: misplaced readback start: 0
[16:06:20.028] <TB0> INFO: Pixel decoding errors: 0
[16:06:20.028] <TB0> INFO: pixel data incomplete: 0
[16:06:20.028] <TB0> INFO: pixel address: 0
[16:06:20.028] <TB0> INFO: pulse height fill bit: 0
[16:06:20.028] <TB0> INFO: buffer corruption: 0
[16:06:20.066] <TB0> INFO: ######################################################################
[16:06:20.066] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:20.066] <TB0> INFO: ######################################################################
[16:06:20.066] <TB0> INFO: ----------------------------------------------------------------------
[16:06:20.066] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:06:20.066] <TB0> INFO: ----------------------------------------------------------------------
[16:06:20.066] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 200 (-1/-1) hits flags = 528 (plus default)
[16:06:20.083] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[16:06:20.083] <TB0> INFO: run 1 of 1
[16:06:20.333] <TB0> INFO: Expecting 36608000 events.
[16:06:43.910] <TB0> INFO: 682000 events read in total (22986ms).
[16:07:06.947] <TB0> INFO: 1349700 events read in total (46023ms).
[16:07:29.915] <TB0> INFO: 2014800 events read in total (68991ms).
[16:07:52.780] <TB0> INFO: 2679600 events read in total (91856ms).
[16:08:15.492] <TB0> INFO: 3343600 events read in total (114568ms).
[16:08:38.363] <TB0> INFO: 4008700 events read in total (137439ms).
[16:09:01.406] <TB0> INFO: 4672450 events read in total (160482ms).
[16:09:24.139] <TB0> INFO: 5336000 events read in total (183215ms).
[16:09:47.159] <TB0> INFO: 5999000 events read in total (206235ms).
[16:10:10.120] <TB0> INFO: 6661000 events read in total (229196ms).
[16:10:32.927] <TB0> INFO: 7323050 events read in total (252003ms).
[16:10:55.691] <TB0> INFO: 7985100 events read in total (274767ms).
[16:11:18.562] <TB0> INFO: 8647000 events read in total (297638ms).
[16:11:41.335] <TB0> INFO: 9309350 events read in total (320411ms).
[16:12:04.240] <TB0> INFO: 9969700 events read in total (343316ms).
[16:12:27.176] <TB0> INFO: 10632450 events read in total (366252ms).
[16:12:49.968] <TB0> INFO: 11295150 events read in total (389044ms).
[16:13:12.772] <TB0> INFO: 11955700 events read in total (411848ms).
[16:13:35.436] <TB0> INFO: 12615250 events read in total (434512ms).
[16:13:58.228] <TB0> INFO: 13277350 events read in total (457304ms).
[16:14:21.086] <TB0> INFO: 13937250 events read in total (480162ms).
[16:14:43.808] <TB0> INFO: 14597300 events read in total (502884ms).
[16:15:06.458] <TB0> INFO: 15256600 events read in total (525534ms).
[16:15:29.124] <TB0> INFO: 15915450 events read in total (548200ms).
[16:15:52.152] <TB0> INFO: 16573850 events read in total (571228ms).
[16:16:14.612] <TB0> INFO: 17231600 events read in total (593688ms).
[16:16:37.148] <TB0> INFO: 17889950 events read in total (616224ms).
[16:17:00.193] <TB0> INFO: 18546750 events read in total (639269ms).
[16:17:22.996] <TB0> INFO: 19200500 events read in total (662072ms).
[16:17:45.580] <TB0> INFO: 19855600 events read in total (684656ms).
[16:18:08.210] <TB0> INFO: 20510500 events read in total (707286ms).
[16:18:30.783] <TB0> INFO: 21164750 events read in total (729859ms).
[16:18:53.734] <TB0> INFO: 21821950 events read in total (752810ms).
[16:19:16.620] <TB0> INFO: 22475550 events read in total (775696ms).
[16:19:39.252] <TB0> INFO: 23130200 events read in total (798328ms).
[16:20:01.000] <TB0> INFO: 23782750 events read in total (821076ms).
[16:20:24.643] <TB0> INFO: 24435900 events read in total (843720ms).
[16:20:47.317] <TB0> INFO: 25087600 events read in total (866393ms).
[16:21:09.919] <TB0> INFO: 25742050 events read in total (888995ms).
[16:21:32.674] <TB0> INFO: 26395150 events read in total (911750ms).
[16:21:55.507] <TB0> INFO: 27047400 events read in total (934583ms).
[16:22:18.222] <TB0> INFO: 27699750 events read in total (957298ms).
[16:22:40.967] <TB0> INFO: 28351000 events read in total (980043ms).
[16:23:03.476] <TB0> INFO: 29002800 events read in total (1002552ms).
[16:23:26.064] <TB0> INFO: 29654050 events read in total (1025140ms).
[16:23:48.598] <TB0> INFO: 30306000 events read in total (1047674ms).
[16:24:11.346] <TB0> INFO: 30956550 events read in total (1070422ms).
[16:24:34.029] <TB0> INFO: 31608950 events read in total (1093105ms).
[16:24:56.750] <TB0> INFO: 32260500 events read in total (1115826ms).
[16:25:19.429] <TB0> INFO: 32913850 events read in total (1138505ms).
[16:25:41.949] <TB0> INFO: 33566650 events read in total (1161025ms).
[16:26:04.562] <TB0> INFO: 34220200 events read in total (1183638ms).
[16:26:27.169] <TB0> INFO: 34871650 events read in total (1206245ms).
[16:26:49.898] <TB0> INFO: 35523700 events read in total (1228974ms).
[16:27:12.636] <TB0> INFO: 36181900 events read in total (1251712ms).
[16:27:27.266] <TB0> INFO: 36608000 events read in total (1266342ms).
[16:27:27.344] <TB0> INFO: Test took 1267261ms.
[16:27:27.792] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:29.574] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:31.558] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:33.382] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:34.948] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:36.926] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:38.919] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:40.792] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:42.682] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:44.616] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:46.535] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:48.560] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:50.741] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:52.313] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:54.133] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:56.600] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[16:27:58.647] <TB0> INFO: PixTestScurves::scurves() done
[16:27:58.647] <TB0> INFO: Vcal mean: 119.72 123.05 111.14 112.21 115.91 119.79 105.66 111.81 119.37 114.26 119.33 136.36 117.31 130.20 108.28 112.57
[16:27:58.647] <TB0> INFO: Vcal RMS: 5.75 6.83 5.05 5.24 5.47 5.58 5.52 5.73 6.42 5.18 6.03 6.26 5.87 6.25 5.32 5.14
[16:27:58.647] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1298 seconds
[16:27:58.647] <TB0> INFO: Decoding statistics:
[16:27:58.647] <TB0> INFO: General information:
[16:27:58.647] <TB0> INFO: 16bit words read: 0
[16:27:58.647] <TB0> INFO: valid events total: 0
[16:27:58.647] <TB0> INFO: empty events: 0
[16:27:58.647] <TB0> INFO: valid events with pixels: 0
[16:27:58.647] <TB0> INFO: valid pixel hits: 0
[16:27:58.647] <TB0> INFO: Event errors: 0
[16:27:58.647] <TB0> INFO: start marker: 0
[16:27:58.647] <TB0> INFO: stop marker: 0
[16:27:58.647] <TB0> INFO: overflow: 0
[16:27:58.647] <TB0> INFO: invalid 5bit words: 0
[16:27:58.647] <TB0> INFO: invalid XOR eye diagram: 0
[16:27:58.647] <TB0> INFO: frame (failed synchr.): 0
[16:27:58.647] <TB0> INFO: idle data (no TBM trl): 0
[16:27:58.647] <TB0> INFO: no data (only TBM hdr): 0
[16:27:58.647] <TB0> INFO: TBM errors: 0
[16:27:58.647] <TB0> INFO: flawed TBM headers: 0
[16:27:58.647] <TB0> INFO: flawed TBM trailers: 0
[16:27:58.647] <TB0> INFO: event ID mismatches: 0
[16:27:58.647] <TB0> INFO: ROC errors: 0
[16:27:58.647] <TB0> INFO: missing ROC header(s): 0
[16:27:58.647] <TB0> INFO: misplaced readback start: 0
[16:27:58.647] <TB0> INFO: Pixel decoding errors: 0
[16:27:58.647] <TB0> INFO: pixel data incomplete: 0
[16:27:58.647] <TB0> INFO: pixel address: 0
[16:27:58.647] <TB0> INFO: pulse height fill bit: 0
[16:27:58.647] <TB0> INFO: buffer corruption: 0
[16:27:58.729] <TB0> INFO: ######################################################################
[16:27:58.729] <TB0> INFO: PixTestTrim::doTest()
[16:27:58.729] <TB0> INFO: ######################################################################
[16:27:58.731] <TB0> INFO: ----------------------------------------------------------------------
[16:27:58.731] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[16:27:58.731] <TB0> INFO: ----------------------------------------------------------------------
[16:27:58.799] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:27:58.799] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:27:58.813] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:27:58.813] <TB0> INFO: run 1 of 1
[16:27:59.138] <TB0> INFO: Expecting 5025280 events.
[16:28:29.498] <TB0> INFO: 824520 events read in total (29752ms).
[16:28:59.389] <TB0> INFO: 1646712 events read in total (59643ms).
[16:29:29.439] <TB0> INFO: 2467248 events read in total (89693ms).
[16:29:59.554] <TB0> INFO: 3285584 events read in total (119808ms).
[16:30:29.560] <TB0> INFO: 4102264 events read in total (149814ms).
[16:30:59.485] <TB0> INFO: 4918040 events read in total (179739ms).
[16:31:03.913] <TB0> INFO: 5025280 events read in total (184167ms).
[16:31:04.032] <TB0> INFO: Test took 185218ms.
[16:31:21.733] <TB0> INFO: ROC 0 VthrComp = 124
[16:31:21.733] <TB0> INFO: ROC 1 VthrComp = 120
[16:31:21.733] <TB0> INFO: ROC 2 VthrComp = 116
[16:31:21.733] <TB0> INFO: ROC 3 VthrComp = 112
[16:31:21.733] <TB0> INFO: ROC 4 VthrComp = 127
[16:31:21.733] <TB0> INFO: ROC 5 VthrComp = 122
[16:31:21.734] <TB0> INFO: ROC 6 VthrComp = 107
[16:31:21.735] <TB0> INFO: ROC 7 VthrComp = 111
[16:31:21.735] <TB0> INFO: ROC 8 VthrComp = 115
[16:31:21.735] <TB0> INFO: ROC 9 VthrComp = 117
[16:31:21.735] <TB0> INFO: ROC 10 VthrComp = 123
[16:31:21.735] <TB0> INFO: ROC 11 VthrComp = 133
[16:31:21.735] <TB0> INFO: ROC 12 VthrComp = 111
[16:31:21.735] <TB0> INFO: ROC 13 VthrComp = 134
[16:31:21.735] <TB0> INFO: ROC 14 VthrComp = 109
[16:31:21.736] <TB0> INFO: ROC 15 VthrComp = 109
[16:31:21.983] <TB0> INFO: Expecting 41600 events.
[16:31:25.699] <TB0> INFO: 41600 events read in total (3124ms).
[16:31:25.700] <TB0> INFO: Test took 3962ms.
[16:31:25.715] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:31:25.715] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:31:25.729] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:31:25.730] <TB0> INFO: run 1 of 1
[16:31:26.017] <TB0> INFO: Expecting 5025280 events.
[16:31:51.770] <TB0> INFO: 588584 events read in total (25161ms).
[16:32:17.196] <TB0> INFO: 1176496 events read in total (50587ms).
[16:32:42.644] <TB0> INFO: 1764768 events read in total (76035ms).
[16:33:08.438] <TB0> INFO: 2353688 events read in total (101829ms).
[16:33:34.470] <TB0> INFO: 2941192 events read in total (127861ms).
[16:34:00.127] <TB0> INFO: 3527264 events read in total (153518ms).
[16:34:26.032] <TB0> INFO: 4113128 events read in total (179423ms).
[16:34:51.743] <TB0> INFO: 4699280 events read in total (205134ms).
[16:35:06.132] <TB0> INFO: 5025280 events read in total (219523ms).
[16:35:06.247] <TB0> INFO: Test took 220515ms.
[16:35:33.468] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 60.2752 for pixel 13/0 mean/min/max = 45.6407/30.813/60.4683
[16:35:33.468] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 62.7319 for pixel 7/14 mean/min/max = 47.2839/31.7463/62.8216
[16:35:33.469] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.5255 for pixel 44/13 mean/min/max = 45.6498/31.6852/59.6144
[16:35:33.469] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 62.0532 for pixel 11/75 mean/min/max = 47.1113/32.0614/62.1612
[16:35:33.470] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 58.0945 for pixel 31/73 mean/min/max = 44.0799/30.0142/58.1457
[16:35:33.470] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.7224 for pixel 0/5 mean/min/max = 46.518/32.1471/60.889
[16:35:33.471] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 63.0386 for pixel 0/51 mean/min/max = 48.3246/33.4069/63.2423
[16:35:33.471] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 64.3594 for pixel 16/9 mean/min/max = 49.0953/33.7852/64.4053
[16:35:33.472] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 61.7413 for pixel 12/1 mean/min/max = 46.7969/31.8113/61.7825
[16:35:33.472] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 61.4367 for pixel 11/17 mean/min/max = 46.4649/31.493/61.4368
[16:35:33.473] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 62.2881 for pixel 11/11 mean/min/max = 46.9975/31.3856/62.6094
[16:35:33.473] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 67.6398 for pixel 51/6 mean/min/max = 51.7739/35.8149/67.7328
[16:35:33.473] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 65.7185 for pixel 42/9 mean/min/max = 49.6461/33.5275/65.7646
[16:35:33.474] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 68.4003 for pixel 8/2 mean/min/max = 51.4921/34.451/68.5331
[16:35:33.474] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 61.7291 for pixel 0/14 mean/min/max = 48.0068/34.1018/61.9118
[16:35:33.475] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 64.9539 for pixel 0/14 mean/min/max = 49.4265/33.8189/65.0342
[16:35:33.476] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:35:33.565] <TB0> INFO: Expecting 411648 events.
[16:35:43.165] <TB0> INFO: 411648 events read in total (9008ms).
[16:35:43.172] <TB0> INFO: Expecting 411648 events.
[16:35:52.294] <TB0> INFO: 411648 events read in total (8719ms).
[16:35:52.304] <TB0> INFO: Expecting 411648 events.
[16:36:01.389] <TB0> INFO: 411648 events read in total (8682ms).
[16:36:01.402] <TB0> INFO: Expecting 411648 events.
[16:36:10.712] <TB0> INFO: 411648 events read in total (8907ms).
[16:36:10.727] <TB0> INFO: Expecting 411648 events.
[16:36:20.051] <TB0> INFO: 411648 events read in total (8922ms).
[16:36:20.070] <TB0> INFO: Expecting 411648 events.
[16:36:29.400] <TB0> INFO: 411648 events read in total (8927ms).
[16:36:29.420] <TB0> INFO: Expecting 411648 events.
[16:36:38.793] <TB0> INFO: 411648 events read in total (8970ms).
[16:36:38.817] <TB0> INFO: Expecting 411648 events.
[16:36:48.206] <TB0> INFO: 411648 events read in total (8986ms).
[16:36:48.232] <TB0> INFO: Expecting 411648 events.
[16:36:57.636] <TB0> INFO: 411648 events read in total (9001ms).
[16:36:57.700] <TB0> INFO: Expecting 411648 events.
[16:37:07.119] <TB0> INFO: 411648 events read in total (9015ms).
[16:37:07.153] <TB0> INFO: Expecting 411648 events.
[16:37:16.548] <TB0> INFO: 411648 events read in total (8993ms).
[16:37:16.607] <TB0> INFO: Expecting 411648 events.
[16:37:25.991] <TB0> INFO: 411648 events read in total (8981ms).
[16:37:26.043] <TB0> INFO: Expecting 411648 events.
[16:37:35.429] <TB0> INFO: 411648 events read in total (8983ms).
[16:37:35.479] <TB0> INFO: Expecting 411648 events.
[16:37:44.924] <TB0> INFO: 411648 events read in total (9042ms).
[16:37:44.003] <TB0> INFO: Expecting 411648 events.
[16:37:54.396] <TB0> INFO: 411648 events read in total (8990ms).
[16:37:54.458] <TB0> INFO: Expecting 411648 events.
[16:38:03.797] <TB0> INFO: 411648 events read in total (8936ms).
[16:38:03.865] <TB0> INFO: Test took 150389ms.
[16:38:04.677] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:38:04.691] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:38:04.691] <TB0> INFO: run 1 of 1
[16:38:04.970] <TB0> INFO: Expecting 5025280 events.
[16:38:31.585] <TB0> INFO: 589920 events read in total (26023ms).
[16:38:57.466] <TB0> INFO: 1179304 events read in total (51904ms).
[16:39:23.278] <TB0> INFO: 1766776 events read in total (77717ms).
[16:39:49.408] <TB0> INFO: 2353144 events read in total (103846ms).
[16:40:15.483] <TB0> INFO: 2940928 events read in total (129922ms).
[16:40:41.273] <TB0> INFO: 3529296 events read in total (155711ms).
[16:41:07.036] <TB0> INFO: 4116088 events read in total (181474ms).
[16:41:32.826] <TB0> INFO: 4701848 events read in total (207264ms).
[16:41:47.372] <TB0> INFO: 5025280 events read in total (221810ms).
[16:41:47.524] <TB0> INFO: Test took 222833ms.
[16:42:12.742] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 2.500000 .. 147.116255
[16:42:13.069] <TB0> INFO: Expecting 208000 events.
[16:42:22.929] <TB0> INFO: 208000 events read in total (9269ms).
[16:42:22.930] <TB0> INFO: Test took 10186ms.
[16:42:22.977] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 2 .. 157 (-1/-1) hits flags = 528 (plus default)
[16:42:22.991] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:42:22.991] <TB0> INFO: run 1 of 1
[16:42:23.269] <TB0> INFO: Expecting 5191680 events.
[16:42:49.445] <TB0> INFO: 582568 events read in total (25584ms).
[16:43:15.055] <TB0> INFO: 1164768 events read in total (51194ms).
[16:43:40.596] <TB0> INFO: 1747072 events read in total (76735ms).
[16:44:06.115] <TB0> INFO: 2329696 events read in total (102254ms).
[16:44:32.017] <TB0> INFO: 2911560 events read in total (128156ms).
[16:44:57.991] <TB0> INFO: 3493392 events read in total (154130ms).
[16:45:23.651] <TB0> INFO: 4075064 events read in total (179790ms).
[16:45:49.472] <TB0> INFO: 4656544 events read in total (205611ms).
[16:46:12.950] <TB0> INFO: 5191680 events read in total (229089ms).
[16:46:13.115] <TB0> INFO: Test took 230124ms.
[16:46:39.895] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 27.518848 .. 47.361696
[16:46:40.187] <TB0> INFO: Expecting 208000 events.
[16:46:50.194] <TB0> INFO: 208000 events read in total (9415ms).
[16:46:50.195] <TB0> INFO: Test took 10296ms.
[16:46:50.244] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 17 .. 57 (-1/-1) hits flags = 528 (plus default)
[16:46:50.258] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:46:50.258] <TB0> INFO: run 1 of 1
[16:46:50.536] <TB0> INFO: Expecting 1364480 events.
[16:47:18.826] <TB0> INFO: 650712 events read in total (27699ms).
[16:47:46.529] <TB0> INFO: 1300400 events read in total (55403ms).
[16:47:49.801] <TB0> INFO: 1364480 events read in total (58675ms).
[16:47:49.833] <TB0> INFO: Test took 59575ms.
[16:48:04.383] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 26.407633 .. 47.202602
[16:48:04.641] <TB0> INFO: Expecting 208000 events.
[16:48:14.531] <TB0> INFO: 208000 events read in total (9298ms).
[16:48:14.532] <TB0> INFO: Test took 10148ms.
[16:48:14.596] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 16 .. 57 (-1/-1) hits flags = 528 (plus default)
[16:48:14.614] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:48:14.614] <TB0> INFO: run 1 of 1
[16:48:14.898] <TB0> INFO: Expecting 1397760 events.
[16:48:43.027] <TB0> INFO: 655840 events read in total (27537ms).
[16:49:10.660] <TB0> INFO: 1311000 events read in total (55170ms).
[16:49:14.857] <TB0> INFO: 1397760 events read in total (59367ms).
[16:49:14.886] <TB0> INFO: Test took 60272ms.
[16:49:29.753] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 25.732579 .. 45.077862
[16:49:29.990] <TB0> INFO: Expecting 208000 events.
[16:49:39.732] <TB0> INFO: 208000 events read in total (9150ms).
[16:49:39.733] <TB0> INFO: Test took 9979ms.
[16:49:39.781] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:49:39.795] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:49:39.795] <TB0> INFO: run 1 of 1
[16:49:40.073] <TB0> INFO: Expecting 1364480 events.
[16:50:08.194] <TB0> INFO: 667632 events read in total (27529ms).
[16:50:36.273] <TB0> INFO: 1334576 events read in total (55608ms).
[16:50:37.988] <TB0> INFO: 1364480 events read in total (57323ms).
[16:50:38.021] <TB0> INFO: Test took 58227ms.
[16:50:51.238] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:50:51.238] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[16:50:51.252] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[16:50:51.252] <TB0> INFO: run 1 of 1
[16:50:51.487] <TB0> INFO: Expecting 1364480 events.
[16:51:19.770] <TB0> INFO: 667736 events read in total (27691ms).
[16:51:47.943] <TB0> INFO: 1334760 events read in total (55865ms).
[16:51:49.604] <TB0> INFO: 1364480 events read in total (57526ms).
[16:51:49.632] <TB0> INFO: Test took 58381ms.
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[16:52:03.941] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[16:52:03.942] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[16:52:03.942] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C0.dat
[16:52:03.949] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C1.dat
[16:52:03.956] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C2.dat
[16:52:03.963] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C3.dat
[16:52:03.970] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C4.dat
[16:52:03.977] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C5.dat
[16:52:03.984] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C6.dat
[16:52:03.991] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C7.dat
[16:52:03.998] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C8.dat
[16:52:04.005] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C9.dat
[16:52:04.012] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C10.dat
[16:52:04.019] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C11.dat
[16:52:04.026] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C12.dat
[16:52:04.033] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C13.dat
[16:52:04.040] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C14.dat
[16:52:04.047] <TB0> INFO: write trim parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//trimParameters35_C15.dat
[16:52:04.054] <TB0> INFO: PixTestTrim::trimTest() done
[16:52:04.054] <TB0> INFO: vtrim: 121 130 114 117 115 117 133 138 135 135 124 150 141 163 118 113
[16:52:04.054] <TB0> INFO: vthrcomp: 124 120 116 112 127 122 107 111 115 117 123 133 111 134 109 109
[16:52:04.054] <TB0> INFO: vcal mean: 34.92 35.09 34.94 34.93 34.90 34.98 34.95 35.05 35.00 35.00 34.97 35.17 35.09 35.20 34.95 34.98
[16:52:04.054] <TB0> INFO: vcal RMS: 1.09 1.30 1.02 1.11 1.06 1.11 0.98 1.15 1.20 1.07 1.15 1.33 1.28 1.35 1.00 1.08
[16:52:04.054] <TB0> INFO: bits mean: 9.81 9.61 9.72 9.26 10.02 9.18 8.96 8.84 9.84 9.63 9.05 7.93 9.14 8.70 8.56 8.47
[16:52:04.054] <TB0> INFO: bits RMS: 2.71 2.63 2.66 2.74 2.80 2.77 2.57 2.56 2.49 2.68 2.88 2.52 2.51 2.48 2.65 2.67
[16:52:04.063] <TB0> INFO: ----------------------------------------------------------------------
[16:52:04.063] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[16:52:04.063] <TB0> INFO: ----------------------------------------------------------------------
[16:52:04.065] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[16:52:04.081] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:52:04.081] <TB0> INFO: run 1 of 1
[16:52:04.405] <TB0> INFO: Expecting 4160000 events.
[16:52:36.684] <TB0> INFO: 751160 events read in total (31688ms).
[16:53:08.514] <TB0> INFO: 1495910 events read in total (63518ms).
[16:53:39.884] <TB0> INFO: 2235610 events read in total (94888ms).
[16:54:11.486] <TB0> INFO: 2970760 events read in total (126490ms).
[16:54:43.039] <TB0> INFO: 3702905 events read in total (158043ms).
[16:55:02.785] <TB0> INFO: 4160000 events read in total (177789ms).
[16:55:02.854] <TB0> INFO: Test took 178774ms.
[16:55:29.933] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 214 (-1/-1) hits flags = 528 (plus default)
[16:55:29.946] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:55:29.946] <TB0> INFO: run 1 of 1
[16:55:30.183] <TB0> INFO: Expecting 4472000 events.
[16:56:02.117] <TB0> INFO: 707550 events read in total (31342ms).
[16:56:32.752] <TB0> INFO: 1410730 events read in total (61977ms).
[16:57:03.834] <TB0> INFO: 2111425 events read in total (93060ms).
[16:57:34.601] <TB0> INFO: 2806940 events read in total (123826ms).
[16:58:05.148] <TB0> INFO: 3499295 events read in total (154373ms).
[16:58:35.748] <TB0> INFO: 4191625 events read in total (184973ms).
[16:58:48.512] <TB0> INFO: 4472000 events read in total (197737ms).
[16:58:48.621] <TB0> INFO: Test took 198675ms.
[16:59:17.190] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[16:59:17.204] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[16:59:17.204] <TB0> INFO: run 1 of 1
[16:59:17.442] <TB0> INFO: Expecting 4139200 events.
[16:59:49.091] <TB0> INFO: 727225 events read in total (31057ms).
[17:00:20.342] <TB0> INFO: 1448615 events read in total (62308ms).
[17:00:51.462] <TB0> INFO: 2166265 events read in total (93428ms).
[17:01:22.337] <TB0> INFO: 2878445 events read in total (124303ms).
[17:01:53.329] <TB0> INFO: 3588025 events read in total (155295ms).
[17:02:17.180] <TB0> INFO: 4139200 events read in total (179146ms).
[17:02:17.275] <TB0> INFO: Test took 180071ms.
[17:02:43.456] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:02:43.470] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[17:02:43.470] <TB0> INFO: run 1 of 1
[17:02:43.715] <TB0> INFO: Expecting 4160000 events.
[17:03:15.222] <TB0> INFO: 725530 events read in total (30915ms).
[17:03:46.331] <TB0> INFO: 1445180 events read in total (62024ms).
[17:04:17.224] <TB0> INFO: 2162220 events read in total (92917ms).
[17:04:48.352] <TB0> INFO: 2873425 events read in total (124045ms).
[17:05:19.699] <TB0> INFO: 3581930 events read in total (155392ms).
[17:05:44.378] <TB0> INFO: 4160000 events read in total (180071ms).
[17:05:44.463] <TB0> INFO: Test took 180993ms.
[17:06:09.565] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[17:06:09.580] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[17:06:09.580] <TB0> INFO: run 1 of 1
[17:06:09.832] <TB0> INFO: Expecting 4139200 events.
[17:06:42.137] <TB0> INFO: 727045 events read in total (31714ms).
[17:07:13.356] <TB0> INFO: 1448215 events read in total (62933ms).
[17:07:44.387] <TB0> INFO: 2166345 events read in total (93964ms).
[17:08:15.222] <TB0> INFO: 2879155 events read in total (124799ms).
[17:08:47.428] <TB0> INFO: 3589230 events read in total (157005ms).
[17:09:11.549] <TB0> INFO: 4139200 events read in total (181126ms).
[17:09:11.646] <TB0> INFO: Test took 182066ms.
[17:09:38.681] <TB0> INFO: PixTestTrim::trimBitTest() done
[17:09:38.682] <TB0> INFO: PixTestTrim::doTest() done, duration: 2499 seconds
[17:09:38.682] <TB0> INFO: Decoding statistics:
[17:09:38.682] <TB0> INFO: General information:
[17:09:38.682] <TB0> INFO: 16bit words read: 0
[17:09:38.682] <TB0> INFO: valid events total: 0
[17:09:38.682] <TB0> INFO: empty events: 0
[17:09:38.682] <TB0> INFO: valid events with pixels: 0
[17:09:38.682] <TB0> INFO: valid pixel hits: 0
[17:09:38.682] <TB0> INFO: Event errors: 0
[17:09:38.682] <TB0> INFO: start marker: 0
[17:09:38.682] <TB0> INFO: stop marker: 0
[17:09:38.682] <TB0> INFO: overflow: 0
[17:09:38.682] <TB0> INFO: invalid 5bit words: 0
[17:09:38.682] <TB0> INFO: invalid XOR eye diagram: 0
[17:09:38.682] <TB0> INFO: frame (failed synchr.): 0
[17:09:38.682] <TB0> INFO: idle data (no TBM trl): 0
[17:09:38.682] <TB0> INFO: no data (only TBM hdr): 0
[17:09:38.682] <TB0> INFO: TBM errors: 0
[17:09:38.682] <TB0> INFO: flawed TBM headers: 0
[17:09:38.682] <TB0> INFO: flawed TBM trailers: 0
[17:09:38.682] <TB0> INFO: event ID mismatches: 0
[17:09:38.682] <TB0> INFO: ROC errors: 0
[17:09:38.682] <TB0> INFO: missing ROC header(s): 0
[17:09:38.682] <TB0> INFO: misplaced readback start: 0
[17:09:38.682] <TB0> INFO: Pixel decoding errors: 0
[17:09:38.682] <TB0> INFO: pixel data incomplete: 0
[17:09:38.682] <TB0> INFO: pixel address: 0
[17:09:38.682] <TB0> INFO: pulse height fill bit: 0
[17:09:38.682] <TB0> INFO: buffer corruption: 0
[17:09:39.300] <TB0> INFO: ######################################################################
[17:09:39.300] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:09:39.300] <TB0> INFO: ######################################################################
[17:09:39.537] <TB0> INFO: Expecting 41600 events.
[17:09:43.062] <TB0> INFO: 41600 events read in total (2933ms).
[17:09:43.063] <TB0> INFO: Test took 3762ms.
[17:09:43.522] <TB0> INFO: Expecting 41600 events.
[17:09:47.065] <TB0> INFO: 41600 events read in total (2951ms).
[17:09:47.066] <TB0> INFO: Test took 3797ms.
[17:09:47.355] <TB0> INFO: Expecting 41600 events.
[17:09:50.864] <TB0> INFO: 41600 events read in total (2918ms).
[17:09:50.865] <TB0> INFO: Test took 3775ms.
[17:09:51.154] <TB0> INFO: Expecting 41600 events.
[17:09:54.687] <TB0> INFO: 41600 events read in total (2941ms).
[17:09:54.688] <TB0> INFO: Test took 3798ms.
[17:09:54.976] <TB0> INFO: Expecting 41600 events.
[17:09:58.586] <TB0> INFO: 41600 events read in total (3018ms).
[17:09:58.587] <TB0> INFO: Test took 3875ms.
[17:09:58.876] <TB0> INFO: Expecting 41600 events.
[17:10:02.426] <TB0> INFO: 41600 events read in total (2958ms).
[17:10:02.427] <TB0> INFO: Test took 3815ms.
[17:10:02.718] <TB0> INFO: Expecting 41600 events.
[17:10:06.207] <TB0> INFO: 41600 events read in total (2897ms).
[17:10:06.208] <TB0> INFO: Test took 3755ms.
[17:10:06.496] <TB0> INFO: Expecting 41600 events.
[17:10:10.039] <TB0> INFO: 41600 events read in total (2951ms).
[17:10:10.040] <TB0> INFO: Test took 3808ms.
[17:10:10.329] <TB0> INFO: Expecting 41600 events.
[17:10:13.938] <TB0> INFO: 41600 events read in total (3018ms).
[17:10:13.939] <TB0> INFO: Test took 3875ms.
[17:10:14.229] <TB0> INFO: Expecting 41600 events.
[17:10:17.767] <TB0> INFO: 41600 events read in total (2946ms).
[17:10:17.768] <TB0> INFO: Test took 3805ms.
[17:10:18.058] <TB0> INFO: Expecting 41600 events.
[17:10:21.594] <TB0> INFO: 41600 events read in total (2944ms).
[17:10:21.594] <TB0> INFO: Test took 3802ms.
[17:10:21.886] <TB0> INFO: Expecting 41600 events.
[17:10:25.482] <TB0> INFO: 41600 events read in total (3004ms).
[17:10:25.483] <TB0> INFO: Test took 3863ms.
[17:10:25.789] <TB0> INFO: Expecting 41600 events.
[17:10:29.330] <TB0> INFO: 41600 events read in total (2949ms).
[17:10:29.331] <TB0> INFO: Test took 3824ms.
[17:10:29.620] <TB0> INFO: Expecting 41600 events.
[17:10:33.236] <TB0> INFO: 41600 events read in total (3024ms).
[17:10:33.237] <TB0> INFO: Test took 3882ms.
[17:10:33.545] <TB0> INFO: Expecting 41600 events.
[17:10:37.113] <TB0> INFO: 41600 events read in total (2977ms).
[17:10:37.114] <TB0> INFO: Test took 3853ms.
[17:10:37.406] <TB0> INFO: Expecting 41600 events.
[17:10:41.032] <TB0> INFO: 41600 events read in total (3034ms).
[17:10:41.033] <TB0> INFO: Test took 3892ms.
[17:10:41.350] <TB0> INFO: Expecting 41600 events.
[17:10:44.888] <TB0> INFO: 41600 events read in total (2946ms).
[17:10:44.889] <TB0> INFO: Test took 3832ms.
[17:10:45.178] <TB0> INFO: Expecting 41600 events.
[17:10:48.695] <TB0> INFO: 41600 events read in total (2925ms).
[17:10:48.696] <TB0> INFO: Test took 3783ms.
[17:10:48.986] <TB0> INFO: Expecting 41600 events.
[17:10:52.528] <TB0> INFO: 41600 events read in total (2951ms).
[17:10:52.528] <TB0> INFO: Test took 3808ms.
[17:10:52.822] <TB0> INFO: Expecting 41600 events.
[17:10:56.366] <TB0> INFO: 41600 events read in total (2952ms).
[17:10:56.367] <TB0> INFO: Test took 3811ms.
[17:10:56.659] <TB0> INFO: Expecting 41600 events.
[17:11:00.178] <TB0> INFO: 41600 events read in total (2927ms).
[17:11:00.179] <TB0> INFO: Test took 3785ms.
[17:11:00.469] <TB0> INFO: Expecting 41600 events.
[17:11:04.010] <TB0> INFO: 41600 events read in total (2949ms).
[17:11:04.011] <TB0> INFO: Test took 3808ms.
[17:11:04.322] <TB0> INFO: Expecting 41600 events.
[17:11:07.866] <TB0> INFO: 41600 events read in total (2952ms).
[17:11:07.867] <TB0> INFO: Test took 3832ms.
[17:11:08.157] <TB0> INFO: Expecting 41600 events.
[17:11:11.720] <TB0> INFO: 41600 events read in total (2971ms).
[17:11:11.721] <TB0> INFO: Test took 3830ms.
[17:11:12.011] <TB0> INFO: Expecting 41600 events.
[17:11:15.524] <TB0> INFO: 41600 events read in total (2922ms).
[17:11:15.524] <TB0> INFO: Test took 3779ms.
[17:11:15.816] <TB0> INFO: Expecting 41600 events.
[17:11:19.389] <TB0> INFO: 41600 events read in total (2981ms).
[17:11:19.390] <TB0> INFO: Test took 3839ms.
[17:11:19.682] <TB0> INFO: Expecting 41600 events.
[17:11:23.213] <TB0> INFO: 41600 events read in total (2940ms).
[17:11:23.214] <TB0> INFO: Test took 3797ms.
[17:11:23.529] <TB0> INFO: Expecting 41600 events.
[17:11:27.063] <TB0> INFO: 41600 events read in total (2942ms).
[17:11:27.064] <TB0> INFO: Test took 3825ms.
[17:11:27.354] <TB0> INFO: Expecting 41600 events.
[17:11:30.866] <TB0> INFO: 41600 events read in total (2920ms).
[17:11:30.867] <TB0> INFO: Test took 3779ms.
[17:11:31.163] <TB0> INFO: Expecting 41600 events.
[17:11:34.677] <TB0> INFO: 41600 events read in total (2923ms).
[17:11:34.677] <TB0> INFO: Test took 3779ms.
[17:11:34.968] <TB0> INFO: Expecting 2560 events.
[17:11:35.859] <TB0> INFO: 2560 events read in total (299ms).
[17:11:35.859] <TB0> INFO: Test took 1168ms.
[17:11:36.167] <TB0> INFO: Expecting 2560 events.
[17:11:37.055] <TB0> INFO: 2560 events read in total (296ms).
[17:11:37.055] <TB0> INFO: Test took 1195ms.
[17:11:37.363] <TB0> INFO: Expecting 2560 events.
[17:11:38.259] <TB0> INFO: 2560 events read in total (304ms).
[17:11:38.259] <TB0> INFO: Test took 1204ms.
[17:11:38.567] <TB0> INFO: Expecting 2560 events.
[17:11:39.461] <TB0> INFO: 2560 events read in total (302ms).
[17:11:39.461] <TB0> INFO: Test took 1201ms.
[17:11:39.768] <TB0> INFO: Expecting 2560 events.
[17:11:40.647] <TB0> INFO: 2560 events read in total (288ms).
[17:11:40.647] <TB0> INFO: Test took 1185ms.
[17:11:40.955] <TB0> INFO: Expecting 2560 events.
[17:11:41.835] <TB0> INFO: 2560 events read in total (289ms).
[17:11:41.835] <TB0> INFO: Test took 1188ms.
[17:11:42.143] <TB0> INFO: Expecting 2560 events.
[17:11:43.031] <TB0> INFO: 2560 events read in total (296ms).
[17:11:43.031] <TB0> INFO: Test took 1195ms.
[17:11:43.338] <TB0> INFO: Expecting 2560 events.
[17:11:44.218] <TB0> INFO: 2560 events read in total (288ms).
[17:11:44.218] <TB0> INFO: Test took 1186ms.
[17:11:44.527] <TB0> INFO: Expecting 2560 events.
[17:11:45.409] <TB0> INFO: 2560 events read in total (291ms).
[17:11:45.410] <TB0> INFO: Test took 1191ms.
[17:11:45.718] <TB0> INFO: Expecting 2560 events.
[17:11:46.604] <TB0> INFO: 2560 events read in total (295ms).
[17:11:46.604] <TB0> INFO: Test took 1194ms.
[17:11:46.913] <TB0> INFO: Expecting 2560 events.
[17:11:47.798] <TB0> INFO: 2560 events read in total (293ms).
[17:11:47.798] <TB0> INFO: Test took 1192ms.
[17:11:48.107] <TB0> INFO: Expecting 2560 events.
[17:11:48.986] <TB0> INFO: 2560 events read in total (288ms).
[17:11:48.986] <TB0> INFO: Test took 1187ms.
[17:11:49.294] <TB0> INFO: Expecting 2560 events.
[17:11:50.184] <TB0> INFO: 2560 events read in total (299ms).
[17:11:50.184] <TB0> INFO: Test took 1197ms.
[17:11:50.492] <TB0> INFO: Expecting 2560 events.
[17:11:51.380] <TB0> INFO: 2560 events read in total (296ms).
[17:11:51.380] <TB0> INFO: Test took 1195ms.
[17:11:51.688] <TB0> INFO: Expecting 2560 events.
[17:11:52.576] <TB0> INFO: 2560 events read in total (297ms).
[17:11:52.577] <TB0> INFO: Test took 1196ms.
[17:11:52.885] <TB0> INFO: Expecting 2560 events.
[17:11:53.779] <TB0> INFO: 2560 events read in total (301ms).
[17:11:53.779] <TB0> INFO: Test took 1202ms.
[17:11:53.783] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:11:54.087] <TB0> INFO: Expecting 655360 events.
[17:12:08.986] <TB0> INFO: 655360 events read in total (14307ms).
[17:12:08.001] <TB0> INFO: Expecting 655360 events.
[17:12:23.891] <TB0> INFO: 655360 events read in total (14487ms).
[17:12:23.915] <TB0> INFO: Expecting 655360 events.
[17:12:38.552] <TB0> INFO: 655360 events read in total (14234ms).
[17:12:38.581] <TB0> INFO: Expecting 655360 events.
[17:12:53.059] <TB0> INFO: 655360 events read in total (14075ms).
[17:12:53.087] <TB0> INFO: Expecting 655360 events.
[17:13:07.676] <TB0> INFO: 655360 events read in total (14186ms).
[17:13:07.709] <TB0> INFO: Expecting 655360 events.
[17:13:22.350] <TB0> INFO: 655360 events read in total (14238ms).
[17:13:22.387] <TB0> INFO: Expecting 655360 events.
[17:13:36.966] <TB0> INFO: 655360 events read in total (14176ms).
[17:13:37.015] <TB0> INFO: Expecting 655360 events.
[17:13:51.466] <TB0> INFO: 655360 events read in total (14048ms).
[17:13:51.519] <TB0> INFO: Expecting 655360 events.
[17:14:05.973] <TB0> INFO: 655360 events read in total (14051ms).
[17:14:06.021] <TB0> INFO: Expecting 655360 events.
[17:14:20.536] <TB0> INFO: 655360 events read in total (14112ms).
[17:14:20.600] <TB0> INFO: Expecting 655360 events.
[17:14:35.093] <TB0> INFO: 655360 events read in total (14090ms).
[17:14:35.150] <TB0> INFO: Expecting 655360 events.
[17:14:49.686] <TB0> INFO: 655360 events read in total (14133ms).
[17:14:49.823] <TB0> INFO: Expecting 655360 events.
[17:15:04.396] <TB0> INFO: 655360 events read in total (14170ms).
[17:15:04.477] <TB0> INFO: Expecting 655360 events.
[17:15:19.056] <TB0> INFO: 655360 events read in total (14176ms).
[17:15:19.139] <TB0> INFO: Expecting 655360 events.
[17:15:33.690] <TB0> INFO: 655360 events read in total (14148ms).
[17:15:33.859] <TB0> INFO: Expecting 655360 events.
[17:15:48.360] <TB0> INFO: 655360 events read in total (14098ms).
[17:15:48.455] <TB0> INFO: Test took 234672ms.
[17:15:48.553] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:15:48.806] <TB0> INFO: Expecting 655360 events.
[17:16:03.374] <TB0> INFO: 655360 events read in total (13976ms).
[17:16:03.386] <TB0> INFO: Expecting 655360 events.
[17:16:17.363] <TB0> INFO: 655360 events read in total (13574ms).
[17:16:17.378] <TB0> INFO: Expecting 655360 events.
[17:16:32.015] <TB0> INFO: 655360 events read in total (14234ms).
[17:16:32.037] <TB0> INFO: Expecting 655360 events.
[17:16:46.491] <TB0> INFO: 655360 events read in total (14051ms).
[17:16:46.515] <TB0> INFO: Expecting 655360 events.
[17:17:00.974] <TB0> INFO: 655360 events read in total (14056ms).
[17:17:00.002] <TB0> INFO: Expecting 655360 events.
[17:17:15.284] <TB0> INFO: 655360 events read in total (13878ms).
[17:17:15.316] <TB0> INFO: Expecting 655360 events.
[17:17:29.838] <TB0> INFO: 655360 events read in total (14119ms).
[17:17:29.894] <TB0> INFO: Expecting 655360 events.
[17:17:44.265] <TB0> INFO: 655360 events read in total (13968ms).
[17:17:44.322] <TB0> INFO: Expecting 655360 events.
[17:17:58.700] <TB0> INFO: 655360 events read in total (13975ms).
[17:17:58.761] <TB0> INFO: Expecting 655360 events.
[17:18:12.819] <TB0> INFO: 655360 events read in total (13654ms).
[17:18:12.945] <TB0> INFO: Expecting 655360 events.
[17:18:27.258] <TB0> INFO: 655360 events read in total (13910ms).
[17:18:27.314] <TB0> INFO: Expecting 655360 events.
[17:18:41.674] <TB0> INFO: 655360 events read in total (13956ms).
[17:18:41.748] <TB0> INFO: Expecting 655360 events.
[17:18:56.309] <TB0> INFO: 655360 events read in total (14158ms).
[17:18:56.385] <TB0> INFO: Expecting 655360 events.
[17:19:10.998] <TB0> INFO: 655360 events read in total (14210ms).
[17:19:11.112] <TB0> INFO: Expecting 655360 events.
[17:19:25.770] <TB0> INFO: 655360 events read in total (14255ms).
[17:19:25.915] <TB0> INFO: Expecting 655360 events.
[17:19:40.341] <TB0> INFO: 655360 events read in total (14023ms).
[17:19:40.489] <TB0> INFO: Test took 231936ms.
[17:19:40.655] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.661] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[17:19:40.666] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.672] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.678] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[17:19:40.684] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[17:19:40.690] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.695] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.701] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.707] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.713] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.719] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[17:19:40.725] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[17:19:40.730] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[17:19:40.736] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[17:19:40.742] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.747] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.753] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.759] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.765] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.771] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.777] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.783] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[17:19:40.818] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C0.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C1.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C2.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C3.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C4.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C5.dat
[17:19:40.819] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C6.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C7.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C8.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C9.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C10.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C11.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C12.dat
[17:19:40.820] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C13.dat
[17:19:40.821] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C14.dat
[17:19:40.821] <TB0> INFO: write dac parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//dacParameters35_C15.dat
[17:19:41.069] <TB0> INFO: Expecting 41600 events.
[17:19:44.251] <TB0> INFO: 41600 events read in total (2590ms).
[17:19:44.252] <TB0> INFO: Test took 3427ms.
[17:19:44.710] <TB0> INFO: Expecting 41600 events.
[17:19:47.748] <TB0> INFO: 41600 events read in total (2446ms).
[17:19:47.748] <TB0> INFO: Test took 3281ms.
[17:19:48.206] <TB0> INFO: Expecting 41600 events.
[17:19:51.355] <TB0> INFO: 41600 events read in total (2558ms).
[17:19:51.355] <TB0> INFO: Test took 3392ms.
[17:19:51.572] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:51.661] <TB0> INFO: Expecting 2560 events.
[17:19:52.552] <TB0> INFO: 2560 events read in total (300ms).
[17:19:52.553] <TB0> INFO: Test took 981ms.
[17:19:52.556] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:52.860] <TB0> INFO: Expecting 2560 events.
[17:19:53.747] <TB0> INFO: 2560 events read in total (295ms).
[17:19:53.747] <TB0> INFO: Test took 1191ms.
[17:19:53.749] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:54.056] <TB0> INFO: Expecting 2560 events.
[17:19:54.943] <TB0> INFO: 2560 events read in total (295ms).
[17:19:54.943] <TB0> INFO: Test took 1194ms.
[17:19:54.945] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:55.252] <TB0> INFO: Expecting 2560 events.
[17:19:56.141] <TB0> INFO: 2560 events read in total (297ms).
[17:19:56.142] <TB0> INFO: Test took 1197ms.
[17:19:56.145] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:56.450] <TB0> INFO: Expecting 2560 events.
[17:19:57.348] <TB0> INFO: 2560 events read in total (306ms).
[17:19:57.348] <TB0> INFO: Test took 1203ms.
[17:19:57.352] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:57.656] <TB0> INFO: Expecting 2560 events.
[17:19:58.550] <TB0> INFO: 2560 events read in total (302ms).
[17:19:58.550] <TB0> INFO: Test took 1198ms.
[17:19:58.552] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:19:58.859] <TB0> INFO: Expecting 2560 events.
[17:19:59.746] <TB0> INFO: 2560 events read in total (295ms).
[17:19:59.747] <TB0> INFO: Test took 1195ms.
[17:19:59.750] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:00.054] <TB0> INFO: Expecting 2560 events.
[17:20:00.939] <TB0> INFO: 2560 events read in total (294ms).
[17:20:00.939] <TB0> INFO: Test took 1189ms.
[17:20:00.941] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:01.247] <TB0> INFO: Expecting 2560 events.
[17:20:02.130] <TB0> INFO: 2560 events read in total (291ms).
[17:20:02.130] <TB0> INFO: Test took 1189ms.
[17:20:02.134] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:02.439] <TB0> INFO: Expecting 2560 events.
[17:20:03.327] <TB0> INFO: 2560 events read in total (297ms).
[17:20:03.328] <TB0> INFO: Test took 1194ms.
[17:20:03.330] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:03.636] <TB0> INFO: Expecting 2560 events.
[17:20:04.516] <TB0> INFO: 2560 events read in total (288ms).
[17:20:04.516] <TB0> INFO: Test took 1186ms.
[17:20:04.518] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:04.825] <TB0> INFO: Expecting 2560 events.
[17:20:05.706] <TB0> INFO: 2560 events read in total (289ms).
[17:20:05.707] <TB0> INFO: Test took 1189ms.
[17:20:05.709] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:06.015] <TB0> INFO: Expecting 2560 events.
[17:20:06.906] <TB0> INFO: 2560 events read in total (299ms).
[17:20:06.906] <TB0> INFO: Test took 1197ms.
[17:20:06.909] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:07.213] <TB0> INFO: Expecting 2560 events.
[17:20:08.097] <TB0> INFO: 2560 events read in total (291ms).
[17:20:08.098] <TB0> INFO: Test took 1189ms.
[17:20:08.100] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:08.407] <TB0> INFO: Expecting 2560 events.
[17:20:09.287] <TB0> INFO: 2560 events read in total (289ms).
[17:20:09.287] <TB0> INFO: Test took 1187ms.
[17:20:09.290] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:09.595] <TB0> INFO: Expecting 2560 events.
[17:20:10.485] <TB0> INFO: 2560 events read in total (298ms).
[17:20:10.485] <TB0> INFO: Test took 1195ms.
[17:20:10.489] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:10.793] <TB0> INFO: Expecting 2560 events.
[17:20:11.684] <TB0> INFO: 2560 events read in total (299ms).
[17:20:11.684] <TB0> INFO: Test took 1195ms.
[17:20:11.688] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:11.991] <TB0> INFO: Expecting 2560 events.
[17:20:12.878] <TB0> INFO: 2560 events read in total (295ms).
[17:20:12.879] <TB0> INFO: Test took 1191ms.
[17:20:12.882] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:13.185] <TB0> INFO: Expecting 2560 events.
[17:20:14.067] <TB0> INFO: 2560 events read in total (290ms).
[17:20:14.067] <TB0> INFO: Test took 1185ms.
[17:20:14.071] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:14.374] <TB0> INFO: Expecting 2560 events.
[17:20:15.262] <TB0> INFO: 2560 events read in total (296ms).
[17:20:15.263] <TB0> INFO: Test took 1192ms.
[17:20:15.265] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:15.570] <TB0> INFO: Expecting 2560 events.
[17:20:16.453] <TB0> INFO: 2560 events read in total (291ms).
[17:20:16.453] <TB0> INFO: Test took 1188ms.
[17:20:16.456] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:16.761] <TB0> INFO: Expecting 2560 events.
[17:20:17.645] <TB0> INFO: 2560 events read in total (292ms).
[17:20:17.646] <TB0> INFO: Test took 1190ms.
[17:20:17.649] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:17.953] <TB0> INFO: Expecting 2560 events.
[17:20:18.842] <TB0> INFO: 2560 events read in total (297ms).
[17:20:18.843] <TB0> INFO: Test took 1194ms.
[17:20:18.846] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:19.152] <TB0> INFO: Expecting 2560 events.
[17:20:20.039] <TB0> INFO: 2560 events read in total (295ms).
[17:20:20.040] <TB0> INFO: Test took 1194ms.
[17:20:20.042] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:20.349] <TB0> INFO: Expecting 2560 events.
[17:20:21.242] <TB0> INFO: 2560 events read in total (301ms).
[17:20:21.243] <TB0> INFO: Test took 1201ms.
[17:20:21.248] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:21.550] <TB0> INFO: Expecting 2560 events.
[17:20:22.447] <TB0> INFO: 2560 events read in total (305ms).
[17:20:22.448] <TB0> INFO: Test took 1200ms.
[17:20:22.452] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:22.755] <TB0> INFO: Expecting 2560 events.
[17:20:23.647] <TB0> INFO: 2560 events read in total (300ms).
[17:20:23.647] <TB0> INFO: Test took 1196ms.
[17:20:23.651] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:23.955] <TB0> INFO: Expecting 2560 events.
[17:20:24.850] <TB0> INFO: 2560 events read in total (303ms).
[17:20:24.850] <TB0> INFO: Test took 1200ms.
[17:20:24.854] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:25.159] <TB0> INFO: Expecting 2560 events.
[17:20:26.048] <TB0> INFO: 2560 events read in total (297ms).
[17:20:26.048] <TB0> INFO: Test took 1194ms.
[17:20:26.052] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:26.357] <TB0> INFO: Expecting 2560 events.
[17:20:27.253] <TB0> INFO: 2560 events read in total (304ms).
[17:20:27.253] <TB0> INFO: Test took 1202ms.
[17:20:27.258] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:27.561] <TB0> INFO: Expecting 2560 events.
[17:20:28.455] <TB0> INFO: 2560 events read in total (302ms).
[17:20:28.456] <TB0> INFO: Test took 1198ms.
[17:20:28.459] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:20:28.764] <TB0> INFO: Expecting 2560 events.
[17:20:29.656] <TB0> INFO: 2560 events read in total (300ms).
[17:20:29.656] <TB0> INFO: Test took 1197ms.
[17:20:30.138] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 650 seconds
[17:20:30.138] <TB0> INFO: PH scale (per ROC): 48 60 46 35 64 53 49 44 51 64 61 54 54 57 55 55
[17:20:30.138] <TB0> INFO: PH offset (per ROC): 90 136 100 99 112 106 105 117 131 118 123 118 128 128 132 122
[17:20:30.146] <TB0> INFO: Decoding statistics:
[17:20:30.147] <TB0> INFO: General information:
[17:20:30.147] <TB0> INFO: 16bit words read: 127880
[17:20:30.147] <TB0> INFO: valid events total: 20480
[17:20:30.147] <TB0> INFO: empty events: 17980
[17:20:30.147] <TB0> INFO: valid events with pixels: 2500
[17:20:30.147] <TB0> INFO: valid pixel hits: 2500
[17:20:30.147] <TB0> INFO: Event errors: 0
[17:20:30.147] <TB0> INFO: start marker: 0
[17:20:30.147] <TB0> INFO: stop marker: 0
[17:20:30.147] <TB0> INFO: overflow: 0
[17:20:30.147] <TB0> INFO: invalid 5bit words: 0
[17:20:30.147] <TB0> INFO: invalid XOR eye diagram: 0
[17:20:30.147] <TB0> INFO: frame (failed synchr.): 0
[17:20:30.147] <TB0> INFO: idle data (no TBM trl): 0
[17:20:30.147] <TB0> INFO: no data (only TBM hdr): 0
[17:20:30.147] <TB0> INFO: TBM errors: 0
[17:20:30.147] <TB0> INFO: flawed TBM headers: 0
[17:20:30.147] <TB0> INFO: flawed TBM trailers: 0
[17:20:30.147] <TB0> INFO: event ID mismatches: 0
[17:20:30.147] <TB0> INFO: ROC errors: 0
[17:20:30.147] <TB0> INFO: missing ROC header(s): 0
[17:20:30.147] <TB0> INFO: misplaced readback start: 0
[17:20:30.147] <TB0> INFO: Pixel decoding errors: 0
[17:20:30.147] <TB0> INFO: pixel data incomplete: 0
[17:20:30.147] <TB0> INFO: pixel address: 0
[17:20:30.147] <TB0> INFO: pulse height fill bit: 0
[17:20:30.147] <TB0> INFO: buffer corruption: 0
[17:20:30.321] <TB0> INFO: ######################################################################
[17:20:30.321] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:20:30.321] <TB0> INFO: ######################################################################
[17:20:30.336] <TB0> INFO: scanning low vcal = 10
[17:20:30.574] <TB0> INFO: Expecting 41600 events.
[17:20:34.196] <TB0> INFO: 41600 events read in total (3030ms).
[17:20:34.196] <TB0> INFO: Test took 3860ms.
[17:20:34.198] <TB0> INFO: scanning low vcal = 20
[17:20:34.492] <TB0> INFO: Expecting 41600 events.
[17:20:38.111] <TB0> INFO: 41600 events read in total (3027ms).
[17:20:38.112] <TB0> INFO: Test took 3914ms.
[17:20:38.114] <TB0> INFO: scanning low vcal = 30
[17:20:38.408] <TB0> INFO: Expecting 41600 events.
[17:20:42.104] <TB0> INFO: 41600 events read in total (3105ms).
[17:20:42.105] <TB0> INFO: Test took 3991ms.
[17:20:42.108] <TB0> INFO: scanning low vcal = 40
[17:20:42.385] <TB0> INFO: Expecting 41600 events.
[17:20:46.420] <TB0> INFO: 41600 events read in total (3443ms).
[17:20:46.421] <TB0> INFO: Test took 4313ms.
[17:20:46.424] <TB0> INFO: scanning low vcal = 50
[17:20:46.701] <TB0> INFO: Expecting 41600 events.
[17:20:50.743] <TB0> INFO: 41600 events read in total (3450ms).
[17:20:50.743] <TB0> INFO: Test took 4319ms.
[17:20:50.746] <TB0> INFO: scanning low vcal = 60
[17:20:51.023] <TB0> INFO: Expecting 41600 events.
[17:20:55.099] <TB0> INFO: 41600 events read in total (3484ms).
[17:20:55.100] <TB0> INFO: Test took 4354ms.
[17:20:55.106] <TB0> INFO: scanning low vcal = 70
[17:20:55.381] <TB0> INFO: Expecting 41600 events.
[17:20:59.433] <TB0> INFO: 41600 events read in total (3460ms).
[17:20:59.434] <TB0> INFO: Test took 4328ms.
[17:20:59.437] <TB0> INFO: scanning low vcal = 80
[17:20:59.714] <TB0> INFO: Expecting 41600 events.
[17:21:03.721] <TB0> INFO: 41600 events read in total (3416ms).
[17:21:03.721] <TB0> INFO: Test took 4284ms.
[17:21:03.724] <TB0> INFO: scanning low vcal = 90
[17:21:03.001] <TB0> INFO: Expecting 41600 events.
[17:21:07.999] <TB0> INFO: 41600 events read in total (3406ms).
[17:21:07.000] <TB0> INFO: Test took 4276ms.
[17:21:08.005] <TB0> INFO: scanning low vcal = 100
[17:21:08.280] <TB0> INFO: Expecting 41600 events.
[17:21:12.280] <TB0> INFO: 41600 events read in total (3408ms).
[17:21:12.281] <TB0> INFO: Test took 4276ms.
[17:21:12.284] <TB0> INFO: scanning low vcal = 110
[17:21:12.562] <TB0> INFO: Expecting 41600 events.
[17:21:16.567] <TB0> INFO: 41600 events read in total (3413ms).
[17:21:16.568] <TB0> INFO: Test took 4284ms.
[17:21:16.571] <TB0> INFO: scanning low vcal = 120
[17:21:16.849] <TB0> INFO: Expecting 41600 events.
[17:21:20.861] <TB0> INFO: 41600 events read in total (3420ms).
[17:21:20.862] <TB0> INFO: Test took 4290ms.
[17:21:20.865] <TB0> INFO: scanning low vcal = 130
[17:21:21.143] <TB0> INFO: Expecting 41600 events.
[17:21:25.153] <TB0> INFO: 41600 events read in total (3418ms).
[17:21:25.154] <TB0> INFO: Test took 4289ms.
[17:21:25.157] <TB0> INFO: scanning low vcal = 140
[17:21:25.435] <TB0> INFO: Expecting 41600 events.
[17:21:29.420] <TB0> INFO: 41600 events read in total (3393ms).
[17:21:29.420] <TB0> INFO: Test took 4263ms.
[17:21:29.423] <TB0> INFO: scanning low vcal = 150
[17:21:29.701] <TB0> INFO: Expecting 41600 events.
[17:21:33.696] <TB0> INFO: 41600 events read in total (3404ms).
[17:21:33.697] <TB0> INFO: Test took 4274ms.
[17:21:33.700] <TB0> INFO: scanning low vcal = 160
[17:21:33.977] <TB0> INFO: Expecting 41600 events.
[17:21:38.007] <TB0> INFO: 41600 events read in total (3438ms).
[17:21:38.008] <TB0> INFO: Test took 4308ms.
[17:21:38.011] <TB0> INFO: scanning low vcal = 170
[17:21:38.288] <TB0> INFO: Expecting 41600 events.
[17:21:42.277] <TB0> INFO: 41600 events read in total (3397ms).
[17:21:42.278] <TB0> INFO: Test took 4267ms.
[17:21:42.283] <TB0> INFO: scanning low vcal = 180
[17:21:42.558] <TB0> INFO: Expecting 41600 events.
[17:21:46.552] <TB0> INFO: 41600 events read in total (3402ms).
[17:21:46.553] <TB0> INFO: Test took 4270ms.
[17:21:46.555] <TB0> INFO: scanning low vcal = 190
[17:21:46.833] <TB0> INFO: Expecting 41600 events.
[17:21:50.850] <TB0> INFO: 41600 events read in total (3425ms).
[17:21:50.851] <TB0> INFO: Test took 4295ms.
[17:21:50.854] <TB0> INFO: scanning low vcal = 200
[17:21:51.130] <TB0> INFO: Expecting 41600 events.
[17:21:55.107] <TB0> INFO: 41600 events read in total (3385ms).
[17:21:55.108] <TB0> INFO: Test took 4254ms.
[17:21:55.111] <TB0> INFO: scanning low vcal = 210
[17:21:55.388] <TB0> INFO: Expecting 41600 events.
[17:21:59.369] <TB0> INFO: 41600 events read in total (3390ms).
[17:21:59.370] <TB0> INFO: Test took 4259ms.
[17:21:59.373] <TB0> INFO: scanning low vcal = 220
[17:21:59.650] <TB0> INFO: Expecting 41600 events.
[17:22:03.612] <TB0> INFO: 41600 events read in total (3371ms).
[17:22:03.613] <TB0> INFO: Test took 4239ms.
[17:22:03.616] <TB0> INFO: scanning low vcal = 230
[17:22:03.893] <TB0> INFO: Expecting 41600 events.
[17:22:07.850] <TB0> INFO: 41600 events read in total (3366ms).
[17:22:07.851] <TB0> INFO: Test took 4235ms.
[17:22:07.854] <TB0> INFO: scanning low vcal = 240
[17:22:08.130] <TB0> INFO: Expecting 41600 events.
[17:22:12.093] <TB0> INFO: 41600 events read in total (3371ms).
[17:22:12.094] <TB0> INFO: Test took 4240ms.
[17:22:12.097] <TB0> INFO: scanning low vcal = 250
[17:22:12.373] <TB0> INFO: Expecting 41600 events.
[17:22:16.348] <TB0> INFO: 41600 events read in total (3383ms).
[17:22:16.349] <TB0> INFO: Test took 4251ms.
[17:22:16.353] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[17:22:16.629] <TB0> INFO: Expecting 41600 events.
[17:22:20.575] <TB0> INFO: 41600 events read in total (3355ms).
[17:22:20.576] <TB0> INFO: Test took 4223ms.
[17:22:20.578] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[17:22:20.855] <TB0> INFO: Expecting 41600 events.
[17:22:24.804] <TB0> INFO: 41600 events read in total (3357ms).
[17:22:24.804] <TB0> INFO: Test took 4225ms.
[17:22:24.808] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[17:22:25.084] <TB0> INFO: Expecting 41600 events.
[17:22:29.081] <TB0> INFO: 41600 events read in total (3405ms).
[17:22:29.082] <TB0> INFO: Test took 4274ms.
[17:22:29.085] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[17:22:29.362] <TB0> INFO: Expecting 41600 events.
[17:22:33.374] <TB0> INFO: 41600 events read in total (3421ms).
[17:22:33.375] <TB0> INFO: Test took 4290ms.
[17:22:33.378] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:22:33.654] <TB0> INFO: Expecting 41600 events.
[17:22:37.667] <TB0> INFO: 41600 events read in total (3421ms).
[17:22:37.668] <TB0> INFO: Test took 4290ms.
[17:22:38.076] <TB0> INFO: PixTestGainPedestal::measure() done
[17:23:10.398] <TB0> INFO: PixTestGainPedestal::fit() done
[17:23:10.398] <TB0> INFO: non-linearity mean: 0.954 0.982 0.940 1.010 0.981 0.941 0.961 0.949 0.979 0.985 0.984 0.984 0.981 0.980 0.977 0.979
[17:23:10.398] <TB0> INFO: non-linearity RMS: 0.062 0.003 0.069 0.157 0.005 0.076 0.049 0.049 0.004 0.002 0.003 0.003 0.005 0.005 0.005 0.004
[17:23:10.398] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C0.dat
[17:23:10.418] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C1.dat
[17:23:10.438] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C2.dat
[17:23:10.458] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C3.dat
[17:23:10.479] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C4.dat
[17:23:10.499] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C5.dat
[17:23:10.520] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C6.dat
[17:23:10.540] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C7.dat
[17:23:10.560] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C8.dat
[17:23:10.581] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C9.dat
[17:23:10.601] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C10.dat
[17:23:10.621] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C11.dat
[17:23:10.641] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C12.dat
[17:23:10.661] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C13.dat
[17:23:10.681] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C14.dat
[17:23:10.701] <TB0> INFO: write gain/ped parameters into /home/l_tester/david/FullQualification/data/M1073_FullQualification_2016-10-25_15h07m_1477400838//001_Fulltest_m20//phCalibrationFitErr35_C15.dat
[17:23:10.721] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 160 seconds
[17:23:10.721] <TB0> INFO: Decoding statistics:
[17:23:10.722] <TB0> INFO: General information:
[17:23:10.722] <TB0> INFO: 16bit words read: 3327902
[17:23:10.722] <TB0> INFO: valid events total: 332800
[17:23:10.722] <TB0> INFO: empty events: 0
[17:23:10.722] <TB0> INFO: valid events with pixels: 332800
[17:23:10.722] <TB0> INFO: valid pixel hits: 665551
[17:23:10.722] <TB0> INFO: Event errors: 0
[17:23:10.722] <TB0> INFO: start marker: 0
[17:23:10.722] <TB0> INFO: stop marker: 0
[17:23:10.722] <TB0> INFO: overflow: 0
[17:23:10.722] <TB0> INFO: invalid 5bit words: 0
[17:23:10.722] <TB0> INFO: invalid XOR eye diagram: 0
[17:23:10.722] <TB0> INFO: frame (failed synchr.): 0
[17:23:10.722] <TB0> INFO: idle data (no TBM trl): 0
[17:23:10.722] <TB0> INFO: no data (only TBM hdr): 0
[17:23:10.722] <TB0> INFO: TBM errors: 0
[17:23:10.722] <TB0> INFO: flawed TBM headers: 0
[17:23:10.722] <TB0> INFO: flawed TBM trailers: 0
[17:23:10.722] <TB0> INFO: event ID mismatches: 0
[17:23:10.722] <TB0> INFO: ROC errors: 0
[17:23:10.722] <TB0> INFO: missing ROC header(s): 0
[17:23:10.722] <TB0> INFO: misplaced readback start: 0
[17:23:10.722] <TB0> INFO: Pixel decoding errors: 0
[17:23:10.722] <TB0> INFO: pixel data incomplete: 0
[17:23:10.722] <TB0> INFO: pixel address: 0
[17:23:10.722] <TB0> INFO: pulse height fill bit: 0
[17:23:10.722] <TB0> INFO: buffer corruption: 0
[17:23:10.743] <TB0> INFO: Decoding statistics:
[17:23:10.743] <TB0> INFO: General information:
[17:23:10.743] <TB0> INFO: 16bit words read: 3457318
[17:23:10.743] <TB0> INFO: valid events total: 353536
[17:23:10.743] <TB0> INFO: empty events: 18236
[17:23:10.743] <TB0> INFO: valid events with pixels: 335300
[17:23:10.743] <TB0> INFO: valid pixel hits: 668051
[17:23:10.743] <TB0> INFO: Event errors: 0
[17:23:10.743] <TB0> INFO: start marker: 0
[17:23:10.743] <TB0> INFO: stop marker: 0
[17:23:10.743] <TB0> INFO: overflow: 0
[17:23:10.743] <TB0> INFO: invalid 5bit words: 0
[17:23:10.743] <TB0> INFO: invalid XOR eye diagram: 0
[17:23:10.743] <TB0> INFO: frame (failed synchr.): 0
[17:23:10.743] <TB0> INFO: idle data (no TBM trl): 0
[17:23:10.743] <TB0> INFO: no data (only TBM hdr): 0
[17:23:10.743] <TB0> INFO: TBM errors: 0
[17:23:10.743] <TB0> INFO: flawed TBM headers: 0
[17:23:10.743] <TB0> INFO: flawed TBM trailers: 0
[17:23:10.743] <TB0> INFO: event ID mismatches: 0
[17:23:10.743] <TB0> INFO: ROC errors: 0
[17:23:10.743] <TB0> INFO: missing ROC header(s): 0
[17:23:10.743] <TB0> INFO: misplaced readback start: 0
[17:23:10.743] <TB0> INFO: Pixel decoding errors: 0
[17:23:10.743] <TB0> INFO: pixel data incomplete: 0
[17:23:10.743] <TB0> INFO: pixel address: 0
[17:23:10.743] <TB0> INFO: pulse height fill bit: 0
[17:23:10.743] <TB0> INFO: buffer corruption: 0
[17:23:10.743] <TB0> INFO: enter test to run
[17:23:10.743] <TB0> INFO: test: exit no parameter change
[17:23:10.883] <TB0> QUIET: Connection to board 71 closed.
[17:23:10.884] <TB0> INFO: pXar: this is the end, my friend